WO2024113451A1

WO2024113451A1 - Rotational-speed pulse signal adjustment circuit and method

Info

Publication number: WO2024113451A1
Application number: PCT/CN2022/143272
Authority: WO
Inventors: 徐凯敏; 张洪; 唐冠
Original assignee: 赛卓电子科技(上海)股份有限公司
Priority date: 2022-12-02
Filing date: 2022-12-29
Publication date: 2024-06-06
Also published as: CN115951087A

Abstract

The present invention belongs to the technical field of electronic circuits. Provided are a rotational-speed pulse signal adjustment circuit and method. The circuit comprises: an operational amplification module, which amplifies received magnetic field signals of a plurality of channels between a back magnet of a gear sensor and a gear, so as to generate amplified signals; a processing module, which determines a capture value and a gain value of each channel according to the amplified signals, generates a first adjustment signal and a second adjustment signal, and generates a rotational-speed pulse signal of the gear according to the first adjustment signal and the amplified signals of the plurality of channels; and an adjustment module, which is used for adjusting the gain value, a magnetic field signal and an offset value of any channel in the operational amplification module according to the second adjustment signal. By processing signals and then performing adjustment and feedback on the signals, the rotational-speed pulse signal adjustment circuit and method provided in the present invention can effectively reduce the impact of factors such as inaccuracy and non-uniformity of a magnetic field of a back magnet on a pulse signal of a gear, thus making an adjusted pulse signal of the gear more accurate.

Description

Adjustment circuit and method of speed pulse signal

Technical Field

The present invention relates to the technical field of electronic circuits, and in particular to a regulating circuit and method for a rotation speed pulse signal.

Background technique

The common Hall speed sensor switches between high and low levels by sensing the changes in the magnetic field caused by the magnetic flux lines of the back magnet when the metal object moves. It is mainly used to measure the rotation of gears or the movement of metal objects made of ferromagnetic materials.

In order to generate a magnetic field, gear sensors used to detect gear speed need to add a magnet on the back of the chip, called a back magnet. The magnetic field of the back magnet is very strong, so the signal generated by the back magnet needs to be subtracted from the signal detected by the gear sensor to get the correct value.

However, in practical application scenarios, there will be a certain deviation between the actual measured value of the back magnetic field and the rated value, and the back magnetic field is not a uniform magnetic field, which results in the gear speed detected by the gear sensor being inaccurate.

Summary of the invention

The speed pulse signal adjustment circuit and method provided by the present invention are used to solve the problem in the prior art that there is a certain deviation between the actual measured value of the back magnetic field and the rated value, and the back magnetic field is not a uniform magnetic field, which leads to the defect that the gear speed detected by the gear sensor is inaccurate. The purpose of reducing the influence of factors such as inaccurate and uneven back magnetic field on the gear pulse signal is achieved, so that the adjusted gear pulse signal is more accurate.

The present invention provides a speed pulse signal regulating circuit, which is applied to a gear sensor and includes:

The operational amplifier module 110 is used to amplify the received magnetic field signals of multiple channels between the back magnet of the gear sensor and the gear to generate an amplified signal;

The processing module 120 is connected to the operational amplifier module 110. The processing module 120 determines the capture value and the gain value of each channel according to the amplified signal, and generates a first adjustment signal and a second adjustment signal, and generates a speed pulse signal of the gear according to the first adjustment signal and the amplified signals of the multiple channels;

The adjustment module 130 is connected to the processing module 120 and the operational amplifier module 110, and is used to adjust the gain value, the magnetic field signal and the offset value of any channel in the operational amplifier module 110 according to the second adjustment signal.

According to a speed pulse signal regulating circuit provided by the present invention, the regulating circuit further includes:

A magnetic induction component 140, wherein the magnetic induction component 140 comprises at least three magnetic induction elements arranged in sequence and spaced apart from each other, each of the magnetic induction elements being used to collect an initial magnetic field signal between the back magnet of the gear sensor and the gear;

The subtraction module 150 is connected between the magnetic induction component 140 and the operational amplifier module 110 , and is used to subtract the initial magnetic field signals collected by two adjacent magnetic induction elements, generate a magnetic field signal of any channel, and transmit it to the operational amplifier module 110 .

According to a speed pulse signal regulation circuit provided by the present invention, the operational amplifier module 110 includes at least two operational amplifiers; the processing module 120 includes at least two analog-to-digital converters and a digital processor;

The output end of each operational amplifier is connected to the input end of each analog-to-digital converter respectively, the output end of each analog-to-digital converter is connected to the input end of the digital processor respectively, and the output end of the digital processor is connected to the input end of the adjustment module 130;

The analog-to-digital converter is used to digitally convert the amplified signal of any of the channels, generate a digital signal of any of the channels, and transmit the digital signal to the digital processor;

The digital processor is used to determine the capture value and the gain value of each channel according to the digital signal of each channel, and generate the first adjustment signal and the second adjustment signal, and then adjust the offset value of the digital signal of each channel through the first adjustment signal to generate the speed pulse signal of the gear.

The present invention also provides a method for adjusting a rotation speed pulse signal, which is applied to any of the above-mentioned rotation speed pulse signal adjustment circuits, comprising:

Amplifying the received magnetic field signals of multiple channels between the back magnet of the gear sensor and the gear to generate an amplified signal;

Determining a capture value and a gain value of each of the channels according to the amplified signal;

By setting a capture threshold, analyzing the capture value and gain value of each channel to generate a first adjustment signal and a second adjustment signal;

Generate a speed pulse signal of a gear according to the first adjustment signal and the amplified signals of the multiple channels;

The gain value, the magnetic field signal and the offset value of any channel are adjusted according to the second adjustment signal.

According to a method for adjusting a speed pulse signal provided by the present invention, when the gear is in the startup stage, the first adjustment signal includes a first startup adjustment signal, the second adjustment signal includes a second startup adjustment signal, and the capture threshold is a first capture threshold;

By setting a capture threshold, analyzing the capture value and gain value of each channel to generate a first adjustment signal and a second adjustment signal, including:

When the capture value of any of the channels is not less than the first capture threshold of any of the channels, and the gain value of any of the channels is not a minimum value, generating the first power-on adjustment signal and the second power-on adjustment signal;

The second power-on adjustment signal is used to instruct the adjustment module 130 to adjust the gain value of any of the channels and the offset value of the magnetic field signal.

According to a method for adjusting a speed pulse signal provided by the present invention, after generating the second power-on adjustment signal, the method further includes:

Sending the second power-on adjustment signal to the adjustment module 130;

receiving a new capture value of any of the channels until the new capture value is less than the first capture threshold, so as to determine an offset value of the digital signal of any of the channels;

A first target capture value of any of the channels is determined according to the offset value.

According to a method for adjusting a speed pulse signal provided by the present invention, when the gear is in a calibration stage, the first adjustment signal includes a first calibration adjustment signal, the second adjustment signal includes a second calibration adjustment signal and a third calibration adjustment signal, the capture threshold is a second capture threshold, the channel includes a first channel and a second channel, the capture value includes: a first capture value of the first channel, and a second capture value of the second channel; the gain value includes: a first gain value of the first channel, and a second gain value of the second channel;

In the case where it is determined that the first captured value reaches a peak value and the second captured value reaches a peak value, determining the first gain value and the second gain value;

When it is determined that the difference between the first gain value and the second gain value is greater than 1, the flag bit of the operational amplifier module 110 is adjusted, and the first calibration adjustment signal and the second calibration adjustment signal are generated; the second calibration adjustment signal is used to instruct the adjustment module 130 to adjust the gain value of the target operational amplifier, and the target operational amplifier is determined based on the first gain value and the second gain value;

When it is determined that any one of the first capture value and the second capture value has not reached a peak value and any one of the values is not less than the second capture threshold, the third calibration adjustment signal is generated; the third calibration adjustment signal is used to instruct the adjustment module 130 to adjust the gain value of the operational amplifier corresponding to any one of the values.

According to a method for adjusting a speed pulse signal provided by the present invention, when it is determined that any one of the first captured value and the second captured value has not reached a peak value, the first adjustment signal includes a fourth calibration adjustment signal;

The method of setting a capture threshold and analyzing the capture value and gain value of each channel to generate a first adjustment signal further includes:

If the first capture value and the second capture value are both less than the second capture threshold, a fourth calibration adjustment signal is generated according to the extreme value of any of the values, and the fourth calibration adjustment signal is used to adjust the offset value of the digital signal of the channel corresponding to any of the values.

According to a method for adjusting a speed pulse signal provided by the present invention, when the gear is in the running stage, the first adjustment signal includes a first running adjustment signal, the second adjustment signal includes a second running adjustment signal, and the capture threshold is a third capture threshold;

Comparing the capture value of any one of the channels with the third capture threshold, determining a target number of times for any one of the channels, the target number of times being used to indicate the number of times the capture value of any one of the channels is not less than the third capture threshold;

generating the first operation adjustment signal and the second operation adjustment signal when the capture value of any channel is not less than the third capture threshold and the target number of times is greater than a preset number of times;

The second operation adjustment signal is used to instruct the adjustment module 130 to adjust the gain value of any one of the channels.

According to a method for adjusting a speed pulse signal provided by the present invention, after generating the first operation adjustment signal and the second operation adjustment signal, the method further includes:

Sending the second operation adjustment signal to the adjustment module 130;

receiving a new capture value of any one of the channels until the new capture value is less than the third capture threshold, and determining an offset value of any one of the channels;

A second target capture value of any one of the channels is determined according to the offset value.

The present invention also provides a gear sensor, which is used to be arranged between a back magnet and a gear, and includes a regulating circuit for a rotation speed pulse signal as described in any one of the above.

The present invention also provides a digital processor, comprising:

A determination module, used to determine the capture values of the at least two channels according to the digital signals of the gear speeds sent by the analog-to-digital converters of the at least two channels, and determine the gain values of the operational amplifiers of the at least two channels in the operational amplifier module 110;

A first generating module, configured to analyze the capture values and the gain values of the at least two channels based on a capture threshold value to generate a first adjustment signal and a second adjustment signal; the second adjustment signal is configured to instruct the adjustment module 130 to adjust the gain value, the magnetic field signal and the offset value of the operational amplifier of the at least two channels;

The second generating module is used to adjust the offset value of the digital signal using the first adjusting signal to generate a speed pulse signal of the gear.

The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, it implements a method for adjusting a speed pulse signal as described above.

The present invention also provides a non-transitory computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the method for adjusting the speed pulse signal as described in any one of the above is implemented.

The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the method for adjusting the speed pulse signal as described above is implemented.

The speed pulse signal adjustment circuit and method provided by the present invention can effectively reduce the influence of factors such as inaccurate and uneven back magnetic field on the gear pulse signal by processing the obtained signal and then adjusting and feeding back the signal according to the processing result, so as to make the adjusted gear pulse signal more accurate.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

FIG1 is a circuit block diagram of a speed pulse signal regulating circuit provided by the present invention;

FIG2 is a schematic diagram of the installation position of the gear sensor provided by the present invention;

FIG3 is another circuit block diagram of the speed pulse signal regulating circuit provided by the present invention;

FIG4 is a circuit diagram of an embodiment of a speed pulse signal regulating circuit provided by the present invention shown in FIG3 ;

FIG5 is a schematic diagram of a flow chart of a method for adjusting a speed pulse signal provided by the present invention;

6 is a second flow chart of the method for adjusting the speed pulse signal provided by the present invention;

7 is a third flow chart of the method for adjusting the speed pulse signal provided by the present invention;

FIG8 is a fourth flow chart of the method for adjusting the speed pulse signal provided by the present invention;

FIG9 is a schematic diagram of the structure of a digital processor provided by the present invention;

FIG. 10 is a schematic diagram of the structure of an electronic device provided by the present invention.

Wherein, the accompanying drawings are marked as follows:

100: regulating circuit of speed pulse signal; 110: operational amplifier module; 120: processing module; 130: regulating module; 140: magnetic induction component; 150: subtraction module; 200: gear; 210: tooth peak; 220: tooth valley; 300: back magnetism.

Detailed ways

In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

Hall sensors can sense magnetic fields, positions or currents without contact, which makes them widely used in consumer electronics and automotive fields such as electric vehicles, autonomous driving, smart meters and power inverters as magnetometers, position sensors and current sensors. They are also components of safety systems, Electric Power Steering (EPS) systems and body electronic systems. In this context, it is extremely important to improve the performance of Hall sensors and design Hall sensors with high precision, high stability and high reliability.

In the description of this application, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first", "second", etc. may explicitly or implicitly include one or more of the feature. In the description of this application, unless otherwise specified, "plurality" means two or more.

The following describes the speed pulse signal adjustment circuit and method provided by the embodiments of the present invention in conjunction with FIG. 1 to FIG. 10 .

FIG1 is a circuit block diagram of a speed pulse signal regulating circuit provided by the present invention, which is applied to a gear sensor, as shown in FIG1 , and includes:

Among them, the operational amplifier module 110 may be provided with at least two operational amplifiers, each operational amplifier is used to perform operations such as signal amplification and bias adjustment on the magnetic field signal of a channel, obtain an amplified signal corresponding to the magnetic field signal, and output the amplified signal to the processing module 120.

For example, the operational amplifier module 110 receives magnetic field signals of two channels, a first channel and a second channel. Correspondingly, the operational amplifier module 110 includes at least an operational amplifier AMP1 of the first channel and an operational amplifier AMP2 of the second channel; AMP1 amplifies and adjusts the magnetic field signal of the first channel, and AMP2 amplifies and adjusts the magnetic field signal of the second channel.

After receiving an amplified signal of a channel, the processing module 120 obtains a gain value of the operational amplifier in the channel and a capture value of the amplified signal according to the amplified signal, and generates a first adjustment signal and a second adjustment signal of the amplified signal.

The first adjustment signal is a general term for the signal that the processing module 120 finely adjusts the amplified signal, and the second adjustment signal is a general term for the signal that the processing module 120 adjusts the operational amplifier module 110 through the adjustment module 130 .

The first adjustment signal is used to instruct to finely adjust the amplified signal, thereby generating a more accurate pulse adjustment signal.

The second adjustment signal is used to instruct the adjustment module 130 to roughly adjust the gain value of the operational amplifier in the operational amplifier module 110 so that the amplified signal can be captured by the processing module 120 .

Optionally, the operational amplifier module 110 includes at least two operational amplifiers; the processing module 120 includes at least two analog-to-digital converters and a digital processor;

Among them, since the amplified signal is an analog signal, it is necessary to use an analog-to-digital converter ADC to sample the amplified signal of a certain channel according to an internal clock signal, and use all captured voltage values as captured values, and then the digital signal of the channel can be obtained according to the captured values.

For example, an analog-to-digital converter ADC is used to digitally convert the amplified signal of a single channel, generate a digital signal of a single channel, and send the digital signal of the single channel to the digital processor (DP);

After receiving the digital signals of each channel, the digital processor DP analyzes the digital signals of each channel to generate a first adjustment signal and a second adjustment signal, and adjusts the digital signal using the first adjustment signal to obtain a speed pulse signal of the gear.

For example, DP's signal conditioning is divided into three stages: power-on stage, calibration stage, and operation stage.

In the power-on phase, DP sets the gain value G of the operational amplifier module 110 and the capture threshold value K1 of the analog-to-digital converter ADC, and adjusts the offset value of the digital signal and the gain value of the operational amplifier so that the capture value of the analog-to-digital converter ADC is less than the set capture threshold value K1;

In the calibration phase, calibration begins, DP sets the capture threshold K2 of the analog-to-digital converter ADC, and adjusts the offset value of the digital signal and the final gain value of the power-on phase by comparing the capture value U of the analog-to-digital converter ADC with the capture threshold K2, and then adjusts the offset value according to the extreme difference value, thereby achieving the purpose of calibration;

During the operation phase, DP adjusts the gain value based on the final gain value of the calibration phase, and adjusts the offset value of the digital signal to adjust the offset that may occur when the gear works normally.

Figure 2 is a schematic diagram of the installation position of the gear sensor provided by the present invention. As shown in Figure 2, the gear sensor 100 is an IC, which is a Hall effect rotational speed sensor (Hall effect rotational speed sensor), which is arranged between the gear 200 and the back magnet 300. The gear sensor 100 is provided with magnetic sensing elements H1, H2 and H3 parallel to the back magnet 300, and the gear 200 on the upper side of the gear sensor 100 is provided with tooth peaks 210 and tooth valleys 220.

The back magnet 300 may be a permanent magnet.

Optionally, the regulating circuit further includes:

In the magnetic induction assembly 140 , the magnetic induction elements are evenly spaced between the back magnet and the gear, which can reduce the deviation of the acquired initial magnetic field signal.

The subtraction module 150 includes at least two subtractors, each of which is used to perform difference calculation on the initial magnetic field signals collected by two adjacent magnetic sensing elements in a single channel, generate a magnetic field signal of the channel, and transmit the magnetic field signal to the operational amplifier of the channel in the operational amplifier module 110.

FIG3 is another circuit block diagram of the speed pulse signal regulating circuit provided by the present invention. As shown in FIG3 , the regulating circuit includes the following structures:

The magnetic induction component 140 , the subtraction module 150 , the operational amplifier module 110 and the processing module 120 are connected in sequence, and the adjustment module 130 is connected to the operational amplifier module 110 and the processing module 120 respectively.

FIG. 4 is a circuit diagram of an embodiment of a speed pulse signal regulating circuit provided by the present invention shown in FIG. 3 . As shown in FIG. 4 , the regulating circuit includes the following structure:

The magnetic induction component 140 includes three magnetic induction elements H1, H2 and H3, which are used to collect initial magnetic field signals;

The subtraction module 150 includes two subtractors MINUS1 and MINUS2, which are used to eliminate the common-mode interference of the back magnetic field in the initial magnetic field signal to obtain a magnetic field signal; ideally, the magnetic field strength of the back magnetic field of each magnetic sensing element is the same, that is, the magnetic field of the back magnetic field is uniform, and the subtractor will completely eliminate the influence of the magnetic field of the back magnetic field. However, in fact, since the magnetic field strength of the back magnetic field is uneven, its influence cannot be completely eliminated;

The operational amplifier module 110 includes two operational amplifiers AMP1 and AMP2. Since the induction value collected by the magnetic induction element is very small, the magnetic field signal needs to be amplified by the operational amplifier to obtain an amplified signal, which is convenient for collection and subsequent data processing;

The processing module 120 includes two analog-to-digital converters ADC1 and ADC2, and a digital processor DP. Since the algorithm of analog signals is complex and difficult to implement, the analog signal such as the amplified signal is converted into a digital signal by the analog-to-digital converter ADC, so as to facilitate rapid operation of the digital signal in the DP, generate a first adjustment signal and a second adjustment signal, and can quickly eliminate the bias voltage caused by the uneven back magnetism in the initialization stage;

The adjustment module 130 includes two offset/gain adjusters ADJ1 and ADJ2. Failure to eliminate back magnetism will cause signal offset, and the offset/gain adjuster is used to adjust the offset value Y of the magnetic field signal of the amplifier in the operational amplifier AMP1 and AMP2 and the gain value G of the operational amplifier according to the second adjustment signal, so as to move the offset signal back to the correct position.

The connection relationship of the above structure is as follows:

The magnetic induction element H1 and the magnetic induction element H2 are respectively connected to the two input ends of the subtractor MINUS1, and the initial magnetic field signals collected by H1 and H2 are subjected to difference calculation in MINUS1 to obtain the magnetic field signal of the first channel; the magnetic induction element H2 and the magnetic induction element H3 are respectively connected to the two input ends of the subtractor MINUS2, and the initial magnetic field signals collected by H2 and H3 are subjected to difference calculation in MINUS2 to obtain the magnetic field signal of the second channel;

The output end of the subtractor MINUS1 is connected to the input end of the operational amplifier AMP1, and AMP1 amplifies and adjusts the magnetic field signal of the first channel to obtain the amplified signal of the first channel; the output end of the subtractor MINUS2 is connected to the input end of the operational amplifier AMP2, and AMP2 amplifies and adjusts the magnetic field signal of the second channel to obtain the amplified signal of the second channel;

The adjustment terminal of the operational amplifier AMP1 is connected to the output terminal of the offset/gain adjuster ADJ1, and the output terminal thereof is connected to the input terminal of the analog-to-digital converter ADC1. ADC1 performs analog-to-digital conversion on the amplified signal of the first channel to obtain the digital signal of the first channel. The adjustment terminal of the operational amplifier AMP2 is connected to the output terminal of the offset/gain adjuster ADJ2, and the output terminal thereof is connected to the input terminal of the analog-to-digital converter ADC2. ADC2 performs analog-to-digital conversion on the amplified signal of the second channel to obtain the digital signal of the second channel.

The output end of the analog-to-digital converter ADC1 is connected to an input end of the digital processor DP; the output end of the analog-to-digital converter ADC2 is connected to the other input end of the digital processor DP. DP analyzes and processes the digital signals of the first channel and the second channel respectively to generate the first adjustment signal and the second adjustment signal of the first channel, and the first adjustment signal and the second adjustment signal of the second channel. DP adjusts the digital signal of the first channel according to the first adjustment signal of the first channel to obtain the speed pulse signal of the gear of the first channel; DP also adjusts the digital signal of the second channel according to the first adjustment signal of the second channel to obtain the speed pulse signal of the gear of the second channel; generally, the speed pulse signal of the first channel is the same as the speed pulse signal of the second channel.

The input end of the offset/gain regulator ADJ1 is connected to an output end of the digital processor DP, and ADJ1 adjusts the gain value, magnetic field signal and offset value in AMP1 according to the second adjustment signal of the first channel; the input end of the offset/gain regulator ADJ2 is connected to the other output end of the digital processor DP, and ADJ2 adjusts the gain value, magnetic field signal and offset value in AMP2 according to the second adjustment signal of the second channel.

As shown in FIG4 , the magnetic induction elements H1 and H2 send the collected initial magnetic field signals to the subtractor MINUS1. The subtractor MINUS1 performs difference calculation on the initial magnetic field signals collected by H1 and H2 to obtain the magnetic field signal of the first channel, and sends the magnetic field signal to the operational amplifier AMP1 of the first channel in the operational amplifier module 110.

According to the adjustment circuit of the rotation speed pulse signal provided by the invention, the collected original signal is subtracted by a subtractor, so that the common mode interference caused by the back magnetic field in the magnetic field signal can be effectively removed.

The following is a description of the method for adjusting the rotation speed pulse signal provided by the present invention. The method for adjusting the rotation speed pulse signal described below and the adjustment circuit for the rotation speed pulse signal described above can refer to each other.

FIG5 is one of the flow charts of the method for adjusting the speed pulse signal provided by the present invention. As shown in FIG5 , the adjustment circuit of the speed pulse signal applied in the above embodiment includes but is not limited to the following steps:

First, in step S1 , the received magnetic field signals of multiple channels between the back magnet of the gear sensor and the gear are amplified to generate amplified signals.

Further, in step S2, the capture value and gain value of each channel are determined according to the amplified signal.

According to the digital signals of the gear rotation speed sent by the analog-to-digital converters of at least two channels, the capture values of the at least two channels are determined, and the gain values of the operational amplifiers of the at least two channels in the operational amplifier module are determined.

For example, when DP receives the digital signal of gear speed sent by the analog-to-digital converter ADC1 of the first channel, it can determine the capture value U of the first channel at any time based on the digital signal, and determine the gain value G1 of the operational amplifier AMP1.

According to the starting sequence of the gears, the adjustment method of the speed pulse signal is applied to the startup stage, calibration stage and operation stage respectively.

The gain adjustment of the operational amplifier in the calibration phase is performed on the basis of the gain adjusted in the startup phase, and the gain adjustment of the operational amplifier in the operation phase is performed on the basis of the gain adjusted in the calibration phase.

Furthermore, in step S3, by setting a capture threshold, the capture value and gain value of each channel are analyzed to generate a first adjustment signal and a second adjustment signal.

It can be understood that in order to make the speed pulse signal of the gear gradually more accurate, it is necessary to go from coarse adjustment to fine adjustment during the signal adjustment process. Therefore, the first capture threshold K1 in the startup phase, the second capture threshold K2 in the calibration phase, and the third capture threshold K3 in the operation phase satisfy K1＜K2＜K3.

Optionally, when the gear is in the startup stage, the first adjustment signal includes a first startup adjustment signal, the second adjustment signal includes a second startup adjustment signal, and the capture threshold is a first capture threshold;

FIG. 6 is a second flow chart of the method for adjusting the speed pulse signal provided by the present invention, as shown in FIG. 6 , comprising:

When the capture value U of the analog-to-digital converter of any channel is not less than the first capture threshold K1, and the gain value G of the channel is not the minimum gain value Gmin, DP generates a first power-on adjustment signal and a second power-on adjustment signal, and sends the second power-on adjustment signal to the adjustment module 130 to instruct the adjustment module 130 to adjust the gain value G of the operational amplifier in the channel and the offset value of the magnetic field signal.

Optionally, after generating the second power-on adjustment signal, the method further includes:

Sending the second power-on adjustment signal to the adjustment module 130;

Sending a second power-on adjustment signal to the offset/gain adjuster ADJ1 and the offset/gain adjuster ADJ2;

Receive a new capture value U of any channel until the new capture value U is less than the first capture threshold K1, and determine the offset value Y=(Umax+Umin)/2 of the offset/gain adjuster in the channel;

Set the offset value Y to the first target capture value of the analog-to-digital converter of any channel.

Specifically, the circuit is reset first, and after the reset, the gain value of the operational amplifier AMP1 of the first channel is set to G1, the gain value of the operational amplifier AMP2 is set to G2, and the first capture threshold value K1 of the analog-to-digital converters ACD1 and ADC2 is set;

Then the analog-to-digital converters ADC1 and ADC2 are turned on to collect data respectively, and the captured values U1 and U2 of the current channel are obtained, and the captured values U1 and U2 are sent to the digital processor DP for digital processing;

In the digital processor DP, the captured values U1 and U2 are first compared with the set first capture threshold K1. If U1≥K1 and the gain value G1 of AMP1 is not the minimum gain value Gmin, the offset/gain adjuster ADJ1 adjusts the gain value of AMP1 according to the second power-on adjustment signal until U1＜K1;

Similarly, if U2≥K2, and the gain value G2 of AMP2 is not the minimum gain value Gmin, the offset/gain adjuster ADJ2 adjusts the gain value of AMP2 according to the second power-on adjustment signal until U2<K2.

Finally, the offset values Y1 and Y2 of the offset/gain adjusters ADJ1 and ADJ2 are set as the capture values of ADC1 and ADC2 respectively, and the power-on stage ends.

According to the method for adjusting the rotation speed pulse signal provided by the present invention, the operational amplifier module is set and adjusted to correct the magnetic field signal, eliminate the offset of the magnetic field signal, and thus obtain the correct gear rotation speed.

Optionally, when the gear is in a calibration stage, the first adjustment signal includes a first calibration adjustment signal, the second adjustment signal includes a second calibration adjustment signal and a third calibration adjustment signal, the capture threshold is a second capture threshold, the channel includes a first channel and a second channel, the capture value includes: a first capture value of the first channel, and a second capture value of the second channel; the gain value includes: a first gain value of the first channel, and a second gain value of the second channel;

The target operational amplifier is an operational amplifier with a higher gain value. For example, if G1>G2, AMP1 is the target operational amplifier.

Compare the newly captured value with the previously captured value. If the previously captured values were gradually increasing, but the value captured now is smaller than the previous value, then the previous value is the maximum value, which is recorded as the peak value, and the same applies to the minimum value.

FIG. 7 is a third flow chart of the method for adjusting the speed pulse signal provided by the present invention, as shown in FIG. 7 , comprising:

For example, when DP determines that the first captured value U1 reaches a peak value _{U1 peak} , and the second captured value U2 reaches a peak value _{U2 peak} , the first gain value G1 of AMP1 and the second gain value G2 of AMP2 are determined at this time;

When DP determines that |G1-G2|＞1, the flag bit AMP_DIFF_FLAG of the operational amplifier module 110 is adjusted to 1, and a second calibration adjustment signal is generated to instruct the adjustment module 130 to adjust the gain value of the target operational amplifier with a higher gain value.

When it is determined that any one of the first capture value U1 and the second capture value U2 has not reached a peak value and the capture value is not less than the second capture threshold K2, a third calibration adjustment signal is generated to instruct the adjustment module 130 to adjust the gain value of the operational amplifier corresponding to the capture value.

Optionally, in a case where it is determined that any one of the first captured value and the second captured value does not reach a peak value, the first adjustment signal includes a fourth calibration adjustment signal;

The range value is the difference between the maximum and minimum values in the captured values.

If both the first capture value U1 and the second capture value U2 are less than the second capture threshold K2, a fourth calibration adjustment signal is generated according to the extreme difference ΔU of any value, so that the adjustment module 130 can adjust the offset value Y of the operational amplifier in the channel corresponding to any value.

When the power-on phase is over, the gears start to rotate, and the debugging phase begins. First, the second capture threshold K2 of ADC1 and ADC2 is set. As the gears rotate, ADC1 and ADC2 collect the first capture value U1 and the second capture value U2 of the current channel, and send the capture values U1 and U2 to the digital processor DP for digital processing.

In the digital processor DP, it is first determined whether the first captured value U1 of ADC1 and the second captured value U2 of ADC2 have reached a peak value;

If the peak value is reached and the difference between the gain values of AMP1 and AMP2 is not less than 1, then set the flag AMP_DIFF_FLAG = 1, and adjust the higher gain value of the operational amplifier AMP1 and AMP2 G to make the gain value G = G-1, until the difference between the gain values of AMP1 and AMP2 |G1-G2|≤1;

If the captured values U1 and U2 do not reach the peak value, further determine whether the current captured values of ADC1 and ADC2 are greater than or equal to the second capture threshold K2. If any captured value U≥K2, reduce any captured value U.

If the captured values U1 and U2 of ADC1 and ADC2 do not exceed the second capture threshold K2, the digital processor DP generates a fourth calibration adjustment signal according to the extreme difference value △U=Umax-Umin of any captured value U to control the adjustment module 130 to adjust the offset value Y of the channel corresponding to the captured value, the debugging stage.

The measured offset value Y will shift the bias voltage of the input signal through ADJ and move the signal to the position of Y=0.

According to the method for adjusting the rotation speed pulse signal provided by the present invention, the influence of the uneliminated back magnetism can be calculated, and the signal can be moved to the correct position through the offset value.

Optionally, when the gear is in the running stage, the first adjustment signal includes a first running adjustment signal, the second adjustment signal includes a second running adjustment signal, and the capture threshold is a third capture threshold;

The target number is the number of times the capture value U of the channel is greater than the third capture threshold K3.

When the waveform of the digital signal of any channel changes and the gain value G of the operational amplifier remains unchanged, the capture value U of any channel is compared with the third capture threshold K3 to determine the number of times the capture value U of the channel is greater than the third capture threshold K3; the waveform change includes: the capture value of the digital signal changes from a monotonically rising value to a monotonically falling value, or from a monotonically falling value to a monotonically rising value.

When U≤K3, and the capture value U of the channel is greater than the third capture threshold K3 for a number of times greater than 1, a first operation adjustment signal and a second operation adjustment signal are generated. DP generates a speed pulse signal of the channel by adjusting the offset value of the digital signal according to the first operation adjustment signal. The second operation adjustment signal is used to instruct the adjustment module 130 to adjust the gain value G of the operational amplifier of the channel.

FIG8 is a fourth flow chart of the method for adjusting the speed pulse signal provided by the present invention, as shown in FIG8 , comprising:

When the adjustment phase ends and the operation phase begins, the DP adjusts the possible offsets that may occur when the gears work normally during the operation phase. First, the third capture threshold K3 of ADC1 and ADC2 is set, and the counter that counts the ADC peak value exceeding the third capture threshold K3 is reset;

Then the digital processor DP collects the capture values U1 and U2 of the current channel according to ADC1 and ADC2 to determine whether the waveform edge has changed.

If a change occurs, it is further determined whether the captured values U1 and U2 of ADC1 and ADC2 exceed the third capture threshold K3 after the last edge change is detected when the gain values G1 and G2 of AMP1 and AMP2 remain unchanged. If any captured value of ADC1 and ADC2 exceeds the third capture threshold K3, the number of times the ADC peak value exceeds the third capture threshold K3 on the channel is counted by 1, and the execution process returns to the waveform edge change detection. Otherwise, the counter for the ADC peak value exceeding the third capture threshold K3 is reset.

Optionally, after generating the first operation adjustment signal and the second operation adjustment signal, the method further includes:

Sending the second operation adjustment signal to the adjustment module 130;

If the captured values of the current channel collected by ADC1 and ADC2 are judged and it is found that the waveform edge has changed, it is further judged whether the captured values of ADC1 and ADC2 are less than or equal to the third capture threshold K3. If the captured values are less than or equal to the third capture threshold K3, the execution process returns to the waveform edge change detection. Otherwise, it is further judged whether the counter of the ADC peak value exceeding the third capture threshold K3 is not less than 1. If it is not less than 1 and the gains of AMP1 and AMP2 have reached the minimum value, an error is reported;

If the count of the ADC peak value exceeding the third capture threshold K3 is not less than 1, and the AMP1 and AMP2 gain values G1 and G2 have not reached the minimum value, then G1=G1-1, G2=G2-1, and the offset values Y1 and Y2 are adjusted by controlling ADJ1 and ADJ2, Y1=(U1max+U1min)/2, Y2=(U2max+U2min)/2, after adjustment, the counter of the ADC peak value exceeding the third capture threshold K3 is reset, and the operation phase ends.

According to the method for adjusting the speed pulse signal provided by the present invention, by adjusting the gain and offset values during the operation phase, it is possible to effectively avoid the situation where the sensor value may change and cause overflow due to reasons such as vibration during the operation of the gear.

Further, in step S4, a speed pulse signal of the gear is generated according to the first adjustment signal and the amplified signals of the multiple channels.

In the processing module 120, the analog-to-digital converter converts the amplified signal into a digital signal, and the DP fine-tunes the offset value of the digital signal according to the first adjustment signal, so as to generate a more accurate gear speed pulse signal.

Further, in step S5, the gain value, the magnetic field signal and the offset value of any channel are adjusted according to the second adjustment signal.

After the adjustment module 130 roughly adjusts the gain value, magnetic field signal and offset value of the operational amplifier module 110 according to the second adjustment signal, the DP can capture the digital signal, and the speed pulse signal of the gear generated is more accurate.

The method for adjusting the speed pulse signal provided by the present invention processes the obtained signal and then adjusts and feeds back the signal according to the processing result, which can effectively reduce the influence of factors such as inaccurate and uneven back magnetic field on the gear pulse signal, thereby making the adjusted gear pulse signal more accurate.

The gear sensor provided by the present invention is described below. The gear sensor described below and the regulating circuit of the rotation speed pulse signal described above can be referred to each other.

The present invention also provides a gear sensor, which is used to be arranged between a back magnet and a gear, and includes a regulating circuit for a rotation speed pulse signal as described in any of the above embodiments.

The gear sensor provided by the present invention processes the obtained signal and then adjusts and feeds back the signal according to the processing result, which can effectively reduce the influence of factors such as inaccurate and uneven back magnetic field on the gear pulse signal, making the adjusted gear pulse signal more accurate.

The digital processor provided by the present invention is described below. The digital processor described below and the method for adjusting the speed pulse signal described above can be referred to each other.

FIG9 is a schematic diagram of the structure of a digital processor provided by the present invention, as shown in FIG9 , comprising:

The determination module 901 is used to determine the captured values of the at least two channels according to the digital signals of the gear speeds sent by the analog-to-digital converters of the at least two channels, and determine the gain values of the operational amplifiers of the at least two channels in the operational amplifier module 110;

A first generating module 902 is used to analyze the capture values and the gain values of the at least two channels based on a capture threshold value to generate a first adjustment signal and a second adjustment signal; the second adjustment signal is used to instruct the adjustment module 130 to adjust the gain value, magnetic field signal and offset value of the operational amplifier of the at least two channels;

The second generating module 903 is used to adjust the offset value of the digital signal using the first adjusting signal to generate a speed pulse signal of the gear.

During the operation of the digital processor, the determination module 901 determines the capture values of the at least two channels according to the digital signals of the gear speed sent by the analog-to-digital converters of the at least two channels, and determines the gain values of the operational amplifiers of the at least two channels in the operational amplifier module 110; the first generation module 902 analyzes the capture values and the gain values of the at least two channels based on the capture threshold to generate a first adjustment signal and a second adjustment signal; the second adjustment signal is used to instruct the adjustment module 130 to adjust the gain value, magnetic field signal and offset value of the operational amplifiers of the at least two channels; the second generation module 903 is used to use the first adjustment signal to adjust the offset value of the digital signal to generate a speed pulse signal of the gear.

The digital processor provided in the present application processes the obtained signal and then adjusts and feeds back the signal according to the processing result, which can effectively reduce the influence of factors such as inaccurate and uneven back magnetic field on the gear pulse signal, making the adjusted gear pulse signal more accurate.

FIG10 is a schematic diagram of the structure of an electronic device provided by the present invention. As shown in FIG10 , the electronic device may include: a processor 1010, a communication interface 1020, a memory 1030 and a communication bus 1040, wherein the processor 1010, the communication interface 1020 and the memory 1030 communicate with each other through the communication bus 1040. The processor 1010 may call the logic instructions in the memory 1030 to execute the method for adjusting the speed pulse signal, which method includes: amplifying the magnetic field signals of multiple channels between the back magnet of the gear sensor and the gear received to generate an amplified signal; determining the capture value and gain value of each channel according to the amplified signal; analyzing the capture value and gain value of each channel by setting a capture threshold to generate a first adjustment signal and a second adjustment signal; generating a speed pulse signal of the gear according to the first adjustment signal and the amplified signals of the multiple channels; adjusting the gain value, the magnetic field signal and the offset value of any channel according to the second adjustment signal.

In addition, the logic instructions in the above-mentioned memory 1030 can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or the part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program codes.

On the other hand, the present invention also provides a computer program product, which includes a computer program. The computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the speed pulse signal adjustment method provided by the above methods, which method includes: amplifying the magnetic field signals of multiple channels between the back magnet of the gear sensor and the gear to generate an amplified signal; determining the capture value and gain value of each channel based on the amplified signal; analyzing the capture value and gain value of each channel by setting a capture threshold to generate a first adjustment signal and a second adjustment signal; generating a speed pulse signal of the gear based on the first adjustment signal and the amplified signals of the multiple channels; and adjusting the gain value, the magnetic field signal and the offset value of any channel based on the second adjustment signal.

On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute the speed pulse signal adjustment method provided by the above-mentioned methods, the method comprising: amplifying the magnetic field signals of multiple channels between the back magnet of the received gear sensor and the gear to generate an amplified signal; determining the capture value and gain value of each of the channels based on the amplified signal; analyzing the capture value and gain value of each of the channels by setting a capture threshold to generate a first adjustment signal and a second adjustment signal; generating a speed pulse signal of the gear based on the first adjustment signal and the amplified signals of the multiple channels; and adjusting the gain value, the magnetic field signal and the offset value of any channel based on the second adjustment signal.

The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Those of ordinary skill in the art may understand and implement it without creative work.

Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM/RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

A speed pulse signal regulating circuit, applied to a gear sensor, is characterized by comprising:

An operational amplifier module (110) is used to amplify the received magnetic field signals of multiple channels between the back magnet of the gear sensor and the gear to generate an amplified signal;

A processing module (120) is connected to the operational amplifier module (110), wherein the processing module (120) determines the capture value and gain value of each channel according to the amplified signal, and generates a first adjustment signal and a second adjustment signal, and generates a speed pulse signal of a gear according to the first adjustment signal and the amplified signals of the multiple channels;

The adjustment module (130) is connected to the processing module (120) and the operational amplifier module (110), and is used to adjust the gain value, the magnetic field signal and the offset value of any channel in the operational amplifier module (110) according to the second adjustment signal.
The speed pulse signal regulating circuit according to claim 1, characterized in that the regulating circuit further comprises:

A magnetic induction component (140), the magnetic induction component (140) comprising at least three magnetic induction elements arranged in sequence and spaced apart, each of the magnetic induction elements being used to collect an initial magnetic field signal between a back magnet of a gear sensor and a gear;

A subtraction module (150) is connected between the magnetic induction component (140) and the operational amplifier module (110) and is used to subtract the initial magnetic field signals collected by two adjacent magnetic induction elements to generate a magnetic field signal of any one of the channels and transmit the signal to the operational amplifier module (110).
The speed pulse signal regulating circuit according to claim 2, characterized in that the operational amplifier module (110) includes at least two operational amplifiers; the processing module (120) includes at least two analog-to-digital converters and a digital processor;

The output end of each operational amplifier is respectively connected to the input end of each analog-to-digital converter, the output end of each analog-to-digital converter is respectively connected to the input end of the digital processor, and the output end of the digital processor is connected to the input end of the adjustment module (130);

The analog-to-digital converter is used to digitally convert the amplified signal of any of the channels, generate a digital signal of any of the channels, and transmit the digital signal to the digital processor;

The digital processor is used to determine the capture value and the gain value of each channel according to the digital signal of each channel, and generate the first adjustment signal and the second adjustment signal, and then adjust the offset value of the digital signal of each channel through the first adjustment signal to generate the speed pulse signal of the gear.
A method for adjusting a rotation speed pulse signal, applied to a rotation speed pulse signal adjustment circuit as claimed in any one of claims 1 to 3, characterized in that it comprises:

Amplifying the received magnetic field signals of multiple channels between the back magnet of the gear sensor and the gear to generate an amplified signal;

Determining a capture value and a gain value of each of the channels according to the amplified signal;

By setting a capture threshold, analyzing the capture value and gain value of each channel to generate a first adjustment signal and a second adjustment signal;

Generate a speed pulse signal of a gear according to the first adjustment signal and the amplified signals of the multiple channels;

The gain value, the magnetic field signal and the offset value of any channel are adjusted according to the second adjustment signal.
The method for adjusting the speed pulse signal according to claim 4 is characterized in that, when the gear is in the startup stage, the first adjustment signal includes a first startup adjustment signal, the second adjustment signal includes a second startup adjustment signal, and the capture threshold is a first capture threshold;

By setting a capture threshold, analyzing the capture value and gain value of each channel to generate a first adjustment signal and a second adjustment signal, including:

When the capture value of any of the channels is not less than the first capture threshold of any of the channels, and the gain value of any of the channels is not a minimum value, generating the first power-on adjustment signal and the second power-on adjustment signal;

The second power-on adjustment signal is used to instruct the adjustment module (130) to adjust the gain value of any one of the channels and the offset value of the magnetic field signal.
The method for adjusting the speed pulse signal according to claim 5, characterized in that after generating the second power-on adjustment signal, it further comprises:

Sending the second power-on adjustment signal to the adjustment module (130);

receiving a new capture value of any of the channels until the new capture value is less than the first capture threshold, so as to determine an offset value of the digital signal of any of the channels;

A first target capture value of any of the channels is determined according to the offset value.
The method for adjusting the speed pulse signal according to claim 6 is characterized in that, when the gear is in the calibration stage, the first adjustment signal includes a first calibration adjustment signal, the second adjustment signal includes a second calibration adjustment signal and a third calibration adjustment signal, the capture threshold is a second capture threshold, the channel includes a first channel and a second channel, the capture value includes: a first capture value of the first channel, and a second capture value of the second channel; the gain value includes: a first gain value of the first channel, and a second gain value of the second channel;

By setting a capture threshold, analyzing the capture value and gain value of each channel to generate a first adjustment signal and a second adjustment signal, including:

In the case where it is determined that the first captured value reaches a peak value and the second captured value reaches a peak value, determining the first gain value and the second gain value;

When it is determined that the difference between the first gain value and the second gain value is greater than 1, the flag bit of the operational amplifier module (110) is adjusted, and the first calibration adjustment signal and the second calibration adjustment signal are generated; the second calibration adjustment signal is used to instruct the adjustment module (130) to adjust the gain value of a target operational amplifier, and the target operational amplifier is determined based on the first gain value and the second gain value;

When it is determined that any one of the first capture value and the second capture value has not reached a peak value and any one of the values is not less than the second capture threshold, the third calibration adjustment signal is generated; the third calibration adjustment signal is used to instruct the adjustment module (130) to adjust the gain value of the operational amplifier corresponding to any one of the values.
The method for adjusting the speed pulse signal according to claim 7, characterized in that, when it is determined that any one of the first captured value and the second captured value has not reached a peak value, the first adjustment signal includes a fourth calibration adjustment signal;

The method of setting a capture threshold and analyzing the capture value and gain value of each channel to generate a first adjustment signal further includes:

If the first capture value and the second capture value are both less than the second capture threshold, a fourth calibration adjustment signal is generated according to the extreme value of any of the values, and the fourth calibration adjustment signal is used to adjust the offset value of the digital signal of the channel corresponding to any of the values.
The method for adjusting the speed pulse signal according to claim 7 or 8, characterized in that, when the gear is in the running stage, the first adjustment signal includes a first running adjustment signal, the second adjustment signal includes a second running adjustment signal, and the capture threshold is a third capture threshold;

By setting a capture threshold, analyzing the capture value and the gain value of each channel to generate a first adjustment signal and a second adjustment signal, including:

Comparing the capture value of any one of the channels with the third capture threshold, determining a target number of times for any one of the channels, the target number of times being used to indicate the number of times the capture value of any one of the channels is not less than the third capture threshold;

When the capture value of any of the channels is not less than the third capture threshold value and the target number of times is greater than a preset number of times, the first operation adjustment signal and the second operation adjustment signal are generated;

The second operation adjustment signal is used to instruct the adjustment module (130) to adjust the gain value of any one of the channels.
The method for adjusting the speed pulse signal according to claim 9, characterized in that after generating the first operation adjustment signal and the second operation adjustment signal, it further comprises:

sending the second operation adjustment signal to the adjustment module (130);

receiving a new capture value of any one of the channels until the new capture value is less than the third capture threshold, and determining an offset value of any one of the channels;

A second target capture value of any one of the channels is determined according to the offset value.