JP6389161B2 - Sensor interface calibration device - Google Patents

Description

  The present invention relates to a technique for removing an offset of a sensor output signal.

  The dynamic range of the signal is one of the most important characteristics. Dynamic range characteristics affect system design and architecture selection. Since a signal having a wide dynamic range reduces the design complexity, it is strongly desired to improve the characteristics of the dynamic range. The presence of signal offset is undesirable because it reduces the achievable dynamic range. FIG. 6 shows an ideal and actual example of the output signal of the sensor. As shown in FIG. 6 (b), when there is an offset in the output signal of the sensor, the output of the A / D converter is saturated, and the dynamic range is reduced from the ideal in FIG. 6 (a).

Conventionally, as a circuit that compensates for an offset of the output signal of the sensor, correlated double sampling (correlated double sampling) that eliminates the offset by compensating the result of sampling during normal operation for detecting the signal from the transducer with the result of sampling at reset. Sampling (CDS) was used. FIG. 7 shows an example of a circuit using CDS. The output signal of the transducer, the C _R are sampled at reset state, and then is sampled by the normal operation in the C _S. These sampling results are subtracted using an output differential amplifier in order to remove the offset voltage (see Non-Patent Document 1).

  As another method, there is offset trimming shown in FIG. 8 in which the offset is removed by controlling the resistance value by variable resistance division. In the example of FIG. 8, the sensor circuit is configured by a bridge circuit having an output including offsets (OUT− and OUT +) connected to the differential input of the operational amplifier. When a variable resistor divider is used, a DC offset is added to one of the inputs of the operational amplifier in order to correct the DC offset voltage and eliminate the effect (see Non-Patent Document 2).

Gozen Koklu, Yusuf Leblebici, Sandro Carrara, “A Switched Capacitor Fully Differential Correlated Double Sampling Circuit for CMOS Image Sensors”, Medical Information & Communication Technology (ISMICT), 2011 5th International Symposium on, 27-30 March 2011, pp.113- 116 “HANDLING SENSOR BRIDGE OFFSET”, Application Note, Honeywell

  However, in a circuit using CDS, the offset is not sufficiently removed due to device mismatch in the differential configuration, and an additional calibration step is necessary.

  Also, a circuit using offset trimming requires an external mechanism that resets the sensor to calibrate the circuit. Furthermore, since this external mechanism is specialized for a transducer, it is necessary to replace the external mechanism when the transducer is replaced with another type of transducer, resulting in a problem that the system becomes complicated.

  The present invention has been made in view of the above, and an object of the present invention is to provide a sensor interface calibration device that eliminates the need for an external mechanism for resetting a sensor and simplifies the system.

  The sensor interface calibration device according to the present invention includes a transducer, a test impedance whose impedance value is known, a switch for connecting either the transducer or the test impedance to the sensor interface calibration device, the transducer or the Drive signal generation means for providing an electrical signal to the test impedance, detection means for detecting the output value of the transducer or the test impedance, and an offset removal signal for removing an offset generated from a parasitic impedance in the sensor interface calibration device Offset compensation means for providing the detection means, and during the calibration operation, the test impedance is controlled by controlling the switch. Connected to the sensor interface calibration device, the offset compensation means is determined by controlling the offset compensation means so that the output of the detection means becomes an expected value according to the value of the impedance, and during the sensing operation, Control means for controlling the switch to connect the transducer to the sensor interface calibration device.

  ADVANTAGE OF THE INVENTION According to this invention, the external mechanism which resets a sensor is unnecessary, and the sensor interface calibration apparatus which simplified the system can be provided.

It is a block diagram which shows the structure of the sensor interface calibration apparatus of a 1st Example. It is a figure which shows the waveform in each point of the sensor interface calibration apparatus of 1st Example. It is a block diagram which shows the structure of the sensor interface calibration apparatus of a 2nd Example. It is a figure which shows the waveform in each point of the sensor interface calibration apparatus of 2nd Example. It is a block diagram which shows the structure of the sensor interface calibration apparatus of a 3rd Example. It is a figure which shows the ideal and actual example of the output signal read from the sensor. It is a figure which shows the example of the conventional circuit using correlated double sampling. It is a figure which shows the example of the conventional offset trimming which removes an offset by control of resistance value by variable resistance division.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing the configuration of the sensor interface calibration apparatus of the first embodiment.

In the sensor interface calibration apparatus of FIG. 1, a test impedance Z _test having a known impedance value is connected in parallel with the transducer 21 that converts a physical quantity into an electrical signal. One terminal of the transducer 21 is connected to the drive signal generator 11 via the transistor switch 17. The other terminal of the transducer 21 is connected to the current-voltage (I / V) converter 12 via another transistor switch 17. One terminal of the test impedance Z _test is connected to the drive signal generator 11 via the transistor switch 18. The other terminal of the test impedance Z _test is connected to the I / V converter 12 via another transistor switch 18.

When the transistor switch 17 is on, the transducer 21 is connected to the circuit terminals T1 and T2, and when it is off, the transducer 21 is disconnected from the circuit. When the transistor switch 18 is on, the test impedance Z _test is connected to the circuit terminals T1 and T2, and when the transistor switch 18 is off, the test impedance Z _test is disconnected from the circuit. In the calibration process, the transducer 21 is disconnected from the circuit and the test impedance Z _test is connected to the circuit. During the sensing operation, the transducer 21 is connected to the circuit, and the test impedance Z _test is disconnected from the circuit. Any switch may be used as long as the connection between the transducer 21 and the circuit and the connection between the test impedance Z _test and the circuit can be switched.

The drive signal generator 11 gives a pulse electric signal or a constant electric signal to the transducer 21 or the test impedance Z _test .

The I / V converter 12 converts the current generated by the transducer 21 or the test impedance Z _test into a voltage. Note that when the electrical signal of the transducer 21 to be measured is a voltage, the I / V converter 12 is not necessary.

The integrator 13 integrates the output signal of the I / V converter 12 and detects the output value of the transducer 21 or the test impedance Z _test . The integrator 13 is _supplied with a bias voltage for removing the offset generated from the parasitic impedances Z _c1 and Z _c2 in the system from the D / A converter (DAC) 16. This bias voltage is determined in the calibration process. As the integrator 13, the integrator shown in FIG. 8 can be used as a conventional example.

  The A / D converter (ADC) 14 converts the output of the integrator 13 into an N-bit digital value. The output of the ADC 14 is input to the controller 15.

The controller 15 controls the transistor switches 17 and 18 by the signals φ1 and φ2, and controls the value of the DAC 16 so that the output of the ADC 14 becomes a desired value in the calibration process. Specifically, in the calibration process, the controller 15 turns off the transistor switch 17 turns on the transistor switch 18 disconnects the transducer 21 from the circuit, to connect the test impedance _{Z test} the circuit, the output of the ADC14 test impedance The output of the DAC 16 is controlled so as to coincide with an expected value corresponding to a known impedance value of Z _test . During the sensing operation, the controller 15 turns on the transistor switch 17 and turns off the transistor switch 18 to connect the transducer 21 to the circuit and disconnect the test impedance Z _test from the circuit.

  The D / A converter (DAC) 16 is controlled by the controller 15 and inputs a bias voltage corresponding to the signal given from the controller 15 to the integrator 13.

  Next, the operation of the sensor interface calibration apparatus of the first embodiment will be described.

  FIG. 2 is a diagram illustrating waveforms at each point of the sensor interface calibration apparatus according to the first embodiment. In the figure, signals φ 1 and φ 2 for controlling the transistor switches 17 and 18, S / G (Signal Generator) output from the drive signal generator 11, input and output of the I / V converter 12, and an integrator 13, respectively. Shows the output.

  The sensor interface calibration device starts a sensing operation after performing the calibration process. The calibration process is divided into two stages, calibration phases 1 and 2.

In the calibration phase 1, the signal φ1 is set to L, the transistor switch 17 is turned off, the signal φ2 is set to H, and the transistor switch 18 is turned on. Thereby, the transducer 21 is disconnected from the circuit, and the test impedance Z _test is connected to the circuit. The integrator 13 is reset to the initial state, and the integrator 13 integrates the output of the I / V converter 12 to detect a value obtained by combining the test impedance Z _test and the parasitic impedances Z _c1 and Z _c2 . When the output of the integrator 13 does not change, the calibration phase 2 is started.

In the calibration phase 2, the controller 15 adjusts the value input to the DAC 16 so that the output of the ADC 14, that is, the output of the integrator 13 matches the expected value of the test impedance Z _test , and the bias input to the integrator 13. Determine the voltage. The value of the DAC 16 when the output of the ADC 14 matches the expected value of the test impedance Z _test is a bias voltage for removing the offset generated from the parasitic impedances Z _c1 and Z _c2 .

When the calibration process is completed, signal φ1 is set to H, transistor switch 17 is turned on, signal φ2 is set to L, transistor switch 18 is turned off, transducer 21 is connected to the circuit, test impedance Z _test is disconnected from the circuit, and integration is performed. The detector 13 is reset to the initial state and the sensing operation is started.

  Next, a sensor interface calibration apparatus according to the second embodiment will be described.

FIG. 3 is a block diagram showing the configuration of the sensor interface calibration apparatus of the second embodiment. The sensor interface calibration apparatus shown in the figure is different from the sensor interface calibration apparatus of the first embodiment in that a plurality of test impedances Z _{test2 to} Z _testN are provided.

Each of the test impedances Z _{test2 to} Z _testN is connected to the circuit in parallel with the transducer 21 via the transistor switches 18-2 to 18-N. The test impedances Z _{test2 to} Z _testN have different values.

The controller 15 controls the transistor switches 18-2 to 18-N by signals φ2 to φN. In the sensor interface calibration apparatus according to the second embodiment, as shown in FIG. 4, a sensing operation is started after performing a two-stage calibration phase for each of the plurality of test impedances Z _{test2 to} Z _testN . . Specifically, while the signal φ1 for controlling the transistor switch 17 is set to L and the transducer 21 is disconnected from the circuit, the signals φ2 to φN are sequentially set to H, and the test impedances Z _{test2 to} Z _testN are sequentially set one by one. Connect to the circuit to perform the calibration process. The optimum bias voltage for removing the offset generated from the parasitic impedances Z _c1 and Z _c2 is determined using the result of the calibration process performed by the test impedances Z _{test2 to} Z _testN .

In the second embodiment, by using a plurality of test impedances Z _{test2 to} Z _testN , it is possible to provide a more accurate calibration process with respect to test impedance values, that is, process variations that affect the accuracy of the system. .

  Next, a sensor interface calibration apparatus according to a third embodiment will be described.

FIG. 5 is a block diagram showing the configuration of the sensor interface calibration apparatus of the third embodiment. The sensor interface calibration apparatus shown in the figure is similar to the configuration of the second embodiment, except that a plurality of test impedances Z _test having the same value are provided.

In the third embodiment, the effect of process variation on the value of the test impedance Z _test can be averaged by performing dynamic element matching (DEM) that improves the accuracy of offset cancellation with respect to process variation.

As described above, according to the present embodiment, the test impedance Z _test is connected to the circuit in parallel with the transducer 21, and the controller 15 controls the transistor switches 17 and 18 to perform the transducer 21 circuit in the calibration operation. from disconnecting, thereby connecting the test impedance _{Z test} the circuit, so that the output of the integrator 13 for integrating the output of the test impedance _{Z test} is the expected value corresponding to the value of the impedance of the test impedance _{Z test,} the integrator 13 The controller 16 controls the transistor switches 17 and 18 to connect the transducer 21 to the circuit and disconnect the test impedance Z _test from the circuit. As a result, a mechanism for initializing the transducer 21 from the outside is not required for sensor calibration, and the system can be simplified. Further, the present invention can be applied to any type of transducer 21, and even when the transducer 21 is replaced with another type, there is no need to change the system.

DESCRIPTION OF SYMBOLS 11 ... Drive signal generator 12 ... Current-voltage converter 13 ... Integrator 14 ... A / D converter 15 ... Controller 16 ... D / A converter 17, 18, 18-2-18-N ... Transistor switch 21 ... Transducer Z _{test, Z test2} ~ _{Z testN ...} test impedance Z _c1, Z _{c2 ...} parasitic impedances

Claims (4)

A sensor interface calibration device,
A transducer;
A test impedance with a known impedance value,
A switch connecting either the transducer or the test impedance to the sensor interface calibration device;
Drive signal generating means for providing an electrical signal to the transducer or the test impedance;
Detecting means for detecting an output value of the transducer or the test impedance;
Offset compensation means for providing the detection means with an offset removal signal for removing the offset generated from the parasitic impedance in the sensor interface calibration device;
During the calibration operation, the switch is controlled to connect the test impedance to the sensor interface calibration device, and the offset compensation unit is controlled so that the output of the detection unit becomes an expected value corresponding to the impedance value. Determining the offset removal signal, and at the time of sensing operation, control means for controlling the switch to connect the transducer to the sensor interface calibration device;
A sensor interface calibration apparatus comprising:   The sensor interface calibration apparatus according to claim 1, wherein the apparatus has a plurality of test impedances.   The sensor interface calibration apparatus according to claim 2, wherein the plurality of test impedances have the same impedance value.   In the calibration operation, the first phase waits until the output of the detection unit does not change after the test impedance is connected, and the output of the detection unit is set to an expected value corresponding to the impedance value. The sensor interface calibration apparatus according to claim 1, further comprising: a second phase for controlling the offset compensation unit.

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