WO2024105880A1 - Drive device, power converter, and drive method - Google Patents

Drive device, power converter, and drive method Download PDF

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Publication number
WO2024105880A1
WO2024105880A1 PCT/JP2022/042852 JP2022042852W WO2024105880A1 WO 2024105880 A1 WO2024105880 A1 WO 2024105880A1 JP 2022042852 W JP2022042852 W JP 2022042852W WO 2024105880 A1 WO2024105880 A1 WO 2024105880A1
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Prior art keywords
impedance
power converter
path
drive device
current value
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PCT/JP2022/042852
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French (fr)
Japanese (ja)
Inventor
健人 桑原
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東芝三菱電機産業システム株式会社
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Application filed by 東芝三菱電機産業システム株式会社 filed Critical 東芝三菱電機産業システム株式会社
Priority to JP2023535650A priority Critical patent/JP7550990B1/en
Priority to PCT/JP2022/042852 priority patent/WO2024105880A1/en
Publication of WO2024105880A1 publication Critical patent/WO2024105880A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

Definitions

  • Embodiments of the present invention relate to a drive device, a power converter, and a drive method.
  • the semiconductor switching elements of a power converter are driven by signals generated by a drive device associated with the semiconductor switching elements.
  • a drive device associated with the semiconductor switching elements.
  • the temperature fluctuation of the semiconductor switching elements during operation can sometimes become greater than the desired range.
  • the object of the present invention is to provide a drive device and a drive method that can reduce the amount of temperature fluctuation of a semiconductor switching element during operation.
  • the driving device of one embodiment includes an impedance adjustment unit.
  • the impedance adjustment unit uses the value of the current flowing through an element of the power converter to adjust the impedance of the path that sends a control signal from the driving unit of the element to the semiconductor switching element in the element.
  • FIG. 1 is a configuration diagram of a power conversion device according to an embodiment.
  • FIG. 2 is a configuration diagram of a leg including a drive device according to the embodiment.
  • FIG. 2 is a configuration diagram of an impedance adjustment unit according to an embodiment.
  • FIG. 4 is a configuration diagram of a resistor section in an impedance adjustment section according to the embodiment.
  • 5 is a diagram for explaining the relationship between the current value of the element and the loss of the element according to the embodiment.
  • FIG. 5 is a diagram for explaining the relationship between the current value of the element and the loss of the element according to the embodiment.
  • FIG. 5 is a diagram for explaining the relationship between the current value of the element and the loss of the element according to the embodiment.
  • FIG. 5 is a diagram for explaining the relationship between the current value of the element and the loss of the element according to the embodiment.
  • FIG. 6 is a diagram for explaining a data table correlating element loss with current value of the element according to the embodiment of the present invention.
  • FIG. FIG. 4 is a diagram for explaining an example of control of an electric motor according to the embodiment.
  • FIG. 6 is a diagram for explaining another example of the control of the electric motor according to the embodiment.
  • a drive device a power converter, and a drive method according to embodiments will be described with reference to the drawings.
  • the same reference numerals are used for components having the same or similar functions. Duplicate descriptions of those components may be omitted.
  • Electrical connection may simply be referred to as "connected.”
  • "based on XX” means “based on at least XX” and includes cases where it is based on other elements in addition to XX.
  • "based on XX” is not limited to cases where XX is used directly, but also includes cases where it is based on XX that has been subjected to calculations or processing.
  • XX is any element (for example, any information).
  • the gate resistance value in the embodiment refers to the impedance of a path that transmits a control signal from a drive unit of an element in a power converter to a semiconductor switching element in the element.
  • FIG. 1 is a configuration diagram of a power conversion device 1 according to an embodiment. 1 converts DC power into polyphase AC power and supplies the polyphase AC power to an electric motor 2 to drive the electric motor 2.
  • the electric motor 2 is a three-phase AC motor and is an example of an AC load.
  • the electric motor 2 is provided with a speed sensor 2A that detects and outputs a speed ⁇ r of the electric motor 2.
  • the current detector CT detects a current flowing through an AC bus connecting the main circuit 10 of the power conversion device 1 and the motor 2.
  • the currents flowing through the phase voltages of the U phase, V phase, and W phase are called phase currents Iu, Iv, and Iw.
  • a voltage detector VDET for detecting a phase voltage is provided on each of the AC buses.
  • the phase voltages of the U phase, V phase, and W phase are indicated by voltages Vu, Vv, and Vw.
  • the voltage detector VDET may be provided in the main circuit 10.
  • the power conversion device 1 includes, for example, a main circuit 10 and a control device 20 .
  • the main circuit 10 is a three-phase inverter (power converter) including legs UA, VA, and WA. When the legs UA, VA, and WA are not distinguished from each other, they are simply referred to as "each leg.”
  • the power conversion device 1 causes the main circuit 10 to function as a three-level inverter.
  • the control device 20 controls the main circuit 10 to control the power conversion by the main circuit 10.
  • the control device 20 includes, for example, a PWM conversion unit 21 and a controller 22.
  • the PWM conversion unit 21 converts the voltage reference generated by the controller 22 by pulse width modulation (PWM) using a carrier signal of a predetermined frequency to generate gate pulses GPU, GPV, and GPW.
  • PWM pulse width modulation
  • the PWM conversion unit 21 supplies the gate pulses GPU, GPV, and GPW to legs UA, VA, and WA, respectively.
  • the gate pulse GPU includes a control signal for driving each element of leg UA. The same is true for the gate pulses GPV and GPW.
  • the controller 22 generates the above voltage reference and supplies it to the PWM conversion unit 21 .
  • the controller 22 performs speed control to make the motor 2 follow the speed reference ⁇ * based on the speed ⁇ r of the motor 2 and the speed reference ⁇ * , and generates a torque reference at each time point.
  • the controller 22 performs current control based on a current command value I * based on the torque reference and the motor currents Iu, IV, and Iw, and generates a voltage reference used in PWM control. This voltage reference is supplied to the PWM conversion unit 21.
  • FIG. 2 is a configuration diagram of a leg UA including a driving device according to the embodiment.
  • a positive power supply terminal of the leg UA is supplied with a positive voltage DCP via a first DC bus, and a negative power supply terminal of the leg UA is supplied with a negative voltage DCN via a second DC bus.
  • a reference voltage terminal of the leg UA is connected to a neutral point NP.
  • An output terminal TU of the leg UA is connected to a U-phase winding of the motor 2 via an AC bus.
  • leg UA includes switch units 11 to 14.
  • Switch units 11 to 14 include, for example, elements DEV1 to DEV4, respectively.
  • Leg UA further includes diodes DP and DN.
  • Element DEV1 includes a pair of semiconductor switching element Q1 and diode D1.
  • Element DEV2 includes a pair of semiconductor switching element Q2 and diode D2.
  • Element DEV3 includes a pair of semiconductor switching element Q3 and diode D3.
  • Element DEV4 includes a pair of semiconductor switching element Q4 and diode D4.
  • the semiconductor switching elements Q1 to Q4 of leg UA are, for example, IGBTs.
  • the type of semiconductor switching elements is not limited to IGBTs and may be changed to MOSFETs, etc.
  • the semiconductor switching elements Q1 to Q4 are connected in series in the order listed.
  • a reverse-connected diode D1 is connected in parallel to the emitter and collector of the semiconductor switching element Q1.
  • Diodes D2 to D4 are similarly connected in parallel to the semiconductor switching elements Q2 to Q4.
  • semiconductor switching elements Q1 and Q2 are included in the positive arm, and semiconductor switching elements Q3 and Q4 are included in the negative arm.
  • the anode of diode DP and the cathode of diode DN are connected to the neutral terminal NP.
  • the cathode of diode DP is connected to the connection point between the emitter of semiconductor switching element Q2 and the collector of semiconductor switching element Q3.
  • the anode of diode DN is connected to the connection point between the emitter of semiconductor switching element Q3 and the collector of semiconductor switching element Q4.
  • the output terminal TU is connected to the emitter of semiconductor switching element Q2, the collector of semiconductor switching element Q3, the anode of diode D2, and the cathode of diode D3.
  • the switch section of each stage includes a gate drive circuit (GDC), an impedance adjustment section (ZADJ), and a current detection section.
  • GDC gate drive circuit
  • ZADJ impedance adjustment section
  • current detection section a current detection section.
  • the switch unit 11 includes a gate drive circuit (GDC) 111, an impedance adjustment unit (ZADJ) 112, and a current detection unit 113.
  • the switch unit 12 includes a gate drive circuit (GDC) 121, an impedance adjustment unit (ZADJ) 122, and a current detection unit 123.
  • the switch unit 13 includes a gate drive circuit (GDC) 131, an impedance adjustment unit (ZADJ) 132, and a current detection unit 133.
  • the switch unit 14 includes a gate drive circuit (GDC) 141, an impedance adjustment unit (ZADJ) 142, and a current detection unit 143.
  • the gate drive circuit (GDC) 111 receives a first signal in the gate pulse GPU and performs a predetermined signal conversion on the first signal to generate a gate signal for element DEV1.
  • the signal conversion in the gate drive circuit (GDC) 111 may be a known type.
  • the current detection unit 113 is disposed on the positive electrode side of element DEV1 and detects the current flowing through element DEV1.
  • the impedance adjustment unit (ZADJ) 112 adjusts the impedance of the path of the gate signal supplied to element DEV1 based on the magnitude of the current flowing through element DEV1.
  • the gate drive circuit (GDC) 121 receives the second signal in the gate pulse GPU and performs a predetermined signal conversion on the second signal to generate a gate signal for element DEV2.
  • the current detection unit 123 is disposed on the positive electrode side of element DEV2 and detects the current flowing through element DEV2.
  • the impedance adjustment unit (ZADJ) 122 adjusts the impedance of the path of the gate signal supplied to element DEV2 based on the magnitude of the current flowing through element DEV2.
  • the gate drive circuit (GDC) 131 receives the third signal in the gate pulse GPU and performs a predetermined signal conversion on the third signal to generate a gate signal for element DEV3.
  • the current detection unit 133 is disposed on the positive electrode side of element DEV3 and detects the current flowing through element DEV3.
  • the impedance adjustment unit (ZADJ) 132 adjusts the impedance of the path of the gate signal supplied to element DEV3 based on the magnitude of the current flowing through element DEV3.
  • the gate drive circuit (GDC) 141 receives the fourth signal in the gate pulse GPU and performs a predetermined signal conversion on the fourth signal to generate a gate signal for element DEV4.
  • the current detection unit 143 is disposed on the positive electrode side of element DEV4 and detects the current flowing through element DEV4.
  • the impedance adjustment unit (ZADJ) 142 adjusts the impedance of the path of the gate signal supplied to element DEV4 based on the magnitude of the current flowing through element DEV4.
  • FIGS. 3A and 3B are configuration diagrams of an impedance adjustment unit (ZADJ) and a resistor unit in the impedance adjustment unit (ZADJ) of the embodiment;
  • the impedance adjustment unit (ZADJ) 112 in the first stage from the top side shown in FIG. 3A includes a switching unit (ZSW) 1121 and an impedance calculation unit 1122.
  • the second stage impedance adjustment unit (ZADJ) 122 includes a switching unit (ZSW) 1221 and an impedance calculation unit 1222 .
  • the third stage impedance adjustment unit (ZADJ) 132 includes a switching unit (ZSW) 1321 and an impedance calculation unit 1322 .
  • the fourth stage impedance adjuster (ZADJ) 142 includes a switch (ZSW) 1421 and an impedance calculator 1422 .
  • the switching unit (ZSW) 1121 includes multiple resistors, resistors RG1 to RG3, and a signal switch SW.
  • resistors RG1 to RG3 have different impedances.
  • the switching unit (ZSW) 1121 selects a specified resistor from the multiple resistors using the signal switch SW.
  • the impedance calculation unit 1122 generates a switching signal for selecting the resistor.
  • the impedance calculation unit 1122 may determine the impedance of the path of the gate signal supplied to element DEV1 based on the operation pattern of the power conversion device 1 and the value of the current flowing through element DEV1 of the main circuit 10 (power converter).
  • the impedance calculation unit 1122 includes an operation pattern determination unit 11221, an element current detection unit 11222, a smoothing processing unit 11223, and a gate resistance value determination unit 11224.
  • the operation pattern determination unit 11221 obtains command values for driving the electric motor 2 and information on the operating state of the electric motor 2 to determine the current operating state.
  • the operation pattern determination unit 11221 further obtains command values for the power factor and carrier frequency of PWM control to control the electric motor 2 in a desired state.
  • the operation pattern determination unit 11221 outputs the above-mentioned power factor command value, carrier frequency command value, and also information indicating either the powering state or the regenerative state.
  • the current operation state includes the powering state, the regenerative state, the stationary state, etc. The following explanation focuses on the control of each element in the powering state and the regenerative state. Note that the stationary state may also be considered as the powering state.
  • the element current detection unit 11222 obtains information indicating the magnitude of the current flowing through element DEV1 from the current detection unit 133.
  • the smoothing processing unit 11223 smoothes the current detection result.
  • the process of smoothing the current detection result includes a filter process that suppresses components with frequencies higher than a predetermined cutoff frequency so that the control period of PWM control and carrier frequency components are not included, a moving average process, and the like.
  • the gate resistance value determination unit 11224 obtains information on the driving pattern indicating the driving state from the driving pattern determination unit 11221, obtains information on the smoothed current value from the smoothing processing unit 11223, and generates a switching signal for controlling the signal switch SW of the switching unit (ZSW) 1121.
  • the gate resistance value determination unit 11224 includes a conversion table that associates the current value flowing through element DEV1 of the main circuit 10 with the impedance of the path that sends the switching signal to element DEV.
  • the gate resistance value determination unit 11224 uses the current value of the current flowing through element DEV1 of the main circuit 10 to refer to the above conversion table and generate a selection signal for selecting a resistor.
  • the gate resistance value determination unit 11224 may classify the current value of the current flowing through element DEV1 of the main circuit 10 based on its magnitude and use it in processing that refers to the above conversion table.
  • the above is a description of the first stage impedance adjustment section (ZADJ) 112, but the same applies to the second stage impedance adjustment section (ZADJ) 122 to the fourth stage impedance adjustment section (ZADJ) 142.
  • the data registered in the conversion tables used by the first stage impedance adjustment unit (ZADJ) 112 to the fourth stage impedance adjustment unit (ZADJ) 142 may be common.
  • leg UA associated with the U phase, but the same applies to the V and W phases.
  • the main circuit 10 is formed as a three-level converter.
  • the main circuit 10 allows operation in a powering state in which the main circuit 10 converts DC power to AC power and supplies the AC power to a load, and a regenerative state in which the main circuit 10 converts AC power generated by the load into DC power and supplies the DC power to the DC side.
  • the main circuit 10 can adjust the power factor and the frequency of the carrier signal (carrier frequency) used for PWM control, for example, by commands from a higher-level device.
  • the command to switch between the powering state and the regenerative state, the power factor command, and the carrier frequency command are collectively called the operation pattern command.
  • the power factor and the carrier frequency, as well as the powering state or the regenerative state determined by the command, are collectively called the operation pattern.
  • the impedance of the path that sends the switching signal to the element DEV is determined based on the operation pattern. This will be described later. Note that the items included in this operation pattern are not limited to these, and can be reduced or added as appropriate.
  • FIGS. 4A to 4C are diagrams for explaining the relationship of element losses to current values of the elements of the embodiment.
  • FIG. 5 is a diagram for explaining a data table relating element losses to current values of the elements of the embodiment.
  • the graphs shown in Figures 4A to 4C show the relationship between the current flowing through the element (horizontal axis: element current) and the element loss (vertical axis).
  • the element is divided into, for example, three regions depending on the magnitude of the current flowing through it.
  • Ith1 to Ith3 are thresholds that divide the regions. Larger values are set in the order of Ith1, Ith2, and Ith3.
  • the three dashed lines drawn through the origin of the graph indicate the conversion rate of the element loss to the element current value when resistors Rg1 to Rg3 with different impedances are selected.
  • the impedances assigned to resistors Rg1 to Rg3 are in the ascending order. Portions of the three dashed lines are drawn in solid lines, which indicate the resistance selected in that region.
  • the data table shown in Figure 5 is used to correlate element losses to element current values based on a combination of a first variable (operating pattern) determined based on commands such as operating state, power factor, and carrier frequency, and a second variable (element current value) determined based on a detected current value.
  • This data table is an example in which 12 different operating patterns are associated with each other using the first variable.
  • a table of this size can be realized by combining an FPGA or logic circuits.
  • resistor Rg1 which makes the element loss relatively small.
  • resistor Rg3 which can make the element loss relatively large.
  • resistor Rg2 or resistor Rg1 which can reduce element loss more than resistor Rg3.
  • the carrier frequency is selected so that no mechanical resonance occurs in the motor 2 and its load.
  • FIG. 4A The operation pattern in the top row of this data table is shown in FIG. 4A
  • FIG. 4B the operation pattern in the fourth row from the top row is shown in FIG. 4B
  • FIG. 4C the operation pattern in the seventh row from the top row is shown in FIG. 4C.
  • the operating conditions common to the operating patterns of each stage are when the carrier frequency is set to 1 kHz and the operating state is power running.
  • the operating conditions different from each other in the operating patterns of each stage are different in the power factor.
  • the power factor is set to 0.9
  • the condition shown in Figure 4B the power factor is set to 0.95
  • the condition shown in Figure 4C the power factor is set to 1.
  • the losses of multiple elements do not change evenly, and there may be a bias in the changes in element losses. In such cases, the loss generated by each element can be changed by changing the operating pattern.
  • the temperature of a particular element may become excessive or the temperature fluctuation of a particular element may become large.
  • the temperature fluctuation of the elements during operation may vary. Such an event may lead to a decrease in the thermal cycle resistance of the elements.
  • FIG. 6 is a diagram for explaining an example of control of the electric motor 2 according to the embodiment.
  • the magnitudes of the speed reference, the actual speed, the torque reference, and the motor current are shown.
  • the electric motor 2 is stopped.
  • the control device 20 starts the operation of the electric motor 2.
  • the control device 20 sets the speed reference, which is the required speed, to +100%, and commands the motor 2 to accelerate in the positive direction at the highest speed.
  • the torque reference which indicates the required torque for the electric motor 2
  • the amplitude of the motor current gradually increases.
  • the operating state during this time is power running. Accordingly, the actual speed of the electric motor 2 gradually increases.
  • the actual speed of the motor 2 approaches the required speed, causing the torque reference to gradually decrease.
  • the amplitude of the motor current gradually decreases.
  • the control device 20 passes a current sufficient to maintain the speed of the motor 2.
  • the control device 20 sets the speed reference to -100% and commands the motor 2 to rotate in the negative direction at the fastest speed in the shortest time possible.
  • the torque reference indicating the required torque for the motor 2 has exceeded the negative limit value (Limit).
  • the amplitude of the motor current increases once to the maximum allowable amplitude. This current acts to decelerate the motor 2.
  • This deceleration control causes the actual speed of the motor 2 to decelerate in the shortest possible time, and the speed of the motor 2 becomes zero. However, because the control of the control device 20 continues, the actual speed of the motor 2 immediately accelerates in the negative direction at the fastest possible speed in the shortest possible time due to acceleration control in the reverse direction.
  • the actual speed of the motor 2 approaches the required speed, causing the torque reference to gradually decrease.
  • the amplitude of the motor current gradually decreases.
  • the control device 20 passes a current sufficient to maintain the speed of the motor 2.
  • the control device 20 sets the speed reference to 0% to command the motor 2 to stop, and commands the motor 2 to reach a stop in the shortest time possible. Accordingly, the AC power supplied from the motor 2 is regenerated through the power converter. In this case, the torque reference indicating the required torque for the motor 2 has exceeded the positive limit value (Limit). As a result of current control being performed in accordance with the torque reference of the negative limit value, the amplitude of the motor current increases once to the maximum allowable amplitude. This current acts to decelerate the motor 2.
  • the control device 20 stops supplying current to the motor 2.
  • the above control range includes several characteristic control operation patterns.
  • FIG. 7 is a diagram for explaining another example of the control of the electric motor 2 according to the embodiment.
  • the magnitudes of the speed reference, actual speed, motor voltage, and torque reference are shown. Since the actual speed is almost the same as the speed reference, the waveforms overlap with little difference.
  • the motor voltage shown here indicates the amplitude of AC. Therefore, regardless of the direction of rotation of the electric motor 2, the amplitude of the motor voltage is large when the motor is rotating fast. Note that the peak of the motor voltage is outside this measurement range.
  • the magnitude of the speed reference is controlled to change within a range of a specified rate of change.
  • the torque reference becomes a positive or negative value accordingly.
  • the switch unit 11 (drive device) of the embodiment includes an impedance adjustment unit 112.
  • the impedance adjustment unit 112 uses the value of the current flowing through the element DEV1 of the main circuit 10 (power converter) to adjust the impedance (gate resistance value) of the path that sends a control signal from the gate drive circuit 111 (drive unit) of the element DEV1 to the semiconductor switching element Q1 in the element DEV1. This suppresses changes in loss in the semiconductor switching element Q1 during operation, thereby reducing the amount of temperature fluctuation of the semiconductor switching element Q1.
  • the power conversion device 1 is used for various purposes, and may be applied to an application in which the operation pattern changes frequently, as shown in FIG.
  • the driving device of the embodiment can reduce the amount of fluctuation in temperature of the semiconductor switching element Q1, and is therefore applicable to a variety of applications.
  • the power conversion device 1 of the embodiment is an example of a three-level converter.
  • the losses in the outer and inner elements based on the midpoint potential may vary greatly. Therefore, by individually setting the gate resistance value of each element, the variation in losses during operation in the semiconductor switching elements of the three-level converter can be suppressed, thereby reducing the amount of temperature fluctuation in the semiconductor switching elements.
  • the outer elements mentioned above are, for example, elements DEV1 and DEV4, and the inner elements mentioned above are, for example, elements DEV2 and DEV3.
  • the drive device includes an impedance adjustment unit.
  • the impedance adjustment unit uses the value of the current flowing through an element of the power converter to adjust the impedance of the path that sends a control signal from the drive unit of the element to the semiconductor switching element in the element. This makes it possible to reduce the amount of temperature fluctuation of the semiconductor switching element during operation.
  • One aspect of the above embodiment is a drive device including an impedance adjustment unit that adjusts the impedance of a path that transmits a control signal from a drive unit of an element of a power converter to a semiconductor switching element within the element, using a current value flowing through the element.
  • the impedance adjustment unit described in [1] above may include a plurality of resistors, and may include a switching unit that selects a specified resistor from the plurality of resistors, and an impedance calculation unit that generates a switching signal for selecting the resistor.
  • the impedance calculation unit according to the above [2] may include a conversion table that associates a current value flowing through an element of the power converter with the impedance of the path.
  • the impedance calculation unit according to the above [3] may refer to the conversion table using a current value flowing through an element of the power converter to generate a selection signal for selecting the resistor.
  • the impedance calculation unit according to the above [2] to [4] may determine the impedance of the path based on an operation pattern of the power converter and a current value flowing through an element of the power converter.
  • the impedance calculation unit described in [2] to [5] above may smooth a current value flowing through an element of the power converter and use the smoothed current value to determine the impedance of the path.
  • the operation pattern of the power converter described in [5] above may be divided into a powering state and a regenerative state.
  • the operation pattern of the power converter according to the above [5] or [6] may be classified according to the magnitude of the power factor.
  • the operation patterns of the power converter described in [5] to [7] above may be classified according to the height of a carrier frequency.
  • the conversion table described in [3] or [4] above may be configured to select, for each operation pattern of the power converter, an impedance of the path such that the loss of the element falls within a desired range.
  • the operation pattern of the power converter described in [5] to [10] above may be determined from a combination of a first condition classified according to a powering state and a regenerative state, a second condition classified according to a power factor, and a third condition classified according to a carrier frequency.
  • 1...power conversion device 2...Electric motor, 10...Main circuit, 11...Switch unit (drive device), 111...gate drive circuit (GDC, drive unit), 112...Impedance adjustment unit (ZADJ), 113...current detection unit, 1121...switching unit (ZSW), 1122...Impedance calculation unit, 11221...operation pattern determination unit, 11222: element current detection unit, 11223...smoothing processing unit, 11224...Gate resistance value determination unit.

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  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

A drive device according to a first aspect of an embodiment comprises an impedance adjusting unit. The impedance adjusting unit uses a current value flowing through elements of a power converter and adjusts the impedance of a path for sending a control signal from a drive unit of the elements to a semiconductor switching element among the elements.

Description

駆動装置、電力変換器及び駆動方法Driving device, power converter, and driving method
　本発明の実施形態は、駆動装置、電力変換器及び駆動方法に関する。 Embodiments of the present invention relate to a drive device, a power converter, and a drive method.
　電力変換器の半導体スイッチング素子は、その半導体スイッチング素子に対応付けられた駆動装置が生成する信号によって駆動される。電力変換器において、その運転パターンが変わったときなどに、運転中の半導体スイッチング素子の温度の変動量が所望の範囲よりも大きくなることがあった。しかしながら運転中の半導体スイッチング素子の温度の変化を検出することは容易なことではなかった。 The semiconductor switching elements of a power converter are driven by signals generated by a drive device associated with the semiconductor switching elements. In a power converter, when the operating pattern changes, the temperature fluctuation of the semiconductor switching elements during operation can sometimes become greater than the desired range. However, it is not easy to detect changes in the temperature of a semiconductor switching element during operation.
特開２００４－２７４９１１公報JP 2004-274911 A
　本発明の目的は、運転中の半導体スイッチング素子の温度の変動量を低減できる駆動装置及び駆動方法を提供することである。 The object of the present invention is to provide a drive device and a drive method that can reduce the amount of temperature fluctuation of a semiconductor switching element during operation.
　実施形態の一態様の駆動装置は、インピーダンス調整部を備える。前記インピーダンス調整部は、電力変換器の素子に流れる電流値を用いて、前記素子の駆動部から前記素子内の半導体スイッチング素子に制御信号を送る経路のインピーダンスを調整する。 The driving device of one embodiment includes an impedance adjustment unit. The impedance adjustment unit uses the value of the current flowing through an element of the power converter to adjust the impedance of the path that sends a control signal from the driving unit of the element to the semiconductor switching element in the element.
実施形態の電力変換装置の構成図。FIG. 1 is a configuration diagram of a power conversion device according to an embodiment. 実施形態の駆動装置を含むレグの構成図。FIG. 2 is a configuration diagram of a leg including a drive device according to the embodiment. 実施形態のインピーダンス調整部の構成図である。FIG. 2 is a configuration diagram of an impedance adjustment unit according to an embodiment. 実施形態のインピーダンス調整部内の抵抗部の構成図。FIG. 4 is a configuration diagram of a resistor section in an impedance adjustment section according to the embodiment. 実施形態の素子の電流値に対する素子の損失の関係を説明するための図。5 is a diagram for explaining the relationship between the current value of the element and the loss of the element according to the embodiment. FIG. 実施形態の素子の電流値に対する素子の損失の関係を説明するための図。5 is a diagram for explaining the relationship between the current value of the element and the loss of the element according to the embodiment. FIG. 実施形態の素子の電流値に対する素子の損失の関係を説明するための図。5 is a diagram for explaining the relationship between the current value of the element and the loss of the element according to the embodiment. FIG. 実施形態の実施形態の素子の電流値に対する素子の損失の関係付けるデータテーブルを説明するための図。6 is a diagram for explaining a data table correlating element loss with current value of the element according to the embodiment of the present invention; FIG. 実施形態の電動機の制御の一例を説明するための図。FIG. 4 is a diagram for explaining an example of control of an electric motor according to the embodiment. 実施形態の電動機の制御の他の一例を説明するための図。FIG. 6 is a diagram for explaining another example of the control of the electric motor according to the embodiment.
　以下、実施形態の駆動装置、電力変換器及び駆動方法を、図面を参照して説明する。
　なお、以下の説明では、同一又は類似の機能を有する構成に同一の符号を付す。そして、それらの構成の重複する説明は省略する場合がある。なお、電気的に接続されることを、単に「接続される」ということがある。なお、本明細書で言う「ＸＸに基づく」とは、「少なくともＸＸに基づく」ことを意味し、ＸＸに加えて別の要素に基づく場合も含む。さらに、「ＸＸに基づく」とは、ＸＸを直接に用いる場合に限定されず、ＸＸに対して演算や加工が行われたものに基づく場合も含む。「ＸＸ」は、任意の要素（例えば、任意の情報）である。
　実施形態のゲート抵抗値とは、電力変換器内の素子の駆動部から、その素子内の半導体スイッチング素子に制御信号を送る経路のインピーダンスのことである。 Hereinafter, a drive device, a power converter, and a drive method according to embodiments will be described with reference to the drawings.
In the following description, the same reference numerals are used for components having the same or similar functions. Duplicate descriptions of those components may be omitted. Electrical connection may simply be referred to as "connected." In this specification, "based on XX" means "based on at least XX" and includes cases where it is based on other elements in addition to XX. Furthermore, "based on XX" is not limited to cases where XX is used directly, but also includes cases where it is based on XX that has been subjected to calculations or processing. "XX" is any element (for example, any information).
The gate resistance value in the embodiment refers to the impedance of a path that transmits a control signal from a drive unit of an element in a power converter to a semiconductor switching element in the element.
（第１の実施形態）
　図１は、実施形態の電力変換装置１の構成図である。
　図１に示す電力変換装置１は、直流電力を多相交流電力に変換して、その多相交流電力を電動機２に供給して電動機２を駆動する。例えば、電動機２は、３相交流電動機であり、交流負荷の一例である。例えば、電動機２には速度センサ２Ａが設けられていて、電動機２の速度ωｒを検出して出力する。
　電流検出器ＣＴは、電力変換装置１の主回路１０と電動機２とを繋ぐ交流バスに流れる電流を検出する。Ｕ相、Ｖ相、Ｗ相の各相電圧に流れる電流を相電流Ｉｕ、Ｉｖ、Ｉｗと呼ぶ。３相のうちの２相の電流を検出して、残りの１相の電流値を、変換式を用いて推定してもよい。
　上記の交流バスのそれぞれに、相電圧を検出する電圧検出器ＶＤＥＴがそれぞれ設けられている。Ｕ相、Ｖ相、Ｗ相の各相電圧を、電圧Ｖｕ、Ｖｖ、Ｖｗで示す。なお、電圧検出器ＶＤＥＴは、主回路１０内に設けられていてもよい。 First Embodiment
FIG. 1 is a configuration diagram of a power conversion device 1 according to an embodiment.
1 converts DC power into polyphase AC power and supplies the polyphase AC power to an electric motor 2 to drive the electric motor 2. For example, the electric motor 2 is a three-phase AC motor and is an example of an AC load. For example, the electric motor 2 is provided with a speed sensor 2A that detects and outputs a speed ωr of the electric motor 2.
The current detector CT detects a current flowing through an AC bus connecting the main circuit 10 of the power conversion device 1 and the motor 2. The currents flowing through the phase voltages of the U phase, V phase, and W phase are called phase currents Iu, Iv, and Iw. The currents of two of the three phases may be detected, and the current value of the remaining phase may be estimated using a conversion equation.
A voltage detector VDET for detecting a phase voltage is provided on each of the AC buses. The phase voltages of the U phase, V phase, and W phase are indicated by voltages Vu, Vv, and Vw. The voltage detector VDET may be provided in the main circuit 10.
　電力変換装置１は、例えば、主回路１０と、制御装置２０とを備える。
　主回路１０は、レグＵＡ、ＶＡ、ＷＡを備える３相インバータ（電力変換器）である。レグＵＡ、ＶＡ、ＷＡを区別しない場合には、単に「各レグ」という。電力変換装置１は、主回路１０を３レベル型のインバータとして機能させる。 The power conversion device 1 includes, for example, a main circuit 10 and a control device 20 .
The main circuit 10 is a three-phase inverter (power converter) including legs UA, VA, and WA. When the legs UA, VA, and WA are not distinguished from each other, they are simply referred to as "each leg." The power conversion device 1 causes the main circuit 10 to function as a three-level inverter.
　制御装置２０は、主回路１０を制御することにより、主回路１０による電力変換を制御する。制御装置２０は、例えば、ＰＷＭ変換部２１と、コントローラ２２とを備える。 The control device 20 controls the main circuit 10 to control the power conversion by the main circuit 10. The control device 20 includes, for example, a PWM conversion unit 21 and a controller 22.
　ＰＷＭ変換部２１は、コントローラ２２によって生成される電圧基準を、所定の周波数のキャリア信号を用いてパルス幅変調（ＰＷＭ）することにより変換して、ゲートパルスＧＰＵ、ＧＰＶ、ＧＰＷを生成する。ＰＷＭ変換部２１は、ゲートパルスＧＰＵ、ＧＰＶ、ＧＰＷを、それぞれレグＵＡ、ＶＡ、ＷＡに供給する。例えば、ゲートパルスＧＰＵは、レグＵＡの各素子を駆動するための制御信号を含む。ゲートパルスＧＰＶ、ＧＰＷについても同様である。 The PWM conversion unit 21 converts the voltage reference generated by the controller 22 by pulse width modulation (PWM) using a carrier signal of a predetermined frequency to generate gate pulses GPU, GPV, and GPW. The PWM conversion unit 21 supplies the gate pulses GPU, GPV, and GPW to legs UA, VA, and WA, respectively. For example, the gate pulse GPU includes a control signal for driving each element of leg UA. The same is true for the gate pulses GPV and GPW.
　コントローラ２２は、上記の電圧基準を生成してＰＷＭ変換部２１に供給する。
　例えば、コントローラ２２は、電動機２の速度ωｒと、速度基準ω＊とに基づいて速度基準ω＊に追従させる速度制御を実施して、夫々の時点のトルク基準を生成する。コントローラ２２は、トルク基準に基づいた電流指令値Ｉ＊と、モータ電流Ｉｕ，ＩＶ，Ｉｗとに基づいた電流制御を実施して、ＰＷＭ制御に用いる電圧基準を生成する。この電圧基準がＰＷＭ変換部２１に供給される。 The controller 22 generates the above voltage reference and supplies it to the PWM conversion unit 21 .
For example, the controller 22 performs speed control to make the motor 2 follow the speed reference ω * based on the speed ωr of the motor 2 and the speed reference ω * , and generates a torque reference at each time point. The controller 22 performs current control based on a current command value I * based on the torque reference and the motor currents Iu, IV, and Iw, and generates a voltage reference used in PWM control. This voltage reference is supplied to the PWM conversion unit 21.
　図２を参照して、主回路１０の各レグを代表してレグＵＡについて説明する。
　図２は、実施形態の駆動装置を含むレグＵＡの構成図である。
　レグＵＡの正極電源端子には、第１直流バスを介して正極側の電圧ＤＣＰが供給され、レグＵＡの負極電源端子には、第２直流バスを介して負極側の電圧ＤＣＮが供給される。レグＵＡの基準電圧端子が、中性点ＮＰに接続されている。レグＵＡの出力端子ＴＵは、交流バスを介して電動機２のＵ相の巻線に接続されている。 With reference to FIG. 2, the leg UA will be described as a representative of the legs of the main circuit 10.
FIG. 2 is a configuration diagram of a leg UA including a driving device according to the embodiment.
A positive power supply terminal of the leg UA is supplied with a positive voltage DCP via a first DC bus, and a negative power supply terminal of the leg UA is supplied with a negative voltage DCN via a second DC bus. A reference voltage terminal of the leg UA is connected to a neutral point NP. An output terminal TU of the leg UA is connected to a U-phase winding of the motor 2 via an AC bus.
　図２に示すように、レグＵＡは、スイッチ部１１から１４を備える。スイッチ部１１から１４は、例えば、素子ＤＥＶ１からＤＥＶ４をそれぞれ備える。さらにレグＵＡは、ダイオードＤＰとＤＮとを備える。 As shown in FIG. 2, leg UA includes switch units 11 to 14. Switch units 11 to 14 include, for example, elements DEV1 to DEV4, respectively. Leg UA further includes diodes DP and DN.
　素子ＤＥＶ１は、半導体スイッチング素子Ｑ１とダイオードＤ１の組を備える。素子ＤＥＶ２は、半導体スイッチング素子Ｑ２とダイオードＤ２の組を備える。素子ＤＥＶ３は、半導体スイッチング素子Ｑ３とダイオードＤ３の組を備える。素子ＤＥＶ４は、半導体スイッチング素子Ｑ４とダイオードＤ４の組を備える。 Element DEV1 includes a pair of semiconductor switching element Q1 and diode D1. Element DEV2 includes a pair of semiconductor switching element Q2 and diode D2. Element DEV3 includes a pair of semiconductor switching element Q3 and diode D3. Element DEV4 includes a pair of semiconductor switching element Q4 and diode D4.
　レグＵＡの半導体スイッチング素子Ｑ１からＱ４は、例えばＩＧＢＴである。半導体スイッチング素子の種別は、ＩＧＢＴに制限されることなく、ＭＯＳＦＥＴなどに変更してもよい。半導体スイッチング素子Ｑ１からＱ４は記載の順に直列に接続さている。半導体スイッチング素子Ｑ１のエミッタとコレクタには、逆接続されたダイオードＤ１が並列に接続されている。半導体スイッチング素子Ｑ２からＱ４についても、ダイオードＤ２からＤ４が同様に並列に接続されている。半導体スイッチング素子Ｑ１からＱ４のうち、半導体スイッチング素子Ｑ１とＱ２は、正極側アームに含まれ、半導体スイッチング素子Ｑ３とＱ４は、負極側アームに含まれる。 The semiconductor switching elements Q1 to Q4 of leg UA are, for example, IGBTs. The type of semiconductor switching elements is not limited to IGBTs and may be changed to MOSFETs, etc. The semiconductor switching elements Q1 to Q4 are connected in series in the order listed. A reverse-connected diode D1 is connected in parallel to the emitter and collector of the semiconductor switching element Q1. Diodes D2 to D4 are similarly connected in parallel to the semiconductor switching elements Q2 to Q4. Of the semiconductor switching elements Q1 to Q4, semiconductor switching elements Q1 and Q2 are included in the positive arm, and semiconductor switching elements Q3 and Q4 are included in the negative arm.
　中性点端子ＮＰには、ダイオードＤＰのアノードと、ダイオードＤＮのカソードとが接続されている。ダイオードＤＰのカソードは、半導体スイッチング素子Ｑ２のエミッタと半導体スイッチング素子Ｑ３のコレクタの接続点に接続される。ダイオードＤＮのアノードは、半導体スイッチング素子Ｑ３のエミッタと半導体スイッチング素子Ｑ４のコレクタの接続点に接続される。 The anode of diode DP and the cathode of diode DN are connected to the neutral terminal NP. The cathode of diode DP is connected to the connection point between the emitter of semiconductor switching element Q2 and the collector of semiconductor switching element Q3. The anode of diode DN is connected to the connection point between the emitter of semiconductor switching element Q3 and the collector of semiconductor switching element Q4.
　出力端子ＴＵには、半導体スイッチング素子Ｑ２のエミッタと、半導体スイッチング素子Ｑ３のコレクタと、ダイオードＤ２のアノードと、ダイオードＤ３のカソードとが接続されている。 The output terminal TU is connected to the emitter of semiconductor switching element Q2, the collector of semiconductor switching element Q3, the anode of diode D2, and the cathode of diode D3.
　各段のスイッチ部は、ゲートドライブ回路（ＧＤＣ）と、インピーダンス調整部（ＺＡＤＪ）と、電流検出部とをそれぞれ含む。 The switch section of each stage includes a gate drive circuit (GDC), an impedance adjustment section (ZADJ), and a current detection section.
　例えば、スイッチ部１１は、ゲートドライブ回路（ＧＤＣ）１１１と、インピーダンス調整部（ＺＡＤＪ）１１２と、電流検出部１１３とをそれぞれ含む。スイッチ部１２は、ゲートドライブ回路（ＧＤＣ）１２１と、インピーダンス調整部（ＺＡＤＪ）１２２と、電流検出部１２３とをそれぞれ含む。スイッチ部１３は、ゲートドライブ回路（ＧＤＣ）１３１と、インピーダンス調整部（ＺＡＤＪ）１３２と、電流検出部１３３とをそれぞれ含む。スイッチ部１４は、ゲートドライブ回路（ＧＤＣ）１４１と、インピーダンス調整部（ＺＡＤＪ）１４２と、電流検出部１４３とをそれぞれ含む。 For example, the switch unit 11 includes a gate drive circuit (GDC) 111, an impedance adjustment unit (ZADJ) 112, and a current detection unit 113. The switch unit 12 includes a gate drive circuit (GDC) 121, an impedance adjustment unit (ZADJ) 122, and a current detection unit 123. The switch unit 13 includes a gate drive circuit (GDC) 131, an impedance adjustment unit (ZADJ) 132, and a current detection unit 133. The switch unit 14 includes a gate drive circuit (GDC) 141, an impedance adjustment unit (ZADJ) 142, and a current detection unit 143.
　ゲートドライブ回路（ＧＤＣ）１１１は、ゲートパルスＧＰＵの中の第１信号を受け、その第１信号に対し所定の信号変換を実施して、素子ＤＥＶ１用のゲート信号を生成する。ゲートドライブ回路（ＧＤＣ）１１１における信号変換は、既知のものであって良い。電流検出部１１３は、素子ＤＥＶ１の正極側に配置され、素子ＤＥＶ１に流れる電流を検出する。インピーダンス調整部（ＺＡＤＪ）１１２は、素子ＤＥＶ１に流れる電流の大きさに基づいて、素子ＤＥＶ１に供給されるゲート信号の経路のインピーダンスを調整する。 The gate drive circuit (GDC) 111 receives a first signal in the gate pulse GPU and performs a predetermined signal conversion on the first signal to generate a gate signal for element DEV1. The signal conversion in the gate drive circuit (GDC) 111 may be a known type. The current detection unit 113 is disposed on the positive electrode side of element DEV1 and detects the current flowing through element DEV1. The impedance adjustment unit (ZADJ) 112 adjusts the impedance of the path of the gate signal supplied to element DEV1 based on the magnitude of the current flowing through element DEV1.
　ゲートドライブ回路（ＧＤＣ）１２１は、ゲートパルスＧＰＵの中の第２信号を受け、その第２信号に対し所定の信号変換を実施して、素子ＤＥＶ２用のゲート信号を生成する。電流検出部１２３は、素子ＤＥＶ２の正極側に配置され、素子ＤＥＶ２に流れる電流を検出する。インピーダンス調整部（ＺＡＤＪ）１２２は、素子ＤＥＶ２に流れる電流の大きさに基づいて、素子ＤＥＶ２に供給されるゲート信号の経路のインピーダンスを調整する。 The gate drive circuit (GDC) 121 receives the second signal in the gate pulse GPU and performs a predetermined signal conversion on the second signal to generate a gate signal for element DEV2. The current detection unit 123 is disposed on the positive electrode side of element DEV2 and detects the current flowing through element DEV2. The impedance adjustment unit (ZADJ) 122 adjusts the impedance of the path of the gate signal supplied to element DEV2 based on the magnitude of the current flowing through element DEV2.
　ゲートドライブ回路（ＧＤＣ）１３１は、ゲートパルスＧＰＵの中の第３信号を受け、その第３信号に対し所定の信号変換を実施して、素子ＤＥＶ３用のゲート信号を生成する。電流検出部１３３は、素子ＤＥＶ３の正極側に配置され、素子ＤＥＶ３に流れる電流を検出する。インピーダンス調整部（ＺＡＤＪ）１３２は、素子ＤＥＶ３に流れる電流の大きさに基づいて、素子ＤＥＶ３に供給されるゲート信号の経路のインピーダンスを調整する。 The gate drive circuit (GDC) 131 receives the third signal in the gate pulse GPU and performs a predetermined signal conversion on the third signal to generate a gate signal for element DEV3. The current detection unit 133 is disposed on the positive electrode side of element DEV3 and detects the current flowing through element DEV3. The impedance adjustment unit (ZADJ) 132 adjusts the impedance of the path of the gate signal supplied to element DEV3 based on the magnitude of the current flowing through element DEV3.
　ゲートドライブ回路（ＧＤＣ）１４１は、ゲートパルスＧＰＵの中の第４信号を受け、その第４信号に対し所定の信号変換を実施して、素子ＤＥＶ４用のゲート信号を生成する。電流検出部１４３は、素子ＤＥＶ４の正極側に配置され、素子ＤＥＶ４に流れる電流を検出する。インピーダンス調整部（ＺＡＤＪ）１４２は、素子ＤＥＶ４に流れる電流の大きさに基づいて、素子ＤＥＶ４に供給されるゲート信号の経路のインピーダンスを調整する。 The gate drive circuit (GDC) 141 receives the fourth signal in the gate pulse GPU and performs a predetermined signal conversion on the fourth signal to generate a gate signal for element DEV4. The current detection unit 143 is disposed on the positive electrode side of element DEV4 and detects the current flowing through element DEV4. The impedance adjustment unit (ZADJ) 142 adjusts the impedance of the path of the gate signal supplied to element DEV4 based on the magnitude of the current flowing through element DEV4.
　図３Ａと図３Ｂとを参照して、各段のインピーダンス調整部（ＺＡＤＪ）について説明する。
　図３Ａは、実施形態のインピーダンス調整部（ＺＡＤＪ）の構成図である。図３Ｂは、実施形態のインピーダンス調整部（ＺＡＤＪ）内の抵抗部の構成図である。 The impedance adjustment unit (ZADJ) of each stage will be described with reference to FIGS. 3A and 3B.
3A and 3B are configuration diagrams of an impedance adjustment unit (ZADJ) and a resistor unit in the impedance adjustment unit (ZADJ) of the embodiment;
　図３Ａに示す上段側から第１段目のインピーダンス調整部（ＺＡＤＪ）１１２は、切替部（ＺＳＷ）１１２１と、インピーダンス算出部１１２２とを備える。
　第２段目のインピーダンス調整部（ＺＡＤＪ）１２２は、切替部（ＺＳＷ）１２２１と、インピーダンス算出部１２２２とを備える。
　第３段目のインピーダンス調整部（ＺＡＤＪ）１３２は、切替部（ＺＳＷ）１３２１と、インピーダンス算出部１３２２とを備える。
　第４段目のインピーダンス調整部（ＺＡＤＪ）１４２は、切替部（ＺＳＷ）１４２１と、インピーダンス算出部１４２２とを備える。 The impedance adjustment unit (ZADJ) 112 in the first stage from the top side shown in FIG. 3A includes a switching unit (ZSW) 1121 and an impedance calculation unit 1122.
The second stage impedance adjustment unit (ZADJ) 122 includes a switching unit (ZSW) 1221 and an impedance calculation unit 1222 .
The third stage impedance adjustment unit (ZADJ) 132 includes a switching unit (ZSW) 1321 and an impedance calculation unit 1322 .
The fourth stage impedance adjuster (ZADJ) 142 includes a switch (ZSW) 1421 and an impedance calculator 1422 .
　例えば、切替部（ＺＳＷ）１１２１は、図３Ｂに示すように、抵抗ＲＧ１から抵抗ＲＧ３の複数の抵抗と、信号スイッチＳＷを含む。例えば、抵抗ＲＧ１から抵抗ＲＧ３は、互いに異なるインピーダンスを有する。切替部（ＺＳＷ）１１２１は、信号スイッチＳＷによって、その複数の抵抗の中から指定された抵抗を選択する。 For example, as shown in FIG. 3B, the switching unit (ZSW) 1121 includes multiple resistors, resistors RG1 to RG3, and a signal switch SW. For example, resistors RG1 to RG3 have different impedances. The switching unit (ZSW) 1121 selects a specified resistor from the multiple resistors using the signal switch SW.
　インピーダンス算出部１１２２は、その抵抗を選択するための切替信号を生成する。
インピーダンス算出部１１２２は、電力変換装置１の運転パターンと主回路１０（電力変換器）の素子ＤＥＶ１に流れる電流値とに基づいて、素子ＤＥＶ１に供給されるゲート信号の経路のインピーダンスを決定するとよい。 The impedance calculation unit 1122 generates a switching signal for selecting the resistor.
The impedance calculation unit 1122 may determine the impedance of the path of the gate signal supplied to element DEV1 based on the operation pattern of the power conversion device 1 and the value of the current flowing through element DEV1 of the main circuit 10 (power converter).
　例えば、インピーダンス算出部１１２２は、運転パターン決定部１１２２１と、素子電流検出部１１２２２と、平滑化処理部１１２２３と、ゲート抵抗値決定部１１２２４とを備える。 For example, the impedance calculation unit 1122 includes an operation pattern determination unit 11221, an element current detection unit 11222, a smoothing processing unit 11223, and a gate resistance value determination unit 11224.
　運転パターン決定部１１２２１は、電動機２を駆動するための指令値と、電動機２の稼働状態に関する情報を取得して、現時点の運転状態を決定する。運転パターン決定部１１２２１は、さらに、電動機２を所望の状態で制御するための力率、ＰＷＭ制御のキャリア周波数の指令値を取得する。 The operation pattern determination unit 11221 obtains command values for driving the electric motor 2 and information on the operating state of the electric motor 2 to determine the current operating state. The operation pattern determination unit 11221 further obtains command values for the power factor and carrier frequency of PWM control to control the electric motor 2 in a desired state.
　運転パターン決定部１１２２１は、上記の力率の指令値と、キャリア周波数の指令値と、さらに、力行状態と回生状態の何れかの状態を示す情報とを出力する。現時点の運転状態には、力行状態、回生状態、静止状態などが含まれる。以下の説明では、力行状態と回生状態における各素子の制御を中心に説明する。なお、静止状態を力行状態とみなしてもよい。 The operation pattern determination unit 11221 outputs the above-mentioned power factor command value, carrier frequency command value, and also information indicating either the powering state or the regenerative state. The current operation state includes the powering state, the regenerative state, the stationary state, etc. The following explanation focuses on the control of each element in the powering state and the regenerative state. Note that the stationary state may also be considered as the powering state.
　素子電流検出部１１２２２は、素子ＤＥＶ１に流れる電流の大きさを示す情報を、電流検出部１３３から取得する。平滑化処理部１１２２３は、その電流の検出結果を平滑化する。例えば、電流の検出結果を平滑化処理には、ＰＷＭ制御の制御周期、キャリア周波数の成分が含まれないように、所定のカットオフ周波数よりも周波数が高い成分を抑圧するフィルタ処理、移動平均処理などが含まれる。 The element current detection unit 11222 obtains information indicating the magnitude of the current flowing through element DEV1 from the current detection unit 133. The smoothing processing unit 11223 smoothes the current detection result. For example, the process of smoothing the current detection result includes a filter process that suppresses components with frequencies higher than a predetermined cutoff frequency so that the control period of PWM control and carrier frequency components are not included, a moving average process, and the like.
　ゲート抵抗値決定部１１２２４は、運転パターン決定部１１２２１から運転状態を示す運転パターンの情報を取得して、平滑化処理部１１２２３から平滑化された電流値の情報を取得して、切替部（ＺＳＷ）１１２１の信号スイッチＳＷを制御するための切替信号を生成する。 The gate resistance value determination unit 11224 obtains information on the driving pattern indicating the driving state from the driving pattern determination unit 11221, obtains information on the smoothed current value from the smoothing processing unit 11223, and generates a switching signal for controlling the signal switch SW of the switching unit (ZSW) 1121.
　例えば、ゲート抵抗値決定部１１２２４（インピーダンス算出部）は、主回路１０の素子ＤＥＶ１に流れる電流値と、上記切替信号を素子ＤＥＶに送る経路のインピーダンスとを関連付ける変換テーブルを含む。 For example, the gate resistance value determination unit 11224 (impedance calculation unit) includes a conversion table that associates the current value flowing through element DEV1 of the main circuit 10 with the impedance of the path that sends the switching signal to element DEV.
　ゲート抵抗値決定部１１２２４（インピーダンス算出部）は、主回路１０の素子ＤＥＶ１に流れる電流の電流値を用いて、上記の変換テーブルを参照して、抵抗を選択するための選択信号を生成する。ゲート抵抗値決定部１１２２４（インピーダンス算出部）は、主回路１０の素子ＤＥＶ１に流れる電流の電流値を、その大きさに基づいてクラス分けして、上記の変換テーブルを参照する処理に用いるとよい。 The gate resistance value determination unit 11224 (impedance calculation unit) uses the current value of the current flowing through element DEV1 of the main circuit 10 to refer to the above conversion table and generate a selection signal for selecting a resistor. The gate resistance value determination unit 11224 (impedance calculation unit) may classify the current value of the current flowing through element DEV1 of the main circuit 10 based on its magnitude and use it in processing that refers to the above conversion table.
　上記は、第１段目のインピーダンス調整部（ＺＡＤＪ）１１２についての説明であるが、第２段目のインピーダンス調整部（ＺＡＤＪ）１２２から第４段目のインピーダンス調整部（ＺＡＤＪ）１４２についても同様である。
　なお、第１段目のインピーダンス調整部（ＺＡＤＪ）１１２から第４段目のインピーダンス調整部（ＺＡＤＪ）１４２が夫々用いる変換テーブルに登録される各データを、共通にしてよい。 The above is a description of the first stage impedance adjustment section (ZADJ) 112, but the same applies to the second stage impedance adjustment section (ZADJ) 122 to the fourth stage impedance adjustment section (ZADJ) 142.
The data registered in the conversion tables used by the first stage impedance adjustment unit (ZADJ) 112 to the fourth stage impedance adjustment unit (ZADJ) 142 may be common.
　上記はＵ相に対応付けられたレグＵＡに関する説明であるが、Ｖ相、Ｗ相についても同様である。 The above is an explanation of leg UA associated with the U phase, but the same applies to the V and W phases.
　上記のとおり主回路１０は、３レベル変換器として形成されている。主回路１０は、直流電力を交流電力に変換して、負荷に交流電力を供給する力行状態と、負荷が生成した交流電力を直流電力に変換して、直流側に直流電力を供給する回生状態との運転を許容する。
　主回路１０は、例えば上位装置からの指令などにより、力率の調整と、ＰＷＭ制御に利用するキャリア信号の周波数（キャリア周波数）の調整を可能とする。力行状態と回生状態との切替指令と、力率の指令と、キャリア周波数の指令とを纏めて運転パターンの指令と呼ぶ。指令により定まる力行状態と回生状態との何れかと、力率と、キャリア周波数とを纏めて運転パターンという。 As described above, the main circuit 10 is formed as a three-level converter. The main circuit 10 allows operation in a powering state in which the main circuit 10 converts DC power to AC power and supplies the AC power to a load, and a regenerative state in which the main circuit 10 converts AC power generated by the load into DC power and supplies the DC power to the DC side.
The main circuit 10 can adjust the power factor and the frequency of the carrier signal (carrier frequency) used for PWM control, for example, by commands from a higher-level device. The command to switch between the powering state and the regenerative state, the power factor command, and the carrier frequency command are collectively called the operation pattern command. The power factor and the carrier frequency, as well as the powering state or the regenerative state determined by the command, are collectively called the operation pattern.
　運転パターンに基づいて、切替信号を素子ＤＥＶに送る経路のインピーダンスが決定される。これについては後述する。なお、この運転パターンに含まれる項目は、これに制限されず、適宜削減と追加を許容する。 The impedance of the path that sends the switching signal to the element DEV is determined based on the operation pattern. This will be described later. Note that the items included in this operation pattern are not limited to these, and can be reduced or added as appropriate.
　図４Ａから図４Ｃは、実施形態の素子の電流値に対する素子の損失の関係を説明するための図である。図５は、実施形態の実施形態の素子の電流値に対する素子の損失の関係付けるデータテーブルを説明するための図である。 FIGS. 4A to 4C are diagrams for explaining the relationship of element losses to current values of the elements of the embodiment. FIG. 5 is a diagram for explaining a data table relating element losses to current values of the elements of the embodiment.
　図４Ａから図４Ｃに示すグラフは、素子に流れる電流（横軸：素子電流）と、素子の損失（縦軸）の関係を示す。素子に流れる電流の大きさによって、例えば３つの領域に区分される。Ith1からIth3は、領域を区分する閾値である。Ith1、Ith2、Ith3の順に、より大きな値が設定されている。 The graphs shown in Figures 4A to 4C show the relationship between the current flowing through the element (horizontal axis: element current) and the element loss (vertical axis). The element is divided into, for example, three regions depending on the magnitude of the current flowing through it. Ith1 to Ith3 are thresholds that divide the regions. Larger values are set in the order of Ith1, Ith2, and Ith3.
　グラフの原点を通るように描かれた３つの破線は、インピーダンスが互いに異なる抵抗Rg1からRg3がそれぞれ選択された場合の、素子の電流値に対する素子の損失の変換率を示す。抵抗Rg1からRg3の順により大きな値のインピーダンスが割り付けられている。
　この３つの破線の一部が実線で描かれている。この実線の部分が、その領域で選択された抵抗を示す。 The three dashed lines drawn through the origin of the graph indicate the conversion rate of the element loss to the element current value when resistors Rg1 to Rg3 with different impedances are selected. The impedances assigned to resistors Rg1 to Rg3 are in the ascending order.
Portions of the three dashed lines are drawn in solid lines, which indicate the resistance selected in that region.
　図５に示すデータテーブルは、運転状態、力率、キャリア周波数などの指令に基づき決定される第１変数（運転パターン）と、検出された電流値に基づいて決定され第２変数（素子の電流値）との組み合わせから、素子の電流値に対する素子の損失の関係付ける処理に利用される。 The data table shown in Figure 5 is used to correlate element losses to element current values based on a combination of a first variable (operating pattern) determined based on commands such as operating state, power factor, and carrier frequency, and a second variable (element current value) determined based on a detected current value.
　このデータテーブルは、第１変数を用いて１２個に区分した運転パターンを対応付けた一例である。この程度の規模のテーブルであれば、ＦＰＧＡ又は論理回路の組み合わせにより実現可能である。 This data table is an example in which 12 different operating patterns are associated with each other using the first variable. A table of this size can be realized by combining an FPGA or logic circuits.
　例えば、力行運転中に力率を１にする場合、素子の損失を比較的小さくする抵抗Rg1を利用するとよい。これとは逆に、力行運転中に力率を下げる場合、素子の損失を比較的大きくできる抵抗Rg3を利用するとよい。ただし、素子の電流値が大きくなると、素子の損失が過大になることがある。このような素子の損失が過大になることを防ぐには、抵抗Rg3よりも素子の損失を低減可能な抵抗Rg2又は抵抗Rg1を適宜利用するとよい。 For example, if you want to make the power factor 1 during power running, it is a good idea to use resistor Rg1, which makes the element loss relatively small. Conversely, if you want to lower the power factor during power running, it is a good idea to use resistor Rg3, which can make the element loss relatively large. However, if the element current value becomes large, the element loss may become excessive. To prevent such element loss from becoming excessive, it is a good idea to appropriately use resistor Rg2 or resistor Rg1, which can reduce element loss more than resistor Rg3.
　なお、キャリア周波数は、電動機２及びその負荷に機械的な共振が生じないように選択される。幾つかのキャリア周波数を、運転パターンとして選択可能にすることで、上記のような機械的な共振の発生を抑制できる。 The carrier frequency is selected so that no mechanical resonance occurs in the motor 2 and its load. By making it possible to select from several carrier frequencies as operation patterns, the occurrence of mechanical resonance as described above can be suppressed.
　このデータテーブルに示す設定例の幾つかを、図４Ａから図４Ｃに示す。
　このデータテーブルの最上段の運転パターンの場合を図４Ａに示し、最上段から４段目の運転パターンの場合を図４Ｂに示し、最上段から７段目の運転パターンの場合を図４Ｃに示す。
　各段の運転パターンに共通する運転条件は、キャリア周波数を1kHzにして力行運転状態にしたときのものである。これに対し、各段の運転パターンに互いに異なる運転条件は、力率が異なる。図４Ａに示す条件では、力率が0.9に設定されていて、図４Ｂに示す条件では、力率が0.95に設定されていて、図４Ｃに示す条件では、力率が１に設定されている。 Some example settings shown in this data table are shown in Figures 4A to 4C.
The operation pattern in the top row of this data table is shown in FIG. 4A, the operation pattern in the fourth row from the top row is shown in FIG. 4B, and the operation pattern in the seventh row from the top row is shown in FIG. 4C.
The operating conditions common to the operating patterns of each stage are when the carrier frequency is set to 1 kHz and the operating state is power running. In contrast, the operating conditions different from each other in the operating patterns of each stage are different in the power factor. In the condition shown in Figure 4A, the power factor is set to 0.9, in the condition shown in Figure 4B, the power factor is set to 0.95, and in the condition shown in Figure 4C, the power factor is set to 1.
　なお、運転状態、力率、キャリア周波数をそれぞれ区分した個数及び値を、このデータテーブルに示したものに制限することはなく、適宜変更してよい。 Note that the number and values of the operating state, power factor, and carrier frequency are not limited to those shown in this data table and may be changed as appropriate.
　運転状況により複数の素子の損失が均等に変化するのではなく、素子の損失の変化に偏りが生じることがある。このような事象に対して、運転パターンを変えることで、各素子で発生する損失を変更できる。 Depending on the operating conditions, the losses of multiple elements do not change evenly, and there may be a bias in the changes in element losses. In such cases, the loss generated by each element can be changed by changing the operating pattern.
　なお、ゲート抵抗値を固定値にした構成の比較例の場合には、特定の素子の温度が過大になったり、特定の素子の温度変動が大きくなったりすることがあった。また、発生する素子の損失の分布が異なる状況で各素子を一律に制御していると、その運転中の素子の温度変動がばらつくことがあった。このような事象は、素子のサーマルサイクル耐量の低下を招くことになる。
　本実施形態では、ゲート抵抗値をリアルタイムで運転パターンと各素子の電流値を元に算出したゲート抵抗値に切り替えて運転することが可能であり、素子温度の変動を抑制することができる。 In the comparative example with a fixed gate resistance, the temperature of a particular element may become excessive or the temperature fluctuation of a particular element may become large. In addition, if each element is uniformly controlled in a situation where the distribution of losses generated by the elements is different, the temperature fluctuation of the elements during operation may vary. Such an event may lead to a decrease in the thermal cycle resistance of the elements.
In this embodiment, it is possible to switch the gate resistance value in real time to a gate resistance value calculated based on the operation pattern and the current value of each element, thereby suppressing fluctuations in element temperature.
　図６は、実施形態の電動機２の制御の一例を説明するための図である。
　図６に示すタイミングチャートには、上段側から速度基準、実速度、トルク基準、及びモータ電流のそれぞれの大きさが示されている。 FIG. 6 is a diagram for explaining an example of control of the electric motor 2 according to the embodiment.
In the timing chart shown in FIG. 6, from the top, the magnitudes of the speed reference, the actual speed, the torque reference, and the motor current are shown.
　この図６に示す範囲における初期段階は、電動機２を停止させている状態にある。
　時刻ｔ１に、制御装置２０は、電動機２の運転を開始する。例えば、制御装置２０は、要求速度である速度基準を＋１００％にして、正の方向に最速で加速することを指令する。その結果、電動機２に対する要求トルクを示すトルク基準が正の限界値（Ｌｉｍｉｔ）に制限される値まで振り切れている。正の限界値のトルク基準応じて、電流制御が行われた結果、モータ電流の振幅が徐々に大きくなる。この間の運転状態は力行である。これに伴い電動機２の実速度が徐々に増加する。 In the initial stage in the range shown in FIG. 6, the electric motor 2 is stopped.
At time t1, the control device 20 starts the operation of the electric motor 2. For example, the control device 20 sets the speed reference, which is the required speed, to +100%, and commands the motor 2 to accelerate in the positive direction at the highest speed. As a result, the torque reference, which indicates the required torque for the electric motor 2, swings out to a value limited to the positive limit value (Limit). As a result of current control being performed in accordance with the torque reference of the positive limit value, the amplitude of the motor current gradually increases. The operating state during this time is power running. Accordingly, the actual speed of the electric motor 2 gradually increases.
　時刻ｔ２になると、電動機２の実速度が要求速度に近づくことにより、トルク基準が徐々に小さくなる。これに伴って、モータ電流の振幅が徐々に小さくなる。制御装置２０は、電動機２の速度を維持するだけの電流を流す。 At time t2, the actual speed of the motor 2 approaches the required speed, causing the torque reference to gradually decrease. As a result, the amplitude of the motor current gradually decreases. The control device 20 passes a current sufficient to maintain the speed of the motor 2.
　極端な制御であるが、時刻ｔ３に、制御装置２０は、速度基準を－１００％にして電動機２の反転を指令して、負の方向に最速で回転するまで最短時間で到達させることを指令する。
　この場合に、電動機２に対する要求トルクを示すトルク基準が負の限界値（Ｌｉｍｉｔ）に制限される値まで振り切れている。負の限界値のトルク基準応じて、電流制御が行われた結果、モータ電流の振幅が許容される最大値の振幅まで一旦大きくなる。この電流は、電動機２を減速させるように作用する。 Although this is an extreme control, at time t3, the control device 20 sets the speed reference to -100% and commands the motor 2 to rotate in the negative direction at the fastest speed in the shortest time possible.
In this case, the torque reference indicating the required torque for the motor 2 has exceeded the negative limit value (Limit). As a result of current control being performed in accordance with the torque reference of the negative limit value, the amplitude of the motor current increases once to the maximum allowable amplitude. This current acts to decelerate the motor 2.
　この減速制御により電動機２の実速度が最短時間で減速し、電動機２の速度が０になる。ただし、制御装置２０の制御が継続しているため、すぐに反転方向の加速制御により電動機２の実速度が最短時間で負の方向に最速で加速する。 This deceleration control causes the actual speed of the motor 2 to decelerate in the shortest possible time, and the speed of the motor 2 becomes zero. However, because the control of the control device 20 continues, the actual speed of the motor 2 immediately accelerates in the negative direction at the fastest possible speed in the shortest possible time due to acceleration control in the reverse direction.
　時刻ｔ４になると、電動機２の実速度が要求速度に近づくことにより、トルク基準が徐々に小さくなる。これに伴って、モータ電流の振幅が徐々に小さくなる。制御装置２０は、電動機２の速度を維持するだけの電流を流す。 At time t4, the actual speed of the motor 2 approaches the required speed, causing the torque reference to gradually decrease. As a result, the amplitude of the motor current gradually decreases. The control device 20 passes a current sufficient to maintain the speed of the motor 2.
　時刻ｔ５に、制御装置２０は、速度基準を０％にして電動機２の停止を指令して、電動機２が停止するまで最短時間で到達させることを指令する。これに伴い、電動機２から供給される交流電力が、電力変換器を通して回生される。
　この場合に、電動機２に対する要求トルクを示すトルク基準が正の限界値（Ｌｉｍｉｔ）に制限される値まで振り切れている。負の限界値のトルク基準応じて、電流制御が行われた結果、モータ電流の振幅が許容される最大値の振幅まで一旦大きくなる。この電流は、電動機２を減速させるように作用する。 At time t5, the control device 20 sets the speed reference to 0% to command the motor 2 to stop, and commands the motor 2 to reach a stop in the shortest time possible. Accordingly, the AC power supplied from the motor 2 is regenerated through the power converter.
In this case, the torque reference indicating the required torque for the motor 2 has exceeded the positive limit value (Limit). As a result of current control being performed in accordance with the torque reference of the negative limit value, the amplitude of the motor current increases once to the maximum allowable amplitude. This current acts to decelerate the motor 2.
　時刻ｔ６になると、電動機２の実速度が要求速度である０に近づくことにより、トルク基準が徐々に小さくなる。これに伴って、モータ電流の振幅が徐々に小さくなる。こののち制御装置２０は、電動機２への通電を中断する。 At time t6, the actual speed of the motor 2 approaches the required speed of 0, so that the torque reference gradually decreases. As a result, the amplitude of the motor current gradually decreases. After this, the control device 20 stops supplying current to the motor 2.
　上記の制御範囲には、幾つかの特徴的な制御の運転パターンが含まれている。 The above control range includes several characteristic control operation patterns.
　図７は、実施形態の電動機２の制御の他の一例を説明するための図である。
　図７に示すタイミングチャートには、上段側から速度基準、実速度、モータ電圧、及びトルク基準のそれぞれの大きさが示されている。実速度が速度基準にほぼ一致しているため、それぞれの波形に差が少なく重なった状況になっている。ここで示すモータ電圧は、交流の振幅を示している。そのため、電動機２の回転方向によらず、速く回転している場合のモータ電圧の振幅が大きくなっている。なお、モータ電圧のピークがこの測定範囲外になっている。 FIG. 7 is a diagram for explaining another example of the control of the electric motor 2 according to the embodiment.
In the timing chart shown in Fig. 7, from the top, the magnitudes of the speed reference, actual speed, motor voltage, and torque reference are shown. Since the actual speed is almost the same as the speed reference, the waveforms overlap with little difference. The motor voltage shown here indicates the amplitude of AC. Therefore, regardless of the direction of rotation of the electric motor 2, the amplitude of the motor voltage is large when the motor is rotating fast. Note that the peak of the motor voltage is outside this measurement range.
　この事例は、速度基準の大きさを、所定の変化率の範囲内で変更するように制御した事例である。この場合も前述の図６と同様に、速度基準の大きさを変更した場合に、これに伴ってトルク基準が正の値になったり、負の値になったりする。 In this example, the magnitude of the speed reference is controlled to change within a range of a specified rate of change. In this case, as in Figure 6 above, when the magnitude of the speed reference is changed, the torque reference becomes a positive or negative value accordingly.
　上記の図６と図７に示したように、電動機２の運転中に制御状態が変更された場合に、電力変換器の各レグに流れる電流と、各レグから出力される交流電圧の振幅が変化する。これに伴い、レグを構成する素子に流れる電流の大きさに比較的大きな変化が生じることになる。 As shown in Figures 6 and 7 above, when the control state is changed while the motor 2 is operating, the current flowing through each leg of the power converter and the amplitude of the AC voltage output from each leg change. As a result, a relatively large change occurs in the magnitude of the current flowing through the elements that make up the legs.
　上記のように、実施形態のスイッチ部１１（駆動装置）は、インピーダンス調整部１１２を備える。インピーダンス調整部１１２は、主回路１０（電力変換器）の素子ＤＥＶ１に流れる電流値を用いて、素子ＤＥＶ１のゲートドライブ回路１１１（駆動部）から素子ＤＥＶ１内の半導体スイッチング素子Ｑ１に制御信号を送る経路のインピーダンス（ゲート抵抗値）を調整する。これにより、運転中の半導体スイッチング素子Ｑ１における損失の変化を抑制することで、半導体スイッチング素子Ｑ１の温度の変動量を低減できる。 As described above, the switch unit 11 (drive device) of the embodiment includes an impedance adjustment unit 112. The impedance adjustment unit 112 uses the value of the current flowing through the element DEV1 of the main circuit 10 (power converter) to adjust the impedance (gate resistance value) of the path that sends a control signal from the gate drive circuit 111 (drive unit) of the element DEV1 to the semiconductor switching element Q1 in the element DEV1. This suppresses changes in loss in the semiconductor switching element Q1 during operation, thereby reducing the amount of temperature fluctuation of the semiconductor switching element Q1.
　なお、実際の電力変換装置１は、さまざまな用途で利用される。そのため、例えば、図７のように運転パターンが頻繁に変化するアプリケーションに適用されることもある。
　実施形態の駆動装置は、半導体スイッチング素子Ｑ１の温度の変動量を低減できることから、さまざまな用途のアプリケーションに適用可能である。 In practice, the power conversion device 1 is used for various purposes, and may be applied to an application in which the operation pattern changes frequently, as shown in FIG.
The driving device of the embodiment can reduce the amount of fluctuation in temperature of the semiconductor switching element Q1, and is therefore applicable to a variety of applications.
　なお、実施形態の電力変換装置１は、３レベル変換器の一例である。このような３レベル変換器では、中点電位を基準にした外側と内側の素子において、その損失が大きくばらつくことがある。そのため、各素子のゲート抵抗値を素子ごとに個別に設定することにより、３レベル変換器の半導体スイッチング素子における運転中の損失のばらつきを抑制することで、半導体スイッチング素子の温度の変動量を低減できる。なお、上記の外側の素子とは、例えば素子ＤＥＶ１とＤＥＶ４のことであり、上記の内側の素子とは、例えば素子ＤＥＶ２とＤＥＶ３のことである。 The power conversion device 1 of the embodiment is an example of a three-level converter. In such a three-level converter, the losses in the outer and inner elements based on the midpoint potential may vary greatly. Therefore, by individually setting the gate resistance value of each element, the variation in losses during operation in the semiconductor switching elements of the three-level converter can be suppressed, thereby reducing the amount of temperature fluctuation in the semiconductor switching elements. The outer elements mentioned above are, for example, elements DEV1 and DEV4, and the inner elements mentioned above are, for example, elements DEV2 and DEV3.
　以上に説明した少なくとも一つの実施形態によれば、駆動装置は、インピーダンス調整部を備える。インピーダンス調整部は、電力変換器の素子に流れる電流値を用いて、素子の駆動部から前記素子内の半導体スイッチング素子に制御信号を送る経路のインピーダンスを調整する。これにより、運転中の半導体スイッチング素子の温度の変動量を低減できる。 According to at least one of the embodiments described above, the drive device includes an impedance adjustment unit. The impedance adjustment unit uses the value of the current flowing through an element of the power converter to adjust the impedance of the path that sends a control signal from the drive unit of the element to the semiconductor switching element in the element. This makes it possible to reduce the amount of temperature fluctuation of the semiconductor switching element during operation.
　本発明のいくつかの実施形態を説明したが、これらの実施形態は、例として提示したものであり、発明の範囲を限定することは意図していない。これら実施形態は、その他のさまざまな形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことができる。これら実施形態やその変形は、発明の範囲や要旨に含まれると同様に、特許請求の範囲に記載された発明とその均等の範囲に含まれるものである。 Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the gist of the invention. These embodiments and their modifications are within the scope of the invention and its equivalents as set forth in the claims, as well as the scope and gist of the invention.
（付記）
［１］上記実施形態の一態様は、電力変換器の素子に流れる電流値を用いて、前記素子の駆動部から前記素子内の半導体スイッチング素子に制御信号を送る経路のインピーダンスを調整するインピーダンス調整部を備える駆動装置である。
［２］上記［１］に記載の前記インピーダンス調整部は、複数の抵抗を含み、前記複数の抵抗の中から指定された抵抗を選択する切替部と、前記抵抗を選択するための切替信号を生成するインピーダンス算出部とを備えるものであってよい。
［３］上記［２］に記載の前記インピーダンス算出部は、前記電力変換器の素子に流れる電流値と、前記経路のインピーダンスとを関連付ける変換テーブルを備えるとよい。
［４］上記［３］に記載の前記インピーダンス算出部は、前記電力変換器の素子に流れる電流値を用いて前記変換テーブルを参照して、前記抵抗を選択するための選択信号を生成するとよい。
［５］上記［２］から［４］に記載の前記インピーダンス算出部は、前記電力変換器の運転パターンと前記電力変換器の素子に流れる電流値とに基づいて、前記経路のインピーダンスを決定するとよい。
［６］上記［２］から［５］に記載の前記インピーダンス算出部は、前記電力変換器の素子に流れる電流値を平滑化して、平滑化したのちの電流値を、前記経路のインピーダンスの決定に用いるとよい。
［７］上記［５］に記載の前記電力変換器の運転パターンは、力行状態と回生状態とによって区分されているとよい。
［８］上記［５］又は［６］に記載の前記電力変換器の運転パターンは、力率の大きさによって区分されているとよい。
［９］上記［５］から［７］に記載の前記電力変換器の運転パターンは、キャリア周波数の高さによって区分されているとよい。
［１０］上記［３］又は［４］に記載の前記変換テーブルは、前記電力変換器の運転パターンごとに、前記素子の損失が所望の範囲に収まるような前記経路のインピーダンスを選択するように構成されているとよい。
［１１］上記［５］から［１０］に記載の前記電力変換器の運転パターンは、力行状態と回生状態とによって区分される第１条件と、力率の大きさによって区分される第２条件と、キャリア周波数の高さによって区分される第３条件との組み合わせから決定されるとよい。 (Additional Note)
[1] One aspect of the above embodiment is a drive device including an impedance adjustment unit that adjusts the impedance of a path that transmits a control signal from a drive unit of an element of a power converter to a semiconductor switching element within the element, using a current value flowing through the element.
[2] The impedance adjustment unit described in [1] above may include a plurality of resistors, and may include a switching unit that selects a specified resistor from the plurality of resistors, and an impedance calculation unit that generates a switching signal for selecting the resistor.
[3] The impedance calculation unit according to the above [2] may include a conversion table that associates a current value flowing through an element of the power converter with the impedance of the path.
[4] The impedance calculation unit according to the above [3] may refer to the conversion table using a current value flowing through an element of the power converter to generate a selection signal for selecting the resistor.
[5] The impedance calculation unit according to the above [2] to [4] may determine the impedance of the path based on an operation pattern of the power converter and a current value flowing through an element of the power converter.
[6] The impedance calculation unit described in [2] to [5] above may smooth a current value flowing through an element of the power converter and use the smoothed current value to determine the impedance of the path.
[7] The operation pattern of the power converter described in [5] above may be divided into a powering state and a regenerative state.
[8] The operation pattern of the power converter according to the above [5] or [6] may be classified according to the magnitude of the power factor.
[9] The operation patterns of the power converter described in [5] to [7] above may be classified according to the height of a carrier frequency.
[10] The conversion table described in [3] or [4] above may be configured to select, for each operation pattern of the power converter, an impedance of the path such that the loss of the element falls within a desired range.
[11] The operation pattern of the power converter described in [5] to [10] above may be determined from a combination of a first condition classified according to a powering state and a regenerative state, a second condition classified according to a power factor, and a third condition classified according to a carrier frequency.
１…電力変換装置、
２…電動機、
１０…主回路、
１１…スイッチ部（駆動装置）、
１１１…ゲートドライブ回路（ＧＤＣ、駆動部）、
１１２…インピーダンス調整部（ＺＡＤＪ）、
１１３…電流検出部、
１１２１…切替部（ＺＳＷ）、
１１２２…インピーダンス算出部、
１１２２１…運転パターン決定部、
１１２２２…素子電流検出部、
１１２２３…平滑化処理部、
１１２２４…ゲート抵抗値決定部。 1...power conversion device,
2...Electric motor,
10...Main circuit,
11...Switch unit (drive device),
111...gate drive circuit (GDC, drive unit),
112...Impedance adjustment unit (ZADJ),
113...current detection unit,
1121...switching unit (ZSW),
1122...Impedance calculation unit,
11221...operation pattern determination unit,
11222: element current detection unit,
11223...smoothing processing unit,
11224...Gate resistance value determination unit.

Claims (18)

  1. 　電力変換器の素子に流れる電流値を用いて、前記素子の駆動部から前記素子内の半導体スイッチング素子に制御信号を送る経路のインピーダンスを調整するインピーダンス調整部
    　を備える駆動装置。     A drive device comprising: an impedance adjustment unit that adjusts the impedance of a path that transmits a control signal from a drive unit of an element of a power converter to a semiconductor switching element in the element, using a current value flowing through the element.
  2. 　前記インピーダンス調整部は、
    　複数の抵抗を含み、前記複数の抵抗の中から指定された抵抗を選択する切替部と、
    　前記抵抗を選択するための切替信号を生成するインピーダンス算出部と
    　を備える請求項１に記載の駆動装置。     The impedance adjustment unit is
    A switching unit including a plurality of resistors and selecting a specified resistor from the plurality of resistors;
    The drive device according to claim 1 , further comprising: an impedance calculation unit that generates a switching signal for selecting the resistor.
  3. 　前記インピーダンス算出部は、
    　前記電力変換器の素子に流れる電流値と、前記経路のインピーダンスとを関連付ける変換テーブル
    　を備える請求項２に記載の駆動装置。     The impedance calculation unit
    The drive device according to claim 2 , further comprising a conversion table that associates a current value flowing through an element of the power converter with an impedance of the path.
  4. 　前記インピーダンス算出部は、
    　前記電力変換器の素子に流れる電流値を用いて前記変換テーブルを参照して、前記抵抗を選択するための選択信号を生成する、
    　請求項３に記載の駆動装置。     The impedance calculation unit
    generating a selection signal for selecting the resistor by referring to the conversion table using a current value flowing through an element of the power converter;
    The drive device according to claim 3.
  5. 　前記インピーダンス算出部は、
    　前記電力変換器の運転パターンと前記電力変換器の素子に流れる電流値とに基づいて、前記経路のインピーダンスを決定する、
    　請求項２に記載の駆動装置。     The impedance calculation unit
    determining an impedance of the path based on an operation pattern of the power converter and a value of a current flowing through an element of the power converter;
    The drive device according to claim 2.
  6. 　前記インピーダンス算出部は、
    　前記電力変換器の素子に流れる電流値を平滑化して、平滑化したのちの電流値を、前記経路のインピーダンスの決定に用いる、
    　請求項２に記載の駆動装置。     The impedance calculation unit
    a current value flowing through an element of the power converter is smoothed, and the smoothed current value is used to determine the impedance of the path.
    The drive device according to claim 2.
  7. 　前記電力変換器の運転パターンは、力行状態と回生状態とによって区分されている
    　請求項５に記載の駆動装置。     The drive device according to claim 5 , wherein an operation pattern of the power converter is divided into a power generation state and a regeneration state.
  8. 　前記電力変換器の運転パターンは、力率の大きさによって区分されている
    　請求項５に記載の駆動装置。     The drive device according to claim 5 , wherein the operation patterns of the power converter are classified according to the magnitude of a power factor.
  9. 　前記電力変換器の運転パターンは、キャリア周波数の高さによって区分されている
    　請求項５に記載の駆動装置。     The drive device according to claim 5 , wherein the operation patterns of the power converter are classified according to the height of a carrier frequency.
  10. 　前記変換テーブルは、前記電力変換器の運転パターンごとに、前記素子の損失が所望の範囲に収まるような前記経路のインピーダンスを選択するように構成されている
    　請求項３に記載の駆動装置。     The drive device according to claim 3 , wherein the conversion table is configured to select an impedance of the path such that a loss in the element falls within a desired range for each operation pattern of the power converter.
  11. 　前記電力変換器の運転パターンは、力行状態と回生状態とによって区分される第１条件と、力率の大きさによって区分される第２条件と、キャリア周波数の高さによって区分される第３条件との組み合わせから決定される
    　請求項５に記載の駆動装置。     6. The drive device according to claim 5, wherein the operation pattern of the power converter is determined by a combination of a first condition classified according to a powering state and a regenerative state, a second condition classified according to a magnitude of a power factor, and a third condition classified according to a height of a carrier frequency.
  12. 　スイッチングすることにより電力を変換する複数の素子と、
    　前記複数の素子の各素子に流れる電流値を用いて、前記素子の駆動部から前記素子内の半導体スイッチング素子に制御信号を送る経路のインピーダンスを調整するインピーダンス算出部と、
    　を備える電力変換器。     A plurality of elements that convert power by switching;
    an impedance calculation unit that adjusts the impedance of a path that transmits a control signal from a drive unit of the element to a semiconductor switching element in the element, using a value of a current flowing through each element of the plurality of elements;
    A power converter comprising:
  13. 　電力変換器の素子に流れる電流値を用いて、前記素子の駆動部から前記素子内の半導体スイッチング素子に制御信号を送る経路のインピーダンスを調整する過程
    　を含む駆動方法。     A driving method comprising: a step of adjusting, using a current value flowing through an element of a power converter, an impedance of a path that transmits a control signal from a drive unit of the element to a semiconductor switching element in the element.
  14. 　複数の抵抗の中から指定された抵抗を選択するための切替信号を生成する過程
    　を含む請求項１３に記載の駆動方法。     The driving method according to claim 13, further comprising the step of: generating a switching signal for selecting a designated resistor from among the plurality of resistors.
  15. 　前記電力変換器の素子に流れる電流値と、前記経路のインピーダンスとを関連付ける過程
    　を含む請求項１４に記載の駆動方法。     The driving method according to claim 14 , further comprising the step of: correlating a value of a current flowing through an element of the power converter with an impedance of the path.
  16. 　前記電力変換器の素子に流れる電流値と、前記経路のインピーダンスとを関連付ける変換テーブルを、前記電力変換器の素子に流れる電流値を用いて参照して、前記抵抗を選択するための選択信号を生成する過程、
    　を含む請求項１５に記載の駆動方法。     a step of referring to a conversion table that associates a current value flowing through an element of the power converter with an impedance of the path, by using the current value flowing through the element of the power converter, to generate a selection signal for selecting the resistor;
    The driving method according to claim 15 , comprising:
  17. 　前記電力変換器の運転パターンと前記電力変換器の素子に流れる電流値とに基づいて、前記経路のインピーダンスを決定する過程、
    　を含む請求項１５に記載の駆動方法。     determining an impedance of the path based on an operation pattern of the power converter and a current value flowing through an element of the power converter;
    The driving method according to claim 15 , comprising:
  18. 　前記電力変換器の素子に流れる電流値を平滑化して、平滑化したのちの電流値を、前記経路のインピーダンスの決定に用いる過程、
    　を含む請求項１４に記載の駆動方法。     smoothing a current value flowing through an element of the power converter and using the smoothed current value to determine the impedance of the path;
    The driving method according to claim 14 , comprising:
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