JP2009229133A - Integrated circuit, semiconductor device, and electric apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent deviations of timing for performing overcurrent protection. <P>SOLUTION: An integrated circuit is provided with a plurality of detecting resistors for detecting a plurality of currents flowing through a circuit to be protected as a plurality of voltages, a reference voltage generating circuit for generating a plurality of reference voltages, a plurality of terminals capable of connecting to a plurality of adjusting resistors for individually adjusting the plurality of reference voltages, an overcurrent detection circuit for comparing the plurality of voltages each with the plurality of reference voltages and detecting whether one voltage or more among the plurality of voltages has exceeded one corresponding reference voltage or more among the plurality of reference voltages, and a control circuit for performing control so as to protect the circuit to be protected on the basis of results of detection of the overcurrent detection circuit when the results of detection indicate that one voltage or more among the plurality of voltages has exceeded one corresponding reference voltage or more among the plurality of reference voltages. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an integrated circuit, a semiconductor device, and an electric device.

 When a semiconductor device operates, it generates heat due to internal loss, and as a result, there are cases in which drive capability is deteriorated, various characteristics are deteriorated, and in the worst case, destruction occurs. As described above, heat generation is a factor that causes a decrease in performance, safety, and reliability of the semiconductor device. Therefore, it is necessary to release the heat to the outside and operate the semiconductor device within the allowable operating temperature range. Therefore, a mounting technique called an insulating metal substrate technique has been proposed (for example, see Patent Document 1 shown below).

  Insulating metal substrate technology mounts circuit components such as semiconductor devices on a metal substrate with high thermal conductivity (for example, an aluminum plate) whose surface is coated with insulating resin, etc., so that the heat generated by the circuit components can be reduced. This is a mounting technology that dissipates heat. A conductive pattern is formed on the surface of the metal substrate, and circuit components necessary for realizing a desired function are electrically connected in accordance with the conductive pattern. That is, a circuit module (semiconductor device) that realizes a desired function by mounting circuit components on a metal substrate with high density can be realized by the insulated metal substrate technology.

  Insulated metal substrate technology has features such as high heat dissipation and high-density mounting as described above, and efficiently dissipates the heat concentrated by mounting circuit components at high density on the metal substrate via the metal substrate. be able to. For this reason, insulated metal substrate technology is used as a mounting technology for power electronics devices that handle large currents and large powers, such as inverter circuits used in electrical devices such as air conditioners (air conditioners), washing machines, and refrigerators. Is preferred.

  In inverter circuits, power semiconductor devices such as power MOSFETs (Metal-Oxide-Semiconductor-Field-Effect-Transistors) and IGBTs (Insulated-Gate-Bipolar-Transistors) are used as switching elements for driving inverter loads of three-phase motors. Is generally used. A power semiconductor device has excellent features such as a high breakdown voltage, a large current, and a high-speed switching as compared with a normal semiconductor device such as a bipolar transistor, but has a drawback that an allowable short-circuit time is short.

  For this reason, when an abnormality such as a three-phase motor lock occurs, the power semiconductor device may be destroyed in a very short time. Therefore, when the current flowing through the power semiconductor device becomes an overcurrent exceeding a predetermined current, it is necessary to appropriately provide an overcurrent protection function for stopping the operation of the inverter circuit. When overcurrent detection is performed using the overcurrent protection function, for example, a shunt resistor is used as the overcurrent detection resistor.

  For example, as shown in FIG. 9A, switching elements Q1 to Q6 (power semiconductor devices) for generating a three-phase AC voltage to be applied to a U-phase coil, a V-phase coil, and a W-phase coil of a three-phase motor. On the other hand, a method using one shunt resistor Rs provided in common at the detection node on the ground GND side of the switching elements Q4, Q5, Q6 on the current suction side (hereinafter referred to as “one shunt method”), FIG. 9 (b), a method using three shunt resistors Ru, Rv, Rw provided at the detection nodes on the ground GND side of the switching elements Q4, Q5, Q6 on the current suction side (hereinafter referred to as “3 shunts”). Called "method").

  FIG. 10 shows an example of current waveforms detected in each of the 1-shunt method and the 3-shunt method. In the case of the single shunt method, the combined current of the currents flowing through the switching elements Q4, Q5, and Q6 is detected by one shunt resistor Rs, and overcurrent protection is performed when the combined current exceeds the predetermined current. Is done. The combined current detected by the shunt resistor Rs has a rectangular waveform different from the sine waveform of the motor current flowing in each phase coil of the three-phase motor.

On the other hand, in the case of the three shunt method, each current of the switching elements Q4, Q5, and Q6 is individually detected by the three shunt resistors Ru, Rv, and Rw, and any one of the detected currents is a predetermined current amount. Overcurrent protection is performed when the overcurrent exceeds. The current detected by each of the three shunt resistors Ru, Rv, Rw has a waveform similar to the waveform of the motor current flowing through each phase coil.
JP 2003-319546 A

  By the way, the overcurrent detection resistor uses an element such as a shunt resistor with little voltage drop and loss in order to detect an accurate current with respect to the actual load even when a large current flows. For this reason, the current detected by the overcurrent detection resistor is easily affected by pattern resistance, parasitic capacitance, and the like. Due to this influence, when a plurality of shunt resistors such as the above-described three-shunt method are used, an error occurs in the current detected by each of the plurality of shunt resistors.

  For example, when the design is such that overcurrent protection is performed with a uniform current of 30 A, the resistance value increases as the pattern resistance or the like is added to the shunt resistance, and the detection voltage increases. For this reason, according to one shunt resistor, overcurrent protection is performed with a current of 27A, and according to another shunt resistor, overcurrent protection is performed with a current of 28A. However, there is a problem that a deviation occurs at the timing when overcurrent protection is performed uniformly.

  Therefore, it is necessary to devise a layout so that all the pattern resistors of each of the plurality of shunt resistors are arranged, but it is practically difficult to lay out the integrated circuit so that all the pattern resistors are arranged. In particular, in the case of an integrated circuit using an insulating metal substrate technology, since bare chip mounting that requires advanced technology is adopted, there are many layout restrictions, and there is a limit to aligning each pattern resistance depending on the layout. .

  A main invention for solving the above problems is that a plurality of detection resistors that detect a plurality of currents flowing through a protected circuit as a plurality of voltages, a reference voltage generation circuit that generates a plurality of reference voltages, and the plurality of reference voltages A plurality of terminals that can be connected to a plurality of adjustment resistors, and the plurality of voltages and the plurality of reference voltages are respectively compared, and one or more of the plurality of voltages is the plurality of the plurality of voltages. An overcurrent detection circuit that detects whether or not a corresponding one or more reference voltages in the reference voltage are exceeded, and a detection result of the overcurrent detection circuit indicates that one or more voltages in the plurality of voltages are A control circuit that controls to protect the protected circuit based on the detection result when it indicates that one or more corresponding reference voltages of a plurality of reference voltages have been exceeded. Integrated circuit.

  According to the present invention, it is possible to prevent a shift in timing at which overcurrent protection is performed.

<<< Device using integrated circuit with overcurrent protection function >>>
=== Inverter circuit ===
FIG. 1 shows a case of an inverter device 100 using an inverter circuit 120 having an overcurrent protection function.
The overcurrent protection function of the present embodiment is to stop the three-phase motor 130 when the current to be detected exceeds a predetermined current due to the lock of the three-phase motor 130 or the like, and the overcurrent of the switching circuit 121 This function prevents destruction and failure of the three-phase motor 130.

  The inverter device 100 of this embodiment is used for power electronics devices such as an air conditioner, a washing machine, and a refrigerator, and converts AC power into AC power of another magnitude, frequency, and phase according to the inverter load. It is a device. Specifically, the inverter device 100 converts the AC voltage of the three-phase AC power source 105 including the R-phase coil, the S-phase coil, and the T-phase coil into a DC voltage by the converter circuit 110, and then converts the AC voltage by the inverter circuit 120. An AC voltage for driving an inverter of a three-phase motor 130 (inverter load) having a U-phase coil, a V-phase coil, and a W-phase coil is generated based on the DC voltage.

The inverter circuit 120 is provided as an integrated circuit (first integrated circuit) including at least a V + terminal, a V− terminal, a U terminal, a V terminal, a W terminal, and voltage adjustment terminals Mu, Mv, and Mw.
A DC voltage changed by the converter circuit 110 is applied between the V + terminal and the V− terminal. A smoothing capacitor CX is connected between the V + terminal, the V− terminal, and the converter circuit 110, and a DC voltage applied from the converter circuit 110 between the V + terminal and the V− terminal is stabilized by the smoothing capacitor CX. To do.
The U terminal, V terminal, and W terminal are connected to the U phase coil, V phase coil, and W phase coil of the three-phase motor 130, respectively.

  The voltage adjustment terminals Mu, Mv, and Mw are voltage adjustment resistors for individually adjusting the voltage levels of the reference voltages Vru, Vrv, and Vrw supplied from the reference voltage generation circuit 126 to the overcurrent detection circuit 123, respectively. Terminals for connecting Ra, Rb, and Rc (a plurality of adjusting resistors). The voltage adjusting resistors Ra, Rb, and Rc may be variable resistors or fixed resistors.

  The monitor terminal SO is a terminal for monitoring a composite output signal SO (to be described later) indicating a detection result in the overcurrent detection circuit 123. By monitoring the composite output signal SO, it is possible to determine the resistance values of the voltage adjustment resistors Ra, Rb, and Rc suitable for adjusting the voltage levels of the reference voltages Vru, Vrv, and Vrw. The monitor terminal SO may be a terminal for monitoring a detection signal DET described later in addition to the combined output signal SO.

  The inverter circuit 120 includes a switching circuit 121 (non-protection circuit), shunt resistors Ru, Rv, Rw (detection resistors), RC filters 122a, 122b, 122c, an overcurrent detection circuit 123, and a driver circuit 125 (control circuit). ) And a reference voltage generation circuit 126.

  The switching circuit 121 includes switching elements Q1 to Q6 and regenerative diodes D1 to D6 connected in reverse parallel to the switching elements Q1 to Q6, and supplies a DC voltage applied via the V + terminal and the V− terminal as a power source. Operates as a voltage. As the switching elements Q1 to Q6, power semiconductor devices such as power MOSFETs and IGBTs are employed.

  The switching elements Q1, Q2, and Q3 are provided on the current discharge side (V + terminal side) and are called source transistors. The switching elements Q4, Q5, Q6 are provided on the current suction side (V-terminal side) and are called sink transistors. Switching elements Q1 and Q4 are connected in series, and the connection point of switching elements Q1 and Q4 is connected to the U terminal. The switching elements Q2 and Q5 are connected in series, and the connection point of the switching elements Q2 and Q5 is connected to the V terminal. The switching elements Q3 and Q6 are connected in series, and the connection point of the switching elements Q3 and Q6 is connected to the W terminal.

  The shunt resistors Ru, Rv, and Rw are resistors that are provided between the emitters of the switching elements Q4, Q5, and Q6 and the V-terminal, respectively, and are used for overcurrent detection in the overcurrent detection circuit 123. That is, as the overcurrent detection method, a three-shunt method using three shunt resistors Ru, Rv, and Rw is adopted.

  The RC filter 122a is applied with a voltage generated at a connection point na between the switching element Q4 and the shunt resistor Ru via the first signal line 127a, and outputs a voltage Vu obtained by smoothing the voltage to the overcurrent detection circuit 123. It is a filter. The RC filter 122b is applied with a voltage generated at a connection point nb between the switching element Q5 and the shunt resistor Rv via the second signal line 127b, and outputs a voltage Vv obtained by smoothing the voltage to the overcurrent detection circuit 123. It is a filter. The RC filter 122c is applied with a voltage generated at a connection point nc between the switching element Q6 and the shunt resistor Rw via the third signal line 127c, and outputs a voltage Vw obtained by smoothing the voltage to the overcurrent detection circuit 123. It is a filter.

  The overcurrent detection circuit 123 uses the voltages Vu, Vv, and Vw supplied through the first to third signal lines 127a to 127c as the reference voltages Vru, Vrv, and Vrw supplied from the reference voltage generation circuit 126, respectively. It is a circuit that detects whether or not an overcurrent has flowed through any of the shunt resistors Ru, Rv, and Rw by comparison. When the overcurrent detection circuit 123 detects an overcurrent in the inverter circuit 120, the overcurrent detection circuit 123 outputs a high level detection signal DET. In other words, when the detection signal DET is at a low level, it represents a case where no overcurrent is detected. A detailed configuration example of the overcurrent detection circuit 123 will be described later.

  The driver circuit 125 (control circuit) outputs a control signal for controlling the rotation speed of the three-phase motor 130 to the switching circuit 121 in accordance with an instruction from a microcomputer or the like outside the inverter circuit 120. When the driver circuit 125 receives the low level detection signal DET from the overcurrent detection circuit 123, the driver circuit 125 has, for example, a phase difference of 120 degrees, and controls on / off of the switching elements Q1 to Q3. Three pulse width modulated first rectangular waves, and three pulse width modulations that are generally 180 degrees out of phase with respect to the first rectangular waves and control on / off of the switching elements Q4 to Q6 The control signal (each base signal of switching element Q1-Q6) which consists of the 2nd rectangular wave which was made is output.

  Further, when the driver circuit 125 receives the high level detection signal DET from the overcurrent detection circuit 123, the driver circuit 125 outputs a control signal for turning off all the switching elements Q1 to Q6. Thereby, the overcurrent protection function for the switching circuit 121 is executed. Note that the control signal when the high-level detection signal DET is output from the overcurrent detection circuit 123 is not limited to turning off all the switching elements Q1 to Q6, and the switching elements Q1 to Q6 are protected from destruction due to overcurrent. Any signal may be used as long as it is instructed to control to a degree that can be protected.

  FIG. 2 shows the waveforms of the gate signals of the switching elements Q1 to Q6 in the case of the three-phase 120-degree energization method.

  The reference voltage generation circuit 126 supplies the overcurrent detection circuit 123 with reference voltages Vru, Vrv, Vrw to be compared with the voltages Vu, Vv, Vw. Further, the reference voltage generation circuit 126 can adjust the voltage levels of the reference voltages Vru, Vrv, Vrw. A detailed configuration example of the reference voltage generation circuit 126 will be described later.

=== Reference Voltage Generation Circuit ===
A detailed configuration example of the reference voltage generation circuit 126 is shown in FIG. The reference voltage generation circuit 126 includes a first reference voltage generation circuit 1260a, a second reference voltage generation circuit 1260b, and a third reference voltage generation circuit 1260c.

  The first reference voltage generation circuit 1260a generates a reference voltage Vru to be compared with the voltage Vu. The first reference voltage generation circuit 1260a includes resistors R0 and R1 connected in series between the power supply voltage VCC and the ground GND, and a capacitor C0 connected in parallel to the resistor R1. The power supply voltage VCC is taken out from the power supply line 1235 connected to the terminal on the power supply voltage VCC side of the resistor R0. A reference voltage Vru is extracted from a line 1265a connected to the connection point X of the resistors R0 and R1. The capacitor C0 maintains the level of the reference voltage Vref at the connection point X of the resistors R0 and R1.

A connection point X of the resistors R0 and R1 is connected to a voltage adjustment terminal Mu to which the voltage adjustment resistor Ra can be connected. When the voltage adjustment resistor Ra is not connected to the voltage adjustment terminal Mu, the reference voltage Vru extracted from the connection point X of the resistors R0 and R1 is as shown in the following equation (1), if the capacitance of the capacitor C0 is ignored. The voltage level is obtained by dividing the power supply voltage VCC by the resistance ratio of the resistors R0 and R1.
Vru = {R1 ÷ (R0 + R1)} × VCC (1)
On the other hand, when the voltage adjusting resistor Ra is connected to the voltage adjusting terminal Mu, the reference voltage Vru extracted from the connection point X of the resistors R0 and R1 is expressed by the following equation (2) when the capacitance of the capacitor C0 is ignored. Furthermore, the voltage level is obtained by dividing the power supply voltage VCC by the resistance ratio of the resistor R0, the resistor R1, and the combined resistor by the parallel connection of the voltage adjusting resistor Ra.

  Vru = {(Ra × R1) ÷ (Ra + R1)} ÷ {R0 + (Ra × R1) ÷ (Ra + R1)} (2)

  Therefore, the first reference voltage generation circuit 1260a can adjust the voltage level of the reference voltage Vru by changing the resistance value of the voltage adjustment resistor Ra connected to the voltage adjustment terminal Mu. The second reference voltage generation circuit 1260b and the third reference voltage generation circuit 1260c have the same configuration as the first reference voltage generation circuit 1260a. The second reference voltage generation circuit 1260b can adjust the voltage level of the reference voltage Vrv by changing the resistance value of the voltage adjustment resistor Rb connected to the voltage adjustment terminal Mv. The voltage generation circuit 1260c can adjust the voltage level of the reference voltage Vrw by changing the resistance value of the voltage adjustment resistor Rc connected to the voltage adjustment terminal Mw.

  As a result, each of the first shunt resistor Ra, the second shunt resistor Rb, and the third shunt resistor Rc depends on the difference in pattern resistance between the switching elements Q4 to Q6 and the V-terminal shown in FIG. Even if an error may occur in a uniform predetermined current amount determined in advance as an overcurrent, voltage adjusting resistors Ra, Rb, and Rc having appropriate resistance values are connected to the voltage adjusting terminals Mu, Mv, and Mw. Thus, the error as described above can be corrected. That is, it is possible to correct the deviation in timing at which overcurrent protection should be originally performed uniformly in each of the first shunt resistor Ra, the second shunt resistor Rb, and the third shunt resistor Rc.

=== Overcurrent detection circuit ===
A detailed configuration example of the overcurrent detection circuit 123 is shown in FIG. The overcurrent detection circuit 123 includes three open collector output comparators 1233a, 1233b and 1233c, a capacitor C1 connected to the first power supply line 1235, and comparison signals UO and VO of the three open collector output comparators 1233a to 1233c. , A PNP bipolar transistor B10 whose base is connected to a connection point P to which the output line of WO is connected in common, a capacitor C2 connected to the collector of the PNP bipolar transistor B10, and a connection point of the PNP bipolar transistor B10 and the capacitor C2 And a resistor R2 connected to Q.

  In the open collector output comparator 1233a, the reference voltage Vru is applied to the + terminal from the reference voltage generation circuit 1231 via the line 1265a, and the voltage Vu output from the RC filter 122a is applied to the − terminal. The open collector output comparator 1233a operates with the power supply voltage VCC supplied from the reference voltage generation circuit 126. When the voltage Vu is lower than the reference voltage Vru, the comparison signal UO of the open collector output comparator 1233a is high impedance, and when the voltage Vu is higher than the reference voltage Vru, the comparison signal UO of the open collector output comparator 1233a is at the low level. Become.

  The open collector output comparators 1233b and 1233c have the same configuration as the open collector output comparator 1233a except that the voltages Vv and Vw are applied to the negative terminal and the reference voltages Vrv and Vrw are applied to the positive terminal. The comparison signals UO, VO, WO of the open collector output comparators 1233a, 1233b, 1233c are connected to the connection point P by wired OR. A synthesized output signal SO obtained by synthesizing the comparison signals UO, VO, and WO is extracted from the connection point P, and is input to the base of the PNP bipolar transistor B10.

  FIG. 4 shows a circuit configuration example of the open collector output comparator 1233 (1233a, 1233b, 1233c). The open collector output comparator 1233 includes current sources I0 to I2, a differential amplifier circuit 1238 composed of bipolar transistors B0 to B5, a current source I3, and an output circuit 1239 composed of bipolar transistors B6 and B7. Become.

  Input + IN and input −IN of the differential amplifier circuit 1238 are terminals to which reference voltages Vru, Vrv, Vrw and voltages Vu, Vv, Vw are applied, respectively. In the differential amplifier circuit 1238, the current source I1 is distributed to the bipolar transistors B1 and B2 according to the voltage levels of the input + IN and the input −IN. When the voltage of the input + IN is larger than the voltage of the input −IN, the current distributed to the bipolar transistor B2 becomes large. When the voltage of the input + IN is smaller than the voltage of the input −IN, the current is distributed to the bipolar transistor B2. Current is smaller.

  In the output circuit 1239, the voltage input to the base of the bipolar transistor B6 connected to the connection point O of the bipolar transistors B2 and B4 increases when the voltage of the input + IN is larger than the voltage of the input −IN. When the voltage at + IN is smaller than the voltage at input -IN, the voltage becomes smaller. Therefore, when the voltage input to the base of the output bipolar transistor B6 is large (when “input + IN voltage> input−IN voltage”), the bipolar transistor B7 is driven to turn off and the output OUT is high. Impedance. On the other hand, when the voltage input to the base of the bipolar transistor B6 is small (in the case of “input + IN voltage <input−IN voltage”), the bipolar transistor B7 is driven in the ON direction and the output OUT is substantially the voltage. It becomes VEE level.

  The capacitor C1 maintains the level of the power supply voltage VCC supplied from the reference voltage generation circuit 1231.

  The PNP bipolar transistor B10 is turned on / off based on the combined output signal SO input to the base. If no overcurrent is detected in any of the shunt resistors Ru, Rv, Rw, the combined output signal SO input to the base becomes high impedance, so that the PNP bipolar transistor B10 is turned off. In this case, the detection signal DET extracted from the connection point Q via the resistor R2 is at a low level corresponding to the GND level.

  On the other hand, when an overcurrent is detected in any one of the shunt resistors Ru, Rv, and Rw, the combined output signal SO at the base input is at a low level, so that the PNP bipolar transistor B10 is turned on. In this case, the detection signal DET extracted from the connection point Q via the resistor R2 is at a high level corresponding to the power supply voltage VCC.

  The capacitor C2 and the resistor R2 form an integration circuit when viewed from the terminal side that outputs the detection signal DET, and play a role of suppressing spike-like noise and the like mixed from the output terminal.

  As described above, when the three-shunt method is employed, the shunt resistor Ru is connected to the connection point X by connecting the comparison signals UO, VO, and WO of the open collector output comparators 1233a to 1233c suitable for high impedance output. , Rv, Rw can be detected based on one composite output signal SO whether or not the currents flowing in each of them are overcurrents.

  The composite output signal SO can be monitored by one monitor terminal SO shown in FIG. As described above, since the composite output signal SO can be monitored by the monitor terminal SO, when the voltage levels of the reference voltages Vru, Vrv, Vrw need to be adjusted, the voltage adjustment terminals Mu, Mv, Appropriate resistance values of the voltage adjusting resistors Ra, Rb, and Rc connected to Mw can be obtained.

<<< Semiconductor device using insulated metal substrate technology >>>
=== Semiconductor Device ===
FIG. 5 is a diagram showing the structure of the semiconductor device 10 using the insulated metal substrate technology. 5A is a cross-sectional view of the semiconductor device 10, and FIG. 5B is a front view of the semiconductor device 10. FIG. 6 is a perspective view of the semiconductor device 10 shown in FIG.

The case material 3 is formed with a square cylinder surrounded by four side walls 3A, 3B, 3C, 3D, and has an opening 20 on the lower side (in the direction toward C ′ of the paper surface CC ′ axis) and an upper side (paper surface). An opening 21 in the direction of C-C ′ axis toward C) is provided.
On the inside of the side walls 3 </ b> C and 3 </ b> D of the case material 3, a convex portion 22 facing the inside of the case material 3 is provided at a position slightly elevated from the opening 20. Further, on the inner side of the side walls 3C, 3D of the case material 3, the back surface on the side surface side of the second substrate 2 (surface in the direction toward the C ′ of the paper surface CC ′ axis) at a position slightly lowered from the opening 21. The contact part 23 which contacts is provided.

  On the other hand, in order to secure the screw holes 24 inside the side walls 3A and 3B of the case material 3, they are brought into contact with the back surface of the second substrate 2 (the surface in the direction toward the C ′ of the paper surface CC ′ axis). A contact portion 25 and a separation portion 26 that separates from the second substrate 2 in the direction of the paper plane BB ′ axis are provided. The heat generated in the space between the second substrate 2 and the first substrate 1A is released to the outside through the separation portion 26. In order to obtain a circulating action, it is preferable that at least two spacing portions 26 are formed.

  The base substrate 1B and the first substrate 1A are made of a conductive material such as a material mainly composed of Cu, Al, or Fe, or an alloy thereof. Further, it is made of a material having excellent thermal conductivity, and may be an insulating material such as aluminum nitride or boron nitride. In general, Cu and Al are adopted from the viewpoint of cost, and both are conductive, and therefore, an insulation treatment is required. In the following description, it is assumed that the base substrate 1B and the first substrate 1A employ Al.

  A first substrate 1A having a size smaller than that of the base substrate 1B is fixed to the surface of the base substrate 1B (surface in the direction toward the C of the paper surface C-C ′ axis) by an insulating adhesive 27. The base substrate 1B and the front and back surfaces of the first substrate 1A are provided with an anodized film for preventing scratches.

  In the first substrate 1A, an insulating film 28 is coated on an anodized film on the surface, and a first conductive pattern 7 made of Cu is formed thereon. The first conductive pattern 7 includes an island, a wiring, an electrode pad, and the like. For example, an inverter circuit 120 including switching elements Q <b> 1 to Q <b> 6 as the power semiconductor device 4 is electrically connected to the island of the first conductive pattern 7. In addition, a diode, a resistor, a capacitor, and the like are mounted on the first substrate 1A.

  A lead fixing pad is provided on the side surface of the first substrate 1A (the surface on the A, A 'side of the paper surface A-A' axis), and the external lead 29 is fixed by a brazing material. The external lead 29 is inserted into the through hole 32 of the mounting board so as to protrude from the head of the case material 3.

  The first substrate 1A fixed to the surface of the base substrate 1B is fitted into the opening 20 on the lower side of the case material 3 (the direction toward the C ′ of the paper surface C-C ′ axis). The inner walls of the side walls 3A, 3B, 3C, and 3D of the case material 3 are provided with L-shaped steps, and the side surfaces of the base substrate 1B (the surfaces on the A and A 'sides of the paper surface AA' axis and the paper surface B) -The surface on the B, B 'side of the B' axis) and the surface (the surface in the direction toward the C on the paper surface CC 'axis) come into contact with each other and are fixed. Therefore, the opening 20 is sealed by the first substrate 1A fitted to the case material 3. As described above, since the second substrate 2 is held on the side walls 3C and 3D of the case material 3, the first substrate 1A and the second substrate 2 are arranged in parallel in parallel.

  The second substrate 2 is made of a resinous substrate, and for example, a glass epoxy substrate called a printed substrate is preferable. At least one or more second conductive patterns 30 are formed on the surface of the second substrate 2 (the surface in the direction toward the C of the paper surface C-C ′ axis). Similar to the first conductive pattern 7, the second conductive pattern 30 includes islands, wirings, electrode pads, and the like. For example, an integrated circuit (second integrated circuit) 31 such as a microcomputer or a DSP (Digital Signal Processor) for controlling the operation of the inverter circuit 120 is electrically connected to one island of the second conductive pattern 30. Is done. Since it is desirable to avoid the influence of heat, the integrated circuit 31 such as a microcomputer or a DSP can be operated accurately by being disposed on a substrate different from the substrate on which the inverter circuit 120 is disposed. In addition, a transistor, a diode, a resistor, and a capacitor are mounted on the second substrate 2.

  Before the second substrate 2 is provided on the case material 3, a resin that completely seals the circuit components mounted on the first substrate 1A is provided by potting or the like. Moreover, resin which completely seals the circuit components mounted on the second substrate 2 is provided as necessary. A through hole 32 for inserting the external lead 29 is provided in the vicinity of the side of the second substrate 2. Through the through hole 32, the circuit mounted on the first substrate 1A and the circuit mounted on the second substrate 2 are electrically connected.

  The inverter circuit 120 shown in FIG. 1 can be realized as the semiconductor device 10 using the insulated metal substrate technology shown in FIGS. FIG. 7 is a diagram illustrating a mounting example of main circuit components of the semiconductor device 10. 7A is a diagram showing an example of mounting the first substrate 1A, and FIG. 7B is a diagram showing an example of mounting the second substrate 2. As shown in FIG. In the mounting example, the first board 1A is a metal board, and the second board 2 is a printed board.

  As shown in FIG. 7A, at least an inverter circuit 120 is mounted on the first substrate 1A. Then, the voltage adjustment terminals Mu, Mv, Mw, the observation terminal SO and the like are realized as the external leads 29 shown in FIG. Since the first substrate 1A is a metal substrate with good thermal conductivity, it is less necessary to consider variations in the temperature characteristics of the shunt resistors Ru, Rv, and Rw, and overcurrent protection can be performed appropriately. .

  Further, as shown in FIG. 7B, a control circuit 124 as an integrated circuit 31 such as a microcomputer or a DSP shown in FIGS. 5 and 6 is mounted on the second substrate 2. As described above, the control circuit 124 is the most important circuit component that controls the overall control of the semiconductor device 10, and therefore the second substrate 2 different from the circuit component mounted on the first substrate 1 </ b> A. It is preferable to mount on the side. As a result, the control circuit 124 is not affected by the temperature rise of the switching circuit 121 and the driver circuit 125 mounted on the first substrate 1A. The case material 3 does not necessarily have to hold the second substrate 2 on which the control circuit 124 is arranged together with the first substrate 1A. The control circuit 124 may be held by a case material (not shown) different from the case material 3.

  Further, considering the deformation of the case material 3 due to the thermal expansion of the first substrate 1A and the deformation of the second substrate 2 due to the heat generated from the circuit components mounted on the first substrate 1A, the first substrate 1A is considered. It is preferable to mount the circuit components by shifting from the center position where the second substrate 2 is most curved.

=== Application Example of Semiconductor Device ===
The semiconductor device 10 (hereinafter referred to as an inverter circuit module 60) is attached to, for example, an air conditioner outdoor unit 50 (housing) shown in FIG. FIG. 8 is a diagram showing the internal structure of the air conditioner outdoor unit 50 using the inverter circuit module 60.
The air conditioner outdoor unit 50 includes a fan 51, a frame 52, a compressor 53, a heat radiation fin 55, and an inverter circuit module 60.

  The fan 51 circulates air and has a heat exchanger on the back side (negative direction of the paper surface Y axis). The frame 52 is arranged adjacent to the fan 51 in parallel in the positive direction of the paper surface X axis. A compressor 53 is provided below the insole plate 52A of the frame 52 (the negative direction of the paper surface Z axis), and circuit components are mounted above the insole plate 52A of the frame 52 (the positive direction of the paper surface Z axis). A printed circuit board or the like is attached.

  Furthermore, the inverter circuit module 60 is mounted on the side wall plate 54 on the negative direction side of the X axis of the frame 52. The inverter circuit module 60 is attached so that the second substrate 2 side faces the side wall plate 54 of the frame 52. In addition, the radiation fins 55 are attached to the base circuit board 1B side of the inverter circuit module 60.

  The code | symbol 56 shown in FIG. 9 has shown air flow path AB produced | generated because air warms and raises. The grooves of the radiating fins 55 are provided in the direction along the air flow paths A to B (the direction of the Z axis on the paper surface). Therefore, if the notch part along the air flow paths A to B shown in FIG. 9 is also provided on the inverter circuit module 60, the heat dissipation is further improved. In addition, the codes | symbols 70-73 shown by FIG. 6 have shown an example of the notch part along air flow path AB shown in FIG.

  As mentioned above, although one embodiment concerning the present invention was described, explanation of the above-mentioned embodiment is for making an understanding of the present invention easy, and does not limit the present invention. The present invention can be changed and improved without departing from the gist thereof, and the present invention includes the equivalents.

  For example, in the above embodiment, the case of the inverter circuit 120 is given as an example of a circuit having an overcurrent protection function, but in addition, a motor driver, a signal processing circuit for audio equipment, a display drive circuit for plasma display, and the like Any circuit that needs to have an overcurrent protection function may be used.

  In addition, as an application example of the inverter circuit module 60, the air conditioner outdoor unit 50 is given as an example, but in various industries such as washing machines, refrigerators, automobiles, robots, FA (Factory Automation), NC (Numerical Control) machine tools, etc. It can be applied to electrical equipment that requires inverter control.

It is a circuit block diagram which shows the structure of the inverter apparatus using the inverter circuit as an integrated circuit of this embodiment. It is the figure which showed the waveform of each gate signal of the switching elements Q1-Q6 in the case of a 3 phase 120 degree | times energization system. It is a circuit diagram showing a specific circuit example including a reference voltage generation circuit and an overcurrent detection circuit. It is a circuit diagram which shows the specific circuit example of an open collector output comparator. (A) is sectional drawing of a semiconductor device, (b) is a front view of a semiconductor device. It is a perspective view which shows the semiconductor device of this embodiment. (A) is a figure which shows the example of mounting of the 1st board | substrate of the semiconductor device of this embodiment, (b) is the figure which showed the example of mounting of the 2nd board | substrate of a semiconductor device. It is a figure which shows the example of an internal structure of the air-conditioner outdoor unit using the semiconductor device of this embodiment. (A) is a circuit diagram explaining a 1 shunt system, (b) is a circuit diagram explaining a 3 shunt system. It is a wave form chart showing an example of a detection current waveform in each case of 1 shunt system and 3 shunt system.

Explanation of symbols

120 inverter circuit 121 switching circuit Q1 to Q6 switching element Ru, Rv, Rw shunt resistor 123 overcurrent detection circuit 124 control circuit 125 driver circuit 126 reference voltage generation circuit 1233a to 1233c open collector output comparator B10 PNP bipolar transistor 1A first substrate 2 Second substrate 3 Case material 10 Semiconductor device 60 Inverter circuit module 50 Air conditioner outdoor unit

Claims (8)

A plurality of detection resistors for detecting a plurality of currents flowing through the protected circuit as a plurality of voltages;
A reference voltage generation circuit for generating a plurality of reference voltages;
A plurality of terminals to which a plurality of adjustment resistors for individually adjusting the plurality of reference voltages can be connected;
The plurality of voltages and the plurality of reference voltages are respectively compared to detect whether one or more voltages in the plurality of voltages exceed one or more corresponding reference voltages in the plurality of reference voltages. An overcurrent detection circuit;
If the detection result of the overcurrent detection circuit indicates that one or more voltages in the plurality of voltages exceed one or more corresponding reference voltages in the plurality of reference voltages, based on the detection results A control circuit for controlling to protect the protected circuit;
An integrated circuit comprising: The reference voltage generation circuit includes a plurality of series resistance circuits that generate the plurality of reference voltages at predetermined connection points,
The connection points of the plurality of series resistance circuits are connected to the plurality of terminals, respectively.
The integrated circuit according to claim 1. The overcurrent detection circuit includes:
The plurality of voltages and the plurality of reference voltages are respectively compared, and when the plurality of voltages do not exceed the plurality of reference voltages, the output becomes high impedance, and when the plurality of voltages exceed the reference voltage It has a plurality of comparators that output a predetermined voltage,
The outputs of the plurality of comparators are connected in common to obtain the detection result of the overcurrent detection circuit.
The integrated circuit according to claim 1. A monitor terminal commonly connected to the outputs of the plurality of comparators;
The integrated circuit according to claim 3, further comprising: The plurality of detection resistors are shunt resistors,
The integrated circuit according to claim 1. A substrate having a conductive pattern on the surface;
An integrated circuit electrically connected to the conductive pattern and disposed on the substrate, and a plurality of adjustment resistors,
The integrated circuit comprises:
A protected circuit;
A plurality of detection resistors for detecting a plurality of currents flowing through the protected circuit as a plurality of voltages;
A reference voltage generation circuit for generating a plurality of reference voltages;
A plurality of terminals to which the plurality of adjustment resistors for individually adjusting the plurality of reference voltages are connected;
The plurality of voltages and the plurality of reference voltages are respectively compared to detect whether one or more voltages in the plurality of voltages exceed one or more corresponding reference voltages in the plurality of reference voltages. An overcurrent detection circuit;
If the detection result of the overcurrent detection circuit indicates that one or more voltages in the plurality of voltages exceed one or more corresponding reference voltages in the plurality of reference voltages, based on the detection results A control circuit for controlling to protect the protected circuit;
A semiconductor device comprising: A first substrate having a first conductive pattern on a surface;
A second substrate having a second conductive pattern on the surface;
A first integrated circuit and a plurality of adjustment resistors electrically connected to the first conductive pattern and disposed on the first substrate;
A second integrated circuit for controlling the operation of the first integrated circuit, which is electrically connected to the second conductive pattern and disposed on the second substrate;
A case for holding the first substrate and the second substrate in parallel substantially in parallel,
The first integrated circuit includes:
A protected circuit;
A plurality of detection resistors for detecting a plurality of currents flowing through the protected circuit as a plurality of voltages;
A reference voltage generation circuit for generating a plurality of reference voltages;
A plurality of terminals to which the plurality of adjustment resistors for individually adjusting the plurality of reference voltages are connected;
The plurality of voltages and the plurality of reference voltages are respectively compared to detect whether one or more voltages in the plurality of voltages exceed one or more corresponding reference voltages in the plurality of reference voltages. An overcurrent detection circuit;
If the detection result of the overcurrent detection circuit indicates that one or more voltages in the plurality of voltages exceed one or more corresponding reference voltages in the plurality of reference voltages, based on the detection results A control circuit for controlling to protect the protected circuit;
A semiconductor device comprising: A substrate having a conductive pattern on the surface;
An integrated circuit and a plurality of adjusting resistors electrically connected to the conductive pattern and disposed on the substrate;
A case for holding the substrate;
A case in which the case is disposed, and
The integrated circuit comprises:
A protected circuit;
A plurality of detection resistors for detecting a plurality of currents flowing through the protected circuit as a plurality of voltages;
A reference voltage generation circuit for generating a plurality of reference voltages;
A plurality of terminals to which the plurality of adjustment resistors for individually adjusting the plurality of reference voltages are connected;
The plurality of voltages and the plurality of reference voltages are respectively compared to detect whether one or more voltages in the plurality of voltages exceed one or more corresponding reference voltages in the plurality of reference voltages. An overcurrent detection circuit;
If the detection result of the overcurrent detection circuit indicates that one or more voltages in the plurality of voltages exceed one or more corresponding reference voltages in the plurality of reference voltages, based on the detection results A control circuit for controlling to protect the protected circuit;
Electrical equipment characterized by including.

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