WO2024098600A1

WO2024098600A1 - Encoding method and system, device, and storage medium

Info

Publication number: WO2024098600A1
Application number: PCT/CN2023/080604
Authority: WO
Inventors: 孙旭; 杨琳琳
Original assignee: 山东云海国创云计算装备产业创新中心有限公司
Priority date: 2022-11-10
Filing date: 2023-03-09
Publication date: 2024-05-16
Also published as: CN115510788B; CN115510788A

Abstract

The present application relates to the field of chip design. The present application provides an encoding method and system, a device, and a storage medium. The method comprises: according to the length of bits, dividing parallel data lines into a plurality of groups, and performing data flow detection and feature extraction on each group; according to extracted features, calculating grouping enable of each group, and determining whether the grouping enable is greater than or equal to a threshold value or not; calculating the number of coupling times of the group of which the grouping enable is greater than or equal to the threshold value, and according to the number of coupling times and the value of the grouping enable, performing flipping calculation; and transmitting first data after flipping calculation and the second data of the group of which the grouping enable is less than the threshold value to the next stage. According to the present application, by detecting data change characteristics, performing byte-by-byte segmentation control, improves a dynamic power consumption calculation method and optimizing a hardware implementation process thereof, the dynamic power consumption is reduced to the greatest extent, and the low-power-consumption design of the whole SOC is finally realized.

Description

A coding method, system, device and storage medium

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to the Chinese patent application filed with the China Patent Office on November 10, 2022, with application number 202211407578.X, and application name “A method, system, device and storage medium for encoding”, the entire contents of which are incorporated by reference in this application.

Technical Field

The present application relates to the field of chip design, and more specifically, to a coding method, system, device and storage medium.

Background technique

The dynamic power consumption of integrated circuit power consumption is the power consumption generated when the signal is flipped. The power consumption calculation model in the prior art of encoding can calculate the power consumption data of 2-bit lines, as shown in Figure 1. The items containing λ in the table are the power consumption caused by coupling flipping (energy loss caused by charging and discharging the coupling capacitor), and the constant item is the power consumption caused by self-flipping (energy loss caused by charging and discharging the substrate capacitor).

Disadvantages of existing technology:

1. When calculating the number of coupling flips, the coupling flips of all parallel signal lines (such as multi-bit wide address lines and data lines) must be calculated in real time, which will consume additional hardware resources and generate additional power consumption. In many cases, the total power consumption will exceed the power consumption when not encoded.

2. The prior art only considers the power consumption caused by coupling flipping, but does not consider the power consumption of self-flipping, which will lead to inaccurate calculation under certain process conditions;

3. When the odd and even lines are flipped, all signal lines can be flipped, which may cause additional flipping of signal lines that have not changed for a long time, thereby increasing power consumption.

Summary of the invention

In view of this, the purpose of this application is to propose a coding method, system, computer device and non-volatile readable storage medium. This application reduces dynamic power consumption to the greatest extent by detecting data change characteristics, byte-by-byte segmentation control, improving the dynamic power consumption calculation method and optimizing its hardware implementation process, and ultimately realizes the low-power design of the entire SOC.

Based on the above purpose, one aspect of the present application provides a coding method, comprising the following steps: dividing parallel data lines into multiple groups according to the length of the bit, and performing data flow detection and feature extraction on each group; calculating the group enable of each group according to the extracted features, and judging whether the group enable is greater than or equal to a threshold; calculating the coupling times of the groups whose group enable is greater than or equal to the threshold, and performing flip calculation according to the coupling times and the value of the group enable; The first data and the grouping enable the second data of the group smaller than the threshold to be transmitted to the next stage.

In the present application, dividing the parallel data lines into a plurality of groups according to the length of the bit includes: setting the minimum group length to one bit and the maximum group length to half of the data bit.

In the present application, calculating the grouping enable of each group according to the extracted features includes: generating the grouping enable according to the data change rate of the previous detection cycle.

In the present application, generating a group enable according to a data change rate of a previous detection cycle includes: generating a detection cycle according to a preset condition.

In the present application, generating group enable according to the data change rate of the previous detection cycle includes: calculating the first number of data changes in the current detection cycle; calculating the second number of data changes in each group in the current detection cycle; calculating the data change rate of each group according to the first number and the second number; and determining the group enable of each group according to the data change rate.

In the present application, calculating the first number of data changes in the current detection cycle includes: setting a first counter, and in response to a data bit having data changes among all data bits, adding one to the first counter.

In the present application, calculating the second number of data changes in each group in the current detection cycle includes: setting a second counter in each group, and in response to a data bit in the group where data has changed, adding one to the second counter of the corresponding group.

In the present application, calculating the data change rate of each group based on the first number and the second number includes: using the ratio of the second number to the first number as the data change rate of each group.

In the present application, determining the grouping enable of each small group according to the data change rate includes: in response to the data change rate being less than a first value, setting the grouping enable to a first enable value; in response to the data change rate being between the first value and the second value, setting the grouping enable to a second enable value; in response to the data change rate being greater than the second value, setting the grouping enable to a third enable value, wherein the first enable value is less than the second enable value, and the second enable value is less than the third enable value.

In the present application, calculating the coupling times of small groups whose grouping enable is greater than or equal to a threshold includes: determining whether the grouping enable of each small group is greater than or equal to the threshold; in response to the grouping enable of the small group being greater than or equal to the threshold, setting the coding enable of the small group to one, and calculating the coupling times of the small group.

In the present application, calculating the coupling times of the small groups whose group enable is greater than or equal to the threshold includes: setting the threshold to be equal to the second enable value.

In the present application, the method further includes: in response to the grouping enable of the group being less than a threshold, setting the coding enable of the group to zero.

In the present application, calculating the coupling times of the small groups whose grouping enable is greater than or equal to the threshold includes: calculating the sub-coupling times between every two adjacent bits by an XOR operation, and adding all the sub-coupling times in the small group to obtain the coupling times.

In the present application, calculating the number of sub-couplings between every two adjacent bits through an XOR operation includes: recording the two bits after the change as the new register, and recording the two bits before the change as the old register; in response to the XOR result of the new register and the old register being 11, recording the number of sub-couplings as 2; in response to the XOR result of the data of the first bit and the second bit of the new register being one and the XOR result of the data of the first bit and the second bit of the old register being zero, recording the number of sub-couplings as 1; in other cases except the above two cases, the number of sub-couplings is recorded as 0.

In the present application, performing flip calculation according to the coupling times and the grouping enable value includes: setting a flip flag according to the coupling times and the grouping enable value, and processing the parity lines in the group accordingly.

In the present application, a flip flag is set according to the coupling number and the value of the group enable, and the parity lines in the group are processed accordingly, including: in response to the coupling number being less than or equal to a third value, the flip flag is set to zero and no flip processing is performed; in response to the coupling number being greater than the third value, the value of the flip flag and the object of the flip operation are determined according to the group enable.

In the present application, the value of the flip flag bit and the object of the flip operation are determined according to the group enable, including: in response to the group enable being the third enable value, the flip flag bit is set to one, and the even lines in the group are flipped; in response to the group enable being the second enable value, the flip flag bit is set to two, and the odd lines in the group are flipped; in other cases except the above two cases, the flip flag bit is set to zero and no flipping is performed.

On the other hand, the present application provides a coding system, including: a grouping module, configured to divide parallel data lines into multiple groups according to the length of the bit, and perform data flow detection and feature extraction on each group; a judgment module, configured to calculate the group enable of each group according to the extracted features, and judge whether the group enable is greater than or equal to a threshold; a calculation module, configured to calculate the coupling times of the groups whose group enable is greater than or equal to the threshold, and perform flip calculation according to the coupling times and the value of the group enable; a transmission module, configured to transmit the first data after the flip calculation and the second data of the group whose group enable is less than the threshold to the next level.

In another aspect of the present application, a computer device is provided, comprising: at least one processor; a memory, wherein the memory stores computer instructions executable on the processor, and the instructions implement the steps of the above method when executed by the processor.

In another aspect of the present application, a non-volatile readable storage medium is provided, which stores a computer program that implements the above method steps when executed by a processor.

The present application has the following beneficial technical effects: by detecting data change characteristics, controlling byte-by-byte segmentation, improving the dynamic power consumption calculation method and optimizing its hardware implementation process, the dynamic power consumption is reduced to the greatest extent, and ultimately a low-power design of the entire SOC is achieved.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following briefly introduces the drawings required for use in the embodiments or the prior art descriptions. Obviously, the drawings described below are only a part of the present application. For those skilled in the art, other embodiments can be obtained according to these drawings without creative work.

FIG1 is a DSM (Digital Spread Spectrum Modulation) bus power consumption calculation table in the prior art;

FIG2 is a schematic diagram of an embodiment of an encoding method provided by some embodiments of the present application;

FIG3 is a schematic diagram of the coding architecture provided by some embodiments of the present application;

FIG4 is a lambda calculation table provided in some embodiments of the present application;

FIG5 is a schematic diagram of calculating coupling times provided in some embodiments of the present application;

FIG6 is a schematic diagram of an embodiment of a coding system provided by some embodiments of the present application;

FIG7 is a schematic diagram of the hardware structure of an embodiment of a computer device for encoding provided in some embodiments of the present application;

FIG8 is a schematic diagram of an embodiment of an encoded computer storage medium provided in some embodiments of the present application.

Detailed ways

In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the embodiments of the present application are further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

It should be noted that all expressions using "first" and "second" in the embodiments of the present application are for distinguishing two non-identical entities with the same name or non-identical parameters. It can be seen that "first" and "second" are only for the convenience of expression and should not be understood as limitations on the embodiments of the present application. The subsequent embodiments will not explain this one by one.

The first aspect of the embodiment of the present application provides an embodiment of a coding method. FIG2 shows a schematic diagram of an embodiment of the coding method provided by the present application. As shown in FIG2, the embodiment of the present application includes the following steps:

S1, divide the parallel data lines into multiple groups according to the length of the bit, and perform data flow detection and feature extraction on each group;

S2. Calculate the grouping enable of each group based on the extracted features, and determine whether the grouping enable is greater than or equal to a threshold;

S3, calculating the coupling times of the groups whose group enable is greater than or equal to the threshold, and performing a flip calculation according to the coupling times and the value of the group enable;

S4. Transmit the first data after the flip calculation and the second data of the group whose grouping enable is less than the threshold to the next level.

FIG3 is a schematic diagram of the coding architecture provided by the present application, and the embodiment of the present application is described in conjunction with FIG3. As shown in FIG3, the architecture mainly includes the following three parts: a mark (Mark), which is used to detect changes in data streams and extract feature information; a coupler (Coupler), which is used to implement coupling calculations between valid bits; and a toggle (Toggle), which performs corresponding bit flipping.

Divide the parallel data lines into multiple groups according to the bit length, and perform data flow detection and extraction on each group Features. Data line is another way of saying data signal. Address line is another way of saying address signal. Signal lines include address lines, data lines and possible other control signals. In digital circuits, internal signals are generally transmitted through wires, so signals are sometimes also called signal lines. In the process of data transmission, it is generally transmitted in the form of one address corresponding to a group of data, such as writing data 45 to address 12. Therefore, the signal representing the address is called the address line, and the corresponding data signal is called the data line. Data flow detection refers to the detection of the data flow in the data line to determine whether the data flow has changed. Feature extraction is not a special term for digital circuits. It is a broad sense to calculate some of the required features or characteristics. For example, in the embodiment of the present application, the number of data changes T_total_cnt and the data change rate T_rot are calculated and extracted.

In some implementations, dividing the parallel data lines into a plurality of groups according to the length of a bit includes: setting a minimum group length to one bit and a maximum group length to half of a data bit.

The embodiment of the present application can be configured in mode, that is, a group of parallel data lines are grouped according to the corresponding Byte (bit), the minimum group length is 1Byte, and the maximum group length is half of the data bit. For example, if the data is 32bit, the group length can be set to 1Byte, with a total of 4 groups; it can also be configured to have a group length of 2bytes, with a total of 2 groups. In the embodiment of the present application, 32bit data, the group length is set to 1Byte, and a total of 4 groups are introduced as an example, the first group: bit0-bit7; the second group: bit8-bit15; the third group: bit16-bit23; the fourth group: bit24-bit31.

The grouping enable of each group is calculated based on the extracted features, and it is determined whether the grouping enable is greater than or equal to a threshold.

In some embodiments, calculating the grouping enable of each group based on the extracted features includes: generating the grouping enable based on the data change rate of the previous detection cycle. When detecting and extracting features in the data stream, each group is completely independent and parallel, so the embodiment of the present application only introduces the processing method of one group, and the other groups are processed in the same manner. It should be noted that the embodiment of the present application uses the data change rate in the previous detection cycle to generate the grouping enable as the basis for data processing in the next detection cycle.

In some implementations, generating a group enable according to a data change rate of a previous detection cycle includes: generating a detection cycle according to a preset condition. In the embodiment of the present application, the detection cycle is generated according to the operating frequency of the system, and other detection cycles may be set in other embodiments.

In some embodiments, generating group enable based on the data change rate of the previous detection cycle includes: calculating the first number of data changes in the current detection cycle; calculating the second number of data changes in each group in the current detection cycle; calculating the data change rate of each group based on the first number and the second number; and determining the group enable of each group based on the data change rate.

In some embodiments, calculating the first number of data changes in the current detection cycle includes: setting a first counter, and in response to a data bit having a data change among all the data bits, adding one to the first counter.

In some embodiments, calculating the second number of changes in each group data within the current detection cycle includes: A second counter is set in the group, and in response to a data bit having data changes in the small group, the second counter of the corresponding small group is incremented by one.

In some embodiments, calculating the data change rate of each group based on the first number and the second number includes: using the ratio of the second number to the first number as the data change rate of each group.

In some embodiments, determining the grouping enable of each group according to the data change rate includes: in response to the data change rate being less than the first value, setting the grouping enable to a first enable value; in response to the data change rate being between the first value and the second value, setting the grouping enable to a second enable value; in response to the data change rate being greater than the second value, setting the grouping enable to a third enable value, wherein the first enable value is less than the second enable value, and the second enable value is less than the third enable value. For example, the first enable value may be 0, the second enable value may be 1, and the third enable value may be 2.

The specific process can be as follows:

A. Generate a detection cycle. Generate a detection cycle according to the system's operating frequency. For example, use 10ms as a detection cycle.

B. Calculate the number of data changes T_total_cnt in the current detection cycle. As long as one of the 32-bit data bits changes, the data is considered to have changed, and T_total_cnt is added by 1 for accumulation.

C. Synchronously calculate the number of packet data changes T_cnt in the current detection cycle. As long as one of the corresponding 8-bit data bits changes, it is considered that the data has changed, and T_cnt is added by 1 for accumulation processing;

D. Calculate the data change rate of each group at the end of each detection cycle, T_rot = T_cnt/T_total_cnt;

E. Calculate the grouping enable T_en of each group and use it as a condition for coupling calculation of each group in the next detection cycle.

When T_rot<0.2, T_en＝0;

When 0.2<T_rot<0.5, T_en＝1;

When 0.5<T_rot, T_en=2.

Calculate the coupling times of the groups whose group enable is greater than or equal to the threshold, and perform flip calculation based on the coupling times and the group enable value. Flip calculation refers to the operation to determine whether the odd and even lines in the group need to be flipped. The internal signal state of a digital circuit is generally 1 and 0. Flipping it is to invert it, that is, 1 becomes 0, and 0 becomes 1.

In some embodiments, calculating the coupling times of small groups whose grouping enable is greater than or equal to a threshold includes: determining whether the grouping enable of each small group is greater than or equal to the threshold; in response to the grouping enable of the small group being greater than or equal to the threshold, setting the coding enable of the small group to one, and calculating the coupling times of the small group.

In some implementations, calculating the coupling times of the subgroups whose group enable is greater than or equal to the threshold includes: setting the threshold to be equal to the second enable value. For example, the threshold may be 1.

In some implementations, the method further includes: in response to the grouping enable of the group being less than a threshold, setting the coding enable of the group to zero.

The obtained grouping enable of each group is recorded as T_en_1, T_en_2, T_en_3 and T_en_4. When the enable signals of each group are all 0, it is considered that the data change is very small, and the subsequent encoding calculation process is not started at this time. The encoding enable code_en is 0, and the data flip signal of each group is also 0, that is, the data is directly passed to the next stage without processing, and the enable of the subsequent coupling calculation and signal flip module is also turned off to save power consumption to the greatest extent; otherwise, the subsequent encoding calculation process is started, code_en is 1, and the subsequent steps are entered.

In some embodiments, calculating the coupling times of the subgroups whose grouping enable is greater than or equal to the threshold includes: calculating the sub-coupling times between every two adjacent bits by an XOR operation, and adding all the sub-coupling times in the subgroup to obtain the coupling times.

In some embodiments, calculating the number of sub-couplings between every two adjacent bits through an XOR operation includes: recording the two bits after the change as the new register, and recording the two bits before the change as the old register; in response to the XOR result of the new register and the old register being 11, recording the number of sub-couplings as 2; in response to the XOR result of the data of the first bit and the second bit of the new register being one and the XOR result of the data of the first bit and the second bit of the old register being zero, recording the number of sub-couplings as 1; in other cases except the above two cases, the number of sub-couplings is recorded as 0.

When calculating the total number of couplings for each group, the calculation method is the same, so it is no longer calculated separately. The specific process is as follows:

a. Calculate the number of couplings between a set of 2-bit signals.

FIG1 shows the power consumption calculation process under the standard DSM model, which considers two situations, self-flip and coupled flip, and has high accuracy, but its calculation process is still too complicated, especially not conducive to chip implementation. Therefore, this model is improved. With the continuous reduction of integrated circuit process, the proportion of coupled power consumption is getting larger and larger, and λ is much larger than 1, so the coupled power consumption can be approximated as dynamic power consumption, so the number of λ in FIG1 is extracted, and FIG4 is the λ calculation table provided by the present application. As shown in ^FIG4 , _V1new represents the data after the first bit changes, _V2new represents the data after the second bit changes, ^V1old represents the data before the first bit changes, ^and _V2old represents the data before the second bit changes. In the embodiment of the present application _, [ _V1new , ^V2new ] is recorded as a ₂ ^- bit wide register reg_new, ^and [ _V1old _, ^V2old ] is recorded as ^a 2-bit wide register reg_old.

1. If reg_new^reg_old=11, the degree of λ is 2, recorded as cp=2, otherwise go to step 2; where ^ is the XOR operation represented by Verilog (the hardware description language used in chip design);

2. If reg_new[0]^reg_new[1]=1, and reg_old[0]^reg_old[1]=0, then λ is 1, denoted as cp=1, where reg_new[0] represents the data at bit 0 in reg_new, ^i.e. , _V1new , reg_new[1] represents the data at bit 1 in reg_new, i.e., _V2new ^, reg_old[0] represents the data at bit 0 in reg_old, ^i.e. , _V1old . reg_old[1] represents the data with bit 1 in reg_old, that is, V ₂ ^old .

3. In other cases, λ is 0, denoted as cp=0.

When calculating a group of adjacent signal lines, the embodiment of the present application simplifies the complex 4*4 lookup table into 3 XOR gate operations, which can significantly reduce resource consumption and also reduce power consumption.

b. Calculate the total number of couplings within a group.

FIG5 is a schematic diagram of calculating the coupling times provided by the present application. As shown in FIG5, the sub-coupling times between two adjacent bits are calculated, and then the sub-coupling times are added to obtain the coupling times of the group. According to the calculation method in step a, the 7 coupling times in a group are calculated at the same time, and recorded as CP_cnt=cp_0+cp_1+cp_2+cp_3+cp_4+cp_5+cp_6+cp_7.

In some implementations, performing flip calculation according to the coupling times and the grouping enable value includes: setting a flip flag according to the coupling times and the grouping enable value, and processing the parity lines in the group accordingly.

In some embodiments, a flip flag is set according to the coupling number and the value of the group enable, and the parity lines in the group are processed accordingly, including: in response to the coupling number being less than or equal to a third value, the flip flag is set to zero and no flip processing is performed; in response to the coupling number being greater than the third value, the value of the flip flag and the object of the flip operation are determined according to the group enable.

In some embodiments, determining the value of the flip flag bit and the object of the flip operation based on the group enable includes: in response to the group enable being the third enable value, setting the flip flag bit to one and flipping the even lines within the group; in response to the group enable being the second enable value, setting the flip flag bit to two and flipping the odd lines within the group; in cases other than the above two cases, setting the flip flag bit to zero and not performing any flipping processing.

When CP_cnt>4 and T_en＝2, the toggle flag toggle_en is set to 1, and the even lines in the group are flipped, and the odd lines are not processed;

When CP_cnt>4 and T_en＝1, the toggle flag toggle_en is set to 2, and the odd lines in the group are flipped, and the even lines are not processed;

In other cases, no flipping is performed and the flip flag toggle_en is set to 0.

The first data after flip calculation and the second data of the group whose grouping is enabled to be less than the threshold are transmitted to the next stage.

It should be pointed out in particular that the various steps in the various embodiments of the above-mentioned encoding method can be cross-linked, replaced, added, and deleted with each other. Therefore, these reasonable permutations, combinations and transformations of the encoding method should also fall within the scope of protection of the present application, and the scope of protection of the present application should not be limited to the embodiments.

Based on the above purpose, the second aspect of the embodiment of the present application proposes a coding system. As shown in FIG6 , the system 200 includes the following modules: a grouping module configured to divide the parallel data lines into multiple groups according to the length of the bit, and perform data flow detection and feature extraction on each group; a judgment module configured to calculate each group according to the extracted features. The module is configured to calculate the coupling times of the groups whose group enable is greater than or equal to the threshold, and perform flip calculation according to the coupling times and the value of the group enable; the transmission module is configured to transmit the first data after the flip calculation and the second data of the groups whose group enable is less than the threshold to the next level.

In some embodiments, the grouping module is configured to: set a minimum group length to one bit and a maximum group length to half of a data bit.

In some implementations, the determination module is configured to: generate a group enable according to a data change rate in a previous detection cycle.

In some implementations, the determination module is configured to generate a detection cycle according to preset conditions.

In some embodiments, the judgment module is configured to: calculate the first number of data changes in the current detection cycle; calculate the second number of data changes in each group in the current detection cycle; calculate the data change rate of each group based on the first number and the second number; and determine the grouping enable of each group based on the data change rate.

In some implementations, the determination module is configured to: set a first counter, and in response to a data bit having data changes among all the data bits, add one to the first counter.

In some implementations, the determination module is configured to: set a second counter in each group, and in response to a data bit in the group having data changes, add one to the second counter of the corresponding group.

In some implementations, the determination module is configured to use a ratio of the second number to the first number as the data change rate of each group.

In some embodiments, the judgment module is configured to: in response to the data change rate being less than the first value, set the group enable to a first enable value; in response to the data change rate being between the first value and the second value, set the group enable to a second enable value; in response to the data change rate being greater than the second value, set the group enable to a third enable value, wherein the first enable value is less than the second enable value, and the second enable value is less than the third enable value.

In some embodiments, the calculation module is configured to: determine whether the grouping enable of each group is greater than or equal to a threshold; in response to the grouping enable of the group being greater than or equal to the threshold, set the coding enable of the group to one, and calculate the coupling times of the group.

In some implementations, the calculation module is configured to: set the threshold value equal to the second enabling value.

In some embodiments, the system further comprises an encoding module configured to: in response to the grouping enable of the group being less than a threshold, set the encoding enable of the group to zero.

In some embodiments, the calculation module is configured to: calculate the number of sub-couplings between every two adjacent bits through an XOR operation, and add up all the sub-coupling numbers in the group to obtain the coupling number.

In some embodiments, the computing module is configured to: record the two bits after the change as the new register, and record the two bits before the change as the old register; in response to the XOR result of the new register and the old register being 11, record the sub-coupling number as 2; in response to the XOR result of the data of the first bit and the second bit of the new register being one and the XOR result of the data of the first bit and the second bit of the old register being zero, record the sub-coupling number as 1; in other cases except the above two cases, the sub-coupling number is recorded as 0.

In some implementations, the calculation module is configured to: set a flip flag according to the coupling times and the value of the group enable, and process the parity lines in the group accordingly.

In some embodiments, the computing module is configured to: in response to the coupling number being less than or equal to a third value, set the flip flag to zero and perform no flipping; in response to the coupling number being greater than the third value, determine the value of the flip flag and the object of the flip operation according to grouping enable.

In some embodiments, the computing module is configured to: in response to the grouping enable being a third enable value, set the flip flag position to one and flip the even lines within the group; in response to the grouping enable being a second enable value, set the flip flag position to two and flip the odd lines within the group; in cases other than the above two cases, set the flip flag position to zero and do not perform any flipping processing.

Based on the above purpose, the third aspect of the embodiment of the present application proposes a computer device, including: at least one processor; a memory, the memory storing computer instructions that can be run on the processor, the instructions are executed by the processor to implement the following steps: S1, dividing the parallel data lines into multiple groups according to the length of the bit, and performing data flow detection and feature extraction on each group; S2, calculating the group enable of each group according to the extracted features, and judging whether the group enable is greater than or equal to a threshold; S3, calculating the coupling times of the groups whose group enable is greater than or equal to the threshold, and performing a flip calculation based on the coupling times and the value of the group enable; S4, transmitting the first data after the flip calculation and the second data of the group whose group enable is less than the threshold to the next level.

In some implementations, calculating the grouping enable of each group according to the extracted features includes: generating the grouping enable according to a data change rate in a previous detection cycle.

In some implementations, generating a group enable according to a data change rate of a previous detection cycle includes: generating a detection cycle according to a preset condition.

In some embodiments, calculating the first number of data changes in the current detection cycle includes: setting a first counter, In response to a data bit having data changes among all the data bits, the first counter is incremented by one.

In some embodiments, calculating the second number of data changes in each group in the current detection cycle includes: setting a second counter in each group, and in response to a data bit in the group where data has changed, adding one to the second counter of the corresponding group.

In some embodiments, determining the grouping enable of each small group based on the data change rate includes: in response to the data change rate being less than a first value, setting the grouping enable to a first enable value; in response to the data change rate being between the first value and the second value, setting the grouping enable to a second enable value; in response to the data change rate being greater than the second value, setting the grouping enable to a third enable value, wherein the first enable value is less than the second enable value, and the second enable value is less than the third enable value.

In some implementations, calculating the number of couplings of the subgroups whose group enable is greater than or equal to a threshold includes: setting the threshold to be equal to a second enable value.

In some implementations, the steps further include: in response to the grouping enable of the group being less than a threshold, setting the coding enable of the group to zero.

As shown in FIG. 7 , it is a schematic diagram of the hardware structure of an embodiment of the above-mentioned coded computer device provided in the present application.

Taking the device shown in FIG. 7 as an example, the device includes a processor 301 and a memory 302 .

The processor 301 and the memory 302 may be connected via a bus or other means, and FIG7 takes the connection via a bus as an example.

The memory 302 is a non-volatile, non-volatile readable storage medium that can be used to store non-volatile software programs, non-volatile computer executable programs and modules, such as program instructions/modules corresponding to the encoding method in the embodiment of the present application. The processor 301 executes various functional applications and data processing of the server by running the non-volatile software programs, instructions and modules stored in the memory 302, that is, implementing the encoding method.

The memory 302 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the encoding method, etc. In addition, the memory 302 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 302 may optionally include a memory remotely arranged relative to the processor 301, and these remote memories may be connected to the local module via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

Computer instructions 303 corresponding to one or more encoding methods are stored in the memory 302, and when executed by the processor 301, the encoding method in any of the above method embodiments is executed.

Any embodiment of a computer device that executes the above encoding method can achieve the same or similar effect as any corresponding embodiment of the above method.

The present application also provides a non-volatile readable storage medium, which stores a computer program that performs the encoding method when executed by a processor.

As shown in Figure 8, it is a schematic diagram of an embodiment of the computer storage medium of the above coding provided by the present application. Taking the computer storage medium shown in Figure 8 as an example, the non-volatile readable storage medium 401 stores a computer program 402 that performs the above method when executed by a processor.

Finally, it should be noted that a person skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the program of the encoding method can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above-mentioned methods. The storage medium of the program can be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc. The above-mentioned computer The program embodiments can achieve the same or similar effects as the corresponding any of the aforementioned method embodiments.

The above are exemplary embodiments disclosed in the present application, but it should be noted that various changes and modifications may be made without departing from the scope disclosed in the embodiments of the present application as defined in the claims. The functions, steps and/or actions of the method claims according to the disclosed embodiments described herein do not need to be performed in any particular order. In addition, although the elements disclosed in the embodiments of the present application may be described or required in individual form, they may also be understood as multiple unless explicitly limited to the singular.

It should be understood that, as used herein, the singular forms "a", "an" are intended to include the plural forms as well, unless the context clearly supports an exception. It should also be understood that, as used herein, "and/or" refers to any and all possible combinations including one or more of the associated listed items.

The serial numbers of the embodiments disclosed in the above-mentioned embodiments of the present application are only for description and do not represent the advantages or disadvantages of the embodiments.

A person skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in a non-volatile readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.

A person of ordinary skill in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the disclosure of the embodiments of the present application (including the claims) is limited to these examples; under the idea of the embodiments of the present application, the technical features in the above embodiments or different embodiments may also be combined, and there are many other changes in different aspects of the embodiments of the present application as above, which are not provided in detail for the sake of simplicity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application shall be included in the protection scope of the embodiments of the present application.

Claims

A coding method, characterized in that it comprises the following steps:

The parallel data lines are divided into multiple groups according to the bit length, and data flow detection and feature extraction are performed on each group;

Calculate the grouping enable of each group based on the extracted features, and determine whether the grouping enable is greater than or equal to a threshold;

Calculate the coupling times of the groups whose group enable is greater than or equal to the threshold, and perform flip calculation according to the coupling times and the value of the group enable;

The first data after flip calculation and the second data of the group whose grouping is enabled to be less than the threshold are transmitted to the next stage.
The method according to claim 1, wherein dividing the parallel data lines into a plurality of groups according to the length of the bits comprises:

Set the minimum packet length to one bit and the maximum packet length to half the data bit.
The method according to claim 1, characterized in that the step of calculating the grouping enable of each group based on the extracted features comprises:

The packet enable is generated according to the data change rate of the previous detection cycle.
The method according to claim 3, characterized in that generating a packet enable according to the data change rate of a previous detection cycle comprises:

Generates a detection cycle based on preset conditions.
The method according to claim 4, characterized in that the generating of the grouping enable according to the data change rate of the previous detection cycle comprises:

Calculate the first number of data changes in the current detection cycle;

Calculate the second number of changes in each group data within the current detection cycle;

Calculate the data change rate of each group according to the first number of times and the second number of times;

The grouping enable of each group is determined according to the data change rate.
The method according to claim 5, characterized in that the calculating the first number of data changes in the current detection cycle comprises:

A first counter is set, and in response to a data bit having a data change among all the data bits, the first counter is incremented by one.
The method according to claim 5, characterized in that the calculating the second number of changes in each group data in the current detection cycle comprises:

A second counter is set in each group, and in response to a data bit having data changes in the group, the second counter of the corresponding group is incremented by one.
The method according to claim 5, characterized in that the step of calculating the data change rate of each group according to the first number of times and the second number of times comprises:

The ratio of the second number of times to the first number of times is used as the data change rate of each group.
The method according to claim 5, characterized in that the determining the grouping enable of each group according to the data change rate comprises:

In response to the data change rate being less than a first value, setting the grouping enable to a first enable value;

In response to the data change rate being between the first value and the second value, setting the grouping enable to a second enable value;

In response to the data change rate being greater than the second value, setting the grouping enable to a third enable value,

The first enable value is smaller than the second enable value, and the second enable value is smaller than the third enable value.
The method according to claim 9, characterized in that the calculating the number of couplings of the small groups that enable grouping to be greater than or equal to the threshold comprises:

Determine whether the grouping enable of each group is greater than or equal to the threshold;

In response to the grouping enable of the group being greater than or equal to a threshold, the coding enable of the group is set to one, and the coupling times of the group are calculated.
The method according to claim 10, characterized in that the calculating the number of couplings of the small groups that enable grouping to be greater than or equal to the threshold comprises:

The threshold is set equal to the first enabling value.
The method according to claim 11, characterized in that the method further comprises:

In response to the grouping enable of the group being less than a threshold, the encoding enable of the group is set to zero.
The method according to claim 11, characterized in that the calculating the number of couplings of the small groups that enable grouping to be greater than or equal to the threshold comprises:

The number of sub-couplings between every two adjacent bits is calculated through an XOR operation, and the number of sub-couplings in the group is added together to obtain the coupling number.
The method according to claim 13, characterized in that the calculating the number of sub-couplings between every two adjacent bits by XOR operation comprises:

The two bits after the change are recorded as the new register, and the two bits before the change are recorded as the old register;

In response to the XOR result of the new register and the old register being 11, recording the number of sub-couplings as 2;

In response to the XOR result of the data of the first bit and the second bit of the new register being one and the XOR result of the data of the first bit and the second bit of the old register being zero, recording the sub-coupling number as 1;

In all cases except the above two, the sub-coupling times are recorded as 0.
The method according to claim 1, characterized in that the coupling times and grouping enabled The value flip calculation includes:

The flip flag is set according to the coupling times and the value of the grouping enable, and the parity lines in the group are processed accordingly.
The method according to claim 15, characterized in that the step of setting a flip flag bit according to the coupling times and the value of the grouping enable and processing the parity lines in the group accordingly comprises:

In response to the coupling number being less than or equal to a third value, setting the flip flag to zero and not performing flip processing;

In response to the coupling number being greater than the third value, the value of the flip flag bit and the object of the flip operation are determined according to the grouping enable.
The method according to claim 16, wherein determining the value of the flip flag bit and the object of the flip operation according to the group enable comprises:

In response to the group enable being a third enable value, the flip flag is set to 1, and the even lines in the group are flipped;

In response to the group enable being a second enable value, the flip flag is set to 2, and the odd lines in the group are flipped;

In cases other than the above two, the flip flag is set to zero and no flipping is performed.
A coding system, characterized in that it comprises:

A grouping module, configured to divide the parallel data lines into a plurality of groups according to the length of the bits, and perform data flow detection and feature extraction on each group;

A judgment module, configured to calculate the grouping enable of each group according to the extracted features, and judge whether the grouping enable is greater than or equal to a threshold;

A calculation module configured to calculate the coupling times of the groups whose grouping enable is greater than or equal to the threshold, and perform a flip calculation according to the coupling times and the value of the grouping enable;

The transmission module is configured to transmit the first data after the flip calculation and the second data of the group whose grouping enable is less than the threshold to the next level.
A computer device, comprising:

at least one processor;

A memory storing computer instructions executable on the processor, wherein the instructions, when executed by the processor, implement the steps of the method according to any one of claims 1 to 17.
A non-volatile readable storage medium storing a computer program, wherein the computer program implements the steps of the method according to any one of claims 1 to 17 when executed by a processor.