WO2024087881A1 - 时钟同步方法、装置、系统、设备及存储介质 - Google Patents

时钟同步方法、装置、系统、设备及存储介质 Download PDF

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Publication number
WO2024087881A1
WO2024087881A1 PCT/CN2023/116293 CN2023116293W WO2024087881A1 WO 2024087881 A1 WO2024087881 A1 WO 2024087881A1 CN 2023116293 W CN2023116293 W CN 2023116293W WO 2024087881 A1 WO2024087881 A1 WO 2024087881A1
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WIPO (PCT)
Prior art keywords
slave device
clock
clock difference
pulse signals
adjacent pulse
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PCT/CN2023/116293
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English (en)
French (fr)
Inventor
赵旭
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Oppo广东移动通信有限公司
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Publication of WO2024087881A1 publication Critical patent/WO2024087881A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements

Definitions

  • the embodiments of the present application relate to the field of communication technology, and in particular to a clock synchronization method, apparatus, system, device and storage medium.
  • low-latency communication requirements exist in some scenarios, such as the need to maintain low-latency communication between devices in augmented reality technology and virtual reality technology.
  • the Bluetooth Low Energy (BLE) protocol is used to achieve low-latency communication.
  • packet loss may occur.
  • communication interference between multiple devices, which affects the use of the device.
  • the embodiments of the present application provide a clock synchronization method, apparatus, system, device and storage medium.
  • the technical solution is as follows:
  • an embodiment of the present application provides a clock synchronization method, the method is used for a first slave device, the method comprising:
  • adjacent pulse signals are sent to the second slave device so that the second slave device determines a second clock difference, where the second clock difference is used for clock synchronization between the second slave device and the first slave device.
  • an embodiment of the present application provides a clock synchronization method, which is used for a master device, and the method includes:
  • Sending adjacent pulse signals to a first slave device the first slave device being used to determine a first clock difference based on a receiving time interval of receiving the adjacent pulse signals and a sending time interval of sending the adjacent pulse signals by the master device, the first clock difference being used for clock synchronization between the first slave device and the master device;
  • the first slave device is clock synchronized with the master device
  • the first slave device is further used to send adjacent pulse signals to the second slave device so that the second slave device determines a second clock difference
  • the second clock difference is used for the second slave device to perform clock synchronization with the first slave device.
  • an embodiment of the present application provides a clock synchronization device, the device comprising:
  • a first receiving module used for receiving adjacent pulse signals sent by a master device
  • a first determination module configured to determine a first clock difference based on a reception time interval of the adjacent pulse signals and a sending time interval of the adjacent pulse signals sent by the master device, wherein the first clock difference is used for clock synchronization between the first slave device and the master device;
  • the first sending module is used to send adjacent pulse signals to the second slave device when the first slave device maintains clock synchronization with the master device, so that the second slave device determines a second clock difference, and the second clock difference is used for the second slave device to perform clock synchronization with the first slave device.
  • an embodiment of the present application provides a clock synchronization device, the device comprising:
  • a second sending module is used to send adjacent pulse signals to a first slave device, the first slave device is used to determine a first clock difference based on a receiving time interval of the adjacent pulse signals and a sending time interval of the adjacent pulse signals sent by the master device, the first clock difference is used for the first slave device to maintain clock synchronization with the master device; when the first slave device is clock synchronized with the master device, the first slave device is also used to send adjacent pulse signals to a second slave device so that the second slave device determines a second clock difference, the second clock difference is used for the second slave device to perform clock synchronization with the first slave device.
  • an embodiment of the present application provides a clock synchronization system, the system comprising a master device, a first slave device, and a second slave device;
  • the master device is used to send adjacent pulse signals to the first slave device
  • the first slave device is used to receive the adjacent pulse signals sent by the master device; based on the receiving time interval of the adjacent pulse signals and the sending time interval of the adjacent pulse signals sent by the master device, determine a first clock difference, and the first clock difference is used for the first slave device to perform clock synchronization with the master device; when the first slave device maintains clock synchronization with the master device, send adjacent pulse signals to the second slave device;
  • the second slave device is used to determine a second clock difference, and the second clock difference is used for clock synchronization between the second slave device and the first slave device.
  • an embodiment of the present application provides an electronic device, comprising a processor and a memory; the memory stores at least one instruction, and the at least one instruction is used to be executed by the processor to implement the clock synchronization method as described in the above aspect.
  • an embodiment of the present application provides a computer-readable storage medium, wherein the storage medium stores at least one instruction, and the at least one instruction is used to be executed by a processor to implement the clock synchronization method as described in the above aspects.
  • an embodiment of the present application provides a computer program product or a computer program, which includes a computer instruction stored in a computer-readable storage medium.
  • a processor of an electronic device reads the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the electronic device executes the clock synchronization method provided in various optional implementations of the above aspects.
  • FIG1 is a schematic diagram showing an implementation environment provided by an exemplary embodiment of the present application.
  • FIG2 shows a flow chart of a clock synchronization method provided by an exemplary embodiment of the present application
  • FIG3 is a schematic diagram showing a signal transmission process of a clock synchronization process provided by an exemplary embodiment of the present application
  • FIG4 shows a flow chart of a clock synchronization method provided by another exemplary embodiment of the present application.
  • FIG5 is a schematic diagram showing signal transmission in a clock synchronization process provided by another exemplary embodiment of the present application.
  • FIG6 shows a flow chart of a clock synchronization method provided by another exemplary embodiment of the present application.
  • FIG7 shows a schematic diagram of signal transmission in a clock synchronization process provided by another exemplary embodiment of the present application.
  • FIG8 shows a flow chart of a clock synchronization method provided by another exemplary embodiment of the present application.
  • FIG9 is a schematic diagram showing signal transmission in a clock synchronization process provided by another exemplary embodiment of the present application.
  • FIG10 is a schematic diagram showing a signal frame of a clock synchronization process provided by an exemplary embodiment of the present application.
  • FIG11 shows a structural block diagram of a clock synchronization device provided by an exemplary embodiment of the present application.
  • FIG12 shows a structural block diagram of a clock synchronization device provided by an exemplary embodiment of the present application.
  • FIG. 13 shows a structural block diagram of an electronic device provided by an exemplary embodiment of the present application.
  • FIG. 1 shows a schematic diagram of an implementation environment provided by an exemplary embodiment of the present application.
  • the implementation environment includes a master device 101 , a first slave device 102 , and a second slave device 103 .
  • the main device 101 is an electronic device with a communication function.
  • the main device may be a head-mounted display device.
  • the head-mounted display device may be an augmented reality (AR) device, a virtual reality (VR) device, or an audio-visual device that integrates AR and VR.
  • AR augmented reality
  • VR virtual reality
  • audio-visual device that integrates AR and VR.
  • the first slave device 102 and the second slave device 103 are electronic devices that can communicate with the master device 101.
  • a communication connection is established between the first slave device 102 and the second slave device 103.
  • the master device 101 is a head mounted display device
  • the first slave device 102 and the second slave device 103 can be control devices for sending instructions to the master device 101.
  • the master device 101, the first slave device 102, and the second slave device 103 may also be other electronic devices with communication functions, such as smart phones, tablet computers, wearable devices, personal computers, etc., which are not limited in this embodiment.
  • the communication connection between the master device 101 and the first slave device 102 and the second slave device 103 can be established wirelessly, for example, a Bluetooth connection, a Wireless Fidelity (WiFi) connection, or a mobile data network connection, etc., which is not limited in this embodiment.
  • a Bluetooth connection for example, a Bluetooth connection, a Wireless Fidelity (WiFi) connection, or a mobile data network connection, etc., which is not limited in this embodiment.
  • the master device 101 may send adjacent pulse signals to the first slave device 102, so that the first slave device 102 determines the first clock difference between the two, and achieves clock synchronization with the master device 101.
  • the first slave device 102 may send a pulse signal to the second slave device 103, so that the second slave device determines the second clock difference, and achieves clock synchronization with the first slave device 102, thereby achieving progressive clock synchronization between multiple devices.
  • FIG. 2 shows a flow chart of a clock synchronization method provided by an exemplary embodiment of the present application, the method comprising:
  • Step 201 The master device sends an adjacent pulse signal to the first slave device.
  • the master device sends a pulse signal to the first slave device at intervals, and the master device sends at least one group of adjacent pulse signals to the first slave device, wherein a group of adjacent pulse signals includes two adjacent pulse signals.
  • the pulse signal carries time information for enabling the first slave device to determine the time interval for sending.
  • the time information includes at least one of timestamp information and time interval information for sending. The timestamp information is used to indicate the sending time of the pulse signal.
  • the master device continuously sends a pulse signal to the first slave device.
  • the master device may send the pulse signal at random intervals, or may send the pulse signal at fixed target intervals, which is not limited in this embodiment.
  • the target interval may be 30us, and the master device sends a pulse signal to the first slave device at intervals of 30us.
  • Step 202 The first slave device receives adjacent pulse signals sent by the master device.
  • the first slave device may record the receiving time of the at least one group of pulse signals for clock synchronization.
  • Step 203 The first slave device determines a first clock difference based on a reception time interval of adjacent pulse signals and a transmission time interval of adjacent pulse signals sent by the master device.
  • the first clock difference is used for clock synchronization between the first slave device and the master device.
  • the time interval for the first slave device to receive a pulse signal is the same as the time interval for the master device to send a pulse signal; when the clocks between the master device and the first slave device are not synchronized, there is a deviation between the time interval for the first slave device to receive a pulse signal and the time interval for the master device to send a pulse signal. Therefore, in an embodiment of the present application, the difference between the receiving time interval and the sending time interval is used to determine the clock difference between the devices and perform clock correction.
  • the receiving time interval and the sending time interval are the time intervals between the receiving end and the sending end of the same group of adjacent pulse signals.
  • the first slave device after receiving the pulse signal sent by the master device, can record the receiving time and obtain the last receiving time of the pulse signal sent by the master device, thereby determining the receiving time interval based on the current receiving time and the last receiving time.
  • the first slave device After receiving the pulse signal sent by the master device, the first slave device can obtain the timestamp information in the pulse signal. And the timestamp information in the pulse signal received from the main device last time can be obtained, so as to determine the sending time interval according to the current timestamp information and the last timestamp information.
  • the sending time interval for sending adjacent pulse information in the pulse signal may be directly acquired.
  • the first slave device may determine a first clock difference according to the difference between the receiving time interval and the sending time interval.
  • the first slave device may determine the first clock difference according to the average of the differences between multiple groups of receiving time intervals and sending time intervals.
  • the receiving time interval T2 can be determined based on the receiving time of the first pulse signal 301 and the second pulse signal 302, and the sending time interval T1 can be determined based on the sending time of the first pulse signal 301 and the second pulse signal 302, and the clock difference t1 is determined according to the sending time interval T1 and the receiving time interval T2; and the receiving time interval T2 can also be determined based on the receiving time of the second pulse signal 302 and the third pulse signal 303, and the sending time interval T1 is determined based on the sending time of the second pulse signal 302 and the third pulse signal 303, and the clock difference t2 is determined according to the sending time interval T1 and the receiving time interval T2, so as to determine the first clock difference according to the average of the clock difference t1 and the clock difference t2.
  • the first slave device may adjust clock parameters according to the first clock difference so that the first slave device maintains clock synchronization with the master device.
  • Step 204 When the clocks of the first slave device and the master device are synchronized, the first slave device sends an adjacent pulse signal to the second slave device so that the second slave device determines a second clock difference, and the second clock difference is used for clock synchronization between the second slave device and the first slave device.
  • the communication may also include communication with the second slave device, wherein the second slave device is a device different from the first slave device.
  • the first slave device sends an adjacent pulse signal to the second slave device after maintaining clock synchronization with the master device using the first clock difference.
  • the second slave device can determine the sending time interval of the adjacent pulse signal sent by the first slave device, and the receiving time interval of the adjacent pulse signal received, thereby determining the second clock difference using the receiving time interval and the sending time interval.
  • the second slave device After determining the second clock difference, the second slave device adjusts the clock parameters according to the second clock difference, thereby maintaining clock synchronization with the first slave device. Since the first slave device maintains clock synchronization with the master device, after the second slave device maintains clock synchronization with the first slave device, progressive clock synchronization can be achieved between the master device, the first slave device, and the second slave device.
  • the first slave device sends a pulse signal to the second slave device
  • the second slave device determines a second clock difference according to the receiving time interval T4 and the sending time interval T3, thereby adjusting the clock parameters according to the second clock difference to maintain synchronization with the clock of the first slave device.
  • the master device can send adjacent pulse signals to the first slave device, and the first slave device determines the first clock difference between the master device and the first slave device according to the receiving time interval of the adjacent pulse signals and the sending time interval of the pulse signals sent by the master device, so that the first clock difference can be used to adjust the clock and keep the clock synchronization with the master device.
  • the first slave device can also send adjacent pulse signals to the second slave device, so that the second slave device can keep the clock synchronization with the first slave device, so that the second slave device can also keep the clock synchronization with the master device, and realize progressive clock synchronization, which can reduce interference in the communication process of multiple devices and improve the communication quality.
  • receiving adjacent pulse signals sent by the master device includes:
  • determining the first clock difference based on a reception time interval of adjacent pulse signals and a transmission time interval of adjacent pulse signals sent by the master device includes:
  • a first clock difference is determined based on an average of the time interval differences.
  • the method further includes:
  • the clock parameters are adjusted to synchronize with the master device clock.
  • the pulse signal includes timestamp information, and determining the first clock difference based on a reception time interval of adjacent pulse signals and a transmission time interval of adjacent pulse signals sent by the master device includes:
  • a first clock difference is determined based on a time difference between the receiving time interval and the sending time interval.
  • the master device is used to send adjacent pulse signals to the second slave device, so that the second slave device determines a fourth clock difference, and the fourth clock difference is used for clock synchronization between the second slave device and the master device.
  • the second slave device is further used to send adjacent pulse signals to the first slave device and the master device, and the master device is used to determine the fifth clock difference after receiving the adjacent pulse signals;
  • the method further includes:
  • a master clock difference with the master device is determined, and a slave clock difference with the second slave device is determined.
  • determining a master clock difference with a master device includes:
  • determining a slave clock difference with a second slave device based on each clock difference includes:
  • the slave clock difference is determined based on the sixth clock difference, the eighth clock difference, and an average of the indirect slave clock difference.
  • the master device, the first slave device, and the second slave device cyclically send adjacent pulse signals; based on each clock difference, determining a master clock difference between the master device and the first slave device, and determining a slave clock difference between the second slave device and the first slave device, includes:
  • the master clock difference with the master device and the slave clock difference with the second slave device are determined, where n is a positive integer.
  • sending an adjacent pulse signal to the second slave device includes:
  • Adjacent pulse signals are sent to the second slave device on at least two frequency hopping channels.
  • the method further includes:
  • the ninth clock difference is sent to the second slave device, so that the second slave device adjusts the clock parameter according to the average of the second clock difference and the ninth clock difference.
  • the master device is a head-mounted display device
  • the first slave device and the second slave device are handle devices.
  • sending an adjacent pulse signal to the first slave device includes:
  • Adjacent pulse signals are sent to a first slave device on at least two frequency hopping channels.
  • the first slave device is also used to determine a first clock difference based on an average of each time interval difference.
  • the time interval difference is determined based on a receiving time interval of adjacent pulse signals received on the frequency hopping channel and a sending time interval of adjacent pulse signals sent by the master device.
  • the method further includes:
  • the third clock difference is sent to the first slave device, so that the first slave device adjusts the clock parameters based on the average of the first clock difference and the third clock difference, so as to synchronize with the master device clock.
  • the method further includes:
  • An adjacent pulse signal is sent to the second slave device so that the second slave device determines a fourth clock difference, and the fourth clock difference is used for clock synchronization between the second slave device and the master device.
  • a frequency hopping synchronization method can be used to reduce the clock difference error. The following will be described with exemplary embodiments.
  • FIG. 4 shows a flow chart of a clock synchronization method provided by another exemplary embodiment of the present application, the method comprising:
  • Step 401 The master device sends adjacent pulse signals to the first slave device on at least two frequency hopping channels.
  • the master device can send pulse signals on at least two frequency hopping channels.
  • the at least two frequency hopping channels are a group of channels pre-configured, including channels of different frequency bands.
  • the at least two frequency hopping channels may include ch0, ch39 and ch78, and the master device may send at least one group of pulse signals on three different working channels.
  • the master device sends pulse signals on at least two frequency hopping channels in turn, that is, adjacent pulse signals sent by the master device are transmitted through different channels.
  • the at least two frequency hopping channels include ch0, ch39 and ch78
  • the master device can send pulse signals on ch0, ch39 and ch78 in turn.
  • the master device may cyclically send pulse signals on at least two frequency hopping channels.
  • the master device may cyclically send pulse signals on ch0, ch39 and ch78 to the first slave device.
  • Step 402 The first slave device receives adjacent pulse signals sent by the master device on at least two frequency hopping channels.
  • the first slave device can receive adjacent pulse signals sent by the master device on the frequency hopping channel, thereby determining the first clock difference according to adjacent pulse signals received on different channels, which can reduce the probability of synchronization failure due to interference with the synchronization channel.
  • Step 403 The first slave device determines a time interval difference based on a reception time interval of adjacent pulse signals received on the frequency hopping channel and a transmission time interval of adjacent pulse signals sent by the master device.
  • the first slave device determines the receiving time interval according to the receiving time of adjacent pulse signals received on two frequency hopping channels.
  • the master device sends pulse signals to the first slave device on ch0, ch39, and ch78 in sequence, wherein the pulse signals transmitted on ch0 and ch39 are adjacent pulse signals, and the pulse signals transmitted on ch39 and ch78 are adjacent pulse signals.
  • the first slave device can determine the receiving time interval T2 according to the receiving time of the adjacent pulse signals received on ch0 and ch39. And the receiving time interval T2 can also be determined according to the receiving time of the adjacent pulse signals received on ch39 and ch78.
  • the first slave device After determining the receiving time interval, the first slave device can determine the sending time interval of the adjacent pulse signals sent by the master device on the two frequency hopping channels. In a possible implementation, the first slave device can calculate the sending time interval of receiving adjacent pulse signals using the timestamp information in the adjacent pulse signals.
  • the first slave device determines the receiving time interval according to the receiving time of the adjacent pulse signals received on ch0 and ch39, it can also determine the sending time interval T1 of the adjacent pulse signals transmitted on ch0 and ch39 according to the timestamp information in the pulse signal; after the first slave device determines the receiving time interval according to the receiving time of the adjacent pulse signals received on ch39 and ch78, it can also determine the sending time interval T1 of the adjacent pulse signals transmitted on ch39 and ch78 according to the timestamp information in the pulse signal.
  • the sending time interval T1 of adjacent pulse signals is input.
  • the first slave device determines the first clock difference according to the difference between the determined receiving time interval and the sending time interval.
  • the receiving time interval and the sending time interval are for adjacent pulse signals in the same group.
  • the first clock difference is determined according to the receiving time interval and the sending time interval of adjacent pulse signals transmitted on ch0 and ch39; the first clock difference may also be determined according to the receiving time interval and the sending time interval of adjacent pulse signals transmitted on ch39 and ch78.
  • the first slave device may determine the first clock difference based on the difference between multiple groups of receiving time intervals and sending time intervals, i.e., the time interval difference.
  • the first slave device determines the first clock difference based on the average of each time interval difference, and different time interval differences are determined according to the receiving time intervals and sending time intervals of different groups of adjacent pulse signals, wherein the adjacent frequency hopping channels corresponding to the adjacent pulse signals of different groups are different.
  • the first slave device can receive multiple groups of adjacent pulse signals. Thereafter, the time interval difference can be determined based on the receiving time interval and the sending time interval of the multiple groups of adjacent pulse signals. Finally, the first clock difference is determined based on the average of the multiple groups of time interval differences.
  • the first slave device can determine the first clock difference based on the average of the time difference t1 determined by the receiving time interval and the sending time interval of adjacent pulse signals transmitted on ch0 and ch39 and the time difference t2 determined by the receiving time interval and the sending time interval of adjacent pulse signals transmitted on ch39 and ch78.
  • the first slave device can determine the first clock difference as the average of the time interval differences corresponding to each group of adjacent pulse signals circulated twice on ch0, ch39 and ch78 by the master device.
  • Step 404 When the clocks of the first slave device and the master device are synchronized, the first slave device sends adjacent pulse signals to the second slave device on at least two frequency hopping channels.
  • the first slave device when the first slave device sends a pulse signal to the second slave device, it may also be sent on at least two frequency hopping channels, so that the second slave device determines the second clock difference based on the receiving time interval and the sending time interval of adjacent pulse signals received on different channels, thereby reducing the error of the second clock difference.
  • a pulse signal can be sent on the frequency hopping channel, so that the clock difference between the devices can be determined based on the receiving time interval and the sending time interval of the pulse signal received on different channels, which can reduce the probability of synchronization failure due to channel interference and improve the synchronization success rate.
  • FIG. 6 shows a flowchart of a clock synchronization method provided by another exemplary embodiment of the present application.
  • the present application embodiment takes the method applied to a first slave device as an example for explanation.
  • the method includes:
  • Step 601 The master device sends an adjacent pulse signal to the first slave device.
  • Step 602 The first slave device receives adjacent pulse signals sent by the master device.
  • steps 601-602 may refer to the above steps 201-202, which will not be described in detail in this embodiment.
  • Step 603 The first slave device determines a first clock difference based on a reception time interval of adjacent pulse signals and a transmission time interval of adjacent pulse signals sent by the master device.
  • the first slave device determining the first clock difference may include the following steps:
  • Step 603a determining a receiving time interval based on the receiving time of adjacent pulse signals.
  • the receiving time of two adjacent pulse signals can be determined according to the current receiving time and the receiving time of the last received pulse signal, thereby determining the receiving time interval according to the receiving time.
  • Step 603b Determine the sending time interval based on the timestamp information included in the adjacent pulse signals.
  • the first slave device may also determine the time interval between two adjacent pulse signals sent by the master device according to the timestamp information respectively included in the two adjacent pulse signals.
  • Step 603c determine a first clock difference based on the time difference between the receiving time interval and the sending time interval.
  • the first slave device After determining the receiving time interval and the sending time interval, the first slave device can use the time difference between the two to determine the first clock difference.
  • the receiving time interval and the sending time interval are determined based on the receiving time and the sending time of the same group of pulse signals.
  • the first slave device may determine the first clock difference by using an average of clock differences determined by multiple groups of pulse signals, thereby improving the accuracy of the first clock difference.
  • Step 604 The first slave device sends adjacent pulse signals to the master device, so that the master device determines a third clock difference.
  • the first slave device may send at least one set of pulse signals to the master device, so that the master device determines the clock difference between the two according to the received pulse signals. Since the pulse signal sent by the master device to the first slave device and the pulse signal sent by the first slave device to the master device are not transmitted through the same physical path, the synchronization error can be reduced.
  • Step 605 The master device receives adjacent pulse signals sent by the first slave device.
  • Step 606 The master device determines a third clock difference based on a reception time interval of adjacent pulse signals and a transmission time interval of adjacent pulse signals sent by the first slave device.
  • the master device After the master device receives the pulse signal sent by the first slave device, the master device determines the third clock difference based on the receiving time interval of adjacent pulse signals and the sending time interval of adjacent pulse signals, that is, the master device calculates the clock difference between itself and the first slave device to realize a two-way synchronization process.
  • the process of the master device determining the third clock difference may refer to the process of the first slave device determining the first clock difference, which will not be described in detail in this embodiment.
  • the master device sends a pulse signal to the first slave device, and the first slave device can determine the first clock difference based on the receiving time interval T2 and the sending time interval T1; the first slave device can also send a pulse signal to the master device, and the master device can determine the third clock difference based on the receiving time interval T4 and the sending time interval T3.
  • Step 607 The master device sends a third clock difference to the first slave device.
  • the master device can adjust its own clock parameters according to the third clock difference, so as to maintain clock synchronization with the first slave device.
  • the master device can also send the third clock difference to the first slave device, and the first slave device determines the clock difference between itself and the master device according to the first clock difference determined by itself and the third clock difference sent by the master device, so as to improve the accuracy of the clock difference.
  • this embodiment only describes the manner in which the master device sends a pulse signal to synchronize the first slave device and the first slave device sends a pulse signal to synchronize the master device, and does not limit the timing of the master device sending the pulse signal and the first slave device sending the pulse signal.
  • the master device sends the third clock difference to the first slave device by sending a pulse signal including the third clock difference.
  • Step 608 The first slave device receives the third clock difference sent by the master device.
  • the first slave device may determine the third clock difference from the time information included in the received pulse signal.
  • Step 609 Adjust the clock parameters based on the average of the first clock difference and the third clock difference to synchronize with the master device clock.
  • the first slave device after receiving the third clock difference sent by the master device, determines the average of the first clock difference and the third clock difference as the clock difference between the first slave device and the master device, and adjusts the clock parameters according to the clock difference to maintain clock synchronization with the master device.
  • frequency hopping synchronization or bidirectional synchronization can be used to reduce synchronization error.
  • frequency hopping synchronization and bidirectional synchronization can be used simultaneously to improve synchronization accuracy.
  • the master device may send a pulse signal to the first slave device on the frequency hopping channel, so that the first slave device determines the first clock difference between the first slave device and the master device according to the adjacent pulse signals received on the frequency hopping channel; and then, the first slave device may also send a pulse signal to the master device on the frequency hopping channel, so that the master device determines the first clock difference between the first slave device and the master device according to the adjacent pulse signals received on the frequency hopping channel.
  • the frequency hopping channel through which the master device sends the pulse signal may be the same as the frequency hopping channel through which the first slave device sends the pulse signal, or may be different from the frequency hopping channel through which the first slave device sends the pulse signal. This embodiment does not limit this.
  • the synchronization error caused by channel interference and electromagnetic wave transmission problems can be reduced through frequency hopping synchronization and two-way synchronization.
  • Step 610 When the clocks of the first slave device and the master device are synchronized, the first slave device sends an adjacent pulse signal to the second slave device, so that the second slave device determines a second clock difference.
  • a pulse signal may be sent to the second slave device to enable the second slave device to determine a second clock difference between the second slave device and the first slave device.
  • Step 611 The first slave device receives adjacent pulse signals sent by the second slave device.
  • the second slave device may also send at least one group of pulse signals to the first slave device, so that the first slave device determines the clock difference between the first slave device and the second slave device.
  • the first slave device determines a ninth clock difference between itself and the second slave device based on the received adjacent pulse signals.
  • the first slave device determines the ninth clock difference between itself and the second slave device based on the sending time interval of adjacent pulse signals sent by the second slave device and the receiving time interval of pulse signals received by the second slave device. Thereafter, the ninth clock difference may be sent to the second slave device to improve the accuracy of the clock difference determined by the second slave device.
  • Step 613 The first slave device sends the ninth clock difference to the second slave device, so that the second slave device adjusts the clock parameter according to the average of the second clock difference and the ninth clock difference.
  • the second slave device determines the clock difference between itself and the first slave device based on the average of the second clock difference and the ninth clock difference, thereby adjusting the clock parameters, thereby realizing a bidirectional synchronization process between the first slave device and the second slave device and reducing synchronization errors.
  • bidirectional synchronization is achieved through a bidirectional transmission process in which the master device sends a pulse signal to the first slave device and the first slave device sends a pulse signal to the master device, thereby reducing the impact of electromagnetic wave transmission, reflection and multipath on synchronization during signal transmission, improving clock synchronization accuracy, and thus improving synchronization quality.
  • the clock synchronization between the master device, the first slave device and the second slave device is achieved through progressive synchronization.
  • the second slave device can directly determine the clock difference according to the pulse signal sent by the master device to achieve clock synchronization.
  • FIG. 8 shows a flowchart of a clock synchronization method provided by another exemplary embodiment of the present application.
  • the present embodiment of the present application takes the method applied to a first slave device as an example for explanation.
  • the method includes:
  • Step 801 The master device sends an adjacent pulse signal to the first slave device.
  • Step 802 The first slave device receives adjacent pulse signals sent by the master device.
  • Step 803 The first slave device determines a first clock difference based on a reception time interval of adjacent pulse signals and a transmission time interval of adjacent pulse signals sent by the master device.
  • steps 801-803 may refer to the above steps 201-203, which will not be described in detail in this embodiment.
  • Step 804 The master device sends an adjacent pulse signal to the second slave device, so that the second slave device determines a fourth clock difference, and the fourth clock difference is used for clock synchronization between the second slave device and the master device.
  • progressive clock synchronization when the master device and the second slave device are in a non-communicative state, in order to achieve clock synchronization among the master device, the first slave device and the second slave device, progressive clock synchronization may be used, that is, after the first slave device is clock-synchronized with the master device, the first slave device may send an adjacent pulse signal to the second slave device, so that the second slave device is clock-synchronized with the first slave device.
  • the second slave device is outside the communication range of the master device, or the received signal strength of the signal sent by the master device received by the second slave device is lower than the strength threshold, it is determined that the master device and the second slave device are in a non-communicative state.
  • the communication process between the master device and the second slave device can be used to achieve clock synchronization between the master device and the second slave device.
  • the master device sends adjacent pulse signals to the second slave device, so that the second slave device determines a fourth clock difference, where the fourth clock difference is used to keep the second slave device in clock synchronization with the master device.
  • the master device sends adjacent pulse signals to the second slave device, and the second slave device determines the fourth clock difference between itself and the master device based on the receiving time interval and sending time interval of the adjacent pulse signals, thereby adjusting the clock parameters according to the fourth clock difference to maintain clock synchronization with the master device.
  • Step 805 The first slave device receives adjacent pulse signals sent by the second slave device.
  • the master device when the master device and the second slave device are in a communicable state, the master device can send a pulse signal to the first slave device and the second slave device, thereby achieving clock synchronization among the three.
  • adjacent pulse signals can also be sent by the first slave device and the second slave device, so as to determine the clock difference between the devices according to the transmission process of pulse signals in different directions.
  • the second slave device is further used to send adjacent pulse signals to the first slave device and the master device, and the master device determines the fifth clock difference after receiving the adjacent pulse signals.
  • the second slave device may send pulse signals to the master device and the first slave device at regular intervals, and the master device may determine the fifth clock difference according to the receiving time interval and the sending time interval, which is the clock difference between the master device and the second slave device.
  • the first slave device may receive the pulse signal sent by the second slave device at regular intervals, and thus may determine the clock difference between the first slave device and the second slave device according to the received pulse signal.
  • Step 806 The first slave device determines a sixth clock difference based on a receiving time interval for receiving adjacent pulse signals and a sending time interval for sending adjacent pulse signals by the second slave device.
  • the first slave device determines a receiving time interval based on the reception time of adjacent pulse signals, and determines a sending time interval based on timestamp information carried in the adjacent pulse signals, thereby obtaining a sixth clock difference with the second slave device.
  • Step 807 The first slave device sends adjacent pulse signals to the master device and the second slave device, so that the master device determines the seventh clock difference, and the second slave device determines the eighth clock difference.
  • the first slave device may also send adjacent pulse signals to the master device and the second slave device. After the master device receives the adjacent pulse signals sent by the first slave device, it may determine the seventh clock difference between the master device and the first slave device according to the receiving time interval and the sending time interval; and after the second slave device receives the adjacent pulse signals sent by the first slave device, it may determine the eighth clock difference between the master device and the first slave device according to the receiving time interval and the sending time interval.
  • Step 808 The first slave device determines a master clock difference with the master device and a slave clock difference with the second slave device based on the clock differences.
  • the master device, the first slave device, and the second slave device send pulse signals to other devices respectively, and the clock differences between multiple groups of devices can be obtained.
  • the first slave device can determine the master clock difference between the master device and the first slave device based on multiple clock differences, and can determine the slave clock difference between the first slave device and the second slave device based on multiple clock differences.
  • the process of determining the master clock difference between the first slave device and the master device may include the following steps:
  • Step 1 Determine an indirect master clock difference between the first slave device and the master device based on the difference between the fifth clock difference and the sixth clock difference.
  • the fifth clock difference is the clock difference between the master device and the second slave device after the second slave device sends a pulse signal to the master device;
  • the sixth clock difference is the clock difference between the first slave device and the second slave device after the second slave device sends a pulse signal to the first slave device.
  • the first slave device can obtain the fifth clock difference from the master device and obtain the sixth clock difference from the second slave device.
  • the first slave device can determine the indirect master clock difference with the master device based on the difference between the two.
  • Step 2 Determine the master clock difference based on the average of the first clock difference, the seventh clock difference and the indirect master clock difference.
  • the first slave device can directly determine the state of the connection with the master device.
  • the first slave device also sends a pulse signal to the master device, and the master device can directly determine the clock difference between itself and the first slave device.
  • the first slave device may determine the clock difference with the master device based on the clock difference between the first slave device and the master device directly determined through pulse signal transmission between the devices, and the average of the clock differences between the first slave device and the master device indirectly determined.
  • the master device may send a pulse signal to the first slave device and the second slave device, the first slave device may determine the first clock difference according to the receiving time interval T2 and the sending time interval T1, and the second slave device may determine the fourth clock difference according to the receiving time interval T3 and the sending time interval T1; the first slave device may send a pulse signal to the master device and the second slave device, the master device may determine the seventh clock difference according to the receiving time interval T6 and the sending time interval T4, and the second slave device may determine the eighth clock difference according to the receiving time interval T5 and the sending time interval T4; the second slave device may send a pulse signal to the master device and the first slave device, the master device may determine the fifth clock difference according to the receiving time interval T9 and the sending time interval T8, and the first slave device may determine the sixth clock difference according to the receiving time interval T7 and the sending time interval T8.
  • the first slave device may determine the clock difference between the first slave device and the master device according to the first clock difference determined with the first slave device, the seventh clock difference determined by the master device, and the indirect master clock difference indirectly determined according to the fifth clock difference and the sixth clock difference.
  • Step 1 Determine an indirect slave clock difference between the first slave device and the second slave device based on the difference between the first clock difference and the fourth clock difference.
  • the first clock difference is the clock difference between the first slave device and the master device after the master device sends a pulse signal to the first slave device
  • the fourth clock difference is the clock difference between the second slave device and the master device after the master device sends a pulse signal to the second slave device. That is, the first clock difference and the fourth clock difference are the clock differences of different slave devices relative to the master device. Therefore, the indirect slave clock difference between the first slave device and the second slave device can be determined based on the difference between the first clock difference and the fourth clock difference.
  • Step 2 Determine the slave clock difference based on the sixth clock difference, the eighth clock difference and the average of the indirect slave clock difference.
  • the sixth clock difference and the eighth clock difference are clock differences directly determined according to the transmission process of the pulse model between the first slave device and the second slave device.
  • the first slave clock can determine the slave clock difference between the first slave clock difference and the second slave clock difference according to the average of the sixth clock difference, the eighth clock difference and the indirect slave clock difference.
  • the first slave device After the first slave device synchronizes with the master device using the master clock difference, it can also send the slave clock difference to the second slave device, so that the second slave device adjusts the clock parameters according to the slave clock difference and maintains clock synchronization with the first slave device, thereby achieving clock synchronization between multiple devices.
  • the first slave device does not need to determine the slave clock difference
  • the second slave device determines the master clock difference with the master device based on the fourth clock difference, the fifth clock difference, and the indirect master clock difference determined based on the difference between the seventh clock difference and the eighth clock difference, and adjusts the clock parameters based on the master clock difference. That is, each slave device determines the clock difference with the master device based on the clock difference obtained by the pulse signal sent alternately between the devices, and maintains clock synchronization with the master device.
  • the master device, the first slave device, and the second slave device cyclically send pulse signals.
  • the master clock difference with the master device and the slave clock difference with the second slave device are determined, where n is a positive integer.
  • the master device, the first slave device and the second slave device send pulse signals cyclically to achieve cyclic synchronization.
  • the master device, the first slave device and the second slave device send pulse signals in turn.
  • the master device, the first slave device and the second slave device send pulse signals for the nth time, and the clock difference corresponding to the nth round is determined according to the nth pulse signal sent by each device, so as to perform clock synchronization according to the clock difference of the nth round.
  • this embodiment does not limit the sending timing of the master device, the first slave device and the second slave device to send pulse signals to the other two devices respectively. It is only necessary for the master device, the first slave device and the second slave device to send pulse signals to the other two devices respectively.
  • the master device when the master device can communicate with the second slave device, the master device can send a pulse signal to the second slave device, so that the second slave device can directly perform clock synchronization based on the clock difference with the master device, thereby improving clock synchronization accuracy.
  • the master device, the first slave device and the second slave device may send pulse signals in turn, and obtain multiple sets of clock differences between the three based on the cyclically sent pulse signals, thereby reducing the error of the clock difference and achieving more accurate clock synchronization.
  • the method provided in the embodiment of the present application can be applied to the communication process of an extended reality (Extended Reality, XR) device, wherein the XR device includes an AR device and a VR device.
  • the master device is a head display device
  • the first slave device and the second slave device are handle devices.
  • the head display sends a synchronization signal (Synch), and the left handle and the right handle receive it.
  • the left handle responds to the synchronization signal (Reply), and the head display and the right handle receive it.
  • the right handle responds to the synchronization signal (Reply), and the head display and the left handle receive it.
  • each synchronized frame carries time parameter information, including timestamp information and time interval information, so that the clock difference between the three can be determined according to the time parameter information, so that the left handle, the right handle and the head display maintain clock synchronization.
  • time parameter information including timestamp information and time interval information
  • the frame length is about 20 bytes and the duration is 10us.
  • a round of 6 frames and 2 idles (idle) takes 400us, which can save time and improve communication efficiency.
  • the head display device and the handle device may be synchronized first and then communicated; or they may be synchronized in real time during the communication process, which is not limited in the embodiments of the present application.
  • FIG. 11 shows a block diagram of a clock synchronization device provided by an embodiment of the present application.
  • the device may include:
  • the first receiving module 1101 is used to receive adjacent pulse signals sent by the master device;
  • a first determining module 1102 is configured to determine a first clock difference based on a reception time interval of the adjacent pulse signals and a sending time interval of the adjacent pulse signals sent by the master device, wherein the first clock difference is used for clock synchronization between the first slave device and the master device;
  • the first sending module 1103 is used to send adjacent pulse signals to the second slave device when the clock of the first slave device is synchronized with the clock of the master device, so that the second slave device determines a second clock difference, and the second clock difference is used for the second slave device to perform clock synchronization with the first slave device.
  • the first receiving module 1101 is further configured to:
  • the first determining module 1102 is further configured to:
  • the first clock difference is determined based on an average of the time interval differences.
  • the first sending module 1103 is further configured to:
  • the first receiving module 1101 is further configured to:
  • the device also includes:
  • a clock adjustment module is used to adjust clock parameters based on the average of the first clock difference and the third clock difference so as to synchronize with the master device clock.
  • the first determining module 1102 is further configured to:
  • the first clock difference is determined based on a time difference between the receiving time interval and the sending time interval.
  • the master device is used to send adjacent pulse signals to the second slave device, so that the second slave device determines a fourth clock difference, and the fourth clock difference is used for clock synchronization of the second slave device and the master device.
  • the second slave device is further configured to send adjacent pulse signals to the first slave device and the master device.
  • the master device is used to determine the fifth clock difference after receiving the adjacent pulse signals.
  • the first receiving module 1101 is further configured to:
  • the first sending module 1103 is further configured to:
  • the first determining module 1102 is further configured to:
  • a master clock difference with the master device is determined, and a slave clock difference with the second slave device is determined.
  • the first determining module 1102 is further configured to:
  • the slave clock difference is determined based on an average of the sixth clock difference, the eighth clock difference, and the indirect slave clock difference.
  • the master device, the first slave device, and the second slave device cyclically send the adjacent pulse signals
  • the first determining module 1102 is further configured to:
  • the master clock difference with the master device and the slave clock difference with the second slave device are determined, wherein n is a positive integer.
  • the first sending module 1103 is further configured to:
  • the adjacent pulse signals are sent to the second slave device on at least two frequency hopping channels.
  • the first receiving module 1101 is further configured to receive an adjacent pulse signal sent by the second slave device;
  • the first determining module 1102 is further configured to determine a ninth clock difference between the first slave device and the second slave device based on the received adjacent pulse signals;
  • the first sending module 1103 is further configured to send the ninth clock difference to the second slave device, so that the second slave device adjusts a clock parameter according to an average of the second clock difference and the ninth clock difference.
  • the master device is a head-mounted display device
  • the first slave device and the second slave device are handle devices.
  • the master device may send adjacent pulse signals to the first slave device, and the first slave device determines the first clock difference between the master device and the first slave device according to the receiving time interval of the adjacent pulse signals and the sending time interval of the pulse signals sent by the master device, so that the first clock difference can be used to adjust the clock and keep the clock synchronization with the master device.
  • the first slave device may also send adjacent pulse signals to the second slave device, so that the second slave device can keep the clock synchronization with the first slave device, so that the second slave device can also keep the clock synchronization with the master device, so as to realize progressive clock synchronization, reduce interference in the communication process of multiple devices, and improve the communication quality.
  • FIG. 12 shows a block diagram of a clock synchronization device provided by another embodiment of the present application.
  • the device may include:
  • the second sending module 1201 is used to send adjacent pulse signals to the first slave device, the first slave device is used to determine a first clock difference based on the receiving time interval of the adjacent pulse signals and the sending time interval of the adjacent pulse signals sent by the master device, and the first clock difference is used for the first slave device to perform clock synchronization with the master device; the first slave device When the device is clock synchronized with the master device, the first slave device is also used to send adjacent pulse signals to the second slave device so that the second slave device determines a second clock difference, and the second clock difference is used for the second slave device to perform clock synchronization with the first slave device.
  • the second sending module 1201 is also used to send adjacent pulse signals to the first slave device on at least two frequency hopping channels, and the first slave device is also used to determine the first clock difference based on the average of each time interval difference, and the time interval difference is determined based on the receiving time interval of adjacent pulse signals received on the frequency hopping channel and the sending time interval of the adjacent pulse signals sent by the master device.
  • the device further comprises:
  • a second receiving module used for receiving adjacent pulse signals sent by the first slave device
  • a second determination module configured to determine a third clock difference based on a reception time interval of the adjacent pulse signals and a transmission time interval of the adjacent pulse signals sent by the first slave device;
  • the second sending module 1201 is further used to send the third clock difference to the first slave device, so that the first slave device adjusts the clock parameters based on the average of the first clock difference and the third clock difference to synchronize with the master device clock.
  • the second sending module 1201 is further used to send adjacent pulse signals to the second slave device, so that the second slave device determines a fourth clock difference, and the fourth clock difference is used for clock synchronization between the second slave device and the master device.
  • the device provided in the above embodiment realizes its function, only the division of the above functional modules is used as an example.
  • the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.
  • the device and method embodiments provided in the above embodiment belong to the same concept, and the specific implementation process is detailed in the method embodiment, which will not be repeated here.
  • FIG13 shows a block diagram of an electronic device 1300 provided by an exemplary embodiment of the present application.
  • the electronic device 1300 in the present application may include one or more of the following components: a memory 1320 and a processor 1310 .
  • the processor 1310 may include one or more processing cores.
  • the processor 1310 uses various interfaces and lines to connect various parts of the entire electronic device 1300, and executes various functions and processes data of the electronic device 1300 by running or executing instructions, programs, code sets or instruction sets stored in the memory 1320, and calling data stored in the memory 1320.
  • the processor 1310 can be implemented in at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), and programmable logic array (PLA).
  • DSP digital signal processing
  • FPGA field-programmable gate array
  • PDA programmable logic array
  • the processor 1310 can integrate one or a combination of a central processing unit (CPU), a graphics processing unit (GPU), and a modem.
  • the CPU mainly processes the operating system, user interface, and application programs; the GPU is responsible for rendering and drawing the content to be displayed on the display screen 1330; and the modem is used to process wireless communication. It is understandable that the above-mentioned modem may not be integrated into the processor 1310, but may be implemented separately through a communication chip.
  • the memory 1320 may include a random access memory (RAM) or a read-only memory (ROM).
  • the memory 1320 includes a non-transitory computer-readable storage medium.
  • the memory 1320 may be used to store instructions, programs, codes, code sets or instruction sets.
  • the memory 1320 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for implementing at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above-mentioned various method embodiments, etc.
  • the operating system may be an Android system (including a system deeply developed based on the Android system), an iOS system developed by Apple (including a system deeply developed based on the iOS system), or other systems.
  • the data storage area may also store data (such as a phone book, audio and video data, chat record data) created by the electronic device 1300 during use.
  • the structure of the electronic device 1300 shown in the above figures does not constitute a limitation on the electronic device 1300, and the electronic device may include more or fewer components than shown in the figure, or combine certain components. Or different component arrangements.
  • the electronic device 1300 also includes a radio frequency circuit, a shooting component, a sensor, an audio circuit, a wireless fidelity (Wireless Fidelity, WiFi) component, a power supply, a Bluetooth component and other components, which will not be described in detail here.
  • An embodiment of the present application further provides a computer-readable storage medium, which stores at least one program code, and the program code is loaded and executed by a processor to implement the clock synchronization method described in the above embodiments.
  • the embodiment of the present application provides a computer program product or a computer program, which includes a computer instruction stored in a computer-readable storage medium.
  • a processor of an electronic device reads the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the terminal executes the clock synchronization method provided in various optional implementations of the above aspects.

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Abstract

一种时钟同步方法、装置、系统、设备及存储介质，属于通信技术领域。该方法包括：接收主设备发送的相邻脉冲信号(202)；基于相邻脉冲信号的接收时间间隔以及主设备发送相邻脉冲信号的发送时间间隔，确定第一时钟差，第一时钟差用于第一从设备与主设备进行时钟同步(203)；第一从设备与主设备时钟同步的情况下，向第二从设备发送相邻脉冲信号，以使第二从设备确定第二时钟差，第二时钟差用于第二从设备与第一从设备进行时钟同步(204)。

Description

时钟同步方法、装置、系统、设备及存储介质
本申请要求于2022年10月27日提交的申请号为202211326128.8、发明名称为“时钟同步方法、装置、系统、设备及存储介质”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及通信技术领域，特别涉及一种时钟同步方法、装置、系统、设备及存储介质。
背景技术
在设备通信过程中，一些场景下存在低延迟通信需求，如增强现实技术以及虚拟现实技术中设备之间需保持低延迟通信。
相关技术中，采用低功耗蓝牙(Bluetooth Low Energy，BLE)协议实现低延迟通信。但在设备通信过程中，可能存在丢包情况。且在多设备通信的情况下，可能存在多设备之间通信干扰的问题，影响设备的使用。
发明内容
本申请实施例提供了一种时钟同步方法、装置、系统、设备及存储介质。所述技术方案如下：
一方面，本申请实施例提供了一种时钟同步方法，所述方法用于第一从设备，所述方法包括：
接收主设备发送的相邻脉冲信号；
基于所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔，确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备进行时钟同步；
在所述第一从设备与所述主设备时钟同步的情况下，向所述第二从设备发送相邻脉冲信号，以使所述第二从设备确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
另一方面，本申请实施例提供了一种时钟同步方法，所述方法用于主设备，所述方法包括：
向第一从设备发送相邻脉冲信号，所述第一从设备用于基于接收所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备进行时钟同步；
在所述第一从设备与所述主设备时钟同步的情况下，所述第一从设备还用于向第二从设备发送相邻脉冲信号，以使所述第二从设备确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
另一方面，本申请实施例提供了一种时钟同步装置，所述装置包括：
第一接收模块，用于接收主设备发送的相邻脉冲信号；
第一确定模块，用于基于所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔，确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备进行时钟同步；
第一发送模块，用于所述第一从设备与所述主设备保持时钟同步的情况下，向所述第二从设备发送相邻脉冲信号，以使所述第二从设备确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
另一方面，本申请实施例提供了一种时钟同步装置，所述装置包括：
第二发送模块，用于向第一从设备发送相邻脉冲信号，所述第一从设备用于基于所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备保持时钟同步；所述第一从设备与所述主设备时钟同步的情况下，所述第一从设备还用于向第二从设备发送相邻脉冲信号，以使所述第二从设备确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
另一方面，本申请实施例提供了一种时钟同步系统，所述系统包括主设备、第一从设备以及第二从设备；
所述主设备用于向所述第一从设备发送相邻脉冲信号；
所述第一从设备用于接收所述主设备发送的相邻所述脉冲信号；基于接收相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔，确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备进行时钟同步；所述第一从设备与所述主设备保持时钟同步的情况下，向所述第二从设备发送相邻脉冲信号；
所述第二从设备用于确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
另一方面，本申请实施例提供一种电子设备，所述电子设备包括处理器和存储器；所述存储器存储有至少一条指令，所述至少一条指令用于被所述处理器执行以实现如上述方面所述的时钟同步方法。
另一方面，本申请实施例提供一种计算机可读存储介质，所述存储介质存储有至少一条指令，所述至少一条指令用于被处理器执行以实现如上述方面所述的时钟同步方法。
另一方面，本申请实施例提供了一种计算机程序产品或计算机程序，该计算机程序产品或计算机程序包括计算机指令，该计算机指令存储在计算机可读存储介质中。电子设备的处理器从计算机可读存储介质读取该计算机指令，处理器执行该计算机指令，使得该电子设备执行上述方面的各种可选实现方式中提供的时钟同步方法。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1示出了本申请一个示例性实施例提供的实施环境的示意图；
图2示出了本申请一个示例性实施例提供的时钟同步方法的流程图；
图3示出了本申请一个示例性实施例提供的时钟同步过程的信号传输示意图；
图4示出了本申请另一个示例性实施例提供的时钟同步方法的流程图；
图5示出了本申请另一个示例性实施例提供的时钟同步过程的信号传输示意图；
图6示出了本申请另一个示例性实施例提供的时钟同步方法的流程图；
图7示出了本申请另一个示例性实施例提供的时钟同步过程的信号传输示意图；
图8示出了本申请另一个示例性实施例提供的时钟同步方法的流程图；
图9示出了本申请另一个示例性实施例提供的时钟同步过程的信号传输示意图；
图10示出了本申请一个示例性实施例提供的时钟同步过程的信号帧示意图；
图11示出了本申请一个示例性实施例提供的时钟同步装置的结构框图；
图12示出了本申请一个示例性实施例提供的时钟同步装置的结构框图；
图13示出了本申请一个示例性实施例提供的电子设备的结构框图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请实施方式作进 一步地详细描述。
请参考图1，其示出了本申请一个示例性实施例提供的实施环境的示意图，该实施环境中包含主设备101，第一从设备102以及第二从设备103。
主设备101是具有通信功能的电子设备。可选的，主设备可为头戴式显示设备。其中，头戴式显示设备可为增强现实(Augmented Reality，AR)设备、虚拟现实(Virtual Reality，VR)设备或AR和VR为一体的视听设备。
第一从设备102与第二从设备103是可与主设备101通信的电子设备。且第一从设备102与第二从设备103之间建立有通信连接。在主设备101为头戴式显示设备时，第一从设备102与第二从设备103可为控制设备，用于向主设备101发送指令。
主设备101与第一从设备102以及第二从设备103也可为其他具有通信功能的电子设备，如智能手机、平板电脑、可穿戴式设备、个人电脑等，本实施例对此不做限定。
主设备101与第一从设备102以及第二从设备103间的通信连接可通过无线方式建立，例如，蓝牙连接、无线保真(Wireless Fidelity，WiFi)连接或移动数据网络连接等等，本实施例对此不作限定。
本申请实施例中，主设备101可向第一从设备102发送相邻脉冲信号，使第一从设备102确定二者之间的第一时钟差，实现与主设备101的时钟同步。且第一从设备102可向第二从设备103发送脉冲信号，使第二从设备确定第二时钟差，实现与第一从设备102之间的时钟同步，从而实现多设备之间递进式的时钟同步。
请参考图2，其示出了本申请一个示例性实施例提供的时钟同步方法的流程图，该方法包括：
步骤201，主设备向第一从设备发送相邻脉冲信号。
在一种可能的实施方式中，在同步过程中，主设备每隔一段时间向第一从设备发送脉冲信号，且主设备向第一从设备发送至少一组相邻的脉冲信号，一组相邻脉冲信号即包含两个相邻发送的脉冲信号。其中，脉冲信号中携带有时间信息，用于使第一从设备确定发送时间间隔。可选的，时间信息中包含时间戳信息以及发送时间间隔信息中至少一种。其中，时间戳信息用于指示脉冲信号的发送时间。
可选的，主设备持续向第一从设备发送脉冲信号，在持续发送脉冲信号过程中，主设备可每隔随机时间发送脉冲信号，或者，也可每隔固定目标时间发送脉冲信号，本实施例对此不做限定。示意性的，目标时间可为30us，主设备每隔30us向第一从设备发送脉冲信号。
步骤202，第一从设备接收主设备发送的相邻脉冲信号。
当第一从设备接收到主设备发送的至少一组脉冲信号后，第一从设备可记录接收至少一组脉冲信号的接收时间，用于时钟同步。
步骤203，第一从设备基于相邻脉冲信号的接收时间间隔以及主设备发送相邻脉冲信号的发送时间间隔，确定第一时钟差，第一时钟差用于第一从设备与主设备进行时钟同步。
当主设备与第一从设备之间时钟同步时，第一从设备接收脉冲信号的时间间隔与主设备发送脉冲信号的时间间隔相同；而当主设备与第一从设备时钟不同步时，第一从设备接收脉冲信号的时间间隔与主设备发送脉冲信号的时间间隔存在偏差，因此，本申请实施例中，利用接收时间间隔以及发送时间间隔的差异，确定设备之间的时钟差，进行时钟校正。
其中，接收时间间隔与发送时间间隔是同组相邻脉冲信号在接收端接收的时间间隔与发送端发送的时间间隔。
在一种可能的实施方式中，第一从设备在接收到主设备发送的脉冲信号之后，可记录接收时间，且可获取上一次接收到主设备发送的脉冲信号的接收时间，从而根据当前接收时间与上一次接收时间，确定接收时间间隔。
且第一从设备在接收到主设备发送的脉冲信号之后，可获取脉冲信号中的时间戳信息， 且可获取上一次接收到主设备发送的脉冲信号中的时间戳信息，从而根据当前时间戳信息与上一次时间戳信息，确定发送时间间隔。
或者，在脉冲信号中包含发送时间间隔信息时，可直接获取脉冲信号中发送相邻脉冲信息的发送时间间隔。
确定接收时间间隔与发送时间间隔之后，第一从设备可根据接收时间间隔与发送时间间隔的差值，确定第一时钟差。
且为进一步提高第一时钟差的准确性，第一从设备可根据多组接收时间间隔与发送时间间隔的差值的均值，确定第一时钟差。
示意性的，如图3所示，当接收到主设备发送的第一脉冲信号301、第二脉冲信号302以及第三脉冲信号303时，可基于第一脉冲信号301与第二脉冲信号302的接收时间确定接收时间间隔T2，且可基于第一脉冲信号301与第二脉冲信号302的发送时间确定发送时间间隔T1，根据发送时间间隔T1与接收时间间隔T2确定时钟差t1；且还可基于第二脉冲信号302与第三脉冲信号303的接收时间确定接收时间间隔T2，以及基于第二脉冲信号302与第三脉冲信号的303的发送时间确定发送时间间隔T1，根据发送时间间隔T1与接收时间间隔T2确定时钟差t2，从而根据时钟差t1与时钟差t2的均值确定第一时钟差。
在确定第一时钟差后，第一从设备可根据第一时钟差调整时钟参数，使第一从设备与主设备保持时钟同步。
步骤204，第一从设备与主设备时钟同步的情况下，第一从设备向第二从设备发送相邻脉冲信号，以使第二从设备确定第二时钟差，第二时钟差用于第二从设备与第一从设备进行时钟同步。
通信过程中，除了主设备与第一从设备通信之外，还可能包含与第二从设备的通信，其中，第二从设备是与第一从设备不同的设备。为使第二从设备可与主设备以及第一从设备保持时钟同步，在一种可能的实施方式中，第一从设备在利用第一时钟差与主设备保持时钟同步之后，向第二从设备发送相邻脉冲信号。第二从设备接收到相邻脉冲信号后，可确定第一从设备发送相邻脉冲信号的发送时间间隔，以及接收相邻脉冲信号的接收时间间隔，从而利用接收时间间隔与发送时间间隔确定第二时钟差。
第二从设备在确定第二时钟差后，根据第二时钟差调整时钟参数，从而保持与第一从设备时钟同步。由于第一从设备与主设备保持时钟同步，因此，在使第二从设备与第一从设备保持时钟同步之后，可实现主设备、第一从设备以及第二从设备之间递进式的时钟同步。
示意性的，如图3所示，第一从设备向第二从设备发送脉冲信号，第二从设备根据接收时间间隔T4与发送时间间隔T3确定第二时钟差，从而根据第二时钟差调整时钟参数，保持与第一从设备时钟同步。
综上所述，本申请实施例中，主设备可向第一从设备发送相邻脉冲信号，第一从设备根据接收相邻脉冲信号的接收时间间隔与主设备发送脉冲信号的发送时间间隔确定与主设备之间的第一时钟差，从而可利用第一时钟差进行时钟调整，与主设备保持时钟同步。且进一步的，在第一从设备与主设备时钟同步之后，第一从设备还可向第二从设备发送相邻脉冲信号，以使第二从设备与第一从设备保持时钟同步，使第二从设备也可与主设备保持时钟同步，实现递进式的时钟同步，可减少多设备通信过程中的干扰，提高通信质量。
可选的，接收主设备发送的相邻脉冲信号，包括：
接收主设备在至少两个跳频信道上发送的相邻脉冲信号；
可选的，基于相邻脉冲信号的接收时间间隔以及主设备发送相邻脉冲信号的发送时间间隔，确定第一时钟差，包括：
基于在跳频信道上接收到的相邻脉冲信号的接收时间间隔以及主设备发送相邻脉冲信号的发送时间间隔，确定时间间隔差值；
基于各个时间间隔差值的均值，确定第一时钟差。
可选的，该方法还包括：
向所述主设备发送相邻脉冲信号，以使所述主设备确定第三时钟差；
接收所述主设备发送的所述第三时钟差；
基于所述第一时钟差与所述第三时钟差的均值，调整时钟参数，以便与所述主设备时钟同步。
可选的，脉冲信号包含时间戳信息，基于相邻脉冲信号的接收时间间隔以及主设备发送相邻脉冲信号的发送时间间隔，确定第一时钟差，包括：
基于接收相邻脉冲信号的接收时间，确定接收时间间隔；
基于相邻脉冲信号中包含的时间戳信息，确定发送时间间隔；
基于接收时间间隔与发送时间间隔的时差，确定第一时钟差。
可选的，主设备用于向第二从设备发送相邻脉冲信号，以使第二从设备确定第四时钟差，第四时钟差用于第二从设备与主设备进行时钟同步。
可选的，第二从设备还用于向第一从设备与主设备发送相邻脉冲信号，主设备用于接收相邻脉冲信号后确定第五时钟差；
可选的，该方法还包括：
接收第二从设备发送的相邻脉冲信号；
基于接收相邻脉冲信号的接收时间间隔以及第二从设备发送相邻脉冲信号的发送时间间隔，确定第六时钟差；
向主设备以及第二从设备发送相邻脉冲信号，以使主设备确定第七时钟差，以及使第二从设备确定第八时钟差；
基于各个时钟差，确定与主设备之间的主时钟差，以及确定与第二从设备之间的从时钟差。
可选的，基于各个时钟差，确定与主设备之间的主时钟差，包括：
基于第五时钟差与第六时钟差的时差，确定第一从设备与主设备之间的间接主时钟差；
基于第一时钟差、第七时钟差以及间接主时钟差的均值，确定主时钟差；
可选的，基于各个时钟差，确定与第二从设备之间的从时钟差，包括：
基于第一时钟差与第四时钟差的差异，确定第一从设备与第二从设备之间的间接从时钟差；
基于第六时钟差、第八时钟差以及间接从时钟差的均值，确定从时钟差。
可选的，主设备、第一从设备以及第二从设备循环发送相邻脉冲信号；基于各个时钟差，确定与主设备之间的主时钟差，以及确定与第二从设备之间的从时钟差，包括：
在第n轮同步过程中，基于第n轮的各个时钟差，确定与主设备之间的主时钟差，以及确定与第二从设备之间的从时钟差，其中，n为正整数。
可选的，向第二从设备发送相邻脉冲信号，包括：
在至少两个跳频信道上向第二从设备发送相邻脉冲信号。
可选的，向第二从设备发送相邻脉冲信号之后，方法还包括：
接收第二从设备发送的相邻脉冲信号；
基于接收的相邻脉冲信号确定与第二从设备之间的第九时钟差；
向第二从设备发送第九时钟差，以使第二从设备根据第二时钟差与第九时钟差的均值调整时钟参数。
可选的，主设备为头戴式显示设备，第一从设备与第二从设备为手柄设备。
可选的，向第一从设备发送相邻脉冲信号，包括：
在至少两个跳频信道上向第一从设备发送相邻脉冲信号，第一从设备还用于基于各个时间间隔差值的均值确定第一时钟差，时间间隔差值基于在跳频信道上接收到的相邻脉冲信号的接收时间间隔以及主设备发送相邻脉冲信号的发送时间间隔确定得到。
可选的，该方法还包括：
接收第一从设备发送的相邻脉冲信号；
基于相邻脉冲信号的接收时间间隔与第一从设备发送相邻脉冲信号的发送时间间隔，确定第三时钟差；
向第一从设备发送第三时钟差，以使第一从设备基于第一时钟差与第三时钟差的均值，调整时钟参数，以便与主设备时钟同步。
可选的，该方法还包括：
向第二从设备发送相邻脉冲信号，以使第二从设备确定第四时钟差，第四时钟差用于第二从设备与主设备进行时钟同步。
在信号传输过程中可能存在如信道被干扰的问题，可能造成时钟差的误差。因此，为提高时钟差的准确性，可采用跳频同步的方式降低时钟差的误差。下面将以示例性实施例进行说明。
请参考图4，其示出了本申请另一个示例性实施例提供的时钟同步方法的流程图，该方法包括：
步骤401，主设备在至少两个跳频信道上向第一从设备发送相邻脉冲信号。
在同步过程中，当发送脉冲信号的信道被干扰时，将影响接收时间间隔的准确性，从而影响时钟差的准确性。因此，为提高时钟差的准确性，主设备可在至少两个跳频信道上发送脉冲信号。其中，至少两个跳频信道是预先配置的一组信道，包含不同频段的信道。示意性的，至少两个跳频信道可包含ch0，ch39以及ch78，主设备可在三个不同工作信道上发送至少一组脉冲信号。
在一种可能的实施方式中，主设备在至少两个跳频信道上轮流发送脉冲信号，即主设备发送的相邻脉冲信号通过不同的信道传输。示意性的，当至少两个跳频信道中包含ch0，ch39以及ch78时，主设备可轮流在ch0，ch39以及ch78上发送脉冲信号。
且进一步的，主设备还可在至少两个跳频信道上循环发送脉冲信号。示意性的，主设备可在ch0，ch39以及ch78上向第一从设备循环发送脉冲信号。
步骤402，第一从设备接收主设备在至少两个跳频信道上发送的相邻脉冲信号。
第一从设备可接收主设备在跳频信道上发送的相邻脉冲信号，从而根据不同信道上接收的相邻脉冲信号确定第一时钟差，可降低因同步信道被干扰而导致同步失败的概率。
步骤403，第一从设备基于在跳频信道上接收到的相邻脉冲信号的接收时间间隔以及主设备发送相邻脉冲信号的发送时间间隔，确定时间间隔差值。
在一种可能的实施方式中，第一从设备根据在两个跳频信道上接收相邻脉冲信号的接收时间，确定接收时间间隔。
示意性的，如图5所示，主设备在ch0、ch39以及ch78上依次向第一从设备发送脉冲信号，其中，ch0与ch39上传输的脉冲信号为相邻脉冲信号，ch39与ch78上传输的脉冲信号为相邻脉冲信号。第一从设备可根据ch0与ch39上接收的相邻脉冲信号的接收时间确定接收时间间隔T2。且还可根据ch39与ch78上接收的相邻脉冲信号的接收时间确定接收时间间隔T2。
确定接收时间间隔之后，第一从设备可确定主设备在两个跳频信道上发送相邻脉冲信号的发送时间间隔。在一种可能的实施方式中，第一从设备可利用相邻脉冲信号中的时间戳信息，计算得到接收相邻脉冲信号的发送时间间隔。
示意性的，如图5所示，当第一从设备根据在ch0与ch39上接收的相邻脉冲信号的接收时间确定接收时间间隔后，还可根据脉冲信号中的时间戳信息确定在ch0与ch39上传输的相邻脉冲信号的发送时间间隔T1；当第一从设备根据在ch39与ch78上接收的相邻脉冲信号的接收时间确定接收时间间隔后，还可根据脉冲信号中的时间戳信息确定在ch39与ch78上传 输的相邻脉冲信号的发送时间间隔T1。
在一种可能的实施方式中，第一从设备根据确定的接收时间间隔与发送时间间隔的差值，确定第一时钟差。其中，接收时间间隔与发送时间间隔是针对同组相邻脉冲信号的，比如，如图5所示，根据在ch0与ch39上传输相邻脉冲信号的接收时间间隔与发送时间间隔，确定第一时钟差；也可根据在ch39以及ch78上传输相邻脉冲信号的接收时间间隔与发送时间间隔，确定第一时钟差。
为提高时钟差的准确性，第一从设备可根据多组接收时间间隔与发送时间间隔的差值即时间间隔差值，确定第一时钟差。可选的，第一从设备基于各个时间间隔差值的均值，确定第一时钟差，不同时间间隔差值根据不同组的相邻脉冲信号的接收时间间隔以及发送时间间隔确定，其中，不同组的相邻脉冲信号对应的相邻跳频信道不同。
当主设备在跳频信道上轮流发送脉冲信号时，第一从设备可接收到多组相邻脉冲信号，之后，可根据多组相邻脉冲信号的接收时间间隔与发送时间间隔确定时间间隔差值，最终，基于多组时间间隔差值的均值确定第一时钟差。
示意性的，如图5所示，第一从设备可根据在ch0与ch39上传输相邻脉冲信号的接收时间间隔与发送时间间隔确定得到的时间差t1以及根据在ch39以及ch78上传输相邻脉冲信号的接收时间间隔与发送时间间隔确定得到的时间差t2的均值，确定第一时钟差。
或者，还可进一步根据循环发送的多组脉冲信号对应的时间间隔差值确定得到。示意性的，如图5所示，第一从设备可将主设备在ch0、ch39以及ch78上循环两次的各组相邻脉冲信号对应的时间间隔差值的均值确定为第一时钟差。
步骤404，第一从设备与主设备时钟同步的情况下，第一从设备在至少两个跳频信道上向第二从设备发送相邻脉冲信号。
在一种可能的实施方式中，第一从设备向第二从设备发送脉冲信号时，也可在至少两个跳频信道上发送，从而使第二从设备根据不同信道上接收的相邻脉冲信号的接收时间间隔与发送时间间隔确定第二时钟差，减小第二时钟差的误差。
本实施例中，在设备同步过程中，可在跳频信道上发送脉冲信号，从而根据不同信道上接收到脉冲信号的接收时间间隔与发送时间间隔，确定设备之间的时钟差，可降低因信道干扰而导致同步失败的概率，提高同步成功率。
在信号传输过程中还可能存在电磁波透射，反射以及多径等问题，造成时钟差的误差。因此，为提高时钟差的准确性，还可采用双向同步的方式降低时钟差的误差。下面将以示例性实施例进行说明。
请参考图6，其示出了本申请另一个示例性实施例提供的时钟同步方法的流程图，本申请实施例以该方法应用于第一从设备为例进行说明，该方法包括：
步骤601，主设备向第一从设备发送相邻脉冲信号。
步骤602，第一从设备接收主设备发送的相邻脉冲信号。
其中，步骤601-602的实施方式可参考上述步骤201-202，本实施例不再赘述。
步骤603，第一从设备基于相邻脉冲信号的接收时间间隔以及主设备发送相邻脉冲信号的发送时间间隔，确定第一时钟差。
在一种可能的实施方式中，第一从设备确定第一时钟差可包含如下步骤：
步骤603a，基于接收相邻脉冲信号的接收时间，确定接收时间间隔。
在第一从设备接收到脉冲信号后，可根据当前接收时刻与上一次接收脉冲信号的接收时刻，确定两个相邻脉冲信号的接收时间，从而根据接收时间确定接收时间间隔。
步骤603b，基于相邻脉冲信号中包含的时间戳信息，确定发送时间间隔。
第一从设备还可根据两个相邻脉冲信号中各自包含的时间戳信息，确定主设备发送两个相邻脉冲信号的发送时间间隔。
步骤603c，基于接收时间间隔与发送时间间隔的时差，确定第一时钟差。
确定接收时间间隔与发送时间间隔之后，第一从设备可利用二者之间的时差，确定第一时钟差。其中，接收时间间隔与发送时间间隔是针对同组脉冲信号的接收时间与发送时间确定得到。
且一种可能的实施方式中，第一从设备可利用多组脉冲信号确定得到的时钟差的均值确定第一时钟差，从而提高第一时钟差的准确性。
步骤604，第一从设备向主设备发送相邻脉冲信号，以使主设备确定第三时钟差。
为降低因主设备向第一从设备传输脉冲信号过程中电磁波透射、反射以及多径等问题造成的误差，在一种可能的实施方式中，第一从设备可向主设备发送至少一组脉冲信号，使主设备根据接收的脉冲信号确定二者之间的时钟差。由于主设备向第一从设备发送脉冲信号与第一从设备向主设备发送脉冲信号不会通过相同的物理路径传输，因此，可减少同步误差。
步骤605，主设备接收第一从设备发送的相邻脉冲信号。
步骤606，主设备基于相邻脉冲信号的接收时间间隔与第一从设备发送相邻脉冲信号的发送时间间隔，确定第三时钟差。
在主设备接收到第一从设备发送的脉冲信号后，主设备根据接收相邻脉冲信号的接收时间间隔以及发送相邻脉冲信号的发送时间间隔，确定第三时钟差，即主设备计算得到与第一从设备之间的时钟差，实现双向同步过程。
其中，主设备确定第三时钟差的过程可参考第一从设备确定第一时钟差的过程，本实施例不再赘述。
示意性的，如图7所示，主设备向第一从设备发送脉冲信号，第一从设备可根据接收时间间隔T2与发送时间间隔T1确定第一时钟差；第一从设备还可向主设备发送脉冲信号，主设备可根据接收时间间隔T4与发送时间间隔T3确定第三时钟差。
步骤607，主设备向第一从设备发送第三时钟差。
当主设备确定第三时钟差之后，主设备可根据第三时钟差调整自身的时钟参数，从而与第一从设备保持时钟同步。或者，主设备还可将第三时钟差发送至第一从设备，第一从设备根据自身确定的第一时钟差以及主设备发送的第三时钟差确定与主设备之间的时钟差，以提高时钟差的准确性。
需要说明的是，本实施例仅对主设备发送脉冲信号使第一从设备进行同步以及第一从设备发送脉冲信号使主设备同步的方式进行说明，不对主设备发送脉冲信号与第一从设备发送脉冲信号的时序进行限定。
在一种可能的实施方式中，主设备通过发送包含第三时钟差的脉冲信号以向第一从设备发送第三时钟差。
步骤608，第一从设备接收主设备发送的第三时钟差。
第一从设备可从接收到的脉冲信号中所包含的时间信息确定第三时钟差。
步骤609，基于第一时钟差与第三时钟差的均值，调整时钟参数，以便与主设备时钟同步。
在一种可能的实施方式中，当接收到主设备发送的第三时钟差之后，第一从设备将第一时钟差与第三时钟差的均值确定为与主设备之间的时钟差，根据时钟差调整时钟参数，从而保持与主设备时钟同步。
上述实施例中，在第一从设备与主设备同步过程中，可采用跳频同步或双向同步的方式，降低同步误差。在另一种可能的实施方式中，还可同时采用跳频同步与双向同步的方式，以提高同步准确性。
其中，主设备可在跳频信道上向第一从设备发送脉冲信号，以使第一从设备根据在跳频信道上接收的相邻脉冲信号确定与主设备之间的第一时钟差；之后，第一从设备也可在跳频信道上向主设备发送脉冲信号，以使主设备根据在跳频信道上接收的相邻脉冲信号确定与第 一从设备之间的第三时钟差。其中，主设备发送脉冲信号的跳频信道可与第一从设备发送脉冲信号的跳频信道相同，也可与第一从设备发送脉冲信号的跳频信道不同。本实施例对此不做限定。
通过跳频同步以及双向同步的方式可降低因信道干扰、电磁波传输问题造成的同步误差。
步骤610，第一从设备与主设备时钟同步的情况下，第一从设备向第二从设备发送相邻脉冲信号，以使第二从设备确定第二时钟差。
在调整时钟参数与主设备同步之后，还可向第二从设备发送脉冲信号，使第二从设备确定与第一从设备之间的第二时钟差。
步骤611，第一从设备接收第二从设备发送的相邻脉冲信号。
且进一步的，第二从设备也可向第一从设备发送至少一组脉冲信号，使第一从设备确定与第二从设备之间的时钟差。
步骤612，第一从设备基于接收的相邻脉冲信号确定与第二从设备之间的第九时钟差。
第一从设备根据第二从设备发送相邻脉冲信号的发送时间间隔以及接收脉冲信号的接收时间间隔，确定得到与第二从设备之间的第九时钟差，之后，可将第九时钟差发送至第二从设备，以提高第二从设备确定时钟差的准确性。
步骤613，第一从设备向第二从设备发送第九时钟差，以使第二从设备根据第二时钟差与第九时钟差的均值调整时钟参数。
在第一从设备向第二从设备发送第九时钟差之后，第二从设备根据第二时钟差以及第九时钟差的均值，确定得到与第一从设备之间的时钟差，从而调整时钟参数。实现第一从设备与第二从设备之间的双向同步过程，降低同步误差。
本实施例中，通过主设备向第一从设备发送脉冲信号以及第一从设备向主设备发送脉冲信号的双向传输过程，实现双向同步，从而降低信号传输过程中电磁波透射、反射以及多径等对同步的影响，提高时钟同步准确性，从而提高同步质量。
上述实施例中，通过递进式同步实现主设备、第一从设备以及第二从设备之间的时钟同步。而当主设备与第二从设备可通信的情况下，第二从设备可直接根据主设备发送的脉冲信号确定时钟差，实现时钟同步。下面将以示例性实施例进行说明。
请参考图8，其示出了本申请另一个示例性实施例提供的时钟同步方法的流程图，本申请实施例以该方法应用于第一从设备为例进行说明，该方法包括：
步骤801，主设备向第一从设备发送相邻脉冲信号。
步骤802，第一从设备接收主设备发送的相邻脉冲信号。
步骤803，第一从设备基于相邻脉冲信号的接收时间间隔以及主设备发送相邻脉冲信号的发送时间间隔，确定第一时钟差。
其中，步骤801-803的实施方式可参考上述步骤201-203，本实施例不再赘述。
步骤804，主设备向第二从设备发送相邻脉冲信号，以使第二从设备确定第四时钟差，第四时钟差用于第二从设备与主设备进行时钟同步。
在一种可能的实施方式中，在主设备与第二从设备处于不可通信状态时，为实现主设备、第一从设备以及第二从设备三者之间的时钟同步，可采用递进式时钟同步，即第一从设备与主设备时钟同步之后，第一从设备可向第二从设备发送相邻脉冲信号，以使第二从设备与第一从设备时钟同步。其中，当第二从设备位于主设备通信范围之外，或者，第二从设备接收主设备发送信号的接收信号强度低于强度阈值时，确定主设备与第二从设备处于不可通信状态。
当主设备与第二从设备处于可通信状态时，即第二从设备位于主设备通信范围之内，或第二从设备接收主设备发送信号的接收信号强度高于强度阈值时，可利用主设备与第二从设备的通信过程实现主设备与第二从设备的时钟同步。
在一种可能的实施方式中，主设备向第二从设备发送相邻脉冲信号，以使第二从设备确定第四时钟差，第四时钟差用于使第二从设备与主设备保持时钟同步。
即主设备向第二从设备发送相邻脉冲信号，第二从设备根据接收相邻脉冲信号的接收时间间隔与发送时间间隔，确定与主设备之间的第四时钟差，从而根据第四时钟差调整时钟参数，与主设备保持时钟同步。
步骤805，第一从设备接收第二从设备发送的相邻脉冲信号。
上述方式中，在主设备与第二从设备处于可通信状态的情况下，可通过主设备向第一从设备以及第二从设备发送脉冲信号，从而实现三者之间的时钟同步。为进一步时钟同步的准确性，在一种可能的实施方式中，还可通过第一从设备以及第二从设备发送相邻脉冲信号，从而根据不同方向脉冲信号的传输过程，确定设备之间的时钟差。
可选的，第二从设备还用于向第一从设备与主设备发送相邻脉冲信号，主设备接收相邻脉冲信号后确定第五时钟差。
其中，第二从设备可每隔一段时间分别向主设备以及第一从设备发送脉冲信号，主设备可根据接收时间间隔以及发送时间间隔，确定第五时钟差，第五时钟差即为主设备与第二从设备之间的时钟差。
第一从设备可每隔一段时间接收第二从设备发送的脉冲信号，从而可根据接收脉冲信号确定与第二从设备之间的时钟差。
步骤806，第一从设备基于接收相邻脉冲信号的接收时间间隔以及第二从设备发送相邻脉冲信号的发送时间间隔，确定第六时钟差。
在一种可能的实施方式中，第一从设备根据接收相邻脉冲信号的接收时间，确定接收时间间隔，以及根据相邻脉冲信号中携带的时间戳信息，确定发送时间间隔，从而得到与第二从设备之间的第六时钟差。
步骤807，第一从设备向主设备以及第二从设备发送相邻脉冲信号，以使主设备确定第七时钟差，以及使第二从设备确定第八时钟差。
且第一从设备也可向主设备以及第二从设备发送相邻脉冲信号。主设备接收到第一从设备发送的相邻脉冲信号之后，可根据接收时间间隔以及发送时间间隔确定与第一从设备之间的第七时钟差；且第二从设备接收到第一从设备发送的相邻脉冲信号之后，可根据接收时间间隔与发送时间间隔确定与第一从设备之间的第八时钟差。
步骤808，第一从设备基于各个时钟差，确定与主设备之间的主时钟差，以及确定与第二从设备之间的从时钟差。
上述过程中，主设备、第一从设备以及第二从设备分别向其他设备发送脉冲信号，可得到多组设备之间的时钟差。第一从设备可根据多个时钟差，确定与主设备之间的主时钟差，且可根据多个时钟差，确定与第二从设备之间的从时钟差。其中，确定与主设备之间的主时钟差的过程可包括如下步骤：
步骤一、基于第五时钟差与第六时钟差的差异，确定第一从设备与主设备之间的间接主时钟差。
其中，第五时钟差是第二从设备向主设备发送脉冲信号后，主设备确定的与第二从设备之间的时钟差；第六时钟差是第二从设备向第一从设备发送脉冲信号后，第一从设备确定的与第二从设备之间的时钟差。第一从设备可从主设备处获取第五时钟差，且从第二从设备处获取第六时钟差。
由于第五时钟差是主设备与第二从设备之间的时钟差，而第六时钟差是第一从设备与第二从设备之间的时钟差，根据二者之间的差异，第一从设备即可确定与主设备之间的间接主时钟差。
步骤二、基于第一时钟差、第七时钟差以及间接主时钟差的均值，确定主时钟差。
由于主设备向第一从设备发送脉冲信号，因此，第一从设备可直接确定与主设备之间的 时钟差，且第一从设备还向主设备发送脉冲信号，主设备可直接确定与第一从设备之间的时钟差。
即在一种可能的实施方式中，第一从设备可根据设备之间脉冲信号传输直接确定得到的与主设备之间的时钟差，以及间接确定得到的与主设备之间的时钟差的均值，确定与主设备之间的时钟差。
示意性，如图9所示，其中，主设备可向第一从设备以及第二从设备发送脉冲信号，第一从设备可根据接收时间间隔T2与发送时间间隔T1，确定第一时钟差，第二从设备可根据接收时间间隔T3与发送时间间隔T1，确定第四时钟差；第一从设备可向主设备以及第二从设备发送脉冲信号，主设备可根据接收时间间隔T6与发送时间间隔T4，确定第七时钟差，第二从设备可根据接收时间间隔T5与发送时间间隔T4，确定第八时钟差；第二从设备可向主设备以及第一从设备发送脉冲信号，主设备可根据接收时间间隔T9与发送时间间隔T8，确定第五时钟差，第一从设备可根据接收时间间隔T7与发送时间间隔T8，确定第六时钟差。之后，第一从设备可根据与第一从设备确定的第一时钟差、主设备确定的第七时钟差，以及根据第五时钟差与第六时钟差间接确定得到的间接主时钟差，确定得到第一从设备与主设备之间的时钟差。
步骤一、基于第一时钟差与第四时钟差的差异，确定第一从设备与第二从设备之间的间接从时钟差。
其中，第一时钟差是主设备向第一从设备发送脉冲信号后，第一从设备确定的与主设备之间的时钟差；第四时钟差是主设备向第二从设备发送脉冲信号之后，第二从设备确定的与主设备之间的时钟差。即第一时钟差与第四时钟差是不同从设备相对于主设备的时钟差，因此，可根据第一时钟差与第四时钟差的差异，确定第一从设备与第二从设备之间的间接从时钟差。
步骤二、基于第六时钟差、第八时钟差以及间接从时钟差的均值，确定从时钟差。
其中，第六时钟差以及第八时钟差是根据第一从设备与第二从设备之间脉冲型号的传输过程直接确定得到的时钟差，第一从时钟可根据第六时钟差、第八时钟差以及间接从时钟差的均值，确定第一从时钟差与第二从时钟差的从时钟差。
在第一从设备利用主时钟差与主设备同步之后，还可向第二从设备发送从时钟差，使第二从设备根据从时钟差调整时钟参数，与第一从设备保持时钟同步，从而实现多设备之间的时钟同步。
而在另一种可能的实施方式中，第一从设备无需确定从时钟差，第二从设备根据第四时钟差、第五时钟差以及根据第七时钟差和第八时钟差的差异确定的间接主时钟差，确定与主设备之间的主时钟差，根据主时钟差调整时钟参数。即各个从设备根据设备间轮流发送的脉冲信号得到的时钟差确定与主设备之间的时钟差，保持与主设备的时钟同步。
在一种可能的实施方式中，主设备、第一从设备以及第二从设备循环发送脉冲信号。
在第n轮同步过程中，基于第n轮的各个时钟差，确定与主设备之间的主时钟差，以及确定与第二从设备之间的从时钟差，其中，n为正整数。
其中，主设备、第一从设备与第二从设备循环发送脉冲信号，实现循环式同步。在一轮同步过程中，主设备、第一从设备以及第二从设备轮流发送脉冲信号。在第n轮同步过程中，主设备、第一从设备以及第二从设备第n次发送脉冲信号，根据各个设备第n次发送脉冲信号确定第n轮对应的时钟差，从而根据第n轮的时钟差，进行时钟同步。
需要说明的是，在每轮同步过程中，本实施例对主设备、第一从设备以及第二从设备分别向其他两个设备发送脉冲信号的发送时序不做限定，仅需主设备、第一从设备以及第二从设备分别向其他两个设备发送脉冲信号即可。
本实施例中，在主设备可与第二从设备通信的情况下，可由主设备向第二从设备发送脉冲信号，使第二从设备直接根据与主设备的时钟差进行时钟同步，提高时钟同步准确性。
且进一步的，主设备、第一从设备以及第二从设备还可轮流发送脉冲信号，根据循环发送的脉冲信号，得到三者之间多组时钟差，从而可减小时钟差的误差，实现更精准的时钟同步。
可选的，本申请实施例提供的方法可应用于扩展现实(Extended Reality，XR)设备的通信过程中，其中，XR设备包含AR设备以及VR设备。如当应用于VR设备中时，主设备为头显设备，第一从设备与第二从设备为手柄设备。如图10所示，其中，头显发送同步信号(Synch)，此时左手柄与右手柄接收，之后，左手柄响应同步信号(Reply)，头显与右手柄接收，右手柄响应同步信号(Reply)，头显与左手柄接收。其中，在同步的各个帧中携带有时间参数信息，包括时间戳信息与时间间隔信息等，从而可根据时间参数信息确定三者之间的时钟差，使左手柄与右手柄与头显保持时钟同步。示意性的，在每一轮synch，接收(RX)，发送(TX)过程中，等帧长度大约为20字节，时长10us。在5个信道的情况下，一轮6帧与2次空闲(idle)，耗时400us，可节省时间，提高通信效率。
可选的，头显设备与手柄设备可进行先同步，后通信的方式；也可在通信过程中实时同步，本申请实施例对此不做限定。
请参考图11，其示出了本申请一个实施例提供的时钟同步装置的结构框图。该装置可以包括：
第一接收模块1101，用于接收主设备发送的相邻脉冲信号；
第一确定模块1102，用于基于所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔，确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备进行时钟同步；
第一发送模块1103，用于所述第一从设备与所述主设备时钟同步的情况下，向所述第二从设备发送相邻脉冲信号，以使所述第二从设备确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
可选的，所述第一接收模块1101，还用于：
接收所述主设备在至少两个跳频信道上发送的相邻脉冲信号；
所述第一确定模块1102，还用于：
基于在所述跳频信道上接收到的相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔，确定时间间隔差值；
基于各个所述时间间隔差值的均值，确定所述第一时钟差。
可选的，所述第一发送模块1103，还用于：
向所述主设备发送相邻脉冲信号，以使所述主设备确定第三时钟差；
所述第一接收模块1101，还用于：
接收所述主设备发送的所述第三时钟差；
所述装置还包括：
时钟调整模块，用于基于所述第一时钟差与所述第三时钟差的均值，调整时钟参数，以便与所述主设备时钟同步。
可选的，脉冲信号包含时间戳信息；
所述第一确定模块1102，还用于：
基于接收所述相邻脉冲信号的接收时间，确定所述接收时间间隔；
基于所述相邻脉冲信号中包含的时间戳信息，确定所述发送时间间隔；
基于所述接收时间间隔与所述发送时间间隔的时差，确定所述第一时钟差。
可选的，所述主设备用于向所述第二从设备发送相邻脉冲信号，以使所述第二从设备确定第四时钟差，所述第四时钟差用于所述第二从设备与所述主设备时钟同步。
可选的，所述第二从设备还用于向所述第一从设备与所述主设备发送相邻脉冲信号，所 述主设备用于接收所述相邻脉冲信号后确定第五时钟差。
可选的，所述第一接收模块1101，还用于：
接收所述第二从设备发送的相邻脉冲信号；
所述第一确定模块1102，还用于：
基于所述相邻脉冲信号的接收时间间隔以及所述第二从设备发送所述相邻脉冲信号的发送时间间隔，确定第六时钟差；
所述第一发送模块1103，还用于：
向所述主设备以及所述第二从设备发送相邻脉冲信号，以使所述主设备确定第七时钟差，以及使所述第二从设备确定第八时钟差；
所述第一确定模块1102，还用于：
基于各个时钟差，确定与所述主设备之间的主时钟差，以及确定与所述第二从设备之间的从时钟差。
可选的，所述第一确定模块1102，还用于：
基于所述第五时钟差与所述第六时钟差的时差，确定所述第一从设备与所述主设备之间的间接主时钟差；
基于所述第一时钟差、所述第七时钟差以及所述间接主时钟差的均值，确定所述主时钟差；
基于所述第一时钟差与所述第四时钟差的差异，确定所述第一从设备与所述第二从设备之间的间接从时钟差；
基于所述第六时钟差、所述第八时钟差以及所述间接从时钟差的均值，确定所述从时钟差。
可选的，所述主设备、所述第一从设备以及所述第二从设备循环发送所述相邻脉冲信号；
所述第一确定模块1102，还用于：
在第n轮同步过程中，基于第n轮的各个所述时钟差，确定与所述主设备之间的主时钟差，以及确定与所述第二从设备之间的从时钟差，其中，n为正整数。
可选的，所述第一发送模块1103，还用于：
在至少两个跳频信道上向所述第二从设备发送所述相邻脉冲信号。
可选的，所述第一接收模块1101，还用于接收所述第二从设备发送的相邻脉冲信号；
所述第一确定模块1102，还用于基于接收的所述相邻脉冲信号确定与所述第二从设备之间的第九时钟差；
所述第一发送模块1103，还用于向所述第二从设备发送所述第九时钟差，以使所述第二从设备根据所述第二时钟差与所述第九时钟差的均值调整时钟参数。
可选的，所述主设备为头戴式显示设备，所述第一从设备与所述第二从设备为手柄设备。
本申请实施例中，主设备可向第一从设备发送相邻脉冲信号，第一从设备根据接收相邻脉冲信号的接收时间间隔与主设备发送脉冲信号的发送时间间隔确定与主设备之间的第一时钟差，从而可利用第一时钟差进行时钟调整，与主设备保持时钟同步。且进一步的，在第一从设备与主设备时钟同步之后，第一从设备还可向第二从设备发送相邻脉冲信号，以使第二从设备与第一从设备保持时钟同步，使第二从设备也可与主设备保持时钟同步，实现递进式的时钟同步，可减少多设备通信过程中的干扰，提高通信质量。
请参考图12，其示出了本申请另一个实施例提供的时钟同步装置的结构框图。该装置可以包括：
第二发送模块1201，用于向第一从设备发送相邻脉冲信号，所述第一从设备用于基于所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备进行时钟同步；所述第一从 设备与所述主设备时钟同步的情况下，所述第一从设备还用于向第二从设备发送相邻脉冲信号，以使所述第二从设备确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
可选的，所述第二发送模块1201，还用于在至少两个跳频信道上向所述第一从设备发送相邻脉冲信号，所述第一从设备还用于基于各个时间间隔差值的均值确定所述第一时钟差，所述时间间隔差值基于在所述跳频信道上接收到的相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔确定得到。
可选的，所述装置还包括：
第二接收模块，用于接收所述第一从设备发送的相邻脉冲信号；
第二确定模块，用于基于所述相邻脉冲信号的接收时间间隔与所述第一从设备发送所述相邻脉冲信号的发送时间间隔，确定第三时钟差；
第二发送模块1201，还用于向所述第一从设备发送所述第三时钟差，以使所述第一从设备基于所述第一时钟差与所述第三时钟差的均值，调整时钟参数，以便与所述主设备时钟同步。
可选的，第二发送模块1201，还用于向所述第二从设备发送相邻脉冲信号，以使所述第二从设备确定第四时钟差，所述第四时钟差用于所述第二从设备与所述主设备进行时钟同步。
需要说明的是：上述实施例提供的装置在实现其功能时，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成，即将设备的内部结构划分成不同的功能模块，以完成以上描述的全部或者部分功能。另外，上述实施例提供的装置与方法实施例属于同一构思，其具体实现过程详见方法实施例，这里不再赘述。
请参考图13，其示出了本申请一个示例性实施例提供的电子设备1300的结构方框图。本申请中的电子设备1300可以包括一个或多个如下部件：存储器1320、处理器1310。
处理器1310可以包括一个或者多个处理核心。处理器1310利用各种接口和线路连接整个电子设备1300内的各个部分，通过运行或执行存储在存储器1320内的指令、程序、代码集或指令集，以及调用存储在存储器1320内的数据，执行电子设备1300的各种功能和处理数据。可选地，处理器1310可以采用数字信号处理(Digital Signal Processing，DSP)、现场可编程门阵列(Field－Programmable Gate Array，FPGA)、可编程逻辑阵列(Programmable Logic Array，PLA)中的至少一种硬件形式来实现。处理器1310可集成中央处理器(Central Processing Unit，CPU)、图像处理器(Graphics Processing Unit，GPU)和调制解调器等中的一种或几种的组合。其中，CPU主要处理操作系统、用户界面和应用程序等；GPU用于负责显示屏1330所需要显示的内容的渲染和绘制；调制解调器用于处理无线通信。可以理解的是，上述调制解调器也可以不集成到处理器1310中，单独通过一块通信芯片进行实现。
存储器1320可以包括随机存储器(Random Access Memory，RAM)，也可以包括只读存储器(Read-Only Memory，ROM)。可选地，该存储器1320包括非瞬时性计算机可读介质(non-transitory computer-readable storage medium)。存储器1320可用于存储指令、程序、代码、代码集或指令集。存储器1320可包括存储程序区和存储数据区，其中，存储程序区可存储用于实现操作系统的指令、用于实现至少一个功能的指令(比如触控功能、声音播放功能、图像播放功能等)、用于实现上述各个方法实施例的指令等，该操作系统可以是安卓(Android)系统(包括基于Android系统深度开发的系统)、苹果公司开发的IOS系统(包括基于IOS系统深度开发的系统)或其它系统。存储数据区还可以存储电子设备1300在使用中所创建的数据(比如电话本、音视频数据、聊天记录数据)等。
除此之外，本领域技术人员可以理解，上述附图所示出的电子设备1300的结构并不构成对电子设备1300的限定，电子设备可以包括比图示更多或更少的部件，或者组合某些部件， 或者不同的部件布置。比如，电子设备1300中还包括射频电路、拍摄组件、传感器、音频电路、无线保真(Wireless Fidelity，WiFi)组件、电源、蓝牙组件等部件，在此不再赘述。
本申请实施例还提供了一种计算机可读存储介质，该计算机可读存储介质存储有至少一条程序代码，所述程序代码由处理器加载并执行以实现如上各个实施例所述的时钟同步方法。
本申请实施例提供了一种计算机程序产品或计算机程序，该计算机程序产品或计算机程序包括计算机指令，该计算机指令存储在计算机可读存储介质中。电子设备的处理器从计算机可读存储介质读取该计算机指令，处理器执行该计算机指令，使得该终端执行上述方面的各种可选实现方式中提供的时钟同步方法。
应当理解的是，在本文中提及的“多个”是指两个或两个以上。“和/或”，描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。字符“/”一般表示前后关联对象是一种“或”的关系。另外，本文中描述的步骤编号，仅示例性示出了步骤间的一种可能的执行先后顺序，在一些其它实施例中，上述步骤也可以不按照编号顺序来执行，如两个不同编号的步骤同时执行，或者两个不同编号的步骤按照与图示相反的顺序执行，本申请实施例对此不作限定。
以上所述仅为本申请的可选实施例，并不用以限制本申请，凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本申请的保护范围之内。

Claims (20)

  1. 一种时钟同步方法，所述方法用于第一从设备，所述方法包括：
    接收主设备发送的相邻脉冲信号；
    基于所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔，确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备进行时钟同步；
    所述第一从设备与所述主设备时钟同步的情况下，向所述第二从设备发送相邻脉冲信号，以使所述第二从设备确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
  2. 根据权利要求1所述的方法，其中，所述接收主设备发送的相邻脉冲信号，包括：
    接收所述主设备在至少两个跳频信道上发送的相邻脉冲信号；
    所述基于所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔，确定第一时钟差，包括：
    基于在所述跳频信道上接收到的相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔，确定时间间隔差值；
    基于各个所述时间间隔差值的均值，确定所述第一时钟差。
  3. 根据权利要求1所述的方法，其中，所述方法还包括：
    向所述主设备发送相邻脉冲信号，以使所述主设备确定第三时钟差；
    接收所述主设备发送的所述第三时钟差；
    基于所述第一时钟差与所述第三时钟差的均值，调整时钟参数，以便与所述主设备时钟同步。
  4. 根据权利要求1至3任一所述的方法，其中，脉冲信号包含时间戳信息；
    所述基于所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔，确定第一时钟差，包括：
    基于接收所述相邻脉冲信号的接收时间，确定所述接收时间间隔；
    基于所述相邻脉冲信号中包含的时间戳信息，确定所述发送时间间隔；
    基于所述接收时间间隔与所述发送时间间隔的时差，确定所述第一时钟差。
  5. 根据权利要求1至3任一所述的方法，其中，所述主设备用于向所述第二从设备发送相邻脉冲信号，以使所述第二从设备确定第四时钟差，所述第四时钟差用于所述第二从设备与所述主设备进行时钟同步。
  6. 根据权利要求5所述的方法，其中，所述第二从设备还用于向所述第一从设备与所述主设备发送相邻脉冲信号，所述主设备用于接收所述相邻脉冲信号后确定第五时钟差；
    所述方法还包括：
    接收所述第二从设备发送的相邻脉冲信号；
    基于接收所述相邻脉冲信号的接收时间间隔以及所述第二从设备发送所述相邻脉冲信号的发送时间间隔，确定第六时钟差；
    向所述主设备以及所述第二从设备发送相邻脉冲信号，以使所述主设备确定第七时钟差，以及使所述第二从设备确定第八时钟差；
    基于各个时钟差，确定与所述主设备之间的主时钟差，以及确定与所述第二从设备之间的从时钟差。
  7. 根据权利要求6所述的方法，其中，所述基于各个时钟差，确定与所述主设备之间的主时钟差，包括：
    基于所述第五时钟差与所述第六时钟差的时差，确定所述第一从设备与所述主设备之间的间接主时钟差；
    基于所述第一时钟差、所述第七时钟差以及所述间接主时钟差的均值，确定所述主时钟差；
    所述基于各个时钟差，确定与所述第二从设备之间的从时钟差，包括：
    基于所述第一时钟差与所述第四时钟差的差异，确定所述第一从设备与所述第二从设备之间的间接从时钟差；
    基于所述第六时钟差、所述第八时钟差以及所述间接从时钟差的均值，确定所述从时钟差。
  8. 根据权利要求6所述的方法，其中，所述主设备、所述第一从设备以及所述第二从设备循环发送所述相邻脉冲信号；
    所述基于各个时钟差，确定与所述主设备之间的主时钟差，以及确定与所述第二从设备之间的从时钟差，包括：
    在第n轮同步过程中，基于第n轮的各个所述时钟差，确定与所述主设备之间的主时钟差，以及确定与所述第二从设备之间的从时钟差，其中，n为正整数。
  9. 根据权利要求1至3任一所述的方法，其中，所述向所述第二从设备发送相邻脉冲信号，包括：
    在至少两个跳频信道上向所述第二从设备发送所述相邻脉冲信号。
  10. 根据权利要求1至3任一所述的方法，其中，所述向所述第二从设备发送相邻脉冲信号之后，所述方法还包括：
    接收所述第二从设备发送的相邻脉冲信号；
    基于接收的所述相邻脉冲信号确定与所述第二从设备之间的第九时钟差；
    向所述第二从设备发送所述第九时钟差，以使所述第二从设备根据所述第二时钟差与所述第九时钟差的均值调整时钟参数。
  11. 根据权利要求1至3任一所述的方法，其中，所述主设备为头戴式显示设备，所述第一从设备与所述第二从设备为手柄设备。
  12. 一种时钟同步方法，所述方法用于主设备，所述方法包括：
    向第一从设备发送相邻脉冲信号，所述第一从设备用于基于所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备进行时钟同步；
    所述第一从设备与所述主设备时钟同步的情况下，所述第一从设备还用于向第二从设备发送相邻脉冲信号，以使所述第二从设备确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
  13. 根据权利要求12所述的方法，其中，所述向第一从设备发送相邻脉冲信号，包括：
    在至少两个跳频信道上向所述第一从设备发送相邻脉冲信号，所述第一从设备还用于基于各个时间间隔差值的均值确定所述第一时钟差，所述时间间隔差值基于在所述跳频信道上接收到的相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间 隔确定得到。
  14. 根据权利要求12所述的方法，其中，所述方法还包括：
    接收所述第一从设备发送的相邻脉冲信号；
    基于所述相邻脉冲信号的接收时间间隔与所述第一从设备发送所述相邻脉冲信号的发送时间间隔，确定第三时钟差；
    向所述第一从设备发送所述第三时钟差，以使所述第一从设备基于所述第一时钟差与所述第三时钟差的均值，调整时钟参数，以便与所述主设备时钟同步。
  15. 根据权利要求12至14任一所述的方法，其中，所述方法还包括：
    向所述第二从设备发送相邻脉冲信号，以使所述第二从设备确定第四时钟差，所述第四时钟差用于所述第二从设备与所述主设备进行时钟同步。
  16. 一种时钟同步装置，所述装置包括：
    第一接收模块，用于接收主设备发送的相邻脉冲信号；
    第一确定模块，用于基于所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔，确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备进行时钟同步；
    第一发送模块，用于所述第一从设备与所述主设备时钟同步的情况下，向所述第二从设备发送相邻脉冲信号，以使所述第二从设备确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
  17. 一种时钟同步装置，所述装置包括：
    第二发送模块，用于向第一从设备发送相邻脉冲信号，所述第一从设备用于基于接收所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备进行时钟同步；所述第一从设备与所述主设备保持时钟同步的情况下，所述第一从设备还用于向第二从设备发送相邻脉冲信号，以使所述第二从设备确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
  18. 一种时钟同步系统，所述系统包括主设备、第一从设备以及第二从设备；
    所述主设备用于向所述第一从设备发送相邻脉冲信号；
    所述第一从设备用于接收所述主设备发送的所述相邻脉冲信号；基于所述相邻脉冲信号的接收时间间隔以及所述主设备发送所述相邻脉冲信号的发送时间间隔，确定第一时钟差，所述第一时钟差用于所述第一从设备与所述主设备进行时钟同步；所述第一从设备与所述主设备保持时钟同步的情况下，向所述第二从设备发送相邻脉冲信号；
    所述第二从设备用于确定第二时钟差，所述第二时钟差用于所述第二从设备与所述第一从设备进行时钟同步。
  19. 一种电子设备，所述电子设备包括处理器和存储器，所述存储器中存储有至少一段程序，所述至少一段程序由所述处理器加载并执行以实现如权利要求1至11任一所述的时钟同步方法，或，执行如权利要求12至15任一所述的时钟同步方法。
  20. 一种计算机可读存储介质，所述存储介质存储有至少一条指令，所述至少一条指令用于被处理器执行以实现如权利要求1至11任一所述的时钟同步方法，或，执行如权利要求12至15任一所述的时钟同步方法。
PCT/CN2023/116293 2022-10-27 2023-08-31 时钟同步方法、装置、系统、设备及存储介质 WO2024087881A1 (zh)

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CN115801168A (zh) * 2022-10-27 2023-03-14 Oppo广东移动通信有限公司 时钟同步方法、装置、系统、设备及存储介质

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