WO2024082823A1 - Method for determining electrical length of compensation line for main power amplifier in doherty architecture - Google Patents

Method for determining electrical length of compensation line for main power amplifier in doherty architecture Download PDF

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Publication number
WO2024082823A1
WO2024082823A1 PCT/CN2023/115059 CN2023115059W WO2024082823A1 WO 2024082823 A1 WO2024082823 A1 WO 2024082823A1 CN 2023115059 W CN2023115059 W CN 2023115059W WO 2024082823 A1 WO2024082823 A1 WO 2024082823A1
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Prior art keywords
power amplifier
impedance
electrical length
main power
compensation line
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PCT/CN2023/115059
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French (fr)
Chinese (zh)
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蔡丽媛
郭嘉帅
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深圳飞骧科技股份有限公司
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Publication of WO2024082823A1 publication Critical patent/WO2024082823A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/213—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier

Definitions

  • the present invention belongs to the technical field of wireless communications, and in particular relates to a method for determining the electrical length of a Doherty architecture main power amplifier compensation line.
  • the Doherty architecture is a commonly used power amplifier structure, and its existing structure is shown in FIG1 .
  • the Doherty power amplifier is composed of two power amplifiers, a main power amplifier and an auxiliary power amplifier, a power divider, and a load modulation network, wherein the two power amplifiers are biased in different working states, the main power amplifier is biased in class A and B, and the auxiliary power amplifier is biased in class C.
  • the input signal passes through the power divider and the power is input into the main power amplifier circuit and the auxiliary power amplifier circuit respectively according to the power division ratio of 1:n.
  • P U 2 /R (1);
  • the phase of the main power amplifier circuit is changed so that the output impedance of the power amplifier tube of the main power amplifier matches the load impedance Z 0 *(n+1) when in the back-off state, thereby improving the efficiency of the back-off zone, while not changing the matching degree between the output impedance and the load impedance when in saturation.
  • the impedance of compensation line A can be determined based on the impedance of compensation line B as an impedance transformation line. If the impedance matching of the saturated power is not changed, the impedance of compensation line A should be the same as that of compensation line B, so the appropriate electrical length of compensation line A needs to be determined.
  • the process of determining the power back-off point requirement and the peak power ratio based on the preset signal peak-to-average ratio requires a series of formula calculations, and only after obtaining the above parameters can the specific electrical length of the compensation line of the main power amplifier be determined. This process is very complicated and is not conducive to quickly obtaining the electrical length parameters to meet the requirements of the power amplifier design process.
  • the embodiment of the present invention provides a method for determining the electrical length of a main power amplifier compensation line in a Doherty architecture, aiming to solve the problem that the prior art requires a lot of calculations and is relatively complicated in the process of determining the electrical length of the main power amplifier compensation line.
  • an embodiment of the present invention provides a method for determining the electrical length of a main power amplifier compensation line in a Doherty architecture, the method comprising the following steps:
  • a simulation power amplifier circuit is constructed, the connection sequence of which is first port impedance, output matching circuit, compensation line, and second port impedance;
  • the impedance value of the first port impedance corresponding to the center frequency point becomes the same as the output optimal impedance value
  • the impedance value of the center frequency point is determined to be the numerical value of the electrical length when the optimal impedance value is output, and the value is used as the final electrical length value and outputted.
  • the first port impedance is output impedance
  • the second port impedance is load impedance
  • the initial length of the electrical length is 0 mm.
  • simulation environment is based on ADS.
  • an embodiment of the present invention further provides a system for determining the electrical length of a main power amplifier compensation line in a Doherty architecture, comprising:
  • An impedance data acquisition module used to acquire an optimal output impedance value of a main power amplifier, wherein the main power amplifier has a first port impedance and a second port impedance;
  • a simulation module used to build a simulation power amplifier circuit in a simulation environment, the connection sequence of which is first port impedance, output matching circuit, compensation line, and second port impedance;
  • a Smith circle acquisition module used to acquire the Smith circle of the simulated power amplifier circuit, and acquire the S parameter of the first port impedance according to the Smith circle;
  • a line length initialization module used to set the electrical length of the compensation line to an adjustable state
  • An impedance adjustment module used for rotating the center frequency point of the Smith circle so that the impedance value of the first port impedance corresponding to the center frequency point becomes the same as the output optimal impedance value
  • the electrical length output module is used to determine the numerical value of the electrical length when the impedance value of the center frequency point is the output optimal impedance value, and output it as the final electrical length value.
  • an embodiment of the present invention further provides a computer device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the steps in the method for determining the electrical length of the compensation line of a main power amplifier in a Doherty architecture as described in any one of the above embodiments are implemented.
  • an embodiment of the present invention further provides a computer-readable storage medium, wherein a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the method for determining the electrical length of the main power amplifier compensation line in the Doherty architecture as described in any one of the above embodiments is implemented. step.
  • the beneficial effects achieved by the present invention are as follows: the working state of the main power amplifier and the change process of the load impedance are analyzed according to the working principle of the Doherty architecture power amplifier, the working environment of the auxiliary power amplifier during back-off is established based on ADS according to the back-off requirements of the actual working signal, and the electrical length of the compensation line is further obtained by graphically using the Smith circle, thereby avoiding complex calculation processes and improving the efficiency of the power amplifier design work.
  • FIG1 is a schematic diagram of the existing structure of the Doherty architecture
  • FIG. 2 is a schematic flow chart of the steps of a method for determining the electrical length of a main power amplifier compensation line in a Doherty architecture provided by an embodiment of the present invention
  • FIG. 3 is a schematic diagram of the structure of a simulation power amplifier circuit designed in an embodiment of the present invention.
  • FIG4 is a schematic diagram of obtaining S parameters through a Smith circle provided by an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of obtaining a final electrical length value through a Smith circle according to an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of the structure of a system for determining the electrical length of a main power amplifier compensation line in a Doherty architecture provided by an embodiment of the present invention
  • FIG. 7 is a schematic diagram of the structure of a computer device provided in an embodiment of the present invention.
  • FIG. 2 is a schematic flow chart of the steps of a method for determining the electrical length of a main power amplifier compensation line in a Doherty architecture provided by an embodiment of the present invention, specifically comprising the following steps:
  • the first port impedance is the output impedance of the main power amplifier
  • the second port impedance is the load impedance
  • the optimal impedance value can be determined according to actual needs.
  • the optimal output impedance value can be obtained by scanning the power point of the power amplifier tube, etc. This method can be implemented through the load traction simulation platform LoadPull.
  • ADS Advanced Design System
  • Figure 3 is a schematic diagram of the structure of the simulation power amplifier circuit designed in an embodiment of the present invention.
  • the first port impedance Term1 is connected to the output matching circuit, the output matching circuit is connected to the compensation line, and finally the compensation line is connected to the second port impedance Term2.
  • S103 Obtain a Smith circle of the simulated power amplifier circuit, and obtain an S parameter of the first port impedance according to the Smith circle.
  • the Smith circle is an image used for impedance matching between high-frequency circuits. It is divided into two upper and lower halves by the horizontal line of the resistance line. The upper half is called the inductance area, where the imaginary values of all points are positive; the lower half is called the capacitance area, where the imaginary values of all points are negative.
  • the Smith circle is obtained by simulation data constructed by ADS software.
  • Figure 4 is a schematic diagram of obtaining S parameters through the Smith circle provided by an embodiment of the present invention.
  • the centimeter ratio n between the main power amplifier and the auxiliary power amplifier in the Doherty architecture is 1.5
  • the impedance value of the first port impedance is 50 ohms
  • the operating frequency band of the simulated power amplifier circuit is 3.4GHz to 3.6GHz.
  • the output optimal impedance value of the first port impedance is (7.235+j*4.974) ⁇ .
  • the initial length of the electrical length is 0 mm.
  • the purpose of this step is to construct a circuit load state in which the output impedance of the power amplifier tube of the main power amplifier matches the load impedance when the power amplifier tube is in the fallback state.
  • Figure 5 is a schematic diagram of obtaining the final electrical length value through the Smith circle in an embodiment of the present invention.
  • the various parameters of the analog circuit with a compensation line can be obtained, and the position of the center frequency point is adjusted, and then the length of the compensation line is adjusted, and the impedance is continuously changed.
  • the length of the compensation line L 3.1mm, that is, point m1
  • the corresponding impedance at this time (7.211+j*0.467) ⁇ is closest to the obtained output optimal impedance value (7.235+j*4.974) ⁇ . Therefore, under the numerical value of Figure 4, the final electrical length value can be obtained as 3.1mm.
  • the beneficial effects achieved by the present invention are as follows: the working state of the main power amplifier and the change process of the load impedance are analyzed according to the working principle of the Doherty architecture power amplifier, the working environment of the auxiliary power amplifier during back-off is established based on ADS according to the back-off requirements of the actual working signal, and the electrical length of the compensation line is further obtained by graphically using the Smith circle, thereby avoiding complex calculation processes and improving the efficiency of the power amplifier design work.
  • the embodiment of the present invention further provides a system for compensating the electrical length of an auxiliary power amplifier in a Doherty architecture.
  • FIG6 is a structural diagram of a system for determining the electrical length of a main power amplifier compensation line in a Doherty architecture provided by an embodiment of the present invention.
  • the system 200 for determining the electrical length of a main power amplifier compensation line in a Doherty architecture includes:
  • An impedance data acquisition module 201 is used to acquire an optimal output impedance value of a main power amplifier, wherein the main power amplifier has a first port impedance and a second port impedance;
  • a simulation module 202 is used to build a simulation power amplifier circuit in a simulation environment, the connection sequence of which is a first port impedance, an output matching circuit, a compensation line, and a second port impedance;
  • a Smith circle acquisition module 203 is used to acquire the Smith circle of the simulated power amplifier circuit, and acquire the S parameter of the first port impedance according to the Smith circle;
  • a line length initialization module 204 used to set the electrical length of the compensation line to an adjustable state
  • the impedance adjustment module 205 is used to rotate the center frequency of the Smith circle so that the impedance value of the first port impedance corresponding to the center frequency becomes the same as the output optimal impedance value;
  • the electrical length output module 206 is used to determine the value of the electrical length when the impedance value of the center frequency point is the output optimal impedance value, and output it as the final electrical length value.
  • the system 200 for determining the electrical length of the main power amplifier compensation line in the Doherty architecture can implement the steps in the method for determining the electrical length of the main power amplifier compensation line in the Doherty architecture in the above embodiment, and can achieve the same technical effect. Please refer to the description in the above embodiment and will not be repeated here.
  • An embodiment of the present invention further provides a computer device.
  • the computer device 300 includes: a memory 302, a processor 301, and a computer program stored in the memory 302 and executable on the processor 301.
  • the processor 301 calls the computer program stored in the memory 302 to execute the steps of the method for determining the electrical length of the main power amplifier compensation line in the Doherty architecture provided in the embodiment of the present invention, referring to FIG. 2 , specifically including:
  • the first port impedance is the output impedance of the main power amplifier
  • the second port impedance is the load impedance
  • simulation environment is based on ADS.
  • S103 Obtain a Smith circle of the simulated power amplifier circuit, and obtain an S parameter of the first port impedance according to the Smith circle.
  • the initial length of the electrical length is 0 mm.
  • S106 Determine that the impedance value of the center frequency point is the numerical value of the electrical length when the optimal impedance value is output, and output it as the final electrical length value.
  • the computer device 300 provided in the embodiment of the present invention can implement the steps in the method for determining the electrical length of the main power amplifier compensation line in the Doherty architecture in the above embodiment, and can achieve the same technical effect. Please refer to the description in the above embodiment and will not be repeated here.
  • An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored.
  • a computer program is stored.
  • the various processes and steps in the method for determining the electrical length of the main power amplifier compensation line in the Doherty architecture provided in the embodiment of the present invention are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.
  • the storage medium can be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM).
  • the above embodiment methods can be implemented by means of software plus a necessary general hardware platform, or by hardware, but in many cases the former is a better implementation method.
  • the technical solution of the present invention, or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium (such as ROM/RAM, disk, CD), including
  • the method includes several instructions for enabling a terminal (which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in the various embodiments of the present invention.

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Abstract

The present invention belongs to the technical field of wireless communications, and particularly relates to a method for determining the electrical length of a compensation line for a main power amplifier in a Doherty architecture. The method comprises: acquiring an optimal output impedance value of a main power amplifier, wherein the main power amplifier has a first port impedance and a second port impedance; in a simulation environment, building a simulation power amplifier circuit, the connection sequence of which is sequentially the first port impedance, an output matching circuit, a compensation line and the second port impedance; acquiring a Smith chart of the simulation power amplifier circuit, and acquiring an S parameter of the first port impedance according to the Smith chart; setting the electrical length of the compensation line to be in an adjustable state; by means of rotating a central frequency point of the Smith chart, changing the impedance value of the first port impedance corresponding to the central frequency point to be the same as the optimal output impedance value; and determining the numerical value of the electrical length of when the impedance value of the central frequency point is the optimal output impedance value, and taking the numerical value as a final electrical length value and outputting same. In the present invention, a Smith chart is used to perform graphical solution to obtain the electrical length of the compensation line for the main power amplifier, thereby improving the operating efficiency.

Description

确定Doherty架构主功放补偿线电长度的方法Method for determining the electrical length of the compensation line of the Doherty architecture main power amplifier 技术领域Technical Field
本发明属于无线通信技术领域，尤其涉及一种确定Doherty架构主功放补偿线电长度的方法。The present invention belongs to the technical field of wireless communications, and in particular relates to a method for determining the electrical length of a Doherty architecture main power amplifier compensation line.
背景技术Background technique
Doherty架构是一种常用的功率放大器结构，其现有结构如图1所示，图1中，Doherty功放由主功放和辅助功放的两路功放、功分器以及负载调制网络构成，其中两路功放偏置的工作状态不同，主功放偏置在A、B类，辅助功放偏置在C类。The Doherty architecture is a commonly used power amplifier structure, and its existing structure is shown in FIG1 . In FIG1 , the Doherty power amplifier is composed of two power amplifiers, a main power amplifier and an auxiliary power amplifier, a power divider, and a load modulation network, wherein the two power amplifiers are biased in different working states, the main power amplifier is biased in class A and B, and the auxiliary power amplifier is biased in class C.
在功放正常工作的过程中，需经历功率回退区，最后到达饱和区，在功率回退时与功率饱和时其阻抗不同，其原理如下，输入信号经过功分器，并按照功分比1：n，将功率分别输入主功放电路与辅助功放电路，当功率饱和时，设主功放输出阻抗为Zm＝Z0，功放的输入功分比为1：n，根据功率计算公式(1)：
P＝U2/R   (1)；During the normal operation of the power amplifier, it needs to go through the power back-off zone and finally reach the saturation zone. Its impedance is different when the power is backed off and when the power is saturated. The principle is as follows: the input signal passes through the power divider and the power is input into the main power amplifier circuit and the auxiliary power amplifier circuit respectively according to the power division ratio of 1:n. When the power is saturated, the output impedance of the main power amplifier is set to Zm = Z0 , and the input power division ratio of the power amplifier is 1:n. According to the power calculation formula (1):
P = U 2 /R (1);
可知，两路功放的输出阻抗之比为n：1，辅助功放功率饱和时Zp等于Z0/n，合路点阻抗满足(2)：
It can be seen that the ratio of the output impedances of the two power amplifiers is n:1. When the auxiliary power amplifier is saturated, Z p is equal to Z 0 /n, and the impedance of the junction point satisfies (2):
当功放功率处于回退状态时，辅助功放不工作，只有主功放工作，此时合路点阻抗经过补偿线B进行阻抗变换，Zm＝(Z0)2/ZQ＝Z0*(n+1)，在功率回退区，主功放负载阻抗由Z0*(n+1)变换至Z0，故仍需要额外添加一段补偿线A， 改变主功放电路相位，使主功放的功放管在回退状态时其输出端阻抗与负载阻抗Z0*(n+1)匹配，提高回退区效率，同时不改变饱和时输出阻抗与负载阻抗的匹配度。When the power amplifier is in the back-off state, the auxiliary power amplifier does not work, and only the main power amplifier works. At this time, the impedance of the junction point is transformed through the compensation line B, Z m = (Z 0 ) 2 /Z Q = Z 0* (n+1). In the power back-off area, the load impedance of the main power amplifier is transformed from Z 0* (n+1) to Z 0 , so an additional compensation line A is still needed. The phase of the main power amplifier circuit is changed so that the output impedance of the power amplifier tube of the main power amplifier matches the load impedance Z 0 *(n+1) when in the back-off state, thereby improving the efficiency of the back-off zone, while not changing the matching degree between the output impedance and the load impedance when in saturation.
一般的，补偿线A的阻抗可根据作为阻抗变换线的补偿线B的阻抗来确定，若不改变饱和功率的阻抗匹配，补偿线A的阻抗应与补偿线B的相同，所以需要确定合适的补偿线A的电长度。Generally, the impedance of compensation line A can be determined based on the impedance of compensation line B as an impedance transformation line. If the impedance matching of the saturated power is not changed, the impedance of compensation line A should be the same as that of compensation line B, so the appropriate electrical length of compensation line A needs to be determined.
然而在现有技术中，基于预设的信号峰均比确定功率回退点需求以及峰值功率比的过程需要经过一系列的公式计算，并在得到上述参数以后才能确定主功放的补偿线的具体电长度，这个过程非常复杂，不利于快速地获取电长度参数，以满足功放设计流程的要求。However, in the prior art, the process of determining the power back-off point requirement and the peak power ratio based on the preset signal peak-to-average ratio requires a series of formula calculations, and only after obtaining the above parameters can the specific electrical length of the compensation line of the main power amplifier be determined. This process is very complicated and is not conducive to quickly obtaining the electrical length parameters to meet the requirements of the power amplifier design process.
发明内容Summary of the invention
本发明实施例提供一种确定Doherty架构中主功放补偿线电长度的方法，旨在解决现有技术对于主功放补偿线电长度的确认过程需要大量计算、较为复杂的问题。The embodiment of the present invention provides a method for determining the electrical length of a main power amplifier compensation line in a Doherty architecture, aiming to solve the problem that the prior art requires a lot of calculations and is relatively complicated in the process of determining the electrical length of the main power amplifier compensation line.
第一方面，本发明实施例提供一种确定Doherty架构中主功放补偿线电长度的方法，所述方法包括以下步骤：In a first aspect, an embodiment of the present invention provides a method for determining the electrical length of a main power amplifier compensation line in a Doherty architecture, the method comprising the following steps:
获取主功放的输出最佳阻抗值，所述主功放具有第一端口阻抗和第二端口阻抗；Obtaining an optimal output impedance value of a main power amplifier, wherein the main power amplifier has a first port impedance and a second port impedance;
在仿真环境中搭建连接顺序依次为第一端口阻抗、输出匹配电路、补偿线、第二端口阻抗的仿真功放电路；In a simulation environment, a simulation power amplifier circuit is constructed, the connection sequence of which is first port impedance, output matching circuit, compensation line, and second port impedance;
获取所述仿真功放电路的史密斯圆，并根据所述史密斯圆获取所述第一端口阻抗端口的S参数；Obtaining a Smith circle of the simulated power amplifier circuit, and obtaining an S parameter of the impedance port of the first port according to the Smith circle;
将所述补偿线的电长度设为可调节状态；Setting the electrical length of the compensation line to an adjustable state;
通过旋转所述史密斯圆的中心频点，使所述中心频点对应的所述第一端口阻抗的阻抗值变为与所述输出最佳阻抗值相同； By rotating the center frequency point of the Smith circle, the impedance value of the first port impedance corresponding to the center frequency point becomes the same as the output optimal impedance value;
确定所述中心频点的阻抗值为所述输出最佳阻抗值时的所述电长度的数值大小，将其作为最终电长度值并输出。The impedance value of the center frequency point is determined to be the numerical value of the electrical length when the optimal impedance value is output, and the value is used as the final electrical length value and outputted.
更进一步地，所述第一端口阻抗为输出阻抗，所述第二端口阻抗为负载阻抗。Furthermore, the first port impedance is output impedance, and the second port impedance is load impedance.
更进一步地，所述电长度的初始长度为0mm。Furthermore, the initial length of the electrical length is 0 mm.
更进一步地，所述仿真环境基于ADS。Furthermore, the simulation environment is based on ADS.
第二方面，本发明实施例还提供一种确定Doherty架构中主功放补偿线电长度的系统，包括：In a second aspect, an embodiment of the present invention further provides a system for determining the electrical length of a main power amplifier compensation line in a Doherty architecture, comprising:
阻抗数据获取模块，用于获取主功放的输出最佳阻抗值，所述主功放具有第一端口阻抗和第二端口阻抗；An impedance data acquisition module, used to acquire an optimal output impedance value of a main power amplifier, wherein the main power amplifier has a first port impedance and a second port impedance;
仿真模块，用于在仿真环境中搭建连接顺序依次为第一端口阻抗、输出匹配电路、补偿线、第二端口阻抗的仿真功放电路；A simulation module, used to build a simulation power amplifier circuit in a simulation environment, the connection sequence of which is first port impedance, output matching circuit, compensation line, and second port impedance;
史密斯圆获取模块，用于获取所述仿真功放电路的史密斯圆，并根据所述史密斯圆获取所述第一端口阻抗的S参数；A Smith circle acquisition module, used to acquire the Smith circle of the simulated power amplifier circuit, and acquire the S parameter of the first port impedance according to the Smith circle;
线长度初始模块，用于将所述补偿线的电长度设为可调节状态；A line length initialization module, used to set the electrical length of the compensation line to an adjustable state;
阻抗调节模块，用于通过旋转所述史密斯圆的中心频点，使所述中心频点对应的所述第一端口阻抗的阻抗值变为与所述输出最佳阻抗值相同；An impedance adjustment module, used for rotating the center frequency point of the Smith circle so that the impedance value of the first port impedance corresponding to the center frequency point becomes the same as the output optimal impedance value;
电长度输出模块，用于确定所述中心频点的阻抗值为所述输出最佳阻抗值时的所述电长度的数值大小，将其作为最终电长度值并输出。The electrical length output module is used to determine the numerical value of the electrical length when the impedance value of the center frequency point is the output optimal impedance value, and output it as the final electrical length value.
第三方面，本发明实施例还提供一种计算机设备，包括：存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序，所述处理器执行所述计算机程序时实现如上述实施例中任意一项所述的确定Doherty架构中主功放补偿线电长度的方法中的步骤。In a third aspect, an embodiment of the present invention further provides a computer device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the steps in the method for determining the electrical length of the compensation line of a main power amplifier in a Doherty architecture as described in any one of the above embodiments are implemented.
第四方面，本发明实施例还提供一种计算机可读存储介质，所述计算机可读存储介质上存储有计算机程序，所述计算机程序被处理器执行时实现如上述实施例中任意一项所述的确定Doherty架构中主功放补偿线电长度的方法中的 步骤。In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the method for determining the electrical length of the main power amplifier compensation line in the Doherty architecture as described in any one of the above embodiments is implemented. step.
本发明所达到的有益效果，由于根据Doherty架构功放的工作原理来分析主功放的工作状态以及负载阻抗的变化过程，依据实际工作信号的回退需要，基于ADS搭建辅助功放回退时的工作环境，并进一步采用史密斯圆进行图解求得补偿线的电长度，从而避免了复杂的计算过程，提高了功率放大器设计工作的效率。The beneficial effects achieved by the present invention are as follows: the working state of the main power amplifier and the change process of the load impedance are analyzed according to the working principle of the Doherty architecture power amplifier, the working environment of the auxiliary power amplifier during back-off is established based on ADS according to the back-off requirements of the actual working signal, and the electrical length of the compensation line is further obtained by graphically using the Smith circle, thereby avoiding complex calculation processes and improving the efficiency of the power amplifier design work.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1是Doherty架构现有结构示意图；FIG1 is a schematic diagram of the existing structure of the Doherty architecture;
图2是本发明实施例提供的确定Doherty架构中主功放补偿线电长度的方法的步骤流程示意图；2 is a schematic flow chart of the steps of a method for determining the electrical length of a main power amplifier compensation line in a Doherty architecture provided by an embodiment of the present invention;
图3是本发明实施例设计的仿真功放电路的结构示意图；3 is a schematic diagram of the structure of a simulation power amplifier circuit designed in an embodiment of the present invention;
图4是本发明实施例提供的通过史密斯圆获取S参数的示意图；FIG4 is a schematic diagram of obtaining S parameters through a Smith circle provided by an embodiment of the present invention;
图5是本发明实施例通过史密斯圆获取最终电长度值的示意图；5 is a schematic diagram of obtaining a final electrical length value through a Smith circle according to an embodiment of the present invention;
图6是本发明实施例提供的确定Doherty架构中主功放补偿线电长度的系统的结构示意图；6 is a schematic diagram of the structure of a system for determining the electrical length of a main power amplifier compensation line in a Doherty architecture provided by an embodiment of the present invention;
图7是本发明实施例提供的计算机设备的结构示意图。FIG. 7 is a schematic diagram of the structure of a computer device provided in an embodiment of the present invention.
具体实施方式Detailed ways
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
请参照图2，图2是本发明实施例提供的确定Doherty架构中主功放补偿线电长度的方法的步骤流程示意图，具体包括以下步骤：Please refer to FIG. 2 , which is a schematic flow chart of the steps of a method for determining the electrical length of a main power amplifier compensation line in a Doherty architecture provided by an embodiment of the present invention, specifically comprising the following steps:
S101、获取主功放的输出最佳阻抗值，所述主功放具有第一端口阻抗和第二端口阻抗。 S101 . Obtain an optimal output impedance value of a main power amplifier, where the main power amplifier has a first port impedance and a second port impedance.
更进一步地，所述第一端口阻抗为主功放的输出阻抗，所述第二端口阻抗为负载阻抗。Furthermore, the first port impedance is the output impedance of the main power amplifier, and the second port impedance is the load impedance.
具体的，所述最佳阻抗值可以根据实际需要确定，在实际的实施过程中，可以通过功放管的功率点扫描等方式来获取所述输出最佳阻抗值，这种方式可以通过负载牵引仿真平台LoadPull实现。Specifically, the optimal impedance value can be determined according to actual needs. In the actual implementation process, the optimal output impedance value can be obtained by scanning the power point of the power amplifier tube, etc. This method can be implemented through the load traction simulation platform LoadPull.
S102、在仿真环境中搭建连接顺序依次为第一端口阻抗、输出匹配电路、补偿线、第二端口阻抗的仿真功放电路。S102, building a simulation power amplifier circuit in a simulation environment, the connection sequence of which is first port impedance, output matching circuit, compensation line, and second port impedance.
更进一步地，所述仿真环境基于ADS。ADS(Advance Design System)是一种常用的射频、微波和信号完整性和电源完整性设计平台，具体的，请参照图3，图3是本发明实施例设计的仿真功放电路的结构示意图，所述第一端口阻抗Term1连接所述输出匹配电路，所述输出匹配电路连接所述补偿线，最终再由所述补偿线连接所述第二端口阻抗Term2。Furthermore, the simulation environment is based on ADS. ADS (Advance Design System) is a commonly used RF, microwave, signal integrity and power integrity design platform. Specifically, please refer to Figure 3, which is a schematic diagram of the structure of the simulation power amplifier circuit designed in an embodiment of the present invention. The first port impedance Term1 is connected to the output matching circuit, the output matching circuit is connected to the compensation line, and finally the compensation line is connected to the second port impedance Term2.
S103、获取所述仿真功放电路的史密斯圆，并根据所述史密斯圆获取所述第一端口阻抗的S参数。S103: Obtain a Smith circle of the simulated power amplifier circuit, and obtain an S parameter of the first port impedance according to the Smith circle.
所述史密斯圆是一种高频电路之间的阻抗匹配时使用的图像，其被电阻线的横线分成上下两个半区，上半部分叫电感区，那里所有点的虚部值都为正；下半部分叫电容区，那里所有点的虚部值都为负。在本发明实施例中，所述史密斯圆通过ADS软件构建的仿真数据得到，示例性的，请参照图4，图4是本发明实施例提供的通过史密斯圆获取S参数的示意图，此时，Doherty架构中主功放的和辅助功放之间的公分比n取值为1.5，所述第一端口阻抗的阻抗值为50欧姆，所述仿真功放电路的工作频段为3.4GHz至3.6GHz，根据所述史密斯圆，所述第一端口阻抗的所述输出最佳阻抗值为(7.235+j*4.974)Ω。The Smith circle is an image used for impedance matching between high-frequency circuits. It is divided into two upper and lower halves by the horizontal line of the resistance line. The upper half is called the inductance area, where the imaginary values of all points are positive; the lower half is called the capacitance area, where the imaginary values of all points are negative. In an embodiment of the present invention, the Smith circle is obtained by simulation data constructed by ADS software. For example, please refer to Figure 4, which is a schematic diagram of obtaining S parameters through the Smith circle provided by an embodiment of the present invention. At this time, the centimeter ratio n between the main power amplifier and the auxiliary power amplifier in the Doherty architecture is 1.5, the impedance value of the first port impedance is 50 ohms, and the operating frequency band of the simulated power amplifier circuit is 3.4GHz to 3.6GHz. According to the Smith circle, the output optimal impedance value of the first port impedance is (7.235+j*4.974)Ω.
S104、将所述补偿线的电长度设为可调节状态。S104, setting the electrical length of the compensation line to an adjustable state.
更进一步地，所述电长度的初始长度为0mm。Furthermore, the initial length of the electrical length is 0 mm.
S105、通过旋转所述史密斯圆的中心频点，使所述中心频点对应的所述第一端口阻抗的阻抗值变为与所述输出最佳阻抗值相同。 S105 , rotating the center frequency point of the Smith circle so that the impedance value of the first port impedance corresponding to the center frequency point becomes the same as the output optimal impedance value.
此步骤的目的在于，构建一种使主功放的功放管在回退状态时其输出端阻抗与负载阻抗匹配的电路负载状态。The purpose of this step is to construct a circuit load state in which the output impedance of the power amplifier tube of the main power amplifier matches the load impedance when the power amplifier tube is in the fallback state.
S106、确定所述中心频点的阻抗值为所述输出最佳阻抗值时的所述电长度的数值大小，将其作为最终电长度值并输出。S106, determining that the impedance value of the center frequency point is the numerical value of the electrical length when the optimal impedance value is output, and outputting it as the final electrical length value.
示例性的，请参照图5，图5是本发明实施例通过史密斯圆获取最终电长度值的示意图，经过步骤S105对所述中心频点进行调节后，可以得到模拟电路具有补偿线时的各项参数，调节中心频点的位置，进而调整补偿线的长度，阻抗不断变换，当补偿线的长度L＝3.1mm时，即m1点，此时的对应的阻抗(7.211+j*0.467)Ω与获取的所述输出最佳阻抗值(7.235+j*4.974)Ω最接近，因此在图4的数值下，可以得到所述最终电长度值为3.1mm。For example, please refer to Figure 5, which is a schematic diagram of obtaining the final electrical length value through the Smith circle in an embodiment of the present invention. After adjusting the center frequency point in step S105, the various parameters of the analog circuit with a compensation line can be obtained, and the position of the center frequency point is adjusted, and then the length of the compensation line is adjusted, and the impedance is continuously changed. When the length of the compensation line L = 3.1mm, that is, point m1, the corresponding impedance at this time (7.211+j*0.467)Ω is closest to the obtained output optimal impedance value (7.235+j*4.974)Ω. Therefore, under the numerical value of Figure 4, the final electrical length value can be obtained as 3.1mm.
本发明所达到的有益效果，由于根据Doherty架构功放的工作原理来分析主功放的工作状态以及负载阻抗的变化过程，依据实际工作信号的回退需要，基于ADS搭建辅助功放回退时的工作环境，并进一步采用史密斯圆进行图解求得补偿线的电长度，从而避免了复杂的计算过程，提高了功率放大器设计工作的效率。The beneficial effects achieved by the present invention are as follows: the working state of the main power amplifier and the change process of the load impedance are analyzed according to the working principle of the Doherty architecture power amplifier, the working environment of the auxiliary power amplifier during back-off is established based on ADS according to the back-off requirements of the actual working signal, and the electrical length of the compensation line is further obtained by graphically using the Smith circle, thereby avoiding complex calculation processes and improving the efficiency of the power amplifier design work.
本发明实施例还提供一种Doherty中辅助功放补偿线电长度的系统，请参照图6，图6是本发明实施例提供的确定Doherty架构中主功放补偿线电长度的系统的结构示意图，所述确定Doherty架构中主功放补偿线电长度的系统200包括：The embodiment of the present invention further provides a system for compensating the electrical length of an auxiliary power amplifier in a Doherty architecture. Please refer to FIG6 , which is a structural diagram of a system for determining the electrical length of a main power amplifier compensation line in a Doherty architecture provided by an embodiment of the present invention. The system 200 for determining the electrical length of a main power amplifier compensation line in a Doherty architecture includes:
阻抗数据获取模块201，用于获取主功放的输出最佳阻抗值，所述主功放具有第一端口阻抗和第二端口阻抗；An impedance data acquisition module 201 is used to acquire an optimal output impedance value of a main power amplifier, wherein the main power amplifier has a first port impedance and a second port impedance;
仿真模块202，用于在仿真环境中搭建连接顺序依次为第一端口阻抗、输出匹配电路、补偿线、第二端口阻抗的仿真功放电路；A simulation module 202 is used to build a simulation power amplifier circuit in a simulation environment, the connection sequence of which is a first port impedance, an output matching circuit, a compensation line, and a second port impedance;
史密斯圆获取模块203，用于获取所述仿真功放电路的史密斯圆，并根据所述史密斯圆获取所述第一端口阻抗的S参数；A Smith circle acquisition module 203 is used to acquire the Smith circle of the simulated power amplifier circuit, and acquire the S parameter of the first port impedance according to the Smith circle;
线长度初始模块204，用于将所述补偿线的电长度设为可调节状态； A line length initialization module 204, used to set the electrical length of the compensation line to an adjustable state;
阻抗调节模块205，用于通过旋转所述史密斯圆的中心频点，使所述中心频点对应的所述第一端口阻抗的阻抗值变为与所述输出最佳阻抗值相同；The impedance adjustment module 205 is used to rotate the center frequency of the Smith circle so that the impedance value of the first port impedance corresponding to the center frequency becomes the same as the output optimal impedance value;
电长度输出模块206，用于确定所述中心频点的阻抗值为所述输出最佳阻抗值时的所述电长度的数值大小，将其作为最终电长度值并输出。The electrical length output module 206 is used to determine the value of the electrical length when the impedance value of the center frequency point is the output optimal impedance value, and output it as the final electrical length value.
所述确定Doherty架构中主功放补偿线电长度的系统200能够实现如上述实施例中的确定Doherty架构中主功放补偿线电长度的方法中的步骤，且能实现同样的技术效果，参上述实施例中的描述，此处不再赘述。The system 200 for determining the electrical length of the main power amplifier compensation line in the Doherty architecture can implement the steps in the method for determining the electrical length of the main power amplifier compensation line in the Doherty architecture in the above embodiment, and can achieve the same technical effect. Please refer to the description in the above embodiment and will not be repeated here.
本发明实施例还提供一种计算机设备，请参照图7，图7是本发明实施例提供的计算机设备的结构示意图，所述计算机设备300包括：存储器302、处理器301及存储在所述存储器302上并可在所述处理器301上运行的计算机程序。An embodiment of the present invention further provides a computer device. Please refer to Figure 7, which is a structural diagram of the computer device provided by an embodiment of the present invention. The computer device 300 includes: a memory 302, a processor 301, and a computer program stored in the memory 302 and executable on the processor 301.
所述处理器301调用所述存储器302存储的计算机程序，执行本发明实施例提供的确定Doherty架构中主功放补偿线电长度的方法中的步骤，请结合图2，具体包括：The processor 301 calls the computer program stored in the memory 302 to execute the steps of the method for determining the electrical length of the main power amplifier compensation line in the Doherty architecture provided in the embodiment of the present invention, referring to FIG. 2 , specifically including:
S101、获取主功放的输出最佳阻抗值，所述主功放具有第一端口阻抗和第二端口阻抗。S101 . Obtain an optimal output impedance value of a main power amplifier, where the main power amplifier has a first port impedance and a second port impedance.
更进一步地，所述第一端口阻抗为主功放的输出阻抗，所述第二端口阻抗为负载阻抗。Furthermore, the first port impedance is the output impedance of the main power amplifier, and the second port impedance is the load impedance.
S102、在仿真环境中搭建连接顺序依次为第一端口阻抗、输出匹配电路、补偿线、第二端口阻抗的仿真功放电路。S102, building a simulation power amplifier circuit in a simulation environment, the connection sequence of which is first port impedance, output matching circuit, compensation line, and second port impedance.
更进一步地，所述仿真环境基于ADS。Furthermore, the simulation environment is based on ADS.
S103、获取所述仿真功放电路的史密斯圆，并根据所述史密斯圆获取所述第一端口阻抗的S参数。S103: Obtain a Smith circle of the simulated power amplifier circuit, and obtain an S parameter of the first port impedance according to the Smith circle.
S104、将所述补偿线的电长度设为可调节状态。S104, setting the electrical length of the compensation line to an adjustable state.
更进一步地，所述电长度的初始长度为0mm。Furthermore, the initial length of the electrical length is 0 mm.
S105、通过旋转所述史密斯圆的中心频点，使所述中心频点对应的所述第 一端口阻抗的阻抗值变为与所述输出最佳阻抗值相同。S105, by rotating the center frequency point of the Smith circle, so that the center frequency point corresponds to the first The impedance value of the one-port impedance becomes the same as the output optimum impedance value.
S106、确定所述中心频点的阻抗值为所述输出最佳阻抗值时的所述电长度的数值大小，将其作为最终电长度值并输出。S106: Determine that the impedance value of the center frequency point is the numerical value of the electrical length when the optimal impedance value is output, and output it as the final electrical length value.
本发明实施例提供的计算机设备300能够实现如上述实施例中的确定Doherty架构中主功放补偿线电长度的方法中的步骤，且能实现同样的技术效果，参上述实施例中的描述，此处不再赘述。The computer device 300 provided in the embodiment of the present invention can implement the steps in the method for determining the electrical length of the main power amplifier compensation line in the Doherty architecture in the above embodiment, and can achieve the same technical effect. Please refer to the description in the above embodiment and will not be repeated here.
本发明实施例还提供一种计算机可读存储介质，所述计算机可读存储介质上存储有计算机程序，该计算机程序被处理器执行时实现本发明实施例提供的确定Doherty架构中主功放补偿线电长度的方法中的各个过程及步骤，且能实现相同的技术效果，为避免重复，这里不再赘述。An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the various processes and steps in the method for determining the electrical length of the main power amplifier compensation line in the Doherty architecture provided in the embodiment of the present invention are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，是可以通过计算机程序来指令相关的硬件来完成，所述的程序可存储于一计算机可读取存储介质中，该程序在执行时，可包括如上述各方法的实施例的流程。其中，所述的存储介质可为磁碟、光盘、只读存储记忆体(Read-Only Memory，ROM)或随机存取存储器(Random Access Memory，简称RAM)等。Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing related hardware through a computer program, and the program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above-mentioned methods. The storage medium can be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM).
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包 括若干指令用以使得一台终端(可以是手机，计算机，服务器，空调器，或者网络设备等)执行本发明各个实施例所述的方法。Through the above description of the implementation methods, those skilled in the art can clearly understand that the above embodiment methods can be implemented by means of software plus a necessary general hardware platform, or by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM/RAM, disk, CD), including The method includes several instructions for enabling a terminal (which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in the various embodiments of the present invention.
上面结合附图对本发明的实施例进行了描述，所揭露的仅为本发明较佳实施例而已，但是本发明并不局限于上述的具体实施方式，上述的具体实施方式仅仅是示意性的，而不是限制性的，本领域的普通技术人员在本发明的启示下，在不脱离本发明宗旨和权利要求所保护的范围情况下，还可做出很多形式用等同变化，均属于本发明的保护之内。 The embodiments of the present invention are described above in conjunction with the accompanying drawings. What is disclosed is only the preferred embodiment of the present invention. However, the present invention is not limited to the above-mentioned specific implementation manner. The above-mentioned specific implementation manner is only illustrative rather than restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms and equivalent changes without departing from the scope of protection of the purpose of the present invention and the claims, all of which are within the protection of the present invention.

Claims (7)

  1. 一种确定Doherty架构主功放补偿线电长度的方法，其特征在于，所述方法包括以下步骤：A method for determining the electrical length of a Doherty architecture main power amplifier compensation line, characterized in that the method comprises the following steps:
    获取主功放的输出最佳阻抗值，所述主功放具有第一端口阻抗和第二端口阻抗；Obtaining an optimal output impedance value of a main power amplifier, wherein the main power amplifier has a first port impedance and a second port impedance;
    在仿真环境中搭建连接顺序依次为第一端口阻抗、输出匹配电路、补偿线、第二端口阻抗的仿真功放电路；In a simulation environment, a simulation power amplifier circuit is constructed, the connection sequence of which is first port impedance, output matching circuit, compensation line, and second port impedance;
    获取所述仿真功放电路的史密斯圆，并根据所述史密斯圆获取所述第一端口阻抗的S参数；Obtaining a Smith circle of the simulated power amplifier circuit, and obtaining an S parameter of the first port impedance according to the Smith circle;
    将所述补偿线的电长度设为可调节状态；Setting the electrical length of the compensation line to an adjustable state;
    通过旋转所述史密斯圆的中心频点，使所述中心频点对应的所述第一端口阻抗的阻抗值变为与所述输出最佳阻抗值相同；By rotating the center frequency point of the Smith circle, the impedance value of the first port impedance corresponding to the center frequency point becomes the same as the output optimal impedance value;
    确定所述中心频点的阻抗值为所述输出最佳阻抗值时的所述电长度的数值大小，将其作为最终电长度值并输出。The impedance value of the center frequency point is determined to be the numerical value of the electrical length when the optimal impedance value is output, and the value is used as the final electrical length value and outputted.
  2. 如权利要求1所述的确定Doherty架构主功放补偿线电长度的方法，其特征在于，所述第一端口阻抗为主功放的输出阻抗，所述第二端口阻抗为负载阻抗。The method for determining the electrical length of the Doherty architecture main power amplifier compensation line according to claim 1, characterized in that the first port impedance is the output impedance of the main power amplifier, and the second port impedance is the load impedance.
  3. 如权利要求1所述的确定Doherty架构主功放补偿线电长度的方法，其特征在于，所述电长度的初始长度为0mm。The method for determining the electrical length of the Doherty architecture main power amplifier compensation line according to claim 1, characterized in that the initial length of the electrical length is 0 mm.
  4. 如权利要求1所述的确定Doherty架构主功放补偿线电长度的方法，其特征在于，所述仿真环境基于ADS。The method for determining the electrical length of the Doherty architecture main power amplifier compensation line according to claim 1, wherein the simulation environment is based on ADS.
  5. 一种确定Doherty架构中主功放补偿线电长度的系统，其特征在于，包括：A system for determining the electrical length of a main power amplifier compensation line in a Doherty architecture, characterized by comprising:
    阻抗数据获取模块，用于获取主功放的输出最佳阻抗值，所述主功放具有第一端口阻抗和第二端口阻抗；An impedance data acquisition module, used to acquire an optimal output impedance value of a main power amplifier, wherein the main power amplifier has a first port impedance and a second port impedance;
    仿真模块，用于在仿真环境中搭建连接顺序依次为第一端口阻抗、输出匹 配电路、补偿线、第二端口阻抗的仿真功放电路；Simulation module, used to build the connection sequence in the simulation environment: first port impedance, output matching A simulation power amplifier circuit for the distribution circuit, the compensation line, and the second port impedance;
    史密斯圆获取模块，用于获取所述仿真功放电路的史密斯圆，并根据所述史密斯圆获取所述第一端口阻抗的S参数；A Smith circle acquisition module, used to acquire the Smith circle of the simulated power amplifier circuit, and acquire the S parameter of the first port impedance according to the Smith circle;
    线长度初始模块，用于将所述补偿线的电长度设为可调节状态；A line length initialization module, used to set the electrical length of the compensation line to an adjustable state;
    阻抗调节模块，用于通过旋转所述史密斯圆的中心频点，使所述中心频点对应的所述第一端口阻抗的阻抗值变为与所述输出最佳阻抗值相同；An impedance adjustment module, used for rotating the center frequency point of the Smith circle so that the impedance value of the first port impedance corresponding to the center frequency point becomes the same as the output optimal impedance value;
    电长度输出模块，用于确定所述中心频点的阻抗值为所述输出最佳阻抗值时的所述电长度的数值大小，将其作为最终电长度值并输出。The electrical length output module is used to determine the numerical value of the electrical length when the impedance value of the center frequency point is the output optimal impedance value, and output it as the final electrical length value.
  6. 一种计算机设备，其特征在于，包括：存储器、处理器及存储在所述存储器上并可在所述处理器上运行的计算机程序，所述处理器执行所述计算机程序时实现如权利要求1至4中任意一项所述的确定Doherty架构主功放补偿线电长度的方法中的步骤。A computer device, characterized in that it comprises: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the steps in the method for determining the electrical length of a Doherty architecture main power amplifier compensation line as described in any one of claims 1 to 4 are implemented.
  7. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质上存储有计算机程序，所述计算机程序被处理器执行时实现如权利要求1至4中任意一项所述的确定Doherty架构主功放补偿线电长度的方法中的步骤。 A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps in the method for determining the compensation line electrical length of a Doherty architecture main power amplifier as described in any one of claims 1 to 4 are implemented.
PCT/CN2023/115059 2022-10-21 2023-08-25 Method for determining electrical length of compensation line for main power amplifier in doherty architecture WO2024082823A1 (en)

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