WO2024082801A1 - 复位方法和电子设备 - Google Patents

复位方法和电子设备 Download PDF

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Publication number
WO2024082801A1
WO2024082801A1 PCT/CN2023/113744 CN2023113744W WO2024082801A1 WO 2024082801 A1 WO2024082801 A1 WO 2024082801A1 CN 2023113744 W CN2023113744 W CN 2023113744W WO 2024082801 A1 WO2024082801 A1 WO 2024082801A1
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WIPO (PCT)
Prior art keywords
master device
slave
master
reset
slave device
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PCT/CN2023/113744
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English (en)
French (fr)
Inventor
张桐恺
张旭东
雷奋星
Original Assignee
荣耀终端有限公司
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Publication of WO2024082801A1 publication Critical patent/WO2024082801A1/zh

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12Synchronisation of different clock signals provided by a plurality of clock generators
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24Resetting means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

Definitions

  • the present application relates to the technical field of terminal equipment, and more specifically, to a resetting method and an electronic device.
  • Electronic devices usually include multiple electronic devices, which transmit data through a serial peripheral interface (SPI) to achieve different functions.
  • SPI serial peripheral interface
  • the above-mentioned electronic devices usually include a master device and multiple slave devices.
  • the master device sends a clock signal to each slave device so that each electronic device maintains signal synchronization and realizes data interaction between each electronic device.
  • the electromagnetic interference signal in the electronic device will cause the slave device to be unable to receive the clock signal sent by the master device, which in turn causes the slave device to be unable to maintain signal synchronization with the master device, resulting in the inability to exchange data between electronic devices.
  • This phenomenon is called device deadlock.
  • the slave device is usually reset to restore signal synchronization between the master and slave devices.
  • the number of electronic devices in electronic devices has increased, or the size of electronic devices has decreased, and traditional methods cannot restore data interaction between electronic devices.
  • the present application provides a reset method that can effectively restore data interaction between various electronic devices.
  • a reset method is provided.
  • the method is applied to a master device in an electronic device, the master device is used to send a clock signal to a slave device, and the master device and the slave device exchange data based on the clock signal.
  • the electronic device includes the master device and the slave device.
  • the method includes:
  • Warning information sent by the slave device the warning information is used to indicate that the master device is in an abnormal state
  • the reset method provided in the embodiment of the present application is applied to a master device in an electronic device, the master device is used to send a clock signal to a slave device, the master device and the slave device exchange data based on the clock signal, the slave device sends an early warning message to the master device, and when the master device receives the early warning message, the master device is reset, wherein the early warning message is used to indicate that the master device is in an abnormal state.
  • the master device is used to send a clock signal to a slave device
  • the master device and the slave device exchange data based on the clock signal
  • the slave device sends an early warning message to the master device
  • the master device receives the early warning message
  • the master device is reset, wherein the early warning message is used to indicate that the master device is in an abnormal state.
  • the reset method provided in the embodiment of the present application can solve the hanging problem of the master device when the number of electronic devices in the electronic device increases or the size of the electronic device decreases, and can effectively restore the data interaction between the electronic devices.
  • the master device is in an abnormal state including: when the chip select CS signal is at the first level and does not The state of the slave's transmitted clock signal.
  • the first level can be a high level or a low level, and the embodiment of the present application does not limit this.
  • the master device being in an abnormal state includes: when the chip selection CS signal is at a first level, no data exchange is performed between the master device and the slave device.
  • the master device being in an abnormal state includes: a time length used by the chip select CS signal to convert to the first level is less than a preset time length threshold.
  • the method further includes: sending a reset instruction to the slave device, where the reset instruction is used to instruct the slave device to perform a reset operation.
  • the master device when the master device receives the warning information sent by the slave device, the master device is reset, and then the master device sends a reset instruction to the slave device, instructing the slave device to perform the reset operation. That is to say, in the embodiment of the present application, when the master device receives the warning information sent by the slave device, after resetting the master device itself, the master device also sends a reset instruction to the slave device, so that the slave device performs a reset operation based on the reset instruction, thereby avoiding the situation where the master device and the slave device are abnormal at the same time, and only resetting the master device cannot solve the problem of device deadlock in the electronic device, thereby further improving the reliability of solving the problem of device deadlock in the electronic device.
  • the reset instruction includes a first reset instruction or a second reset instruction
  • the first reset instruction is used to instruct the device to be reset by triggering the reset key of the slave device
  • the second reset instruction is used to instruct the device to be reset through the serial peripheral interface SPI interface.
  • a reset method is provided, which is applied to a slave device in an electronic device, wherein the master device is used to send a clock signal to the slave device, and the master device and the slave device perform data exchange based on the clock signal.
  • the electronic device includes the master device and the slave device, and the method includes:
  • the early warning message is used to indicate that the master device is in an abnormal state.
  • the slave device sends a first signal to the master device, wherein the first signal is used to request data interaction with the master device, and then the slave device detects whether the clock signal sent by the master device is received; if the clock signal sent by the master device is not detected, an early warning message is sent to the master device.
  • This is equivalent to the early warning message being sent when the clock signal is not detected on the basis that the slave device has requested data interaction with the master device, so that the early warning message indicates that the master device is in an abnormal state with higher accuracy, thereby improving the accuracy of the master device performing a reset operation based on the early warning message, and more effectively solving the problem of device hang in electronic equipment.
  • the above-mentioned detection that the main device is in an abnormal state includes: sending a first signal to the main device, the first signal is used to request data interaction with the main device; detecting whether a clock signal sent by the main device is received; if the clock signal sent by the main device is not detected, determining that the main device is in an abnormal state.
  • the first signal may indicate an interrupt (INT) signal.
  • the above-mentioned detection that the master device is in an abnormal state includes: when it is detected that the chip select CS signal is at a first level, data transmission on the master transmit and slave receive signal line MOSI and the master receive and slave transmit signal line MISO between the master device and the slave device is not detected.
  • the above-mentioned detection that the master device is in an abnormal state includes: detecting that the time length used for the chip select CS signal to be converted to the first level is less than a preset time length threshold.
  • the master device is in an abnormal state including: when the chip select CS signal is at the first level and does not The state of the slave's transmitted clock signal.
  • the first level can be a high level or a low level, and the embodiment of the present application does not limit this.
  • an electronic device comprising a unit for executing any one of the methods in the first aspect.
  • the device may be a chip in a terminal device.
  • the device may include an acquisition unit and a processing unit.
  • the processing unit may be a processing unit inside the chip, and the acquisition unit may be an output interface, a pin or a circuit, etc.; the chip may also include a memory, which may be a memory inside the chip (for example, a register, a cache, etc.) or a memory located outside the chip (for example, a read-only memory, a random access memory, etc.); the memory is used to store computer program code, and when the processor executes the computer program code stored in the memory, the chip executes any one of the methods in the first aspect.
  • a memory is used to store computer program code; a processor executes the computer program code stored in the memory, and when the computer program code stored in the memory is executed, the processor is used to perform: receiving early warning information sent by the slave device, the early warning information is used to indicate that the master device is in an abnormal state; and performing a reset operation according to the early warning information.
  • an electronic device comprising a unit for executing any one of the methods in the second aspect.
  • the device may be a chip in a terminal device.
  • the device may include an acquisition unit and a processing unit.
  • the processing unit may be a processing unit inside the chip, and the acquisition unit may be an output interface, a pin or a circuit, etc.; the chip may also include a memory, which may be a memory inside the chip (for example, a register, a cache, etc.) or a memory located outside the chip (for example, a read-only memory, a random access memory, etc.); the memory is used to store computer program code, and when the processor executes the computer program code stored in the memory, the chip executes any one of the methods in the second aspect.
  • a memory is used to store computer program code; a processor executes the computer program code stored in the memory, and when the computer program code stored in the memory is executed, the processor is used to perform: detecting that the main device is in an abnormal state; and sending early warning information to the main device, the early warning information is used to indicate that the main device is in an abnormal state.
  • an electronic device comprising a master device and a slave device, the master device is used to execute any method as described in the first aspect, and the slave device is used to execute any method as described in the second aspect.
  • the electronic device includes a mobile phone or a tablet computer
  • the master device includes a system-on-chip (SOC)
  • the slave device includes a fingerprint sensor
  • the electronic device includes a smart wearable device
  • the master device includes a microcontroller unit (MCU)
  • the slave device includes a heart rate sensor
  • a computer-readable storage medium stores a computer program code.
  • the reset device executes any one of the reset methods in the first aspect, or the reset device executes any one of the reset methods in the second aspect.
  • a computer program product comprising: a computer program code, when the computer program code is executed by a reset device, the reset device executes any one of the methods in the first aspect, or the reset device executes any one of the methods in the second aspect.
  • the reset method and electronic device provided by the embodiment of the present application, wherein the electronic device includes a master device and a slave device,
  • the master device is used to send a clock signal to the slave device, and the master device and the slave device exchange data based on the clock signal.
  • the slave device sends an early warning message to the master device.
  • the master device receives the early warning message, it resets the master device, wherein the early warning message is used to indicate that the master device is in an abnormal state.
  • the hanging problem of the master device can be solved by resetting the master device.
  • the reset method provided in the embodiment of the present application can solve the hanging problem of the master device when the number of electronic devices in the electronic device increases or the size of the electronic device decreases, thereby effectively restoring the data interaction between the electronic devices.
  • FIG1 is a schematic diagram of a connection relationship between a master device and a slave device
  • FIG2 is a schematic diagram of a signal between a master device and a slave device
  • FIG3 is a schematic diagram of a hardware system of an electronic device applicable to the present application.
  • FIG4 is a schematic diagram of a software system of an electronic device applicable to the present application.
  • FIG5 is a schematic diagram of an application scenario of a reset method in an embodiment of the present application.
  • FIG6 is a schematic diagram of an application scenario of another reset method in an embodiment of the present application.
  • FIG7 is a schematic diagram of an application scenario of another reset method in an embodiment of the present application.
  • FIG8 is a schematic flow chart of a reset method provided in an embodiment of the present application.
  • FIG. 9 is a schematic diagram of signals between a master device and a slave device when the master device is in an abnormal state according to an embodiment of the present application.
  • FIG10 is a schematic flow chart of another reset method provided in an embodiment of the present application.
  • FIG11 is a flow chart of another reset method provided in an embodiment of the present application.
  • FIG12 is a flow chart of another reset method provided in an embodiment of the present application.
  • FIG13 is a schematic diagram of the structure of a master device and a slave device provided in an embodiment of the present application.
  • FIG14 is a flow chart of another reset method provided in an embodiment of the present application.
  • FIG15 is a schematic structural diagram of a main device provided by the present application.
  • FIG16 is a schematic diagram of the structure of a slave device provided by the present application.
  • FIG. 17 is a schematic diagram of a reset electronic device provided by the present application.
  • first”, “second”, and “third” are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features.
  • a feature defined as “first”, “second”, and “third” may explicitly or implicitly include one or more of the features.
  • SPI Serial Peripheral Interface
  • SPI refers to a synchronous serial interface technology, which is a high-speed, full-duplex synchronous communication bus. SPI is usually It works in a master-slave mode and is used in a system consisting of a master device and one or more slave devices. Generally, SPI requires 4 wires for data transmission, which include:
  • Chip select signal line (Slave Select/Chip Select, SS/CS), used to select the slave device that needs to communicate.
  • the IIC master device selects the slave device that needs to communicate by sending the slave device address, while the SPI master device does not need to send the slave device address, and can directly pull the corresponding slave device chip select signal low.
  • Serial Clock like SCL of IIC, provides clock for SPI communication.
  • SCK can also be referred to as Clock (CLK).
  • This data line can only be used for the master device to send data to the slave device, that is, the master device output and the slave device input.
  • MISO/SDI Master In Slave Out/Serial Data Input
  • the master device and the slave device are connected via four data lines, namely CS, CLK, MOSI, and MISO, and there is also an interrupt signal (intterupt, INT) between the master device and the slave device.
  • INT interrupt signal
  • the master device pulls SS low it sends a clock signal to the slave device.
  • the clock signal sent by the master device to the slave device is the CLK signal shown in (b) of FIG1 , including two time slots.
  • the master device transmits data to the slave device via MOSI in the first time slot, and receives data sent by the slave device via MISO in the second time slot.
  • the SS signal is at a low level.
  • SPI is usually used in electronic devices to realize data interaction between master devices and slave devices.
  • the slave device needs to interact with the master device, it sends an interrupt (INT) signal (equivalent to the first signal) to the master device.
  • the master device responds to the INT signal, pulls down the CS signal corresponding to the slave device, and sends the SCK signal (clock signal) to the slave device.
  • the slave device synchronizes the signal with the master device based on the received clock signal, and interacts with the master device through MISO or MOSI.
  • the size of the slave device is small and is greatly affected by the electromagnetic interference signal in the electronic device.
  • the master device in the case of abnormal data interaction between the master device and the slave device, the master device usually sends a reset instruction to the slave device to reset the slave device and restore the data interaction between the master device and the slave device. Then with the advancement of chip technology, the size of the master device is getting smaller and smaller. At the same time, there are more and more electronic devices set in electronic devices, and the electromagnetic interference in electronic devices is getting more and more serious. The master device is also interfered by the electromagnetic interference signal, which causes the master device to hang, and then causes abnormal data interaction between the master device and the slave device. Generally, the traditional method of resetting the slave device cannot completely solve the problem of abnormal data interaction between the master device and the slave device in the current electronic equipment.
  • the master device when the INT signal of the slave device is at a low level, the state of the slave device is an idle state, and the master device can exchange data with the slave device.
  • the master device sends a pulse signal on CS at every preset time interval, and at the same time, sends a clock signal along with the pulse on CS.
  • the master device When the master device is interfered by the electromagnetic interference signal and hangs, as shown in (b) in Figure 2, when the INT signal of the slave device is low, the slave device is in an idle state, and the master device can exchange data with the slave device.
  • the master device sends a pulse signal on CS at every preset time interval.
  • the slave device can only receive the pulse signal on CS and cannot receive the clock signal sent by the master device. Since the slave device cannot receive the clock signal sent by the master device, the master device and the slave device cannot restore communication synchronization based on the clock signal. Therefore, the master device and the slave device cannot restore data interaction.
  • the CS signal, CLK signal, and MOSI signal may also be abnormal, and the embodiments of the present application do not limit this.
  • an embodiment of the present application provides a reset method, which is applied to a master device in an electronic device, the master device is used to send a clock signal to a slave device, the master device and the slave device exchange data based on the clock signal, the slave device sends an early warning message to the master device, and when the master device receives the early warning message, the master device is reset, wherein the early warning message is used to indicate that the master device is in an abnormal state.
  • the master device is affected by electromagnetic interference signals in electronic devices and is in an abnormal state, the hanging problem of the master device can be solved by resetting the master device.
  • the reset method provided by the embodiment of the present application can solve the hanging problem of the master device when the number of electronic devices in the electronic device increases or the size of the electronic device decreases, and can effectively restore data interaction between the electronic devices.
  • the electronic device includes a terminal device, which can also be called a terminal, a user equipment (UE), a mobile station (MS), a mobile terminal (MT), etc.
  • the terminal device can be a mobile phone, a smart TV, a wearable device, a tablet computer (Pad), a computer with wireless transceiver function, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in smart grid, a wireless terminal in transportation safety, a wireless terminal in smart city, a wireless terminal in smart home, etc.
  • the embodiment of the present application does not limit the specific technology and specific device form adopted by the terminal device.
  • FIG3 shows a schematic diagram of the structure of the electronic device 100.
  • the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc.
  • SIM subscriber identification module
  • the sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.
  • the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the electronic device 100.
  • the electronic device 100 may include more or fewer components than shown in the figure, or combine certain components, or split certain components, or arrange the components differently.
  • the illustrated components may be implemented in hardware, software, or a combination of software and hardware. It is understood that the structure illustrated in the embodiment of the present application does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine certain components, or split certain components, or arrange the components differently.
  • the illustrated components may be implemented in hardware, software, or a combination of software and hardware.
  • the processor 110 may include one or more processing units.
  • the processor 110 may include an application processing unit.
  • Application processor (AP) Application processor
  • modem processor graphics processor
  • GPU graphics processor
  • ISP image signal processor
  • controller memory
  • video codec digital signal processor
  • DSP digital signal processor
  • NPU neural-network processing unit
  • different processing units can be independent devices or integrated in one or more processors.
  • the controller may be the nerve center and command center of the electronic device 100.
  • the controller may generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching and executing instructions.
  • the processor 110 may also be provided with a memory for storing instructions and data.
  • the memory in the processor 110 is a cache memory.
  • the memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.
  • the processor 110 may include one or more interfaces.
  • the interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver/transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input/output (GPIO) interface, a subscriber identity module (SIM) interface, and/or a universal serial bus (USB) interface, etc.
  • I2C inter-integrated circuit
  • I2S inter-integrated circuit sound
  • PCM pulse code modulation
  • UART universal asynchronous receiver/transmitter
  • MIPI mobile industry processor interface
  • GPIO general-purpose input/output
  • SIM subscriber identity module
  • USB universal serial bus
  • the interface connection relationship between the modules illustrated in the embodiment of the present application is only a schematic illustration and does not constitute a structural limitation on the electronic device 100.
  • the electronic device 100 may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.
  • the fingerprint sensor 180H is used to collect fingerprints.
  • the electronic device 100 can use the collected fingerprint characteristics to achieve fingerprint unlocking, access application locks, fingerprint photography, fingerprint call answering, etc.
  • any electronic device mentioned in the embodiments of the present application may include more or fewer modules in the electronic device 100.
  • the software system of the electronic device 100 may adopt a layered architecture, an event-driven architecture, a micro-core architecture, a micro-service architecture, or a cloud architecture.
  • the embodiment of the present application takes the Android system of the layered architecture as an example to exemplify the software structure of the electronic device 100.
  • FIG. 4 is a software structure block diagram of the electronic device 100 according to an embodiment of the present application.
  • the layered architecture of the electronic device 100 divides the software into several layers, each with a clear role and division of labor.
  • the layers communicate with each other through software interfaces.
  • the Android system is divided into four layers, from top to bottom, namely, the application layer, the application framework layer, the Android runtime (Android runtime) and the system library, and the kernel layer.
  • the application layer can include a series of application packages.
  • the application package may include applications such as camera, gallery, calendar, call, map, navigation, WLAN, Bluetooth, music, video, short message, etc.
  • the application framework layer provides application programming interface (API) and programming framework for the applications in the application layer.
  • API application programming interface
  • the application framework layer includes some predefined functions.
  • the application framework layer may include a window manager, a content provider, a view system, a Call manager, resource manager, notification manager, etc.
  • the window manager is used to manage window programs.
  • the window manager can obtain the display screen size, determine whether there is a status bar, lock the screen, capture the screen, etc.
  • Content providers are used to store and retrieve data and make it accessible to applications.
  • the data can include videos, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.
  • the view system includes visual controls, such as controls for displaying text, controls for displaying images, etc.
  • the view system can be used to build applications.
  • a display interface can be composed of one or more views.
  • a display interface including a text notification icon can include a view for displaying text and a view for displaying images.
  • the phone manager is used to provide communication functions of the electronic device 100, such as management of call status (including connecting, hanging up, etc.).
  • the resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.
  • the notification manager enables applications to display notification information in the status bar. It can be used to convey notification-type messages and can disappear automatically after a short stay without user interaction. For example, the notification manager is used to notify download completion, message reminders, etc.
  • the notification manager can also be a notification that appears in the system top status bar in the form of a chart or scroll bar text, such as notifications of applications running in the background, or a notification that appears on the screen in the form of a dialog window. For example, a text message is displayed in the status bar, a prompt sound is emitted, an electronic device vibrates, an indicator light flashes, etc.
  • Android Runtime includes core libraries and virtual machines. Android Runtime is responsible for the scheduling and management of the Android system.
  • the core library consists of two parts: one part is the function that needs to be called by the Java language, and the other part is the Android core library.
  • the application layer and the application framework layer run in a virtual machine.
  • the virtual machine executes the Java files of the application layer and the application framework layer as binary files.
  • the virtual machine is used to perform functions such as object life cycle management, stack management, thread management, security and exception management, and garbage collection.
  • the system library can include multiple functional modules, such as surface manager, media library, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.
  • functional modules such as surface manager, media library, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.
  • the surface manager is used to manage the display subsystem and provide the fusion of 2D and 3D layers for multiple applications.
  • the media library supports playback and recording of a variety of commonly used audio and video formats, as well as static image files, etc.
  • the media library can support a variety of audio and video encoding formats, such as: MPEG4, H.264, MP3, AAC, AMR, JPG, PNG, etc.
  • the 3D graphics processing library is used to implement 3D graphics drawing, image rendering, compositing, and layer processing.
  • a 2D graphics engine is a drawing engine for 2D drawings.
  • the kernel layer is the layer between hardware and software.
  • the kernel layer includes at least display driver, camera driver, audio driver, sensor driver, Wi-Fi driver, etc.
  • the electronic device mentioned in the embodiments of the present application may include more or fewer modules in the above electronic device.
  • the electronic device may also include a memory, a timer, etc.
  • FIG5 is a schematic diagram of an application scenario in which a reset method is provided in an embodiment of the present application.
  • the mobile phone includes a system on chip (SoC) and a fingerprint sensor, wherein the SoC is equivalent to a master device and the fingerprint sensor is equivalent to a slave device. Data is exchanged between the SoC and the fingerprint sensor via SPI.
  • SoC system on chip
  • FIG6 is a schematic diagram of an application scenario of the reset method provided in an embodiment of the present application, and the reset method is applied in a smart wearable device.
  • the smart wearable device is a smart bracelet.
  • the smart bracelet can be as shown in (a) of FIG6 or as shown in (b) of FIG6 , and the embodiment of the present application does not limit this.
  • the smart bracelet includes a microcontroller unit (MCU) and a heart rate sensor.
  • the MCU is equivalent to a master device
  • the heart rate sensor is equivalent to a slave device, and data is exchanged between the MCU and the heart rate sensor through SPI.
  • the electronic device to which the reset method provided in the embodiment of the present application is applied may include a system consisting of a set of master devices and slave devices, as shown in (a) of FIG. 7 ; it may also include a system consisting of multiple sets of master devices and slave devices, as shown in (b) of FIG. 7 ; the embodiment of the present application does not limit this.
  • the number of master devices is 1, and the number of slave devices is greater than and equal to 1, as shown in (c) of FIG. 7 .
  • FIG8 is a flow chart of a reset method provided by an embodiment of the present application. As shown in FIG8 , the method is applied in an electronic device, the electronic device includes a master device and a slave device, the master device is used to send a clock signal to the slave device, and the master device and the slave device perform data exchange based on the clock signal.
  • the method includes:
  • a slave device sends a warning message to a master device, where the warning message is used to indicate that the master device is in an abnormal state.
  • the master device is usually an electronic device with strong processing capabilities
  • the slave device is an electronic device with weak processing capabilities.
  • the master device and the slave device can exchange data through the SPI bus, wherein the slave device can exchange data based on the control signal sent by the master device.
  • the master device sends a clock signal to the slave device so that the slave device is synchronized with the master device based on the clock signal, thereby enabling data exchange between the master device and the slave device.
  • main components With the continuous advancement of chip technology, the size of main components is getting smaller and smaller. At the same time, more and more electronic components are installed in electronic devices, and the electromagnetic interference in electronic devices is becoming more and more serious. The main components are also likely to be interfered by electromagnetic interference signals, causing the components to hang.
  • the master device being in an abnormal state includes: a state in which a chip select CS signal is at a first level and a clock signal is not sent to the slave device.
  • the master device has set the CS signal corresponding to the slave device to a preset level (e.g., the first level), but cannot send a CLK signal to the slave device, so that the slave device cannot obtain a clock signal to communicate with the master device for synchronization, thereby making it impossible for the master device and the slave device to exchange data.
  • the slave device detects that the CS signal is at the first level but does not receive the CLK signal, the slave device determines that the master device is abnormal, and the slave device sends an early warning message to the master device, and the early warning message is used to indicate that the master device is in an abnormal state.
  • the master device is connected to multiple slave devices, and each slave device has its corresponding chip select signal line.
  • the master device sets the level on one or more chip select signal lines to the first level, it indicates that data is exchanged between the master device and the slave device corresponding to the chip select signal line.
  • the first level may refer to a high level or a low level, which is not limited in the embodiment of the present application.
  • the master device being in an abnormal state includes: when the chip select CS signal is at a first level, no data interaction is performed between the master device and the slave device.
  • the master device has set the CS signal corresponding to the slave device to a preset level (e.g., the first level), but there is no data transmission on MOSI and/or MISO.
  • a preset level e.g., the first level
  • the slave device detects that the CS signal is at the first level, but does not detect data transmission on MOSI and MISO, the slave device determines that the master device is abnormal, and the slave device sends an early warning message to the master device, and the early warning message is used to indicate that the master device is in an abnormal state.
  • the master device being in an abnormal state includes: a time length taken for the chip select CS signal to be converted to the first level is less than a preset time length threshold.
  • the slave device detects that the time ⁇ t used by the master device to set the CS signal to a preset level (first level) is less than the preset time threshold, then the slave device determines that the master device is in an abnormal state, and the slave device sends an early warning message to the master device, where the early warning message is used to indicate that the master device is in an abnormal state.
  • the reset operation refers to operating the device to remove the influence of the erroneous process running in the device on the operation of the device.
  • the device can be reset by powering off and restarting the device, or by clearing the process in the device.
  • the reset operation by powering off and restarting the device can be called a hard reset operation.
  • the reset operation of the device by clearing the process in the device can be called a soft reset operation.
  • the master device receives the warning information sent by the slave device, the master device can be powered off and restarted to complete the reset operation of the master device.
  • the reset operation of the master device can also be completed by clearing the relevant processes.
  • the reset method provided in the embodiment of the present application is applied to a master device in an electronic device, the master device is used to send a clock signal to a slave device, the master device and the slave device perform data exchange based on the clock signal, the slave device sends an early warning message to the master device, and when the master device receives the early warning message, the master device is reset, wherein the early warning message is used to indicate that the master device is in an abnormal state.
  • the master device is affected by electromagnetic interference signals in electronic devices and is in an abnormal state, the hanging problem of the master device can be solved by resetting the master device.
  • the reset method provided in the embodiment of the present application can solve the hanging problem of the master device when the number of electronic devices in the electronic device increases or the size of the electronic device decreases, thereby effectively restoring data exchange between the electronic devices.
  • the slave device before the slave device sends the warning information to the master device, it can first detect whether the master device is in an abnormal state, and send the warning information to the master device when the master device is in an abnormal state.
  • the master device before the slave device sends the warning information to the master device, it can first detect whether the master device is in an abnormal state, and send the warning information to the master device when the master device is in an abnormal state. The following is a detailed description of the embodiment shown in FIG9 .
  • FIG10 is a flow chart of another reset method provided in an embodiment of the present application.
  • the method is applied in an electronic device, the electronic device includes a master device and a slave device, the master device is used to send a clock signal to the slave device, and the master device and the slave device perform data exchange based on the clock signal.
  • the method includes:
  • a slave device sends a first signal to a master device, wherein the first signal is used to request data exchange with the master device.
  • the slave device When the slave device needs to exchange data with the master device, it will send an interrupt to the master device.
  • the master device receives the interrupt signal, it determines that the slave device can exchange data. At this time, the master device sets the level of the chip select signal line corresponding to the slave device to the first level and sends a clock signal to the slave device.
  • the slave device detects whether it has received the clock signal sent by the master device; if the clock signal sent by the master device is not detected, execute S203.
  • the slave device when the slave device detects that the level on the chip select signal line is the first level, if it detects the clock signal sent by the master device, it can synchronize with the master device based on the clock signal, and after synchronization, exchange data with the master device; if the clock signal sent by the master device is not detected, it is determined that the master device is in an abnormal state.
  • the slave device sends warning information to the master device.
  • the warning information is sent by the slave device when the chip selection CS signal is at the first level and the slave device does not receive the clock signal sent by the master device.
  • the slave device sends a first signal to the master device, wherein the first signal is used to request data interaction with the master device, and then the slave device detects whether the clock signal sent by the master device is received; if the clock signal sent by the master device is not detected, an early warning message is sent to the master device.
  • This is equivalent to the early warning message being sent when the clock signal is not detected on the basis that the slave device has requested data interaction with the master device, so that the early warning message indicates that the master device is in an abnormal state with higher accuracy, thereby improving the accuracy of the master device performing a reset operation based on the early warning message, and more effectively solving the problem of device hang in electronic equipment.
  • S205 The master device sends a reset instruction to the slave device, where the reset instruction is used to instruct the slave device to perform a reset operation.
  • the reset operation refers to the operation performed on the electronic device to remove the influence of the erroneous process in the device on the device operation.
  • the reset operation can usually be performed by powering off and restarting the device, or by clearing the process in the device.
  • the reset operation by powering off and restarting the device can be called a hard reset operation.
  • the reset operation by clearing the process in the device can be called a soft reset operation.
  • the reset instruction includes a first reset instruction and a second reset instruction
  • the first reset instruction includes resetting the device by triggering a reset key of the slave device.
  • resetting the device by triggering the reset button of the slave device refers to a reset operation of powering off and restarting the slave device, that is, the first reset instruction may be a reset instruction performed by a hard reset operation.
  • the second reset instruction includes resetting the slave device through an SPI interface.
  • resetting the slave device through the SPI interface generally refers to a reset operation performed by clearing the process in the slave device through the SPI interface, that is, the second reset instruction may refer to a reset instruction performed through a soft reset operation.
  • S206 The slave device performs a reset operation based on the reset instruction.
  • the master device when the master device receives the warning information sent by the slave device, the master device is reset, and then the master device sends a reset instruction to the slave device, instructing the slave device to perform the reset operation. That is to say, in the embodiment of the present application, when the master device receives the warning information sent by the slave device, after resetting the master device itself, the master device will also send a reset instruction to the slave device, so that the slave device performs the reset operation based on the reset instruction, thereby avoiding the situation where the master device and the slave device are abnormal at the same time, and only resetting the master device cannot solve the problem of device hanging in the electronic device, thereby further improving the solution of electronic equipment. The reliability of the device hanging problem.
  • the slave device may also continue to detect whether data is exchanged between the master device and the slave device when detecting that the CS signal is at the first level to determine whether the master device is in an abnormal state. This is described in detail below through the embodiment shown in FIG.
  • FIG11 is a flow chart of a reset method provided in another embodiment of the present application.
  • the method is applied in an electronic device, and the electronic device includes a master device and a slave device.
  • the master device is used to send a clock signal to the slave device, and the master device and the slave device perform data exchange based on the clock signal.
  • the method includes:
  • S301 When the slave device detects that the chip selection CS signal is at the first level, it detects whether data is transmitted on MOSI and MISO between the master device and the slave device. If not, execute S302.
  • the slave device determines that the master device is in an abnormal state.
  • S302 The slave device sends warning information to the master device.
  • S304 The master device sends a reset instruction to the slave device, where the reset instruction is used to instruct the slave device to perform a reset operation.
  • S305 The slave device performs a reset operation based on the reset instruction.
  • the slave device may also detect the time taken for the CS signal to be converted to the first level to determine whether the master device is in an abnormal state. This is described in detail below through the embodiment shown in FIG.
  • FIG12 is a flow chart of a reset method provided in another embodiment of the present application.
  • the method is applied in an electronic device, the electronic device includes a master device and a slave device, the master device is used to send a clock signal to the slave device, and the master device and the slave device perform data exchange based on the clock signal.
  • the method includes:
  • the slave device detects whether the duration for the chip selection CS signal to be converted to the first level is less than a preset duration threshold, and if so, execute S402 .
  • the description is made by taking the case where the first level is a low level as an example.
  • the master device pulls down the CS signal to the first level.
  • the time taken for the level of the CS signal to be converted to the first level, that is, the duration of the falling edge of the signal is usually a preset duration.
  • the master device receives an abnormal interference from an electromagnetic interference signal, the duration of the falling edge of the signal is usually short. Therefore, when the duration of the falling edge of the CS signal is less than the preset duration threshold, the slave device determines that the master device is in an abnormal state.
  • S402 The slave device sends warning information to the master device.
  • S404 The master device sends a reset instruction to the slave device, where the reset instruction is used to instruct the slave device to perform a reset operation.
  • S405 The slave device performs a reset operation based on the reset instruction.
  • the problem of the main device can also be determined by adding a main device detection module.
  • the main device detection module may include a CS detection submodule, a CLK detection submodule, a MOSI detection submodule and a MISO detection submodule.
  • the CS detection submodule is connected to the CS signal line for detecting the CS signal
  • the CLK detection submodule is connected to the CLK signal line for detecting the CLK signal
  • the MOSI detection submodule is connected to the MOSI signal line for detecting the MOSI signal
  • the MISO detection submodule is connected to the MISO Signal line connection, used to detect MISO signal.
  • the master device detection module detects that the level of the CS signal is pulled down (set to a low level), but there is no clock signal on the CLK signal line, it means that the master device may be hung, so an early warning message can be sent to the master device so that the master device can reset the master device based on the early warning message.
  • main device detection module can be integrated in the main device, or can be a circuit module arranged outside the main device, and the embodiments of the present application do not limit this.
  • the slave devices since the processing capability of some slave devices is relatively weak, the slave devices do not have the function of detecting the clock signal. In this case, the master device can directly reset the master device without resetting the master device upon receiving the warning information sent by the slave device. This is described in detail below through the embodiment shown in FIG. 14.
  • FIG14 is a flow chart of a reset method provided in another embodiment of the present application.
  • the method is applied in an electronic device, the electronic device includes a master device and a slave device, the master device is used to send a clock signal to the slave device, and the master device and the slave device perform data exchange based on the clock signal.
  • the method includes:
  • the data lines may include the CS signal line, the CLK signal line, the MOSI signal line and the MISO signal line shown in Fig. 1.
  • the master device detects an abnormality on any signal line, the master device is reset.
  • the signal abnormality on any data line may be caused by the master device being in an abnormal state or the slave device being in an abnormal state. This is equivalent to the master device resetting itself as long as there is an abnormality in the data interaction between the master device and the slave device. In other words, there is no need for the slave device to detect whether the master device is in an abnormal state.
  • S502 The master device sends a reset instruction to the slave device.
  • S503 The slave device performs a reset operation based on the reset instruction.
  • the reset method provided in the embodiment of the present application is applied in an electronic device, and the electronic device includes a master device and a slave device, the master device is used to send a clock signal to the slave device, and the master device and the slave device perform data exchange based on the clock signal, and the method includes: when the master device detects that the signal on the data line is abnormal, the master device is reset, and then the master device sends a reset instruction to the slave device, and the slave device performs a reset operation based on the reset instruction.
  • the slave device can actively reset itself, solve the problem of the master device hanging, and then effectively restore the data exchange between electronic devices.
  • each step in the flow chart in the above-described embodiment is shown in sequence according to the indication of the arrow, these steps are not necessarily performed in sequence according to the order indicated by the arrow. Unless there is clear explanation in this article, the execution of these steps does not have strict order restriction, and these steps can be performed in other orders. Moreover, at least a portion of the steps in the flow chart may include a plurality of sub-steps or a plurality of stages, and these sub-steps or stages are not necessarily performed at the same time, but can be performed at different times, and the execution order of these sub-steps or stages is not necessarily performed in sequence, but can be performed in turn or alternately with at least a portion of other steps or sub-steps or stages of other steps.
  • FIG. 15 is a schematic diagram of the structure of a main device 500 provided in an embodiment of the present application.
  • the master device 500 can execute the reset method shown in FIGS. 8 to 14 ; the master device 500 includes: an acquisition unit 510 and a processing unit 520 .
  • the processing unit 520 is used to receive the warning information sent by the slave device, and the warning information is used to indicate that the master device is in an abnormal state;
  • the processing unit 520 is used to perform a reset operation according to the warning information.
  • the master device being in an abnormal state includes: a state in which the chip selection CS signal is at a first level and a clock signal is not sent to the slave device.
  • the processing unit 520 is further configured to send a reset instruction to the slave device, where the reset instruction is used to instruct the slave device to perform a reset operation.
  • the reset instruction includes a first reset instruction or a second reset instruction
  • the first reset instruction is used to instruct to reset the device by triggering a reset key of the slave device
  • the second reset instruction is used to instruct to reset the slave device through a serial peripheral interface SPI interface.
  • the main device provided in this embodiment is used to execute the reset method of the above embodiment, and the technical principle and technical effect are similar, which will not be repeated here.
  • main device 500 is implemented in the form of a functional unit.
  • unit here can be implemented in the form of software and/or hardware, and is not specifically limited to this.
  • a "unit” may be a software program, a hardware circuit, or a combination of the two that implements the above functions.
  • the hardware circuit may include an application specific integrated circuit (ASIC), an electronic circuit, a processor (such as a shared processor, a dedicated processor, or a group processor, etc.) and a memory for executing one or more software or firmware programs, a combined logic circuit, and/or other suitable components that support the described functions.
  • ASIC application specific integrated circuit
  • processor such as a shared processor, a dedicated processor, or a group processor, etc.
  • memory for executing one or more software or firmware programs, a combined logic circuit, and/or other suitable components that support the described functions.
  • the units of each example described in the embodiments of the present application can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present application.
  • FIG. 16 is a schematic diagram of the structure of a slave device 600 provided in an embodiment of the present application.
  • the slave device 600 can execute the reset method shown in FIG. 8 to FIG. 14 ; the slave device 600 includes: an acquisition unit 610 and a processing unit 620 .
  • the processing unit 620 is used to detect that the main device is in an abnormal state
  • the processing unit 620 is used to send warning information to the master device, where the warning information is used to indicate that the master device is in an abnormal state.
  • the processing unit 620 is used to send a first signal to the master device, where the first signal is used to request data interaction with the master device; detect whether a clock signal sent by the master device is received; if the clock signal sent by the master device is not detected, it is determined that the master device is in an abnormal state.
  • the master device being in an abnormal state includes: a state in which the chip selection CS signal is at a first level and a clock signal is not sent to the slave device.
  • the slave device provided in this embodiment is used to execute the reset method of the above embodiment, and the technical principle and technical effect are similar, which will not be repeated here.
  • slave device 600 is implemented in the form of a functional unit.
  • unit here can be implemented in the form of software and/or hardware, and is not specifically limited to this.
  • a "unit” may be a software program, a hardware circuit, or a combination of the two that implements the above functions.
  • the hardware circuit may include an application specific integrated circuit (ASIC), an electronic circuit, a processor (such as a shared processor, a dedicated processor, or a group processor, etc.) and a memory for executing one or more software or firmware programs, a combined logic circuit, and/or other suitable components that support the described functions.
  • ASIC application specific integrated circuit
  • processor such as a shared processor, a dedicated processor, or a group processor, etc.
  • memory for executing one or more software or firmware programs, a combined logic circuit, and/or other suitable components that support the described functions.
  • the units of each example described in the embodiments of the present application can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present application.
  • Fig. 17 shows a schematic diagram of the structure of an electronic device provided by the present application.
  • the dotted lines in Fig. 17 indicate that the unit or the module is optional.
  • the electronic device 700 can be used to implement the reset method described in the above method embodiment.
  • the electronic device 700 includes one or more processors 701, which can support the reset method in the method embodiment of the electronic device 700.
  • the processor 701 can be a general-purpose processor or a special-purpose processor.
  • the processor 701 can be a central processing unit (CPU), a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, such as discrete gates, transistor logic devices or discrete hardware components.
  • the processor 701 may be used to control the electronic device 700, execute software programs, and process data of the software programs.
  • the electronic device 700 may also include a communication unit 705 to implement input (reception) and output (transmission) of signals.
  • the electronic device 700 may be a chip
  • the communication unit 705 may be an input and/or output circuit of the chip
  • the communication unit 705 may be a communication interface of the chip
  • the chip may be a component of a terminal device or other electronic devices.
  • the electronic device 700 may be a terminal device, and the communication unit 705 may be a transceiver of the terminal device, or the communication unit 705 may be a transceiver circuit of the terminal device.
  • the electronic device 700 may include one or more memories 702 on which a program 704 is stored.
  • the program 704 can be executed by the processor 701 to generate instructions 703, so that the processor 701 executes the impedance matching method described in the above method embodiment according to the instructions 703.
  • data may be stored in the memory 702.
  • the processor 701 may read data stored in the memory 702.
  • the data may be stored at the same storage address as the program 704, or may be stored at a different storage address than the program 704.
  • the processor 701 and the memory 702 may be provided separately or integrated together; for example, integrated on a system on chip (SOC) of a terminal device.
  • SOC system on chip
  • the memory 702 can be used to store the related program 704 of the reset method provided in the embodiment of the present application
  • the processor 701 can be used to call the related program 704 of the reset method stored in the memory 702 when resetting, and execute the reset method of the embodiment of the present application; including: receiving the early warning information sent by the slave device, the early warning information is used to indicate that the master device is in an abnormal state; performing a reset operation according to the early warning information.
  • the memory 702 may be used to store a program 704 related to the reset method provided in the embodiment of the present application
  • the processor 701 may be used to call the program 704 related to the reset method stored in the memory 702 when performing a reset, and execute the reset method of the embodiment of the present application; including: detecting that the master device is in an abnormal state; The master device sends a warning message, where the warning message is used to indicate that the master device is in an abnormal state.
  • the present application also provides a computer program product, which, when executed by the processor 701, implements the reset method of any method embodiment in the present application.
  • the computer program product may be stored in the memory 702 , for example, a program 704 , which is converted into an executable target file that can be executed by the processor 701 after preprocessing, compiling, assembling, and linking.
  • the present application also provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a computer, the reset method of any method embodiment of the present application is implemented.
  • the computer program can be a high-level language program or an executable target program.
  • the computer-readable storage medium is, for example, a memory 702.
  • the memory 702 may be a volatile memory or a nonvolatile memory, or the memory 702 may include both a volatile memory and a nonvolatile memory.
  • the nonvolatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory.
  • the volatile memory may be a random access memory (RAM), which is used as an external cache.
  • RAM synchronous RAM
  • SDRAM synchronous DRAM
  • DDR SDRAM double data rate SDRAM
  • ESDRAM enhanced SDRAM
  • SLDRAM synchronous link DRAM
  • DR RAM direct rambus RAM
  • At least one means one or more, and “more than one” means two or more.
  • At least one of the following” or similar expressions refers to any combination of these items, including any combination of single or plural items.
  • at least one of a, b, or c can mean: a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, c can be single or multiple.
  • the size of the serial numbers of the above-mentioned processes does not mean the order of execution.
  • the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.
  • the disclosed devices and methods can be implemented in other ways.
  • the device embodiments described above are only schematic; for example, the division of units is only a logical function division, and there may be other division methods in actual implementation; for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed.
  • Another point, The mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, which may be electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

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Abstract

适用于终端设备技术领域,提供一种复位方法和电子设备,其中,电子设备包括主器件和从器件,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,从器件向主器件发送预警信息,主器件接收到该预警信息时,对主器件进行复位操作,其中,预警信息用于指示主器件处于异常状态,这样可以通过对主器件的复位操作解决主器件的挂死问题,与传统方法仅能解决从器件的挂死问题相比,能够在电子设备中电子器件数量增多,或者电子器件的尺寸减小的情况下,解决主器件的挂死问题,进而能够有效地恢复电子器件之间的数据交互。

Description

复位方法和电子设备
本申请要求于2022年10月21日提交国家知识产权局、申请号为202211297359.0、申请名称为“复位方法和电子设备”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及终端设备的技术领域,并且更具体地,涉及一种复位方法和电子设备。
背景技术
电子设备中通常包括有多个电子器件,这些电子器件之间会通过串行外设接口(Serial Peripheral Interface,SPI)进行数据传输,以实现不同的功能。
上述电子器件中通常包括一个主器件和多个从器件,主器件向各个从器件发送时钟信号以使各个电子器件保持信号同步,实现各个电子器件之间的数据交互。电子设备中的电磁干扰信号会导致从器件无法接收到主器件发送的时钟信号,进而导致从器件无法与主器件保持信号同步,导致电子器件之间无法进行数据交互,这种现象被称为器件挂死。在器件挂死的情况下,通常会对从器件进行复位,以使主器件和从器件之间重新保持信号同步。然而在现阶段,电子设备中电子器件数量的增多,或者,电子器件的尺寸减小,采用传统的方法无法恢复各个电子器件之间的数据交互。
基于此,现阶段在器件挂死的情况下,如何恢复各个电子器件之间的数据交互,成为了一个亟待解决的问题。
发明内容
本申请提供了一种复位方法,能够有效地恢复各个电子器件之间的数据交互。
第一方面,提供了一种复位方法,该方法应用于电子设备中的主器件中,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,电子设备包括主器件和从器件,该方法包括:
接收从器件发送的预警信息,预警信息用于指示主器件处于异常状态;
根据预警信息进行复位操作。
本申请的实施例中提供的复位方法,应用在电子设备中的主器件,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,从器件向主器件发送预警信息,主器件接收到该预警信息时,对主器件进行复位操作,其中,预警信息用于指示主器件处于异常状态,这样使得在芯片尺寸越来越小的趋势中,主器件受到电子设备中电磁干扰信号的影响处于异常状态的情况下,可以通过对主器件的复位操作解决主器件的挂死问题,与传统方法仅能解决从器件的挂死问题相比,本申请实施例提供的复位方法,能够在电子设备中电子器件数量增多,或者电子器件的尺寸减小的情况下,解决主器件的挂死问题,进而能够有效地恢复电子器件之间的数据交互。
在一个实施例中,主器件处于异常状态包括:在片选CS信号为第一电平且未向 从器件发送时钟信号的状态。
应理解,第一电平可以是高电平,也可以低电平,本申请实施例对此不做限制。
在一个实施例中,主器件处于异常状态包括:在片选CS信号为第一电平时,主器件和从器件之间未进行数据交互。
在一个实施例中,主器件处于异常状态包括:片选CS信号转换到第一电平所用时长小于预设时长阈值。
在一个实施例中,该方法还包括:向从器件发送复位指令,复位指令用于指示从器件进行复位操作。
本申请的实施例中提供的复位方法,主器件接收到从器件发送预警信息时,对主器件进行复位操作,然后主器件向从器件发送复位指令,指示从器件进行复位操作,也即是说,在本申请的实施例中,当主器件接收到从器件发送的预警信息时,对主器件自身进行复位操作之后,主器件还会向从器件发送复位指令,以使从器件基于该复位指令进行复位操作,避免了主器件和从器件同时出现异常的情况下,仅对主器件进行复位操作不能解决电子设备中器件挂死的问题,进而进一步地提高了解决电子设备中器件挂死问题的可靠性。
在一个实施例中,上述复位指令包括第一复位指令或者第二复位指令,第一复位指令用于指示通过触发从器件的复位键进行器件复位,第二复位指令用于指示通过串行外设接口SPI接口对从器件进行器件复位。
第二方面,提供了一种复位方法,该方法应用于电子设备中的从器件中,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,电子设备包括主器件和从器件,该方法包括:
检测到主器件处于异常状态;
向主器件发送预警信息,预警信息用于指示主器件处于异常状态。
本申请的实施例中提供的复位方法,从器件向主器件发送第一信号,其中,第一信号用于请求与主器件之间进行数据交互,然后从器件检测是否接收到主器件发送的时钟信号;若未检测到主器件发送的时钟信号,向主器件发送预警信息。这样相当于预警信息是在从器件已经向主器件请求进行数据交互的基础上未检测到的时钟信号时发送的,使得预警信息指示主器件处于异常状态的准确性更高,进而提高了主器件基于预警信息进行复位操作的准确性,更加有效地解决电子设备中器件挂死的问题。
在一个实施例中,上述检测到主器件处于异常状态,包括:向主器件发送第一信号,第一信号用于请求与主器件之间进行数据交互;检测是否接收到主器件发送的时钟信号;若未检测到主器件发送的时钟信号,则确定主器件处于异常状态。
应理解,第一信号可以指示中断(interrupt,INT)信号。
在一个实施例中,上述检测到主器件处于异常状态,包括:检测到片选CS信号为第一电平时,未检测到所述主器件和所述从器件之间的主发从收信号线MOSI和主收从发信号线MISO上的数据传输。
在一个实施例中,上述检测到主器件处于异常状态,包括:检测到片选CS信号转换为第一电平所用的时长小于预设时长阈值。
在一个实施例中,主器件处于异常状态包括:在片选CS信号为第一电平且未向 从器件发送时钟信号的状态。
应理解,第一电平可以是高电平,也可以低电平,本申请实施例对此不做限制。
第三方面,提供了一种电子器件,包括用于执行第一方面任一种方法的单元。该装置可以是终端设备内的芯片。该装置可以包括获取单元和处理单元。
当该装置是终端设备内的芯片时,该处理单元可以是芯片内部的处理单元,该获取单元可以是输出接口、管脚或电路等;该芯片还可以包括存储器,该存储器可以是该芯片内的存储器(例如,寄存器、缓存等),也可以是位于该芯片外部的存储器(例如,只读存储器、随机存取存储器等);该存储器用于存储计算机程序代码,当该处理器执行该存储器所存储的计算机程序代码时,使得该芯片执行第一方面中的任一种方法。
在一种可能的实现方式中,存储器用于存储计算机程序代码;处理器,处理器执行该存储器所存储的计算机程序代码,当该存储器存储的计算机程序代码被执行时,该处理器用于执行:接收从器件发送的预警信息,预警信息用于指示主器件处于异常状态;根据预警信息进行复位操作。
第四方面,提供了一种电子器件,包括用于执行第二方面任一种方法的单元。该装置可以是终端设备内的芯片。该装置可以包括获取单元和处理单元。
当该装置是终端设备内的芯片时,该处理单元可以是芯片内部的处理单元,该获取单元可以是输出接口、管脚或电路等;该芯片还可以包括存储器,该存储器可以是该芯片内的存储器(例如,寄存器、缓存等),也可以是位于该芯片外部的存储器(例如,只读存储器、随机存取存储器等);该存储器用于存储计算机程序代码,当该处理器执行该存储器所存储的计算机程序代码时,使得该芯片执行第二方面中的任一种方法。
在一种可能的实现方式中,存储器用于存储计算机程序代码;处理器,处理器执行该存储器所存储的计算机程序代码,当该存储器存储的计算机程序代码被执行时,该处理器用于执行:检测到主器件处于异常状态;向主器件发送预警信息,预警信息用于指示主器件处于异常状态。
第五方面,提供了一种电子设备,电子设备包括主器件和从器件,主器件用于执行如第一方面中任一项的方法,从器件用于执行如第二方面中任一项的方法。
在一个实施例中,电子设备包括手机或平板电脑,主器件包括系统级芯片SOC,从器件包括指纹传感器。
在一个实施例中,电子设备包括智能穿戴设备,主器件包括微控制单元MCU,从器件包括心率传感器。
第六方面,提供了一种计算机可读存储介质,计算机可读存储介质存储有计算机程序代码,当计算机程序代码被复位装置运行时,使得该复位装置执行第一方面中的任一种复位方法,或者,使得该复位装置执行第二方面中的任一种复位方法。
第七方面,提供了一种计算机程序产品,计算机程序产品包括:计算机程序代码,当计算机程序代码被复位装置运行时,使得该复位装置执行第一方面中的任一种方法,或者使得该复位装置执行第二方面中的任一种方法。
本申请实施例提供的复位方法和电子设备,其中,电子设备包括主器件和从器件, 主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,从器件向主器件发送预警信息,主器件接收到该预警信息时,对主器件进行复位操作,其中,预警信息用于指示主器件处于异常状态,这样使得在芯片尺寸越来越小的趋势中,主器件受到电子设备中电磁干扰信号的影响处于异常状态的情况下,可以通过对主器件的复位操作解决主器件的挂死问题,与传统方法仅能解决从器件的挂死问题相比,本申请实施例提供的复位方法,能够在电子设备中电子器件数量增多,或者电子器件的尺寸减小的情况下,解决主器件的挂死问题,进而能够有效地恢复电子器件之间的数据交互。
附图说明
图1是一种主器件和从器件的连接关系的示意图;
图2是一种主器件和从器件之间的信号的示意图;
图3是一种适用于本申请的电子设备的硬件系统的示意图;
图4是一种适用于本申请的电子设备的软件系统的示意图;
图5是本申请实施例中一种复位方法的应用场景的示意图;
图6是本申请实施例中另一种复位方法的应用场景的示意图;
图7是本申请实施例中另一种复位方法的应用场景的示意图;
图8是本申请实施例提供的一种复位方法的流程示意图;
图9是本申请实施例中主器件处于异常状态时主器件和从器件之间的信号示意图;
图10是本申请实施例提供的另一种复位方法的流程示意图;
图11是本申请实施例提供的另一种复位方法的流程示意图;
图12是本申请实施例提供的另一种复位方法的流程示意图;
图13是本申请实施例提供的一种主器件和从器件的结构示意图;
图14是本申请实施例提供的另一种复位方法的流程示意图;
图15是本申请提供的一种主器件的结构示意图;
图16是本申请提供的一种从器件的结构示意图;
图17是本申请提供的一种复位的电子设备的示意图。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行描述。其中,在本申请实施例的描述中,除非另有说明,“/”表示或的意思,例如,A/B可以表示A或B;本文中的“和/或”仅仅是一种描述关联对象的关联关系,表示可以存在三种关系,例如,A和/或B,可以表示:单独存在A,同时存在A和B,单独存在B这三种情况。另外,在本申请实施例的描述中,“多个”是指两个或多于两个。
以下,术语“第一”、“第二”、“第三”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”、“第三”的特征可以明示或者隐含地包括一个或者更多个该特征。
为了便于理解,示例的给出部分与本申请实施例相关概念的说明以供参考。
串行外设接口(Serial Peripheral Interface,SPI)
SPI是指一种同步串行接口技术,是一种高速,全双工的同步通信总线。SPI通常 是以主从方式工作,应用在一个主器件和一个或多个从器件组成的系统中。一般SPI需要4根线进行数据传输,这4根线包括:
1,片选信号线(Slave Select/Chip Select,SS/CS),用于选择需要进行通信的从器件。IIC主器件是通过发送从器件地址来选择需要进行通信的从器件的,而SPI主器件不需要发送从器件地址,直接将相应的从器件片选信号拉低即可。
2,串行时钟(Serial Clock,SCK),和IIC的SCL一样,为SPI通信提供时钟。其中,SCK也可以被简称为时钟(Clock,CLK)。
3,主出从入信号线(Master Out Slave In/Serial Data Output,MOSI/SDO),这根数据线只能用于主器件向从器件发送数据,也就是主器件输出,从器件输入。
4,主入从出信号线(Master In Slave Out/Serial Data Input,MISO/SDI)这根数据线只能用于从器件向主器件发送数据,也就是主器件输入,从器件输出。
示例性的,如图1中的(a)所示,主器件和从器件之间通过CS、CLK、MOSI、MISO四根数据线连接,同时主器件和从器件之间还存在中断信号(intterupt,INT)。主器件将SS拉低之后,会像从器件发送时钟信号。示例性的,主器件向从器件发送的时钟信号如图1中的(b)所示的CLK信号,包括两个时隙。主器件在第一个时隙通过MOSI向从器件传输数据,在第二个时隙通过MISO接收从器件发送的数据。在主器件和从器件之间进行数据传输的过程中,SS信号为低电平。
在现阶段,电子设备中通常采用SPI实现主器件和从器件之间的数据交互。通常,从器件在需要与主器件之间进行数据交互时,向主器件发送中断(interrupt,INT)信号(相当于第一信号),主器件响应于INT信号,将该从器件对应的CS信号拉低,同时向从器件发送SCK信号(时钟信号)。从器件基于接收到的时钟信号,与主器件进行信号同步,并通过MISO或者MOSI与主器件之间进行数据交互。通常,从器件的尺寸较小,受到电子设备内的电磁干扰信号的影响较大,因此,在主器件和从器件之间出现数据交互异常的情况下,通常主器件会向从器件发送复位指令,以使从器件进行复位,恢复主器件和从器件之间的数据交互。然后随着芯片技术的进步,主器件的尺寸也越来越小。同时,电子设备中设置的电子器件越来越多,电子设备中的电磁干扰越来越严重,主器件也存在被电磁干扰信号干扰,导致主器件挂死的情况,进而导致主器件和从器件之间的数据交互异常。通常传统的方法,对从器件进行复位,不能完全解决现阶段电子设备中出现的主器件和从器件之间的数据交互异常的问题。
示例性的,在主器件与从器件之间正常通讯的情况下,如图2中的(a)所示,在从器件的INT信号为低电平时,从器件的状态为空闲状态,主器件可以与从器件之间进行数据交互。每间隔预设的时长,主器件在CS上发送一个脉冲信号,同时,随着CS上的脉冲,发送一个时钟信号。
在主器件收到电磁干扰信号的干扰,出现挂死现象的情况下,如图2中的(b)所示,从器件的INT信号为低电平时,从器件的状态为空闲状态,主器件可以与从器件之间进行数据交互。每间隔预设的时长,主器件在CS上发送一个脉冲信号,但是,由于主器件被电磁信号干扰,从器件只能接收到CS上的脉冲信号,不能收到主器件发送的时钟信号。由于从器件无法收到主器件发送的时钟信号,主器件和从器件之间无法基于时钟信号恢复通信同步,因此,主器件和从器件之间无法恢复数据交互。
应理解,在主器件收到电磁干扰信号的干扰,出现挂死现象的情况下,还可以是CS信号、CLK信号、MOSI信号出现异常情况,本申请实施例对此不做限制。
有鉴于此,本申请实施例提供了一种复位方法,应用在电子设备中的主器件,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,从器件向主器件发送预警信息,主器件接收到该预警信息时,对主器件进行复位操作,其中,预警信息用于指示主器件处于异常状态,这样使得在芯片尺寸越来越小的趋势中,主器件受到电子设备中电磁干扰信号的影响处于异常状态的情况下,可以通过对主器件的复位操作解决主器件的挂死问题,与传统方法仅能解决从器件的挂死问题相比,本申请实施例提供的复位方法,能够在电子设备中电子器件数量增多,或者电子器件的尺寸减小的情况下,解决主器件的挂死问题,进而能够有效地恢复电子器件之间的数据交互。
本申请实施例提供的复位方法,可以应用于电子设备。可选的,电子设备包括终端设备,终端设备也可以称为终端(terminal)、用户设备(user equipment,UE)、移动台(mobile station,MS)、移动终端(mobile terminal,MT)等。终端设备可以是手机(mobile phone)、智能电视、穿戴式设备、平板电脑(Pad)、带无线收发功能的电脑、虚拟现实(virtual reality,VR)终端设备、增强现实(augmented reality,AR)终端设备、工业控制(industrial control)中的无线终端、无人驾驶(self-driving)中的无线终端、远程手术(remote medical surgery)中的无线终端、智能电网(smart grid)中的无线终端、运输安全(transportation safety)中的无线终端、智慧城市(smart city)中的无线终端、智慧家庭(smart home)中的无线终端等等。本申请的实施例对终端设备所采用的具体技术和具体设备形态不作限定。
示例性的,图3示出了电子设备100的结构示意图。电子设备100可以包括处理器110,外部存储器接口120,内部存储器121,通用串行总线(universal serial bus,USB)接口130,充电管理模块140,电源管理模块141,电池142,天线1,天线2,移动通信模块150,无线通信模块160,音频模块170,扬声器170A,受话器170B,麦克风170C,耳机接口170D,传感器模块180,按键190,马达191,指示器192,摄像头193,显示屏194,以及用户标识模块(subscriber identification module,SIM)卡接口195等。其中传感器模块180可以包括压力传感器180A,陀螺仪传感器180B,气压传感器180C,磁传感器180D,加速度传感器180E,距离传感器180F,接近光传感器180G,指纹传感器180H,温度传感器180J,触摸传感器180K,环境光传感器180L,骨传导传感器180M等。
可以理解的是,本申请实施例示意的结构并不构成对电子设备100的具体限定。在本申请另一些实施例中,电子设备100可以包括比图示更多或更少的部件,或者组合某些部件,或者拆分某些部件,或者不同的部件布置。图示的部件可以以硬件,软件或软件和硬件的组合实现。可以理解的是,本申请实施例示意的结构并不构成对电子设备100的具体限定。在本申请另一些实施例中,电子设备100可以包括比图示更多或更少的部件,或者组合某些部件,或者拆分某些部件,或者不同的部件布置。图示的部件可以以硬件,软件或软件和硬件的组合实现。
处理器110可以包括一个或多个处理单元,例如:处理器110可以包括应用处理 器(application processor,AP),调制解调处理器,图形处理器(graphics processing unit,GPU),图像信号处理器(image signal processor,ISP),控制器,存储器,视频编解码器,数字信号处理器(digital signal processor,DSP),基带处理器,和/或神经网络处理器(neural-network processing unit,NPU)等。其中,不同的处理单元可以是独立的器件,也可以集成在一个或多个处理器中。
其中,控制器可以是电子设备100的神经中枢和指挥中心。控制器可以根据指令操作码和时序信号,产生操作控制信号,完成取指令和执行指令的控制。
处理器110中还可以设置存储器,用于存储指令和数据。在一些实施例中,处理器110中的存储器为高速缓冲存储器。该存储器可以保存处理器110刚用过或循环使用的指令或数据。如果处理器110需要再次使用该指令或数据,可从所述存储器中直接调用。避免了重复存取,减少了处理器110的等待时间,因而提高了系统的效率。
在一些实施例中,处理器110可以包括一个或多个接口。接口可以包括集成电路(inter-integrated circuit,I2C)接口,集成电路内置音频(inter-integrated circuit sound,I2S)接口,脉冲编码调制(pulse code modulation,PCM)接口,通用异步收发传输器(universal asynchronous receiver/transmitter,UART)接口,移动产业处理器接口(mobile industry processor interface,MIPI),通用输入输出(general-purpose input/output,GPIO)接口,用户标识模块(subscriber identity module,SIM)接口,和/或通用串行总线(universal serial bus,USB)接口等。
可以理解的是,本申请实施例示意的各模块间的接口连接关系,只是示意性说明,并不构成对电子设备100的结构限定。在本申请另一些实施例中,电子设备100也可以采用上述实施例中不同的接口连接方式,或多种接口连接方式的组合。
指纹传感器180H用于采集指纹。电子设备100可以利用采集的指纹特性实现指纹解锁,访问应用锁,指纹拍照,指纹接听来电等。
需要说明的是,本申请实施例提到的任一电子设备可以包括电子设备100中更多或者更少的模块。
电子设备100的软件系统可以采用分层架构,事件驱动架构,微核架构,微服务架构,或云架构。本申请实施例以分层架构的Android系统为例,示例性说明电子设备100的软件结构。
图4是本申请实施例的电子设备100的软件结构框图。
电子设备100的分层架构将软件分成若干个层,每一层都有清晰的角色和分工。层与层之间通过软件接口通信。在一些实施例中,将Android系统分为四层,从上至下分别为应用程序层,应用程序框架层,安卓运行时(Android runtime)和系统库,以及内核层。
应用程序层可以包括一系列应用程序包。
如图4所示,应用程序包可以包括相机,图库,日历,通话,地图,导航,WLAN,蓝牙,音乐,视频,短信息等应用程序。
应用程序框架层为应用程序层的应用程序提供应用编程接口(application programming interface,API)和编程框架。应用程序框架层包括一些预先定义的函数。
如图4所示,应用程序框架层可以包括窗口管理器,内容提供器,视图系统,电 话管理器,资源管理器,通知管理器等。
窗口管理器用于管理窗口程序。窗口管理器可以获取显示屏大小,判断是否有状态栏,锁定屏幕,截取屏幕等。
内容提供器用来存放和获取数据,并使这些数据可以被应用程序访问。数据可以包括视频,图像,音频,拨打和接听的电话,浏览历史和书签,电话簿等。
视图系统包括可视控件,例如显示文字的控件,显示图片的控件等。视图系统可用于构建应用程序。显示界面可以由一个或多个视图组成的。例如,包括短信通知图标的显示界面,可以包括显示文字的视图以及显示图片的视图。
电话管理器用于提供电子设备100的通信功能。例如通话状态的管理(包括接通,挂断等)。
资源管理器为应用程序提供各种资源,比如本地化字符串,图标,图片,布局文件,视频文件等等。
通知管理器使应用程序可以在状态栏中显示通知信息,可以用于传达告知类型的消息,可以短暂停留后自动消失,无需用户交互。比如通知管理器被用于告知下载完成,消息提醒等。通知管理器还可以是以图表或者滚动条文本形式出现在系统顶部状态栏的通知,例如后台运行的应用程序的通知,还可以是以对话窗口形式出现在屏幕上的通知。例如在状态栏提示文本信息,发出提示音,电子设备振动,指示灯闪烁等。
Android Runtime包括核心库和虚拟机。Android runtime负责安卓系统的调度和管理。
核心库包含两部分:一部分是java语言需要调用的功能函数,另一部分是安卓的核心库。
应用程序层和应用程序框架层运行在虚拟机中。虚拟机将应用程序层和应用程序框架层的java文件执行为二进制文件。虚拟机用于执行对象生命周期的管理,堆栈管理,线程管理,安全和异常的管理,以及垃圾回收等功能。
系统库可以包括多个功能模块。例如:表面管理器(surface manager),媒体库(Media Libraries),三维图形处理库(例如:OpenGL ES),2D图形引擎(例如:SGL)等。
表面管理器用于对显示子系统进行管理,并且为多个应用程序提供了2D和3D图层的融合。
媒体库支持多种常用的音频,视频格式回放和录制,以及静态图像文件等。媒体库可以支持多种音视频编码格式,例如:MPEG4,H.264,MP3,AAC,AMR,JPG,PNG等。
三维图形处理库用于实现三维图形绘图,图像渲染,合成,和图层处理等。
2D图形引擎是2D绘图的绘图引擎。
内核层是硬件和软件之间的层。内核层至少包含显示驱动,摄像头驱动,音频驱动,传感器驱动,Wi-Fi驱动等。
需要说明的是,本申请实施例提到的电子设备可以包括上述电子设备中更多或者更少的模块。例如,电子设备还可以包括存储器、计时器等。
下面通过图5至图7对本申请实施例提供的复位方法所应用的应用场景进行说明。
图5为本申请实施例中提供复位方法所应用的应用场景示意图,该复位方法应用 在手机中,手机包括系统级芯片(System on Chip,SoC)和指纹传感器,其中,SoC相当于主器件,指纹传感器相当于从器件。SoC和指纹传感器之间通过SPI进行数据交互。
图6为本申请实施例提供的复位方法应用的应用场景的示意图,该复位方法应用在智能穿戴设备中。示例性的,智能穿戴设备为智能手环。该智能手环可以如图6中的(a)所示,也可以如图6中的(b)所示,本申请实施例对此不做限制。智能手环中包括微控制单元(Microcontroller Unit,MCU)和心率传感器。其中,MCU相当于主器件,心率传感器相当于从器件,MCU与心率传感器之间通过SPI进行数据交互。
应理解,本申请实施例提供的复位方法应用的电子设备中,可以包括一组主器件和从器件组成的系统,如图7中的(a)所示;也可以包括多组主器件和从器件组成的系统,如图7中的(b)所示;本申请实施例对此不做限制。在一组主器件和从器件组成的系统中,主器件的数量为1,从器件的数量为大于且等于1,如图7中的(c)所示。
应理解,上述应用场景的描述只是一种示例,并不构成对本申请实施例所应用的场景的限制。
下面结合图8至图14对本申请实施例提供的复位方法进行详细描述。
图8为本申请实施例提供的一种复位方法的流程示意图,如图8所示,该方法应用在电子设备中,电子设备包括主器件和从器件,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,该方法包括:
S101、从器件向主器件发送预警信息,预警信息用于指示主器件处于异常状态。
应理解,在一些电子设备中,主器件通常是处理能力较强的电子器件,从器件是处理能力较弱的电子器件。主器件和从器件之间可以通过SPI总线的数据交互,其中,从器件可以基于主器件发送的控制信号来进行数据交互。示例性的,主器件向从器件发送时钟信号,以使从器件基于该时钟信号与主器件进行同步,进而使得主器件与从器件之间进行数据交互。
随着芯片技术的不断进步,主器件的尺寸也越来越小,同时电子设备中设置的电子器件越来越多,电子设备中的电磁干扰越来越严重,主器件也存在被电磁干扰信号干扰导致器件挂死的情况。
可选地,主器件处于异常状态包括:在片选CS信号为第一电平且未向从器件发送时钟信号的状态。
示例性的,在主器件被电磁干扰信号干扰导致器件挂死的情况下,如图9中的(a)所示,主器件已经将从器件对应的CS信号设置为预设的电平(例如第一电平),但是无法向从器件发送CLK信号,这样使得从器件无法获得时钟信号与主器件进行通信同步,进而使得主器件和从器件之间不能进行数据交互。在从器件检测到CS信号为第一电平,但是未接收到CLK信号的情况下,从器件判断主器件出现异常,从器件向主器件发送预警信息,该预警信息用于指示主器件处于异常状态。
应理解,在一些可能的情况下,主器件与多个从器件连接,每个从器件有其对应的片选信号线。主器件将其中的一个或多个片选信号线上的电平设置为第一电平时,则说明主器件与该片选信号线对应的从器件之间进行数据交互。应理解,根据不同的 设置,第一电平可以是指高电平,也可以是指低电平,本申请实施例对此不作限制。
可选地,主器件处于异常状态包括:在片选CS信号为第一电平时,主器件和从器件之间未进行数据交互。
示例性的,在主器件被电磁干扰信号干扰导致器件挂死的情况下,如图9中的(b)所示,主器件已经将从器件对应的CS信号设置为预设的电平(例如第一电平),但是在MOSI和/或MISO上没有数据传输。在从器件检测到CS信号为第一电平时,但是没有检测到MOSI和MISO上的数据传输,则从器件判断主器件出现异常,从器件向主器件发送预警信息,该预警信息用于指示主器件处于异常状态。
可选地,主器件处于异常状态包括:片选CS信号转换到第一电平所用时长小于预设时长阈值。
示例性的,在主器件被电磁干扰信号干扰导致器件挂死的情况下,如图9中的(c)所示,从器件检测到主器件将CS信号设置为预设电平(第一电平)所用的时长Δt小于预设时长阈值,则从器件判断主器件处于异常状态,从器件向主器件发送预警信息,该预警信息用于指示主器件处于异常状态。
S102、主器件接收到预警信息时,基于预警信息进行复位操作。
其中,复位操作是指对器件进行操作,去除掉器件中运行错误的进程对器件工作的影响。通常可以通过对器件进行下电重启,或者通过清除器件中的进程来对器件进行复位操作。其中,通过对器件进行下电重启的复位操作可以被称为硬复位操作。通过清除器件中的进程来对器件进行复位操作可以被称为软复位操作。主器件接收到从器件发送的预警信息时,主器件可以进行下电重启,完成对主器件的复位操作。也可以通过清除相关的进程完成对主器件的复位操作。
本申请的实施例中提供的复位方法,应用在电子设备中的主器件,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,从器件向主器件发送预警信息,主器件接收到该预警信息时,对主器件进行复位操作,其中,预警信息用于指示主器件处于异常状态,这样使得在芯片尺寸越来越小的趋势中,主器件受到电子设备中电磁干扰信号的影响处于异常状态的情况下,可以通过对主器件的复位操作解决主器件的挂死问题,与传统方法仅能解决从器件的挂死问题相比,本申请实施例提供的复位方法,能够在电子设备中电子器件数量增多,或者电子器件的尺寸减小的情况下,解决主器件的挂死问题,进而能够有效地恢复电子器件之间的数据交互。
在一些可能的情况下,从器件向主器件发送预警信息之前,可以先检测主器件是否处于异常状态,并在主器件处于异常状态时,向主器件发送预警信息。下面通过图9所示实施例来详细描述。
图10为本申请实施例提供的另一种复位方法的流程示意图,该方法应用在电子设备中,电子设备包括主器件和从器件,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,该方法包括:
S201、从器件向主器件发送第一信号,其中,第一信号用于请求与主器件之间进行数据交互。
其中,当从器件需要与主器件之间进行数据交互时,会向主器件发送中断(interrupt, INT)信号(相当于第一信号)。主器件在接收到中断信号时,主器件确定该从器件可以进行数据交互。这时,主器件会将从器件对应的片选信号线的电平设置为第一电平,并向从器件发送时钟信号。
S202、从器件检测是否接收到主器件发送的时钟信号;若未检测到主器件发送的时钟信号,则执行S203。
其中,从器件在检测到片选信号线上的电平为第一电平时,若检测到主器件发送的时钟信号,则可以基于该时钟信号与主器件进行同步,并在同步之后,与主器件之间进行数据交互;若未检测到主器件发送的时钟信号,则确定主器件处于异常状态。
S203、从器件向主器件发送预警信息。
其中,预警信息是从器件在片选CS信号为第一电平且未接收到主器件发送时钟信号时发送的。
本申请的实施例中提供的复位方法,从器件向主器件发送第一信号,其中,第一信号用于请求与主器件之间进行数据交互,然后从器件检测是否接收到主器件发送的时钟信号;若未检测到主器件发送的时钟信号,向主器件发送预警信息。这样相当于预警信息是在从器件已经向主器件请求进行数据交互的基础上未检测到的时钟信号时发送的,使得预警信息指示主器件处于异常状态的准确性更高,进而提高了主器件基于预警信息进行复位操作的准确性,更加有效地解决电子设备中器件挂死的问题。
S204、主器件在接收到预警信息时,基于预警信息进行复位操作。
S205、主器件向从器件发送复位指令,复位指令用于指示从器件进行复位操作。
其中,复位操作是指对电子器件进行相关的操作,去除掉器件中运行错误的进程对器件工作的影响。复位操作通常可以通过对器件进行下电重启,或者通过清除器件中的进程来对器件进行复位操作。其中,通过对器件进行下电重启的复位操作可以被称为硬复位操作。通过清除器件中的进程来对器件进行复位操作可以被称为软复位操作。
可选地,复位指令包括第一复位指令和第二复位指令,第一复位指令包括通过触发从器件的复位键进行器件复位。
应理解,通过触发从器件的复位键进行器件复位是指对从器件进行下电重启的复位操作,也即是说,第一复位指令可以是通过硬复位操作进行的复位指令。
可选地,第二复位指令包括通过SPI接口对从器件进行器件复位。
应理解,通过SPI接口对从器件进行器件复位通常是指通过SPI接口清除从器件中的进程进行的复位操作,也即是说,第二复位指令可以是指通过软复位操作进行的复位指令。
S206、从器件基于复位指令进行复位操作。
本申请的实施例中提供的复位方法,主器件接收到从器件发送预警信息时,对主器件进行复位操作,然后主器件向从器件发送复位指令,指示从器件进行复位操作,也即是说,在本申请的实施例中,当主器件接收到从器件发送的预警信息时,对主器件自身进行复位操作之后,主器件还会向从器件发送复位指令,以使从器件基于该复位指令进行复位操作,避免了主器件和从器件同时出现异常的情况下,仅对主器件进行复位操作不能解决电子设备中器件挂死的问题,进而进一步地提高了解决电子设备 中器件挂死问题的可靠性。
在一种可能的情况下,从器件还可以在检测到CS信号为第一电平时继续检测主器件和从器件之间是否进行数据交互确定主器件是否处于异常状态。下面通过图11所示实施例来详细描述。
图11为本申请另一个实施例中提供的复位方法的流程示意图,该方法应用在电子设备中,电子设备包括主器件和从器件,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,如图11所示,该方法包括:
S301、从器件检测到片选CS信号为第一电平时,检测到主器件和从器件之间的MOSI和MISO上是否有数据传输。若否,则执行S302。
应理解,当CS信号为第一电平时,主器件和从器件之间进行数据交互,此时,若从器件检测到MOSI和MISO上均没有数据传输,则说明主器件和从器件之间没有数据交互,相当于在MOSI和/或MISO上信号异常。这种异常情况通过是主器件受到电磁干扰信号的干扰形成的。从器件基于此确定主器件处于异常状态。
S302、从器件向主器件发送预警信息。
S303、主器件在接收到预警信息时,基于预警信息进行复位操作。
S304、主器件向从器件发送复位指令,复位指令用于指示从器件进行复位操作。
S305、从器件基于复位指令进行复位操作。
在一种可能的情况下,从器件还可以检测CS信号转换为第一电平时所用的时长的来确定主器件是否处于异常状态。下面通过图12所示实施例来详细说明。
图12为本申请另一个实施例中提供的复位方法的流程示意图,该方法应用在电子设备中,电子设备包括主器件和从器件,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,如图12所示,该方法包括:
S401、从器件检测到片选CS信号转换为第一电平所用的时长是否小于预设时长阈值,若是,则执行S402。
以第一电平为低电平为例进行说明。
应理解,主器件正常工作时,当主器件与从器件之间需要进行数据交互,则主器件将CS信号下拉到第一电平。CS信号的电平转换为第一电平时所占用的时间,也即是该信号的下降沿的时长通常为预设时长。在主器件收到电磁干扰信号的干扰出现异常时,该信号的下降沿的时长通常较短,因此,在CS信号的下降沿的时长小于预设时长阈值时,从器件确定主器件处于异常状态。
S402、从器件向主器件发送预警信息。
S403、主器件在接收到预警信息时,基于预警信息进行复位操作。
S404、主器件向从器件发送复位指令,复位指令用于指示从器件进行复位操作。
S405、从器件基于复位指令进行复位操作。
在一种可能的情况下,还可以通过增加一个主器件检测模块来确定主器件的问题。示例性的,如图13所示,主器件检测模块可以包括CS检测子模块、CLK检测子模块、MOSI检测子模块和MISO检测子模块。其中,CS检测子模块与CS信号线连接,用于检测CS信号;CLK检测子模块与CLK信号线连接,用于检测CLK信号;MOSI检测子模块与MOSI信号线连接,用于检测MOSI信号;MISO检测子模块与MISO 信号线连接,用于检测MISO信号。
示例性的,当主器件检测模块检测到CS信号的电平被拉低(设置为低电平),但是CLK信号线上没有时钟信号的情况下,则说明主器件可能出现挂死,因此可以向主器件发送预警信息,以使主器件基于该预警信息对主器件进行复位。
应理解,主器件检测模块可以集成在主器件中,也可以是设置在主器件之外的电路模块,本申请实施例对此不作限制。
在一种可能的情况下,由于一些从器件的处理能力较弱,因此,从器件不具备检测时钟信号的功能,在这种情况下,主器件可以直接对主器件进行复位操作,无需在接收到从器件发送的预警信息时再对主器件进行复位操作。下面通过图14所示的实施例来详细说明。
图14为本申请另一个实施例提供的复位方法的流程示意图,该方法应用在电子设备中,电子设备包括主器件和从器件,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,该方法包括:
S501、主器件检测到数据线上的信号异常时,对主器件进行复位操作。
应理解,数据线可以包括图1中所示的CS信号线、CLK信号线、MOSI信号线和MISO信号线。主器件检测到任一路信号线上出现异常时,则对主器件进行复位操作。
应理解,任一数据线上出现的信号异常,可以是主器件处于异常状态导致的,也可以是从器件处于异常状态导致的。这样相当于只要主器件和从器件之间的数据交互存在异常,主器件均对主器件自身进行复位操作。也即是说,无需从器件去检测主器件是否处于异常状态。
S502、主器件向从器件发送复位指令。
S503、从器件基于复位指令进行复位操作。
本申请的实施例中提供的复位方法,应用在电子设备中,电子设备包括主器件和从器件,主器件用于向从器件发送时钟信号,主器件与从器件之间基于时钟信号进行数据交互,该方法包括:主器件检测到数据线上的信号异常时,对主器件进行复位操作,然后主器件向从器件发送复位指令,从器件基于复位指令进行复位操作。通过本申请实施例提供的复位方法,无需从器件去检测主器件是否处于异常状态,使得在从器件的处理能力较弱导致的从器件无法检测主器件是否处于异常状态的情况下,能够通过主器件主动对自身进行复位操作,解决主器件的器件挂死的问题,进而能够有效地恢复电子器件之间的数据交互。
应该理解的是,虽然上述实施例中的流程图中的各个步骤按照箭头的指示依次显示,但是这些步骤并不是必然按照箭头指示的顺序依次执行。除非本文中有明确的说明,这些步骤的执行并没有严格的顺序限制,这些步骤可以以其它的顺序执行。而且,流程图中的至少一部分步骤可以包括多个子步骤或者多个阶段,这些子步骤或者阶段并不必然是在同一时刻执行完成,而是可以在不同的时刻执行,这些子步骤或者阶段的执行顺序也不必然是依次进行,而是可以与其它步骤或者其它步骤的子步骤或者阶段的至少一部分轮流或者交替地执行。
图15为本申请实施例提供的主器件500的一种结构示意图。
应理解,主器件500可以执行图8至图14所示的复位方法;主器件500包括:获取单元510和处理单元520。
其中,处理单元520用于接收从器件发送的预警信息,预警信息用于指示主器件处于异常状态;
处理单元520用于根据预警信息进行复位操作。
在一个实施例中,主器件处于异常状态包括:在片选CS信号为第一电平且未向从器件发送时钟信号的状态。
在一个实施例中,处理单元520还用于向从器件发送复位指令,复位指令用于指示从器件进行复位操作。
在一个实施例中,复位指令包括第一复位指令或者第二复位指令,第一复位指令用于指示通过触发从器件的复位键进行器件复位,第二复位指令用于指示通过串行外设接口SPI接口对从器件进行器件复位。
本实施例提供的主器件,用于执行上述实施例的复位方法,技术原理和技术效果相似,此处不再赘述。
需要说明的是,上述主器件500以功能单元的形式体现。这里的术语“单元”可以通过软件和/或硬件形式实现,对此不作具体限定。
例如,“单元”可以是实现上述功能的软件程序、硬件电路或二者结合。硬件电路可能包括应用特有集成电路(application specific integrated circuit,ASIC)、电子电路、用于执行一个或多个软件或固件程序的处理器(例如共享处理器、专有处理器或组处理器等)和存储器、合并逻辑电路和/或其它支持所描述的功能的合适组件。
因此,在本申请的实施例中描述的各示例的单元,能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
图16为本申请实施例提供的从器件600的一种结构示意图。
应理解,从器件600可以执行图8至图14所示的复位方法;从器件600包括:获取单元610和处理单元620。
其中,处理单元620用于检测到主器件处于异常状态;
处理单元620用于向主器件发送预警信息,预警信息用于指示主器件处于异常状态。
在一个实施例中,处理单元620用于向主器件发送第一信号,第一信号用于请求与主器件之间进行数据交互;检测是否接收到主器件发送的时钟信号;若未检测到主器件发送的时钟信号,则确定主器件处于异常状态。
在一个实施例中,主器件处于异常状态包括:在片选CS信号为第一电平且未向从器件发送时钟信号的状态。
本实施例提供的从器件,用于执行上述实施例的复位方法,技术原理和技术效果相似,此处不再赘述。
需要说明的是,上述从器件600以功能单元的形式体现。这里的术语“单元”可以通过软件和/或硬件形式实现,对此不作具体限定。
例如,“单元”可以是实现上述功能的软件程序、硬件电路或二者结合。硬件电路可能包括应用特有集成电路(application specific integrated circuit,ASIC)、电子电路、用于执行一个或多个软件或固件程序的处理器(例如共享处理器、专有处理器或组处理器等)和存储器、合并逻辑电路和/或其它支持所描述的功能的合适组件。
因此,在本申请的实施例中描述的各示例的单元,能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
图17示出了本申请提供的一种电子设备的结构示意图。图17中的虚线表示该单元或该模块为可选的。电子设备700可用于实现上述方法实施例中描述的复位方法。
电子设备700包括一个或多个处理器701,该一个或多个处理器701可支持电子设备700实现方法实施例中的复位方法。处理器701可以是通用处理器或者专用处理器。例如,处理器701可以是中央处理器(central processing unit,CPU)、数字信号处理器(digital signal processor,DSP)、专用集成电路(application specific integrated circuit,ASIC)、现场可编程门阵列(field programmable gate array,FPGA)或者其它可编程逻辑器件,如分立门、晶体管逻辑器件或分立硬件组件。
处理器701可以用于对电子设备700进行控制,执行软件程序,处理软件程序的数据。电子设备700还可以包括通信单元705,用以实现信号的输入(接收)和输出(发送)。
例如,电子设备700可以是芯片,通信单元705可以是该芯片的输入和/或输出电路,或者,通信单元705可以是该芯片的通信接口,该芯片可以作为终端设备或其它电子设备的组成部分。
又例如,电子设备700可以是终端设备,通信单元705可以是该终端设备的收发器,或者,通信单元705可以是该终端设备的收发电路。
电子设备700中可以包括一个或多个存储器702,其上存有程序704,程序704可被处理器701运行,生成指令703,使得处理器701根据指令703执行上述方法实施例中描述的阻抗匹配方法。
可选地,存储器702中还可以存储有数据。可选地,处理器701还可以读取存储器702中存储的数据,该数据可以与程序704存储在相同的存储地址,该数据也可以与程序704存储在不同的存储地址。
处理器701和存储器702可以单独设置,也可以集成在一起;例如,集成在终端设备的系统级芯片(system on chip,SOC)上。
示例性地,存储器702可以用于存储本申请实施例中提供的复位方法的相关程序704,处理器701可以用于在进行复位时调用存储器702中存储的复位方法的相关程序704,执行本申请实施例的复位方法;包括:接收所述从器件发送的预警信息,所述预警信息用于指示所述主器件处于异常状态;根据所述预警信息进行复位操作。
示例性地,存储器702可以用于存储本申请实施例中提供的复位方法的相关程序704,处理器701可以用于在进行复位时调用存储器702中存储的复位方法的相关程序704,执行本申请实施例的复位方法;包括:检测到所述主器件处于异常状态;向所述 主器件发送预警信息,所述预警信息用于指示所述主器件处于异常状态。
本申请还提供了一种计算机程序产品,该计算机程序产品被处理器701执行时实现本申请中任一方法实施例的复位方法。
该计算机程序产品可以存储在存储器702中,例如是程序704,程序704经过预处理、编译、汇编和链接等处理过程最终被转换为能够被处理器701执行的可执行目标文件。
本申请还提供了一种计算机可读存储介质,其上存储有计算机程序,该计算机程序被计算机执行时实现本申请中任一方法实施例的复位方法。该计算机程序可以是高级语言程序,也可以是可执行目标程序。
该计算机可读存储介质例如是存储器702。存储器702可以是易失性存储器或非易失性存储器,或者,存储器702可以同时包括易失性存储器和非易失性存储器。其中,非易失性存储器可以是只读存储器(read-only memory,ROM)、可编程只读存储器(programmable ROM,PROM)、可擦除可编程只读存储器(erasable PROM,EPROM)、电可擦除可编程只读存储器(electrically EPROM,EEPROM)或闪存。易失性存储器可以是随机存取存储器(random access memory,RAM),其用作外部高速缓存。通过示例性但不是限制性说明,许多形式的RAM可用,例如静态随机存取存储器(static RAM,SRAM)、动态随机存取存储器(dynamic RAM,DRAM)、同步动态随机存取存储器(synchronous DRAM,SDRAM)、双倍数据速率同步动态随机存取存储器(double data rate SDRAM,DDR SDRAM)、增强型同步动态随机存取存储器(enhanced SDRAM,ESDRAM)、同步连接动态随机存取存储器(synchlink DRAM,SLDRAM)和直接内存总线随机存取存储器(direct rambus RAM,DR RAM)。
本申请中,“至少一个”是指一个或者多个,“多个”是指两个或两个以上。“以下至少一项(个)”或其类似表达,是指的这些项中的任意组合,包括单项(个)或复数项(个)的任意组合。例如,a,b,或c中的至少一项(个),可以表示:a,b,c,a-b,a-c,b-c,或a-b-c,其中a,b,c可以是单个,也可以是多个。
应理解,在本申请的各种实施例中,上述各过程的序号的大小并不意味着执行顺序的先后,各过程的执行顺序应以其功能和内在逻辑确定,而不应对本申请实施例的实施过程构成任何限定。
本领域普通技术人员可以意识到,结合本文中所公开的实施例描述的各示例的单元及算法步骤,能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到,为描述的方便和简洁,上述描述的系统、装置和单元的具体工作过程,可以参考前述方法实施例中的对应过程,在此不再赘述。
在本申请所提供的几个实施例中,应该理解到所揭露的装置和方法,可以通过其它的方式实现。例如,以上所描述的装置实施例仅仅是示意性的;例如,单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式;例如,多个单元或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点, 所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口,装置或单元的间接耦合或通信连接,可以是电性,机械或其它的形式。
作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外,在本申请各个实施例中的各功能单元可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。
以上,仅为本申请的具体实施方式,但本申请的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本申请的保护范围之内。因此,本申请的保护范围应以权利要求的保护范围为准。

Claims (16)

  1. 一种复位方法,其特征在于,所述方法应用于电子设备中的主器件中,所述主器件用于向从器件发送时钟信号,所述主器件与所述从器件之间基于所述时钟信号进行数据交互,所述电子设备包括所述主器件和所述从器件,所述方法包括:
    接收所述从器件发送的预警信息,所述预警信息用于指示所述主器件处于异常状态;
    根据所述预警信息进行复位操作。
  2. 根据权利要求1所述的方法,其特征在于,所述主器件处于异常状态包括:在片选CS信号为第一电平且未向所述从器件发送所述时钟信号的状态。
  3. 根据权利要求1所述的方法,其特征在于,所述主器件处于异常状态包括:在片选CS信号为第一电平时,所述主器件和所述从器件之间未进行数据交互。
  4. 根据权利要求1所述的方法,其特征在于,所述主器件处于异常状态包括:片选CS信号转换到第一电平所用时长小于预设时长阈值。
  5. 根据权利要求1至4任一项所述的方法,其特征在于,所述方法还包括:
    向所述从器件发送复位指令,所述复位指令用于指示所述从器件进行复位操作。
  6. 根据权利要求5所述的方法,其特征在于,所述复位指令包括第一复位指令或者第二复位指令,所述第一复位指令用于指示通过触发所述从器件的复位键进行器件复位,所述第二复位指令用于指示通过串行外设接口SPI接口对所述从器件进行器件复位。
  7. 一种复位方法,其特征在于,所述方法应用于电子设备中的从器件中,所述电子设备包括主器件和所述从器件,所述主器件用于向从器件发送时钟信号,所述主器件与所述从器件之间基于所述时钟信号进行数据交互,所述方法包括:
    检测到所述主器件处于异常状态;
    向所述主器件发送预警信息,所述预警信息用于指示所述主器件处于异常状态。
  8. 根据权利要求7所述的方法,其特征在于,所述检测到所述主器件处于异常状态,包括:
    向所述主器件发送第一信号,所述第一信号用于请求与所述主器件之间进行数据交互;
    检测是否接收到所述主器件发送的所述时钟信号;
    若未检测到所述主器件发送的所述时钟信号,则确定所述主器件处于所述异常状态。
  9. 根据权利要求7所述的方法,其特征在于,所述检测到所述主器件处于异常状态,包括:
    检测到片选CS信号为第一电平时,未检测到所述主器件和所述从器件之间的主发从收信号线MOSI和主收从发信号线MISO上的数据传输,则确定所述主器件处于异常状态。
  10. 根据权利要求7所述的方法,其特征在于,所述检测到所述主器件处于异常状态,包括:
    检测到片选CS信号转换为第一电平所用的时长小于预设时长阈值,则确定所述主器件处于异常状态。
  11. 一种电子器件,其特征在于,所述电子器件包括处理器和存储器,所述存储器用于存储计算机程序,所述处理器用于从所述存储器中调用并运行所述计算机程序,使得所述电子器件执行权利要求1至6中任一项所述的方法。
  12. 一种电子器件,其特征在于,所述电子器件包括处理器和存储器,所述存储器用于存储计算机程序,所述处理器用于从所述存储器中调用并运行计算机程序,使得所述电子器件执行权利要求7至10中任一项所述的方法。
  13. 一种电子设备,其特征在于,所述电子设备包括主器件和从器件,所述主器件用于执行如权利要求1至6中任一项所述的方法,所述从器件用于执行如权利要求7至10中任一项所述的方法。
  14. 根据权利要求13所述的电子设备,其特征在于,所述电子设备包括手机或平板电脑,所述主器件包括系统级芯片SOC,所述从器件包括指纹传感器。
  15. 根据权利要求13所述的电子设备,其特征在于,所述电子设备包括智能穿戴设备,所述主器件包括微控制单元MCU,所述从器件包括心率传感器。
  16. 一种计算机可读存储介质,其特征在于,所述计算机可读存储介质存储了计算机程序,当所述计算机程序被处理器执行时,使得所述处理器执行权利要求1至6中任一项所述的方法,或者,使得所述处理器执行权利要求7至10中任一项所述的方法。
PCT/CN2023/113744 2022-10-21 2023-08-18 复位方法和电子设备 WO2024082801A1 (zh)

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