WO2024070268A1 - プラズマ処理装置及びエッチング方法 - Google Patents

プラズマ処理装置及びエッチング方法 Download PDF

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Publication number
WO2024070268A1
WO2024070268A1 PCT/JP2023/029158 JP2023029158W WO2024070268A1 WO 2024070268 A1 WO2024070268 A1 WO 2024070268A1 JP 2023029158 W JP2023029158 W JP 2023029158W WO 2024070268 A1 WO2024070268 A1 WO 2024070268A1
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Prior art keywords
voltage
plasma processing
edge ring
power supply
power
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Ceased
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PCT/JP2023/029158
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English (en)
French (fr)
Japanese (ja)
Inventor
夏実 鳥井
航 ▲高▼山
貴幸 鈴木
寛基 加藤
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Priority to KR1020257012598A priority Critical patent/KR20250078478A/ko
Priority to CN202380067291.3A priority patent/CN119948606A/zh
Priority to JP2024549836A priority patent/JPWO2024070268A1/ja
Publication of WO2024070268A1 publication Critical patent/WO2024070268A1/ja
Priority to US19/093,642 priority patent/US20250226183A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32174Circuits specially adapted for controlling the RF discharge
    • H01J37/32183Matching circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32091Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32174Circuits specially adapted for controlling the RF discharge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32422Arrangement for selecting ions or species in the plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32623Mechanical discharge control means
    • H01J37/32642Focus rings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05HPLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00Generating plasma; Handling plasma
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05HPLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00Generating plasma; Handling plasma
    • H05H1/24Generating plasma
    • H05H1/46Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04Apparatus for manufacture or treatment
    • H10P72/0402Apparatus for fluid treatment
    • H10P72/0418Apparatus for fluid treatment for etching
    • H10P72/0421Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0604Process monitoring, e.g. flow or thickness monitoring
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/76Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
    • H10P72/7604Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
    • H10P72/7611Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/245Detection characterised by the variable being measured
    • H01J2237/24564Measurements of electric or magnetic variables, e.g. voltage, current, frequency
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32Processing objects by plasma generation
    • H01J2237/33Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334Etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials

Definitions

  • This disclosure relates to a plasma processing apparatus and an etching method.
  • Patent Document 1 discloses a plasma processing apparatus that performs plasma processing on a wafer, and that includes a stage disposed within a chamber on which the wafer is placed, and an edge ring disposed on the stage so as to surround the wafer.
  • a negative DC voltage is applied to the edge ring that has been worn down by the plasma, thereby eliminating distortion of the sheath and allowing ions to be incident perpendicularly on the entire surface of the wafer.
  • the technology disclosed herein appropriately controls the voltage of the bias power during plasma processing.
  • a plasma processing apparatus includes a plasma processing chamber, a substrate support disposed within the plasma processing chamber, the substrate support including a lower electrode, an electrostatic chuck, and an edge ring disposed to surround the substrate placed on the electrostatic chuck, an upper electrode disposed above the substrate support, a source RF power supply configured to supply source RF power to the upper electrode or the lower electrode to generate plasma from a gas in the plasma processing chamber, a bias power supply configured to supply bias power to the lower electrode, a DC power supply configured to apply a negative DC voltage to the edge ring, an RF filter electrically connected between the edge ring and the DC power supply and including at least one variable passive component, and a control unit configured to control the DC power supply and the variable passive component to control the angle of incidence of ions in the plasma with respect to the edge region of the substrate placed on the electrostatic chuck and to control the voltage of the bias power within an allowable range.
  • FIG. 1 is a vertical cross-sectional view showing an outline of the configuration of an etching apparatus according to an embodiment of the present invention.
  • FIG. 2 is an explanatory diagram of a power supply system of the etching apparatus according to the present embodiment.
  • 1A and 1B are explanatory diagrams showing a change in the shape of a sheath and the occurrence of a tilt in the direction of ion incidence due to wear of an edge ring.
  • 1A and 1B are explanatory diagrams showing a change in the shape of a sheath and the occurrence of a tilt in the direction of ion incidence due to wear of an edge ring.
  • 1A and 1B are explanatory diagrams showing a change in the shape of a sheath and the occurrence of a tilt in the direction of ion incidence.
  • 1A and 1B are explanatory diagrams showing a change in the shape of a sheath and the occurrence of a tilt in the direction of ion incidence.
  • 10 is an explanatory diagram showing the relationship between the DC voltage from the DC power supply or the impedance of the second RF filter and the tilt correction angle.
  • FIG. An explanatory diagram showing the relationship between the DC voltage from the DC power supply or the impedance of the second RF filter and LF Vpp.
  • FIG. 10 is an explanatory diagram showing an example of a method for adjusting a DC voltage from a DC power supply and an impedance of a second RF filter.
  • FIG. 10 is an explanatory diagram showing an example of a method for adjusting a DC voltage from a DC power supply and an impedance of a second RF filter.
  • FIG. 10 is an explanatory diagram showing an example of a method for adjusting a DC voltage from a DC power supply and an impedance of a second RF filter.
  • FIG. 11 is a vertical cross-sectional view showing the configuration of a connection portion according to another embodiment.
  • FIG. 11 is an explanatory diagram of a power supply system of an etching apparatus according to another embodiment.
  • FIG. 11 is a vertical cross-sectional view showing the configuration of a connection portion according to another embodiment.
  • plasma processing such as etching is performed on semiconductor wafers (hereafter referred to as "wafers").
  • wafers semiconductor wafers
  • plasma processing plasma is generated by exciting a processing gas, and the wafer is processed by the plasma.
  • the plasma processing is performed in a plasma processing apparatus.
  • the plasma processing apparatus generally includes a chamber, a stage, and a radio frequency (RF) power source.
  • the RF power source includes a source RF power source and a bias RF power source.
  • the source RF power source provides source RF power to generate plasma of the gas in the chamber.
  • the bias RF power source provides bias RF power to attract ions to the wafer.
  • the stage is provided in the chamber.
  • the stage has a lower electrode and an electrostatic chuck.
  • an edge ring is disposed on the electrostatic chuck so as to surround the wafer placed on the electrostatic chuck. The edge ring is provided to improve the uniformity of the plasma processing on the wafer.
  • the edge ring wears and the thickness of the edge ring decreases.
  • the shape of the sheath above the edge ring and the edge region of the wafer changes.
  • the direction of incidence of ions at the edge region of the wafer becomes inclined relative to the vertical direction.
  • the recess formed in the edge region of the wafer becomes inclined relative to the thickness direction of the wafer.
  • Patent Document 1 proposes a plasma processing apparatus that is configured to apply a negative DC voltage to the edge ring from a DC power supply.
  • the inventors found that, for example, if the DC voltage is increased to adjust the inclination of the ion incidence direction, the bias RF power voltage Vpp increases.
  • the conventional method of adjusting the voltage Vpp involves adjusting the RF power, such adjustment of the RF power can affect the heat input to the wafer and the process performance.
  • the technology disclosed herein appropriately controls the voltage of the bias power during plasma processing.
  • Fig. 1 is a vertical cross-sectional view showing an outline of the configuration of the etching apparatus 1.
  • Fig. 2 is an explanatory diagram of a power supply system of the etching apparatus 1.
  • the etching apparatus 1 is a capacitively coupled etching apparatus. In the etching apparatus 1, etching is performed on a wafer W as a substrate.
  • the etching apparatus 1 has a plasma processing chamber 10 having a substantially cylindrical shape.
  • the plasma processing chamber 10 defines a processing space S in which plasma is generated.
  • the plasma processing chamber 10 is made of, for example, aluminum.
  • the plasma processing chamber 10 is connected to a ground potential.
  • the plasma processing chamber 10 contains a stage 11 as a substrate support on which the wafer W is placed.
  • the stage 11 has a lower electrode 12, an electrostatic chuck 13, and an edge ring 14.
  • An electrode plate (not shown) made of, for example, aluminum may be provided on the lower surface side of the lower electrode 12.
  • the lower electrode 12 is made of a conductive material, for example a metal such as aluminum, and has an approximately circular plate shape.
  • the stage 11 may also include a temperature control module configured to adjust at least one of the electrostatic chuck 13, the edge ring 14, and the wafer W to a desired temperature.
  • the temperature control module may include a heater, a flow path, or a combination of these.
  • a temperature control medium such as a refrigerant or a heat transfer gas flows through the flow path.
  • a flow path 15a is formed inside the lower electrode 12.
  • a temperature control medium is supplied to the flow path 15a from a chiller unit (not shown) provided outside the plasma processing chamber 10 via an inlet pipe 15b.
  • the temperature control medium supplied to the flow path 15a returns to the chiller unit via an outlet flow path 15c.
  • a temperature control medium for example a refrigerant such as cooling water
  • the electrostatic chuck 13 is provided on the lower electrode 12.
  • the electrostatic chuck 13 is a member configured to be able to attract and hold both the wafer W and the edge ring 14 by electrostatic force.
  • the electrostatic chuck 13 has a central upper surface that is higher than the upper surface of the peripheral portion.
  • the central upper surface of the electrostatic chuck 13 serves as a wafer support surface on which the wafer W is placed, and in one example, the peripheral upper surface of the electrostatic chuck 13 serves as an edge ring support surface on which the edge ring 14 is placed.
  • a first electrode 16a for attracting and holding the wafer W is provided in the center of the electrostatic chuck 13.
  • a second electrode 16b for attracting and holding the edge ring 14 is provided in the peripheral portion of the electrostatic chuck 13.
  • the electrostatic chuck 13 has a configuration in which the electrodes 16a and 16b are sandwiched between insulating materials made of an insulating material.
  • a DC voltage is applied to the first electrode 16a from a DC power supply (not shown).
  • the resulting electrostatic force attracts and holds the wafer W to the upper surface of the central portion of the electrostatic chuck 13.
  • a DC voltage is applied to the second electrode 16b from a DC power supply (not shown).
  • the resulting electrostatic force attracts and holds the edge ring 14 to the upper surface of the peripheral portion of the electrostatic chuck 13.
  • the central portion of the electrostatic chuck 13 where the first electrode 16a is provided and the peripheral portion where the second electrode 16b is provided are integrated, but these central portion and peripheral portion may be separate.
  • both the first electrode 16a and the second electrode 16b may be unipolar or bipolar.
  • the edge ring 14 is electrostatically attracted to the electrostatic chuck 13 by applying a DC voltage to the second electrode 16b, but the method of holding the edge ring 14 is not limited to this.
  • the edge ring 14 may be attracted and held using an adsorption sheet, or the edge ring 14 may be clamped and held.
  • the edge ring 14 may be held by its own weight.
  • the edge ring 14 is an annular member that is arranged to surround the wafer W placed on the upper surface of the central portion of the electrostatic chuck 13.
  • the edge ring 14 is provided to improve the uniformity of the etching. For this reason, the edge ring 14 is made of a material that is appropriately selected depending on the etching, and may be made of, for example, Si or SiC.
  • the stage 11 configured as described above is fastened to a roughly cylindrical support member 17 provided at the bottom of the plasma processing chamber 10.
  • the support member 17 is made of an insulating material such as ceramic or quartz.
  • a shower head 20 is provided above the stage 11 so as to face the stage 11.
  • the shower head 20 has an electrode plate 21 arranged facing the processing space S, and an electrode support 22 provided above the electrode plate 21.
  • the electrode plate 21 functions as a pair of upper electrodes together with the lower electrode 12.
  • the shower head 20 is connected to a ground potential.
  • the shower head 20 is supported on the upper part (ceiling surface) of the plasma processing chamber 10 via an insulating shielding member 23.
  • the electrode plate 21 is formed with a plurality of gas outlets 21a for supplying the processing gas sent from the gas diffusion chamber 22a described below to the processing space S.
  • the electrode plate 21 is made of, for example, a conductor or semiconductor having a low electrical resistivity that generates little Joule heat.
  • the electrode support 22 supports the electrode plate 21 in a removable manner.
  • the electrode support 22 has a configuration in which a plasma-resistant film is formed on the surface of a conductive material such as aluminum. This film can be a film formed by anodizing, or a ceramic film such as yttrium oxide.
  • a gas diffusion chamber 22a is formed inside the electrode support 22.
  • a plurality of gas circulation holes 22b that communicate with the gas outlet 21a are formed from the gas diffusion chamber 22a.
  • a gas introduction hole 22c that is connected to a gas supply pipe 33 described later is formed in the gas diffusion chamber 22a.
  • a gas supply source group 30 that supplies processing gas to the gas diffusion chamber 22a is connected to the electrode support 22 via a flow control device group 31, a valve group 32, a gas supply pipe 33, and a gas introduction hole 22c.
  • the gas supply source group 30 has multiple types of gas supply sources required for etching.
  • the flow control device group 31 includes multiple flow controllers, and the valve group 32 includes multiple valves. Each of the multiple flow controllers in the flow control device group 31 is a mass flow controller or a pressure-controlled flow controller.
  • processing gas from one or more gas supply sources selected from the gas supply source group 30 is supplied to the gas diffusion chamber 22a via the flow control device group 31, the valve group 32, the gas supply pipe 33, and the gas introduction hole 22c.
  • the processing gas supplied to the gas diffusion chamber 22a is then dispersed in a shower-like manner and supplied into the processing space S via the gas circulation hole 22b and the gas outlet 21a.
  • a baffle plate 40 is provided at the bottom of the plasma processing chamber 10, between the inner wall of the plasma processing chamber 10 and the support member 17.
  • the baffle plate 40 is made, for example, of an aluminum material coated with a ceramic such as yttrium oxide.
  • a plurality of through holes are formed in the baffle plate 40.
  • the processing space S is connected to an exhaust port 41 via the baffle plate 40.
  • An exhaust device 42 such as a vacuum pump, is connected to the exhaust port 41, and the processing space S can be depressurized by the exhaust device 42.
  • a loading/unloading port 43 for the wafer W is formed on the side wall of the plasma processing chamber 10, and the loading/unloading port 43 can be opened and closed by a gate valve 44.
  • the etching apparatus 1 further includes a source RF power supply 50, a bias RF power supply 51, and a matcher 52.
  • the source RF power supply 50 and the bias RF power supply 51 are coupled to the lower electrode 12 via the matcher 52.
  • the source RF power supply 50 generates a source RF power HF for plasma generation and supplies the source RF power HF to the lower electrode 12.
  • the source RF power HF may have a frequency in the range of 27 MHz to 100 MHz, and is 40 MHz in one example.
  • the source RF power supply 50 is coupled to the lower electrode 12 via a first matching circuit 53 of a matching unit 52.
  • the first matching circuit 53 is a circuit for matching the output impedance of the source RF power supply 50 with the input impedance of the load side (lower electrode 12 side).
  • the source RF power supply 50 does not have to be electrically coupled to the lower electrode 12, and may be coupled to the shower head 20, which is the upper electrode, via the first matching circuit 53.
  • a pulse power supply configured to apply a pulse voltage other than the source RF power HF to the lower electrode 12 may be used.
  • This pulse power supply is similar to the pulse power supply used in place of the bias RF power supply 51 described later.
  • the bias RF power supply 51 generates a bias RF power LF for attracting ions to the wafer W and supplies the bias RF power LF to the lower electrode 12.
  • the bias RF power LF may have a frequency in the range of 400 kHz to 13.56 MHz, and is 400 kHz in one example.
  • the bias RF power supply 51 is coupled to the lower electrode 12 via the second matching circuit 54 of the matching device 52.
  • the second matching circuit 54 is a circuit for matching the output impedance of the bias RF power supply 51 with the input impedance of the load side (lower electrode 12 side). Note that instead of the bias RF power supply 51, a pulsed power supply configured to apply a pulsed voltage other than the bias RF power LF to the lower electrode 12 may be used.
  • the pulsed voltage is a pulsed voltage whose magnitude changes periodically.
  • the pulsed power supply may be a DC power supply.
  • the pulsed power supply may be configured so that the power supply itself applies a pulsed voltage, or may be configured to include a device for pulsing the voltage downstream.
  • the pulse voltage is applied to the lower electrode 12 so as to generate a negative potential on the wafer W.
  • the pulse voltage may be a square wave, a triangular wave, an impulse, or may have other waveforms.
  • the frequency of the pulse voltage (pulse frequency) may be within a range of 100 kHz to 2 MHz.
  • the bias RF power LF or the pulse voltage may be supplied or applied to a bias electrode provided inside the electrostatic chuck 13.
  • the etching apparatus 1 further includes a direct current (DC) power supply 60, a switching unit 61, a first RF filter 62, and a second RF filter 63.
  • the DC power supply 60 is electrically connected to the edge ring 14 via the switching unit 61, the second RF filter 63, and the first RF filter 62.
  • the DC power supply 60 is connected to a ground potential.
  • the DC power supply 60 is a power supply that generates a negative DC voltage that is applied to the edge ring 14.
  • the DC power supply 60 is also a variable DC power supply, and the high and low levels of the DC voltage can be adjusted.
  • the switching unit 61 is configured to be able to stop the application of DC voltage from the DC power supply 60 to the edge ring 14.
  • the circuit configuration of the switching unit 61 can be designed as appropriate by a person skilled in the art.
  • the first RF filter 62 and the second RF filter 63 are filters that attenuate RF power.
  • the first RF filter 62 attenuates, for example, the 40 MHz source RF power HF from the source RF power supply 50.
  • the second RF filter 63 attenuates, for example, the 400 kHz bias RF power LF from the bias RF power supply 51.
  • the second RF filter 63 is configured to have a variable impedance. That is, the second RF filter 63 includes at least one variable passive element, and the impedance is variable.
  • the impedance of the second RF filter 63 and the impedance of the variable passive element are synonymous.
  • the second variable passive element may be, for example, either a coil (inductor) or a capacitor.
  • the same function can be achieved with any variable impedance element, such as a diode or other element, not limited to a coil or a capacitor.
  • the number and position of the variable passive elements can also be designed appropriately by a person skilled in the art.
  • the element itself does not need to be variable, and the impedance may be varied by, for example, having multiple elements with fixed impedance values and switching the combination of the fixed-value elements using a switching circuit.
  • the circuit configurations of the second RF filter 63 and the first RF filter 62 can each be designed appropriately by a person skilled in the art.
  • the etching apparatus 1 may further include a measuring device (not shown) that measures the self-bias voltage of the edge ring 14 (or the self-bias voltage of the lower electrode 12 or the wafer W).
  • a measuring device (not shown) that measures the self-bias voltage of the edge ring 14 (or the self-bias voltage of the lower electrode 12 or the wafer W).
  • the configuration of the measuring device can be designed as appropriate by a person skilled in the art.
  • the etching apparatus 1 described above is provided with a control unit 100.
  • the control unit 100 is, for example, a computer equipped with a CPU, memory, etc., and has a program storage unit (not shown).
  • the program storage unit stores a program for controlling etching in the etching apparatus 1.
  • the program may be recorded on a computer-readable storage medium and installed from the storage medium into the control unit 100.
  • the storage medium may be either temporary or non-temporary.
  • the wafer W is loaded into the plasma processing chamber 10 and placed on the electrostatic chuck 13.
  • a DC voltage is then applied to the first electrode 16a of the electrostatic chuck 13, whereby the wafer W is electrostatically attracted to and held on the electrostatic chuck 13 by Coulomb force.
  • the inside of the plasma processing chamber 10 is depressurized to the desired degree of vacuum by the exhaust device 42.
  • processing gas is supplied from the gas supply group 30 to the processing space S via the shower head 20.
  • the source RF power supply 50 supplies source RF power HF for plasma generation to the lower electrode 12 to excite the processing gas and generate plasma.
  • the bias RF power supply 51 may supply bias RF power LF for ion attraction. Then, the wafer W is etched by the action of the generated plasma.
  • etching When etching is to be terminated, first, the supply of source RF power HF from the source RF power supply 50 and the supply of process gas from the gas supply source group 30 are stopped. Also, if bias RF power LF was supplied during etching, the supply of the bias RF power LF is also stopped. Next, the supply of heat transfer gas to the back surface of the wafer W is stopped, and the adsorption and holding of the wafer W by the electrostatic chuck 13 is stopped.
  • the wafer W is removed from the plasma processing chamber 10, and the etching process for the wafer W is completed.
  • plasma may be generated using only the bias RF power LF from the bias RF power supply 51, without using the source RF power HF from the source RF power supply 50.
  • the tilt angle is the inclination (angle) of the recess formed by etching in the edge region of the wafer W with respect to the thickness direction of the wafer W.
  • the tilt angle is approximately the same as the inclination (ion incidence angle) of the incident direction of ions to the edge region of the wafer W with respect to the vertical direction.
  • the direction radially inward (center side) with respect to the thickness direction (vertical direction) of the wafer W is referred to as the inner side
  • the direction radially outward with respect to the thickness direction of the wafer W is referred to as the outer side.
  • Figures 3A and 3B are explanatory diagrams showing the change in the shape of the sheath and the occurrence of a tilt in the direction of ion incidence due to wear of the edge ring.
  • the edge ring 14 shown by a solid line in Figure 3A shows the edge ring 14 in a state where there is no wear.
  • the edge ring 14 shown by a dotted line shows the edge ring 14 where there is wear and a decrease in thickness.
  • the sheath SH shown by a solid line in Figure 3A shows the shape of the sheath SH when the edge ring 14 is in a state where there is no wear.
  • the sheath SH shown by a dotted line shows the shape of the sheath SH when the edge ring 14 is in a worn state.
  • the arrow in Figure 3A shows the direction of ion incidence when the edge ring 14 is in a worn state.
  • the shape of the sheath SH is kept flat above the wafer W and the edge ring 14. Therefore, ions are incident on the entire surface of the wafer W in a direction approximately perpendicular (vertical). Therefore, the tilt angle is 0 (zero) degrees.
  • the edge ring 14 when the edge ring 14 is worn out and its thickness is reduced, the thickness of the sheath SH is reduced in the edge region of the wafer W and above the edge ring 14, and the shape of the sheath SH changes to a downward convex shape.
  • the incident direction of ions to the edge region of the wafer W is tilted with respect to the vertical direction.
  • the phenomenon in which the recess formed by etching is tilted to the inner side is called inner tilt.
  • the incident direction of ions is tilted to the inner side by an angle ⁇ 1, and the recess is also tilted to the inner side by ⁇ 1.
  • the cause of the inner tilt is not limited to the wear of the edge ring 14 described above.
  • the edge ring 14 may be intentionally adjusted to have an inner tilt in its initial state, and the tilt angle may be corrected by adjusting at least one of the DC voltage from the DC power supply 60 and the impedance of the second RF filter 63, which will be described later.
  • the thickness of the sheath SH may be greater in the edge region of the wafer W and above the edge ring 14 than in the central region of the wafer W, and the shape of the sheath SH may become an upward convex shape.
  • the shape of the sheath SH may become an upward convex shape.
  • the arrow indicates the direction of ion incidence.
  • the phenomenon in which the recess formed by etching is inclined toward the outer side when the direction of ion incidence is inclined radially outward from the vertical direction is called outer tilt.
  • the direction of ion incidence is inclined toward the outer side by an angle ⁇ 2, and the recess is also inclined toward the outer side by ⁇ 2.
  • the tilt angle is controlled. Specifically, the tilt angle is controlled by adjusting at least one of the DC voltage from the DC power supply 60 and the impedance of the second RF filter 63 to control the angle of incidence of the ions.
  • the DC voltage applied to the edge ring 14 is set to a negative voltage having an absolute value equal to the sum of the absolute value of the self-bias voltage Vdc and a set value ⁇ V, i.e., ⁇ (
  • the self-bias voltage Vdc is a self-bias voltage of the wafer W, and is a self-bias voltage of the lower electrode 12 when at least one of the RF powers is being supplied and the DC voltage from the DC power supply 60 is not being applied to the lower electrode 12.
  • the set value ⁇ V is provided by the control unit 100.
  • the control unit 100 uses a predetermined function or table to determine the set value ⁇ V from the wear amount of the edge ring 14 (the amount of wear of the edge ring 14 that is reduced from the initial value of the thickness of the edge ring 14) and the wear amount of the edge ring 14 estimated from the etching process conditions (e.g., processing time). That is, the control unit 100 determines the set value ⁇ V by inputting the wear amount of the edge ring 14 and the self-bias voltage into the above function, or by referring to the above table using the wear amount of the edge ring 14 and the self-bias voltage.
  • the control unit 100 may use the difference between the initial thickness of the edge ring 14 and the thickness of the edge ring 14 actually measured using a measuring device such as a laser measuring device or a camera as the wear amount of the edge ring 14.
  • the wear amount of the edge ring 14 may also be estimated from the change in the mass of the edge ring 14 measured using a measuring device such as a mass meter.
  • the control unit 100 may estimate the wear amount of the edge ring 14 from a specific parameter using another predetermined function or table to determine the set value ⁇ V.
  • This specific parameter may be any of the self-bias voltage Vdc, the voltage Vpp of the source RF power HF or the bias RF power LF, the load impedance, the electrical characteristics of the edge ring 14 or the periphery of the edge ring 14, etc.
  • the electrical characteristics of the edge ring 14 or the periphery of the edge ring 14 may be any of the voltage, current value, resistance value including the edge ring 14 at any point on the edge ring 14 or the periphery of the edge ring 14, etc.
  • Another function or table is predefined to define the relationship between a specific parameter and the wear amount of the edge ring 14.
  • the etching apparatus 1 In order to estimate the wear amount of the edge ring 14, before the actual etching is performed or during maintenance of the etching apparatus 1, the etching apparatus 1 is operated under measurement conditions for estimating the wear amount, i.e., the source RF power HF, the bias RF power LF, the pressure in the processing space S, and the flow rate of the processing gas supplied to the processing space S. Then, the specific parameter is obtained, and the wear amount of the edge ring 14 is specified by inputting the specific parameter into the other function or by referring to the table using the specific parameter.
  • the specific parameter is obtained, and the wear amount of the edge ring 14 is specified by inputting the specific parameter into the other function or by referring to the table using the specific parameter.
  • a DC voltage is applied from the DC power supply 60 to the edge ring 14. This controls the shape of the sheath above the edge ring 14 and the edge region of the wafer W, reducing the inclination of the direction of incidence of ions into the edge region of the wafer W and controlling the tilt angle. As a result, a recess that is approximately parallel to the thickness direction of the wafer W is formed over the entire region of the wafer W.
  • the self-bias voltage Vdc is measured by a measuring device (not shown).
  • a DC voltage is applied to the edge ring 14 from the DC power supply 60.
  • the value of the DC voltage applied to the edge ring 14 is -(
  • is the absolute value of the measured value of the self-bias voltage Vdc obtained by the measuring device immediately before, and ⁇ V is a set value determined by the control unit 100.
  • the DC voltage applied to the edge ring 14 is determined from the self-bias voltage Vdc measured during etching. Then, even if a change occurs in the self-bias voltage Vdc, the DC voltage generated by the DC power supply 60 is corrected, and the tilt angle is appropriately corrected.
  • the control unit 100 sets the impedance of the second RF filter 63 based on the amount of wear of the edge ring 14, similar to the setting of the DC voltage from the DC power supply 60 described above. The control unit 100 then changes the impedance of the second RF filter 63 to change the voltage generated in the edge ring 14.
  • the second RF filter 63 is controlled to the impedance set by the control unit 100. This controls the shape of the edge ring 14 and the sheath above the edge region of the wafer W, reducing the inclination of the direction of ion incidence on the edge region of the wafer W and controlling the tilt angle.
  • FIG. 5 is an explanatory diagram showing the relationship between the DC voltage from the DC power supply 60 or the impedance of the second RF filter 63 and the correction angle of the tilt angle (hereinafter referred to as the "tilt correction angle").
  • the vertical axis of FIG. 5 indicates the tilt correction angle
  • the horizontal axis indicates the DC voltage or the impedance.
  • the tilt correction angle is increased by increasing the impedance, but depending on the configuration of the second RF filter 63, it is also possible to reduce the tilt correction angle by increasing the impedance.
  • the relationship between the impedance and the tilt correction angle is not limited because it depends on the design of the second RF filter 63.
  • the resolution of the tilt angle correction by adjusting the DC voltage (the slope in FIG. 5) and the resolution of the tilt angle correction by adjusting the impedance (the slope in FIG. 5) depend on the performance of the DC power supply 60 and the second RF filter 63, respectively.
  • the resolution of tilt angle correction is the amount of tilt angle correction in one adjustment of the DC voltage or impedance.
  • the tilt angle is controlled by any combination of adjusting the DC voltage from the DC power supply 60 and adjusting the impedance of the second RF filter 63 according to the wear of the edge ring 14.
  • the tilt angle may be controlled by adjusting only the DC voltage from the DC power supply 60, or by adjusting only the impedance of the second RF filter 63.
  • the tilt angle may also be controlled by adjusting both the DC voltage from the DC power supply 60 and the impedance of the second RF filter 63.
  • At least one of the DC voltage from the DC power supply 60 and the impedance of the second RF filter 63 is adjusted according to the wear amount of the edge ring 14, but the timing of adjusting the DC voltage or impedance is not limited to this.
  • the DC voltage or impedance may be adjusted according to the processing time of the wafer W.
  • the timing of adjusting the DC voltage or impedance may be determined by combining the processing time of the wafer W with a predetermined parameter such as high-frequency power.
  • FIG. 6 is an explanatory diagram showing the relationship between the DC voltage from the DC power supply 60 or the impedance of the second RF filter 63, and LF Vpp.
  • the vertical axis of FIG. 6 indicates LF Vpp, and the horizontal axis indicates DC voltage or impedance.
  • increasing the absolute value of the DC voltage from the DC power supply 60 increases LF Vpp, but increasing the impedance of the second RF filter 63 decreases LF Vpp.
  • adjusting the impedance of the second RF filter 63 makes it possible to control the tilt angle and also to control LF Vpp. Based on this finding, LF Vpp is controlled.
  • the absolute value of the DC voltage from the DC power supply 60 is increased.
  • the DC voltage is determined based on the control capability of the tilt angle.
  • the DC voltage is increased and the impedance of the second RF filter 63 is also increased.
  • Increasing the impedance in this way reduces LF Vpp due to the relationship shown in FIG. 6.
  • the increase in LF Vpp due to adjustment of the DC voltage is cancelled out by the decrease in LF Vpp due to adjustment of the impedance.
  • the acceptable range is set arbitrarily according to the specifications required for the etching process.
  • the tilt angle is controlled by adjusting the DC voltage from the DC power supply 60 and the impedance of the second RF filter 63, and the LF Vpp can also be appropriately adjusted by adjusting the impedance.
  • LF Vpp control can be achieved while controlling the tilt angle.
  • this type of control is possible without changing the device configuration.
  • LF Vpp was adjusted by adjusting the RF power, but such RF power adjustment can affect the heat input to the wafer and the process performance.
  • the LF Vpp can be adjusted while keeping the RF power constant, so that the conventional effects of heat input to the wafer and the process performance can be suppressed.
  • the tilt angle and LF Vpp are controlled by adjusting the DC voltage from the DC power supply 60 and the impedance of the second RF filter 63.
  • the adjustment of the DC voltage and the adjustment of the impedance can be combined in any manner. An example will be described below.
  • FIG. 8 is an explanatory diagram showing an example of a method for adjusting the DC voltage from the DC power supply 60 and the impedance of the second RF filter 63.
  • the absolute values of the DC voltages V1, V2, V3, and V4 are greatest in this order, and the impedances Z1, Z2, Z3, and Z4 are greatest in this order.
  • “Edge ring New” indicates a state in which the edge ring 14 is new and has not yet worn out
  • “Edge ring Life Limit” indicates a state in which the edge ring 14 has worn out and reached the end of its life, requiring replacement.
  • the absolute value of the DC voltage is changed from V1 to V3, and the impedance is changed from Z3 to Z1.
  • the DC voltage and impedance are changed and adjusted simultaneously.
  • the tilt correction angle becomes larger. This changes the tilt angle that is inclined toward the inner side to the outer side, and the tilt angle can be corrected to 0 (zero) degrees. Note that in this case, the tilt correction angle becomes smaller because the impedance is reduced, but the absolute value of the DC voltage is changed so that the tilt angle becomes 0 (zero) degrees, taking into account the decrease in the tilt correction angle.
  • the DC voltage value and the impedance value are set so that the tilt angle is 0 degrees and the LF Vpp is constant or falls within an acceptable range.
  • the tilt angle and LF Vpp can then be appropriately controlled.
  • the DC voltage and impedance are changed and adjusted simultaneously, but they may be adjusted separately.
  • the timing of the DC voltage adjustment and the timing of the impedance adjustment are arbitrary.
  • the impedance may be adjusted after the DC voltage adjustment, or the DC voltage may be adjusted after the impedance adjustment. In either case, both the tilt angle and LF Vpp are controlled.
  • the DC voltage and impedance are adjusted, but the tilt angle and LF Vpp may be controlled by adjusting only the impedance while not outputting the DC voltage from the DC power supply 60.
  • the impedance is changed in one direction from Z3 to Z1, but the impedance may be increased or decreased as shown in FIG. 10.
  • the vertical axis of FIG. 10 indicates the DC voltage or impedance
  • the horizontal axis indicates the device operation time (process time).
  • the first arrow indicates the behavior of the DC voltage and impedance when etching the first wafer W
  • the second arrow indicates the behavior of the DC voltage and impedance when etching the second wafer W.
  • the impedance is adjusted in one direction to increase the tilt correction angle.
  • the impedance may be increased or decreased as shown by the double-headed arrows in FIG. 10.
  • the impedance can be adjusted regardless of the amount of wear on the edge ring 14, and can be adjusted arbitrarily within a range that does not affect the control of the tilt angle.
  • the LF Vpp increases in response to changes in the DC voltage, but can also fluctuate due to factors other than the DC voltage. In this regard, if the impedance is increased or decreased to follow the fluctuations in the LF Vpp, the LF Vpp can always be controlled to be constant or within an acceptable range.
  • the starting point of the impedance is Z3, but this starting point can also be set arbitrarily.
  • the impedance can be increased or decreased, and in such cases the starting point can also be freely selected.
  • the DC voltage and impedance are adjusted between etching one wafer W and etching the next wafer W, but the timing of adjusting the DC voltage and impedance is not limited to this. For example, if the etching time for one wafer W is long and the edge ring 14 is worn during etching, the DC voltage and impedance may be readjusted during that etching.
  • the frequency of the bias RF power LF supplied from the bias RF power supply 51 is 400 kHz to 13.56 MHz, but 5 MHz or less is more preferable.
  • high ion energy is required to realize a vertical shape of the pattern after etching.
  • the effect of making the impedance of the second RF filter 63 variable may be reduced.
  • the controllability of the tilt angle by adjusting the impedance of the second RF filter 63 may be reduced.
  • the edge ring 14 and the second RF filter 63 are electrically connected directly.
  • the edge ring 14 and the second RF filter 63 are directly electrically connected via a connection portion.
  • the edge ring 14 and the connection portion are in contact with each other, and a direct current from the DC power supply 60 is conducted through the connection portion.
  • An example of the structure of the connection portion (hereinafter sometimes referred to as the "contact structure") is described below.
  • connection part 200 as a conductor has a conductive structure 201 and a conductive elastic member 202.
  • the conductive structure 201 connects the edge ring 14 and the second RF filter 63 via the conductive elastic member 202.
  • one end of the conductive structure 201 is connected to the second RF filter 63, and the other end is exposed on the upper surface of the lower electrode 12 and contacts the conductive elastic member 202.
  • the conductive elastic member 202 is provided in a space formed between the lower electrode 12 and the edge ring 14, for example, on the side of the electrostatic chuck 13.
  • the conductive elastic member 202 contacts each of the conductive structure 201 and the lower surface of the edge ring 14.
  • the conductive elastic member 202 is made of a conductor such as a metal.
  • the configuration of the conductive elastic member 202 is not particularly limited, but examples thereof include the configurations shown in Figures 11A to 11F of JP 2022-7865 A.
  • the arrangement of the conductive elastic member 202 in a plan view is also not particularly limited, but examples thereof include the arrangements shown in Figures 12A to 12C of JP 2022-7865 A.
  • the edge ring 14 and the second RF filter 63 can be electrically connected directly via the connection part 200 as shown in FIG. 11. Therefore, the frequency of the bias RF power LF can be set to a low frequency of 5 MHz or less, and the controllability of the ion energy can be improved. Also, as described above, by adjusting the impedance of the second RF filter 63, the adjustment range of the tilt angle can be increased, and the tilt angle can be controlled to a desired value.
  • the contact structure for the edge ring 14 is not limited to the example shown in FIG. 11.
  • it may be the configuration shown in FIGS. 13A to 13G of JP 2022-7865 A.
  • the relationship between the connection part 200 and the first and second RF filters 62 and 63 is not particularly limited, but may be, for example, the configuration shown in FIGS. 14A to 14C of JP 2022-7865 A.
  • the DC power supply 60 is connected to the edge ring 14 via the switching unit 61, the first RF filter 62, and the second RF filter 63, but the power supply system that applies a DC voltage to the edge ring 14 is not limited to this.
  • the DC power supply 60 may be electrically connected to the edge ring 14 via the switching unit 61, the second RF filter 63, the first RF filter 62, and the lower electrode 12.
  • the lower electrode 12 and the edge ring 14 are directly and electrically coupled, and the self-bias voltage of the edge ring 14 becomes the same as the self-bias voltage of the lower electrode 12.
  • the tilt angle can be controlled by adjusting the DC voltage from the DC power supply 60 and the impedance of the second RF filter 63, so that the tilt angle can be adjusted to 0 (zero) degrees by changing the tilt angle to the inner side.
  • the source RF power HF and the bias RF power supply 51 are used as the RF power supplies, but the number of RF power supplies is not limited to this. For example, there may be one RF power supply supplying RF power of a single frequency, or there may be three RF power supplies supplying RF power of three frequencies.
  • the impedance of the second RF filter 63 is variable, but the impedance of the first RF filter 62 may be variable, or the impedance of both the RF filters 62 and 63 may be variable.
  • the first RF filter 62 may attenuate the bias RF power LF, and the LF Vpp can be controlled by adjusting the impedance of the first RF filter 62.
  • the HF Vpp when it is necessary to control the voltage Vpp of the source RF power HF (hereinafter referred to as "HF Vpp") together with the LF Vpp, the HF Vpp can be controlled by adjusting the impedance of the first RF filter 62, and the LF Vpp can be controlled by adjusting the impedance of the second RF filter 63.
  • two RF filters 62, 63 are provided for the DC power supply 60, but the number of RF filters is not limited to this.
  • the two RF filters 62, 63 may be integrated into one RF filter.
  • three or more RF filters may be provided.
  • the second RF filter 63 (first RF filter 62) has at least one variable passive element to make the impedance variable, but the configuration for making the impedance variable is not limited to this.
  • a device capable of changing the impedance of the RF filters 62, 63 may be connected to the RF filters 62, 63 with variable or fixed impedance.
  • the RF filters 62, 63 with variable impedance may be composed of an RF filter and a device connected to the RF filter to change the impedance of the RF filter.
  • the RF filters 62, 63 have at least one variable passive element to make the impedance variable, but the RF filters 62, 63 may have non-variable impedance and a variable passive element may be provided outside the RF filters 62, 63.
  • the etching apparatus 1 may have a sensor for controlling the LF Vpp.
  • Fig. 12 is an explanatory diagram showing a sensor for controlling the LF Vpp in the etching apparatus 1.
  • the etching apparatus 1 has an in-chamber sensor 300, a matching box sensor 301, a DC power supply sensor 302, and a filter path sensor 303.
  • a sensor appropriate for the object to be measured is used, such as a voltage sensor, a contact sensor, a non-contact sensor, an optical sensor, etc.
  • the in-chamber sensor 300 may, for example, measure the LF Vpp in the plasma processing chamber 10.
  • the in-chamber sensor 300 may also, for example, measure information related to the LF Vpp in the plasma processing chamber 10, such as voltage, current (magnetic field), power, and device load information (including impedance, forward power, and reflected power).
  • the LF Vpp can be calculated and estimated from the information related to the LF Vpp.
  • the in-chamber sensor 300 may be provided at any position in the plasma processing chamber 10, for example, in a path connecting the matching device 52 and the plasma processing chamber 10, in a pipe for supplying RF power, in the electrostatic chuck 13, etc.
  • the in-chamber sensor 300 may also be provided outside the plasma processing chamber 10. The information measured by the in-chamber sensor 300 is then output to the control unit 100.
  • the matching box sensor 301 may, for example, measure the LF Vpp in the matching box 52. Also, for example, the matching box sensor 301 may measure information related to the LF Vpp in the matching box 52, such as voltage and device load information (including impedance, forward power, and reflected power). From the information related to the LF Vpp, the LF Vpp can be calculated and estimated.
  • the matching box sensor 301 may be provided at any position in the matching box 52, for example, in the first matching circuit 53 or the second matching circuit 54, or at the exits of the matching circuits 53 and 54. Also, the matching box sensor 301 may be provided outside the matching box 52. Then, the information measured by the matching box sensor 301 is output to the control unit 100.
  • the DC power supply sensor 302 may, for example, measure information relating to the LF Vpp in the DC power supply 60, such as the DC voltage (output voltage), DC current (output current), high frequency noise voltage, high frequency noise current, etc. from the DC power supply 60.
  • the LF Vpp can be calculated and estimated from the information relating to the LF Vpp.
  • the DC power supply sensor 302 is provided inside or outside the DC power supply 60. The information measured by the DC power supply sensor 302 is output to the control unit 100.
  • the filter path sensor 303 may, for example, measure information about the LF Vpp in the filter path, such as voltage, current (magnetic field), etc. From the information about the LF Vpp, the LF Vpp can be calculated and estimated.
  • the filter path sensor 303 may be provided at any position in the filter path, for example, in the path between the RF filters 62, 63 and the edge ring 14. The filter path sensor 303 may also be provided in the RF filters 62, 63. The information measured by the filter path sensor 303 is then output to the control unit 100.
  • the control unit 100 aggregates and processes the information output from the in-chamber sensor 300, the matching unit sensor 301, the DC power supply sensor 302, and the filter path sensor 303, and further outputs instructions to the second RF filter 63. Specifically, when the input information is information about LF Vpp, the control unit 100 calculates LF Vpp from the information. Then, based on the measured LF Vpp or the calculated LF Vpp, it calculates the impedance of the second RF filter 63 (variable passive element). The calculated impedance is output to the second RF filter 63, and the second RF filter 63 is controlled.
  • control unit 100 is provided in the etching apparatus 1, but its location is arbitrary.
  • control unit 100 may be provided separately from the etching apparatus 1 as an aggregation device.
  • the control unit 100 may be provided integrally with the second RF filter 63 or the variable passive element of the second RF filter 63, or may be divided into multiple parts and provided separately.
  • the impedance of the second RF filter 63 can be automatically adjusted based on the information output from the chamber sensor 300, the matching box sensor 301, the DC power supply sensor 302, and the filter path sensor 303.
  • the in-chamber sensor 300, the matching box sensor 301, the DC power supply sensor 302, and the filter path sensor 303 are provided, but the type and number of sensors are not limited to these. Any sensor that measures LF Vpp or information related to LF Vpp can be used.
  • similar sensors may be installed in each section (e.g., at the positions of sensors 300-303) to estimate or measure information related to the source RF power HF (e.g., load information or HF Vpp), output to the control section 100, and used to control the impedance of the RF filters 62, 63.
  • the various sensors may be installed at any position depending on the object to be measured.
  • the information related to the source RF power HF may be used to control the LF Vpp.
  • the in-chamber sensor 300, the matching device sensor 301, the DC power supply sensor 302, and the filter path sensor 303 are not essential, and any one of them may be omitted, or all of them may be omitted. If all of these sensors are omitted, the operator may manually set the impedance of the second RF filter 63. Alternatively, after the operator sets the initial impedance, the control unit 100 may set the impedance according to the time for which RF power is supplied.
  • the etching apparatus 1 of the above embodiment may have a first variable passive element 64 and a second variable passive element 65 as shown in FIG. 13, instead of the DC power supply 60, the switching unit 61, the first RF filter 62, and the second RF filter 63. That is, the etching apparatus 1 does not have a DC power supply 60, and does not apply a negative DC voltage to the edge ring 14.
  • the first variable passive element 64 and the second variable passive element 65 are arranged in this order from the edge ring 14 side.
  • the second variable passive element 65 is connected to a ground potential. That is, the second variable passive element 65 is not connected to either the source RF power supply 50 or the bias RF power supply 51.
  • first variable passive element 64 and the second variable passive element 65 is configured to have a variable impedance.
  • the first variable passive element 64 and the second variable passive element 65 may be, for example, either a coil (inductor) or a capacitor.
  • any variable impedance element such as a diode or other element can achieve the same function.
  • the number and positions of the first variable passive element 64 and the second variable passive element 65 can also be designed appropriately by a person skilled in the art.
  • the element itself does not need to be variable, and for example, a plurality of elements with fixed impedance values may be provided, and the impedance may be varied by switching the combination of the fixed-value elements using a switching circuit.
  • the circuit configurations of the first variable passive element 64 and the second variable passive element 65 can each be designed appropriately by a person skilled in the art.
  • the relationship between the impedance of the first variable passive element 64 and the impedance of the second variable passive element 65 and the LF Vpp is similar to the relationship between the impedance of the second RF filter 63 and the LF Vpp shown in FIG. 6. That is, if the impedance of the variable passive elements 64, 65 is increased, the LF Vpp becomes smaller. Then, the LF Vpp can be controlled by adjusting the impedance of at least one of the first variable passive element 64 and the second variable passive element 65. Note that depending on the circuit design of the variable passive elements 64, 65 and the measurement location of the LF Vpp, reducing the impedance of the variable passive elements 64, 65 may reduce the LF Vpp. The impedance can be adjusted according to the circuit design of the variable passive elements 64, 65 and the measurement location of the LF Vpp.
  • LF Vpp may fluctuate due to factors other than the fluctuation in DC voltage described above.
  • LF Vpp may fluctuate due to the magnetic field. Therefore, when LF Vpp fluctuates secondarily in this way, LF Vpp can be controlled to a constant value or within an acceptable range by adjusting the impedance of at least one of the variable passive elements 64, 65 as in this embodiment.
  • the LF Vpp can be controlled to the control target value by adjusting the impedance of at least one of the variable passive elements 64, 65, as in this embodiment.
  • the LF Vpp can be controlled, and the voltage of the edge ring 14 to which the variable passive elements 64, 65 are connected can be adjusted. As a result, it becomes possible to control the amount of wear of the edge ring 14 by the voltage.
  • the LF Vpp is controlled by adjusting the impedance of at least one of the variable passive elements 64 and 65, but the tilt angle can also be controlled.
  • the method of controlling the tilt angle by adjusting the impedance of the variable passive elements 64 and 65 is the same as the method of controlling the tilt angle by adjusting the impedance of the second RF filter 63 described above.
  • variable passive elements 64 and 65 control the LF Vpp by adjusting the impedance, but they may also be configured to control the HF Vpp.
  • the HF Vpp can fluctuate due to various factors. For example, if a pulsed power supply configured to apply a pulse voltage other than the bias RF power LF to the lower electrode 12 is used instead of the bias RF power supply 51, this HF Vpp is likely to fluctuate. In such a case, the HF Vpp can be controlled to a constant value or within an acceptable range by adjusting the impedance of at least one of the variable passive elements 64 and 65.
  • the edge ring 14 and the variable passive elements 64, 65 need only be electrically connected.
  • the edge ring 14 and the variable passive elements 64, 65 may be connected in a non-contact or capacitively coupled manner.
  • the edge ring 14 and the variable passive elements 64, 65 may be electrically connected directly by a connection portion 200.
  • the configuration of this connection portion 200 is similar to the configuration of the connection portion 200 shown in FIG. 11. Note that when the edge ring 14 and the variable passive elements 64, 65 are electrically connected directly, the effect of maintaining the controllability of the LF Vpp can be enjoyed even if the frequency of the bias RF power LF is low.
  • variable passive elements 64, 65 are electrically connected to the edge ring 14, but the connection destination of the variable passive elements 64, 65 is not limited to this.
  • the variable passive elements 64, 65 may be electrically connected to the lower electrode 12, a conductive component constituting the lower electrode 12, a transmission path for RF power, a circuit in the matching box 52, a pulsed power supply used in place of the source RF power supply 50 or the bias RF power supply 51, etc.
  • variable passive elements 64, 65 are provided, but the number of variable passive elements is not limited to this.
  • the number of variable passive elements 64, 65 is not limited to this.
  • only one of the variable passive elements 64, 65 may be provided.
  • the second variable passive element 65 is omitted, the first variable passive element 64 is connected to the ground potential.
  • the second variable passive element 65 is connected to the ground potential.
  • the impedance of the second variable passive element 65 is configured to be variable.
  • the functions and circuits that were provided when the impedance of the first variable passive element 64 was fixed may be integrated into the second variable passive element 65.
  • the LF Vpp is controlled by adjusting the impedance of the second RF filter 63
  • the LF Vpp or the HF Vpp is controlled by adjusting the impedance of at least one of the variable passive elements 64 and 65
  • the controlled object is not limited to Vpp.
  • the controlled object may be power or current.
  • the etching apparatus 1 in the above embodiment is a capacitively coupled etching apparatus
  • the etching apparatus to which the present disclosure is applied is not limited to this.
  • the etching apparatus may be an inductively coupled etching apparatus.
  • a plasma processing chamber a substrate support disposed within the plasma processing chamber, the substrate support including a lower electrode, an electrostatic chuck, and an edge ring disposed to surround a substrate mounted on the electrostatic chuck; an upper electrode disposed above the substrate support; a source RF power source configured to supply source RF power to the upper electrode or the lower electrode to generate a plasma from gas in the plasma processing chamber; a bias power supply configured to supply a bias power to the lower electrode; a DC power supply configured to apply a negative DC voltage to the edge ring; an RF filter electrically connected between the edge ring and the DC power source, the RF filter including at least one variable passive element; a control unit configured to control the DC power supply and the variable passive element to control an incident angle of ions in the plasma with respect to an edge region of a substrate placed on the electrostatic chuck and to control a voltage of the bias power within an allowable range;
  • a plasma processing apparatus comprising: (2) at least one conductor
  • a sensor for measuring a voltage of the bias power or information related to the voltage of the bias power The plasma processing apparatus according to any one of (1) to (6), wherein the control unit controls the variable passive element based on a measurement result of the sensor.
  • a plasma processing chamber a substrate support disposed within the plasma processing chamber, the substrate support including an electrostatic chuck and an edge ring disposed to surround a substrate mounted on the electrostatic chuck; an RF power source configured to generate RF power to generate a plasma from a gas in the plasma processing chamber; At least one variable passive element;
  • a control unit configured to control the variable passive element to control a voltage of the RF power;
  • a plasma processing apparatus comprising: (9) The plasma processing apparatus according to claim 8, wherein the at least one variable passive element is electrically connected to the edge ring.
  • An etching method using a plasma processing apparatus comprising: The plasma processing apparatus includes: a plasma processing chamber; a substrate support disposed within the plasma processing chamber, the substrate support including an electrostatic chuck and an edge ring disposed to surround a substrate mounted on the electrostatic chuck; an RF power source configured to generate RF power to generate a plasma from a gas in the plasma processing chamber; At least one variable passive element; Equipped with The etching method includes: (a) placing a substrate on the electrostatic chuck; (b) generating a plasma from a gas in the plasma processing chamber with the RF power; (c) etching the substrate with the generated plasma; (d) controlling the variable passive element to control the voltage of the RF power; The etching method includes:

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PCT/JP2023/029158 2022-09-29 2023-08-09 プラズマ処理装置及びエッチング方法 Ceased WO2024070268A1 (ja)

Priority Applications (4)

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JP2010186841A (ja) * 2009-02-12 2010-08-26 Hitachi High-Technologies Corp プラズマ処理方法
JP2019216164A (ja) * 2018-06-12 2019-12-19 東京エレクトロン株式会社 プラズマ処理装置及びプラズマ処理装置の高周波電源を制御する方法
JP2020113652A (ja) * 2019-01-11 2020-07-27 東京エレクトロン株式会社 処理方法及びプラズマ処理装置
JP2021177539A (ja) * 2020-05-01 2021-11-11 東京エレクトロン株式会社 エッチング装置及びエッチング方法

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JP2010186841A (ja) * 2009-02-12 2010-08-26 Hitachi High-Technologies Corp プラズマ処理方法
JP2019216164A (ja) * 2018-06-12 2019-12-19 東京エレクトロン株式会社 プラズマ処理装置及びプラズマ処理装置の高周波電源を制御する方法
JP2020113652A (ja) * 2019-01-11 2020-07-27 東京エレクトロン株式会社 処理方法及びプラズマ処理装置
JP2021177539A (ja) * 2020-05-01 2021-11-11 東京エレクトロン株式会社 エッチング装置及びエッチング方法

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