WO2024066646A1

WO2024066646A1 - Printed circuit board via hole structure and printed circuit board

Info

Publication number: WO2024066646A1
Application number: PCT/CN2023/106053
Authority: WO
Inventors: 任晓瀛; 李金龙; 魏仲民
Original assignee: 中兴通讯股份有限公司
Priority date: 2022-09-27
Filing date: 2023-07-06
Publication date: 2024-04-04
Also published as: CN117425273A

Abstract

A printed circuit board via hole structure and a printed circuit board. The printed circuit board via hole structure comprises signal holes (200) and at least one ground via hole (100). The signal holes and the ground via hole penetrate through a multi-layer structure of a printed circuit board, and the center distances between the signal holes and the ground via hole located in different layers of the multi-layer structure are not all equal to each other. The center distances between the signal holes and the ground via hole are adjusted so that the center distances between the signal holes and the ground via hole in the multi-layer structure are not completely equal to each other, thus improving the impedance continuity and increasing the signal bandwidth.

Description

Printed circuit board via structure and printed circuit board

Cross-references to related publications

This disclosure claims the priority of a Chinese patent application filed with the State Intellectual Property Office on September 27, 2022, with publication number CN202211180972.4 and invention name “Printed circuit board via structure and printed circuit board”. The entire contents of the application are incorporated by reference in this disclosure.

Technical Field

The embodiments of the present disclosure relate to, but are not limited to, the field of printed circuit technology, and specifically relate to a printed circuit board via structure and a printed circuit board.

Background technique

PCB (Printed Circuit Board) products with a rate of 112Gbps have been commercialized. Products with a rate of 224Gbps are under research. However, the major technical challenge encountered in the research is how to improve the SI (Signal Integrity) performance of the system and increase the bandwidth. As an important component of the system, the printed circuit board determines the system performance to a large extent.

In different systems, vias on PCB play a vital role in realizing signal interconnection of components such as high-speed connectors and BGA (Ball Grid Array) in the system. Due to the processing limitations of BGA itself, the impedance of vias at the connection between it and the high-speed multi-layer PCB deviates from the system impedance, resulting in multiple impedance discontinuities, causing a sharp deterioration in signal quality, resulting in incomplete signals, and in severe cases, causing the system to be unable to be used normally. Therefore, the impedance discontinuity introduced by vias in high-speed multi-layer PCBs and the low signal bandwidth have become problems that need to be solved urgently.

Summary of the invention

The present disclosure provides a printed circuit board via structure and a printed circuit board.

In a first aspect, an embodiment of the present disclosure provides a printed circuit board via structure, comprising a signal hole and at least one ground via, wherein the signal hole and the ground via penetrate a multi-layer structure of the printed circuit board, and the center distances between the signal hole and the ground via in different layers of the layer structure are not all equal.

On the other hand, an embodiment of the present disclosure further provides a printed circuit board, comprising the printed circuit board via structure as described above and at least two layer structures, wherein the printed circuit board via structure penetrates each of the at least two layer structures.

The printed circuit board via structure provided by the embodiment of the present disclosure includes a signal hole and at least one ground via, the signal hole and the ground via penetrate the multi-layer structure of the printed circuit board, and the center distances between the signal hole and the local vias in different layers of the multi-layer structure are not all equal; by adjusting the center distance between the signal hole and the ground via so that the center distances between the signal hole and the local vias in the multi-layer structure are not completely equal, the impedance continuity can be improved and the signal bandwidth can be increased.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic diagram of a via structure of a printed circuit board provided by an embodiment of the present disclosure;

FIG2 is a second schematic diagram of a via structure of a printed circuit board provided in an embodiment of the present disclosure;

FIG3 is a third schematic diagram of a via structure of a printed circuit board provided in an embodiment of the present disclosure;

FIG4 is a fourth schematic diagram of a via structure of a printed circuit board provided in an embodiment of the present disclosure;

FIG5 is a fifth schematic diagram of a via structure of a printed circuit board provided in an embodiment of the present disclosure;

FIG6 is a sixth schematic diagram of a via structure of a printed circuit board provided in an embodiment of the present disclosure;

FIG. 7 is a seventh schematic diagram of a via structure of a printed circuit board provided in an embodiment of the present disclosure;

FIG8 is a schematic diagram showing impedance comparison between the related art and the embodiment of the present disclosure;

FIG. 9 is a schematic diagram comparing the insertion loss effects of the related art and the embodiment of the present disclosure.

Detailed ways

Example embodiments will be described more fully below with reference to the accompanying drawings, but the example embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. On the contrary, the purpose of providing these embodiments is to make the present disclosure thorough and complete and to enable those skilled in the art to fully understand the scope of the present disclosure.

As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

The terms used herein are for describing particular embodiments only and are not intended to limit the present disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly states otherwise. It will also be understood that when the terms “comprising” and/or “made of” are used in this specification, it specifies the presence of the features, integers, steps, operations, elements and/or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and/or groups thereof.

The embodiments described herein may be described with reference to plan views and/or cross-sectional views by means of idealized schematic diagrams of the present disclosure. Therefore, the example illustrations may be modified according to manufacturing techniques and/or tolerances. Therefore, the embodiments are not limited to the embodiments shown in the drawings, but include modifications of the configurations formed based on the manufacturing process. Therefore, the regions illustrated in the drawings have schematic properties, and the shapes of the regions shown in the figures illustrate the specific shapes of the regions of the elements, but are not intended to be limiting.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted as having an idealized or overly formal meaning unless explicitly defined as such herein.

The inventors discovered that for a signal hole on a printed circuit board, its impedance is inversely proportional to the parasitic capacitance and directly proportional to the parasitic inductance. The center distance between the signal hole and the ground via will affect the parasitic capacitance and parasitic inductance of the signal hole. The closer the signal hole is to the ground via, the greater its parasitic capacitance, the smaller its parasitic inductance, and the correspondingly smaller its impedance. On the contrary, the farther the signal hole is from the ground via, the smaller its parasitic capacitance, the greater its parasitic inductance, and the correspondingly greater its impedance.

On this basis, the embodiment of the present disclosure provides a printed circuit board via structure. As shown in FIG1 , the printed circuit board via structure includes a signal hole 200 and at least one ground via 100, the signal hole 200 and the ground via 100 penetrate the multi-layer structure of the printed circuit board (not shown in the figure), and the center distances between the signal holes 200 and the ground via 100 in different layers of the multi-layer structure are not all equal.

The printed circuit board can be a single-layer board or a multi-layer board. The single-layer printed circuit board includes one layer structure, and the multi-layer printed circuit board includes multiple layer structures. In the embodiment of the present disclosure, a multi-layer printed circuit board is taken as an example for explanation. The printed circuit board via structure shown in FIG1 penetrates a two-layer printed circuit board including two layer structures, H1 is the thickness of one of the layer structures (i.e., the first layer structure), and H2 is the thickness of the other layer structure (i.e., the second layer structure).

In the first layer structure, the center distance between the signal hole 200 and the ground via 100 is LSG1; in the second layer structure, the center distance between the signal hole 200 and the ground via 100 is LSG2, and LSG1 and LSG2 are not equal. It should be noted that FIG. 1 shows a printed circuit board via structure that penetrates two layers of printed circuit boards. If it is a printed circuit board via structure that penetrates three or more layers of printed circuit boards, the center distances between the signal holes 200 and the ground via 100 in the multi-layer structure are not equal, or at least two or more layers. In the structure, the center distances between the signal hole 200 and the ground via 100 are equal, that is, a part of the center distances are equal, and a part of the center distances are unequal.

The printed circuit board via structure provided by the embodiment of the present disclosure includes a signal hole 200 and at least one ground via 100. The signal hole 200 and the ground via 100 penetrate the multi-layer structure of the printed circuit board. The center distances between the signal hole 200 and the ground via 100 in different layers of the multi-layer structure are not all equal. The center distance between the signal hole 200 and the ground via 100 is larger, which can improve impedance continuity. The center distance between the signal hole 200 and the ground via 100 is smaller, which can improve the bandwidth of the signal.

In some embodiments, as shown in FIG. 1 and FIG. 3 to FIG. 6 , there may be one signal hole 200 .

In some embodiments, as shown in FIG. 2 and FIG. 7 , the signal hole 200 may be a pair of differential vias including a first signal hole 200a and a second signal hole 200b. Accordingly, the number of ground vias is at least two, at least one of the at least two ground vias forms a first via structure with the first signal hole 200a, and at least one of the remaining ground vias forms a second via structure with the second signal hole 200b. In the embodiment shown in FIG. 2 , two ground vias are included, a first ground via 100a and a second ground via 100b, the first ground via 100a and the first signal hole 200a form a first via structure, and the second ground via 100b and the second signal hole 200b form a second via structure.

In some embodiments, the signal hole 200 includes at least one first aperture segment. As shown in FIGS. 1 , 2 , 4 , 6 , and 7 , the signal hole 200 may be a through-hole structure, or, as shown in FIGS. 3 and 5 , the signal hole 200 may be a segmented structure including first aperture segments 210 , 220 , and 230 .

In some embodiments, as shown in Figures 3 and 5, the signal hole 200 includes at least two first aperture segments, each of which is located in a different layer structure of the printed circuit board, and a first solder pad is provided at both ends of each first aperture segment; the printed circuit board via structure also includes a first electrical connector 300, and the first electrical connector 300 is respectively connected to the first solder pads at the adjacent ends of two adjacent first aperture segments.

In the printed circuit board via structure shown in FIG3 , the signal hole 200 includes two first aperture segments, namely, first aperture segments 210 and 220. The first aperture segment 210 is located in the first layer structure of the printed circuit board, and the hole depth is the thickness H1 of the first layer structure. The first aperture segment 220 is located in the second layer structure of the printed circuit board, and the hole depth is the thickness H2 of the second layer structure. The first aperture segment 210 is provided with first pads 211 at both ends, and the first aperture segment 220 is provided with first pads 221 at both ends. The first connector 300 is connected to the first pad 211 at the bottom of the first aperture segment 210 and the first pad 221 at the top of the first aperture segment 220, respectively, so as to realize the electrical connection of the entire signal hole 200.

In the printed circuit board via structure shown in FIG. 5 , the signal hole 200 includes three first aperture segments, namely, first aperture segments 210 , 220 and 230 . The first aperture segment 210 is located in the first layer structure of the printed circuit board. The hole depth is the thickness H1 of the first layer structure, the first aperture segment 220 is located in the second layer structure of the printed circuit board, the hole depth is the thickness H2 of the second layer structure, the first aperture segment 230 is located in the third layer structure of the printed circuit board, and the hole depth is the thickness H3 of the third layer structure. The first aperture segment 210 is provided with first pads 211 at both ends, the first aperture segment 220 is provided with first pads 221 at both ends, and the first aperture segment 230 is provided with first pads 231 at both ends. The two ends of one first connector 300 are respectively connected to the first pad 211 at the bottom of the first aperture segment 210 and the first pad 221 at the top of the first aperture segment 220, and the two ends of another first connector 300 are respectively connected to the first pad 221 at the bottom of the first aperture segment 220 and the first pad 231 at the top of the first aperture segment 230, thereby realizing the electrical connection of the entire signal hole 200.

In some embodiments, at least one ground via 100 includes at least one second aperture segment. As shown in FIG4 , the ground via 100 may be a through-hole structure, or, as shown in FIGS. 1-3 and 5-7 , the ground via 100 may be a segmented structure including second aperture segments 110, 120, 130, 110a, 120a, 110b, 120b.

In some embodiments, as shown in Figures 1-3 and Figures 5-7, at least one ground via 100 includes at least two second aperture segments, each second aperture segment is located in a different layer structure of the printed circuit board, and second pads are provided at both ends of each second aperture segment; the printed circuit board via structure also includes second electrical connectors 400, 400a, 400b, and the second electrical connectors 400, 400a, 400b are respectively connected to the second pads at adjacent ends of two adjacent second aperture segments.

In the printed circuit board via structure shown in FIG. 1, FIG. 3, and FIG. 6, the ground via 100 includes two second aperture segments, namely, second aperture segments 110 and 120. The second aperture segment 110 is located in the first layer structure of the printed circuit board, and the hole depth is the thickness H1 of the first layer structure. The second aperture segment 120 is located in the second layer structure of the printed circuit board, and the hole depth is the thickness H2 of the second layer structure. The second aperture segment 110 is provided with a second pad 111 at both ends, and the second aperture segment 120 is provided with a second pad 121 at both ends. The two ends of the second connector 400 are respectively connected to the second pad 111 at the bottom of the second aperture segment 110 and the second pad 121 at the top of the second aperture segment 120, thereby realizing the electrical connection of the entire ground via 100.

In the printed circuit board via structure shown in FIG5 , the ground via 100 includes three second aperture segments, namely, second aperture segments 110, 120 and 130. The second aperture segment 110 is located in the first layer structure of the printed circuit board, and the hole depth is the thickness H1 of the first layer structure. The second aperture segment 120 is located in the second layer structure of the printed circuit board, and the hole depth is the thickness H2 of the second layer structure. The second aperture segment 130 is located in the third layer structure of the printed circuit board, and the hole depth is the thickness H3 of the third layer structure. The second aperture segment 110 is provided with second pads 111 at both ends, the second aperture segment 120 is provided with second pads 121 at both ends, and the second aperture segment 130 is provided with second pads 131 at both ends. The two ends of a second connector 400 are respectively connected to the second pad 111 at the bottom of the second aperture segment 110 and the second pad 121 at the top of the second aperture segment 120. Another second connector 400 is provided with a second pad 111 at the bottom of the second aperture segment 110 and a second pad 121 at the top of the second aperture segment 120. The two ends of the ground via 100 are respectively connected to the second pad 121 at the bottom of the second aperture segment 120 and the second pad 131 at the top of the second aperture segment 130 , thereby achieving electrical connection of the entire ground via 100 .

In some embodiments, the difference between the apertures of two adjacent second aperture segments is greater than or equal to 0.001 mm.

In some embodiments, the difference between the center distances between the signal hole 200 and two adjacent second aperture segments is greater than or equal to 0.001 mm.

In the case where the signal hole 200 is a pair of differential vias including a first signal hole 200a and a second signal hole 200b, as shown in FIG2 and FIG7, the difference between the center distance between the first signal hole 200a and the two adjacent second aperture segments 110a and 120a of the first ground via 100a is greater than or equal to 0.001 mm, and the first ground via 100a is a ground via in the first via structure. In other words, the center distance between the first signal hole 200a and the second aperture segment 110a of the first ground via 100a is LSG1a, the center distance between the first signal hole 200a and the second aperture segment 120a of the first ground via 100a is LSG2a, the difference between LSG1a and LSG2a is greater than or equal to 0.001 mm, in FIG2, LSG1a>LSG2a, and in FIG7, LSG1a<LSG2a.

The difference between the center distance between the second signal hole 200b and the two adjacent second aperture segments 110b and 120b of the second ground via 100b is greater than or equal to 0.001 mm, and the second ground via 100b is a ground via in the second via structure. That is, the center distance between the second signal hole 200b and the second aperture segment 110b of the second ground via 100b is LSG1b, the center distance between the second signal hole 200b and the second aperture segment 120b of the second ground via 100b is LSG2b, and the difference between LSG1b and LSG2b is greater than or equal to 0.001 mm. In FIG. 2 , LSG1b>LSG2b. In FIG. 7 , LSG1b<LSG2b.

It should be noted that the aperture value of each second aperture segment and the aperture value of each first aperture segment can be obtained by simulation or testing to obtain the optimal combination value. The hole depth (for example, H1, H2, H3) of each second aperture segment of the ground via 100 can be determined by simulation. The center spacing between the signal hole 200 and each second aperture segment of the ground via 100 (for example, LSG1, LSG2, LSG1a, LSG2a, LSG1b, LSG2b) can be obtained by simulation or testing to obtain the optimal combination value, and the first electrical connector 300 and the second electrical connector 400 can be obtained by simulation or testing to obtain the optimal combination value.

The embodiment of the present disclosure further provides a printed circuit board, which includes the printed circuit board via structure as described above and at least two layer structures, wherein the printed circuit board via structure penetrates each of the at least two layer structures.

The printed circuit board provided by the embodiment of the present disclosure includes a printed circuit board via structure and at least two layer structures, the printed circuit board via structure penetrates each layer structure of the at least two layer structures, the printed circuit board via structure includes a signal hole 200 and at least one ground via 100, the signal hole 200 and the ground via 100 penetrate the multi-layer structure of the printed circuit board, and the signal hole 200 and the ground via 100 located in different layers of the multi-layer structure are located between By adjusting the center spacing between the signal hole 200 and the ground via 100, the center spacing between the signal hole 200 and the ground via 100 in the multilayer structure is not completely equal, which can improve impedance continuity and enhance signal bandwidth.

In some embodiments, the center spacing between the signal hole 200 and the ground vias 100 in the multi-layer structure is not equal, and the center spacing between the signal hole 200 and the ground vias 100 increases or decreases in the direction in which the signal hole 200 and the ground vias 100 are arranged. As shown in FIG. 1, FIG. 2, and FIG. 4, in the direction from the first layer structure to the second layer structure, the center spacing between the signal hole 200 and the ground via 100 decreases; wherein the ground via 100 shown in FIG. 4 includes a second aperture segment, i.e., a through-hole structure, and the ground via 100 shown in FIG. 1 and FIG. 2 includes two second aperture segments, i.e., a segmented structure. As shown in FIG. 3, FIG. 6, and FIG. 7, in the direction from the first layer structure to the second layer structure, the center spacing between the signal hole 200 and the ground via 100 increases.

In some embodiments, in the case of at least three layers, the center spacing between the signal hole 200 and the ground via 100 in at least two layers of the at least three layers is equal. As shown in FIG5 , the printed circuit board via structure runs through the three layers, the thickness of the first layer structure is H1, the thickness of the second layer structure is H2, and the thickness of the third layer structure is H3. The signal hole 200 includes three first aperture segments, namely, the first aperture segment 210, the first aperture segment 220, and the first aperture segment 230, and the ground via 100 includes three second aperture segments, namely, the second aperture segment 110, the second aperture segment 120, and the second aperture segment 130. In the first layer structure, the center spacing between the signal hole 200 and the ground via 100 is LSG1, in the second layer structure, the center spacing between the signal hole 200 and the ground via 100 is LSG2, and in the third layer structure, the center spacing between the signal hole 200 and the ground via 100 is LSG3. LSG2>LSG1, LSG3=LSG1.

In order to clearly illustrate the solution of the embodiment of the present disclosure, a detailed description is given below with reference to specific examples.

Specific Example 1

As shown in FIG1 , the via structure of the printed circuit board includes a signal hole 200 (aperture DS), and a ground via 100 is arranged around the signal hole 200. The ground via 100 includes two second aperture segments 110 and 120. In the direction from the first structure layer to the second structure layer, the center distance between the signal hole 200 and the ground via 100 changes in a decreasing manner. The aperture of the second aperture segment 110 of the ground via 100 is DG1, the aperture of the second aperture segment 120 is DG2, the hole depth of the second aperture segment 110 is H1, the hole depth of the second aperture segment 120 is H2, the center distance between the signal hole 200 and the second aperture segment 110 of the ground via 100 is LSG1, and the center distance between the signal hole 200 and the second aperture segment 120 of the ground via 100 is LSG2. The second electrical connector 400 connects the second pad 111 of the second aperture segment 110 and the second pad 121 of the second aperture segment 120. For the ground via 100, DG2 can be greater than, equal to, or less than DG1. The center distance LSG1 between the two aperture segments 110 is greater than the center distance LSG2 between the signal hole 200 and the second aperture segment 120 of the ground via 100 , ie, LSG1>LSG2.

DG2 may be equal to DG1, or DG2 may be smaller than DG1 by 0.001 mm or more, or DG2 may be larger than DG1 by 0.001 mm or more. LSG1 may be larger than LSG2 by 0.001 mm or more.

Specific Example 2

As shown in FIG2 , the printed circuit board via structure includes a pair of differential vias, namely, a first signal hole 200a and a second signal hole 200b, both of which have an aperture of DS. A first ground via 100a is arranged around the first signal hole 200a, and a second ground via 100b is arranged around the second signal hole 200b. The first ground via 100a includes second aperture segments 110a (aperture DG1a) and 120a (aperture DG2a), and the second ground via 100b includes second aperture segments 110b (aperture DG1b) and 120b (aperture DG2b). In the direction from the first structural layer to the second structural layer, the center distance between the signal hole 200 and the ground via 100 changes in a decreasing manner. The hole depth of the second aperture segments 110a and 110b is H1, and the hole depth of the second aperture segments 120a and 120b is H2. The center distance between the first signal hole 200a and the second aperture section 110a of the first ground via 100a is LSG1a, the center distance between the first signal hole 200a and the second aperture section 120a of the first ground via 100a is LSG2a, the center distance between the second signal hole 200b and the second aperture section 110b of the second ground via 100b is LSG1b, and the center distance between the second signal hole 200b and the second aperture section 120b of the second ground via 100b is LSG2b. The second pad 111a of the second aperture section 110a and the second pad 121a of the second aperture section 120a are connected through the second electrical connector 400a, and the second pad 111b of the second aperture section 110b and the second pad 121b of the second aperture section 120b are connected through the second electrical connector 400b. The aperture DG1a of the second aperture section 110a of the first ground via 100a may be greater than, equal to, or smaller than the aperture DG1b of the second aperture section 110b of the second ground via 100b, and the aperture DG2a of the second aperture section 120a of the first ground via 100a may be greater than, equal to, or smaller than the aperture DG2b of the second aperture section 120b of the second ground via 100b. The center distance LSG1a between the first signal hole 200a and the second aperture section 110a of the first ground via 100a is greater than the center distance LSG2a between the first signal hole 200a and the second aperture section 120a of the first ground via 100a, that is, LSG1a>LSG2a; the center distance LSG1b between the second signal hole 200b and the second aperture section 110b of the second ground via 100b is greater than the center distance LSG2b between the second signal hole 200b and the second aperture section 120b of the second ground via 100b, that is, LSG1b>LSG2b. LSG1a can be greater than, equal to, or less than LSG1b, and LSG2a can be greater than, equal to, or less than LSG2b.

The aperture DG2a of the second aperture section 120a of the first ground via 100a may be greater than, equal to, or smaller than the aperture DG1a of the second aperture section 110a, and the aperture DG2b of the second aperture section 120b of the second ground via 100b may be greater than, equal to, or smaller than the aperture DG1b of the second aperture section 110b. If DG2a is not equal to DG1a, DG2a may be smaller than DG1a by 0.001 mm or more, or DG2a may be larger than DG1a by 0.001 mm. If DG2b is not equal to DG1b, DG2b can be 0.001mm or more smaller than DG1b, or DG2b can be 0.001mm or more larger than DG1b. LSG1a can be 0.001mm or more larger than LSG2a, and LSG1b can be 0.001mm or more larger than LSG2b.

Specific Example 3

As shown in FIG6 , the difference between the specific example 3 and the specific example 1 is that in the specific example 3, in the direction from the first structure layer to the second structure layer, the center distance between the signal hole 200 and the ground via 100 increases, that is, LSG1<LSG2. The rest of the structure of the specific example 3 is the same as that of the specific example 1, and will not be repeated here.

Specific Example 4

As shown in Fig. 7, the difference between the specific example 3 and the specific example 2 is that: in the specific example 4, LSG1a<LSG2a, LSG1b<LSG2b. The rest of the structure of the specific example 4 is the same as that of the specific example 2, and will not be repeated here.

Figure 8 is a schematic diagram of impedance comparison between the related art and the embodiment of the present disclosure, and Figure 9 is a schematic diagram of insertion loss effect comparison between the related art and the embodiment of the present disclosure. The test experimental effect of the embodiment of the present disclosure is described below in conjunction with Figures 8 and 9.

As shown in Figure 8, the dashed curve in the figure is the impedance test curve of the PCB board in the related art, and the solid curve is the impedance test curve of the PCB board of the embodiment of the present disclosure. In Figure 8, the x-axis is the frequency and the y-axis is the impedance. It can be seen from the figure that the impedance value of the embodiment of the present disclosure is reduced compared with the related art.

As shown in Figure 9, the dotted curve in the figure is the signal insertion loss curve of the PCB board in the related art, and the solid curve is the signal insertion loss curve of the PCB board in the embodiment of the present disclosure. In Figure 9, the x-axis is the frequency, and the y-axis is the insertion loss. It can be seen from the figure that in the related art, resonance occurs at the m2 position, and the resonant frequency is about 62.7 GHz; in the embodiment of the present disclosure, resonance occurs at the m1 position, and the resonant frequency is about 72.9 GHz; compared with the related art, the embodiment of the present disclosure has an increased resonant frequency and a larger corresponding bandwidth.

The printed circuit board via structure of the disclosed embodiment can increase or decrease the impedance of the via and improve the continuity of the via impedance by adjusting the aperture of the ground via and the center spacing between the signal hole and the ground via while keeping the aperture diameter and the hole spacing of the signal hole unchanged, thereby effectively solving the problem of poor impedance continuity in the current multi-layer PCB and improving the bandwidth of the signal.

The embodiments of the present disclosure can be applied to the design of multi-layer PCB structures of products such as BGA and connectors, especially PCB structures in high-speed backplane systems with a rate of 112 Gbps or higher, and can be applied in the following two aspects:

(I) High-speed connector crimping vias

Many communication products use high-speed connectors to achieve product connection. For current high-speed connector products, the crimped differential signal aperture is relatively large, about 0.3mm, and the center spacing between the signal hole and the ground via is also relatively large, about 1mm. Generally, the impedance of the crimped differential via is guaranteed to be between 80-85 ohms. For a 100 ohm system, the impedance is discontinuous, which affects the transmission quality of the differential signal in the system, and the bandwidth of the differential signal is low.

The disclosed embodiments can improve the impedance of differential vias by using a larger center spacing between the signal hole and the ground via. Within the hole depth range required for the crimped signal pin of the high-speed connector, as shown in FIG7 , the aperture of the differential signal hole on the PCB is DS, the aperture of the ground vias on both sides of the differential signal hole is DG1, and the center spacing difference between the two adjacent second aperture segments of the differential signal hole and the ground via is greater than 0.001 mm. In this way, a portion of the differential signal hole utilizes a larger center spacing with the ground via, reduces the parasitic capacitance of the differential signal hole, increases the parasitic inductance of the differential signal hole, thereby improving the impedance of the differential via, ensuring the impedance continuity of the system link, and improving the propagation quality of the differential signal.

(II) BGA fan-out differential vias

As the signal rate increases, the center spacing of the differential signal holes of BGA gradually decreases, and may even be only 0.6mm, and the aperture of the BGA fan-out hole is mostly around 0.2mm, making it difficult to process the differential transmission lines in the BGA array. The impedance of the differential vias is relatively high, which may be 110-120 ohms. If it is discontinuous for the system impedance of 90 ohms, it will increase the discontinuity in the link and affect the signal quality.

The disclosed embodiment can reduce the differential via impedance and improve the bandwidth of the differential signal by using a closer center spacing between the signal hole and the ground via. As shown in FIG2 , in the BGA fan-out part, the differential signal aperture on the PCB is DS, the ground via apertures on both sides of the differential signal hole are DG1a and DG1b, the center spacing between the differential signal hole and the ground via is LSG1a and LSG1b, the ground via aperture of the remaining part is DG2a and DG2b, the center spacing between the differential signal hole and the ground via of the remaining part is LSG2a and LSG2b, LSG2a is at least 0.001mm smaller than LSG1a, and LSG2b is at least 0.001mm smaller than LSG1b. DG1a can be greater than, equal to, or less than DG2a, and DG1b can be greater than, equal to, or less than DG2b. In this way, a part of the differential signal hole utilizes the smaller center distance between the ground via hole, increases the parasitic capacitance of the differential signal hole, reduces the parasitic inductance of the differential signal hole, and thus reduces the impedance of the differential via hole, thereby ensuring the impedance continuity of the system link and the propagation quality of the key differential signal.

Those skilled in the art will appreciate that all or some of the steps in the method disclosed above, and the functional modules/units in the device may be implemented as software, firmware, hardware, or a suitable combination thereof. In hardware implementations, the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be Executed by several physical components in cooperation. Some physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, and the computer-readable medium can include a computer storage medium (or a non-temporary medium) and a communication medium (or a temporary medium). As known to those of ordinary skill in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassette, magnetic tape, disk storage or other magnetic storage device, or any other medium that can be used to store desired information and can be accessed by a computer. In addition, it is known to those of ordinary skill in the art that communication media generally contain computer-readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and may include any information delivery medium.

Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not for limiting purposes. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly noted, features, characteristics, and/or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and/or elements described in conjunction with other embodiments. Therefore, those skilled in the art will appreciate that various changes in form and detail may be made without departing from the scope of the invention as set forth in the appended claims.

Claims

A printed circuit board via structure comprises a signal hole and at least one ground via, wherein the signal hole and the ground via penetrate a multilayer structure of the printed circuit board, and the center distances between the signal hole and the ground via in different layers of the multilayer structure are not all equal.
The printed circuit board via structure according to claim 1, wherein the signal hole is a pair of differential vias including a first signal hole and a second signal hole; the number of the ground vias is at least two, at least one of the two ground vias forms a first via structure with the first signal hole, and at least one of the remaining ground vias forms a second via structure with the second signal hole; or,

The number of the signal hole is one.
The printed circuit board via structure according to claim 2, wherein the signal hole comprises at least one first aperture segment.
The printed circuit board via structure according to claim 3, wherein the signal hole comprises at least two first aperture segments, each of the first aperture segments is located in a different layer structure of the printed circuit board, and first pads are provided at both ends of each of the first aperture segments;

The printed circuit board via structure further includes a first electrical connector, which is respectively connected to first pads at two adjacent ends of two adjacent first aperture segments.
The printed circuit board via structure as claimed in claim 2, wherein at least one of the vias comprises at least one second aperture segment.
The printed circuit board via structure according to claim 5, wherein at least one of the ground vias comprises at least two second aperture segments, each of the second aperture segments is located in a different layer structure of the printed circuit board, and second pads are provided at both ends of each of the second aperture segments;

The printed circuit board via structure further includes a second electrical connector, which is respectively connected to second pads at two adjacent ends of two adjacent second aperture segments.
The printed circuit board via structure according to claim 6, wherein the difference between the apertures of two adjacent second aperture segments is greater than or equal to 0.001 mm.
The printed circuit board via structure according to claim 6, wherein the difference between the center distances between the signal hole and two adjacent second aperture segments is greater than or equal to 0.001 mm;

Among them, in the case where the signal hole is a pair of differential vias including a first signal hole and a second signal hole, the difference in center distance between the first signal hole and two adjacent second aperture segments of the first ground via is greater than or equal to 0.001 mm, the difference in center distance between the second signal hole and two adjacent second aperture segments of the second ground via is greater than or equal to 0.001 mm, the first ground via is a ground via in the first via structure, and the second ground via is a ground via in the second via structure.
A printed circuit board comprises the printed circuit board via structure according to any one of claims 1 to 8 and at least two layer structures, wherein the printed circuit board via structure runs through each of the at least two layer structures.
The printed circuit board according to claim 9, wherein

The center distances between the signal holes and the ground vias in different layers of the at least two layer structures are not equal, and in the arrangement direction of the signal holes and the ground vias, the center distances between the signal holes and the ground vias increase or decrease gradually; or,

In the case of a structure with at least three layers, the center distances between the signal holes and the ground via holes in at least two layers of the structure with at least three layers are equal.