WO2024066438A1

WO2024066438A1 - Firmware upgrade method and apparatus

Info

Publication number: WO2024066438A1
Application number: PCT/CN2023/097815
Authority: WO
Inventors: 李宇涛
Original assignee: 超聚变数字技术有限公司
Priority date: 2022-09-28
Filing date: 2023-06-01
Publication date: 2024-04-04
Also published as: CN115904426A

Abstract

Disclosed in the embodiments of the present application are a firmware upgrade method and apparatus. The method comprises: a device management unit sending a firmware upgrade command to a PCIE device by means of an I3C protocol interface; the device management unit receiving, by means of the I3C protocol interface, a response message, which is sent by the PCIE device; and the device management unit sending a firmware file to the PCIE device by means of the I3C protocol interface, wherein the firmware file is used to upgrade current firmware by means of the PCIE device. By using the embodiments of the present application, the upgrading of firmware of a PCIE device is no longer dependent on an OS and the constraints thereof, the usability and maintainability of the PCIE device are improved, the upgrade process is simplified, and the upgrade efficiency is improved.

Description

A firmware upgrade method and device

This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on September 28, 2022, with application number 202211193397.1 and application name “A firmware upgrade method and device”, the entire contents of which are incorporated by reference in this application.

Technical Field

The present application relates to the field of computer technology, and in particular to a firmware upgrade method and device.

Background technique

Peripheral Component Interconnect Express (PCIE) devices are PCIE peripherals of computer products, such as the central processing unit (CPU) system of a server, which realizes various functions such as network connection, storage access, and graphics processing. With the diversification of business and the complexity of applications, PCIE devices have more and more functions, and the internal architecture has become more and more complex, and the probability of problems has also increased. PCIE devices often need to upgrade firmware to add new functions or fix problems. However, the existing firmware upgrade process is complicated and the firmware upgrade efficiency is low.

Summary of the invention

The embodiments of the present application provide a firmware upgrade method and device, which eliminates the dependence and constraints of the firmware upgrade of the PCIE device on the OS, improves the usability and maintainability of the PCIE device, simplifies the upgrade process, and improves the upgrade efficiency.

In the first aspect, an embodiment of the present application provides a firmware upgrade method, including: a device management unit sends a firmware upgrade command to a PCIE device through an I3C protocol interface; receives a response message sent by the PCIE device through the I3C protocol interface; sends a firmware file to the PCIE device through the I3C protocol interface, and the firmware file is used by the PCIE device to upgrade the current firmware. The device management unit communicates with the PCIE device through the I3C protocol interface to implement the firmware upgrade of the PCIE device, get rid of the dependence and constraints of the firmware upgrade of the PCIE device on the OS, and improve the usability and maintainability of the PCIE device. In addition, through the write operation in the extended I3C communication protocol, the firmware of one or more PCIE devices is upgraded using an out-of-band communication method, which simplifies the upgrade process and improves the efficiency of the upgrade.

In a possible design, the device management unit receives an upgrade completion message sent by the PCIE device through the I3C protocol interface. By notifying the device management unit to complete the upgrade of the current firmware, the device management unit is prevented from repeatedly upgrading the current firmware of the PCIE device, thereby improving the efficiency of the upgrade.

In another possible design, the device management unit receives an interrupt request sent by the PCIE device through the I3C protocol interface; sends an interrupt response to the PCIE device through the I3C protocol interface, and the interrupt response is used to indicate that the PCIE device is allowed to send an upgrade completion message to the device management unit. The PCIE device uses an interrupt operation in the extended I3C communication protocol to notify the device management unit of the upgrade completion message in an out-of-band communication manner, thereby simplifying the upgrade process and improving the efficiency of the upgrade.

In another possible design, the device management unit sends a query request to the PCIE device through the I3C protocol interface, and the query request is used by the PCIE device to determine whether the current firmware upgrade is completed; if the PCIE device completes the upgrade of the current firmware, the device management unit receives the upgrade completion message sent by the PCIE device through the I3C protocol interface, and if the PCIE device does not complete the upgrade of the current firmware, the device management unit receives the waiting message sent by the PCIE device through the I3C protocol interface. The device management unit realizes the query of the firmware upgrade status of the PCIE device through the read operation in the extended I3C communication protocol, and realizes the monitoring and management of the firmware upgrade status of the PCIE device, which not only gets rid of the dependence and constraints of the firmware upgrade of the PCIE device on the OS, improves the usability and maintainability of the PCIE device, but also simplifies the query process and improves the query efficiency.

In another possible design, the device management unit sends a query command to the PCIE device through the I3C protocol interface and receives a query response from the PCIE device through the I3C protocol interface, so as to allow the device management unit to send a query request to the PCIE device through the I3C protocol interface.

In another possible design, the device management unit sends a firmware upgrade command to at least two PCIE devices in the PCIE device group through an I3C protocol interface.

In another possible design, the device management unit sends a firmware upgrade command to all PCIE devices on the I3C bus through an I3C protocol interface.

In another possible design, the response message includes confirmation information and negative confirmation information, the confirmation response is used to indicate that the current firmware meets the upgrade conditions, and the negative confirmation information is used to indicate that the current firmware does not meet the upgrade conditions; if the response message is confirmation information, the device management unit sends the firmware file to the PCIE device through the I3C protocol interface. By determining that the current firmware of the PCIE device meets the upgrade conditions, the firmware file is sent to the PCIE device, ensuring that the PCIE device successfully upgrades the current firmware.

In the second aspect, an embodiment of the present application provides a firmware upgrade method, including: a PCIE device receives a firmware upgrade command sent by a device management unit through an I3C protocol interface; the PCIE device sends a response message to the device management unit through the I3C protocol interface; the PCIE device receives a firmware file sent by the device management unit through the I3C protocol interface; the PCIE device upgrades the current firmware according to the firmware file. The device management unit communicates with the PCIE device through the I3C protocol interface to implement the firmware upgrade of the PCIE device, gets rid of the dependence and constraints of the firmware upgrade of the PCIE device on the OS, and improves the usability and maintainability of the PCIE device. In addition, through the write operation in the extended I3C communication protocol, the firmware of one or more PCIE devices is upgraded using an out-of-band communication method, which simplifies the upgrade process and improves the efficiency of the upgrade.

In a possible design, the PCIE device sends an upgrade completion message to the device management unit via the I3C protocol interface. By notifying the device management unit to complete the upgrade of the current firmware, the device management unit is prevented from repeatedly upgrading the current firmware of the PCIE device, thereby improving the efficiency of the upgrade.

In another possible design, the PCIE device sends an interrupt request to the device management unit through the I3C protocol interface; the PCIE device receives an interrupt response sent by the device management unit through the I3C protocol interface, and the interrupt response is used to indicate that the PCIE device is allowed to send an upgrade completion message. The PCIE device uses an interrupt operation in the extended I3C communication protocol to notify the device management unit of the upgrade completion message in an out-of-band communication manner, thereby simplifying the upgrade process and improving the efficiency of the upgrade.

In another possible design, the PCIE device receives a query request sent by the device management unit through the I3C protocol interface; the PCIE device determines whether the current firmware upgrade is completed according to the query request; if the PCIE device completes the current firmware upgrade, the PCIE device sends an upgrade completion message to the device management unit through the I3C protocol interface; if the PCIE device does not complete the current firmware upgrade, the PCIE device sends a waiting message to the device management unit through the I3C protocol interface. The device management unit realizes the query of the firmware upgrade status of the PCIE device through the read operation in the extended I3C communication protocol, realizes the monitoring and management of the firmware upgrade status of the PCIE device, which not only gets rid of the dependence and constraint of the firmware upgrade of the PCIE device on the OS, improves the usability and maintainability of the PCIE device, but also simplifies the query process and improves the query efficiency.

In another possible design, the PCIE device receives the query command sent by the device management unit through the I3C protocol interface; the PCIE device sends a query response to the device management unit through the I3C protocol interface, so as to allow the device management unit to send a query request to the PCIE device through the I3C protocol interface.

In another possible design, the response message includes confirmation information and negative confirmation information, and the PCIE device determines whether the current firmware meets the upgrade conditions; if the current firmware meets the upgrade conditions, the PCIE device sends confirmation information to the device management unit through the I3C protocol interface; if the current firmware does not meet the upgrade conditions, the PCIE device sends negative confirmation information to the device management unit through the I3C protocol interface. By indicating whether the current firmware meets the upgrade conditions, the device management unit is prevented from sending the firmware file when the upgrade conditions are not met.

In another possible design, if the current firmware meets the upgrade conditions, the PCIE device receives the firmware file sent by the device management unit through the I3C protocol interface. By determining that the current firmware of the PCIE device meets the upgrade conditions, the firmware file is received for upgrading, ensuring that the PCIE device successfully upgrades the current firmware.

In a third aspect, an embodiment of the present application provides a firmware upgrade device, including:

The sending module is used to send a firmware upgrade command to the PCIE device through the I3C protocol interface;

A receiving module is used to receive a response message sent by a PCIE device through an I3C protocol interface;

The sending module is also used to send a firmware file to the PCIE device through the I3C protocol interface. The firmware file is used by the PCIE device to upgrade the current firmware.

In a possible design, the receiving module is also used to receive an upgrade completion message sent by the PCIE device through an I3C protocol interface.

In another possible design, the receiving module is further used to receive an interrupt request sent by the PCIE device through the I3C protocol interface; the sending module is further used to send an interrupt response to the PCIE device through the I3C protocol interface, and the interrupt response is used to indicate that the PCIE device is allowed to send an upgrade completion message.

In another possible design, the sending module is also used to send a query request to the PCIE device through the I3C protocol interface, and the query request is used by the PCIE device to determine whether the upgrade of the current firmware is completed; the receiving module is also used to receive the upgrade completion message sent by the PCIE device through the I3C protocol interface if the PCIE device has completed the upgrade of the current firmware, and receive the waiting message sent by the PCIE device through the I3C protocol interface if the PCIE device has not completed the upgrade of the current firmware.

In another possible design, the sending module is further used to send a query command to the PCIE device through the I3C protocol interface; the receiving module is further used to receive a query response sent by the PCIE device through the I3C protocol interface.

In another possible design, the sending module is further used to send a firmware upgrade command to at least two PCIE devices in the PCIE device group through an I3C protocol interface.

In another possible design, the sending module is also used to send a firmware upgrade command to all PCIE devices on the I3C bus through the I3C protocol interface.

In another possible design, the response message includes confirmation information and negative confirmation information, the confirmation response is used to indicate that the current firmware meets the upgrade conditions, and the negative confirmation information is used to indicate that the current firmware does not meet the upgrade conditions;

The sending module is also used to send the firmware file to the PCIE device through the I3C protocol interface if the response message is confirmation information.

The operations and beneficial effects performed by the firmware upgrade device can refer to the method and beneficial effects of the first aspect mentioned above, and the repeated parts will not be repeated.

In a fourth aspect, an embodiment of the present application provides a firmware upgrade device, including:

A receiving module, used for receiving a firmware upgrade command sent by a device management unit through an I3C protocol interface;

A sending module, used for sending a response message to the device management unit through an I3C protocol interface;

The receiving module is also used to receive the firmware file sent by the device management unit through the I3C protocol interface;

The processing module is used to upgrade the current firmware according to the firmware file.

In a possible design, the sending module is also used to send an upgrade completion message to the device management unit through the I3C protocol interface.

In another possible design, the sending module is also used to send an interrupt request to the device management unit through the I3C protocol interface; the receiving module is also used to receive an interrupt response sent by the device management unit through the I3C protocol interface, and the interrupt response is used to indicate that the PCIE device is allowed to send an upgrade completion message.

In another possible design, the receiving module is also used to receive a query request sent by the device management unit through the I3C protocol interface; the processing module is also used to determine whether the current firmware is upgraded based on the query request; the sending module is also used to send an upgrade completion message to the device management unit through the I3C protocol interface if the PCIE device has completed upgrading the current firmware, and send a waiting message to the device management unit through the I3C protocol interface if the PCIE device has not completed upgrading the current firmware.

In another possible design, the receiving module is further used to receive a query command sent by the device management unit through the I3C protocol interface; the sending module is further used to send a query response to the device management unit through the I3C protocol interface.

In another possible design, the response message includes confirmation information and negative confirmation information.

The processing module is also used to determine whether the current firmware meets the upgrade conditions;

The sending module is used to send confirmation information to the device management unit through the I3C protocol interface if the current firmware meets the upgrade conditions; if the current firmware does not meet the upgrade conditions, send negative confirmation information to the device management unit through the I3C protocol interface.

In another possible design, the receiving module is also used to, if the current firmware meets the upgrade conditions, enable the PCIE device to receive the firmware file sent by the device management unit through the I3C protocol interface.

The operations and beneficial effects performed by the firmware upgrade device can refer to the method and beneficial effects of the second aspect mentioned above, and the repeated parts will not be repeated.

In a fifth aspect, the present application provides a device management unit, which includes a processor and a memory, the memory being used to store computer-executable instructions; the processor being used to execute the computer-executable instructions stored in the memory, so that the device management unit performs a method such as any one of the methods in the first aspect.

In a sixth aspect, the present application provides a PCIE device, the PCIE device comprising a processor and a memory, the memory being used to store computer execution instructions; the processor being used to execute the computer execution instructions stored in the memory, so that the PCIE device executes a method such as any one of the methods in the second aspect.

In a seventh aspect, the present application provides a computer-readable storage medium for storing a computer program. When the computer program is executed, the method of any one of the first and second aspects is implemented.

In an eighth aspect, the present application provides a computer program product comprising a computer program, which, when executed, enables the method of any one of the first and second aspects to be implemented.

In a ninth aspect, the present application provides a firmware upgrade system, the firmware upgrade system comprising a device management unit and a PCIE device, the device management unit is used to execute a method such as any one of the first aspect, and the PCIE device is used to execute a method such as any one of the second aspect.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions in the embodiments of the present application or the background technology, the drawings required for use in the embodiments of the present application or the background technology will be described below.

FIG1 is a schematic diagram of the architecture of a firmware upgrade system provided in an embodiment of the present application;

FIG2 is a schematic diagram of a write operation command timing provided by an embodiment of the present application;

FIG3 is a schematic diagram of another write operation command timing provided by an embodiment of the present application;

FIG4 is a schematic diagram of another write operation command timing provided by an embodiment of the present application;

FIG5 is a schematic diagram of an interrupt operation command timing provided by an embodiment of the present application;

FIG6 is a schematic diagram of a data format of a target required data byte field provided in an embodiment of the present application;

FIG7 is a schematic diagram of a read operation command timing provided by an embodiment of the present application;

FIG8 is a flowchart of a firmware upgrade method provided in an embodiment of the present application;

FIG9 is a schematic diagram of a file format of a firmware file provided in an embodiment of the present application;

FIG10 is a flow chart of another firmware upgrade method provided in an embodiment of the present application;

FIG11 is a flow chart of another firmware upgrade method provided in an embodiment of the present application;

FIG12 is a schematic diagram of a firmware upgrade device provided in an embodiment of the present application;

FIG13 is a schematic diagram of another firmware upgrade device provided in an embodiment of the present application;

14 is a schematic diagram of the structure of a device management unit provided in an embodiment of the present application;

FIG. 15 is a schematic diagram of the structure of a PCIE device provided in an embodiment of the present application.

Detailed ways

The following is an explanation of the terms involved in the embodiments of the present application;

Inter Integrated Circuit (I2C) bus: a two-wire synchronous serial bus that adopts a master-slave communication mechanism, uses a serial clock line (SCL) and a serial data line (SDA) for communication, supports multiple nodes connected to the same bus, and distinguishes each node by physical address.

Improved Inter Integrated Circuit (I3C) bus: It is an improved version of the I2C bus. The I3C bus has the same physical form as the I2C bus, uses SCL and SDA for communication, and is backward compatible with I2C. Compared with I2C, the I3C bus has a high data rate, supports dynamic address allocation to support multiple nodes with the same physical address to share the bus, and supports an interrupt mechanism to actively send data from the node to the master node.

Firmware: Code running on the chip of a PCIE device, used to implement the functions of the PCIE device. For example, the firmware of a network card can be used to implement the network connection, message sending and receiving, and protocol unloading of the network card.

Out-of-band and in-band: Out-of-band is a description relative to the service interface PCIE (called in-band), that is, the native PCIE communication method is not used, such as accessing the PCIE configuration space of the PCIE device. Out-of-band communication refers to communication achieved through the out-of-band interface protocol of the PCIE device. Among them, the out-of-band interface protocol includes but is not limited to the System Management Bus (System Management Bus, SMBus), I3C, Network Controller Sideband Interface (Network Controller Sideband Interface, NC-SI), etc.

PCIE devices need to upgrade their firmware to add new functions or fix problems. The firmware of PCIE devices can be upgraded in the following ways: First, use the manufacturer's tool to upgrade the firmware of the PCIE device. Among them, the manufacturer's tool is installed and runs on the operating system (OS), and the OS is installed and runs on the CPU system of the server. The manufacturer's tool communicates with the firmware of the PCIE device through the PCIE interface, transfers the firmware file to be upgraded to the PCIE device, and instructs the PCIE device to upgrade. However, the manufacturer's tool is installed and runs in the OS, and there is a coupling relationship with the OS version. The manufacturer needs to develop and maintain supporting tools for each OS for firmware upgrade, which is a lot of work, and the firmware upgrade function of the PCIE device has application limitations. Second, the firmware of the PCIE device is upgraded through out-of-band communication. However, the existing out-of-band interface protocol is complex in level, has a large overhead, and the firmware upgrade process is complex, and the firmware upgrade efficiency is low. In addition, when the server is in standby state, the PCIE interface is always in a reset state, and the device management unit cannot communicate with the PCIE device. In order to solve the above technical problems, the embodiments of the present application provide the following solutions.

As shown in FIG. 1 , FIG. 1 is a schematic diagram of the architecture of a firmware upgrade system provided by an embodiment of the present application. The firmware upgrade system may include a device management unit (Management Device) and a PCIE device. The device management unit may be independent of the OS and CPU in the computer system, and is used to perform component management and asset management functions in the computer system, such as power on and off control, fan speed regulation, electronic label management, etc. The device management unit may communicate with the PCIE device through the I3C protocol interface, send a firmware upgrade command to the PCIE device, and send the firmware file to be upgraded to the PCIE device, so that the PCIE device performs the firmware upgrade. Among them, the device management unit may be a baseboard management controller (Board Management Controller, BMC) or other controllers, such as a complex programmable logic device (Complex Programmable Logic Device, CPLD), a digital signal processor (Digital Singnal Processor, DSP), etc. PCIE devices may include but are not limited to network cards, redundant arrays of independent disks (Redundant Array of Independent Disks, RAID) cards, graphics cards, solid state drives (Solid State Disk, SSD) cards, acceleration cards, etc.

Among them, the device management unit is the master node (i.e., the control node (Controller)) of the I3C bus in the computer system, and the PCIE device is the slave node (i.e., the target device (Target Device)) of the I3C bus. I3C and I2C are compatible in physical signals, and both use the SCL bus and SDA bus. The PCIE device and the device management unit actually utilize the physical connection of the existing I2C channel and run the I3C communication protocol for communication without adding additional physical signals.

The embodiment of the present application extends the I3C communication protocol. The I3C communication protocol defines read operations, write operations, and interrupt operations. Through the I3C write operations and interrupt operations, the device management unit can upgrade the firmware of the PCIE device. Through the I3C read operation, the device management unit can query the firmware upgrade status of the PCIE device. The I3C communication protocol is specifically specified as follows:

As shown in FIG. 2 , FIG. 2 is a schematic diagram of a write operation command timing provided by an embodiment of the present application. In a unicast transmission scenario, a write operation The command sequence includes the start (S) field, the I3C reserved address (I3C Reserved Address) field, the first read/write (R/W) field, the first acknowledgement (A) field, the I3C direct communication common command word (I3C Directed Common Command Code, I3C Directed CCC) field, the first parity (Par) field, the repeat start (Sr) field, the target address (Target Address) field, the second read/write (R/W) field, the second acknowledgement field, the data 1 (Data1) field, the second parity field, ..., the data N (Data N) field, the third parity field and the stop (P) field. Among them:

Start (S) field: indicates the start of the command sequence.

I3C Reserved Address field: represents the I3C addresses of all PCIE devices on the I3C bus. The I3C Reserved Address field is a broadcast address field. In the embodiment of the present application, it can represent the I3C addresses of multiple PCIE devices on the I3C bus. For example, the value of the I3C Reserved Address field can be 7’h7E.

The first read/write (R/W) field: indicates that the device management unit initiates a read/write operation to multiple PCIE devices on the I3C bus. The value of the first read/write field can be 0x1 or 0x0, 0x1 indicates read (R), and 0x0 indicates write (W).

First confirmation field: indicates the response of the PCIE device to the read/write operation initiated by the device management unit, corresponding to the first read/write field. The value of the first confirmation field can be 0x1 or 0x0. Schematically, 0x0 indicates confirmation (Acknowledge, ACK), and 0x1 indicates negative confirmation (Negative-Acknowledge, NACK).

I3C Directed CCC field: indicates that the I3C direct communication method is adopted, that is, the point-to-point communication method. The I3C Directed CCC field can use the reserved command word in the common command word CCC (Common Command Code) field. The value range of the reserved command word can be 0xE0-0xFE, and different values of the reserved command word can represent different functions. For example, the value of the reserved command word is 0xFA, that is, when the value of the I3C Directed CCC field is 0xFA, it indicates the operation of upgrading the firmware of the target PCIE device.

The first parity (Parity, Par) field: indicates that a parity check is performed on the I3C Directed CCC field.

Repeat Start (Sr) field: indicates the restart of the command sequence. A command sequence on the I3C bus (the process from Start to Stop) includes multiple stages, and Sr is used at the beginning of each stage to indicate a restart.

Target Address field: indicates the I3C address of the target PCIE device on the I3C bus.

The second Read/Write (R/W) field indicates that the device management unit initiates a read/write operation to the target PCIE device.

The second confirmation field: indicates the response of the target PCIE device to the read/write operation initiated by the device management unit, corresponding to the second read/write field.

Data 1 field - Data N field: indicates the content of the firmware file written by the device management unit to the target PCIE device.

Second parity check field: indicates that a parity check is performed on the contents of the firmware file in the data 1 field.

The third parity check field: indicates that a parity check is performed on the contents of the firmware file in the data N field.

Stop (P) field: indicates the end of the command sequence.

The first confirmation field and the second confirmation field are actions performed by the PCIE device, and the other fields are actions performed by the device management unit. The firmware of the target PCIE device among the multiple PCIE devices on the I3C bus can be upgraded through the write operation command sequence.

As shown in Figure 3, Figure 3 is a schematic diagram of another write operation command timing provided by an embodiment of the present application. In a multicast transmission scenario, the write operation command timing includes a group address (Group Address) field, which is different from the target address (Target Address) field in Figure 2. The group address (Group Address) field represents the I3C address of the PCIE device group. If there are at least two PCIE devices of the same model among the multiple PCIE devices on the I3C bus, the at least two PCIE devices of the same model can be divided into a PCIE device group, and each PCIE device group corresponds to a group address (Group Address). In addition, the other fields in the write operation command timing shown in Figure 3 have the same meaning as the other fields in the write operation command timing shown in Figure 2. The specific implementation method can refer to the write operation command timing shown in Figure 2, which will not be repeated here.

The first confirmation field and the second confirmation field are actions performed by the PCIE device, and the other fields are actions performed by the device management unit. The write operation command sequence shown in FIG. 3 can be used to simultaneously upgrade the firmware of at least two PCIE devices of the same model in the PCIE device group.

As shown in Figure 4, Figure 4 is a schematic diagram of another write operation command timing provided by an embodiment of the present application. If the models of all PCIE devices on the I3C bus are the same, a broadcast transmission method can be used. In the broadcast transmission scenario, the write operation command timing includes the start (Start, S) field, the I3C reserved address (I3C Reserved Address) field, the first read/write (read/Write, R/W) field, the first confirmation (Acknowledge, A) field, the I3C broadcast communication common command word (I3C Broadcast Common Command Code, I3C Broadcast CCC) field, the first parity (Parity, Par) field, the data 1 (Data1) field, the second parity field, ..., the data N field, the third parity field and the stop (Stop, P) field. Among them:

I3C Broadcast CCC field: indicates that the I3C broadcast communication method is adopted. The I3C Broadcast CCC field can use the reserved command word in the public command word CCC field, and the value range of the reserved command word can be 0x61-0x7F. Different values of the reserved command word can represent different functions. For example, the value of the reserved command word is 0x7A, that is, when the value of the I3C Broadcast CCC field is 0x7A, it means that the firmware of all PCIE devices is upgraded.

Due to the I3C broadcast communication mode, relative to the write operation command timing shown in Figures 2 and 3, it is not necessary to upgrade the firmware of a certain PCIE device or a certain PCIE device group, but to upgrade the firmware of all PCIE devices on the I3C bus. Therefore, after the I3C Broadcast CCC field and the first parity check, there is the Data 1 field - Data N field, that is, the device management unit writes the content of the firmware file to all PCIE devices on the I3C bus.

The first confirmation field is the action performed by the PCIE device, and the other fields are the actions performed by the device management unit. The firmware of all PCIE devices on the I3C bus can be upgraded at the same time through the write operation command sequence.

As shown in Figure 5, Figure 5 is a schematic diagram of an interrupt operation command sequence provided by an embodiment of the present application. The interrupt operation command sequence includes a start (Start, S) field, a target address (Target Address) field, a read/write (Read/Write, R/W) field, an acknowledgement (Acknowledge, A) field, a target mandatory data byte (Target Mandatory Data Byte, Target MDB) field, a first transition (Transition, T) field, a target in-band interrupt data 1 (Target InBand Interrupt Data1, Target IBI Data1), a second transition (Transition, T) field, ..., a target in-band interrupt data N (Target InBand Interrupt Data N, Target IBI Data N), a third transition (Transition, T) field, and a stop (Stop, P) field. Among them:

Start (S) field: indicates the start of the command sequence.

Read/Write (R/W) field: indicates that the target PCIE device initiates a read/write operation to the device management unit. The value of the read/write field can be 0x1 or 0x0, 0x1 indicates read (R), and 0x0 indicates write (W).

Acknowledge (A) field: indicates the response of the device management unit to the read and write operation initiated by the target PCIE device. The value of the Acknowledge field can be 0x1 or 0x0, 0x0 indicates Acknowledge (ACK), and 0x1 indicates Negative-Acknowledge (NACK).

Target required data byte (Target MDB) field: indicates the interrupt group number and interrupt number of the interrupt operation initiated by the target PCIE device to the device management unit, and the interrupt group number and interrupt number are used to indicate the interrupt type and/or interrupt content. In an embodiment of the present application, the interrupt group number and interrupt number can be used to indicate the upgrade completion message of the firmware of the PCIE device being transmitted. As shown in Figure 6, Figure 6 is a data format schematic diagram of a Target MDB field provided in an embodiment of the present application. The Target MDB field includes a 3-bit interrupt group number field and a 5-bit interrupt number field. Among them, the value of the interrupt group number field can be 3'b000, and the value range of the interrupt number field can be 5'h00-5'h1F. For example, when the value of the interrupt group number field and the value of the interrupt number field can be 5'h1B, it indicates a request to transmit the firmware upgrade completion message of the PCIE device.

First Transition (T) field: indicates whether the data transmission is completed after sending the data in the Target MDB field. The value of the conversion field can be 0x1 or 0x0. 0x1 indicates that there is more data to be transmitted, and 0x0 indicates that the data transmission is completed, that is, the data byte in front of this field is the last data byte.

Target IBI Data 1-Target IBI Data N: represents the content of the interrupt transmitted by the target device to the control node. In the embodiment of the present application, it represents the content of the upgrade completion message sent by the PCIE device to the device management unit.

The second Transition (T) field indicates whether the content of the firmware upgrade completion message has been sent after the Target IBI Data 1 is sent. 0x1 indicates that there is more content of the upgrade completion message to be sent later, and 0x0 indicates that the content of the upgrade completion message has been sent.

The third Transition (T) field indicates whether the content of the upgrade completion message has been sent after the Target IBI Data N is sent. 0x1 indicates that there is more content of the upgrade completion message to be sent later, and 0x0 indicates that the content of the upgrade completion message has been sent.

Stop (P) field: indicates the end of the command sequence.

The Start (S) field, the Acknowledge (A) field and the Stop (P) field are actions performed by the device management unit, and the other fields are actions performed by the PCIE device. The PCIE device can send an upgrade completion message to the device management unit by interrupting the operation command sequence.

As shown in Figure 7, Figure 7 is a schematic diagram of a read operation command sequence provided by an embodiment of the present application. The read operation command sequence includes a start (Start, S) field, an I3C reserved address (I3C Reserved Address) field, a first read/write (Read/Write, R/W) field, a first confirmation (Acknowledge, A) field, a common command word for I3C direct communication (I3C Directed Common Command Code, I3C Directed CCC) field, a parity (Parity, Par) field, a first repeat start (Repeat Start, Sr) field, a target address (Target Address) field, a second read/write (Read/Write, R/W) field, a second confirmation field, a first wait message (Wait Message) word, and a second confirmation field. segment, the first transition (Transition, T) field, ..., the second repeat start (Repeat Start, Sr) field, the target address (Target Address) field, the third read/write (Read/Write, R/W) field, the third confirmation field, the second wait message (Wait Message) field, the second transition (Transition, T) field, the third repeat start (Repeat Start, Sr) field, the target address (Target Address) field, the fourth read/write (Read/Write, R/W) field, the fourth confirmation field, the update complete message (Update Complete) field, the third transition (Transition, T) field and the stop (Stop, P) field. Among them:

I3C Directed CCC field: indicates the use of I3C direct communication, that is, point-to-point communication. The I3C Directed CCC field can use the reserved command word in the public command word CCC field. The value range of the reserved command word is 0xE0-0xFE. Different values of the reserved command word represent different functions. For example, the value of the reserved command word is 0xFB, that is, when the value of the I3C Directed CCC field is 0xFB, it means querying the firmware upgrade status of the PCIE device.

Wait Message field: indicates that when the PCIE device has not completed the firmware upgrade operation, it notifies the device management unit to continue waiting. The Wait Message field can use the reserved command word in the CCC field. The value range of the reserved command word can be 0xE0-0xFE, and different values of the reserved command word represent different functions. For example, when the value of the reserved command word is 0xEF, that is, when the value of the Wait Message field is 0xEF, it means that the PCIE device notifies the device management unit to continue waiting.

Update Complete field: indicates the update completion message, that is, when the PCIE device has completed the firmware upgrade operation, it notifies the device management unit that the firmware upgrade is complete. The Update Complete field can use the reserved command word in the CCC field. The value of the Update Complete field is consistent with the value of the I3C Directed CCC field, indicating a response to querying the firmware upgrade status of the PCIE device.

After the device management unit initiates a read operation to the PCIE device, if the PCIE device has not completed the firmware upgrade operation, it notifies the device management unit to wait. If the device management unit continues to query the firmware upgrade status of the PCIE device, it re-initiates a repeat start (Repeat Start, Sr) process. The next time the PCIE device may continue to notify the device management unit to wait, and the cycle repeats multiple times. Finally, if the PCIE device notifies the device management unit of the upgrade completion message, the device management unit ends the entire command sequence. The entire process of querying the firmware upgrade status of the PCIE device is divided into multiple stages, so the above-mentioned read operation command sequence includes multiple stages. Among them, the first repeat start (Repeat Start, Sr) field, the target address (Target Address) field, the second read/write (Read/Write, R/W) field, the second confirmation field, the first wait message (Wait Message) field, and the first transition (Transition, T) field are the first stage. Second Repeat Start (Repeat Start, Sr) The first stage is the Nth stage. The third repeat start (Sr) field, the target address (Target Address) field, the fourth read/write (R/W) field, the third confirmation field, the second wait message (Wait Message) field, and the second transition (T) field are the Nth stage. The third repeat start (Sr) field, the target address (Target Address) field, the fourth read/write (R/W) field, the fourth confirmation field, the update complete message (Update Complete) field, and the third transition (T) field are the last stage.

The meanings of other fields in the read operation command timing shown in FIG. 7 are similar to those of the fields in FIG. 2 to FIG. 6 . For specific implementation methods, reference may be made to the fields in FIG. 2 to FIG. 6 , which will not be described in detail here.

Among them, the first confirmation field, the second confirmation field, the first waiting field, the first conversion field, the third confirmation field, the second waiting field, the second conversion field, the fourth confirmation field, the update completion message field, and the third conversion field are actions performed by the PCIE device, and the other fields are actions performed by the device management unit. Through the read operation command timing shown in Figure 7, the device management unit can query the firmware upgrade status of the PCIE device.

It should be noted that the interrupt operation command timing shown in FIG. 5 and the read operation command timing shown in FIG. 7 can be applied to unicast transmission scenarios, as well as multicast transmission scenarios and broadcast transmission scenarios.

Based on the above I3C communication protocol, the embodiment of the present application provides the following firmware upgrade method.

As shown in Figure 8, Figure 8 is a flowchart of a firmware upgrade method provided in an embodiment of the present application. The steps in the embodiment of the present application mainly include:

S801, the device management unit sends a firmware upgrade command to the PCIE device through the I3C protocol interface.

In one implementation, the device management unit may select a PCIE device from multiple PCIE devices on the I3C bus as the target PCIE device, and send a firmware upgrade command to the target PCIE device via the I3C protocol interface, wherein the firmware upgrade command includes the I3C address of the target PCIE device.

In another implementation, if there are at least two PCIE devices of the same model among the multiple PCIE devices on the I3C bus, the at least two PCIE devices of the same model can be divided into a PCIE device group, and each PCIE device group corresponds to a group address (Group Address). The device management unit sends a firmware upgrade command to at least two PCIE devices in the PCIE device group through the I3C protocol interface, wherein the firmware upgrade command includes the I3C address (i.e., the group address) of the PCIE device group.

In another implementation, if all PCIE devices on the I3C bus have the same model, the device management unit sends a firmware upgrade command to all PCIE devices on the I3C bus through the I3C protocol interface in a broadcasting manner, wherein the firmware upgrade command includes a broadcast address.

S802, the PCIE device sends a response message to the device management unit through the I3C protocol interface.

Optionally, the response message may include confirmation information and negative confirmation information. After receiving the firmware upgrade command, the PCIE device may determine whether the current firmware meets the upgrade conditions, such as determining whether the PCIE device currently has a process block, whether it is in a busy state, or whether there is sufficient storage space. If it is determined that the current firmware meets the upgrade conditions, a confirmation message is sent to the device management unit through the I3C protocol interface. If it is determined that the current firmware does not meet the upgrade conditions, a negative confirmation message is sent to the device management unit through the I3C protocol interface.

S803, the device management unit sends the firmware file to the PCIE device through the I3C protocol interface.

Specifically, if the device management unit determines, based on the response message, that the current firmware of the PCIE device needs to be upgraded, the firmware file is sent to the PCIE device through the I3C protocol interface.

As shown in Figure 9, Figure 9 is a schematic diagram of the file format of a firmware file provided in an embodiment of the present application. The firmware file includes a header area and a data area. The header area includes but is not limited to the file name (Name), version number (Version), release time (Release Time), device identification (Device ID), size (Size), and checksum (Checksum). The data area includes the firmware code. By defining the file format of the firmware file, the reliability of the firmware file transmission can be guaranteed, as well as the compatibility of the I3C protocol interface between the device management unit and the PCIE device.

S804: The PCIE device upgrades the current firmware of the PCIE device according to the firmware file.

Specifically, after receiving the firmware file, the PCIE device writes the firmware file to a storage medium, such as Flash memory/non-volatile random access memory (NVRAM), to complete the upgrade of the current firmware.

Optionally, if the device management unit upgrades the firmware of multiple PCIE devices or PCIE device groups at the same time, the device management unit can send firmware files to multiple PCIE devices or PCIE device groups at the same time through the I3C protocol interface. After multiple PCIE devices or PCIE device groups receive the firmware files, each PCIE device performs the firmware upgrade operation.

In the embodiment of the present application, the device management unit communicates with the PCIE device through the I3C protocol interface to implement the firmware upgrade of the PCIE device, thereby getting rid of the dependence and constraints of the firmware upgrade of the PCIE device on the OS, and improving the usability and maintainability of the PCIE device. In addition, through the write operation in the extended I3C communication protocol, the firmware of one or more PCIE devices is upgraded by using an out-of-band communication method, which simplifies the upgrade process and improves the efficiency of the upgrade.

As shown in Figure 10, Figure 10 is a flow chart of another firmware upgrade method provided in an embodiment of the present application. The steps in the embodiment of the present application mainly include:

S1001, the device management unit sends a firmware upgrade command to the PCIE device through the I3C protocol interface.

S1002, the PCIE device sends a response message to the device management unit through the I3C protocol interface.

S1003, the device management unit sends the firmware file to the PCIE device through the I3C protocol interface.

S1004: The PCIE device upgrades the current firmware of the PCIE device according to the firmware file.

The implementation method of S1001-S1004 is the same as the implementation method of S801-S804 in the embodiment shown in FIG8 . For the specific implementation method, reference may be made to S801-S804 shown in FIG8 , and will not be described in detail here.

S1005, the PCIE device sends an interrupt request to the device management unit through the I3C protocol interface.

The interrupt request may include an interrupt group number and an interrupt number, and the interrupt group number and the interrupt number may indicate an interrupt type and/or an interrupt content. For example, when the interrupt group number is 3'b000 and the interrupt number is 5'h1B, it indicates a request to transmit an upgrade completion message of the firmware of the PCIE device.

S1006: The device management unit sends an interrupt response to the PCIE device through the I3C protocol interface.

Optionally, the interrupt response may include confirmation information and negative confirmation information. When the device management unit accepts the interrupt request of the PCIE device, it may send confirmation information to the PCIE device, and the confirmation information is used to indicate that the PCIE device is allowed to send an upgrade completion message. When the device management unit does not accept the interrupt request of the PCIE device, it may send negative confirmation information to the PCIE device, and the negative confirmation information is used to indicate that the PCIE device is not allowed to send an upgrade completion message.

S1007, the PCIE device sends an upgrade completion message to the device management unit through the I3C protocol interface.

Optionally, when the interrupt response received by the PCIE device is confirmation information, the PCIE device sends an upgrade completion message to the device management unit through the I3C protocol interface.

In the embodiment of the present application, the PCIE device uses an out-of-band communication method to notify the device management unit of the upgrade completion message through an interrupt operation in the extended I3C communication protocol, thereby simplifying the upgrade process and improving the efficiency of the upgrade.

During the process of the PCIE device executing the firmware upgrade, the device management unit can query the firmware upgrade status of the PCIE device. The process of the device management unit querying the firmware upgrade status of the PCIE device is described in detail below.

As shown in Figure 11, Figure 11 is a flow chart of another firmware upgrade method provided in an embodiment of the present application. The steps in the embodiment of the present application mainly include:

S1101, the device management unit sends a query command for the firmware upgrade status to the PCIE device.

S1102, the PCIE device sends a query response of the firmware upgrade status to the device management unit.

Optionally, the query response may include confirmation information and negative confirmation information. When the PCIE device accepts the query of the device management unit on the firmware upgrade status, the confirmation information may be sent to the PCIE device. When the device management unit does not accept the query of the device management unit on the firmware upgrade status, the confirmation information may be sent to the PCIE device. When querying, a negative confirmation message can be sent to the PCIE device.

S1103, the device management unit sends a query request to the PCIE device.

S1104, the PCIE device determines whether the firmware upgrade is completed. If the PCIE device determines that the firmware upgrade is completed, S1105 is executed, and if the PCIE device does not complete the firmware upgrade, S1106 is executed.

S1105, the PCIE device sends an upgrade completion message to the device management unit.

S1106, the PCIE device sends a waiting message to the device management unit.

S1107, the device management unit determines whether to continue to query the firmware upgrade status of the PCIE device. If the device management unit continues to query the firmware upgrade status of the PCIE device, S1103 is re-executed. If the device management unit determines not to continue to query the firmware upgrade status of the PCIE device, S1108 is executed.

S1108: The device management unit ends the query operation.

Optionally, after the device management unit finishes the query on the firmware upgrade status, it can re-initiate the query on the firmware upgrade status after waiting for a period of time, or wait for an interrupt request sent by the PCIE device, wherein the interrupt request is used to notify the device management unit that the firmware upgrade is completed.

It should be noted that, in the above interaction processes, the device management unit communicates with the PCIE device through the I3C protocol interface.

In the embodiment of the present application, the device management unit realizes the query of the firmware upgrade status of the PCIE device through the read operation in the extended I3C communication protocol, and realizes the monitoring and management of the firmware upgrade status of the PCIE device. It not only gets rid of the dependence and constraints of the firmware upgrade of the PCIE device on the OS, improves the usability and maintainability of the PCIE device, but also simplifies the query process and improves the query efficiency.

The embodiment of the present application can divide the functional modules of the device management unit and the PCIE device according to the above method example. For example, each functional module can be divided corresponding to each function, or two or more functions can be integrated into one processing module. The above integrated module can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules in the embodiment of the present application is schematic and is only a logical functional division. There may be other division methods in actual implementation. The following is an example of using each functional module divided according to each function to illustrate.

As shown in Figure 12, Figure 12 is a schematic diagram of a firmware upgrade device provided in an embodiment of the present application. The firmware upgrade device may include a sending module 1201 and a receiving module 1202. The sending module 1201 and the receiving module 1202 can communicate with the outside, and the sending module 1201 and the receiving module 1202 can also be called a communication interface, a transceiver unit or a transceiver module. The sending module 1201 and the receiving module 1202 can be used to perform the actions performed by the device management unit in the above method embodiment.

In one possible design, the firmware upgrade device may implement steps or processes executed by the device management unit in the above method embodiment. For example, it may be a device management unit, or a chip or circuit configured in the device management unit.

The sending module 1201 is used to send a firmware upgrade command to the PCIE device through the I3C protocol interface;

The receiving module 1202 is used to receive a response message sent by the PCIE device through the I3C protocol interface;

The sending module 1201 is further used to send a firmware file to the PCIE device through the I3C protocol interface, and the firmware file is used for the PCIE device to upgrade the current firmware.

Optionally, the receiving module 1202 is further configured to receive an upgrade completion message sent by the PCIE device through the I3C protocol interface.

Optionally, the receiving module 1202 is further used to receive an interrupt request sent by the PCIE device through the I3C protocol interface; the sending module 1201 is further used to send an interrupt response to the PCIE device through the I3C protocol interface, and the interrupt response is used to indicate that the PCIE device is allowed to send the upgrade completion message.

Optionally, the sending module 1201 is further used to send a query request to the PCIE device through the I3C protocol interface, and the query request is used by the PCIE device to determine whether the upgrade of the current firmware is completed; the receiving module 1202 is also used to receive the upgrade completion message sent by the PCIE device through the I3C protocol interface if the PCIE device completes the upgrade of the current firmware, and if the PCIE device completes the upgrade of the current firmware, If the PCIE device has not completed upgrading the current firmware, a waiting message sent by the PCIE device is received through the I3C protocol interface.

Optionally, the sending module 1201 is further configured to send a query command to the PCIE device through the I3C protocol interface;

The receiving module is further used to receive a query response sent by the PCIE device through the I3C protocol interface.

Optionally, the sending module 1201 is further configured to send the firmware upgrade command to at least two PCIE devices in the PCIE device group through the I3C protocol interface.

Optionally, the sending module 1201 is further configured to send the firmware upgrade command to all PCIE devices on the I3C bus through the I3C protocol interface.

Optionally, the response message includes confirmation information and negative confirmation information, the confirmation response is used to indicate that the current firmware meets the upgrade conditions, and the negative confirmation information is used to indicate that the current firmware does not meet the upgrade conditions;

The sending module 1201 is further configured to send the firmware file to the PCIE device through the I3C protocol interface if the response message is confirmation information.

It should be noted that the implementation of each module may also correspond to the corresponding description of the method embodiments shown in FIG. 8 , FIG. 10 and FIG. 11 , and execute the methods and functions executed by the device management unit in the above embodiments.

As shown in Figure 13, Figure 13 is a schematic diagram of another firmware upgrade device provided in an embodiment of the present application. The firmware upgrade device may include a receiving module 1301, a processing module 1302, and a sending module 1303. The receiving module 1301 and the sending module 1303 can communicate with the outside, and the receiving module 1301 and the sending module 1303 can also be called a communication interface, a transceiver unit or a transceiver module, and the processing module 1302 can perform processing related actions. The receiving module 1301, the processing module 1302, and the sending module 1303 can be used to perform the actions performed by the PCIE device in the above method embodiment.

In one possible design, the firmware upgrade device can implement the steps or processes executed by the PCIE device in the above method embodiment. For example, it can be a PCIE device, or a chip or circuit configured in the PCIE device.

The receiving module 1301 is used to receive a firmware upgrade command sent by the device management unit through an I3C protocol interface;

The sending module 1303 is used to send a response message to the device management unit through the I3C protocol interface;

The receiving module 1301 is further configured to receive the firmware file sent by the device management unit through the I3C protocol interface;

The processing module 1302 is used to upgrade the current firmware according to the firmware file.

Optionally, the sending module 1303 is further configured to send an upgrade completion message to the device management unit via the I3C protocol interface.

Optionally, the sending module 1303 is also used to send an interrupt request to the device management unit through the I3C protocol interface; the receiving module 1301 is also used to receive an interrupt response sent by the device management unit through the I3C protocol interface, and the interrupt response is used to indicate that the PCIE device is allowed to send the upgrade completion message.

Optionally, the receiving module 1301 is further used to receive a query request sent by the device management unit through the I3C protocol interface; the processing module 1302 is further used to determine whether the current firmware is upgraded according to the query request;

The sending module 1303 is also used to send an upgrade completion message to the device management unit through the I3C protocol interface if the PCIE device completes upgrading the current firmware, and to send a waiting message to the device management unit through the I3C protocol interface if the PCIE device has not completed upgrading the current firmware.

Optionally, the receiving module 1301 is further used to receive a query command sent by the device management unit through the I3C protocol interface; the sending module 1303 is further used to send a query response to the device management unit through the I3C protocol interface.

Optionally, the response message includes confirmation information and negative confirmation information.

The processing module 1302 is also used to determine whether the current firmware meets the upgrade conditions;

The sending module 1303 is used to send confirmation information to the device management unit through the I3C protocol interface if the current firmware meets the upgrade conditions; if the current firmware does not meet the upgrade conditions, send negative confirmation information to the device management unit through the I3C protocol interface.

Optionally, the receiving module 1301 is further configured to, if the current firmware meets the upgrade conditions, enable the PCIE device to receive the firmware file sent by the device management unit through the I3C protocol interface.

It should be noted that the implementation of each module can also correspond to the corresponding description of the method embodiments shown in Figures 8, 10 and 11, and execute the methods and functions executed by the PCIE devices in the above embodiments.

Figure 14 is a schematic diagram of the structure of a device management unit provided in an embodiment of the present application. The device management unit can be applied to the system shown in Figure 1 to perform the functions of the device management unit in the above method embodiment, or to implement the steps or processes performed by the device management unit in the above method embodiment.

As shown in FIG14 , the device management unit includes a processor 1401 and a transceiver 1402. Optionally, the device management unit also includes a memory 1403. The processor 1401, the transceiver 1402 and the memory 1403 can communicate with each other through an internal connection path to transmit control and/or data signals. The memory 1403 is used to store a computer program, and the processor 1401 is used to call and run the computer program from the memory 1403 to control the transceiver 1402 to send and receive signals. Optionally, the device management unit may also include an antenna for sending the uplink data or uplink control signaling output by the transceiver 1402 through a wireless signal.

The processor 1401 and the memory 1403 may be combined into a processing device, and the processor 1401 is used to execute the program code stored in the memory 1403 to implement the above functions. In specific implementation, the memory 1403 may also be integrated into the processor 1401, or independent of the processor 1401.

The transceiver 1402 may correspond to the receiving module and the sending module in FIG12, and may also be referred to as a transceiver unit or a transceiver module. The transceiver 1402 may include a receiver (or receiver, receiving circuit) and a transmitter (or transmitter, transmitting circuit). The receiver is used to receive signals, and the transmitter is used to transmit signals.

It should be understood that the device management unit shown in FIG14 can implement the various processes involving the device management unit in the method embodiments shown in FIG8, FIG10 and FIG11. The operations and/or functions of each module in the device management unit are respectively to implement the corresponding processes in the above method embodiments. For details, please refer to the description in the above method embodiments. To avoid repetition, the detailed description is appropriately omitted here.

The processor 1401 can be used to execute the actions implemented by the device management unit in the previous method embodiment, and the transceiver 1402 can be used to execute the actions of the device management unit sending to or receiving from the PCIE device described in the previous method embodiment. Please refer to the description in the previous method embodiment for details, which will not be repeated here.

Among them, the processor 1401 can be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It can implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the disclosure of this application. The processor 1401 can also be a combination that implements a computing function, such as a combination of one or more microprocessors, a combination of a digital signal processor and a microprocessor, and the like. The communication bus 1404 can be an I3C bus. For ease of representation, only one thick line is used in Figure 14, but it does not mean that there is only one bus or one type of bus. The communication bus 1404 is used to realize the connection communication between these components. Among them, the transceiver 1402 in the embodiment of the present application is used to communicate signaling or data with other node devices. The memory 1403 may include a volatile memory, such as a nonvolatile dynamic random access memory (NVRAM), a phase change RAM (PRAM), a magnetoresistive RAM (MRAM), etc., and may also include a non-volatile memory, such as at least one disk storage device, an electrically erasable programmable read-only memory (EEPROM), a flash memory device, such as a NOR flash memory or a NAND flash memory, a semiconductor device, such as a solid state disk (SSD), etc. The memory 1403 may optionally be at least one storage device located away from the aforementioned processor 1401. The memory 1403 may optionally store a set of computer program codes or configuration information. Optionally, the processor 1401 may also execute a program stored in the memory 1403. The processor may cooperate with the memory and the transceiver to execute any one of the methods and functions of the device management unit in the above-mentioned application embodiment.

Figure 15 is a schematic diagram of the structure of a PCIE device provided in an embodiment of the present application. The PCIE device can be applied to the system shown in Figure 1 to perform the functions of the PCIE device in the above method embodiment, or to implement the steps or processes performed by the PCIE device in the above method embodiment.

As shown in FIG15 , the PCIE device includes a processor 1501 and a transceiver 1502. Optionally, the PCIE device also includes a memory 1503. The processor 1501, the transceiver 1502 and the memory 1503 can communicate with each other through an internal connection path to transmit control and/or data signals. The memory 1503 is used to store a computer program, and the processor 1501 is used to call and run the computer program from the memory 1503 to control the transceiver 1502 to send and receive signals. Optionally, the PCIE device may also include an antenna for sending the uplink data or uplink control signaling output by the transceiver 1502 through a wireless signal.

The processor 1501 may correspond to the processing module in FIG13 , and the processor 1501 may be combined with the memory 1503 to form a processing device, and the processor 1501 is used to execute the program code stored in the memory 1503 to implement the above functions. In specific implementation, the memory 1503 may also be integrated into the processor 1501, or may be independent of the processor 1501.

The transceiver 1502 may correspond to the sending module and the receiving module in FIG13 , and may also be referred to as a transceiver unit or a transceiver module. The transceiver 1502 may include a receiver (or receiver, receiving circuit) and a transmitter (or transmitter, transmitting circuit). The receiver is used to receive signals, and the transmitter is used to transmit signals.

It should be understood that the PCIE device shown in FIG. 15 can implement the various processes involving the PCIE device in the method embodiments shown in FIG. 8 , FIG. 10 and FIG. 11 . The operations and/or functions of each module in the PCIE device are respectively to implement the corresponding processes in the above method embodiments. For details, please refer to the description in the above method embodiments. To avoid repetition, the detailed description is appropriately omitted here.

The processor 1501 can be used to execute the actions implemented by the PCIE device in the previous method embodiment, and the transceiver 1502 can be used to execute the actions of the PCIE device sending to or receiving from the device management unit described in the previous method embodiment. Please refer to the description in the previous method embodiment for details, which will not be repeated here.

Among them, the processor 1501 can be various types of processors mentioned above. The communication bus 1504 can be an I3C bus. For ease of representation, only one thick line is used in Figure 15, but it does not mean that there is only one bus or one type of bus. The communication bus 1504 is used to realize the connection communication between these components. Among them, the transceiver 1502 of the device in the embodiment of the present application is used to communicate signaling or data with other devices. The memory 1503 can be various types of memories mentioned above. The memory 1503 can also be at least one storage device located away from the aforementioned processor 1501. A set of computer program codes or configuration information is stored in the memory 1503, and the processor 1501 executes the program in the memory 1503. The processor can cooperate with the memory and the transceiver to execute any method and function of the PCIE device in the above-mentioned application embodiment.

The embodiment of the present application also provides a chip system, which includes a processor for supporting a device management unit or a PCIE device to implement the functions involved in any of the above embodiments, such as generating or processing the firmware upgrade involved in the above method. In one possible design, the chip system may also include a memory, which is used for the necessary program instructions and data for the device management unit or PCIE device. The chip system can be composed of a chip, or it can include a chip and other discrete devices. Among them, the input and output of the chip system correspond to the receiving and sending operations of the device management unit or PCIE device of the method embodiment, respectively.

According to the method provided in the embodiments of the present application, the present application also provides a computer program product, which includes: a computer program, when the computer program is run on a computer, the computer executes the method of any one of the embodiments shown in Figures 8, 10 and 11.

According to the method provided in the embodiments of the present application, the present application also provides a computer-readable medium, which stores a computer program. When the computer program runs on a computer, the computer executes the method of any one of the embodiments shown in Figures 8, 10 and 11.

In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware or any combination thereof. When implemented by software, all or part of the embodiments may be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website site, a computer, a server, or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (digital subscriber line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means to another website site, computer, server, or data center. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or a data center that includes one or more available media integrated. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a high-density digital video disc (digital video disc, DVD)), or a semiconductor medium (e.g., a solid state drive (solid state disc, SSD)), etc.

The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

A firmware upgrade method, characterized in that the method comprises:

The device management unit sends a firmware upgrade command to the PCIE device through the I3C protocol interface;

The device management unit receives a response message sent by the PCIE device through the I3C protocol interface;

The device management unit sends a firmware file to the PCIE device through the I3C protocol interface, and the firmware file is used by the PCIE device to upgrade the current firmware.
The method according to claim 1, characterized in that after the device management unit sends the firmware file to the PCIE device through the I3C protocol interface, the method further comprises:

The device management unit receives an upgrade completion message sent by the PCIE device through the I3C protocol interface.
The method according to claim 2, characterized in that before the device management unit receives the upgrade completion message sent by the PCIE device through the I3C protocol interface, the method further comprises:

The device management unit receives an interrupt request sent by the PCIE device through the I3C protocol interface;

The device management unit sends an interrupt response to the PCIE device through the I3C protocol interface, where the interrupt response is used to indicate that the PCIE device is allowed to send the upgrade completion message to the device management unit.

.The method according to claim 1, characterized in that after the device management unit sends the firmware file to the PCIE device through the I3C protocol interface, the method further comprises:

The device management unit sends a query request to the PCIE device through the I3C protocol interface, where the query request is used by the PCIE device to determine whether the current firmware has been upgraded;

If the PCIE device completes upgrading the current firmware, the device management unit receives the upgrade completion message sent by the PCIE device through the I3C protocol interface; if the PCIE device does not complete upgrading the current firmware, the device management unit receives the waiting message sent by the PCIE device through the I3C protocol interface.
The method according to claim 4, characterized in that before the device management unit sends a query request to the PCIE device through the I3C protocol interface, the method further comprises:

The device management unit sends a query command to the PCIE device through the I3C protocol interface;

The device management unit receives a query response sent by the PCIE device through the I3C protocol interface.
The method according to any one of claims 1 to 5, characterized in that the device management unit sends a firmware upgrade command to the PCIE device through the I3C protocol interface, comprising:

The device management unit sends the firmware upgrade command to at least two PCIE devices in the PCIE device group through the I3C protocol interface.
The method according to any one of claims 1 to 5, characterized in that the device management unit sends a firmware upgrade command to the PCIE device through the I3C protocol interface, comprising:

The device management unit sends the firmware upgrade command to all PCIE devices on the I3C bus through the I3C protocol interface.
The method according to claim 1, characterized in that the response message includes confirmation information and negative confirmation information, the confirmation response is used to indicate that the current firmware meets the upgrade conditions, and the negative confirmation information is used to indicate that the current firmware does not meet the upgrade conditions;

The device management unit sending the firmware file to the PCIE device through the I3C protocol interface includes:

If the response message is the confirmation information, the device management unit sends the firmware file to the PCIE device through the I3C protocol interface.
A firmware upgrade method, characterized in that the method comprises:

The PCIE device receives the firmware upgrade command sent by the device management unit through the I3C protocol interface;

The PCIE device sends a response message to the device management unit through the I3C protocol interface;

The PCIE device receives the firmware file sent by the device management unit through the I3C protocol interface;

The PCIE device upgrades the current firmware according to the firmware file.
The method according to claim 9, characterized in that after the PCIE device upgrades the current firmware according to the firmware file, the method further comprises:

The PCIE device sends an upgrade completion message to the device management unit through the I3C protocol interface.
The method according to claim 10, characterized in that before the PCIE device sends an upgrade completion message to the device management unit through the I3C protocol interface, the method further comprises:

The PCIE device sends an interrupt request to the device management unit through the I3C protocol interface;

The PCIE device receives an interrupt response sent by the device management unit through the I3C protocol interface, where the interrupt response is used to indicate that the PCIE device is allowed to send the upgrade completion message to the device management unit.
The method according to claim 9, characterized in that after the PCIE device upgrades the current firmware according to the firmware file, the method further comprises:

The PCIE device receives the query request sent by the device management unit through the I3C protocol interface;

The PCIE device determines, according to the query request, whether the current firmware has been upgraded;

If the PCIE device completes upgrading the current firmware, the PCIE device sends an upgrade completion message to the device management unit through the I3C protocol interface; if the PCIE device does not complete upgrading the current firmware, the PCIE device sends a wait message to the device management unit through the I3C protocol interface.
The method according to claim 12, characterized in that before the PCIE device receives the query request sent by the device management unit through the I3C protocol interface, it also includes:

The PCIE device receives the query command sent by the device management unit through the I3C protocol interface;

The PCIE device sends a query response to the device management unit through the I3C protocol interface.
The method according to any one of claims 9 to 13, wherein the response message includes confirmation information and negative confirmation information, and the method further comprises:

The PCIE device determines whether the current firmware meets the upgrade conditions;

If the current firmware meets the upgrade conditions, the PCIE device sends the confirmation information to the device management unit through the I3C protocol interface; if the current firmware does not meet the upgrade conditions, the PCIE device sends the negative confirmation information to the device management unit through the I3C protocol interface.
The method according to claim 14, wherein the PCIE device receives the firmware file sent by the device management unit through the I3C protocol interface, comprising:

If the current firmware meets the upgrade conditions, the PCIE device receives the firmware file sent by the device management unit through the I3C protocol interface.
A firmware upgrade system, characterized in that the firmware upgrade system comprises a device management unit and a PCIE device, the device management unit is used to execute the method according to any one of claims 1-8, and the PCIE device is used to execute the method according to any one of claims 9-15.