CN115904426A

CN115904426A - Firmware upgrading method and device

Info

Publication number: CN115904426A
Application number: CN202211193397.1A
Authority: CN
Inventors: 李宇涛
Original assignee: XFusion Digital Technologies Co Ltd
Current assignee: XFusion Digital Technologies Co Ltd
Priority date: 2022-09-28
Filing date: 2022-09-28
Publication date: 2023-04-04
Also published as: WO2024066438A1

Abstract

The embodiment of the application discloses a firmware upgrading method and a firmware upgrading device, wherein the method comprises the following steps: the device management unit sends a firmware upgrading command to the PCIE device through an I3C protocol interface; the device management unit receives a response message sent by the PCIE device through the I3C protocol interface; the device management unit sends a firmware file to the PCIE device through the I3C protocol interface, where the firmware file is used for the PCIE device to upgrade a current firmware. By adopting the embodiment of the application, the dependence and the constraint of the firmware upgrade of the PCIE equipment on the OS are eliminated, the usability and the maintainability of the PCIE equipment are improved, the upgrade process is simplified, and the upgrade efficiency is improved.

Description

Firmware upgrading method and device

Technical Field

The present application relates to the field of computer technologies, and in particular, to a firmware upgrading method and apparatus.

Background

A Peripheral Component Interconnect Express (PCIE) device serves as a computer product, for example, a PCIE Peripheral of a Central Processing Unit (CPU) system of a server, and implements various functions such as network connection, storage access, graphics Processing, and the like. With the diversification of services and the complexity of applications, PCIE devices have more and more functions, more and more complex internal architectures, and the probability of problems increases. PCIE devices often need to upgrade Firmware (Firmware) to add new functionality or fix problems. However, the existing firmware upgrading process is complex and the firmware upgrading efficiency is low.

Disclosure of Invention

The embodiment of the application provides a firmware upgrading method and device, which get rid of dependence and constraint of firmware upgrading of PCIE equipment on an OS (operating system), improve usability and maintainability of the PCIE equipment, simplify upgrading process and improve upgrading efficiency.

In a first aspect, an embodiment of the present application provides a firmware upgrade method, including: the device management unit sends a firmware upgrading command to the PCIE device through an I3C protocol interface; receiving a response message sent by the PCIE equipment through an I3C protocol interface; and sending a firmware file to the PCIE equipment through the I3C protocol interface, wherein the firmware file is used for upgrading the current firmware by the PCIE equipment. The device management unit is communicated with the PCIE device through the I3C protocol interface, so that firmware upgrading of the PCIE device is realized, dependence and constraint of firmware upgrading of the PCIE device on an OS are eliminated, and usability and maintainability of the PCIE device are improved. In addition, the firmware of one or more PCIE devices is upgraded by adopting an out-of-band communication mode through the write operation in the expanded I3C communication protocol, so that the upgrading process is simplified, and the upgrading efficiency is improved.

In one possible design, the device management unit receives an upgrade complete message sent by the PCIE device through the I3C protocol interface. By informing the device management unit to complete the upgrade of the current firmware, the device management unit is prevented from repeatedly upgrading the current firmware of the PCIE device, and the upgrade efficiency is improved.

In another possible design, the device management unit receives, through an I3C protocol interface, an interrupt request sent by the PCIE device; and sending an interrupt response to the PCIE equipment through the I3C protocol interface, wherein the interrupt response is used for indicating that the PCIE equipment is allowed to send an upgrade completion message to the equipment management unit. The PCIE equipment adopts an out-of-band communication mode to inform the equipment management unit of an upgrade completion message through the interrupt operation in the extended I3C communication protocol, so that the upgrade process is simplified, and the upgrade efficiency is improved.

In another possible design, the device management unit sends an inquiry request to the PCIE device through the I3C protocol interface, where the inquiry request is used for the PCIE device to determine whether to complete upgrading of the current firmware; if the PCIE device finishes upgrading the current firmware, the device management unit receives an upgrade completion message sent by the PCIE device through the I3C protocol interface, and if the PCIE device does not finish upgrading the current firmware, the device management unit receives a wait message sent by the PCIE device through the I3C protocol interface. The device management unit realizes the query of the firmware upgrading state of the PCIE device through the read operation in the expanded I3C communication protocol, realizes the monitoring and management of the firmware upgrading state of the PCIE device, not only gets rid of the dependence and the constraint of the firmware upgrading of the PCIE device on the OS, improves the usability and the maintainability of the PCIE device, but also simplifies the query process and improves the query efficiency.

In another possible design, the device management unit sends a query command to the PCIE device through the I3C protocol interface; and receiving a query response sent by the PCIE equipment through the I3C protocol interface. In order to allow the device management unit to send a query request to the PCIE device through the I3C protocol interface.

In another possible design, the device management unit sends a firmware upgrade command to at least two PCIE devices in the PCIE device group through the I3C protocol interface.

In another possible design, the device management unit sends a firmware upgrade command to all PCIE devices on the I3C bus through the I3C protocol interface.

In another possible design, the response message includes confirmation information and negative confirmation information, the confirmation response is used for indicating that the current firmware has the upgrade condition, and the negative confirmation information is used for indicating that the current firmware does not have the upgrade condition; and if the response message is the confirmation message, the device management unit sends the firmware file to the PCIE device through the I3C protocol interface. The method comprises the steps that a firmware file is sent to the PCIE equipment under the condition that the current firmware of the PCIE equipment is determined to have an upgrading condition, and therefore the PCIE equipment is guaranteed to successfully upgrade the current firmware.

In a second aspect, an embodiment of the present application provides a firmware upgrade method, including: the PCIE equipment receives a firmware upgrading command sent by the equipment management unit through an I3C protocol interface; PCIE equipment sends a response message to the equipment management unit through an I3C protocol interface; the PCIE equipment receives a firmware file sent by the equipment management unit through an I3C protocol interface; and the PCIE equipment upgrades the current firmware according to the firmware file. The device management unit is communicated with the PCIE device through the I3C protocol interface, so that firmware upgrading of the PCIE device is realized, dependence and constraint of firmware upgrading of the PCIE device on an OS are eliminated, and usability and maintainability of the PCIE device are improved. Moreover, by means of write operation in the extended I3C communication protocol, the firmware of one or more PCIE devices is upgraded in an out-of-band communication mode, so that the upgrading process is simplified, and the upgrading efficiency is improved.

In one possible design, the PCIE device sends an upgrade complete message to the device management unit through the I3C protocol interface. By informing the device management unit to complete the upgrade of the current firmware, the device management unit is prevented from repeatedly upgrading the current firmware of the PCIE device, and the upgrade efficiency is improved.

In another possible design, the PCIE device sends an interrupt request to the device management unit through the I3C protocol interface; the PCIE equipment receives an interrupt response sent by the equipment management unit through the I3C protocol interface, wherein the interrupt response is used for indicating that the PCIE equipment is allowed to send an upgrade completion message. The PCIE equipment adopts an out-of-band communication mode to inform the equipment management unit of an upgrade completion message through the interrupt operation in the extended I3C communication protocol, so that the upgrade process is simplified, and the upgrade efficiency is improved.

In another possible design, the PCIE device receives, through the I3C protocol interface, an inquiry request sent by the device management unit; the PCIE equipment determines whether the current firmware is upgraded or not according to the query request; if the PCIE device completes upgrading the current firmware, the PCIE device sends an upgrade completion message to the device management unit through the I3C protocol interface, and if the PCIE device does not complete upgrading the current firmware, the PCIE device sends a wait message to the device management unit through the I3C protocol interface. The device management unit realizes the query of the firmware upgrading state of the PCIE device through the read operation in the expanded I3C communication protocol, realizes the monitoring and management of the firmware upgrading state of the PCIE device, not only gets rid of the dependence and the constraint of the firmware upgrading of the PCIE device on the OS, improves the usability and the maintainability of the PCIE device, but also simplifies the query process and improves the query efficiency.

In another possible design, the PCIE device receives, through the I3C protocol interface, an inquiry command sent by the device management unit; and the PCIE equipment sends a query response to the equipment management unit through the I3C protocol interface. In order to allow the device management unit to send a query request to the PCIE device through the I3C protocol interface.

In another possible design, the response message includes acknowledgement information and negative acknowledgement information, and the PCIE device determines whether the current firmware has an upgrade condition; if the current firmware has the upgrading condition, the PCIE equipment sends confirmation information to the equipment management unit through the I3C protocol interface; and if the current firmware does not meet the upgrading condition, the PCIE equipment sends negative confirmation information to the equipment management unit through the I3C protocol interface. By indicating whether the current firmware has the upgrading condition, the device management unit is prevented from sending the firmware file under the condition that the upgrading condition is not met.

In another possible design, if the current firmware has the upgrade condition, the PCIE device receives the firmware file sent by the device management unit through the I3C protocol interface. The method comprises the steps that when the condition that the current firmware of the PCIE equipment has the upgrading condition is determined, the firmware file is received to be upgraded, and the fact that the current firmware is upgraded by the PCIE equipment is guaranteed.

In a third aspect, an embodiment of the present application provides a firmware upgrading apparatus, including:

the sending module is used for sending a firmware upgrading command to the PCIE equipment through the I3C protocol interface;

the receiving module is used for receiving a response message sent by the PCIE equipment through the I3C protocol interface;

the sending module is further configured to send a firmware file to the PCIE device through the I3C protocol interface, where the firmware file is used for the PCIE device to upgrade a current firmware.

In a possible design, the receiving module is further configured to receive, through the I3C protocol interface, an upgrade completion message sent by the PCIE device.

In another possible design, the receiving module is further configured to receive, through the I3C protocol interface, an interrupt request sent by the PCIE device; the sending module is further configured to send an interrupt response to the PCIE device through the I3C protocol interface, where the interrupt response is used to indicate that the PCIE device is allowed to send an upgrade completion message.

In another possible design, the sending module is further configured to send a query request to the PCIE device through the I3C protocol interface, where the query request is used for the PCIE device to determine whether to complete upgrading of the current firmware; the receiving module is further configured to receive, through the I3C protocol interface, an upgrade completion message sent by the PCIE device if the PCIE device completes upgrading the current firmware, and receive, through the I3C protocol interface, a wait message sent by the PCIE device if the PCIE device does not complete upgrading the current firmware.

In another possible design, the sending module is further configured to send a query command to the PCIE device through the I3C protocol interface; the receiving module is further configured to receive, through the I3C protocol interface, a query response sent by the PCIE device.

In another possible design, the sending module is further configured to send the firmware upgrade command to at least two PCIE devices in the PCIE device group through the I3C protocol interface.

In another possible design, the sending module is further configured to send the firmware upgrade command to all PCIE devices on the I3C bus through the I3C protocol interface.

In another possible design, the response message includes confirmation information and negative confirmation information, the confirmation response is used for indicating that the current firmware has the upgrade condition, and the negative confirmation information is used for indicating that the current firmware does not have the upgrade condition;

and the sending module is further configured to send the firmware file to the PCIE device through the I3C protocol interface if the response message is the acknowledgement message.

The operations and advantageous effects executed by the firmware upgrading device can be referred to the method and advantageous effects of the first aspect, and repeated details are not repeated.

In a fourth aspect, an embodiment of the present application provides a firmware upgrading apparatus, including:

the receiving module is used for receiving a firmware upgrading command sent by the equipment management unit through the I3C protocol interface;

the sending module is used for sending a response message to the equipment management unit through the I3C protocol interface;

the receiving module is also used for receiving the firmware file sent by the equipment management unit through the I3C protocol interface;

and the processing module is used for upgrading the current firmware according to the firmware file.

In one possible design, the sending module is further configured to send an upgrade completion message to the device management unit through the I3C protocol interface.

In another possible design, the sending module is further configured to send an interrupt request to the device management unit through the I3C protocol interface; the receiving module is further configured to receive, through the I3C protocol interface, an interrupt response sent by the device management unit, where the interrupt response is used to indicate that the PCIE device is allowed to send an upgrade completion message.

In another possible design, the receiving module is further configured to receive, through the I3C protocol interface, an inquiry request sent by the device management unit; the processing module is also used for determining whether the current firmware is upgraded or not according to the query request; the sending module is further configured to send an upgrade completion message to the device management unit through the I3C protocol interface if the PCIE device completes upgrading the current firmware, and send a waiting message to the device management unit through the I3C protocol interface if the PCIE device does not complete upgrading the current firmware.

In another possible design, the receiving module is further configured to receive, through the I3C protocol interface, an inquiry command sent by the device management unit; and the sending module is also used for sending the inquiry response to the equipment management unit through the I3C protocol interface.

In another possible design, the response message may include acknowledgement information and negative acknowledgement information,

the processing module is also used for judging whether the current firmware has the upgrading condition;

the sending module is used for sending confirmation information to the equipment management unit through the I3C protocol interface if the current firmware has the upgrading condition; and if the current firmware does not have the upgrading condition, sending negative confirmation information to the equipment management unit through the I3C protocol interface.

In another possible design, the receiving module is further configured to receive, by the PCIE device through the I3C protocol interface, the firmware file sent by the device management unit if the current firmware has the upgrade condition.

The operations and advantageous effects executed by the firmware upgrading device can be referred to the method and advantageous effects of the second aspect, and repeated details are not repeated.

In a fifth aspect, the present application provides a device management unit comprising a processor and a memory for storing computer-executable instructions; the processor is configured to execute computer executable instructions stored by the memory to cause the device management unit to perform the method of any of the first aspects.

In a sixth aspect, the present application provides a PCIE device, where the PCIE device includes a processor and a memory, and the memory is used to store a computer execution instruction; the processor is configured to execute computer-executable instructions stored by the memory to cause the PCIE device to perform the method as in any one of the second aspects.

In a seventh aspect, the present application provides a computer-readable storage medium for storing a computer program which, when executed, causes the method of any one of the first and second aspects to be implemented.

In an eighth aspect, the present application provides a computer program product comprising a computer program that, when executed, causes the method of any one of the first and second aspects to be carried out.

In a ninth aspect, the present application provides a firmware upgrade system, where the firmware upgrade system includes a device management unit and a PCIE device, the device management unit is configured to execute the method in any one of the first aspects, and the PCIE device is configured to execute the method in any one of the second aspects.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments or the background art of the present application, the drawings required to be used in the embodiments or the background art of the present application will be described below.

Fig. 1 is a schematic architecture diagram of a firmware upgrade system provided in an embodiment of the present application;

FIG. 2 is a schematic diagram illustrating a write command timing sequence according to an embodiment of the present application;

FIG. 3 is a schematic diagram of another write command timing sequence provided by an embodiment of the present application;

FIG. 4 is a schematic diagram illustrating a timing sequence of another write operation command provided by an embodiment of the present application;

FIG. 5 is a schematic diagram illustrating a timing sequence of an interrupt operation command according to an embodiment of the present disclosure;

FIG. 6 is a schematic diagram of a data format of a target essential data byte field according to an embodiment of the present disclosure;

FIG. 7 is a schematic diagram illustrating a timing sequence of a read operation command according to an embodiment of the present application;

fig. 8 is a flowchart illustrating a firmware upgrading method according to an embodiment of the present application;

FIG. 9 is a diagram illustrating a file format of a firmware file according to an embodiment of the present application;

fig. 10 is a schematic flowchart of another firmware upgrading method provided in an embodiment of the present application;

FIG. 11 is a flowchart illustrating a firmware upgrade method according to an embodiment of the present application;

FIG. 12 is a schematic diagram of a firmware upgrade apparatus provided in an embodiment of the present application;

FIG. 13 is a schematic diagram of another firmware upgrade apparatus provided in an embodiment of the present application;

fig. 14 is a schematic structural diagram of a device management unit according to an embodiment of the present application;

fig. 15 is a schematic structural diagram of a PCIE device according to an embodiment of the present application.

Detailed Description

The following is explained in conjunction with the terms referred to in the embodiments of the present application;

integrated Circuit (I2C) bus: a two-wire synchronous Serial bus adopts a master-slave communication mechanism, uses Serial Clock Lines (SCL) and Serial data lines (SDA) to carry out communication, supports a plurality of nodes to be connected in a common bus, and distinguishes each node through a physical address.

Improved Inter Integrated Circuit (I3C) bus: the I2C bus is an improved I2C bus, the physical form of the I3C bus is consistent with that of the I2C bus, and the SCL and the SDA are used for communication, so that the I2C can be downward compatible. Compared with I2C, the data rate of an I3C bus is high, dynamic address allocation is supported to support the joint of a plurality of nodes with the same physical address through a bus, and an interrupt mechanism is supported to actively send data from the nodes to a main node.

Firmware (Firmware): the code running on the chip of the PCIE device is used to implement the function of the PCIE device, for example, the firmware of the network card may be used to implement network connection, message transceiving, protocol offloading of the network card, and the like.

Out-of-band and in-band: out-of-band is a description relative to a traffic interface PCIE (referred to as in-band), that is, a native PCIE communication manner is not used, for example, PCIE configuration space of a PCIE device is accessed. Out-of-band communication refers to communication implemented via an out-of-band interface protocol of a PCIE device. The out-of-band Interface protocol includes, but is not limited to, a System Management Bus (SMBus), I3C, a Network Controller side band Interface (NC-SI), and the like.

PCIE devices need to upgrade firmware to add new functionality or repair problems. The firmware of the PCIE device may be upgraded as follows: first, a manufacturer tool is used to upgrade the firmware of the PCIE device. The factory tool is installed and operated on an Operating System (OS), and the OS is installed and operated on a CPU System of the server. The factory tool communicates with the firmware of the PCIE equipment through the PCIE interface, transmits the firmware file to be upgraded to the PCIE equipment, and instructs the PCIE equipment to upgrade. However, the factory tool is installed and operated in the OS, and has a coupling relationship with the version of the OS, and the factory needs to develop and maintain a matching tool for each OS so as to be used for firmware upgrade, so that the workload is large, and the application limit exists in the firmware upgrade function of the PCIE device. Secondly, the firmware of the PCIE device is upgraded in an out-of-band communication manner, but the existing out-of-band interface protocol has complex layers, high overhead, complex firmware upgrade process, and low firmware upgrade efficiency. Moreover, when the server is in a standby (standby) state, the PCIE interface is always in a reset state, and the device management unit cannot communicate with the PCIE device. In order to solve the above technical problem, the embodiments of the present application provide the following solutions.

As shown in fig. 1, fig. 1 is a schematic architecture diagram of a firmware upgrade system according to an embodiment of the present application. The firmware upgrade system may include a Device Management unit (Management Device) and a PCIE Device. The device management unit may be independent of the OS and CPU in the computer system for performing component management, asset management functions within the computer system, such as power-up and power-down control, fan throttling, electronic tag management, and the like. The device management unit may communicate with the PCIE device through the I3C protocol interface, send a command for firmware upgrade to the PCIE device, and send a firmware file to be upgraded to the PCIE device, so that the PCIE device executes firmware upgrade. The Device Management unit may be a Board Management Controller (BMC) or other controllers, such as a Complex Programmable Logic Device (CPLD), a Digital Signal Processor (DSP), and the like. PCIE devices may include, but are not limited to, network cards, redundant Array of Independent Disks (RAID) cards, video cards, solid State Disk (SSD) cards, acceleration cards, and the like.

The Device management unit serves as a master node (i.e., a Controller) of an I3C bus in the computer system, and the PCIE Device serves as a slave node (i.e., a Target Device) of the I3C bus. I3C is physically signal compatible with I2C, both using SCL bus and SDA bus. The PCIE equipment and the equipment management unit actually utilize the existing physical connection of an I2C channel to run an I3C communication protocol for communication without additionally increasing physical signals.

The embodiment of the application expands an I3C communication protocol, the I3C communication protocol defines read operation, write operation and interrupt operation, and the device management unit can upgrade the firmware of the PCIE device through the write operation and the interrupt operation of the I3C. Through the read operation of the I3C, the device management unit can inquire the firmware upgrading state of the PCIE device. The I3C communication protocol is specified as follows:

as shown in fig. 2, fig. 2 is a schematic diagram of a write operation command timing sequence according to an embodiment of the present application. In a unicast transmission scenario, a Write operation Command timing sequence sequentially includes a Start (S) field, an I3C Reserved Address (I3C Reserved Address) field, a first Read/Write (R/W) field, a first acknowledgement (a) field, an I3C direct communication Common Command word (I3C direct Command Code, I3C direct CCC) field, a first Parity (Par, sr) field, a Repeat Start (Repeat Start, a) field, a Target Address (Target Address) field, a second Read/Write (Read/Write, R/W) field, a second acknowledgement field, a Data1 (Data 1) field, a second Parity field, … …, a Data N (Data N) field, a third Parity field, and a Stop (Stop, P) field. Wherein:

start (S) field: indicating that the command sequence is initiated.

I3C Reserved Address (I3C Reserved Address) field: indicating the I3C addresses of all PCIE devices on the I3C bus, and the I3C Reserved Address field is a broadcast Address field. In this embodiment, I3C addresses of multiple PCIE devices on an I3C bus may be represented. For example, the value of the I3C Reserved Address field may be 7' h7E.

A first read/Write (R/W) field: and the device management unit is indicated to initiate read-write operation to a plurality of PCIE devices on the I3C bus. The value of the first read/write field may be 0x1 or 0x0,0x1 for read (R), and 0x0 for write (W).

First acknowledgement field: and the response of the PCIE equipment to the read-write operation initiated by the equipment management unit is represented and corresponds to the first read/write field. The value of the first acknowledgement field may be 0x1 or 0x0, where, for example, 0x0 represents Acknowledgement (ACK) and 0x1 represents Negative-acknowledgement (NACK).

I3C Directed CCC field: the method adopts an I3C direct communication mode, namely a point-to-point communication mode. The I3C Directed CCC field may use a reserved Command word in the Common Command word CCC (Common Command Code) field. The value range of the reserved command word can be 0xE0-0xFE, and different values of the reserved command word can represent different functions. For example, when the value of the reserved command word is 0xFA, that is, when the value of the I3C Directed CCC field is 0xFA, the operation of upgrading the firmware of the target PCIE device is indicated.

First Parity (Par) field: indicating that parity checking is performed on the I3C Directed CCC field.

Repeat Start (Sr) field: indicating a commanded timing restart. One command timing (process from Start to Stop) on the I3C bus includes multiple phases, with Sr representing a restart at the beginning of each phase.

Target Address (Target Address) field: indicating the I3C address of the target PCIE device on the I3C bus.

Second Read/Write (Read/Write, R/W) field: indicating that the device management unit initiates read-write operation to the target PCIE device.

A second acknowledgement field: and the response of the target PCIE equipment to the read-write operation initiated by the equipment management unit is represented, and corresponds to the second read/write field.

Data1 (Data 1) field-Data N (Data N) field: indicating that the device management unit writes the contents of the firmware file to the target PCIE device.

Second parity field: indicating that the contents of the firmware file in the data1 field are parity checked.

Third parity field: indicating that the contents of the firmware file in the data N field are parity checked.

Stop (Stop, P) field: indicating the end of the command sequence.

The first acknowledgement field and the second acknowledgement field are actions executed by the PCIE device, and the other fields are actions executed by the device management unit. The firmware of the target PCIE equipment in the plurality of PCIE equipment on the I3C bus can be upgraded through the write operation command time sequence.

As shown in fig. 3, fig. 3 is a schematic diagram of another write operation command timing sequence provided in the embodiment of the present application. In the multicast transmission scenario, the write operation command timing includes a Group Address (Group Address) field, which is different from the Target Address (Target Address) field in fig. 2. The Group Address field indicates the I3C Address of the PCIE device Group. If at least two PCIE devices of the same type exist in the multiple PCIE devices on the I3C bus, the at least two PCIE devices of the same type may be divided into one PCIE device Group, and each PCIE device Group corresponds to one Group Address (Group Address). In addition, the other fields in the write operation command timing sequence shown in fig. 3 have the same meaning as that of the other fields in the write operation command timing sequence shown in fig. 2, and a specific implementation manner may refer to the write operation command timing sequence shown in fig. 2, which is not described herein again.

The first acknowledgement field and the second acknowledgement field are actions executed by the PCIE device, and the other fields are actions executed by the device management unit. The firmware upgrading of at least two PCIE devices of the same model in the PCIE device group can be realized through the write operation command timing sequence shown in fig. 3.

As shown in fig. 4, fig. 4 is a schematic diagram of another write operation command timing sequence provided in the embodiment of the present application. If the models of all PCIE devices on the I3C bus are the same, a broadcast transmission mode may be adopted. In a Broadcast transmission scenario, a Write operation Command timing sequence sequentially includes a Start (S) field, an I3C Reserved Address (I3C Reserved Address) field, a first read/Write (R/W) field, a first acknowledgement (a) field, an I3C Broadcast communication Common Command word (I3C Broadcast Common Command Code, I3C Broadcast CCC) field, a first Parity (Par) field, a Data1 (Data 1) field, a second Parity field, … …, a Data N field, a third Parity field, and a Stop (Stop, P) field. Wherein:

I3C Broadcast CCC field: indicating that the I3C broadcast communication scheme is used. The I3C Broadcast CCC field may use a reserved command word in the common command word CCC field, and the reserved command word may have a value ranging from 0x61 to 0x7F. Different values of the reserved command word may indicate different functions. For example, when the value of the reserved command word is 0x7A, that is, when the value of the I3C Broadcast CCC field is 0x7A, the operation of upgrading the firmware of all PCIE devices is indicated.

Due to the adoption of the I3C broadcast communication mode, compared with the write operation command timing shown in fig. 2 and 3, the firmware of a certain PCIE device or a certain PCIE device group does not need to be upgraded, but the firmware of all PCIE devices on the I3C bus is upgraded. Therefore, after the I3C Broadcast CCC field and the first parity, it is the Data1 (Data 1) field — the Data N (DataN) field, i.e. the device management unit writes the content of the firmware file to all PCIE devices on the I3C bus.

The first acknowledgement field is an action executed by the PCIE device, and the other fields are actions executed by the device management unit. The firmware of all PCIE equipment on the I3C bus can be upgraded simultaneously through the write operation command time sequence.

As shown in fig. 5, fig. 5 is a schematic diagram of a sequence of interrupt operation commands according to an embodiment of the present disclosure. The Interrupt operation command timing includes a Start (S) field, a Target Address (Target Address) field, a Read/Write (R/W) field, an Acknowledge (a) field, a Target required Data Byte (Target MDB) field, a first Transition (T) field, a Target InBand Interrupt Data1 (Target InBand Interrupt Data1, target IBI Data 1), a second Transition (T) field, … …, a Target InBand Interrupt Data N (Target InBand Interrupt Data N, target IBI Data N), a third Transition (Transition, T) field, and a Stop (Stop, P) field. Wherein:

start (S) field: indicating that the command sequence is initiated.

Target Address field: indicating the I3C address of the target PCIE device on the I3C bus.

Read/Write (R/W) field: indicating that the target PCIE device initiates a read-write operation to the device management unit. The value of the read/write field may be 0x1 or 0x0,0x1 for read (R), and 0x0 for write (W).

Acknowledgement (a) field: and indicating the response of the device management unit to the target PCIE device for initiating the read-write operation. Here, the value of the ACK field may be 0x1 or 0x0,0x0 indicating Acknowledgement (ACK), and 0x1 indicating Negative-acknowledgement (NACK).

Target must data byte (Target MDB) field: and the interrupt group number and the interrupt number are used for indicating the interrupt type and/or the interrupt content. In this embodiment of the present application, the interrupt group number and the interrupt number may be used to indicate that an upgrade completion message of the firmware of the PCIE device is transmitted. As shown in fig. 6, fig. 6 is a schematic diagram of a data format of a Target MDB field according to an embodiment of the present application. The Target MDB field includes a 3-bit (bit) interrupt group number field and a 5-bit (bit) interrupt number field. The value of the interrupt group number field can be 3' b000, and the value range of the interrupt group number field can be 5' h00-5' h1F. For example, when the value of the interrupt group number field is 5' h1b, it indicates that the update completion message of the firmware of the PCIE device is requested to be transmitted.

First Transition (T) field: indicating whether the data is completely transmitted after transmitting the data of the Target MDB field. The value of the first conversion field may be 0x1 or 0x0,0x1, which indicates that there is data to be transmitted subsequently, and 0x0 indicates that the data transmission is completed, i.e., the data byte in front of the field is the last data byte.

Target inband interrupt Data1-Target inband interrupt Data N (Target IBI Data1-Target IBI Data N): representing the content of the interruption transmitted by the target device to the control node. In this embodiment of the present application, content of an upgrade complete message sent by a PCIE device to a device management unit is represented.

Second Transition (T) field: indicating whether the content of the firmware upgrade complete message is transmitted after the Target IBI Data1 transmission is transmitted. 0x1 indicates that the content of the upgrade complete message is required to be transmitted, and 0x0 indicates that the content of the upgrade complete message is transmitted.

Third Transition (T) field: and the updating information shows whether the content of the updating completion information is completely transmitted after the Target IBI Data N is transmitted. 0x1 indicates that the content of the upgrade complete message is required to be transmitted, and 0x0 indicates that the content of the upgrade complete message is transmitted.

Stop (Stop, P) field: indicating the end of the command sequence.

Wherein, the Start (S) field, the Acknowledge (a) field, and the Stop (Stop, P) field are actions performed by the device management unit, and the other fields are actions performed by the PCIE device. The PCIE equipment can send an upgrade completion message to the equipment management unit by interrupting the operation command time sequence.

As shown in fig. 7, fig. 7 is a schematic diagram of a read operation command timing sequence according to an embodiment of the present application. The Read operation Command timing sequence includes a Start (Start, S) field, an I3C Reserved Address (I3C Reserved Address) field, a first Read/Write (R/W) field, a first acknowledgement (a) field, an I3C direct communication Common Command word (I3C direct Command Code, I3C direct CCC) field, a Parity (part, par) field, a first Repeat Start (Sr) field, a Target Address (Target Address) field, a second Read/Write (Read/Write, R/W) field, a second acknowledgement field, a second Wait Message (Wait Message) field, a first Transition (Transition, T) field, … …, a second Repeat Start (Sr) field, a Target Address (Target Address) field, a third Read/Write (Read/Write, R/W) field, a third confirm field, a second Wait Message (Wait Message) field, a second Transition (T) field, a third Repeat Start (Sr) field, a Target Address (Target Address) field, a fourth Read/Write (Read/Write, R/W) field, a fourth confirm field, an upgrade Complete Message (Update Complete) field, a third Transition (T, T) field, and a Stop (Stop, P) field. Wherein:

I3C Directed CCC field: the method adopts an I3C direct communication mode, namely a point-to-point communication mode. The I3C Directed CCC field can use a reserved command word in the common command word CCC field, the value range of the reserved command word is 0xE0-0xFE, and different values of the reserved command word represent different functions. For example, when the value of the reserved command word is 0xFB, that is, when the value of the I3C Directed CCC field is 0xFB, it indicates to query the firmware upgrade state of the PCIE device.

Wait Message (Wait Message) field: indicating that the device management unit is notified to continue waiting when the PCIE device does not complete the upgrade operation of the firmware. The Wait Message field may use the reserved command word in the CCC field. The value range of the reserved command word can be 0xE0-0xFE, and different values of the reserved command word represent different functions. For example, when the value of the reserved command word is 0xEF, that is, when the value of the Wait Message field is 0xEF, it indicates that the PCIE device notifies the device management unit to continue waiting.

Upgrade Complete message (Update Complete) field: and indicating an upgrade complete message, namely notifying the device management unit that the firmware upgrade is complete when the PCIE device has completed the operation of firmware upgrade. The Update Complete field may use a reserved command word in the CCC field, and a value of the Update Complete field is consistent with a value of the I3C Directed CCC field, indicating a response to an inquiry about a firmware upgrade state of the PCIE device.

After the device management unit initiates a read operation to the PCIE device, if the PCIE device does not complete the firmware upgrade operation, the device management unit is notified to wait, if the device management unit continues to query the firmware upgrade state of the PCIE device, a Repeat Start (Sr) process is re-initiated, and the next PCIE device may continue to notify the device management unit to wait for many times in a cycle. And finally, if the PCIE equipment informs the equipment management unit of the upgrade completion message, the equipment management unit finishes the whole command time sequence. The whole process of querying the firmware upgrading state of the PCIE device is divided into multiple stages, and thus the read operation command timing sequence includes multiple stages. Wherein, a first Repeat Start (Sr) field, a Target Address (Target Address) field, a second Read/Write (R/W) field, a second confirm field, a first Wait Message (Wait Message) field, and a first Transition (T) field are in a first phase. The second Repeat Start (Sr) field, the Target Address (Target Address) field, the third read/Write (R/W) field, the third acknowledgement field, the second Wait Message (Wait Message) field, and the second Transition (T) field are nth stages. A third Repeat Start (Sr) field, a Target Address (Target Address) field, a fourth read/Write (R/W) field, a fourth confirm field, an upgrade Complete message (Update Complete) field, and a third Transition (T) field are the last stage.

The other fields in the read operation command timing sequence shown in fig. 7 have similar meanings to those of the fields in fig. 2 to fig. 6, and specific implementation manners may refer to the fields in fig. 2 to fig. 6, which are not described herein again.

The first acknowledgement field, the second acknowledgement field, the first waiting field, the first conversion field, the third acknowledgement field, the second waiting field, the second conversion field, the fourth acknowledgement field, the update completion message field, and the third conversion field are actions executed by the PCIE device, and the other fields are actions executed by the device management unit. Through the read operation command timing sequence shown in fig. 7, it can be implemented that the device management unit queries the firmware upgrade state of the PCIE device.

It should be noted that the interrupt operation command sequence shown in fig. 5 and the read operation command sequence shown in fig. 7 may be applied to a unicast transmission scenario, and may also be applied to a multicast transmission scenario and a broadcast transmission scenario.

Based on the I3C communication protocol, the following firmware upgrading method is provided in the embodiments of the present application.

As shown in fig. 8, fig. 8 is a schematic flowchart of a firmware upgrading method according to an embodiment of the present application. The steps in the embodiment of the application mainly comprise:

s801, the device management unit sends a firmware upgrade command to the PCIE device through the I3C protocol interface.

In an implementation manner, the device management unit may select one PCIE device from a plurality of PCIE devices on the I3C bus as a target PCIE device, and send a firmware upgrade command to the target PCIE device through the I3C protocol interface. The firmware upgrade command includes an I3C address of the target PCIE device.

In another implementation manner, if at least two PCIE devices of the same type exist in the multiple PCIE devices on the I3C bus, the at least two PCIE devices of the same type may be divided into one PCIE device Group, and each PCIE device Group corresponds to one Group Address (Group Address). The device management unit sends a firmware upgrade command to at least two PCIE devices in the PCIE device group through the I3C protocol interface, where the firmware upgrade command includes an I3C address (also referred to as a group address) of the PCIE device group.

In another implementation manner, if the models of all PCIE devices on the I3C bus are the same, the device management unit sends a firmware upgrade command to all PCIE devices on the I3C bus through the I3C protocol interface in a broadcast manner. Wherein the firmware upgrade command includes a broadcast address.

S802, the PCIE device sends a response message to the device management unit through the I3C protocol interface.

Optionally, the response message may include acknowledgement information and negative acknowledgement information. After receiving the firmware upgrade command, the PCIE device may determine whether the current firmware has an upgrade condition, for example, determine whether the PCIE device currently has process congestion, is in a busy state, or has sufficient storage space. And if the current firmware is determined to have the upgrading condition, sending confirmation information to the equipment management unit through the I3C protocol interface. And if the current firmware is determined not to have the upgrading condition, sending negative confirmation information to the equipment management unit through the I3C protocol interface.

S803, the device management unit sends the firmware file to the PCIE device through the I3C protocol interface.

Specifically, if the device management unit determines that the current firmware of the PCIE device needs to be updated according to the response message, the device management unit sends the firmware file to the PCIE device through the I3C protocol interface.

As shown in fig. 9, fig. 9 is a schematic diagram of a file format of a firmware file according to an embodiment of the present application. The firmware file includes a header region and a data region. The header area includes, but is not limited to, a filename (Name), version number (Version), release Time (Release Time), device identification (Device ID), size (Size), checksum (Checksum). The data area includes firmware code. By defining the file format of the firmware file, the reliability of the firmware file transmission and the compatibility of an I3C protocol interface between the device management unit and the PCIE device can be guaranteed.

And S804, the PCIE equipment upgrades the current firmware of the PCIE equipment according to the firmware file.

Specifically, after receiving the firmware file, the PCIE device writes the firmware file into a storage medium, such as a Flash Memory/Non-Volatile Random Access Memory (NVRAM), to complete upgrading of the current firmware.

Optionally, if the device management unit upgrades the firmware of the multiple PCIE devices or the PCIE device group at the same time, the device management unit may send the firmware file to the multiple PCIE devices or the PCIE device group at the same time through the I3C protocol interface, and after the multiple PCIE devices or the PCIE device group receive the firmware file, each PCIE device performs the operation of firmware upgrade separately.

In the embodiment of the application, the device management unit communicates with the PCIE device through the I3C protocol interface, so that firmware upgrade of the PCIE device is realized, dependence and constraint of firmware upgrade of the PCIE device on the OS are eliminated, and usability and maintainability of the PCIE device are improved. In addition, the firmware of one or more PCIE devices is upgraded by adopting an out-of-band communication mode through the write operation in the expanded I3C communication protocol, so that the upgrading process is simplified, and the upgrading efficiency is improved.

As shown in fig. 10, fig. 10 is a schematic flowchart of another firmware upgrading method provided in this embodiment of the present application. The steps in the embodiment of the application mainly comprise:

s1001, the device management unit sends a firmware upgrade command to the PCIE device through the I3C protocol interface.

S1002, the PCIE device sends a response message to the device management unit through the I3C protocol interface.

S1003, the device management unit sends the firmware file to the PCIE device through the I3C protocol interface.

And S1004, the PCIE equipment upgrades the current firmware of the PCIE equipment according to the firmware file.

The implementation manners of S1001 to S1004 are the same as the implementation manners of S801 to S804 in the embodiment shown in fig. 8, and the specific implementation manners may refer to S801 to S804 shown in fig. 8, which are not described herein again.

S1005, the PCIE device sends an interrupt request to the device management unit through the I3C protocol interface.

The interrupt request may include an interrupt group number and an interrupt number, which may indicate an interrupt type and/or interrupt content. For example, when the group number 3'b000 and the interrupt number 5' h1B are interrupted, it indicates that the transmission of the upgrade completion message of the firmware of the PCIE device is requested.

S1006, the device management unit sends an interrupt response to the PCIE device through the I3C protocol interface.

Optionally, the interrupt response may include acknowledgement information and negative acknowledgement information. When the device management unit receives an interrupt request of the PCIE device, the device management unit may send acknowledgement information to the PCIE device, where the acknowledgement information is used to indicate that the PCIE device is allowed to send an upgrade completion message. When the device management unit does not accept the interrupt request of the PCIE device, negative acknowledgement information may be sent to the PCIE device, where the negative acknowledgement information is used to indicate that the PCIE device is not allowed to send the upgrade completion message.

S1007, the PCIE device sends an upgrade complete message to the device management unit through the I3C protocol interface.

Optionally, when the interrupt response received by the PCIE device is the acknowledgement information, the PCIE device sends an upgrade completion message to the device management unit through the I3C protocol interface.

In the embodiment of the application, the PCIE device notifies the device management unit of the upgrade completion message in an out-of-band communication manner through an interrupt operation in the extended I3C communication protocol, so that the upgrade process is simplified, and the upgrade efficiency is improved.

In the process of performing firmware upgrade by the PCIE device, the device management unit may query a firmware upgrade status of the PCIE device. The following describes in detail a process in which the device management unit queries the firmware upgrade status of the PCIE device.

As shown in fig. 11, fig. 11 is a schematic flowchart of another firmware upgrading method provided in this embodiment of the present application. The steps in the embodiments of the present application mainly include:

s1101, the device management unit sends a query command of the firmware upgrade status to the PCIE device.

S1102, the PCIE device sends a query response of the firmware upgrade status to the device management unit.

Optionally, the query response may include acknowledgement information and negative acknowledgement information. When the PCIE device receives the query of the device management unit on the firmware upgrade state, it may send the acknowledgement information to the PCIE device. When the device management unit does not accept the query of the device management unit on the firmware upgrade state, negative acknowledgement information may be sent to the PCIE device.

S1103, the device management unit sends an inquiry request to the PCIE device.

S1104, the PCIE device determines whether the firmware upgrade is completed. If the PCIE device determines that the firmware upgrade is completed, S1105 is executed, and if the PCIE device does not complete the firmware upgrade, S1106 is executed.

S1105, the PCIE device sends an upgrade complete message to the device management unit.

S1106, the PCIE device sends a wait message to the device management unit.

S1107, the device management unit determines whether to continue querying the firmware upgrade status of the PCIE device. If the device management unit continues to query the firmware upgrade status of the PCIE device, S1103 is executed again. If the device management unit determines that the firmware upgrade status of the PCIE device is not to be queried any more, then S1108 is performed.

S1108, the device management unit ends the inquiry operation.

Optionally, after the device management unit finishes the current query on the firmware upgrade status, the device management unit may restart the query on the firmware upgrade status after waiting for a period of time, or wait for an interrupt request sent by the PCIE device, where the interrupt request is used to notify the device management unit that the firmware upgrade is completed.

It should be noted that, in the above interaction processes, the device management unit and the PCIE device communicate with each other through an I3C protocol interface.

In the embodiment of the present application, the device management unit implements query on the firmware upgrade status of the PCIE device through read operation in the extended I3C communication protocol, implements monitoring and management on the firmware upgrade status of the PCIE device, not only gets rid of dependence and constraint of firmware upgrade of the PCIE device on the OS, improves usability and maintainability of the PCIE device, but also simplifies the query process, and improves query efficiency.

In the embodiment of the present application, the device management unit and the PCIE device may be divided into the functional modules according to the above method example, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated module can be realized in a form of hardware or a form of a software functional module. It should be noted that, in the embodiment of the present application, the division of the module is schematic, and is only one logic function division, and another division manner may be available in actual implementation. The following description will be given by taking an example in which each function module is divided for each function.

As shown in fig. 12, fig. 12 is a schematic diagram of a firmware upgrading apparatus provided in an embodiment of the present application. The firmware upgrade apparatus may include a transmitting module 1201 and a receiving module 1202. The transmitting module 1201 and the receiving module 1202 may communicate with the outside, and the transmitting module 1201 and the receiving module 1202 may also be referred to as a communication interface, a transceiving unit, or a transceiving module. The sending module 1201 and the receiving module 1202 may be configured to perform the actions performed by the device management unit in the above method embodiments.

In one possible design, the firmware upgrading apparatus may implement the steps or processes executed by the device management unit corresponding to the above method embodiment, for example, the device management unit, or a chip or circuit configured in the device management unit.

A sending module 1201, configured to send a firmware upgrade command to the PCIE device through an I3C protocol interface;

a receiving module 1202, configured to receive, through the I3C protocol interface, a response message sent by the PCIE device;

the sending module 1201 is further configured to send a firmware file to the PCIE device through the I3C protocol interface, where the firmware file is used for the PCIE device to upgrade a current firmware.

Optionally, the receiving module 1202 is further configured to receive, through the I3C protocol interface, an upgrade completion message sent by the PCIE device.

Optionally, the receiving module 1202 is further configured to receive, through the I3C protocol interface, an interrupt request sent by the PCIE device; the sending module 1201 is further configured to send an interrupt response to the PCIE device through the I3C protocol interface, where the interrupt response is used to indicate that the PCIE device is allowed to send the upgrade completion message.

Optionally, the sending module 1201 is further configured to send, through the I3C protocol interface, a query request to the PCIE device, where the query request is used for the PCIE device to determine whether to complete upgrading of the current firmware; the receiving module 1202 is further configured to receive, through the I3C protocol interface, an upgrade completion message sent by the PCIE device if the PCIE device completes upgrading the current firmware, and receive, through the I3C protocol interface, a wait message sent by the PCIE device if the PCIE device does not complete upgrading the current firmware.

Optionally, the sending module 1201 is further configured to send a query command to the PCIE device through the I3C protocol interface;

the receiving module is further configured to receive, through the I3C protocol interface, a query response sent by the PCIE device.

Optionally, the sending module 1201 is further configured to send the firmware upgrade command to at least two PCIE devices in the PCIE device group through the I3C protocol interface.

Optionally, the sending module 1201 is further configured to send the firmware upgrade command to all PCIE devices on the I3C bus through the I3C protocol interface.

Optionally, the response message includes confirmation information and negative confirmation information, the confirmation response is used to indicate that the current firmware has the upgrade condition, and the negative confirmation information is used to indicate that the current firmware does not have the upgrade condition;

the sending module 1201 is further configured to send the firmware file to the PCIE device through the I3C protocol interface if the response message is the acknowledgement information.

It should be noted that, the implementation of each module may also correspond to the corresponding description of the method embodiments shown in fig. 8, fig. 10, and fig. 11, and execute the method and the function executed by the device management unit in the foregoing embodiments.

As shown in fig. 13, fig. 13 is a schematic diagram of another firmware upgrading apparatus provided in the embodiment of the present application. The firmware upgrading apparatus may include a receiving module 1301, a processing module 1302, and a transmitting module 1303. The receiving module 1301 and the sending module 1303 may communicate with the outside, the receiving module 1301 and the sending module 1303 may also be referred to as a communication interface, a transceiver unit, or a transceiver module, and the processing module 1302 may perform processing-related actions. The receiving module 1301, the processing module 1302, and the sending module 1303 may be configured to perform the actions performed by the PCIE device in the foregoing method embodiment.

In a possible design, the firmware upgrading apparatus may implement steps or processes executed by a PCIE device corresponding to the foregoing method embodiment, for example, the firmware upgrading apparatus may be a PCIE device, or a chip or a circuit configured in the PCIE device.

A receiving module 1301, configured to receive a firmware upgrade command sent by an apparatus management unit through an I3C protocol interface;

a sending module 1303, configured to send a response message to the device management unit through the I3C protocol interface;

a receiving module 1301, further configured to receive, through the I3C protocol interface, a firmware file sent by the device management unit;

the processing module 1302 is configured to upgrade the current firmware according to the firmware file.

Optionally, the sending module 1303 is further configured to send an upgrade completion message to the device management unit through the I3C protocol interface.

Optionally, the sending module 1303 is further configured to send an interrupt request to the device management unit through the I3C protocol interface; the receiving module 1301 is further configured to receive, through the I3C protocol interface, an interrupt response sent by the device management unit, where the interrupt response is used to indicate that the PCIE device is allowed to send the upgrade completion message.

Optionally, the receiving module 1301 is further configured to receive, through the I3C protocol interface, an inquiry request sent by the device management unit; the processing module 1302 is further configured to determine whether to complete upgrading of the current firmware according to the query request; the sending module 1303 is further configured to send an upgrade completion message to the device management unit through the I3C protocol interface if the PCIE device completes upgrading the current firmware, and send a waiting message to the device management unit through the I3C protocol interface if the PCIE device does not complete upgrading the current firmware.

Optionally, the receiving module 1301 is further configured to receive, through the I3C protocol interface, an inquiry command sent by the device management unit; the sending module 1303 is further configured to send an inquiry response to the device management unit through the I3C protocol interface.

Optionally, the response message includes acknowledgement information and negative acknowledgement information,

the processing module 1302 is further configured to determine whether the current firmware has an upgrade condition;

a sending module 1303, configured to send, if the current firmware has the upgrade condition, confirmation information to the device management unit through the I3C protocol interface; and if the current firmware does not have the upgrading condition, sending negative confirmation information to the equipment management unit through the I3C protocol interface.

Optionally, the receiving module 1301 is further configured to receive, by the PCIE device through an I3C protocol interface, the firmware file sent by the device management unit if the current firmware has the upgrade condition.

It should be noted that, the implementation of each module may also correspond to the corresponding description of the method embodiments shown in fig. 8, fig. 10, and fig. 11, and execute the method and the function executed by the PCIE device in the foregoing embodiments.

Fig. 14 is a schematic structural diagram of a device management unit according to an embodiment of the present application. The device management unit may be applied in a system as shown in fig. 1, and perform the functions of the device management unit in the above method embodiment, or implement the steps or processes performed by the device management unit in the above method embodiment.

As shown in fig. 14, the device management unit includes a processor 1401 and a transceiver 1402. Optionally, the device management unit further comprises a memory 1403. The processor 1401, the transceiver 1402 and the memory 1403 can communicate with each other via the internal connection path to transmit control and/or data signals, the memory 1403 is used for storing a computer program, and the processor 1401 is used for calling and running the computer program from the memory 1403 to control the transceiver 1402 to transmit and receive signals. Optionally, the device management unit may further include an antenna, configured to send out the uplink data or the uplink control signaling output by the transceiver 1402 through a wireless signal.

The processor 1401 and the memory 1403 may be combined into a processing means and the processor 1401 is adapted to execute the program code stored in the memory 1403 to implement the above-mentioned functions. In particular implementations, the memory 1403 may also be integrated with the processor 1401 or may be separate from the processor 1401.

The transceiver 1402 may correspond to the receiving module and the transmitting module in fig. 12, and may also be referred to as a transceiver unit or a transceiver module. The transceiver 1402 may include a receiver (or receiver, receiving circuit) and a transmitter (or transmitter, transmitting circuit). Wherein the receiver is used for receiving signals, and the transmitter is used for transmitting signals.

It should be understood that the device management unit shown in fig. 14 is capable of implementing various processes involving the device management unit in the method embodiments shown in fig. 8, 10 and 11. The operation and/or function of each module in the device management unit are respectively to implement the corresponding flow in the above method embodiment. Specifically, reference may be made to the description of the above method embodiments, and the detailed description is appropriately omitted herein to avoid redundancy.

The processor 1401 may be configured to execute the actions implemented inside the device management unit described in the foregoing method embodiment, and the transceiver 1402 may be configured to execute the actions transmitted by or received from the PCIE device by the device management unit described in the foregoing method embodiment. Please refer to the description in the previous embodiment of the method, which is not repeated herein.

Processor 1401 may be, among other things, a central processing unit, a general purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic device, transistor logic, a hardware component, or any combination thereof. Which may implement or perform the various illustrative logical blocks, modules, and circuits described in connection with the disclosure. The processor 1401 may also be a combination that performs a computing function, e.g., a combination comprising one or more microprocessors, a digital signal processor and a microprocessor, or the like. The communication bus 1404 may be an I3C bus. For ease of illustration, only one thick line is shown in FIG. 14, but this is not intended to represent only one bus or type of bus. A communication bus 1404 is used to enable connective communication between these components. In the embodiment of the present application, the transceiver 1402 is used for performing signaling or data communication with other node devices. The memory 1403 may include a volatile memory, such as a nonvolatile dynamic random access memory (NVRAM), a phase change random access memory (PRAM), a Magnetoresistive Random Access Memory (MRAM), and the like, and may further include a nonvolatile memory, such as at least one magnetic disk memory device, an electrically erasable programmable read-only memory (EEPROM), a flash memory device, such as a NOR flash memory or a NAND flash memory, a semiconductor device, such as a Solid State Disk (SSD), and the like. The memory 1403 may optionally be at least one storage device located remotely from the processor 1401 as described above. Optionally, a set of computer program code or configuration information may also be stored in memory 1403. Alternatively, the processor 1401 may also execute programs stored in the memory 1403. The processor may cooperate with the memory and the transceiver to perform any of the methods and functions of the device management unit of the embodiments of the above-mentioned application.

Fig. 15 is a schematic structural diagram of a PCIE device according to an embodiment of the present application. The PCIE device may be applied to the system shown in fig. 1, to execute the function of the PCIE device in the foregoing method embodiment, or to implement the steps or the flow executed by the PCIE device in the foregoing method embodiment.

As shown in fig. 15, the PCIE device includes a processor 1501 and a transceiver 1502. Optionally, the PCIE device further includes a memory 1503. The processor 1501, the transceiver 1502 and the memory 1503 can communicate with each other via the internal connection path to transmit control and/or data signals, the memory 1503 is used for storing computer programs, and the processor 1501 is used for calling and running the computer programs from the memory 1503 to control the transceiver 1502 to transmit and receive signals. Optionally, the PCIE device may further include an antenna, configured to send out the uplink data or the uplink control signaling output by the transceiver 1502 through a wireless signal.

The processor 1501 may correspond to the processing module in fig. 13, the processor 1501 and the memory 1503 may be combined into a processing device, and the processor 1501 is configured to execute the program codes stored in the memory 1503 to implement the functions. In particular, the memory 1503 may be integrated into the processor 1501 or may be independent of the processor 1501.

The transceiver 1502 may correspond to the transmitting module and the receiving module in fig. 13, and may also be referred to as a transceiver unit or a transceiver module. The transceiver 1502 may include a receiver (or receiver, receive circuitry) and a transmitter (or transmitter, transmit circuitry). The receiver is used for receiving signals, and the transmitter is used for transmitting signals.

It should be understood that the PCIE device shown in fig. 15 can implement the processes related to the PCIE device in the method embodiments shown in fig. 8, fig. 10, and fig. 11. The operation and/or function of each module in the PCIE device are respectively to implement the corresponding flow in the foregoing method embodiment. Specifically, reference may be made to the description of the above method embodiments, and the detailed description is appropriately omitted herein to avoid redundancy.

The processor 1501 described above can be used to perform the actions described in the foregoing method embodiments that are implemented inside a PCIE device, and the transceiver 1502 can be used to perform the actions described in the foregoing method embodiments that the PCIE device sends to or receives from the device management unit. Please refer to the description of the previous embodiment of the method, which is not repeated herein.

The processor 1501 may be any of the various types of processors mentioned above. The communication bus 1504 may be an I3C bus. For ease of illustration, only one thick line is shown in FIG. 15, but this is not intended to represent only one bus or type of bus. A communication bus 1504 is used to enable connected communications between these components. The transceiver 1502 of the device in the embodiment of the present application is used for communicating signaling or data with other devices. Memory 1503 may be of the various types mentioned previously. Memory 1503 may optionally be at least one memory device located remotely from processor 1501 as previously described. A set of computer program codes or configuration information is stored in the memory 1503 and the processor 1501 executes the programs in the memory 1503. The processor may cooperate with the memory and the transceiver to perform any one of the methods and functions of the PCIE device in the embodiments of the application.

The embodiment of the present application further provides a chip system, where the chip system includes a processor, and is configured to support a device management unit or a PCIE device to implement the functions involved in any of the embodiments, for example, to generate or process a firmware upgrade involved in the foregoing method. In one possible design, the chip system may further include a memory, and the memory is used for program instructions and data necessary for the device management unit or the PCIE device. The chip system may be constituted by a chip, or may include a chip and other discrete devices. The input and the output of the chip system respectively correspond to the receiving and sending operations of the device management unit or the PCIE device in the method embodiment.

According to the method provided by the embodiment of the present application, the present application further provides a computer program product, which includes: a computer program which, when run on a computer, causes the computer to perform the method of any one of the embodiments shown in figures 8, 10 and 11.

According to the method provided by the embodiment of the present application, a computer-readable medium is further provided, and the computer-readable medium stores a computer program, and when the computer program runs on a computer, the computer is caused to execute the method of any one of the embodiments shown in fig. 8, fig. 10 and fig. 11.

In the above embodiments, all or part of the implementation may be realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the application to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a Digital Video Disk (DVD)), or a semiconductor medium (e.g., a Solid State Disk (SSD)), among others.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method of firmware upgrade, the method comprising:

the device management unit sends a firmware upgrading command to the PCIE device through an I3C protocol interface;

the device management unit receives a response message sent by the PCIE device through the I3C protocol interface;

and the equipment management unit sends a firmware file to the PCIE equipment through the I3C protocol interface, wherein the firmware file is used for upgrading the current firmware by the PCIE equipment.

2. The method of claim 1, wherein after the device management unit sends the firmware file to the PCIE device through an I3C protocol interface, the method further comprises:

and the equipment management unit receives an upgrade completion message sent by the PCIE equipment through the I3C protocol interface.

3. The method of claim 2, wherein before the device management unit receives an upgrade complete message sent by the PCIE device through the I3C protocol interface, the method further comprises:

the device management unit receives an interrupt request sent by the PCIE device through the I3C protocol interface;

and the equipment management unit sends an interrupt response to the PCIE equipment through the I3C protocol interface, wherein the interrupt response is used for indicating that the PCIE equipment is allowed to send the upgrade completion message to the equipment management unit.

4. The method of claim 1, wherein after the device management unit sends the firmware file to the PCIE device through the I3C protocol interface, the method further comprises:

the device management unit sends a query request to the PCIE device through the I3C protocol interface, where the query request is used for the PCIE device to determine whether to complete upgrading of the current firmware;

if the PCIE device finishes upgrading the current firmware, the device management unit receives an upgrade completion message sent by the PCIE device through the I3C protocol interface, and if the PCIE device does not finish upgrading the current firmware, the device management unit receives a waiting message sent by the PCIE device through the I3C protocol interface.

5. The method of claim 4, wherein before the device management unit sends the query request to the PCIE device through the I3C protocol interface, the method further comprises:

the equipment management unit sends a query command to the PCIE equipment through the I3C protocol interface;

and the equipment management unit receives a query response sent by the PCIE equipment through the I3C protocol interface.

6. The method of any one of claims 1-5, wherein the sending, by the device management unit, the firmware upgrade command to the PCIE device over the I3C protocol interface includes:

and the equipment management unit sends the firmware upgrading command to at least two PCIE equipment in the PCIE equipment group through the I3C protocol interface.

7. The method of any one of claims 1-5, wherein the sending, by the device management unit, the firmware upgrade command to the PCIE device over the I3C protocol interface includes:

and the equipment management unit sends the firmware upgrading command to all PCIE equipment on an I3C bus through the I3C protocol interface.

8. The method of claim 1, wherein the response message comprises acknowledgement information indicating that the current firmware is subject to an upgrade condition and negative acknowledgement information indicating that the current firmware is not subject to an upgrade condition;

the sending, by the device management unit, the firmware file to the PCIE device through the I3C protocol interface includes:

if the response message is the confirmation message, the device management unit sends the firmware file to the PCIE device through the I3C protocol interface.

9. A method of firmware upgrade, the method comprising:

the PCIE equipment receives a firmware upgrading command sent by the equipment management unit through an I3C protocol interface;

the PCIE equipment sends a response message to the equipment management unit through the I3C protocol interface;

the PCIE equipment receives the firmware file sent by the equipment management unit through the I3C protocol interface;

and the PCIE equipment upgrades the current firmware according to the firmware file.

10. The method of claim 9, wherein after the PCIE device upgrades the current firmware according to the firmware file, the method further comprises:

and the PCIE equipment sends an upgrade completion message to the equipment management unit through the I3C protocol interface.

11. The method of claim 10, wherein before the PCIE device sends an upgrade complete message to the device management unit through the I3C protocol interface, the method further comprises:

the PCIE equipment sends an interrupt request to the equipment management unit through the I3C protocol interface;

and the PCIE equipment receives an interrupt response sent by the equipment management unit through the I3C protocol interface, wherein the interrupt response is used for indicating that the PCIE equipment is allowed to send the upgrade completion message to the equipment management unit.

12. The method of claim 9, wherein after the PCIE device upgrades the current firmware according to the firmware file, the method further comprises:

the PCIE equipment receives an inquiry request sent by the equipment management unit through the I3C protocol interface;

the PCIE equipment determines whether the current firmware is upgraded or not according to the query request;

if the PCIE device completes upgrading the current firmware, the PCIE device sends an upgrade completion message to the device management unit through the I3C protocol interface, and if the PCIE device does not complete upgrading the current firmware, the PCIE device sends a waiting message to the device management unit through the I3C protocol interface.

13. The method of claim 12, wherein before the PCIE device receives the query request sent by the device management unit through the I3C protocol interface, the method further comprises:

the PCIE equipment receives a query command sent by the equipment management unit through the I3C protocol interface;

and the PCIE equipment sends a query response to the equipment management unit through the I3C protocol interface.

14. The method of any of claims 9-13, wherein the response message includes acknowledgement information and negative acknowledgement information, the method further comprising:

the PCIE equipment judges whether the current firmware has an upgrading condition;

if the current firmware has the upgrading condition, the PCIE equipment sends the confirmation information to the equipment management unit through the I3C protocol interface; and if the current firmware does not have the upgrading condition, the PCIE equipment sends the negative confirmation information to the equipment management unit through the I3C protocol interface.

15. The method of claim 14, wherein the receiving, by the PCIE device through the I3C protocol interface, the firmware file sent by the device management unit comprises:

and if the current firmware has the upgrading condition, the PCIE equipment receives the firmware file sent by the equipment management unit through the I3C protocol interface.

16. A firmware upgrade system, characterized in that the firmware upgrade system comprises a device management unit and a PCIE device, the device management unit is configured to execute the method according to any one of claims 1 to 8, and the PCIE device is configured to execute the method according to any one of claims 9 to 15.