WO2024066405A1 - 一种太阳能电池及其制备方法 - Google Patents

一种太阳能电池及其制备方法 Download PDF

Info

Publication number
WO2024066405A1
WO2024066405A1 PCT/CN2023/095589 CN2023095589W WO2024066405A1 WO 2024066405 A1 WO2024066405 A1 WO 2024066405A1 CN 2023095589 W CN2023095589 W CN 2023095589W WO 2024066405 A1 WO2024066405 A1 WO 2024066405A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
composite layer
solar cell
cell
velvet
Prior art date
Application number
PCT/CN2023/095589
Other languages
English (en)
French (fr)
Inventor
王永磊
顾小兵
刘童
何博
何永才
丁蕾
董鑫
张洪旭
刘杨
徐希翔
Original Assignee
隆基绿能科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 隆基绿能科技股份有限公司 filed Critical 隆基绿能科技股份有限公司
Publication of WO2024066405A1 publication Critical patent/WO2024066405A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0236—Special surface textures
    • H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells

Definitions

  • the present application relates to the technical field of solar cells, and in particular to a solar cell and a method for preparing the same.
  • Organic-inorganic hybrid perovskite solar cells have attracted widespread attention worldwide as a new type of high-efficiency, low-cost solar cell.
  • the photoelectric conversion efficiency of single-junction small-area perovskite cells has rapidly climbed from 3.8% in 2009 to more than 25%, and the photoelectric conversion efficiency of perovskite/silicon heterojunction stacked cells has also reached more than 29%.
  • the rapid efficiency development has made it the focus of current photovoltaic research institutions and companies.
  • perovskite solar cells Compared with traditional thin-film solar cells (copper indium gallium selenide, cadmium telluride, etc.), perovskite solar cells have the advantages of high conversion efficiency, simple preparation process and low-cost potential, and have become the thin-film solar cell technology with the most industrial prospects.
  • the cutoff wavelength of the solar cell spectral response can be controlled, making it the most ideal top cell absorption layer material.
  • Silicon heterojunction solar cell technology has the advantages of simple process (texture cleaning ⁇ amorphous silicon deposition ⁇ TCO deposition ⁇ silver electrode printing), low preparation temperature ( ⁇ 220°C), high conversion efficiency (>25%), symmetrical structure (double-sided), etc., and is considered to be the third generation of cell technology after PERC cells.
  • Silicon heterojunction cells have high infrared band absorption, strong weak light effect and structural advantages that can match p-i-n, making them one of the best bottom cell choices.
  • the "perovskite/silicon-based heterojunction" stacked cell structure is formed by perovskite cells (top cells) and silicon-based heterojunction cells (bottom cells) to achieve distributed absorption of the solar spectrum, and is expected to achieve a conversion efficiency of more than 30%.
  • the present application proposes a stacked solar cell. Since the lower cell has a small velvet light-trapping structure and the middle composite layer has a smooth surface, it is simpler to prepare the perovskite absorption layer of the upper cell, and the growth of crystals in the perovskite absorption layer can also be well controlled, thereby improving the performance of the solar cell.
  • the present application provides a solar cell, comprising a lower cell and an upper cell, wherein a composite layer is arranged between the lower cell and the upper cell, and the composite layer completely covers a side surface of the lower cell;
  • the lower battery has a velvet structure on a surface of one side close to the composite layer, and the height of the velvet structure is ⁇ 2 ⁇ m;
  • a surface of the composite layer on one side facing away from the lower battery is at least partially located above the top of the velvet structure of the lower battery and is a smooth plane.
  • the smoothness of the smooth plane is ⁇ 500nm.
  • the composite layer is conformal to the velvet structure on a surface of one side close to the lower battery.
  • the entire surface of the composite layer on a side facing away from the lower battery is a smooth plane.
  • the surface of the composite layer on one side facing away from the lower battery is a smooth plane just above the top of the velvet structure of the lower battery, and the other parts are conformal with the velvet structure of the lower battery.
  • a surface conforming to the velvet structure of the lower battery has a concave area, and the height difference between the maximum concave area and the smooth plane of the composite layer does not exceed 1 ⁇ m.
  • the composite layer is a boron-doped zinc oxide layer.
  • the lower battery is a silicon-based battery
  • the upper battery is a perovskite battery.
  • the suede structure is selected from one or more of columnar, conical, terraced, arc-shaped grooves or arc-shaped protrusions.
  • the velvet structure is selected from a pyramid structure.
  • the present application also provides a method for preparing a solar cell, comprising the following steps:
  • the height of the velvet structure is ⁇ 2 ⁇ m; the surface of the composite layer on one side away from the lower battery is a smooth plane at least in a portion directly above the top of the velvet structure of the lower battery.
  • the composite layer is formed by the following steps:
  • an initial composite layer is formed on the surface of one side of the lower battery having a velvet surface; and then chemical mechanical polishing is used to form a composite layer with a smooth surface.
  • the prepared solar cell is the aforementioned solar cell.
  • the solar cell provided in the present application has a higher short-circuit circuit density because the lower cell has a small velvet light-trapping structure, and the middle composite layer has a smooth surface, which makes the process of preparing the perovskite absorption layer of the upper cell simpler, and can also well control the growth of crystals in the perovskite absorption layer (crystal quality, grain orientation), thereby improving the performance of the solar cell.
  • FIG1 is a schematic diagram of the structure of a solar cell provided in the present application.
  • FIG. 2 is a schematic diagram of the structure of another solar cell provided in the present application.
  • 4-1 is a first metal electrode
  • 3-4 is a first transparent conductive layer
  • 3-3 is a first carrier transport layer
  • 3-2 is a perovskite absorption layer
  • 3-1 is a second carrier transport layer
  • 2-1 is a composite layer
  • 1-4 is a first doped amorphous silicon layer
  • 1-2 is an intrinsic amorphous silicon layer
  • 1-1 is a silicon-based substrate
  • 1-3 is a second doped amorphous silicon layer
  • 1-5 is a second transparent conductive layer
  • 4-2 is a second metal electrode.
  • a velvet structure will be formed on the surface of silicon heterojunction solar cells when they are cleaned and velveted.
  • the normal velvet size is about 4 ⁇ m.
  • a layer of 200-500nm lead iodide material is generally vacuum-deposited on the velvet first, and the lead iodide will be distributed on the velvet in a random manner.
  • an organic solution of AX (A is FAI or MA, X is I, Br or Cl) material is coated on the surface of the lead iodide layer, and the AX material reacts with lead iodide under heating conditions to form a perovskite layer.
  • the advantage of this technical route is that a random perovskite layer can be prepared on the velvet surface, retaining the light-trapping structure of the velvet and improving the short-circuit current density of the battery.
  • the second technical route in perovskite/silicon heterojunction tandem solar cells after preparing the velvet, use mechanical or chemical methods to polish the velvet into a planar structure, and then use a one-step solution method to directly spin-coat the planar structure to prepare the perovskite layer.
  • the advantages of preparing the perovskite layer by a one-step solution method on a planar structure are: it is convenient to regulate the band gap of the perovskite, ensure the uniformity of the perovskite layer and the crystal orientation of the perovskite material, so as to obtain a very high FF and the best current matching.
  • the loss of the light trapping effect of the velvet will lead to a loss of short-circuit current density, thereby limiting the further improvement of the efficiency of the tandem battery.
  • the existence of the velvet structure increases the short-circuit current density because of the light trapping structure, and on the other hand, increases the difficulty of preparing the perovskite layer on the velvet. Reducing the difficulty of film formation of the perovskite layer while ensuring the light trapping effect of the velvet structure has become an important method to improve the electrical performance of the tandem battery.
  • the present application provides a solar cell, comprising a lower cell and an upper cell, wherein a composite layer 3 - 1 is disposed between the lower cell and the upper cell, and the composite layer 3 - 1 completely covers a surface of one side of the lower cell;
  • the lower battery has a velvet structure on one side surface close to the composite layer 3-1, and the height L2 of the velvet structure is ⁇ 2 ⁇ m, for example, it can be 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, 160nm, 170nm, 180nm, 190nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 750nm, 800nm, 850nm, 900nm, 950nm, 1 ⁇ m, 1.1 ⁇ m, 1.2 ⁇ m, 1.3 ⁇ m, 1.4 ⁇ m, 1.5 ⁇ m, 1.6 ⁇ m, 1.7 ⁇ m, 1.8 ⁇ m, 1.9 ⁇ m or 2 ⁇ m.
  • the surface of the composite layer 3-1 on one side facing away from the lower battery is a smooth plane at least in a portion directly above the top of the velvet structure of the lower battery, and its smoothness is ⁇ 500nm, for example, 500nm, 480nm, 460nm, 450nm, etc.
  • the smoothness is the height difference between the highest point and the lowest point.
  • the test method is a laser 3D microscope.
  • the layers of the upper cell stacked with the composite layer 3-1 are all planes. Therefore, the preparation process of each layer of the upper cell is relatively simple, and the quality, grain orientation and thickness of the perovskite crystals in the perovskite absorption layer 3-2 in the upper cell can be controlled, thereby improving the fill factor FF and short-circuit current density of the solar cell, thereby improving the electrical performance of the solar cell.
  • the thickness of the perovskite absorption layer at each position is relatively uniform. Under the condition of a uniform thickness film layer, the growth conditions of the perovskite absorption layer at each position are basically the same, so its grain size and grain orientation can be controlled by adjusting the same parameter. When the lower cell has a large velvet structure, the thickness of the perovskite absorption layer is affected by the position.
  • the thickness of the perovskite absorption layer at the top of the pyramid is about 100nm, and the thickness of the perovskite layer at the bottom of the pyramid is about 2000nm, which makes it difficult to achieve uniform film formation.
  • the growth conditions of the perovskite layer at each position are different, so its grain size and grain orientation are very difficult to control.
  • the lower cell is a silicon-based cell
  • the upper cell is a perovskite cell
  • the lower cell includes a second transparent conductive layer 1-5, a second amorphous silicon layer, a second intrinsic amorphous silicon layer, a silicon-based substrate 1-1, a first intrinsic amorphous silicon layer, and a first amorphous silicon layer, which are stacked in sequence, and the first amorphous silicon layer is stacked with the composite layer 3-1 on one side of the surface away from the first amorphous silicon layer.
  • a second metal electrode 4-2 is arranged on the second transparent conductive layer 1-5 on one side of the surface away from the second amorphous silicon layer.
  • the second transparent conductive layer 1-5 may be a transparent conductive film, specifically fluorine-doped tin oxide (FTO), indium tin oxide (ITO) or aluminum-doped zinc oxide (AZO), etc.
  • the thickness of the second transparent conductive layer 1-5 is 70-120nm, for example, 70nm, 80nm, 90nm, 100nm, 110nm or 120nm.
  • the first amorphous silicon layer and the second amorphous silicon layer can both be an n-type amorphous silicon layer or a p-type amorphous silicon layer, and the first amorphous silicon layer and the second amorphous silicon layer are different types of amorphous silicon layers.
  • the first amorphous silicon layer is an n-type amorphous silicon layer
  • the second amorphous silicon layer is a p-type amorphous silicon layer
  • the first amorphous silicon layer is a p-type amorphous silicon layer
  • the second amorphous silicon layer is an n-type amorphous silicon layer.
  • the thickness of the first amorphous silicon layer and the second amorphous silicon layer are 5-15nm, respectively, for example, 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm or 15nm.
  • the silicon-based substrate 1 - 1 is n-type crystalline silicon or p-type crystalline silicon.
  • the first intrinsic amorphous silicon layer and the second intrinsic amorphous silicon layer are both amorphous silicon, and the thickness thereof is 5-10 nm, for example, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm or 10 nm.
  • the second metal electrode 4 - 2 can be made of one or more of metal materials such as Ag, Au, Cu, Al, Ni, C materials, and polymer conductive materials.
  • the composite layer 3 - 1 is a boron-doped zinc oxide layer, and boron is uniformly doped in the zinc oxide layer.
  • the upper battery includes a second carrier transport layer 3-1, a perovskite absorption layer 3-2, a first carrier transport layer 3-3, and a first transparent conductive layer 3-4 stacked in sequence from the side surface close to the composite layer 3-1.
  • a first metal electrode 4-1 is arranged on the side surface of the first transparent conductive layer 3-4 away from the first carrier transport layer 3-3.
  • the first carrier transport layer 3-3 can be a hole transport layer or an electron transport layer, and the first carrier transport layer 3-3 and the second carrier transport layer 3-1 have opposite conductivity types.
  • the first carrier transport layer 3-3 is a hole transport layer, it can be a molybdenum oxide layer, a [bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA) layer, a copper iodide layer or a Spiro-OMeTAD (2,2',7,7'-Tetrakis[N,N-di(4-methoxyphenyl)amino]-9,9'-spirobifluorene Chinese name is 2,2',7,7'-tetra[N,N-di(4-methoxyphenyl)amino]-9,9'-spirobifluorene) layer, a PEDOT layer, a PEDOT:PSS layer, a P3HT layer, a P3OHT layer, a P3
  • the second carrier transport layer 3-1 is an electron transport layer, which can be a titanium oxide layer, a tin oxide layer, a C60 layer or a C60-PCBM layer, a [60]PCBM ([6,6]-phenyl-C 61 butyric acid methyl ester, Chinese name is [6,6]-phenyl-C 61 -butyric acid isomethyl ester) layer, a [70]PCBM ([6,6]-Phenyl-C 71 -butyric acid methyl ester, Chinese name is [6,6]-phenyl-C 71 -butyric acid isomethyl ester) layer, a bis[60]PCBM (Bis(1-[3-(methoxycarbonyl)propyl]-1-phenyl)-[6,6]C 62 ) layer, a [60]ICBA (1',1",4',4"-Tetrahydro-di[1,4]methanonaphthaleno[1,2:2',
  • the first carrier transport layer 3-3 is an electron transport layer, it can be a titanium oxide layer, a tin oxide layer, a C60 layer or a C60-PCBM layer, a [60]PCBM ([6,6]-phenyl-C 61 butyric acid methyl ester, Chinese name is [6,6]-phenyl-C 61 -butyric acid isomethyl ester) layer, a [70]PCBM ([6,6]-Phenyl-C 71 -butyric acid methyl ester, Chinese name is [6,6]-phenyl-C 71 -butyric acid isomethyl ester) layer, a bis[60]PCBM (Bis(1-[3-(methoxycarbonyl)propyl]-1-phenyl)-[6,6]C 62 ) layer, [60]ICBA(1',1",4',4"-Tetrahydro-di[1,4]methanonaphthaleno[1,2:2',3
  • the second carrier transport layer 3-1 is a hole transport layer, which can be a molybdenum oxide layer, a [bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA) layer, a copper iodide layer or a Spiro-OMeTAD (2,2',7,7'-Tetrakis[N,N-di(4-methoxyphenyl)amino]-9,9'-spirobifluorene
  • Chinese name is 2,2',7,7'-tetra[N,N-di(4-methoxyphenyl)amino]-9,9'-spirobifluorene) layer, a PEDOT layer, a PEDOT:PSS layer, a P3HT layer, a P3OHT layer, a P3ODDT layer, a NiOx layer or a CuSCN layer.
  • the thickness of the first carrier transport layer 3-3 and the second carrier transport layer 3-1 is 10-50nm, for example, it can be 10nm, 11nm, 12nm, 13nm, 14nm, 15nm, 16nm, 17nm, 18nm, 19nm, 20nm, 21nm, 22nm, 23nm, 24nm, 25nm, 26nm, 27nm, 28nm, 29nm, 30nm, 31nm, 32nm, 33nm, 34nm, 35nm, 36nm, 37nm, 38nm, 39nm, 40nm, 41nm, 42nm, 43nm, 44nm, 45nm, 46nm, 47nm, 48nm, 49nm or 50nm.
  • the perovskite material is dissolved in a precursor solution, and a mixed solution of DMF and DMSO is generally selected as the solvent.
  • the concentration of the precursor is controlled, and a liquid film is prepared on the second carrier transport layer 3-1 by one or more of the methods such as scraping, ultrasonic spraying, and slit coating, and then the liquid film is solidified by one of the methods such as anti-solvent extraction, air knife, vacuum exhaust, etc., and finally the crystal growth of the perovskite is controlled by annealing to obtain the perovskite absorption layer 3-2.
  • the thickness of the titanium ore absorption layer 3-2 can be 200nm-2000nm, for example, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm, 1000nm, 1100nm, 1200nm, 1300nm, 1400nm, 1500nm, 1600nm, 1700nm, 1800nm, 1900nm or 2000nm.
  • the first transparent conductive layer 3-4 can be a transparent conductive film, specifically fluorine-doped tin oxide (FTO), indium tin oxide (ITO) or aluminum-doped zinc oxide (AZO), etc.; the thickness of the second transparent conductive layer 1-5 is 70-120nm, for example, it can be 70nm, 80nm, 90nm, 100nm, 110nm or 120nm.
  • FTO fluorine-doped tin oxide
  • ITO indium tin oxide
  • AZO aluminum-doped zinc oxide
  • the composite layer 3 - 1 is conformal with the velvet structure on a surface of one side close to the velvet structure of the lower battery.
  • the maximum thickness of the composite layer 3-1 is L1
  • the height of the velvet structure is L2.
  • the maximum thickness of the composite layer 3-1 is ⁇ the height of the velvet structure, that is, L1 ⁇ L2
  • the entire surface of the composite layer 3-1 on the side away from the lower battery is a smooth plane.
  • the second carrier transport layer 3-1, the perovskite absorption layer 3-2, the first carrier transport layer 3-3, and the first transparent conductive layer 3-4 of the upper battery stacked on the smooth plane side of the composite layer 3-1 are all flat.
  • the use of such a flat structure is beneficial to the growth quality of the perovskite absorption layer and can reduce the difficulty of the process.
  • the maximum thickness of the composite layer 3-1 is L1
  • the height of the velvet structure is L2
  • the maximum thickness of the composite layer 3-1 is less than the height of the velvet structure, that is, L1 ⁇ L2
  • the surface of the composite layer 3-1 on one side away from the lower battery is a smooth plane just above the top of the velvet structure of the lower battery, and the other parts are conformal with the velvet structure of the lower battery. Conformal means the same shape.
  • the second carrier transport layer 3-1 stacked on the surface of the composite layer 3-1 facing away from the lower battery not only covers part of the velvet surface and the smooth plane of the composite layer 3-1, but also the surface of the second carrier transport layer 3-1 facing away from the composite layer 3-1 is a plane, and the perovskite absorption layer 3-2, the first carrier transport layer 3-3 and the first transparent conductive layer 3-4 are all planes.
  • the surface conforming to the velvet structure of the lower battery has a concave area, and the difference in horizontal height h between the maximum concave and the smooth plane does not exceed 1 ⁇ m, preferably does not exceed 100 nm.
  • it can be 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, 160nm, 170nm, 180nm, 190nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 750nm, 800nm, 850nm, 900nm, 950nm or 1 ⁇ m.
  • the basic shape of the suede structure is selected from one or more of a columnar shape, a cone shape, a terrace shape, an arc-shaped groove or an arc-shaped protrusion.
  • the velvet structure is randomly or regularly distributed on at least one surface of the lower battery
  • the basic shape of the velvet structure is selected from one or more of a column, a cone, a table, an arc groove or an arc protrusion.
  • it can be a positive or negative triangular prism, a quadrangular prism, a hexagonal prism, a cylindrical, a cone, a triangular pyramid, a quadrangular pyramid, a truncated cone, a triangular prism, a quadrangular prism, and a semicircular arc groove or a semicircular arc protrusion.
  • it is a pyramid structure.
  • the pyramid structure is a pyramid structure.
  • the height L2 of the velvet structure is the horizontal height difference between the lowest point and the highest point on the velvet structure.
  • the maximum thickness L1 of the composite layer 3 - 1 is the height difference between the lowest point of the composite layer surface on one side close to the lower battery and the highest point of the composite layer surface on the side away from the lower battery.
  • the present application provides a method for preparing a solar cell, comprising the following steps:
  • Step 1 providing a lower battery with a velvet structure
  • Step 1.1 The silicon wafer is polished, textured, and cleaned in sequence to form a lower battery with a textured structure.
  • the silicon wafer is a commercial grade M6 N-type silicon wafer with a resistivity of 1-10 ⁇ .cm and a thickness of 150-200 ⁇ m.
  • the height of the velvet structure is ⁇ 2 ⁇ m.
  • Step 1.2 using PECVD to deposit intrinsic amorphous silicon layers 1-2 on both sides of the silicon wafer obtained above, namely, a first intrinsic amorphous silicon layer and a second intrinsic amorphous silicon layer.
  • Step 1.3 Using PECVD, a phosphorus-doped (doping concentration 10 19-20 cm -3 ) N-type amorphous silicon layer is deposited on the surface of the first intrinsic amorphous silicon layer away from the silicon wafer to form a front field structure (ie, the first doped amorphous silicon layer 1 - 4 ).
  • Step 1.4 using PECVD to deposit a boron-doped P-type amorphous silicon layer on the surface of the second intrinsic amorphous silicon layer away from the silicon wafer to form a back emitter structure (ie, the second doped amorphous silicon layer 1-3).
  • Step 1.5 A second transparent conductive material layer is prepared on one side surface of the second doped amorphous silicon layer 1 - 3 by magnetron sputtering to collect and transmit photogenerated carriers.
  • Step 2 forming a composite layer 3-1 on the surface of the lower battery having a velvet surface
  • an initial composite layer 3-1 is formed on the surface of the first doped amorphous silicon layer 1-4 on one side away from the first intrinsic amorphous silicon layer; and then chemical mechanical polishing is used to form the composite layer 3-1 with a smooth surface.
  • the surface of the composite layer 3-1 on one side facing away from the lower battery is a smooth plane at least directly above the top of the velvet structure of the lower battery, and its smoothness is ⁇ 500nm, for example, 500nm, 480nm, 460nm, 450nm, etc.
  • Step 3 preparing an upper battery on a surface of the composite layer 3-1 facing away from the lower battery;
  • Step 3.1 Prepare a second carrier transport layer 3-1 on a surface of the composite layer 3-1 that is away from the first doped amorphous silicon layer 1-4 by magnetron sputtering.
  • Step 3.2 Dissolve the perovskite material in the precursor solution, and generally select a mixed solution of DMF and DMSO as the solvent. Control the concentration of the precursor, prepare a liquid film on the second carrier transport layer 3-1 by one or more of the methods such as scraping, ultrasonic spraying, slit coating, etc., and then solidify the liquid film by one of the methods such as anti-solvent extraction, air knife, vacuum exhaust, etc., and finally control the crystal growth of the perovskite by annealing to obtain the perovskite absorption layer 3-2.
  • the methods such as scraping, ultrasonic spraying, slit coating, etc.
  • Step 3.3 Form a first carrier transport layer 3-3 on the surface of the perovskite absorption layer 3-2 which is away from the second carrier transport layer 3-1.
  • Step 3.4 Prepare a first transparent conductive layer 3-4 on the surface of the first carrier transport layer 3-3 facing away from the perovskite absorption layer 3-2 by magnetron sputtering to form a front transparent conductive film and an anti-reflection film, so as to achieve the purpose of lateral electron transport to the front grid line electrode and reduce optical reflection loss.
  • Step 4 Prepare fine grid lines and main grid lines on the surface of the first transparent conductive layer 3-4 and the second transparent conductive layer 1-5 by screen printing or thermal evaporation, collect current, and form a complete stacked solar cell.
  • a surface anti-reflection film layer can be added on the first transparent conductive layer 3-4, and a 70-120nm anti-reflection film (such as magnesium fluoride MgF2 and silicon nitride SiNx, etc.) can be prepared by electron beam evaporation to improve the photoelectric conversion efficiency of the stacked solar cell.
  • a 70-120nm anti-reflection film such as magnesium fluoride MgF2 and silicon nitride SiNx, etc.
  • the solar cell prepared by the method of the present application is the aforementioned solar cell, and the upper cell, the composite layer 3 - 1 and the lower cell may be specifically described with reference to the aforementioned description.
  • the solar cell of this embodiment is shown in FIG1 , and includes the following steps:
  • Step 1 Prepare the battery
  • Step 1.1 Provide an N-type crystalline silicon substrate: Use a commercial grade M6 N-type silicon wafer with a resistivity of 5 ⁇ .cm and a thickness of 170 ⁇ m. The silicon wafer undergoes polishing, texturing and cleaning procedures in sequence to obtain a pyramid-shaped small textured surface structure with a textured surface pyramid height of 2 ⁇ m.
  • Step 1.2 PECVD is used to deposit 5 nm of intrinsic amorphous silicon layers on both sides of the silicon wafer, that is, the first intrinsic amorphous silicon layer and the second intrinsic amorphous silicon layer constitute the front and back passivation layer films.
  • Step 1.3 Using PECVD, a 5 nm N-type amorphous silicon layer doped with phosphorus (doping concentration 10 19-20 cm -3 ) is deposited on the surface of the first intrinsic amorphous silicon layer away from the silicon wafer to form a front field structure (ie, the first doped amorphous silicon layer 1 - 4 ).
  • Step 1.4 Using PECVD, a 5 nm boron-doped (doping concentration 10 19-20 cm -3 ) P-type amorphous silicon layer is deposited on the surface of the second intrinsic amorphous silicon layer away from the silicon wafer to form a back emitter structure (ie, the second doped amorphous silicon layer 1 - 3 ).
  • Step 1.5 A 120 nm thick ITO layer (ie, a second transparent conductive material layer) is prepared on one side surface of the second doped amorphous silicon layer 1 - 3 by magnetron sputtering to collect and transmit photogenerated carriers.
  • ITO layer ie, a second transparent conductive material layer
  • Step 2 forming a composite layer 3-1 on the surface of the lower battery having a velvet surface
  • a 2.5 ⁇ m BZO layer is prepared on the surface of the first doped amorphous silicon layer 1-4 on the side away from the first intrinsic amorphous silicon layer by LPCVD.
  • the BZO layer is then subjected to chemical mechanical polishing to obtain a BZO layer with an entire smooth plane, whose smoothness is ⁇ 50 nm, and the maximum thickness of the BZO layer after polishing is 2.4 ⁇ m.
  • Step 3 preparing an upper battery on a surface of the composite layer 3-1 facing away from the lower battery;
  • Step 3.1 A 20 nm thick NiOx layer is prepared on the surface of the composite layer 3 - 1 which is away from the first doped amorphous silicon layer 1 - 4 by magnetron sputtering, as a hole transport layer.
  • Step 3.2 Select the (Cs 0.15 FA 0.85 )Pb(I 0.7 Br 0.3 ) 3 -component system, weigh appropriate materials according to the molar ratio, and dissolve them in a mixed solution of DMF and DMSO with a concentration of 1.5M. Then use a spin coating process, set the speed to 3000rpm, and use anisole as an anti-solvent for extraction. Then anneal on a 100°C hot stage for 30min to obtain a perovskite absorption layer 3-2.
  • the perovskite absorption layer 3-2 has a thickness of 500nm and its band gap is generally around 1.65eV.
  • Step 3.3 First, a 25 nm C60 layer is prepared on the surface of the perovskite absorption layer 3-2 away from the second carrier transport layer 3-1 by evaporation, and then ALD is further used at 105°C for 160 cycles to prepare 16 nm TiO2 to achieve longitudinal transport of carriers.
  • Step 3.4 Prepare 100nm of IZO (i.e., the first transparent conductive layer 3-4) on the surface of the first carrier transport layer 3-3 facing away from the perovskite absorption layer 3-2 by magnetron sputtering to form a front transparent conductive film and an anti-reflection film, so as to achieve the purpose of lateral electron transport to the front grid line electrode and reduce optical reflection loss.
  • IZO i.e., the first transparent conductive layer 3-4
  • Step 4 Prepare 400nm thin grid lines and main grid lines on the surface of the first transparent conductive layer 3-4 and the second transparent conductive layer 1-5 by thermal evaporation, collect current, and form a complete stacked solar cell.
  • the solar cell of this embodiment is shown in FIG2 , and the difference from Embodiment 1 is only in the composite layer 3-1.
  • the preparation process of the composite layer 3-1 in this embodiment is: a 2.0 ⁇ m BZO layer prepared by LPCVD. Then the BZO layer is subjected to chemical mechanical polishing, and only a part of the BZO layer is polished to a smooth plane (smoothness ⁇ 50 nm), and the other unpolished parts are conformal to the small velvet structure of the lower battery.
  • the smooth plane is located directly above the top of the pyramid velvet of the lower battery.
  • the distance between the polished surface of the BZO layer and the pyramid bottom of the BZO layer is 1.9 ⁇ m, and the distance between the polished surface of the BZO layer and the pyramid top of the BZO layer directly below it is 100 nm.
  • the depth of the inverted pyramid structure formed by the unpolished part of the surface of the BZO layer away from the first doped amorphous silicon layer 1-4 is 100 nm.
  • the solar cell of this embodiment is different from that of embodiment 1 only in that the material of the composite layer 3-1 is an ITO layer.
  • the performance of the solar cell is shown in Table 1.
  • the solar cell of this embodiment is different from that of embodiment 2 only in that the depth of the inverted pyramid structure formed by the unpolished portion of the surface of the BZO layer in the composite layer 3-1 away from the first doped amorphous silicon layer 1-4 is 50 nm.
  • the performance of the solar cell is shown in Table 1.
  • the solar cell of this embodiment is different from that of embodiment 2 only in that the depth of the inverted pyramid structure formed by the unpolished portion of the surface of the BZO layer in the composite layer 3-1 away from the first doped amorphous silicon layer 1-4 is 1 ⁇ m.
  • the performance of the solar cell is shown in Table 1.
  • the solar cell of this embodiment is different from that of embodiment 1 only in that the velvet pyramid height of the silicon wafer is 1 ⁇ m.
  • the performance of the solar cell is shown in Table 1.
  • the solar cell of this embodiment is different from that of Embodiment 1 only in that the smoothness of the smooth surface of the composite layer 3 - 1 is 100-200nm, 200-400nm, and >600nm, respectively.
  • the performance of the solar cell is shown in Table 1.
  • the solar cell of this comparative example is different from that of Example 1 only in that the velvet pyramid height of the silicon wafer is 4 ⁇ m.
  • the performance of the solar cell is shown in Table 1.
  • the solar cell of this comparative example is different from that of comparative example 1 only in that the composite layer 3-1 and the power-on
  • the performance of the solar cell is shown in Table 1.
  • Table 1 shows the performance parameters of various embodiments and comparative examples.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Energy (AREA)
  • Manufacturing & Machinery (AREA)
  • Photovoltaic Devices (AREA)

Abstract

本申请公开了一种太阳能电池，包括下电池和上电池，在所述下电池与所述上电池之间设置有复合层，所述复合层完全覆盖所述下电池的一侧表面；所述下电池在靠近所述复合层的一侧表面具有绒面结构，所述绒面结构的高度为≤2μm；所述复合层背离所述下电池的一侧表面，其至少在所述下电池绒面结构顶部正上方的位置为光滑的平面。本申请还提供一种太阳能电池的制备方法。本申请提出的太阳能电池，由于下电池具有小绒面陷光结构，并且中间复合层具有光滑的平面，使得制备上电池的钙钛矿吸收层更为简单，并且还可以很好的控制钙钛矿吸收层中的晶体的生长，从而提高太阳能电池的性能。

Description

一种太阳能电池及其制备方法
本申请要求在2022年9月29日提交中国专利局、申请号为202211200411.6、名称为“一种太阳能电池及其制备方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及太阳能电池技术领域，具体涉及一种太阳能电池及其制备方法。
背景技术
有机-无机杂化钙钛矿太阳能电池作为新型高效率、低成本太阳能电池在全世界范围内被广泛关注。短短几年时间里，单结小面积钙钛矿电池的光电转换效率从2009年的3.8％迅速攀升到25％以上，钙钛矿/硅异质结叠层电池的光电转换效率也达到了29％以上。迅猛的效率发展使其成为当下光伏研究机构及企业的重点关注对象。与传统薄膜太阳电池(铜铟镓硒、碲化镉等)相比，钙钛矿太阳电池具有高转换效率、简单制备工艺以及低成本潜力等优势，并成为最具产业化前景的薄膜太阳电池技术。通过调节前驱体溶液的成分配比，可实现太阳电池光谱响应截止波长的调控，使之成为最理想的顶电池吸收层材料。
硅异质结太阳电池技术具有工艺简单(制绒清洗→非晶硅沉积→TCO沉积→银电极印刷)、制备温度低(＜220℃)、转换效率高(＞25％)、对称结构(可双面)等优势，被认为是PERC电池之后的第三代电池技术。硅异质结电池高的红外波段吸收、强的弱光效应以及可匹配p-i-n的结构优势，使其成为最佳的底电池选择之一。以钙钛矿电池(顶电池)与硅基异质结电池(底电池)形成“钙钛矿/硅基异质结”叠层电池结构，实现太阳光谱的分配吸收，有望获得30％以上的转换效率。但是目前的硅异质结太阳电池很难做到既有陷光结构，又具有较高的电池性能。
发明内容
针对上述问题，本申请提出了一种叠层太阳能电池，由于下电池具有小绒面陷光结构，并且中间复合层具有光滑的平面，使得制备上电池的钙钛矿吸收层更为简单，并且还可以很好的控制钙钛矿吸收层中的晶体的生长，从而提高太阳能电池的性能。
本申请的技术方案如下：
本申请提供一种太阳能电池，包括下电池和上电池，在所述下电池与所述上电池之间设置有复合层，所述复合层完全覆盖所述下电池的一侧表面；
所述下电池在靠近所述复合层的一侧表面具有绒面结构，所述绒面结构的高度为≤2μm；
所述复合层背离所述下电池的一侧表面，其至少在所述下电池绒面结构顶部正上方的部分位置为光滑平面。
进一步地，所述光滑平面的光滑度为≤500nm。
进一步地，所述复合层在靠近所述下电池的一侧表面与所述绒面结构共形。
进一步地，所述复合层的最大厚度≥绒面结构的高度时，所述复合层背离所述下电池的一侧的整个表面均为光滑的平面。
进一步地，所述复合层的最大厚度为<绒面结构的高度时，所述复合层背离所述下电池的一侧表面，其在所述下电池绒面结构顶部正上方的位置为光滑的平面，其他部分均与所述下电池的绒面结构共形。
进一步地，在所述复合层背离所述下电池的一侧表面，与所述下电池的绒面结构共形的表面具有凹陷区域，且最大凹陷处与所述复合层的光滑平面的水平高度差不超过1μm。
进一步地，所述复合层为掺硼氧化锌层。
进一步地，所述下电池为硅基电池，所述上电池为钙钛矿电池。
进一步地，所述绒面结构选自柱状、锥状、台状、弧形槽或弧形凸起中的一种或两种以上。
进一步地，所述绒面结构选自金字塔结构。
本申请还提供一种太阳能电池的制备方法，包括如下步骤：
提供具有绒面结构的下电池；
在所述下电池具有绒面的一侧表面形成复合层；
在所述复合层背离所述下电池的一侧表面制备上电池；
所述绒面结构的高度为≤2μm；所述复合层背离所述下电池的一侧表面，其至少在所述下电池绒面结构顶部正上方的部分位置为光滑的平面。
进一步地，所述复合层是通过如下步骤形成的：
首先在所述下电池具有绒面的一侧表面形成初始复合层；然后采用化学机械抛光形成具有光滑平面的复合层。
进一步地，制备的太阳能电池为前述的太阳能电池。
本申请提供的太阳能电池，由于下电池具有小绒面陷光结构，可以使得所述太阳能电池具有较高的短路电路密度，中间复合层具有光滑的平面，使得制备上电池的钙钛矿吸收层工艺更为简单，并且还可以很好的控制钙钛矿吸收层中的晶体的生长(晶体质量、晶粒取向)，从而提高太阳能电池的性能。
附图说明
附图用于更好地理解本申请，不构成对本申请的不当限定。其中：
图1为本申请提供的一种太阳能电池的结构示意图。
图2为本申请提供的另一种太阳能电池的结构示意图。
附图标记说明
4-1为第一金属电极，3-4为第一透明导电层，3-3为第一载流子传输层，3-2为钙钛矿吸收层，3-1为第二载流子传输层，2-1为复合层，1-4为第一掺杂非晶硅层，1-2为本征非晶硅层，1-1为硅基衬底，1-3为第二掺杂非晶硅层，1-5为第二透明导电层，4-2为第二金属电极。
具体实施例
以下对本申请的示范性实施例做出说明，其中包括本申请实施例的各种细节以助于理解，应当将它们认为仅仅是示范性的。因此，本领域普通技术 人员应当认识到，可以对这里描述的实施例做出各种改变和修改，而不会背离本申请的范围和精神。同样，为了清楚和简明，以下的描述中省略了对公知功能和结构的描述。
现有技术中，硅异质结太阳电池在清洗制绒时，表面会形成绒面结构。正常的绒面尺寸在4μm左右。当在绒面上制备钙钛矿层时，一般会先在绒面上真空蒸镀一层200-500nm的碘化铅材料，碘化铅会在绒面上随形分布。然后在碘化铅层表面涂布AX(A为FAI或MA，X为I、Br或Cl)材料的有机溶液，AX材料在加热条件下与碘化铅反应形成钙钛矿层。这种技术路线的优点是可以在绒面表面制备随形的钙钛矿层，保留了绒面的陷光结构，提升了电池的短路电流密度。但是由于I、Br、Cl三种元素的反应性不同，很难对钙钛矿的带隙进行调控，无法做到最佳的电流匹配，从而制约了叠层电池电性能的提升。钙钛矿/硅异质结叠层太阳电池中第二种技术路线：在制备完绒面后，使用机械方法或化学方法将绒面抛光成平面结构，然后在平面结构上使用溶液一步法直接旋涂制备钙钛矿层。平面结构上溶液一步法制备钙钛矿层的优点是：方便调控钙钛矿的带隙，保证钙钛矿层的均匀性与钙钛矿材料的晶体取向性，从而得到非常高的FF以及最佳的电流匹配。但是失去了绒面的陷光效果，会导致短路电流密度的损失，从而限制了叠层电池的效率进一步提升。绒面结构的存在，一方面因为陷光结构提升了短路电流密度，另一方面增加了绒面上制备钙钛矿层的难度。在保证绒面结构的陷光效果的前提下降低钙钛矿层的成膜难度，成为了提升叠层电池电性能的重要方法。
如图1所示，本申请提供一种太阳能电池，包括下电池和上电池，在所述下电池与所述上电池之间设置有复合层3-1，所述复合层3-1完全覆盖所述下电池的一侧表面；
所述下电池在靠近所述复合层3-1的一侧表面具有绒面结构，所述绒面结构的高度L2为≤2μm，例如可以为10nm、20nm、30nm、40nm、50nm、60nm、70nm、80nm、90nm、100nm、110nm、120nm、130nm、140nm、150nm、160nm、170nm、180nm、190nm、200nm、250nm、300nm、350nm、400nm、450nm、500nm、550nm、600nm、650nm、700nm、750nm、800nm、850nm、 900nm、950nm、1μm、1.1μm、1.2μm、1.3μm、1.4μm、1.5μm、1.6μm、1.7μm、1.8μm、1.9μm或2μm。
所述复合层3-1背离所述下电池的一侧表面，其至少在所述下电池绒面结构顶部正上方的部分位置为光滑的平面，其光滑度为≤500nm，例如可以为500nm、480nm、460nm、450nm等。
所述光滑度为最高点与最低点之间的高度差。测试方法为激光3D显微镜。
本申请的太阳能电池中，由于所述下电池具有小绒面结构，并且所述复合层3-1靠近上电池一侧的表面至少部分为光滑的平面，与所述复合层3-1层叠的上电池的各层均为平面，因此，上电池的各层制备工艺均较为简单，而且上电池中的钙钛矿吸收层3-2中的钙钛矿晶体的质量、晶粒取向以及厚度可以进行管控，从而可以提升太阳能电池的填充因子FF以及短路电流密度，进而提高所述太阳能电池的电性能。
由于钙钛矿晶体的生长受基底(下电池)的表面形貌影响。当下电池为小绒面结构或平面结构时，钙钛矿吸收层各个位置的厚度比较均匀。在均匀厚度的膜层条件下，各个位置的钙钛矿吸收层生长条件基本上是相同的，所以其晶粒大小与晶粒取向可以通过调整同一参数进行控制。当下电池为大绒面结构时，钙钛矿吸收层的厚度受位置的影响。金字塔顶部位置的钙钛矿吸收层厚度约100nm，金字塔底部位置的钙钛矿层厚度约2000nm，难以做到均匀成膜。在厚度差异如此大的情况下，各个位置的钙钛矿层生长条件是不相同的，所以其晶粒大小与晶粒取向非常难以进行控制。
在本申请中，所述下电池为硅基电池，所述上电池为钙钛矿电池。
具体地，所述下电池包括依次层叠设置的第二透明导电层1-5、第二非晶硅层、第二本征非晶硅层、硅基衬底1-1、第一本征非晶硅层、第一非晶硅层，且所述第一非晶硅层背离所述第一非晶硅层的一侧表面与所述复合层3-1层叠在一起。在所述第二透明导电层1-5背离所述第二非晶硅层的一侧表面设置有第二金属电极4-2。
所述第二透明导电层1-5可以为透明导电膜，具体可为掺氟氧化锡(FTO)、氧化铟锡(ITO)或掺铝氧化锌(AZO)等；所述第二透明导电层1-5的厚度为70-120nm，例如可以为70nm、80nm、90nm、100nm、110nm 或120nm。
所述第一非晶硅层以及所述第二非晶硅层均可以为n型非晶硅层或p型非晶硅层，且所述第一非晶硅层与所述第二非晶硅层为不同类型的非晶硅层，当所述第一非晶硅层为n型非晶硅层，所述第二非晶硅层为p型非晶硅层，当所述第一非晶硅层为p型非晶硅层，所述第二非晶硅层为n型非晶硅层。所述第一非晶硅层以及所述第二非晶硅层的厚度分别为5-15nm，例如可以为5nm、6nm、7nm、8nm、9nm、10nm、11nm、12nm、13nm、14nm或15nm。
所述硅基衬底1-1为n型晶体硅或p型晶体硅。
所述第一本征非晶硅层以及第二本征非晶硅层均为非晶硅，其厚度为5-10nm，例如可以为5nm、6nm、7nm、8nm、9nm或10nm。
所述第二金属电极4-2可以由Ag、Au、Cu、Al、Ni等金属材料，C材料、高分子导电材料中的一种或几种制成。
所述复合层3-1为掺硼氧化锌层，且硼是均匀掺杂在氧化锌层中。
在本申请中，所述上电池包括从靠近所述复合层3-1的一侧表面依次层叠有第二载流子传输层3-1、钙钛矿吸收层3-2、第一载流子传输层3-3、第一透明导电层3-4。在所述第一透明导电层3-4背离所述第一载流子传输层3-3的一侧表面设置有第一金属电极4-1。
所述第一载流子传输层3-3可以为空穴传输层也可以为电子传输层，所述第一载流子传输层3-3和第二载流子传输层3-1的导电类型相反。当所述第一载流子传输层3-3为空穴传输层时，其可以为氧化钼层、[双(4-苯基)(2,4,6-三甲基苯基)胺](PTAA)层、碘化铜层或Spiro-OMeTAD(2,2',7,7'-Tetrakis[N,N-di(4-methoxyphenyl)amino]-9,9'-spirobifluorene中文名为2,2',7,7'-四[N,N-二(4-甲氧基苯基)氨基]-9,9'-螺二芴)层、PEDOT层、PEDOT:PSS层、P3HT层、P3OHT层、P3ODDT层、NiOx层或CuSCN层。所述第二载流子传输层3-1为电子传输层，其可以为氧化钛层、氧化锡层、C60层或C60-PCBM层、[60]PCBM([6,6]-phenyl-C61butyric acid methyl ester，中文名称为[6，6]-苯基-C61-丁酸异甲酯)层、[70]PCBM([6,6]-Phenyl-C71-butyric acid methyl ester，中文名称为[6，6]-苯基-C71-丁酸异甲酯)层、bis[60]PCBM(Bis(1-[3-(methoxycarbonyl)propyl]-1-phenyl)-[6,6]C62)层、[60]ICBA (1',1”,4',4”-Tetrahydro-di[1,4]methanonaphthaleno[1,2:2',3',56,60:2”,3”][5,6]fullerene-C60)层等，包括但不仅限于此，只要能实现在本申请中的功能即可。
当所述第一载流子传输层3-3为电子传输层时，其可以为氧化钛层、氧化锡层、C60层或C60-PCBM层、[60]PCBM([6,6]-phenyl-C61butyric acid methyl ester，中文名称为[6，6]-苯基-C61-丁酸异甲酯)层、[70]PCBM([6,6]-Phenyl-C71-butyric acid methyl ester，中文名称为[6，6]-苯基-C71-丁酸异甲酯)层、bis[60]PCBM(Bis(1-[3-(methoxycarbonyl)propyl]-1-phenyl)-[6,6]C62)层、[60]ICBA(1',1”,4',4”-Tetrahydro-di[1,4]methanonaphthaleno[1,2:2',3',56,60:2”,3”][5,6]fullerene-C60)层等。所述第二载流子传输层3-1为空穴传输层，其可以为氧化钼层、[双(4-苯基)(2,4,6-三甲基苯基)胺](PTAA)层、碘化铜层或Spiro-OMeTAD(2,2',7,7'-Tetrakis[N,N-di(4-methoxyphenyl)amino]-9,9'-spirobifluorene中文名为2,2',7,7'-四[N,N-二(4-甲氧基苯基)氨基]-9,9'-螺二芴)层、PEDOT层、PEDOT:PSS层、P3HT层、P3OHT层、P3ODDT层、NiOx层或CuSCN层。包括但不仅限于此，只要能实现在本申请中的功能即可。所述第一载流子传输层3-3以及第二载流子传输层3-1的厚度为10-50nm，例如可以为10nm、11nm、12nm、13nm、14nm、15nm、16nm、17nm、18nm、19nm、20nm、21nm、22nm、23nm、24nm、25nm、26nm、27nm、28nm、29nm、30nm、31nm、32nm、33nm、34nm、35nm、36nm、37nm、38nm、39nm、40nm、41nm、42nm、43nm、44nm、45nm、46nm、47nm、48nm、49nm或50nm。
所述钙钛矿吸收层3-2，其钙钛矿材料由化学通式为ABXmY3-m型晶体结构的一种或多种材料形成，其中A为CH3NH3、C4H9NH3、NH2＝CHNH2或Cs；B为Pb或Sn；X为Cl、Br或I，Y为Cl、Br或I，且X和Y不同时为同一种元素；m＝1、2或3。将钙钛矿材料溶解到前驱体溶液中，一般选择DMF与DMSO的混合溶液作为溶剂。控制前驱体的浓度，通过刮涂、超声喷涂、狭缝涂布等方式中的一种或几种在所述第二载流子传输层3-1上制备液膜，然后再通过反溶剂萃取、风刀、真空抽气等方式中的一种将液膜固化，最后通过退火控制钙钛矿的晶体生长得到钙钛矿吸收层3-2。所述钙 钛矿吸收层3-2的厚度可以为200nm-2000nm，例如可以为200nm、300nm、400nm、500nm、600nm、700nm、800nm、900nm、1000nm、1100nm、1200nm、1300nm、1400nm、1500nm、1600nm、1700nm、1800nm、1900nm或2000nm。
所述第一透明导电层3-4可以为透明导电膜，具体可为掺氟氧化锡(FTO)、氧化铟锡(ITO)或掺铝氧化锌(AZO)等；所述第二透明导电层1-5的厚度为70-120nm，例如可以为70nm、80nm、90nm、100nm、110nm或120nm。
在本申请中，所述复合层3-1在靠近所述下电池绒面结构的一侧表面与所述绒面结构共形。
具体地，如图1所示，所述复合层3-1的最大厚度为L1，所述绒面结构的高度为L2，所述复合层3-1的最大厚度≥绒面结构的高度时，即L1≥L2，所述复合层3-1背离所述下电池的一侧的整个表面均为光滑的平面。
层叠在所述复合层3-1光滑平面一侧的上电池的第二载流子传输层3-1、钙钛矿吸收层3-2、第一载流子传输层3-3、第一透明导电层3-4均为平面。采用这样的平面结构有利于钙钛矿吸收层的生长质量，并可以降低工艺难度。
具体地，如图2所示，所述复合层3-1的最大厚度为L1，所述绒面结构的高度为L2，所述复合层3-1的最大厚度为<绒面结构的高度时，即L1<L2，所述复合层3-1背离所述下电池的一侧表面，其在所述下电池绒面结构顶部正上方的位置为光滑的平面，其他部分均与所述下电池的绒面结构共形。共形指的是形状相同。
在所述复合层3-1背离所述下电池的一侧表面上层叠的第二载流子传输层3-1不仅覆盖所述复合层3-1的部分绒面和光滑的平面，而且所述第二载流子传输层3-1背离所述复合层3-1的一侧表面为平面，同时所述钙钛矿吸收层3-2、第一载流子传输层3-3以及第一透明导电层3-4均为平面。
具体地，在所述复合层3-1背离所述下电池的一侧表面，与所述下电池的绒面结构共形的表面具有凹陷区域，且最大凹陷处与所述光滑平面的水平高度h差不超过1μm，优选为不超过100nm。例如其可以为10nm、20nm、30nm、40nm、50nm、60nm、70nm、80nm、90nm、100nm、110nm、120nm、130nm、140nm、150nm、160nm、170nm、180nm、190nm、200nm、250nm、300nm、350nm、400nm、450nm、500nm、550nm、600nm、650nm、700nm、 750nm、800nm、850nm、900nm、950nm或1μm。
在本申请中，所述绒面结构的基础形状选自柱状、锥状、台状、弧形槽或弧形凸起中的一种或两种以上。
所述绒面结构随机或规整的分布在所述下电池的至少一个表面上；
构成所述绒面结构基础形状选自柱状、锥状、台状、弧形槽或弧形凸起中的一种或两种以上。例如可以为正向或反向的三棱柱状、四棱柱状、六棱柱状、圆柱状、圆锥状、三棱锥状、四棱锥状、圆台状、三棱台状、四棱台状以及半圆弧形凹槽或半圆弧形凸起等结构。优选为金字塔结构。金字塔结构为棱锥状结构。
所述绒面结构的高度L2为绒面结构上最低点到最高点之间的水平高度差。
所述复合层3-1的最大厚度L1为复合层靠近所述下电池的一侧表面的最低点到所述背离所述下电池的一侧表面的最高点之间的水平高度差。
本申请提供一种太阳能电池的制备方法，包括如下步骤：
步骤一：提供具有绒面结构的下电池；
步骤1.1：将硅片依次经历抛光、制绒、清洗，形成具有绒面结构的下电池。
具体地，所述硅片为商业级M6的N型硅片，电阻率在1-10Ω.cm，厚度为150-200μm。所述绒面结构的高度为≤2μm。
步骤1.2：采用PECVD在前述得到的硅片双侧分别沉积本征非晶硅层1-2，即分别为第一本征非晶硅层和第二本征非晶硅层。
步骤1.3：利用PECVD在第一本征非晶硅层背离所述硅片的一侧表面沉积磷掺杂(掺杂浓度1019-20cm-3)的N型非晶硅层构成前场结构(即第一掺杂非晶硅层1-4)。
步骤1.4：采用PECVD在第二本征非晶硅层背离所述硅片的一侧表面沉积硼掺杂的P型非晶硅层构成背发射极结构(即第二掺杂非晶硅层1-3)。
步骤1.5：使用磁控溅射法在所述第二掺杂非晶硅层1-3的一侧表面制备的第二透明导电材料层，实现光生载流子的收集并传输。
步骤二：在所述下电池具有绒面的一侧表面形成复合层3-1；
具体地，首先在所述第一掺杂非晶硅层1-4背离所述第一本征非晶硅层的一侧表面形成初始复合层3-1；然后采用化学机械抛光形成具有光滑平面的复合层3-1。
所述复合层3-1背离所述下电池的一侧表面，其至少在所述下电池绒面结构顶部正上方的位置为光滑的平面，其光滑度为≤500nm，例如可以为500nm、480nm、460nm、450nm等。
步骤三：在所述复合层3-1背离所述下电池的一侧表面制备上电池；
步骤3.1：采用磁控溅射在所述复合层3-1背离所述第一掺杂非晶硅层1-4的一侧表面制备第二载流子传输层3-1。
步骤3.2：将钙钛矿材料溶解到前驱体溶液中，一般选择DMF与DMSO的混合溶液作为溶剂。控制前驱体的浓度，通过刮涂、超声喷涂、狭缝涂布等方式中的一种或几种在所述第二载流子传输层3-1上制备液膜，然后再通过反溶剂萃取、风刀、真空抽气等方式中的一种将液膜固化，最后通过退火控制钙钛矿的晶体生长得到钙钛矿吸收层3-2。
具体地，钙钛矿材料由化学通式为ABXmY3-m型晶体结构的一种或多种材料形成，其中A为CH3NH3、C4H9NH3、NH2＝CHNH2或Cs；B为Pb或Sn；X为Cl、Br或I，Y为Cl、Br或I，且X和Y不同时为同一种元素；m＝1、2或3。
步骤3.3：在所述钙钛矿吸收层3-2背离第二载流子传输层3-1的一侧表面形成第一载流子传输层3-3。
步骤3.4：通过磁控溅射法在所述第一载流子传输层3-3背离所述钙钛矿吸收层3-2的一侧表面制备第一透明导电层3-4，构成正面透明导电膜及减反射薄膜，达到电子横向输运至正面栅线电极以及减少光学反射损失的目的。
步骤四：通过丝网印刷或热蒸发，在所述第一透明导电层3-4以及第二透明导电层1-5的表面制备细栅线与主栅线，收集电流，形成完整的叠层太阳能电池。
必要时，可以在第一透明导电层3-4上增加表面减反射膜层，利用电子束蒸发制备70-120nm的减反射薄膜(如氟化镁MgF2和氮化硅SiNx等)，以提高叠层太阳能电池的光电转换效率。
本申请的方法制备的太阳能电池为前述太阳能电池，上电池、复合层3-1以及下电池具体可参考前述描述。
实施例
下述实施例中所使用的实施方法如无特殊要求，均为常规方法。
下述实施例中所使用的材料、试剂等，如无特殊说明，均可从商业途径得到。
实施例1
本实施例的太阳能电池如图1所示，包括如下步骤：
步骤一，制备下电池
步骤1.1：提供N型晶硅衬底：利用商业级M6的N型硅片，电阻率在5Ω.cm，厚度为170μm。该硅片依次经历抛光、制绒及清洗程序，得到金字塔状的小绒面结构，绒面金字塔高度为2μm。
步骤1.2：采用PECVD在硅片双侧分别沉积5nm的本征非晶硅层，即第一本征非晶硅层和第二本征非晶硅层构成正面和背面钝化层薄膜。
步骤1.3：利用PECVD在第一本征非晶硅层背离所述硅片的一侧表面沉积磷掺杂(掺杂浓度1019-20cm-3)的5nm的N型非晶硅层构成前场结构(即第一掺杂非晶硅层1-4)。
步骤1.4：采用PECVD在第二本征非晶硅层背离所述硅片的一侧表面沉积硼掺杂(掺杂浓度1019-20cm-3)的5nm的P型非晶硅层构成背发射极结构(即第二掺杂非晶硅层1-3)。
步骤1.5：使用磁控溅射法在所述第二掺杂非晶硅层1-3的一侧表面制备120nm的ITO层(即第二透明导电材料层)，实现光生载流子的收集并传输。
步骤二：在所述下电池具有绒面的一侧表面形成复合层3-1；
具体地，使用LPCVD在第一掺杂非晶硅层1-4背离所述第一本征非晶硅层的一侧表面制备的2.5μm的BZO层。然后将BZO层进行化学机械抛光，得到具有整个光滑平面的BZO层，其光滑度为≤50nm，所述BZO层的抛光后的最大厚度为2.4μm。
步骤三：在所述复合层3-1背离所述下电池的一侧表面制备上电池；
步骤3.1：采用磁控溅射在所述复合层3-1背离所述第一掺杂非晶硅层1-4的一侧表面制备20nm的NiOx层，作为空穴传输层。
步骤3.2：选定(Cs0.15FA0.85)Pb(I0.7Br0.3)3组分体系，按照摩尔比例称取合适的材料，溶解到DMF与DMSO的混合溶液中，浓度1.5M。然后使用旋涂工艺，设定转速3000rpm，并将苯甲醚作为反溶剂进行萃取。然后在100℃热台上退火30min，得到钙钛矿吸收层3-2。钙钛矿吸收层3-2厚度为500nm，其带隙一般在1.65eV左右。
步骤3.3：先采用蒸镀法在所述钙钛矿吸收层3-2背离第二载流子传输层3-1的一侧表面制备一层25nm的C60，然后进一步利用ALD在105℃条件下，进行160次循环，制备出16nm的TiO2，实现载流子的纵向输运。
步骤3.4：通过磁控溅射法在所述第一载流子传输层3-3背离所述钙钛矿吸收层3-2的一侧表面制备100nm的IZO(即第一透明导电层3-4)，构成正面透明导电膜及减反射薄膜，达到电子横向输运至正面栅线电极以及减少光学反射损失的目的。
步骤四：通过热蒸发，在所述第一透明导电层3-4以及第二透明导电层1-5的表面制备蒸镀400nm的细栅线与主栅线，收集电流，形成完整的叠层太阳能电池。
所述太阳能电池的性能如表1所示。
实施例2
本实施例的太阳能电池如图2所示，与实施例1的区别仅在于复合层3-1，本实施方式中复合层3-1的制备过程为：使用LPCVD制备的2.0μm的BZO层。然后将BZO层进行化学机械抛光，所述BZO层只有部分区域被抛光为光滑的平面(光滑度≤50nm)，其他未被抛光的部分与下电池的小绒面结构共形，所述光滑的平面位于下电池的金字塔绒面顶部正上方，此时BZO层的抛光面距离BZO层的金字塔底的距离为1.9μm，BZO层的抛光面距离其正下方的BZO层的金字塔尖的距离为100nm，BZO层背离所述第一掺杂非晶硅层1-4一侧表面未抛光的部分形成的倒金字塔结构的深度为100nm。
所述太阳能电池的性能如表1所示。
实施例3
本实施例的太阳能电池与实施例1的区别仅在于，复合层3-1的材料为ITO层。所述太阳能电池的性能如表1所示。
实施例4
本实施例的太阳能电池与实施例2的区别仅在于，复合层3-1中BZO层背离所述第一掺杂非晶硅层1-4一侧表面未抛光的部分形成的倒金字塔结构的深度为50nm。所述太阳能电池的性能如表1所示。
实施例5
本实施例的太阳能电池与实施例2的区别仅在于，复合层3-1中BZO层背离所述第一掺杂非晶硅层1-4一侧表面未抛光的部分形成的倒金字塔结构的深度为1μm。所述太阳能电池的性能如表1所示。
实施例6
本实施例的太阳能电池与实施例1的区别仅在于，所述硅片的绒面金字塔高度为1μm。所述太阳能电池的性能如表1所示。
实施例7-实施例9
本实施例的太阳能电池与实施例1的区别仅在于，复合层3-1光滑表面的光滑度分别为100-200nm、200-400nm、＞600nm，所述太阳能电池的性能如表1所示。
对比例1
本对比例的太阳能电池与实施例1的区别仅在于，所述硅片的绒面金字塔高度为4μm。所述太阳能电池的性能如表1所示。
对比例2
本对比例的太阳能电池与对比例1的区别仅在于，复合层3-1以及上电 池均与下电池的绒面共形。所述太阳能电池的性能如表1所示。
表1为各实施例以及对比例的的性能参数
小结：由上表可知：使用BZO作为此种结构的复合层时，其表面平整度越高，钙钛矿吸收层的膜层质量越好，越容易得到高的填充因子。由于ITO在长波段有很强的寄生吸收，导致非常多的电流损失。当下电池具有4μm的金字塔结构时，使用此种结构的复合层时，由于复合层厚度的差异过大，内部复合严重，所以导致很强的电流损失与电压损失，当使用与绒面结构共形的复合层时，由于钙钛矿吸收层厚度的差异过大，所以导致成膜困难，内部有很强的复合，无法提升器件的填充因子。
尽管以上结合附图对本申请的实施方案进行了描述，但本申请并不局限于上述的具体实施方案和应用领域，上述的具体实施方案仅仅是示意性的、指导性的，而不是限制性的。本领域的普通技术人员在本说明书的启示下和在不脱离本申请权利要求所保护的范围的情况下，还可以做出很多种的形式， 这些均属于本申请保护之列。

Claims (13)

  1. 一种太阳能电池，其中，包括下电池和上电池，在所述下电池与所述上电池之间设置有复合层，所述复合层完全覆盖所述下电池的一侧表面；
    所述下电池在靠近所述复合层的一侧表面具有绒面结构，所述绒面结构的高度为≤2μm；
    所述复合层背离所述下电池的一侧表面，其至少在所述下电池绒面结构顶部正上方的部分位置为光滑平面。
  2. 根据权利要求1所述的太阳能电池，其中，所述光滑平面的光滑度为≤500nm。
  3. 根据权利要求1所述的太阳能电池，其中，所述复合层在靠近所述下电池的一侧表面与所述绒面结构共形。
  4. 根据权利要求1-3任一项所述的太阳能电池，其中，所述复合层的最大厚度≥绒面结构的高度时，所述复合层背离所述下电池的一侧的整个表面均为光滑的平面。
  5. 根据权利要求1-3任一项所述的太阳能电池，其中，所述复合层的最大厚度为<绒面结构的高度时，所述复合层背离所述下电池的一侧表面，其在所述下电池绒面结构顶部正上方的位置为光滑的平面，其他部分均与所述下电池的绒面结构共形。
  6. 根据权利要求5所述的太阳能电池，其中，在所述复合层背离所述下电池的一侧表面，与所述下电池的绒面结构共形的表面具有凹陷区域，且最大凹陷处与所述复合层的光滑平面的水平高度差不超过1μm。
  7. 根据权利要求1-3任一项所述的太阳能电池，其中，所述复合层为掺硼氧化锌层。
  8. 根据权利要求1-3任一项所述的太阳能电池，其中，所述下电池为硅基电池，所述上电池为钙钛矿电池。
  9. 根据权利要求1-3任一项所述的太阳能电池，其中，所述绒面结构选自柱状、锥状、台状、弧形槽或弧形凸起中的一种或两种以上。
  10. 根据权利要求9任一项所述的太阳能电池，其中，所述绒面结构选自金字塔结构。
  11. 一种太阳能电池的制备方法，其中，包括如下步骤：
    提供具有绒面结构的下电池；
    在所述下电池具有绒面的一侧表面形成复合层；
    在所述复合层背离所述下电池的一侧表面制备上电池；
    所述绒面结构的高度为≤2μm；所述复合层背离所述下电池的一侧表面，其至少在所述下电池绒面结构顶部正上方的部分位置为光滑的平面。
  12. 根据权利要求11所述的制备方法，其中，所述复合层是通过如下步骤形成的：
    首先在所述下电池具有绒面的一侧表面形成初始复合层；然后采用化学机械抛光形成具有光滑平面的复合层。
  13. 根据权利要求11或12所述的制备方法，其中，制备的太阳能电池为权利要求1-10任一项所述的太阳能电池。
PCT/CN2023/095589 2022-09-29 2023-05-22 一种太阳能电池及其制备方法 WO2024066405A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202211200411.6 2022-09-29
CN202211200411.6A CN115411065B (zh) 2022-09-29 2022-09-29 一种太阳能电池及其制备方法

Publications (1)

Publication Number Publication Date
WO2024066405A1 true WO2024066405A1 (zh) 2024-04-04

Family

ID=84167983

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2023/095589 WO2024066405A1 (zh) 2022-09-29 2023-05-22 一种太阳能电池及其制备方法

Country Status (2)

Country Link
CN (1) CN115411065B (zh)
WO (1) WO2024066405A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115411065B (zh) * 2022-09-29 2024-02-13 隆基绿能科技股份有限公司 一种太阳能电池及其制备方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109196678A (zh) * 2016-05-09 2019-01-11 株式会社钟化 层叠型光电转换装置和其制造方法
CN109473502A (zh) * 2018-12-19 2019-03-15 赵怡程 一种太阳能电池叠层结构及其制备方法
US20210098201A1 (en) * 2019-10-01 2021-04-01 Seoul National University R&Db Foundation Perovskite silicon tandem solar cell and method for manufacturing the same
WO2022180170A1 (de) * 2021-02-24 2022-09-01 Karlsruher Institut für Technologie Perowskit-basierte mehrfachsolarzelle und verfahren zu ihrer herstellung
CN115312623A (zh) * 2022-08-03 2022-11-08 亚洲硅业(青海)股份有限公司 一种钙钛矿晶硅叠层太阳能电池的制备方法
CN115411065A (zh) * 2022-09-29 2022-11-29 隆基绿能科技股份有限公司 一种太阳能电池及其制备方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102574926B1 (ko) * 2019-10-01 2023-09-06 서울대학교산학협력단 페로브스카이트 실리콘 탠덤 태양전지 및 이의 제조 방법

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109196678A (zh) * 2016-05-09 2019-01-11 株式会社钟化 层叠型光电转换装置和其制造方法
CN109473502A (zh) * 2018-12-19 2019-03-15 赵怡程 一种太阳能电池叠层结构及其制备方法
US20210098201A1 (en) * 2019-10-01 2021-04-01 Seoul National University R&Db Foundation Perovskite silicon tandem solar cell and method for manufacturing the same
WO2022180170A1 (de) * 2021-02-24 2022-09-01 Karlsruher Institut für Technologie Perowskit-basierte mehrfachsolarzelle und verfahren zu ihrer herstellung
CN115312623A (zh) * 2022-08-03 2022-11-08 亚洲硅业(青海)股份有限公司 一种钙钛矿晶硅叠层太阳能电池的制备方法
CN115411065A (zh) * 2022-09-29 2022-11-29 隆基绿能科技股份有限公司 一种太阳能电池及其制备方法

Also Published As

Publication number Publication date
CN115411065B (zh) 2024-02-13
CN115411065A (zh) 2022-11-29

Similar Documents

Publication Publication Date Title
JP6670377B2 (ja) 積層型光電変換装置およびその製造方法
Akhil et al. Review on perovskite silicon tandem solar cells: Status and prospects 2T, 3T and 4T for real world conditions
CN109923687B (zh) 包含金属氧化物缓冲层的太阳能电池和制造方法
CN108140735B (zh) 多接合型光电转换装置和光电转换模块
WO2023151604A1 (zh) 一种叠层太阳能电池及其应用
US12058876B2 (en) Laminated battery and method for fabrication thereof
CN110970562A (zh) 一种钙钛矿/晶硅叠层太阳能电池及其制备方法
CN114447126B (zh) 一种太阳能电池及其制备方法
WO2024140473A1 (zh) 一种太阳能电池及其制备方法
JP2010130023A (ja) 太陽電池およびその製造方法
WO2024066405A1 (zh) 一种太阳能电池及其制备方法
US20240242896A1 (en) Solar cell antireflection and porous silicon layers
CN209087911U (zh) 一种钙钛矿/晶硅叠层太阳能电池
US11522096B2 (en) Perovskite-silicon tandem structure and photon upconverters
CN114447127A (zh) 一种太阳能电池及其制备方法
CN115172602A (zh) 一种掺杂金属氧化物复合层结构
WO2024082991A1 (zh) 一种二维三维体相混合钙钛矿太阳能电池及其制备方法
EP4325586A1 (en) A solar battery
CN210668381U (zh) 一种硅基叠层太阳电池
WO2023143207A1 (zh) 一种太阳能电池及其制备方法
Malerba et al. Monolithic CZTS/Si tandem cells: development of multilayer structures for the intermediate contact
JP7244031B2 (ja) 光電変換素子および光電変換素子の製造方法
CN117580416A (zh) 一种太阳能电池及其制备方法
CN115498117A (zh) 一种钙钛矿太阳能电池的制备方法
Jalmood Perovskite/Silicon tandem solar cells: the trilogy of properties, performance, and stability

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 23869658

Country of ref document: EP

Kind code of ref document: A1