WO2024063045A1 - Procédé de fabrication de substrat de luminophore, et procédé de fabrication de substrat électroluminescent - Google Patents

Procédé de fabrication de substrat de luminophore, et procédé de fabrication de substrat électroluminescent Download PDF

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Publication number
WO2024063045A1
WO2024063045A1 PCT/JP2023/033875 JP2023033875W WO2024063045A1 WO 2024063045 A1 WO2024063045 A1 WO 2024063045A1 JP 2023033875 W JP2023033875 W JP 2023033875W WO 2024063045 A1 WO2024063045 A1 WO 2024063045A1
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phosphor
layer
light emitting
substrate
support layer
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PCT/JP2023/033875
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English (en)
Japanese (ja)
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正宏 小西
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デンカ株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H01L33/60—Reflective elements

Definitions

  • the present invention relates to a method for manufacturing a phosphor substrate and a method for manufacturing a light emitting substrate.
  • Patent Document 1 discloses an LED lighting fixture that includes a substrate on which a light emitting element (LED element) is mounted. This LED lighting equipment improves luminous efficiency by providing a reflective material on the surface of the substrate.
  • LED element light emitting element
  • the present invention can reduce the glare of the light emitted by the light emitting element when the light emitting element is mounted, and can also efficiently realize the function of adjusting the emitted light color to be different from the light emitted by the light emitting element.
  • the aim is to develop phosphor substrate technology that can be used.
  • a method for manufacturing a phosphor substrate on which at least one light emitting element is mounted comprising: a circuit pattern layer forming step of forming a circuit pattern layer to be bonded to the at least one light emitting element on one surface of the insulating substrate; a phosphor layer forming step of forming a phosphor layer on one surface side of the insulating substrate, the phosphor layer containing a phosphor whose emission peak wavelength is in the visible light region when the emission of the at least one light emitting element is used as excitation light; a support layer forming step of forming a support layer that does not contain the phosphor and supports the phosphor layer between the insulating substrate and the phosphor layer; including; In the supporting layer forming step, the supporting layer is laminated on the circuit pattern layer in a region where the circuit pattern layer is provided.
  • the phosphor layer forming step when the light emitting element is an LED, the phosphor layer is formed so that the position closest to the insulating substrate in the PN junction region of the LED is within the thickness direction of the phosphor layer.
  • the phosphor is composed of a plurality of phosphor particles
  • the white pigment contained in the support layer is composed of a plurality of white particles, D1 50 , which is a volume-based median diameter (D 50 ) of the plurality of phosphor particles measured by a laser diffraction scattering method, and a volume-based median diameter (D 50 ) of the plurality of white particles measured by a laser diffraction scattering method.
  • (Formula 2) 0.8 ⁇ D2 50 /D1 50 ⁇ 1.2 [9]
  • the support layer is formed on one surface of the insulating substrate while moving a discharge part that discharges the liquid not containing the phosphor relative to the insulating substrate
  • any one of [1] to [8] wherein the phosphor layer is laminated on the support layer while moving a discharge part that discharges the liquid containing the phosphor relative to the support layer.
  • the support layer is formed by printing on one surface of the insulating substrate, The method for manufacturing a phosphor substrate according to any one of [1] to [8], wherein in the phosphor layer forming step, the phosphor layer is printed and laminated on the circuit pattern layer.
  • a method for manufacturing a light emitting substrate including: [12] The method for manufacturing a light emitting substrate according to [11], wherein the bonding step is performed after the phosphor layer forming step.
  • the present invention it is possible to reduce the glare of the light emitted by the light emitting element when the light emitting element is mounted, and to efficiently realize the function of adjusting the emitted light color to be different from the light emitted by the light emitting element.
  • FIG. 2 is a plan view of the light emitting substrate of the first embodiment. It is a bottom view of the light emitting board of 1st Embodiment.
  • FIG. 1C is a partial cross-sectional view of the light emitting substrate taken along the line 1C-1C in FIG. 1A.
  • 1A is a plan view showing the vicinity of a mounting area of one light emitting element by enlarging area A1 of FIG. 1A.
  • FIG. FIG. 2 is a plan view of a phosphor substrate (a phosphor layer and a support layer are omitted) of the first embodiment.
  • FIG. 2 is a plan view of the phosphor substrate of the first embodiment.
  • FIG. 3 is an explanatory diagram of a first step in the method for manufacturing a light emitting substrate according to the first embodiment.
  • FIG. 3 is an explanatory diagram of a second step in the method for manufacturing a light emitting substrate according to the first embodiment.
  • FIG. 7 is an explanatory diagram of a third step in the method for manufacturing a light emitting substrate according to the first embodiment. It is an explanatory view of the 4th process in the manufacturing method of the light emitting board of a 1st embodiment. It is an explanatory view of the 5th process in the manufacturing method of the light emitting board of a 1st embodiment.
  • FIG. 3 is a diagram for explaining the light emitting operation of the light emitting substrate of the first embodiment.
  • 11A and 11B are diagrams for explaining a light emitting operation of a light emitting substrate of a comparative example.
  • FIG. 7 is a partial cross-sectional view of a light emitting substrate according to a second embodiment.
  • FIG. 1A is a plan view of the light emitting substrate 10, and FIG. 1B is a bottom view of the light emitting substrate 10.
  • FIG. 1C is a partial cross-sectional view of the light emitting substrate 10 taken along the line 1C-1C in FIG. 1A.
  • FIG. 1D is an enlarged view of region C2 in FIG. 1A, focusing on one light emitting element 20.
  • the plan view is, for example, a view seen from the front surface 32 side of the insulating layer 31, which will be described later, and the bottom view is a view seen from the back surface 33 side of the insulating layer 31.
  • the "front surface 32 side" will be described as the "+Z direction side” and the "back surface 33 side” will be described as the "-Z direction side.”
  • the light emitting substrate 10 is, for example, rectangular when viewed from the "+Z direction side" and the "-Z direction side.” Further, the light emitting board 10 of this embodiment includes a plurality of light emitting elements 20, a phosphor substrate 30, and electronic components (not shown) such as a connector and a driver IC. The light emitting board 10 has a function of emitting light when supplied with power from an external power source (not shown) via a connector. Therefore, the light emitting substrate 10 is used as a main optical component in, for example, a lighting device (not shown).
  • the basic configurations of the phosphor substrate 30 and the light emitting substrate 10 of this embodiment are as follows.
  • the phosphor substrate 30 is mounted with at least one light emitting element 20.
  • the phosphor substrate 30 includes an insulating layer 31 (an example of an insulating substrate), a circuit pattern layer 34, a support layer 35, and a phosphor layer 36.
  • the circuit pattern layer 34 is arranged on the surface 32 (an example of one surface) of the insulating layer 31 and is bonded to at least one light emitting element 20.
  • the phosphor layer 36 is disposed on the surface 32 side of the insulating layer 31 and includes a phosphor whose emission peak wavelength is in the visible light region when the emission of at least one light emitting element 20 is used as excitation light.
  • the support layer 35 is disposed on the surface 32 of the insulating layer 31, but in the region where the circuit pattern layer 34 is provided on the insulating layer 31, the support layer 35 is disposed on the surface of the circuit pattern layer 34 and the phosphor layer 36 support.
  • the support layer 35 is provided as a layer that does not contain phosphor.
  • the light emitting substrate 10 includes a phosphor substrate 30 having the basic configuration described above, and at least one light emitting element 20 .
  • Each of the plurality of light emitting elements 20 is, for example, a CSP (Chip Scale Package) in which a flip chip LED 22 (hereinafter referred to as "LED 22") is incorporated (see FIGS. 1C and 1D).
  • the LED 22 has a square shape when viewed from above (that is, viewed from the +Z direction side), and the length L1 of one side is, for example, 1200 ⁇ m or 1700 ⁇ m.
  • the plurality of light emitting elements 20 are mounted in a regularly arranged manner over the entire surface side of the phosphor substrate 30.
  • the correlated color temperature of the light emitted by each light emitting element 20 is, for example, 3,018K. Note that by using a heat sink (not shown) and a cooling fan (not shown), heat is radiated (cooled) so that the temperature of the phosphor substrate 30 is within 50 to 100 degrees Celsius from room temperature, for example, during the light emission operation of the plurality of light emitting elements 20. ).
  • FIG. 2A is a plan view of the phosphor substrate 30, with the support layer 35 and the phosphor layer 36 omitted.
  • FIG. 2B is a plan view of the phosphor substrate 30. Note that the bottom view of the phosphor substrate 30 of this embodiment is the same as the view of the light emitting substrate 10 viewed from the back side (-Z direction side). Further, a partial cross-sectional view of the phosphor substrate 30 is the same as the partial cross-sectional view of FIG. 1C with the light emitting element 20 removed. That is, the phosphor substrate 30 has a rectangular shape, for example, when viewed from the +Z direction side and the -Z direction side.
  • FIG. 2A shows the range of a plurality of electrode pairs 34A, which will be described later, and a wiring portion 34B, which is a portion other than the plurality of electrode pairs 34A, in reality, both are on the same plane (outer surface). ), there is no boundary between the support layer 35 and the phosphor layer 36 in the diagram shown in FIG. 2A in which the support layer 35 and the phosphor layer 36 are removed.
  • the symbols of the plurality of electrode pairs 34A and the wiring portion 34B are added for convenience in order to clarify the positional relationship between the two.
  • the phosphor substrate 30 includes an insulating layer 31, a circuit pattern layer 34, a support layer 35, a phosphor layer 36, and a back pattern layer 38 (see FIGS. 1B to 1D, 2A, and 2B). ). In FIG. 2A, the support layer 35 and the phosphor layer 36 are omitted.
  • the phosphor layer 36 is arranged, for example, on the +Z direction side surface (ie, the outer surface 35x) of the support layer 35.
  • the phosphor layer 36 is not provided in the region where the light emitting element 20 is provided.
  • the phosphor layer 36 is not provided in a region of a certain width (predetermined distance L2) from the region where the light emitting element 20 is provided, and the support layer exposed portion 70 is formed in which the support layer 35 is exposed.
  • the width of the support layer exposed portion 70 is preferably set to, for example, 50 ⁇ m to 200 ⁇ m. If the predetermined distance L2 is less than 50 ⁇ m, when the phosphor layer 36 is formed, it will flow toward the light emitting element 20 due to manufacturing errors or the viscosity of the phosphor paint, and the optical element mounting area 75, which is the mounting surface of the light emitting element 20, may flow. (See FIGS. 3C and 3D), which may prevent proper mounting. If the predetermined distance L2 is 200 ⁇ m or more, the light output from the light emitting element 20 may not sufficiently reach the phosphor layer 36, and the efficiency of the function as the phosphor substrate 30 (i.e., color temperature shift function) may decrease.
  • the predetermined distance L2 is 200 ⁇ m or more, the light output from the light emitting element 20 may not sufficiently reach the phosphor layer 36, and the efficiency of the function as the phosphor substrate 30 (i.e., color temperature shift function) may decrease.
  • through holes 39 are formed in six locations in the phosphor substrate 30, including four locations near the four corners and two locations near the center.
  • the six through holes 39 are used as positioning holes when manufacturing the phosphor substrate 30 and the light emitting substrate 10.
  • the six through holes 39 are used as screw holes for mounting to ensure a heat dissipation effect (to prevent board warping and floating) to the (light emitting) lamp casing.
  • the phosphor substrate 30 of this embodiment is made by etching or other processing a double-sided board (hereinafter referred to as motherboard MB, see FIG. 3A) in which copper foil layers are provided on both sides of an insulating board.
  • motherboard MB a double-sided board
  • CS-3305A manufactured by Risho Kogyo Co., Ltd. is used.
  • the shape is, for example, a rectangle when viewed from the front surface 32 side (+Z direction side) and the back surface 33 side ( ⁇ Z direction side).
  • the material is an insulating material including bismaleimide resin and glass cloth, for example.
  • the thickness T1 is, for example, 100 ⁇ m.
  • the coefficient of thermal expansion (CTE) in the longitudinal direction and in the transverse direction is, for example, 10 ppm/°C or less in the range of 50°C to 100°C, respectively. From another perspective, the longitudinal and transverse coefficients of thermal expansion (CTE) are each 6 ppm/K, for example.
  • the glass transition temperature is, for example, higher than 300°C.
  • the storage modulus is greater than 1.0 ⁇ 10 10 Pa and smaller than 1.0 ⁇ 10 11 Pa in the range of 100° C. to 300° C.
  • the bending modulus in the longitudinal direction and in the transverse direction is, by way of example, 35 GPa and 34 GPa, respectively, under normal conditions.
  • the hot bending modulus in the longitudinal and transverse directions is, for example, 19 GPa at 250°C.
  • the water absorption rate is 0.13% when left for 24 hours in a temperature environment of 23°C.
  • the dielectric constant is, for example, 4.6 at 1 MHz normal state.
  • the dielectric loss tangent is, for example, 0.010 at a normal frequency of 1 MHz.
  • the circuit pattern layer 34 is a metal layer provided on the surface 32 side (+Z direction side) of the insulating layer 31, and is, for example, a copper foil layer (layer made of Cu), and is bonded to a connector (not shown). It is electrically connected to the terminal 37.
  • the circuit pattern layer 34 supplies power supplied from an external power source (not shown) via the connector to the plurality of light emitting elements 20 while forming the light emitting board 10. Therefore, a portion of the circuit pattern layer 34 serves as a plurality of electrode pairs 34A to which the plurality of light emitting elements 20 are respectively bonded. That is, the circuit pattern layer 34 is arranged on the surface 32 of the insulating layer 31, and is connected to each light emitting element 20 at a bonding surface 34A1, which is the outer surface of each electrode pair 34A.
  • the plurality of electrode pairs 34A are also arranged regularly over the entire surface 32.
  • the portion of the circuit pattern layer 34 other than the plurality of electrode pairs 34A is referred to as a wiring portion 34B.
  • the outer surface of the wiring portion 34B (that is, the portion of the outer surface of the circuit pattern layer 34 other than the bonding surface 34A1) is referred to as a non-bonding surface 34B1.
  • the non-bonding surface 34B1 is a portion of the circuit pattern layer 34 other than the portion bonded to all the light emitting elements 20.
  • the area on the surface 32 of the insulating layer 31 where the circuit pattern layer 34 is arranged is, for example, 60% or more of the area (area) of the surface 32 of the insulating layer 31 (see FIG. 2A).
  • the thickness T3 of the circuit pattern layer 34 is, for example, 175 ⁇ m. However, in each figure, the relationship between the thickness T3 of the circuit pattern layer 34, the thickness T1 of the insulating layer 31, the thickness T5 of the phosphor layer 36, etc. is not dimensionally correct.
  • the support layer 35 is provided on the surface 32 of the insulating layer 31 or on the circuit pattern layer 34 in the area where the circuit pattern layer 34 is provided, and supports the phosphor layer 36. However, the phosphor layer 36 is not provided in the area where the solder paste SP is provided.
  • a recess support layer 35b is provided so as to fill the recess 34x. There is.
  • the thickness T4 of the support layer 35 in the area provided on the circuit pattern layer 34 is set to be thinner than the thickness T3 of the circuit pattern layer 34, more specifically, to be 20 ⁇ m, as an example.
  • the support layer 35 in the area where the circuit pattern layer 34 is not provided is set to be the same as the outermost surface of the support layer 35 in the area provided on the circuit pattern layer 34 at the outermost surface position where it is provided (i.e., thickness T3 + T4). In other words, the support layer 35 is provided so that it is approximately flush with the entire phosphor substrate 30.
  • the thickness T3 of the support layer 35 may be thinner, thicker, or the same as the thickness T3 of the circuit pattern layer 34 as described above, and can be set appropriately according to the required specifications.
  • the support layer 35 does not contain a phosphor (an aggregate of a plurality of phosphor particles), but contains a white pigment (an aggregate of a plurality of white particles) and a binder, and contains a plurality of white pigments. It is an insulating layer in which particles are dispersed in the binder.
  • the support layer 35 has a single layer structure, for example.
  • the plurality of white particles are titanium oxide as an example, but may be calcium oxide or other white particles.
  • the binder may be, for example, an epoxy-based, acrylate-based, silicone-based binder, etc., as long as it has the same insulation properties as the binder contained in the solder resist.
  • the phosphor layer 36 is provided on the surface (outer surface 35x) of the support layer 35 opposite to the surface that contacts the insulating layer 31. There is.
  • the area on the surface 32 of the insulating layer 31 where the phosphor layer 36 is arranged is, for example, 80% or more of the area on the surface 32 of the insulating layer 31.
  • the lower surface ( ⁇ Z direction side) of the phosphor layer 36 in the thickness direction that is, the boundary with the outer surface 35x of the support layer 35 is set lower than the position of the junction 25 of the LED 22 (FIG. 1C and Figure 3E).
  • the mounting level of the light emitting element 20, which is a CSP, and the lower surface level of the phosphor layer 36 are the same.
  • the junction 25 of the LED 22 refers to the PN junction region of the LED 22, and light is emitted at this junction 25.
  • the phosphor layer 36 is an insulating layer that contains a phosphor (an aggregate of multiple phosphor particles) and a binder, as described below, and in which multiple phosphor particles are dispersed in the binder.
  • the phosphor contained in the phosphor layer 36 has the property of exciting the light emitted by each light-emitting element 20 as excitation light.
  • the phosphor of this embodiment has the property that the emission peak wavelength is in the visible light region when the light emitted by the light-emitting element 20 is used as excitation light.
  • the binder may be, for example, an epoxy-based, acrylate-based, silicone-based, or other binder, as long as it has the same insulating properties as the binder contained in the solder resist.
  • the volume-based median diameter (D 50 ) of the plurality of phosphor particles included in the phosphor layer 36 measured by a laser diffraction scattering method is expressed as D1 50 .
  • the volume-based median diameter (D 50 ) of the plurality of white particles included in the above-mentioned support layer 35 measured by a laser diffraction scattering method is expressed as D2 50 .
  • D1 50 and D2 50 have the following relationship (Formula 1).
  • the median diameter (D 50 ) of the plurality of white particles constituting the white pigment is 80% or more and 120% or less of the median diameter (D 50 ) of the plurality of phosphor particles constituting the phosphor. It is set to be within the range of
  • the phosphors included in the phosphor layer 36 of this embodiment include, for example, an ⁇ -sialon phosphor containing Eu, a ⁇ -sialon phosphor containing Eu, a CASN phosphor containing Eu, and an Eu-containing sialon phosphor. at least one type of phosphor selected from the group consisting of SCASN phosphors containing Note that the above-mentioned phosphor is an example in this embodiment, and phosphors other than the above-mentioned phosphor may be used, such as YAG, LuAG, BOS, and other visible light-excited phosphors.
  • the ⁇ -type sialon phosphor containing Eu is represented by the general formula: M x Eu y Si 12-(m+n) Al (m+n) O n N 16-n .
  • nitride phosphors examples include CASN phosphors containing Eu, SCASN phosphors containing Eu, etc.
  • the CASN phosphor containing Eu is, for example, a red phosphor represented by the formula CaAlSiN 3 :Eu 2+ , which uses Eu 2+ as an activator and has a crystal made of alkaline earth silicon nitride as a host. Note that the definition of CASN phosphor containing Eu in this specification excludes SCASN phosphor containing Eu.
  • the SCASN phosphor containing Eu is, for example, a red phosphor represented by the formula (Sr,Ca)AlSiN 3 :Eu 2+ , which uses Eu 2+ as an activator and has a crystal made of alkaline earth silicon nitride as a matrix. means.
  • the back pattern layer 38 is a metal layer provided on the back surface 33 side of the insulating layer 31, and is, for example, a copper foil layer (layer made of Cu).
  • the thickness T2 of the back pattern layer 38 is, for example, 175 ⁇ m.
  • a plurality of rectangular blocks arranged in a straight line along the longitudinal direction of the insulating layer 31 are arranged adjacently so as to be out of phase in the transverse direction. It is a layered layer.
  • the back pattern layer 38 is, for example, an independent floating layer. Note that, as an example, the back pattern layer 38 overlaps with 80% or more of the circuit pattern layer 34 disposed on the front surface 32 in the thickness direction of the insulating layer 31.
  • the method for manufacturing the light emitting substrate 10 of this embodiment includes a first step, a second step, a third step, a fourth step, and a fifth step, and each step is performed in the order described.
  • the method for manufacturing the phosphor substrate 30 of the present embodiment includes at least one light emitting element 20 on a surface 32 (an example of one surface) of an insulating layer 31 (an example of an insulating substrate).
  • the first step circuit pattern layer forming step) of forming the circuit pattern layer 34 to be bonded to
  • a third step phosphor layer forming step) of forming a phosphor layer 36 containing a phosphor whose color is in the visible light region, and a layer not containing the phosphor between the insulating layer 31 and the phosphor layer 36.
  • the method for manufacturing the light-emitting substrate 10 of the present embodiment is the same as the method for manufacturing the phosphor substrate 30 of the present embodiment described above, and the method of manufacturing the light-emitting substrate 30 in which at least one light-emitting element 20 is added to the circuit pattern layer 34.
  • FIG. 3A is a diagram showing the start and end of the first step.
  • the first step (an example of a circuit pattern layer forming step) is a step of forming a circuit pattern layer 34 on the front surface 32 and a back surface pattern layer 38 on the back surface 33 of the insulating layer 31 of the motherboard MB. This step is performed, for example, by etching using a mask pattern (not shown).
  • FIG. 3B is a diagram showing the start and end of the second step.
  • a layer containing no phosphor is formed between the insulating layer 31 and the phosphor layer 36 formed in the third step.
  • This is a step of forming a support layer 35 that supports the body layer 36.
  • a white color is applied to the surface of the circuit pattern layer 34 in the area where the circuit pattern layer 34 is arranged, and on the surface of the insulating layer 31 in the area where the circuit pattern layer 34 is not arranged.
  • the support layer 35 is formed by applying a paint (not shown).
  • the white paint is a paint in which a solvent is added to the white pigment (aggregate of a plurality of white particles) and binder that constitute the support layer 35, and the applied white paint layer becomes the support layer 35 after curing. As a result, when this step is completed, a single-layer structure layer containing a white pigment is formed as the support layer 35.
  • the support layer 35 formed by this step may be formed by applying the white paint in the thickness direction of the insulating layer 31 once or multiple times.
  • the third step is a step of applying a phosphor paint (not shown) to the outer surface 35x of the support layer 35 to form the phosphor layer 36.
  • the phosphor paint is applied by a screen printing method to the outer surface 35x of the support layer 35 formed in the second step, except for the optical element mounting region 75 (i.e., the CSP mounting region) on which the light emitting element 20 is mounted and the support layer exposed portion 70 provided around the optical element mounting region 75.
  • the phosphor layer 36 is formed on the outer surface 35x of the support layer 35 so that the outer surface 36x of the phosphor layer 36 is flat.
  • FIG. 3D is a diagram showing the start and end of the fourth step.
  • the fourth step is a step of removing a portion of the support layer 35 to expose all the bonding surfaces 34A1 of the circuit pattern layer 34.
  • a two-dimensional laser processing device (not shown) is used to selectively irradiate a portion of the support layer 35 on each bonding surface 34A1 with laser light. As a result, a portion of the support layer 35 on each bonding surface 34A1 is ablated, and each bonding surface 34A1 is exposed.
  • the bonding surface 34A1 may be exposed in advance using a method such as a photo printing method or a screen printing method in the second step (supporting layer forming step).
  • a method such as a photo printing method or a screen printing method in the second step (supporting layer forming step).
  • the phosphor substrate 30 is manufactured.
  • FIG. 3E is a diagram showing the start and end of the fifth step.
  • the fifth step (an example of a bonding step) is a step of mounting a plurality of light emitting elements 20 on the phosphor substrate 30.
  • the support layer 35 of the phosphor substrate 30 is removed in a concave shape, and solder paste SP is printed on each bonding surface 34A1 exposed, and each electrode of a plurality of light emitting elements 20 is aligned on each bonding surface 34A1. Melt the solder paste.
  • each light emitting element 20 is joined to each electrode pair 34A (each joining surface 34A1). Note that this process is performed by a reflow process, for example.
  • this step is completed, the light emitting substrate 10 is manufactured.
  • FIG. 4 is a diagram for explaining the light emitting operation of the light emitting substrate 10 of this embodiment, focusing on the phosphor layer 36 and omitting the support layer 35.
  • FIG. 5 showing a light emitting substrate 10a of a comparative form, which will be described later.
  • the activation switch (not shown) that activates the plurality of light emitting elements 20 When the activation switch (not shown) that activates the plurality of light emitting elements 20 is turned on, power supply to the circuit pattern layer 34 is started from an external power source (not shown) via the connector (not shown), and the plurality of light emitting elements 20 are turned on.
  • the element 20 emits light L in a radial and divergent manner, and a portion of the light L reaches the surface of the phosphor substrate 30 (ie, the outer surface 36x of the phosphor layer 36).
  • the behavior of the emitted light L will be explained in terms of the traveling direction of the emitted light L.
  • a part of the light L emitted from each light emitting element 20 is reflected by the outer surface 36x without entering the phosphor layer 36, and is emitted to the outside.
  • the wavelength of the light L remains the same as the wavelength of the light L emitted from each light emitting element 20.
  • the light of the LED 22 itself in a portion of the light L emitted from each light emitting element 20 enters the phosphor layer 36.
  • the above-mentioned "light of the LED 22 itself in a part of the light L” refers to the light that has not been color-converted by the phosphor of each light emitting element 20 (CSP itself) out of the emitted light L, that is, the light of the LED 22 itself in a part of the light L. It means its own light (for example, blue light (wavelength near 470 nm)).
  • the phosphor When the light L of the LED 22 itself collides with the phosphor dispersed in the phosphor layer 36, the phosphor is excited and emits excitation light.
  • the reason why the phosphor is excited is that the phosphor dispersed in the phosphor layer 36 is a phosphor having an excitation peak in blue light (visible light excited phosphor).
  • part of the energy of the light L is used to excite the phosphor, and the light L loses part of its energy.
  • the wavelength of the light L is converted (wavelength conversion is performed). For example, depending on the type of phosphor in the phosphor layer 36 (for example, when red CASN is used as the phosphor), the wavelength of the light L becomes long (for example, 650 nm).
  • the excitation light in the phosphor layer 36 is emitted from the phosphor layer 36 as it is, but some of the excitation light is directed toward the support layer 35 below.
  • the excitation light directed toward the support layer 35 is reflected by the support layer 35 and emitted to the outside.
  • the support layer 35 is formed of a white pigment as described above, the reflection effect in the entire wavelength range of visible light can be enhanced.
  • the light L emitted by each light emitting element 20 (the light L radially emitted by each light emitting element 20) is irradiated to the outside together with the excitation light through the plurality of optical paths as described above. . Therefore, when the emission wavelength of the phosphor included in the phosphor layer 36 is different from the emission wavelength of the phosphor that seals (or covers) the LED 22 in the light emitting element 20 (CSP), the light emitting substrate 10 of this embodiment , a bundle of light L emitted by each light emitting element 20 is irradiated together with the excitation light as a bundle of light L including light L having a wavelength different from the wavelength of light L emitted by each light emitting element 20.
  • the light emitting substrate 10 of the present embodiment emits composite light of the light (wavelength) emitted by the light emitting element 20 and the light (wavelength) emitted from the phosphor layer 36.
  • the light emitting substrate 10 of this embodiment converts the bundle of light L emitted by each light emitting element 20 into a light L containing light L having the same wavelength as the wavelength of light L emitted by each light emitting element 20. It is irradiated as a bundle with the above excitation light.
  • the junction 25 constituting the light emitting element 20, which is a CSP is located below the phosphor layer 36 (on the ⁇ Z direction side), the luminous efficiency of the phosphor substrate 30 will be reduced. That is, the light emitted from the LED 22 itself does not reach the phosphor layer 36, and the color temperature shift of the phosphor substrate 30 with respect to the CSP becomes smaller.
  • the above relationship between the junction 25 and the phosphor layer 36 is particularly important in the region near the light emitting element 20. In other words, in the region where the light of the light emitting element 20 does not reach, for example, the light emitting Such a relationship does not necessarily have to be satisfied in the peripheral portion of the substrate 10 and the like. The above is a description of the light emitting operation of the light emitting substrate 10 of this embodiment.
  • FIG. 5 is a diagram for explaining the light emitting operation of the light emitting substrate 10a of the comparative embodiment.
  • the light-emitting substrate 10a (substrate 30a on which a plurality of light-emitting elements 20 is mounted) of the comparative embodiment has the same configuration as the light-emitting substrate 10 (phosphor substrate 30) of the present embodiment, except that it does not include the phosphor layer 36. ing.
  • the light L emitted from each light-emitting element 20 and incident on the surface 32 of the substrate 30a is reflected or scattered without having its wavelength converted. Therefore, in the case of the substrate 30a of the comparative embodiment, it is not possible to adjust the light emission color to be different from the light emitted by the light emitting element 20 when the light emitting element 20 is mounted. That is, in the case of the light-emitting substrate 10a of the comparative embodiment, it is not possible to adjust the light emission color to be different from the light emitted by the light-emitting element 20.
  • the surface of the light emitting substrate 10 (the support layer surface 35X of the support layer 35 in FIG. 1C) and the periphery of each light emitting element 20 is A phosphor layer 36 is arranged. Therefore, a part of the light L emitted radially from each light emitting element 20 enters the phosphor layer 36, is wavelength-converted by the phosphor layer 36, and is irradiated to the outside. In this case, a portion of the light L radially emitted from each light emitting element 20 enters the phosphor layer 36 to excite the phosphor included in the phosphor layer 36 to generate excitation light.
  • the phosphor substrate 30 of this embodiment when the light emitting element 20 is mounted, the light L emitted from the phosphor substrate 30 is converted into light of a different color from the light L emitted by the light emitting element 20. Can be adjusted. Accordingly, according to the light emitting substrate 10 of this embodiment, the light L emitted from the phosphor substrate 30 can be adjusted to the light L of a different color from the light L emitted by the light emitting element 20. From another perspective, according to the light emitting substrate 10 of this embodiment, it is possible to irradiate the outside with light L of a different color from the light L emitted by the light emitting element 20.
  • glare can be reduced compared to the comparative embodiment. Note that this effect is achieved when the phosphor layer 36 is provided over the entire surface of the light emitting substrate 10 , specifically, the area where the phosphor layer 36 is disposed covers 80% of the surface 32 of the insulating layer 31 . It is more effective in cases where the area is larger than %.
  • the light emitting element 20 is a CSP
  • the position closest to the insulating layer 31 (-Z direction side) in the PN junction region (that is, the junction 25) of the LED 22 constituting the CSP is the phosphor layer 36. in the thickness direction.
  • the mounting level of the CSP (LED 22) is the lower lamination position of the phosphor layer 36 (the boundary level between the phosphor layer 36 and the support layer 35). Therefore, the light of the LED 22 output from the junction 25 reliably reaches the phosphor layer 36, and the functions of the phosphor layer 36 can be efficiently realized.
  • the phosphor layer 36 is supported by the support layer 35 (see FIGS. 1C and 3E). More specifically, the entire region of the phosphor layer 36 is supported by a single-layer support layer 35 containing a white pigment. Therefore, in the entire region of the phosphor layer 36, the reflection effect of the entire wavelength region of the excitation light, which is considered as visible light, can be enhanced.
  • the white pigment constituting the support layer 35 is cheaper than the phosphor constituting the phosphor layer 36
  • the white paint for forming the support layer 35 is cheaper than the phosphor paint. Therefore, the phosphor substrate 30 of this embodiment is less expensive than the case where the support layer 35 is formed of the phosphor layer 36. Accordingly, in the method for manufacturing the phosphor substrate 30 of this embodiment, the manufacturing cost of the phosphor substrate 30 is lower than in the method for manufacturing a phosphor substrate in which the support layer 35 is formed of the phosphor layer 36. be.
  • the thickness of the circuit pattern layer 34 is made thicker than that of a normal circuit board.
  • the thickness is set to be 175 ⁇ m as an example.
  • a support layer 35 is interposed between the circuit pattern layer 34 and the phosphor layer 36. Therefore, in the area where the circuit pattern layer 34 is not provided, the volume of the phosphor layer 36 will increase if the support layer 35 is not provided, but in this embodiment, since the support layer 35 is provided, the manufacturing cost can be sufficiently suppressed. can.
  • the distance from the phosphor layer 36 to the light emitting element 20 is 50 ⁇ m to 200 ⁇ m.
  • the predetermined distance L2 is 50 ⁇ m or more, it is possible to effectively prevent the phosphor paint from adhering to the optical element mounting area 75 when the phosphor layer 36 is laminated. Further, since the predetermined distance L2 is 200 ⁇ m or less, it is possible to avoid a situation where the light output from the light emitting element 20 does not sufficiently reach the phosphor layer 36 and the color temperature shifting function deteriorates.
  • D1 50 and D2 50 have the following relationship (Equation 1).
  • (Formula 1) 0.8 ⁇ D2 50 /D1 50 ⁇ 1.2
  • the difference in the median diameter of the fine particles (a plurality of phosphor particles and a plurality of white particles) in each layer is set to be relatively small. Therefore, in the phosphor substrate 30 of this embodiment, stress generated at the interface between the support layer 35 and the phosphor layer 36 is reduced.
  • the light emitting substrate 110 of this embodiment differs from the light emitting substrate 10 of the first embodiment (see FIG. 1C) in that a groove-shaped support layer recess 77 is provided in the support layer exposed portion 70 of the support layer 35. It's different.
  • the method of manufacturing the light emitting substrate 110 of the present embodiment includes a step of forming a groove-shaped support layer recess 77.
  • the bonding surface 34A1 it may be formed by removing a part of the support layer 35 by laser beam irradiation, or by using a photo printing method or a screen printing method in the second step (support layer forming step). If used, a support layer 35 can also be formed.
  • the support layer recess 77 prevents the phosphor paint from flowing into the optical element mounting area 75 when applying the phosphor paint during manufacturing. It can effectively prevent it from being put away.
  • an example of the light emitting element 20 is a CSP.
  • an example of the light emitting element 20 may be other than CSP.
  • it may simply be equipped with a flip chip.
  • it can also be applied to the substrate itself of a COB device. In any case, it is sufficient that the area where light is actually outputted is above the boundary area between the phosphor layer 36 and the support layer 35 in the thickness direction (on the +Z direction side).
  • the phosphor substrate 30 is mounted with a plurality of light emitting elements 20, and the light emitting substrate 10 is equipped with a plurality of light emitting elements 20.
  • the number of light emitting elements 20 mounted on the phosphor substrate 30 may be at least one or more.
  • the back surface pattern layer 38 is provided on the back surface 33 of the phosphor substrate 30 (see FIG. 1B), but the back surface pattern layer 38 may not be provided.
  • the phosphor layer 36 is disposed on the surface 32 of the insulating layer 31 and the circuit pattern layer 34 on which the light-emitting element 20 is mounted, except for the plurality of electrode pairs 34A (see FIG. 2B).
  • the phosphor layer 36 does not have to be disposed over the entire area of the surface 32 of the phosphor substrate 30, except for the plurality of electrode pairs 34A.
  • CS-3305A manufactured by Risho Kogyo Co., Ltd. is used as the motherboard MB in manufacturing the phosphor substrate 30 and the light emitting substrate 10.
  • this is just an example, and a different motherboard MB may be used.
  • the standard specifications such as the insulation layer thickness and copper foil thickness of CS-3305A manufactured by Risho Kogyo Co., Ltd. are not limited, and a thicker copper foil thickness may be used.
  • the light emitting substrates 10 and 110 (including variations thereof) of each embodiment can be combined with other components and applied to a lighting device.
  • Other components in this case include a power source that supplies power for causing the light emitting elements 20 of the light emitting substrate 10 to emit light.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

Procédé de fabrication d'un substrat de luminophore (30) sur lequel au moins un élément électroluminescent (20) est monté comprenant : une étape de formation de couche de motif de circuit pour former, sur une surface d'une couche isolante (31), une couche de motif de circuit (34) jointe au ou aux éléments électroluminescents (20) ; une étape de formation de couche de luminophore pour former, sur un côté de surface de la couche isolante (31), une couche de luminophore (36) contenant un luminophore dont la longueur d'onde de pic d'émission est dans la région de lumière visible lors de l'utilisation de la lumière émise par le ou les éléments électroluminescents (20) en tant que lumière d'excitation ; et une étape de formation de couche de support pour former, entre la couche isolante (31) et la couche de luminophore (36), une couche de support (35) qui ne contient pas de luminophore et qui supporte la couche de luminophore (36) ; lors de l'étape de formation de couche de support, la couche de support (35) étant stratifiée sur la couche de motif de circuit (34) dans une région pourvue de la couche de motif de circuit (34).
PCT/JP2023/033875 2022-09-21 2023-09-19 Procédé de fabrication de substrat de luminophore, et procédé de fabrication de substrat électroluminescent WO2024063045A1 (fr)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017168559A (ja) * 2016-03-15 2017-09-21 東芝ライテック株式会社 発光装置
WO2020170970A1 (fr) * 2019-02-21 2020-08-27 デンカ株式会社 Substrat fluorescent, substrat électroluminescent, dispositif d'éclairage, procédé de fabrication de substrat fluorescent, et procédé de fabrication de substrat électroluminescent
WO2022045017A1 (fr) * 2020-08-28 2022-03-03 デンカ株式会社 Procédé de fabrication de substrat de phosphore, et procédé de fabrication de substrat électroluminescent

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017168559A (ja) * 2016-03-15 2017-09-21 東芝ライテック株式会社 発光装置
WO2020170970A1 (fr) * 2019-02-21 2020-08-27 デンカ株式会社 Substrat fluorescent, substrat électroluminescent, dispositif d'éclairage, procédé de fabrication de substrat fluorescent, et procédé de fabrication de substrat électroluminescent
WO2022045017A1 (fr) * 2020-08-28 2022-03-03 デンカ株式会社 Procédé de fabrication de substrat de phosphore, et procédé de fabrication de substrat électroluminescent

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