WO2024047488A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
WO2024047488A1
WO2024047488A1 PCT/IB2023/058423 IB2023058423W WO2024047488A1 WO 2024047488 A1 WO2024047488 A1 WO 2024047488A1 IB 2023058423 W IB2023058423 W IB 2023058423W WO 2024047488 A1 WO2024047488 A1 WO 2024047488A1
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Prior art keywords
layer
insulating layer
conductive layer
metal oxide
transistor
Prior art date
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Ceased
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PCT/IB2023/058423
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English (en)
French (fr)
Japanese (ja)
Inventor
肥塚純一
神長正美
島行徳
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to CN202380059006.3A priority Critical patent/CN119698938A/zh
Priority to KR1020257010028A priority patent/KR20250059459A/ko
Priority to JP2024543598A priority patent/JPWO2024047488A1/ja
Priority to US19/102,881 priority patent/US20260047144A1/en
Publication of WO2024047488A1 publication Critical patent/WO2024047488A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00—Electroluminescent light sources
    • H05B33/02—Details
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6731—Top-gate only TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO

Definitions

  • One embodiment of the present invention relates to a semiconductor device and a method for manufacturing the same.
  • One embodiment of the present invention relates to a transistor and a method for manufacturing the same.
  • One embodiment of the present invention relates to a display device including a semiconductor device.
  • one embodiment of the present invention is not limited to the above technical field.
  • the technical fields of one embodiment of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, storage devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input/output devices (e.g., touch panels), and the like.
  • An example of this is a method for driving the same or a method for producing the same.
  • a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device having the same circuit, etc. It also refers to any device that can function by utilizing the characteristics of semiconductors.
  • an integrated circuit, a chip including an integrated circuit, and an electronic component containing a chip in a package are examples of semiconductor devices.
  • a storage device, a display device, a light emitting device, a lighting device, and an electronic device may themselves be semiconductor devices, and each may include a semiconductor device.
  • Semiconductor devices having transistors are widely applied to electronic devices. For example, in a display device, by reducing the area occupied by a transistor, the pixel size can be reduced and the definition can be improved. Therefore, miniaturized transistors are required.
  • Examples of devices that require high-definition display devices include virtual reality (VR), augmented reality (AR), substitute reality (SR), and mixed reality (MR). ) devices are being actively developed.
  • VR virtual reality
  • AR augmented reality
  • SR substitute reality
  • MR mixed reality
  • a display device for example, a light emitting device having an organic EL (Electro Luminescence) element or a light emitting diode (LED) has been developed.
  • organic EL Electro Luminescence
  • LED light emitting diode
  • Patent Document 1 discloses a high-definition display device using organic EL elements.
  • An object of one embodiment of the present invention is to provide a microsized transistor.
  • one of the challenges is to provide a transistor with a short channel length.
  • one of the objects is to provide a semiconductor device that occupies a small area.
  • one of the objects is to provide a semiconductor device with low wiring resistance.
  • Another object of the present invention is to provide a semiconductor device or a display device with low power consumption.
  • one object of the present invention is to provide a highly reliable transistor, semiconductor device, or display device.
  • one of the challenges is to provide a high-definition display device.
  • Another object of the present invention is to provide a method for manufacturing a semiconductor device or a display device with high productivity.
  • Another object of the present invention is to provide a novel transistor, a semiconductor device, a display device, or a manufacturing method thereof.
  • One embodiment of the present invention includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first conductive layer, a second conductive layer, and a first insulating layer.
  • This is a semiconductor device having a A first insulating layer is provided on the first conductive layer.
  • a second conductive layer is provided on the first insulating layer.
  • the first insulating layer and the second conductive layer have openings that reach the first conductive layer.
  • the first semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surfaces of the second conductive layer.
  • the second semiconductor layer is provided on the first semiconductor layer.
  • the third semiconductor layer is provided on the second semiconductor layer.
  • the first semiconductor layer has a first material.
  • the second semiconductor layer has a second material.
  • the third semiconductor layer has a third material.
  • the bandgap of the first material is greater than the bandgap of the second material.
  • the bandgap of the third material is greater than the bandgap of the second material.
  • the first material is preferably the same as the third material.
  • One embodiment of the present invention includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first conductive layer, a second conductive layer, and a first insulating layer.
  • This is a semiconductor device having a A first insulating layer is provided on the first conductive layer.
  • a second conductive layer is provided on the first insulating layer.
  • the first insulating layer and the second conductive layer have openings that reach the first conductive layer.
  • the first semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surfaces of the second conductive layer.
  • the second semiconductor layer is provided on the first semiconductor layer.
  • the third semiconductor layer is provided on the second semiconductor layer.
  • the first semiconductor layer includes a first metal oxide.
  • the second semiconductor layer includes a second metal oxide.
  • the third semiconductor layer includes a third metal oxide.
  • the bandgap of the first metal oxide is larger than the bandgap of the second metal oxide.
  • the bandgap of the third metal oxide is larger than the bandgap of the second metal oxide.
  • the composition of the first metal oxide is preferably the same as the composition of the third metal oxide.
  • One embodiment of the present invention includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first conductive layer, a second conductive layer, and a first insulating layer.
  • This is a semiconductor device having a A first insulating layer is provided on the first conductive layer.
  • a second conductive layer is provided on the first insulating layer.
  • the first insulating layer and the second conductive layer have openings that reach the first conductive layer.
  • the first semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surfaces of the second conductive layer.
  • the second semiconductor layer is provided on the first semiconductor layer.
  • the third semiconductor layer is provided on the second semiconductor layer.
  • the first semiconductor layer includes a first metal oxide.
  • the second semiconductor layer includes a second metal oxide.
  • the third semiconductor layer includes a third metal oxide.
  • the first metal oxide includes indium and a first element.
  • the second metal oxide contains indium.
  • the third metal oxide includes indium and the second element.
  • the first element is one or more of gallium, aluminum, and tin.
  • the second element is one or more of gallium, aluminum, and tin.
  • the content of the first element in the first metal oxide is higher than the sum of the contents of gallium, aluminum, and tin in the second metal oxide.
  • the content of the second element in the third metal oxide is higher than the sum of the contents of gallium, aluminum, and tin in the second metal oxide.
  • the composition of the first metal oxide is preferably the same as the composition of the third metal oxide.
  • the thickness of the first semiconductor layer is preferably thinner than the thickness of the second semiconductor layer.
  • the thickness of the third semiconductor layer is preferably thinner than the thickness of the second semiconductor layer.
  • the first conductive layer and the second conductive layer each contain an oxide conductor.
  • the first insulating layer includes a second insulating layer, a third insulating layer on the second insulating layer, and a fourth insulating layer on the third insulating layer. It is preferable.
  • the third insulating layer contains oxygen.
  • the second insulating layer and the fourth insulating layer each contain nitrogen.
  • the first insulating layer includes the second insulating layer, the third insulating layer on the second insulating layer, the fourth insulating layer on the third insulating layer, and the fourth insulating layer. It is preferable to have a fifth insulating layer on the insulating layer and a sixth insulating layer on the fifth insulating layer.
  • the fourth insulating layer contains oxygen. It is preferable that the second insulating layer, the third insulating layer, the fifth insulating layer, and the sixth insulating layer each contain nitrogen.
  • the second insulating layer has a region containing more hydrogen than the third insulating layer.
  • the sixth insulating layer has a region containing more hydrogen than the fifth insulating layer.
  • a microsized transistor can be provided.
  • a transistor with a short channel length can be provided.
  • a transistor with a large on-state current can be provided.
  • a transistor with good electrical characteristics can be provided.
  • a semiconductor device that occupies a small area can be provided.
  • a semiconductor device with low wiring resistance can be provided.
  • a semiconductor device or a display device with low power consumption can be provided.
  • a highly reliable transistor, semiconductor device, or display device can be provided.
  • a high-definition display device can be provided.
  • a method for manufacturing a semiconductor device or a display device with high productivity can be provided.
  • a novel transistor, a semiconductor device, a display device, or a manufacturing method thereof can be provided.
  • FIG. 1A is a top view showing an example of a semiconductor device.
  • 1B and 1C are cross-sectional views showing an example of a semiconductor device.
  • 2A to 2D are perspective views showing an example of a semiconductor device.
  • FIG. 3 is a cross-sectional view showing an example of a semiconductor device.
  • FIG. 4A is a top view showing an example of a semiconductor device.
  • FIG. 4B is a cross-sectional view showing an example of a semiconductor device.
  • FIG. 5 is a cross-sectional view showing an example of a semiconductor device.
  • 6A and 6B are cross-sectional views showing an example of a semiconductor device.
  • 7A and 7B are cross-sectional views showing an example of a semiconductor device.
  • FIG. 8 is a cross-sectional view showing an example of a semiconductor device.
  • 9A to 9C are cross-sectional views showing an example of a semiconductor device.
  • FIG. 10A is a top view showing an example of a semiconductor device.
  • 10B and 10C are cross-sectional views showing an example of a semiconductor device.
  • FIG. 11A is a top view showing an example of a semiconductor device.
  • 11B and 11C are cross-sectional views showing an example of a semiconductor device.
  • FIG. 12 is a cross-sectional view showing an example of a semiconductor device.
  • 13A to 13I are circuit diagrams showing an example of a semiconductor device.
  • FIG. 14A is a top view showing an example of a semiconductor device.
  • 14B and 14C are cross-sectional views showing an example of a semiconductor device.
  • FIG. 15A to 15C are cross-sectional views showing an example of a semiconductor device.
  • FIG. 16A is a top view showing an example of a semiconductor device.
  • 16B and 16C are cross-sectional views showing an example of a semiconductor device.
  • FIG. 17A is a top view showing an example of a semiconductor device.
  • 17B and 17C are cross-sectional views showing an example of a semiconductor device.
  • FIG. 18A is a top view showing an example of a semiconductor device.
  • FIG. 18B is a cross-sectional view showing an example of a semiconductor device.
  • FIG. 19A is a top view showing an example of a semiconductor device.
  • FIG. 19B is a cross-sectional view showing an example of a semiconductor device.
  • 20A and 20B are equivalent circuit diagrams of the semiconductor device.
  • FIG. 20C is a top view showing an example of a semiconductor device.
  • FIG. 21 is a cross-sectional view showing an example of a semiconductor device.
  • FIG. 22 is a perspective view showing an example of a semiconductor device.
  • 23A to 23D are perspective views showing an example of a semiconductor device.
  • 24A and 24B are equivalent circuit diagrams of the semiconductor device.
  • FIG. 24C is a top view showing an example of a semiconductor device.
  • FIG. 25 is a cross-sectional view showing an example of a semiconductor device.
  • FIG. 26 is a perspective view showing an example of a semiconductor device.
  • 27A to 27D are perspective views showing an example of a semiconductor device.
  • 28A to 28E are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device.
  • FIG. 29A to 29D are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device.
  • FIG. 30 is a perspective view showing an example of a display device.
  • 31A and 31B are cross-sectional views showing an example of a display device.
  • FIG. 32 is a cross-sectional view showing an example of a display device.
  • 33A to 33C are cross-sectional views showing an example of a display device.
  • 34A and 34B are cross-sectional views showing an example of a display device.
  • FIG. 35 is a cross-sectional view showing an example of a display device.
  • FIG. 36 is a cross-sectional view showing an example of a display device.
  • FIG. 37 is a cross-sectional view showing an example of a display device.
  • 38A and 38B are cross-sectional views showing an example of a display device.
  • 39A to 39F are cross-sectional views illustrating an example of a method for manufacturing a display device.
  • 40A to 40D are diagrams illustrating an example of an electronic device.
  • 41A to 41F are diagrams illustrating an example of an electronic device.
  • 42A to 42G are diagrams illustrating an example of an electronic device.
  • FIG. 43 is a diagram showing Id-Vg characteristics of the transistor according to the example.
  • ordinal numbers such as “first” and “second” are used for convenience, and do not limit the number of components or the order of the components (for example, the order of steps or the order of lamination). It's not something you do. Further, the ordinal number attached to a constituent element in a certain part of this specification may not match the ordinal number attached to the constituent element in another part of this specification or in the claims.
  • film and “layer” can be interchanged depending on the situation or circumstances.
  • conductive layer can be changed to the term “conductive film.”
  • insulating film can be changed to the term “insulating layer.”
  • a transistor is a type of semiconductor element, and can achieve the function of amplifying current or voltage, and the switching operation of controlling conduction or non-conduction.
  • Transistors in this specification include IGFETs (Insulated Gate Field Effect Transistors) and thin film transistors (TFTs).
  • source and drain may be interchanged when transistors of different polarity are employed, or when the direction of current changes during circuit operation. Therefore, in this specification, the terms “source” and “drain” can be used interchangeably. Note that the names of the source and drain of the transistor can be appropriately changed depending on the situation, such as a source terminal and a drain terminal, or a source electrode and a drain electrode.
  • electrically connected includes a case where a connection is made via "something that has some kind of electrical effect.”
  • something that has some kind of electrical effect is not particularly limited as long as it enables transmission and reception of electrical signals between connected objects.
  • something that has some kind of electrical action includes electrodes or wiring, switching elements such as transistors, resistance elements, coils, capacitive elements, and other elements with various functions.
  • off-state current refers to leakage current between a source and a drain when a transistor is in an off state (also referred to as a non-conducting state or a cutoff state).
  • an off state is a state in which the voltage between the gate and source, V gs , is lower than the threshold voltage V th for n-channel transistors (higher than V th for p-channel transistors). means.
  • the upper surface shapes roughly match means that at least a portion of the outlines of the stacked layers overlap. For example, this includes a case where the upper layer and the lower layer are processed using the same mask pattern or partially the same mask pattern. However, strictly speaking, the contours may not overlap, and the upper layer may be located inside the lower layer, or the upper layer may be located outside the lower layer, and in this case, the upper surface shape may be said to be "approximately the same”. Furthermore, when the top surface shapes match or roughly match, it can also be said that the ends are aligned or roughly aligned.
  • a tapered shape refers to a shape in which at least a part of the side surface of the structure is inclined with respect to the substrate surface or the surface to be formed.
  • a region where the angle between the inclined side surface and the substrate surface or the surface to be formed also referred to as a taper angle
  • the side surface of the structure, the substrate surface, and the surface to be formed do not necessarily have to be completely flat, and may be substantially planar with a minute curvature or substantially planar with minute irregularities.
  • a device manufactured using a metal mask or FMM fine metal mask, high-definition metal mask
  • a device with a MM (metal mask) structure is sometimes referred to as a device with an MML (metal maskless) structure.
  • SBS Side By Side
  • materials and configurations can be optimized for each light emitting element, which increases the degree of freedom in selecting materials and configurations, making it easier to improve brightness and reliability.
  • holes or electrons are sometimes referred to as “carriers.”
  • a hole injection layer or an electron injection layer is called a “carrier injection layer”
  • a hole transport layer or an electron transport layer is called a “carrier transport layer”
  • a hole blocking layer or an electron blocking layer is called a “carrier injection layer.”
  • the carrier injection layer, carrier transport layer, and carrier block layer described above may not be clearly distinguishable depending on their respective cross-sectional shapes or characteristics.
  • one layer may serve as two or three functions among a carrier injection layer, a carrier transport layer, and a carrier block layer.
  • a light emitting element has an EL layer between a pair of electrodes.
  • the EL layer has at least a light emitting layer.
  • the layers (also referred to as functional layers) included in the EL layer include a light emitting layer, a carrier injection layer (a hole injection layer and an electron injection layer), a carrier transport layer (a hole transport layer and an electron transport layer), and a carrier Block layers (hole block layer and electron block layer) and the like can be mentioned.
  • a light receiving element also referred to as a light receiving device
  • one of a pair of electrodes is sometimes referred to as a pixel electrode, and the other is sometimes referred to as a common electrode.
  • the sacrificial layer (which may also be called a mask layer) refers to at least the layer above the light-emitting layer (more specifically, the layer that is processed into an island shape among the layers constituting the EL layer). It has the function of protecting the light emitting layer during the manufacturing process.
  • step breakage refers to a phenomenon in which a layer, film, or electrode is separated due to the shape of the surface on which it is formed (for example, a step difference).
  • FIG. 1A A top view (also referred to as a plan view) of the transistor 100 is shown in FIG. 1A.
  • FIG. 1B shows a cross-sectional view taken along the dashed-dotted line A1-A2 shown in FIG. 1A
  • FIG. 1C shows a cross-sectional view taken along the dashed-dotted line B1-B2. Note that in FIG. 1A, some of the components of the transistor 100 (such as a gate insulating layer) are omitted. Regarding the top view of the transistor, some of the constituent elements are omitted in the subsequent drawings as well as in FIG. 1A.
  • FIGS. 2A to 2D Perspective views of the transistor 100 are shown in FIGS. 2A to 2D.
  • FIG. 2B shows a cross section taken along the dashed line C1-C2 shown in FIG. 2A.
  • the insulating layer shown in FIG. 2A is transparent, and the outline is shown by a broken line.
  • the insulating layer shown in FIG. 2B is transparent and the outline is shown in dashed lines.
  • the transistor 100 is provided on a substrate 102.
  • the transistor 100 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 112a, and a conductive layer 112b.
  • the conductive layer 104 functions as a gate electrode (also referred to as a first gate electrode).
  • a portion of the insulating layer 106 functions as a gate insulating layer (also referred to as a first gate insulating layer).
  • the conductive layer 112a functions as one of a source electrode and a drain electrode, and the conductive layer 112b functions as the other.
  • the semiconductor layer 108 the entire region between the source electrode and the drain electrode that overlaps with the gate electrode via the gate insulating layer functions as a channel formation region. Further, in the semiconductor layer 108, a region in contact with the source electrode functions as a source region, and a region in contact with the drain electrode functions as a drain region.
  • a conductive layer 112a is provided on the substrate 102, an insulating layer 110 is provided on the conductive layer 112a, and a conductive layer 112b is provided on the insulating layer 110.
  • the insulating layer 110 has a region sandwiched between a conductive layer 112a and a conductive layer 112b.
  • the conductive layer 112a has a region overlapping with the conductive layer 112b with the insulating layer 110 interposed therebetween.
  • the insulating layer 110 has an opening 141 that reaches the conductive layer 112a. It can also be said that the conductive layer 112a is exposed in the opening 141.
  • the conductive layer 112b has an opening 143 in a region overlapping with the conductive layer 112a.
  • the opening 143 is provided in a region overlapping with the opening 141.
  • the opening 141 of the insulating layer 110 and the opening 143 of the conductive layer 112b are given different symbols, but these openings can also be collectively referred to as one opening.
  • the insulating layer 110 and the conductive layer 112b have an opening that reaches the conductive layer 112a.
  • the semiconductor layer 108 is provided to cover the openings 141 and 143.
  • the semiconductor layer 108 has a region in contact with the top and side surfaces of the conductive layer 112b, the side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.
  • the semiconductor layer 108 is electrically connected to the conductive layer 112a through the opening 141.
  • the semiconductor layer 108 has a shape that follows the top and side surfaces of the conductive layer 112b, the side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.
  • the semiconductor layer 108 has a stacked structure.
  • FIG. 1B and the like show a structure in which the semiconductor layer 108 has a stacked structure of a semiconductor layer 108a, a semiconductor layer 108b over the semiconductor layer 108a, and a semiconductor layer 108c over the semiconductor layer 108b.
  • the insulating layer 106 functioning as a gate insulating layer of the transistor 100 is provided to cover the openings 141 and 143.
  • the insulating layer 106 is provided over the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110.
  • the insulating layer 106 has a region in contact with the top surface and side surfaces of the semiconductor layer 108, the top surface and side surfaces of the conductive layer 112b, and the top surface of the insulating layer 110.
  • the insulating layer 106 has a shape that follows the top surface of the insulating layer 110, the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the semiconductor layer 108, and the top surface of the conductive layer 112a.
  • a conductive layer 104 functioning as a gate electrode of the transistor 100 is provided on the insulating layer 106 and has a region in contact with the upper surface of the insulating layer 106.
  • the conductive layer 104 has a region overlapping with the semiconductor layer 108 with the insulating layer 106 in between.
  • the conductive layer 104 has a shape that follows the shape of the upper surface of the insulating layer 106.
  • the transistor 100 is a so-called top-gate transistor that has a gate electrode above the semiconductor layer 108. Furthermore, since the lower surface of the semiconductor layer 108 is in contact with the source electrode and the drain electrode, it can be called a TGBC (Top Gate Bottom Contact) transistor.
  • the source electrode and the drain electrode are located at different heights with respect to the surface of the substrate 102, which is the surface on which they are formed, and the drain current flows in a direction perpendicular or approximately perpendicular to the surface of the substrate 102. flows. In the transistor 100, the drain current can also be said to flow in the vertical direction or approximately in the vertical direction. Therefore, a transistor that is one embodiment of the present invention can be called a vertical channel transistor or a VFET (Vertical Field Effect Transistor).
  • VFET Very Field Effect Transistor
  • the channel length of the transistor 100 can be controlled by the thickness of the insulating layer 110 provided between the conductive layer 112a and the conductive layer 112b. Therefore, a transistor having a channel length shorter than the resolution limit of an exposure apparatus used for manufacturing the transistor can be manufactured with high precision. Furthermore, variations in characteristics among the plurality of transistors 100 are also reduced. Therefore, the operation of the semiconductor device including the transistor 100 is stabilized, and reliability can be improved. Furthermore, when characteristic variations are reduced, the degree of freedom in circuit design increases, and the operating voltage of the semiconductor device can be lowered. Therefore, power consumption of the semiconductor device can be reduced.
  • the source electrode, the semiconductor layer, and the drain electrode can be provided overlapping each other, so the occupied area is smaller than that of a so-called planar transistor in which the semiconductor layers are arranged in a plane. Can be significantly reduced.
  • the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 can each function as wiring, and the transistor 100 can be provided in a region where these wirings overlap. That is, in a circuit including the transistor 100 and the wiring, the area occupied by the transistor 100 and the wiring can be reduced. Therefore, the area occupied by the circuit can be reduced, and a compact semiconductor device can be achieved.
  • the semiconductor device of one embodiment of the present invention when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-definition display device can be obtained. Further, for example, when the semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (for example, one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced. Therefore, a display device with a narrow frame can be obtained.
  • a driver circuit of a display device for example, one or both of a gate line driver circuit and a source line driver circuit
  • FIG. 1B and the like show an example in which the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 cover the openings 141 and 143, one embodiment of the present invention is not limited to this.
  • a structure may be adopted in which a step is formed by the insulating layer 110, the conductive layer 112b, and the conductive layer 112a, and the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 are provided along the step.
  • the semiconductor layer 108 includes a semiconductor layer 108a, a semiconductor layer 108b over the semiconductor layer 108a, and a semiconductor layer 108c over the semiconductor layer 108b.
  • the bandgap of the first material used for the semiconductor layer 108a is preferably different from the bandgap of the second material used for the semiconductor layer 108b.
  • the bandgap of the third material used for the semiconductor layer 108c is preferably different from the bandgap of the second material used for the semiconductor layer 108b. Note that the bandgap of the third material may be the same or approximately the same as the bandgap of the first material, or may be different.
  • the bandgap of the first material is preferably larger than the bandgap of the second material. Moreover, it is preferable that the bandgap of the third material is larger than the bandgap of the second material.
  • the semiconductor layer 108b is sandwiched between the semiconductor layer 108a and the semiconductor layer 108c, which have a larger band gap than the semiconductor layer 108b, and can have a buried channel structure. Thereby, in the semiconductor layer 108, the main current path becomes the semiconductor layer 108b.
  • the lower end of the conduction band of the first material is preferably closer to the vacuum level than the lower end of the conduction band of the second material.
  • the lower end of the conduction band of the third material is preferably closer to the vacuum level than the lower end of the conduction band of the second material.
  • the electron affinity of the first material is preferably smaller than the electron affinity of the second material.
  • the third material has a lower electron affinity than the second material. Note that the electron affinity of the third material may be the same or approximately the same as the electron affinity of the first material, or may be different.
  • a trap level due to impurities or defects may be formed at and near the interface between the insulating layer 110 and the semiconductor layer 108.
  • the impurities include residual components of the etchant or etching gas used when forming the opening 141, and components of the conductive layer 112a and the conductive layer 112b that adhere to the side surfaces of the insulating layer 110 when forming the opening 141.
  • the interface between the insulating layer 106 and the semiconductor layer 108 and its vicinity may be damaged during the formation of the insulating layer 106.
  • a trap level can be formed at and near the interface between the insulating layer 106 and the semiconductor layer 108.
  • the trap levels at and near the interface of the semiconductor layer 108b can be reduced.
  • a transistor with a large on-current and high reliability can be obtained. Therefore, it is possible to provide a semiconductor device that has both high performance and high reliability.
  • the semiconductor materials used for the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c are not particularly limited.
  • a semiconductor made of a single element or a compound semiconductor can be used.
  • semiconductors made of simple elements include silicon and germanium.
  • compound semiconductors include gallium arsenide and silicon germanium.
  • Other examples of compound semiconductors include organic semiconductors, nitride semiconductors, and oxide semiconductors. Note that these semiconductor materials may contain impurities as dopants.
  • the first material is different from the second material.
  • the third material is different from the second material.
  • the third material may be the same or approximately the same as the first material, or may be different.
  • the crystallinity of the semiconductor material used for the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c is not particularly limited. Either a crystalline semiconductor or a semiconductor partially having a crystalline region may be used. It is preferable to use a single crystal semiconductor or a semiconductor having crystallinity because deterioration of transistor characteristics can be suppressed.
  • the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c each include a metal oxide (also referred to as an oxide semiconductor) that exhibits semiconductor characteristics.
  • a metal oxide also referred to as an oxide semiconductor
  • the band gap of the first metal oxide used for the semiconductor layer 108a, the second metal oxide used for the semiconductor layer 108b, and the third metal oxide used for the semiconductor layer 108c is preferably 2.0 eV or more, and 2.0 eV or more. More preferably, it is .5 eV or more.
  • the bandgap of the first metal oxide is preferably different from the bandgap of the second metal oxide.
  • the difference between the band gap of the first metal oxide and the band gap of the second metal oxide is preferably 0.1 eV or more, more preferably 0.2 eV or more, and even more preferably 0.3 eV or more.
  • the bandgap of the third metal oxide is different from the bandgap of the second metal oxide.
  • the difference between the band gap of the third metal oxide and the band gap of the second metal oxide is preferably 0.1 eV or more, more preferably 0.2 eV or more, and even more preferably 0.3 eV or more.
  • the band gap of the third metal oxide may be the same or approximately the same as that of the first metal oxide, or may be different.
  • the band gap of the first metal oxide is preferably larger than the band gap of the second metal oxide.
  • the bandgap of the third metal oxide is larger than the bandgap of the second metal oxide. This allows an embedded channel configuration.
  • the lower end of the conduction band of the first metal oxide is preferably closer to the vacuum level than the lower end of the conduction band of the second metal oxide.
  • the lower end of the conduction band of the third metal oxide is preferably closer to the vacuum level than the lower end of the conduction band of the second metal oxide.
  • the electron affinity of the first metal oxide is preferably smaller than the electron affinity of the second metal oxide.
  • the third metal oxide has a smaller electron affinity than the second metal oxide. Note that the electron affinity of the third metal oxide may be the same or approximately the same as the electron affinity of the first metal oxide, or may be different.
  • the composition of the first metal oxide is preferably different from the composition of the second metal oxide.
  • the composition of the third metal oxide is different from the composition of the second metal oxide.
  • the composition of the third metal oxide may be the same or approximately the same as the composition of the first metal oxide, or may be different.
  • the composition of the first metal oxide used for the semiconductor layer 108a is preferably the same as the composition of the third metal oxide used for the semiconductor layer 108c.
  • the semiconductor layer 108a and the semiconductor layer 108c can be formed using the same sputtering target, so that manufacturing costs can be reduced.
  • the first metal oxide, second metal oxide, and third metal oxide examples include indium oxide, gallium oxide, and zinc oxide.
  • the metal oxide contains at least indium or zinc.
  • the metal oxide has two or three selected from indium, element M, and zinc.
  • the element M is a metal element or a metalloid element that has a high bonding energy with oxygen, for example, a metal element or a metalloid element that has a higher bonding energy with oxygen than indium.
  • the element M includes aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, and calcium. , strontium, barium, boron, silicon, germanium, and antimony.
  • the element M included in the metal oxide is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium; It is more preferable to use one or more selected from , and tin.
  • metal elements and metalloid elements may be collectively referred to as "metal elements," and the "metal elements" described in this specification, etc. may include semimetal elements.
  • the first metal oxide, second metal oxide, and third metal oxide are, for example, indium zinc oxide (also referred to as In-Zn oxide, IZO (registered trademark)), indium tin oxide ( In-Sn oxide, also written as ITO), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium tungsten oxide (also written as In-W oxide, IWO) , indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide, also written as IGTO), gallium zinc oxide (Ga-Zn oxide, also written as GZO) , aluminum zinc oxide (Al-Zn oxide, also written as AZO), indium aluminum zinc oxide (In-Al-Zn oxide, also written as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium
  • the field effect mobility of the transistor can be increased. Further, a transistor with a large on-state current can be realized.
  • the metal oxide may contain one or more metal elements having a large periodic number in the periodic table of elements.
  • metal elements with large period numbers include metal elements belonging to the fifth period and metal elements belonging to the sixth period.
  • the metal element examples include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.
  • the metal oxide may contain one or more nonmetallic elements.
  • the metal oxide contains a nonmetal element, the carrier concentration increases or the band gap decreases, and the field effect mobility of the transistor may be increased.
  • nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.
  • the metal oxide becomes highly crystalline, and the diffusion of impurities in the metal oxide can be suppressed. Therefore, fluctuations in the electrical characteristics of the transistor are suppressed, and reliability can be improved.
  • the electrical characteristics and reliability of the transistor vary depending on the composition of the metal oxide applied to the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c. Therefore, by varying the composition of the metal oxide depending on the electrical characteristics and reliability required of the transistor, a semiconductor device that has both excellent electrical characteristics and high reliability can be obtained.
  • the atomic ratio of In in the In-M-Zn oxide is preferably equal to or higher than the atomic ratio of the element M.
  • the atomic ratio of In in the In-M-Zn oxide may be less than the atomic ratio of element M.
  • the sum of the ratios of the number of atoms of the metal elements can be set as the ratio of the number of atoms of the element M.
  • the ratio of the number of indium atoms to the sum of the number of atoms of all metal elements contained is sometimes referred to as the indium content rate. The same applies to other metal elements.
  • the band gap can be adjusted by varying the compositions of the first metal oxide used for the semiconductor layer 108a and the second metal oxide used for the semiconductor layer 108b.
  • the content of element M in the first metal oxide is preferably higher than the content of element M in the second metal oxide.
  • the bandgap of the first metal oxide can be made larger than the bandgap of the second metal oxide.
  • the first metal oxide and the second metal oxide are In-M-Zn oxide
  • the element M included in the first metal oxide, the element M included in the second metal oxide, and the element M included in the third metal oxide may be the same or different. Further, when one or more of the first metal oxide, the second metal oxide, and the third metal oxide has a plurality of elements M, each element of the element M is an element that the other metal oxide has. It may be the same as M or may be different.
  • the composition of the third metal oxide is preferably different from the composition of the second metal oxide.
  • the content of element M in the third metal oxide is preferably higher than the content of element M in the second metal oxide.
  • the bandgap of the third metal oxide can be made larger than the bandgap of the second metal oxide.
  • the description regarding the first metal oxide can be referred to.
  • the content of element M in the third metal oxide may be the same or approximately the same as the content of element M in the first metal oxide, or may be different.
  • the second metal oxide can be an In-Zn oxide
  • the first metal oxide and the third metal oxide can be In-M-Zn oxides.
  • the second metal oxide can be an In-Zn oxide
  • the first metal oxide and the third metal oxide can be In-M-Zn oxides.
  • the ratio of the content of element M to indium in the first metal oxide is preferably higher than the ratio of the content of element M to indium in the second metal oxide. Thereby, the bandgap of the first metal oxide can be made larger than the bandgap of the second metal oxide.
  • the ratio of the content of element M to indium in the third metal oxide is preferably higher than the ratio of the content of element M to indium in the second metal oxide. Thereby, the bandgap of the third metal oxide can be made larger than the bandgap of the second metal oxide.
  • the content of element M in the first metal oxide is preferably at least the content of indium (that is, the ratio of the content of element M to the content of indium is 1 or more).
  • the content of element M in the second metal oxide is preferably less than the content of indium (that is, the ratio of the content of element M to the indium content is less than 1).
  • the content of the element M in the third metal oxide is preferably at least the indium content (that is, the ratio of the element M content to the indium content is 1 or more).
  • the indium content in the second metal oxide is preferably higher than the indium content in the first metal oxide. Further, the indium content in the second metal oxide is preferably higher than the indium content in the third metal oxide. Thereby, a transistor with a large on-state current can be obtained.
  • EDX energy dispersive X-ray spectroscopy
  • XPS X-ray photoelectron Spectroscopy
  • ICP-MS Inductively Coupled Plasma-Mass Spectrometry
  • ICP-AES Inductively Coupled Plasma-Atomic Emission Spectrometry
  • analysis may be performed by combining two or more of these methods. Note that for elements with low content rates, the actual content rate and the content rate obtained by analysis may differ due to the influence of analysis accuracy. For example, when the content rate of element M is low, the content rate of element M obtained by analysis may be lower than the actual content rate, may be difficult to quantify, or may not be detected.
  • EDX is used to analyze the compositions of the first metal oxide, second metal oxide, and third metal oxide.
  • the ratio (content rate) of the number of indium atoms to the sum of the calculated ratios of the number of atoms of all metal elements, the difference in the content rate of indium can be confirmed.
  • the count number of characteristic X-rays corresponds to the proportion of elements constituting the metal oxide. Therefore, the difference in indium content can be confirmed by the height of the indium peak.
  • the count number of characteristic X-rays originating from indium in the second metal oxide is This is higher than the count number of characteristic X-rays originating from indium in metal oxide No. 1.
  • the peak of a certain element refers to the point where the count number of the element reaches a maximum value in the spectrum where the horizontal axis shows the energy of the characteristic X-ray and the vertical axis shows the count number of the characteristic X-ray.
  • the difference in content may be confirmed using the count number at the energy of characteristic X-rays unique to the element. For example, for indium, the count number at 3.287 keV (In-L ⁇ ) can be used.
  • the content rate of indium has been explained here as an example, the same applies to the content rate of other elements.
  • the count number at 9.243 keV can be used for gallium
  • the count number at 9.243 keV can be used for zinc
  • Counts at .632 keV can be used.
  • a sputtering method or an atomic layer deposition (ALD) method can be suitably used to form the metal oxide.
  • the composition of the formed metal oxide may be different from the composition of the sputtering target.
  • the content of zinc in the metal oxide after formation may be reduced to about 50% compared to the sputtering target.
  • each of the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c uses a metal oxide having crystallinity.
  • a metal oxide having crystallinity examples include a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, and a microcrystalline (NC: nano-crystal) structure.
  • the density of defect levels in the semiconductor layer can be reduced.
  • a metal oxide with low crystallinity a transistor that can flow a large current can be realized.
  • the crystallinity of the second metal oxide included in the semiconductor layer 108b formed thereon can be increased.
  • the crystallinity of the third metal oxide included in the semiconductor layer 108c formed thereon can be increased.
  • the substrate temperature during formation can be adjusted, for example, by adjusting the temperature of the stage on which the substrate is placed during formation.
  • oxygen flow rate ratio the ratio of the flow rate of oxygen gas to the entire film-forming gas used for formation
  • oxygen partial pressure in the processing chamber the more crystalline the metal oxide can be formed.
  • the composition of the first metal oxide used for the semiconductor layer 108a, the composition of the second metal oxide used for the semiconductor layer 108b, and the composition of the third metal oxide used for the semiconductor layer 108c are the same or approximately the same. It may be. By making the composition the same, for example, the same sputtering target can be used to form the layers, thereby reducing manufacturing costs.
  • the height of crystallinity of the semiconductor layer 108b is preferably different from the height of crystallinity of the semiconductor layer 108a.
  • the height of crystallinity of the semiconductor layer 108b is preferably different from the height of crystallinity of the semiconductor layer 108c.
  • the crystallinity of the semiconductor layer 108b is preferably lower than the crystallinity of the semiconductor layer 108a.
  • the crystallinity of the semiconductor layer 108b is preferably lower than the crystallinity of the semiconductor layer 108c.
  • the conductivity of the semiconductor layer 108b becomes high, and a transistor with a large on-state current can be obtained.
  • impurities at and near the interface between the insulating layer 110 and the semiconductor layer 108 can be suppressed from diffusing into the semiconductor layer 108.
  • the semiconductor layer 108b can have a microcrystalline (NC) structure
  • the semiconductor layer 108a and the semiconductor layer 108c can each have a CAAC structure.
  • the crystallinity of the semiconductor layer 108b is lower than the crystallinity of the semiconductor layer 108a and the semiconductor layer 108c, one embodiment of the present invention is not limited to this.
  • the semiconductor layer 108b may have a higher crystallinity than the semiconductor layers 108a and 108c.
  • the composition of the first metal oxide may be the same or approximately the same as the composition of the second metal oxide, and the composition of the third metal oxide may be different from the composition of the second metal oxide.
  • the height of crystallinity of the semiconductor layer 108a is preferably different from the height of crystallinity of the semiconductor layer 108b.
  • the crystallinity of the semiconductor layer 108a is preferably higher than that of the semiconductor layer 108b.
  • the composition of the third metal oxide may be the same or approximately the same as the composition of the second metal oxide, and the composition of the first metal oxide may be different from the composition of the second metal oxide. can.
  • the height of crystallinity of the semiconductor layer 108c is preferably different from the height of crystallinity of the semiconductor layer 108b. Specifically, the crystallinity of the semiconductor layer 108c is preferably higher than that of the semiconductor layer 108b.
  • the crystallinity of the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c can be determined by, for example, X-ray diffraction (XRD), transmission electron microscope (TEM), or electron diffraction (ED). Diffraction ) can be analyzed. Alternatively, analysis may be performed by combining two or more of these methods.
  • XRD X-ray diffraction
  • TEM transmission electron microscope
  • ED electron diffraction
  • the boundary (interface) between the semiconductor layer 108a and the semiconductor layer 108b may not be clearly confirmed.
  • the boundary (interface) between the semiconductor layer 108b and the semiconductor layer 108c may not be clearly visible.
  • FIG. 3 shows an enlarged view of the side surface of the insulating layer 110 and its vicinity.
  • the thickness T108a of the semiconductor layer 108a, the thickness T108b of the semiconductor layer 108b, and the thickness T108c of the semiconductor layer 108c are each indicated by solid double-headed arrows.
  • the shortest distance between the insulating layer 110 and the insulating layer 106 in a cross-sectional view is defined as the thickness of the semiconductor layer 108.
  • the film thickness of each layer of the semiconductor layer 108 is shown at the midpoint between the height of the upper surface and the height of the lower surface of the insulating layer 110.
  • the thickness T108b of the semiconductor layer 108b is preferably 1.0 nm or more and 100 nm or less, more preferably 1.0 nm or more and 50 nm or less, further preferably 3.0 nm or more and 50 nm or less, and even more preferably 3.0 nm or more and 40 nm or less. , more preferably 3.0 nm or more and 30 nm or less, further preferably 3.0 nm or more and 20 nm or less, further preferably 3.0 nm or more and 15 nm or less, further preferably 3.0 nm or more and 10 nm or less, and even more preferably 5.0 nm.
  • the thickness is preferably 10 nm or less.
  • the film thickness T108a of the semiconductor layer 108a When the film thickness T108a of the semiconductor layer 108a is small, the distance between the interface between the insulating layer 110 and the semiconductor layer 108 and the trap level near the interface and the semiconductor layer 108b, which is the main current path, becomes short, and the on-current becomes small. There are cases where this happens. Moreover, reliability may deteriorate. On the other hand, if the film thickness T108a of the semiconductor layer 108a is large, the distance between the semiconductor layer 108b and the conductive layer 112a and 112b functioning as a source electrode and a drain electrode becomes long, and the on-current may become small. .
  • the thickness T108a of the semiconductor layer 108a is preferably 0.1 nm or more and 10 nm or less, more preferably 0.3 nm or more and 10 nm or less, further preferably 0.3 nm or more and 5.0 nm or less, and even more preferably 0.5 nm or more and 5.0 nm or less. It is preferably 0 nm or less, more preferably 0.5 nm or more and 3.0 nm or less, further preferably 0.7 nm or more and 3.0 nm or less, even more preferably 0.7 nm or more and 2.0 nm or less, and even more preferably 1.0 nm or more. The thickness is preferably 2.0 nm or less.
  • the thickness T108c of the semiconductor layer 108c When the thickness T108c of the semiconductor layer 108c is small, the distance between the interface between the insulating layer 106 and the semiconductor layer 108 and the trap level near the interface and the semiconductor layer 108b, which is the main current path, becomes short, and the on-current becomes small. There are cases where this happens. Furthermore, reliability may deteriorate. On the other hand, if the film thickness T108c of the semiconductor layer 108c is large, the distance between the conductive layer 104 functioning as a gate electrode and the semiconductor layer 108b becomes long, and the on-current may become small.
  • the thickness T108c of the semiconductor layer 108c is preferably 0.5 nm or more and 20 nm or less, more preferably 0.5 nm or more and 15 nm or less, further preferably 1.0 nm or more and 15 nm or less, and even more preferably 1.0 nm or more and 10 nm or less. , more preferably 2.0 nm or more and 10 nm or less, further preferably 2.0 nm or more and 7.0 nm or less, and even more preferably 2.0 nm or more and 5.0 nm or less.
  • V O oxygen vacancies
  • a defect in which hydrogen is present in an oxygen vacancy functions as a donor, and electrons, which are carriers, may be generated.
  • a portion of hydrogen may combine with oxygen that is bonded to a metal atom to generate electrons, which are carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen tends to have normally-on characteristics. Further, since hydrogen in an oxide semiconductor is easily moved by stress such as heat or an electric field, if the oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may deteriorate.
  • the semiconductor layer 108 When an oxide semiconductor is used for the semiconductor layer 108, it is preferable to reduce V OH in the semiconductor layer 108 as much as possible to make the semiconductor layer 108 highly pure or substantially pure. In this way, in order to obtain an oxide semiconductor with sufficiently reduced V O H, impurities such as water and hydrogen in the oxide semiconductor are removed (sometimes referred to as dehydration or dehydrogenation treatment). Therefore, it is important to supply oxygen to the oxide semiconductor to repair oxygen vacancies. By using an oxide semiconductor in which impurities such as V OH are sufficiently reduced for a channel formation region of a transistor, stable electrical characteristics can be provided. Note that supplying oxygen to an oxide semiconductor to repair oxygen vacancies is sometimes referred to as oxygenation treatment. In particular, it is preferable that the semiconductor layer 108b, which is the main current path, has a small amount of V OH .
  • the carrier concentration of the oxide semiconductor in a region functioning as a channel formation region is preferably 1 ⁇ 10 18 cm ⁇ 3 or less, and less than 1 ⁇ 10 17 cm ⁇ 3 . More preferably, it is less than 1 ⁇ 10 16 cm ⁇ 3 , even more preferably less than 1 ⁇ 10 13 cm ⁇ 3 , even more preferably less than 1 ⁇ 10 12 cm ⁇ 3 . Note that there is no limitation on the lower limit of the carrier concentration of the oxide semiconductor in the region that functions as a channel formation region, but it can be set to, for example, 1 ⁇ 10 ⁇ 9 cm ⁇ 3 .
  • the region functioning as a channel formation region preferably has a particularly low carrier concentration, and the carrier concentration is preferably within the above range.
  • a transistor using an oxide semiconductor (hereinafter referred to as an OS transistor) has extremely high field effect mobility compared to a transistor using amorphous silicon. Further, the OS transistor has a significantly small off-state current, and can hold charge accumulated in a capacitor connected in series with the OS transistor for a long period of time. Further, by applying an OS transistor, power consumption of the semiconductor device can be reduced.
  • OS transistors Since OS transistors have small fluctuations in electrical characteristics due to radiation irradiation, that is, have high resistance to radiation, they can be suitably used even in environments where radiation may be incident. It can also be said that OS transistors have high reliability against radiation.
  • an OS transistor can be suitably used in a pixel circuit of an X-ray flat panel detector.
  • OS transistors can be suitably used in semiconductor devices used in outer space. Radiation includes electromagnetic radiation (eg, x-rays, and gamma rays), and particle radiation (eg, alpha, beta, proton, and neutron radiation).
  • Examples of silicon that can be used for the semiconductor layer 108 include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon.
  • Examples of polycrystalline silicon include low temperature polysilicon (LTPS).
  • a transistor using amorphous silicon for the semiconductor layer 108 can be formed on a large glass substrate and can be manufactured at low cost.
  • a transistor using polycrystalline silicon for the semiconductor layer 108 has high field effect mobility and can operate at high speed.
  • a transistor using microcrystalline silicon for the semiconductor layer 108 has higher field effect mobility than a transistor using amorphous silicon, and can operate at high speed.
  • the semiconductor layer 108 may include a layered material that functions as a semiconductor.
  • a layered material is a general term for a group of materials having a layered crystal structure.
  • a layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked via bonds weaker than covalent bonds or ionic bonds, such as van der Waals bonds.
  • a layered material has high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity for the channel formation region, a transistor with high on-current can be provided.
  • Examples of the layered material include graphene, silicene, and chalcogenide.
  • a chalcogenide is a compound containing chalcogen (an element belonging to Group 16).
  • examples of chalcogenides include transition metal chalcogenides, group 13 chalcogenides, and the like.
  • transition metal chalcogenides that can be used as semiconductor layers of transistors include molybdenum sulfide (typically MoS 2 ), molybdenum selenide (typically MoSe 2 ), and molybdenum tellurium (typically MoTe 2 ) .
  • tungsten sulfide typically WS 2
  • tungsten selenide typically WSe 2
  • tungsten tellurium typically WTe 2
  • hafnium sulfide typically HfS 2
  • hafnium selenide typically HfSe 2
  • zirconium sulfide typically ZrS 2
  • zirconium selenide typically ZrSe 2
  • opening 141 and 143 There is no limitation to the top shape of the openings 141 and 143, and each of them may be a polygon such as a circle, an ellipse, a triangle, a quadrilateral (including a rectangle, a rhombus, and a square), a pentagon, or the corners of these polygons are rounded. It can be any shape. Note that the polygon may be either a concave polygon (a polygon in which at least one interior angle is greater than 180 degrees) or a convex polygon (a polygon in which all interior angles are less than or equal to 180 degrees). As shown in FIG.
  • the top surface shapes of the openings 141 and 143 are circular.
  • the upper surface shape of the opening it is possible to improve the processing accuracy when forming the opening, and it is possible to form an opening with a minute size.
  • the term circular is not limited to a perfect circle.
  • the top surface shape of the opening 141 refers to the shape of the top surface end portion of the insulating layer 110 on the opening 141 side.
  • the top surface shape of the opening 143 refers to the shape of the bottom surface end portion of the conductive layer 112b on the opening 143 side.
  • the top surface shape of the opening 141 and the top surface shape of the opening 143 can be made to match or approximately match each other.
  • the lower end of the conductive layer 112b on the opening 143 side coincides with or approximately coincides with the upper end of the insulating layer 110 on the opening 141 side.
  • the lower surface of the conductive layer 112b refers to the surface on the insulating layer 110 side.
  • the upper surface of the insulating layer 110 refers to the surface on the conductive layer 112b side.
  • the top surface shape of the opening 141 and the top surface shape of the opening 143 do not have to match each other. Furthermore, when the top surfaces of the openings 141 and 143 are circular, the openings 141 and 143 may or may not be concentric.
  • FIGS. 4A and 4B are enlarged views of FIGS. 1A and 1B.
  • the region in contact with the conductive layer 112a functions as one of the source region and the drain region
  • the region in contact with the conductive layer 112b functions as the other of the source region and the drain region
  • the region between the source region and the drain region functions as a channel forming region.
  • the channel length of the transistor 100 is the distance between the source region and the drain region.
  • the channel length L100 of the transistor 100 is indicated by a dashed double-headed arrow.
  • the channel length L100 can be said to be the shortest distance between a region of the semiconductor layer 108 in contact with the conductive layer 112a and a region in contact with the conductive layer 112b in a cross-sectional view.
  • the channel length L100 of the transistor 100 corresponds to the length of the side surface of the insulating layer 110 on the opening 141 side in a cross-sectional view.
  • the channel length L100 is the thickness T110 of the insulating layer 110, and the angle ⁇ 110 between the side surface of the insulating layer 110 on the opening 141 side and the surface on which the insulating layer 110 is formed (here, the top surface of the conductive layer 112a). It is determined by Therefore, for example, the channel length L100 can be set to a value smaller than the limit resolution of the exposure apparatus, and a fine-sized transistor can be realized.
  • Channel length L100 is, for example, 5 nm or more, 7 nm or more, or 10 nm or more, and less than 3 ⁇ m, 2.5 ⁇ m or less, 2 ⁇ m or less, 1.5 ⁇ m or less, 1.2 ⁇ m or less, 1 ⁇ m or less, 500 nm or less, 300 nm or less, It can be 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less.
  • the channel length L100 can be set to 100 nm or more and 1 ⁇ m or less.
  • the on-current of the transistor 100 can be increased.
  • the transistor 100 By using the transistor 100, a circuit that can operate at high speed can be manufactured. Furthermore, it becomes possible to reduce the area occupied by the circuit. Therefore, the semiconductor device can be made small. For example, when the semiconductor device of one embodiment of the present invention is applied to a large-sized display device or a high-definition display device, even if the number of wires increases, signal delay in each wire can be reduced, and display unevenness can be reduced. can be suppressed. Furthermore, since the area occupied by the circuit can be reduced, the frame of the display device can be made narrower.
  • the channel length L100 can be controlled. Note that in FIG. 4B, the film thickness T110 of the insulating layer 110 is indicated by a double-dotted chain arrow.
  • the thickness T110 of the insulating layer 110 is, for example, 5 nm or more, 7 nm or more, or 10 nm or more, and less than 3 ⁇ m, 2.5 ⁇ m or less, 2 ⁇ m or less, 1.5 ⁇ m or less, 1.2 ⁇ m or less, 1 ⁇ m or less, or 500 nm or less. , 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less.
  • the side surface of the insulating layer 110 on the opening 141 side has a tapered shape.
  • the angle ⁇ 110 between the side surface of the insulating layer 110 on the opening 141 side and the surface on which the insulating layer 110 is formed is preferably less than 90 degrees.
  • the coverage of the layer formed on the insulating layer 110 (for example, the semiconductor layer 108) can be improved.
  • the angle ⁇ 110 is, for example, 30 degrees or more, 35 degrees or more, 40 degrees or more, 45 degrees or more, 50 degrees or more, 55 degrees or more, 60 degrees or more, 65 degrees or more, or 70 degrees or more, but less than 90 degrees, It can be 85 degrees or less, or 80 degrees or less.
  • the angle ⁇ 110 may be 75 degrees or less, 70 degrees or less, 65 degrees or less, or 60 degrees or less.
  • FIG. 1B and the like show a configuration in which the shape of the side surface of the insulating layer 110 on the opening 141 side is a straight line in cross-sectional view
  • one embodiment of the present invention is not limited to this.
  • the side surface of the insulating layer 110 on the opening 141 side may have a curved shape, or may have both a straight region and a curved region.
  • the side surface of the conductive layer 112b on the opening 143 side may have a curved shape, or may have both a straight region and a curved region.
  • the width D143 of the opening 143 is indicated by a double-dashed double arrow.
  • FIG. 4A shows an example in which the top surfaces of the openings 141 and 143 are circular.
  • the width D143 corresponds to the diameter of the circle
  • the channel width W100 of the transistor 100 corresponds to the circumference of the circle. That is, the channel width W100 is ⁇ D143.
  • the top surfaces of the openings 141 and 143 are circular, a transistor with a smaller channel width W100 can be realized compared to other shapes.
  • the diameter of the opening 141 and the diameter of the opening 143 may be different from each other. Further, the inner diameter of the opening 141 and the inner diameter of the opening 143 may each change in the depth direction.
  • the diameter of the opening for example, three average values of the diameter at the highest position, the diameter at the lowest position, and the diameter at the intermediate point of these insulating layer 110 (or insulating layer 110b) in cross-sectional view can be used. can.
  • the diameter of the opening for example, the diameter at the highest position of the insulating layer 110 (or the insulating layer 110b) in a cross-sectional view, the diameter at the lowest position, or the diameter at the intermediate point thereof. May be used.
  • the width D143 of the opening 143 is equal to or larger than the limit resolution of the exposure device.
  • the width D143 is, for example, 200 nm or more, 300 nm or more, 400 nm or more, or 500 nm or more, and less than 5.0 ⁇ m, 4.5 ⁇ m or less, 4.0 ⁇ m or less, 3.5 ⁇ m or less, 3.0 ⁇ m or less, 2. It can be 5 ⁇ m or less, 2.0 ⁇ m or less, 1.5 ⁇ m or less, or 1.0 ⁇ m or less.
  • the insulating layer 110 may have a single layer structure or a laminated structure of two or more layers.
  • the insulating layer 110 preferably includes one or more inorganic insulating films.
  • the inorganic insulating film include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film.
  • oxide insulating films include silicon oxide film, aluminum oxide film, magnesium oxide film, gallium oxide film, germanium oxide film, yttrium oxide film, zirconium oxide film, lanthanum oxide film, neodymium oxide film, hafnium oxide film, and tantalum oxide film.
  • nitride insulating film examples include a silicon nitride film and an aluminum nitride film.
  • the oxynitride insulating film examples include a silicon oxynitride film, an aluminum oxynitride film, a gallium oxynitride film, a yttrium oxynitride film, and a hafnium oxynitride film.
  • the nitride oxide insulating film include a silicon nitride oxide film and an aluminum nitride oxide film.
  • oxynitride refers to a material whose composition contains more oxygen than nitrogen.
  • a nitrided oxide refers to a material whose composition contains more nitrogen than oxygen.
  • the insulating layer 110 has a region in contact with the semiconductor layer 108.
  • oxide or oxynitride is used for at least part of the region of the insulating layer 110 that is in contact with the semiconductor layer 108. It is preferable. Specifically, oxide or oxynitride is preferably used in a region of the insulating layer 110 that is in contact with the channel formation region of the semiconductor layer 108.
  • oxide insulating film and oxynitride insulating film for the insulating layer 110b in contact with the channel formation region of the semiconductor layer 108.
  • silicon oxide film and a silicon oxynitride film for the insulating layer 110b.
  • the insulating layer 110b releases oxygen due to heat applied during the manufacturing process of the transistor 100, so that oxygen can be supplied to the semiconductor layer 108.
  • oxygen can be supplied to the insulating layer 110b by performing heat treatment in an atmosphere containing oxygen or plasma treatment in an atmosphere containing oxygen.
  • oxygen may be supplied by forming an oxide film on the upper surface of the insulating layer 110b in an atmosphere containing oxygen by a sputtering method. After that, the oxide film may be removed. Note that in Embodiment 2, which will be described later, an example will be shown in which oxygen is supplied to the insulating layer 110b by forming a metal oxide layer.
  • oxygen released from the insulating layer 110b reaches the semiconductor layer 108b via the semiconductor layer 108a.
  • the film thickness T108a of the semiconductor layer 108a is large, the amount of oxygen supplied to the semiconductor layer 108b, which is the main current path, may decrease, resulting in increased oxygen vacancies in the semiconductor layer 108b. It is preferable that the thickness T108a of the semiconductor layer 108a falls within the above range. Further, the thickness T108a of the semiconductor layer 108a is preferably thinner than the thickness T108b of the semiconductor layer 108b and thinner than the thickness T108c of the semiconductor layer 108c. This increases the amount of oxygen supplied to the semiconductor layer 108b, making it possible to reduce oxygen vacancies in the semiconductor layer 108b.
  • the thickness T108a of the semiconductor layer 108a is preferably thinner than the thickness T108b of the semiconductor layer 108b.
  • the thickness T108a of the semiconductor layer 108a may be the same as the thickness T108c of the semiconductor layer 108c, or may be thicker than the thickness T108c.
  • the insulating layer 110b is preferably formed by a film forming method such as a sputtering method or a plasma enhanced chemical vapor deposition (PECVD) method.
  • a film forming method such as a sputtering method or a plasma enhanced chemical vapor deposition (PECVD) method.
  • PECVD plasma enhanced chemical vapor deposition
  • the thickness of the insulating layer 110b can be determined within the range of the thickness T110 of the insulating layer 110 described above.
  • oxygen contained in the insulating layer 110b can be confined by sandwiching the insulating layer 110b above and below between the insulating layer 110a and the insulating layer 110c, in which oxygen is difficult to diffuse. Thereby, oxygen can be effectively supplied to the semiconductor layer 108.
  • the insulating layer 110a and the insulating layer 110c it is preferable to use one or more of the above-mentioned oxide insulating film, nitride insulating film, oxynitride insulating film, and nitride oxide insulating film; It is preferable to use one or more of a silicon film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, an aluminum nitride film, a hafnium oxide film, and a hafnium aluminate film.
  • the silicon nitride film and the silicon nitride oxide film each have the characteristics of releasing little impurity (for example, water and hydrogen) from themselves and being difficult for oxygen and hydrogen to permeate. It can be suitably used as 110c.
  • Oxygen contained in the insulating layer 110b may oxidize the conductive layer 112a and the conductive layer 112b, resulting in increased electrical resistance.
  • Oxygen contained in the insulating layer 110b may oxidize the conductive layer 112a and the conductive layer 112b, resulting in increased electrical resistance.
  • Oxygen contained in the insulating layer 110b may oxidize the conductive layer 112a and the conductive layer 112b, resulting in increased electrical resistance.
  • Oxygen contained in the insulating layer 110a By providing the insulating layer 110a between the insulating layer 110b and the conductive layer 112a, oxidation of the conductive layer 112a and increase in electrical resistance can be suppressed.
  • the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 increases, and oxygen vacancies in the semiconductor layer 108 can be reduced.
  • the thickness of the insulating layer 110a and the insulating layer 110c is preferably 5 nm or more and 100 nm or less, more preferably 5 nm or more and 70 nm or less, further preferably 10 nm or more and 70 nm or less, further preferably 10 nm or more and 50 nm or less, and even more preferably 20 nm or more.
  • the thickness is preferably 50 nm or more, and more preferably 20 nm or more and 40 nm or less.
  • a silicon nitride film for the insulating layer 110a and the insulating layer 110c it is preferable to use a silicon oxynitride film for the insulating layer 110b.
  • One or both of the region in contact with the insulating layer 110a and the region in contact with the insulating layer 110c in the semiconductor layer 108 may have a higher carrier concentration and lower resistance than the channel formation region.
  • a region in contact with the insulating layer 110a and a region in contact with the insulating layer 110c in the semiconductor layer 108 may function as a source region or a drain region, respectively.
  • the effective channel length of transistor 100 may be shorter than the aforementioned channel length L100.
  • the electrical resistance of the region of the semiconductor layer 108 in contact with the insulating layer 110a may be lowered.
  • This region can function as a buffer region for relaxing the drain electric field. Note that this region may function as a source region or a drain region. The same applies to the insulating layer 110c.
  • FIG. 5 shows a configuration in which a region of the semiconductor layer 108 in contact with the insulating layer 110b functions as a channel formation region.
  • the channel length L100 of the transistor 100 is determined by the thickness T110b of the insulating layer 110b in contact with the channel formation region, the side surface of the insulating layer 110b on the opening 141 side, and the formation surface (here, the top surface of the insulating layer 110a) in a cross-sectional view. It is determined by the angle ⁇ 110b formed by the angle ⁇ 110b.
  • the film thickness T110b is preferably within the range of the above-mentioned film thickness T110.
  • the angle ⁇ 110b is preferably within the range of the angle ⁇ 110 described above.
  • hydrogen may also diffuse into a region of the semiconductor layer 108 that is in contact with the insulating layer 110b from one or more of the insulating layer 110a and the insulating layer 110c.
  • oxygen vacancies V O
  • V OH oxygen vacancies
  • at least the region of the semiconductor layer 108 in contact with the insulating layer 110b can function as a channel formation region, and a transistor with good electrical characteristics and high reliability can be obtained.
  • the thicknesses of the insulating layer 110a and the insulating layer 110c are thin.
  • the thickness of the insulating layer 110a and the insulating layer 110c is preferably 1.0 nm or more and 50 nm or less, more preferably 3.0 nm or more and 50 nm or less, and even more preferably 3.0 nm.
  • 40 nm or less is preferable, more preferably 3.0 nm or more and 30 nm or less, further preferably 3.0 nm or more and 20 nm or less, even more preferably 3.0 nm or more and 15 nm or less, and even more preferably 3.0 nm or more and 10 nm or less. Furthermore, it is preferably 5.0 nm or more and 10 nm or less. As a result, the amount of hydrogen that diffuses into the region of the semiconductor layer 108 in contact with the insulating layer 110b can be reduced, and even when the channel length L100 is short, the transistor exhibits good electrical characteristics and is highly reliable. Can be done.
  • the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 may each have a single layer structure or a laminated structure of two or more layers.
  • Examples of materials that can be used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 include chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, Examples include alloys containing one or more of molybdenum and niobium, and one or more of the metals listed above.
  • a low-resistance conductive material containing one or more of copper, silver, gold, and aluminum can be suitably used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104, respectively.
  • copper or aluminum is preferable because it is excellent in mass productivity.
  • a metal oxide (also referred to as an oxide conductor) having conductivity can be used for each of the conductive layer 112a, the conductive layer 112b, and the conductive layer 104.
  • oxide conductors include indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide, In-W oxide, In-W-Zn oxide, In -Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (ITO containing silicon, also referred to as ITSO), zinc oxide added with gallium, and In-Ga-Zn oxide.
  • ITO In-Sn oxide
  • ITO In-Zn oxide
  • ITO In-Ti oxide
  • ITO containing silicon also referred to as ITSO
  • zinc oxide added with gallium and In-Ga-Zn oxide.
  • an oxide conductor containing indium is preferable because it has high conductivity.
  • an oxide conductor When oxygen vacancies are formed in a metal oxide having semiconductor properties and hydrogen is added to the oxygen vacancies, a donor level is formed near the conduction band. As a result, the metal oxide becomes highly conductive and becomes a conductor. A metal oxide that has been made into a conductor can be called an oxide conductor.
  • the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 may each have a laminated structure of a conductive film containing the aforementioned oxide conductor (metal oxide) and a conductive film containing a metal or an alloy. By using a conductive film containing a metal or an alloy, wiring resistance can be lowered.
  • a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied to the conductive layer 112a, the conductive layer 112b, and the conductive layer 104, respectively.
  • X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti
  • the same material may be used for all of the conductive layer 112a, the conductive layer 112b, and the conductive layer 104, or a different material may be used for at least one of them.
  • the conductive layer 112a and the conductive layer 112b each have a region in contact with the semiconductor layer 108.
  • an oxide semiconductor for example, aluminum
  • an insulating layer may be formed between the conductive layer 112a or 112b and the semiconductor layer 108. Oxides (eg, aluminum oxide) may form and prevent these conductions. Therefore, it is preferable to use a conductive material that is difficult to oxidize, a conductive material that maintains low electrical resistance even when oxidized, or an oxide conductor for the conductive layers 112a and 112b.
  • the conductive layer 112a and the conductive layer 112b include, for example, titanium, tantalum nitride, titanium nitride, nitride containing titanium and aluminum, nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, strontium and ruthenium. It is preferable to use an oxide containing lanthanum and nickel. These are preferable because they are conductive materials that are difficult to oxidize, or materials that maintain low electrical resistance even when oxidized. Note that when the conductive layer 112a or the conductive layer 112b has a stacked-layer structure, a conductive material that is not easily oxidized is preferably used for at least a layer in contact with the semiconductor layer 108.
  • the aforementioned oxide conductor can be used for the conductive layer 112a and the conductive layer 112b, respectively. Specifically, it includes indium oxide, zinc oxide, ITO, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, and silicon. Oxide conductors such as In-Sn oxide and zinc oxide added with gallium can be used.
  • a nitride conductor may be used for each of the conductive layer 112a and the conductive layer 112b.
  • Examples of nitride conductors include tantalum nitride and titanium nitride.
  • the insulating layer 106 may have a single layer structure or a laminated structure of two or more layers.
  • the insulating layer 106 preferably includes one or more inorganic insulating films.
  • the inorganic insulating film include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film.
  • a material that can be used for the insulating layer 110 can be used.
  • the insulating layer 106 has a region in contact with the semiconductor layer 108.
  • an oxide semiconductor is used for the semiconductor layer 108
  • the insulating layer 106 has a single layer structure, it is preferable to use a silicon oxide film or a silicon oxynitride film for the insulating layer 106.
  • the insulating layer 106 can have a laminated structure of an oxide insulating film or oxynitride insulating film on the side in contact with the semiconductor layer 108 and a nitride insulating film or nitride oxide insulating film on the side in contact with the conductive layer 104.
  • a silicon oxide film or a silicon oxynitride film is preferably used as the oxide insulating film or the oxynitride insulating film. It is preferable to use a silicon nitride film or a silicon nitride oxide film as the nitride insulating film or the nitride oxide insulating film.
  • a silicon nitride film and a silicon nitride oxide film can be suitably used as the insulating layer 106 because they release little impurity (for example, water and hydrogen) from themselves and have the characteristics that oxygen and hydrogen hardly permeate through them. Since diffusion of impurities from the insulating layer 106 to the semiconductor layer 108 is suppressed, the electrical characteristics of the transistor can be improved and reliability can be improved.
  • impurity for example, water and hydrogen
  • High-k materials that can be used for the insulating layer 106 include, for example, gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, Examples include oxynitrides with silicon and hafnium, and nitrides with silicon and hafnium.
  • Substrate 102 There are no major restrictions on the material of the substrate 102, but it must have at least enough heat resistance to withstand subsequent heat treatment.
  • a single crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate, It may also be used as the substrate 102.
  • the substrate 102 may be provided with a semiconductor element. Note that the shapes of the semiconductor substrate and the insulating substrate may be circular or square.
  • a flexible substrate may be used as the substrate 102, and the transistor 100 and the like may be formed directly on the flexible substrate.
  • a peeling layer may be provided between the substrate 102 and the transistor 100 or the like. By providing a peeling layer, after partially or completely completing a semiconductor device thereon, it can be separated from the substrate 102 and transferred to another substrate. In this case, the transistor 100 and the like can be transferred to a substrate with poor heat resistance or a flexible substrate.
  • the semiconductor layer 108a may have a stacked structure.
  • the semiconductor layer 108b and the semiconductor layer 108c illustrate an example in which the semiconductor layer 108 has a three-layer structure of the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c
  • FIG. 1B and the like illustrate an example in which the semiconductor layer 108 has a three-layer structure of the semiconductor layer 108a, the semiconductor layer 108b, and the semiconductor layer 108c
  • a structure that does not include one or both of the semiconductor layer 108a and the semiconductor layer 108c may be used.
  • the semiconductor layer 108 can have a two-layer structure of a semiconductor layer 108a and a semiconductor layer 108b.
  • the semiconductor layer 108 can have a two-layer structure of a semiconductor layer 108b and a semiconductor layer 108c.
  • FIGS. 7A and 7B are cross-sectional views of a transistor 100A that can be applied to a semiconductor device that is one embodiment of the present invention.
  • a top view of the transistor 100A see FIG. 1A.
  • 7A is a sectional view taken along the dashed-dotted line A1-A2 shown in FIG. 1A
  • FIG. 7B is a sectional view taken along the dashed-dotted line B1-B2 shown in FIG. 1A.
  • the transistor 100A differs from the transistor 100 shown in FIG. 1B etc. mainly in that the insulating layer 110a has a stacked structure and the insulating layer 110c has a stacked structure.
  • the insulating layer 110a includes an insulating layer 110a_1 and an insulating layer 110a_2 over the insulating layer 110a_1.
  • the insulating layer 110a_1 and the insulating layer 110a_2 can each use a material that can be used for the insulating layer 110a.
  • a silicon nitride film or a silicon nitride oxide film can be suitably used for the insulating layer 110a_1 and the insulating layer 110a_2, respectively.
  • the insulating layer 110c includes an insulating layer 110c_1 and an insulating layer 110c_2 on the insulating layer 110c_1.
  • the insulating layer 110c_1 and the insulating layer 110c_2 can each use a material that can be used for the insulating layer 110c.
  • a silicon nitride film or a silicon nitride oxide film can be suitably used for the insulating layer 110c_1 and the insulating layer 110c_2, respectively.
  • the region of the semiconductor layer 108 in contact with the insulating layer 110a_1 can be made into a low resistance region.
  • the semiconductor layer 108 can have a low resistance region between a region in contact with the conductive layer 112a (one of a source region and a drain region) and a channel formation region.
  • a region of the semiconductor layer 108 in contact with the insulating layer 110c_2 can be a low-resistance region.
  • the semiconductor layer 108 can have a low resistance region between a region in contact with the conductive layer 112b (the other of the source region and the drain region) and a channel formation region.
  • the low resistance region can function as a buffer region to relax the drain electric field. Note that these low resistance regions may function as a source region or a drain region.
  • a high electric field is less likely to be generated near the drain region, suppressing the generation of hot carriers and suppressing deterioration of the transistor.
  • the conductive layer 112a functions as a drain electrode and the conductive layer 112b functions as a source electrode
  • a high electric field is generated near the drain region by making the region of the semiconductor layer 108 in contact with the insulating layer 110a_1 a low resistance region. This makes it possible to suppress the generation of hot carriers and suppress deterioration of the transistor.
  • the conductive layer 112a functions as a source electrode and the conductive layer 112b functions as a drain electrode, by making the region of the semiconductor layer 108 in contact with the insulating layer 110c_2 a low resistance region, a high electric field is unlikely to be generated near the drain region. , generation of hot carriers can be suppressed, and deterioration of the transistor can be suppressed.
  • the shortest distance from the source region to the gate electrode of the semiconductor layer 108 and the shortest distance from the drain region to the gate electrode are made more uniform. be able to. Thereby, the electric field of the gate electrode applied to the channel formation region can be made more uniform.
  • the insulating layer 110a_2 releases little impurity from itself and is difficult for impurities to pass through.
  • hydrogen can be suppressed from diffusing impurities into the channel formation region of the semiconductor layer 108 and its vicinity through the insulating layer 110a_2 and the insulating layer 110b, resulting in a transistor with good electrical characteristics and high reliability. can do.
  • the insulating layer 110a_1 has a region containing more hydrogen than the insulating layer 110a_2.
  • SIMS secondary ion mass spectrometry
  • the amount of hydrogen released can be adjusted by changing the film formation conditions for the insulating layer 110a_1 and the insulating layer 110a_2. Specifically, for the insulating layer 110a_1 and the insulating layer 110a_2, the deposition power (deposition power density), deposition pressure, deposition gas type, deposition gas flow rate ratio, deposition temperature, and substrate and electrode during formation are determined. Any one or more of the distances between the two may be made different from each other. For example, by making the film-forming power density of the insulating layer 110a_1 lower than the film-forming power density of the insulating layer 110a_2, the hydrogen content in the insulating layer 110a_1 can be made higher than the hydrogen content in the insulating layer 110a_2. can do. Thereby, the amount of hydrogen released from the insulating layer 110a_1 due to the heat applied to the insulating layer 110a_1 can be increased.
  • the film forming gas used to form the insulating layer 110a_1 preferably has a higher hydrogen content than the film forming gas used to form the insulating layer 110a_2.
  • the flow rate of ammonia gas with respect to the entire deposition gas used for forming the insulating layer 110a_1 is The ratio (hereinafter also referred to as ammonia flow rate ratio) is preferably higher than the ammonia flow rate ratio of the film forming gas used to form the insulating layer 110a_2.
  • the hydrogen content in the insulating layer 110a_1 can be increased. Further, the amount of hydrogen released from the insulating layer 110a_1 due to the heat applied to the insulating layer 110a_1 can be increased.
  • the insulating layer 110a_1 can be formed using ammonia gas, and the insulating layer 110a_2 can also be formed without using ammonia gas (the flow rate of ammonia gas can be said to be zero).
  • the ammonia flow rate ratio of the deposition gas used to form the insulating layer 110a_2 can be said to be zero, and the ammonia flow rate ratio of the deposition gas used to form the insulating layer 110a_1 is the same as the ammonia flow rate ratio of the deposition gas used to form the insulating layer 110a_2. can be said to be higher than the ammonia flow rate ratio of
  • the film density of the insulating layer 110a_2 is preferably higher than that of the insulating layer 110a_1. Thereby, hydrogen contained in the insulating layer 110a_1 can be suppressed from diffusing into the channel formation region of the semiconductor layer 108 and its vicinity through the insulating layer 110a_2 and the insulating layer 110b.
  • the film density can be evaluated using, for example, Rutherford Backscattering Spectrometry (RBS) or X-Ray Reflection (XRR). Differences in film density may be evaluated using a cross-sectional transmission electron microscopy (TEM) image.
  • the insulating layer 110a_2 may appear darker (darker) than the insulating layer 110a_1. Note that even when the same material is applied to the insulating layer 110a_1 and the insulating layer 110a_2, the film density is different, so in a cross-sectional TEM image, the boundary between these can sometimes be observed as a difference in contrast.
  • the insulating layer 110c_1 releases little impurity from itself and is difficult for impurities to pass through. As a result, diffusion of impurities into the channel formation region of the semiconductor layer 108 and its vicinity through the insulating layer 110c_1 and the insulating layer 110b can be suppressed, and a transistor exhibiting good electrical characteristics and high reliability can be obtained. Can be done.
  • the film density of the insulating layer 110c_1 is preferably higher than the film density of the insulating layer 110c_2.
  • the description regarding the insulating layer 110a_2 can be referred to.
  • the insulating layer 110 is shown here as having a five-layer stacked structure, one embodiment of the present invention is not limited to this.
  • the insulating layer 110 may have a laminated structure of two layers, three layers, four layers, six or more layers, or may have a single layer structure.
  • FIGS. 9A and 9B show cross-sectional views of a transistor 100B that can be applied to a semiconductor device that is one embodiment of the present invention.
  • a top view of transistor 100B can be seen in FIG. 1A.
  • 9A is a sectional view taken along the dashed-dotted line A1-A2 shown in FIG. 1A
  • FIG. 9B is a sectional view taken along the dashed-dotted line B1-B2 shown in FIG. 1A.
  • the angle between the side surface of the conductive layer 112b on the opening 143 side and the surface on which the conductive layer 112b is formed (here, the top surface of the insulating layer 110) is the same as the angle between the side surface of the insulating layer 110 on the opening 141 side and the insulating layer 110.
  • the main difference from the transistor 100 shown in FIG. 1B and the like is that the angle formed with the surface on which the conductive layer 112a is formed (in this case, the upper surface of the conductive layer 112a) is different.
  • FIG. 9C An enlarged view of FIG. 9A is shown in FIG. 9C.
  • the angle ⁇ 112b between the side surface of the conductive layer 112b on the opening 143 side and the surface on which the conductive layer 112b is formed (here, the upper surface of the insulating layer 110) is smaller than the angle ⁇ 110.
  • the angle ⁇ 112b is smaller than the angle ⁇ 110.
  • the level difference in the surface of the layer (for example, the semiconductor layer 108) formed on the conductive layer 112b and the insulating layer 110 becomes smaller, and the coverage of the layer can be improved. can. Thereby, it is possible to suppress occurrence of defects such as breakage or gaps in the layer.
  • the angle ⁇ 112b of the conductive layer 112b and the angle ⁇ 110 of the insulating layer 110 can be made different.
  • the angle ⁇ 112b can be made smaller than the angle ⁇ 110.
  • Configuration Example 1-3 Note that the configurations of the insulating layer 110 and the conductive layer 112b shown in Configuration Example 1-3 can also be applied to other configuration examples.
  • FIG. 10A shows a top view of a transistor 100C that can be applied to a semiconductor device that is one embodiment of the present invention.
  • FIG. 10B shows a cross-sectional view taken along the dashed-dotted line A1-A2 shown in FIG. 10A
  • FIG. 10C shows a cross-sectional view taken along the dashed-dotted line B1-B2.
  • the transistor 100C differs from the transistor 100 shown in FIG. 1B etc. mainly in that the top surface shape of the opening 141 and the top surface shape of the opening 143 do not match.
  • the opening 143 includes the opening 141 when viewed from above.
  • the insulating layer 110 preferably has a region protruding from the conductive layer 112b on the opening 141 side.
  • the semiconductor layer 108 has a region in contact with the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.
  • the semiconductor layer 108 has a shape that follows the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.
  • the openings 141 and 143 may or may not be concentric.
  • FIG. 11A shows a top view of a transistor 100D that can be applied to a semiconductor device that is one embodiment of the present invention.
  • FIG. 11B shows a cross-sectional view taken along the dashed-dotted line A1-A2 shown in FIG. 11A
  • FIG. 11C shows a cross-sectional view taken along the dashed-dotted line B1-B2.
  • the transistor 100D mainly differs from the transistor 100 shown in FIG. 1B etc. in that it includes a conductive layer 103 and an insulating layer 107.
  • the transistor 100D includes a conductive layer 103 and an insulating layer 107 between a conductive layer 112a and an insulating layer 110.
  • the insulating layer 107 is located on the conductive layer 112a.
  • the insulating layer 107 is provided to cover the top and side surfaces of the conductive layer 112a.
  • the conductive layer 103 is located on the insulating layer 107.
  • the conductive layer 112a and the conductive layer 103 are electrically insulated from each other by the insulating layer 107.
  • An opening 148 reaching the insulating layer 107 is provided in the conductive layer 103 in a region overlapping with the conductive layer 112a.
  • the insulating layer 110 is provided on the insulating layer 107 and the conductive layer 103.
  • the insulating layer 110 is provided to cover the top and side surfaces of the conductive layer 103 and the top surface of the insulating layer 107.
  • An opening 141 reaching the conductive layer 112a is provided in the insulating layer 110 and the insulating layer 107.
  • the insulating layer 110a is located on the insulating layer 107 and the conductive layer 103.
  • the insulating layer 110a is provided to cover the top and side surfaces of the conductive layer 103. Further, the insulating layer 110a is provided so as to partially cover the opening 148. The insulating layer 110a is in contact with the insulating layer 107 through the opening 148.
  • the top surface shape of the opening 148 is not particularly limited.
  • the top surface shape of the opening 148 can be a shape that can be applied to the opening 141 and the opening 143.
  • each of the openings 141, 143, and 148 preferably has a circular top surface shape.
  • the upper surface shape of the opening 148 refers to the shape of the upper surface end portion or the lower surface end portion of the conductive layer 103 on the opening 148 side.
  • the openings 141 and 148 When the top surfaces of the openings 141 and 148 are circular, it is preferable that the openings 141 and 148 have concentric circles. Thereby, the shortest distance between the semiconductor layer 108 and the conductive layer 103 in a cross-sectional view can be made equal on the left and right sides of the opening 141. Further, the opening 141 and the opening 148 may not be concentric.
  • the semiconductor layer 108 has a layer that overlaps with the conductive layer 104 via the insulating layer 106 and overlaps with the conductive layer 103 via a portion of the insulating layer 110 (particularly the insulating layer 110a and the insulating layer 110b). A region exists.
  • the semiconductor layer 108 includes a region sandwiched between the conductive layer 104 via the insulating layer 106 and the conductive layer 103 via a part of the insulating layer 110 (in particular, the insulating layer 110a and the insulating layer 110b). exists.
  • the conductive layer 103 functions as a back gate electrode (also referred to as a second gate electrode) of the transistor 100D. Further, a part of the insulating layer 110 functions as a back gate insulating layer (which can also be called a second gate insulating layer) of the transistor 100D.
  • a material that can be used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104 can be used. Note that the conductive layer 103 does not need to be provided.
  • the potential on the back channel side of the semiconductor layer 108 is fixed, and saturation in the Id-Vd characteristic can be increased.
  • the transistor 100D Since the transistor 100D has a back gate electrode, the potential on the back channel side of the semiconductor layer 108 can be fixed, and a shift in the threshold voltage can be suppressed.
  • the threshold voltage of the transistor shifts, the drain current (hereinafter also referred to as cutoff current) that flows when the gate voltage is 0V may increase.
  • cutoff current the drain current that flows when the gate voltage is 0V may increase.
  • a material that can be used for the insulating layer 110 can be used.
  • the insulating layer 107 in contact with the conductive layer 112a and the conductive layer 103 is preferably an insulating layer containing nitrogen.
  • a material that can be used for the insulating layer 110a and the insulating layer 110c can be suitably used.
  • silicon nitride can be suitably used for the insulating layer 107.
  • the insulating layer 107 has a single-layer structure in this embodiment, one embodiment of the present invention is not limited to this.
  • the insulating layer 107 may have a laminated structure of two or more layers.
  • the conductive layer 103 may be electrically connected to the conductive layer 112a. For example, by providing an opening in a region of the insulating layer 107 that overlaps with the conductive layer 112a and providing the conductive layer 103 so as to cover the opening, a structure can be obtained in which the conductive layer 103 and the conductive layer 112a are in contact with each other. By electrically connecting the conductive layer 112a that functions as a source or drain electrode and the conductive layer 103 that functions as a back gate electrode, the source or drain electrode and the gate electrode can be made to have the same potential. For example, when the conductive layer 112a functions as a source electrode, shift in the threshold voltage of the transistor 100D can be suppressed. Further, reliability of the transistor 100D can be improved. Note that the conductive layer 103 may be formed in contact with the upper surface of the conductive layer 112a without providing the insulating layer 107.
  • the conductive layer 103 may be electrically connected to the conductive layer 112b.
  • the conductive layer 103 may be electrically connected to the conductive layer 112b. For example, by providing an opening in a region of the insulating layer 110 that overlaps with the conductive layer 103 and providing the conductive layer 112b to cover the opening, a structure can be obtained in which the conductive layer 103 and the conductive layer 112b are in contact with each other.
  • the conductive layer 103 may be electrically connected to the conductive layer 104.
  • the conductive layer 104 By electrically connecting the conductive layer 104 that functions as a gate electrode and the conductive layer 103 that functions as a back gate electrode, the back gate electrode and the gate electrode can be made to have the same potential, and the on-current of the transistor 100D is reduced. It can be made larger.
  • the thickness T103 of the conductive layer 103 may be larger than the thickness T110 of the insulating layer 110. Thereby, the potential on the back channel side of the semiconductor layer 108 can be fixed in a wide range between the source region and the drain region in the semiconductor layer 108.
  • the transistor 100D has a region in which the conductive layer 103, the insulating layer 110, the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 overlap in this order in one direction without any other layer in between.
  • the direction includes a direction perpendicular to the channel length direction. By widening this region, the potential on the back channel side of the semiconductor layer 108 can be controlled more reliably.
  • the thickness T103 of the conductive layer 103 can be made larger than the sum of the thickness of the portion of the semiconductor layer 108 that is in contact with the conductive layer 112a inside the opening 141 and the thickness of the insulating layer 106 that is in contact with that portion.
  • Configuration Example 1-5 Note that the configurations of the conductive layer 103 and the insulating layer 107 shown in Configuration Example 1-5 can also be applied to other configuration examples.
  • FIGS. 13A to 13I. 14 to 19 show a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention.
  • the following description mainly uses the transistor 100 as an example of a transistor included in a semiconductor device of one embodiment of the present invention.
  • the semiconductor device of one embodiment of the present invention is not limited to this, and may include one or more of the transistors 100 to 100D described above.
  • a semiconductor device includes at least two transistors, and either the gate, source, or drain of one transistor is electrically connected to the gate, source, or drain of another transistor. It has a configuration that
  • the semiconductor device shown in FIG. 13A includes a transistor 100 and a transistor 200.
  • One of the source and drain of the transistor 200 is electrically connected to the gate of the transistor 100.
  • transistors 100 and 200 are shown as n-channel transistors in FIGS. 13A to 13C, one embodiment of the present invention is not limited thereto.
  • One or both of the transistor 100 and the transistor 200 may be a p-channel type.
  • FIG. 14A A top view of a semiconductor device 10 that is one embodiment of the present invention is shown in FIG. 14A.
  • FIG. 14B shows a cross-sectional view taken along the dashed-dotted line A1-A2 shown in FIG. 14A
  • FIG. 14C shows cross-sectional views taken along the dashed-dotted line B1-B2 and B3-B4.
  • the semiconductor device 10 includes a transistor 100 and a transistor 150.
  • one of the gate, source, and drain of the transistor 100 can be electrically connected to one of the gate, source, and drain of the transistor 150. Note that the electrical connection between the transistor 100 and the transistor 150 is omitted in FIGS. 14A to 14C.
  • the transistor 100 and the transistor 200 are each provided on the substrate 102.
  • the transistor 150 includes a conductive layer 202, an insulating layer 110, an insulating layer 120, a semiconductor layer 208, an insulating layer 106, a conductive layer 204, a conductive layer 212a, and a conductive layer 212b.
  • Each layer configuring the transistor 150 may have a single layer structure or a stacked layer structure.
  • a conductive layer 202 is provided on the substrate 102.
  • the conductive layer 202 functions as a back gate electrode of the transistor 150.
  • the same material as the conductive layer 112a of the transistor 100 can be used.
  • the conductive layer 202 can be formed in the same process as the conductive layer 112a.
  • the conductive layer 112a and the conductive layer 202 can be formed by forming films that will become the conductive layer 112a and the conductive layer 202, and processing the films. Note that the transistor 150 does not need to have a back gate electrode.
  • An insulating layer 110 is provided to cover the conductive layer 202, and an insulating layer 120 is provided on the insulating layer 110.
  • the insulating layer 110 and the insulating layer 120 function as a back gate insulating layer of the transistor 150. Since the insulating layer 120 is a layer in contact with the channel formation region of the semiconductor layer 208, it is preferably an insulating layer containing oxygen.
  • a material suitable for the insulating layer 110b can be used.
  • a semiconductor layer 208 is provided on the insulating layer 120.
  • the semiconductor layer 208 has a region that overlaps with the conductive layer 202 with the insulating layer 110 and the insulating layer 120 interposed therebetween.
  • the same material as the semiconductor layer 108 can be used for the semiconductor layer 208.
  • the semiconductor layer 208 can be formed in the same process as the semiconductor layer 108.
  • FIGS. 14B and 14C show a configuration in which the semiconductor layer 208 has a stacked structure of a semiconductor layer 208a, a semiconductor layer 208b on the semiconductor layer 208a, and a semiconductor layer 208c on the semiconductor layer 208b.
  • the semiconductor layer 108 and the semiconductor layer 208 can be formed by forming films that will become the semiconductor layer 108 and the semiconductor layer 208, and processing the films.
  • the same material as the semiconductor layer 108a can be used for the semiconductor layer 208a.
  • the same material as the semiconductor layer 108b can be used for the semiconductor layer 208b.
  • the same material as the semiconductor layer 108c can be used for the semiconductor layer 208c.
  • the insulating layer 106 is provided to cover the insulating layer 120 and the semiconductor layer 208.
  • the insulating layer 106 functions as a gate insulating layer of the transistor 150. Further, the insulating layer 106 has an opening 147a and an opening 147b that reach the semiconductor layer 208.
  • a conductive layer 204, a conductive layer 212a, and a conductive layer 212b are provided on the insulating layer 106.
  • the same material as the conductive layer 104 can be used for the conductive layer 204, the conductive layer 212a, and the conductive layer 212b.
  • the conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed in the same process as the conductive layer 104.
  • the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b are formed by forming films that will become the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b, and processing the films. be able to.
  • the conductive layer 212a and the conductive layer 212b are provided so as to partially cover the opening 147a and the opening 147b.
  • the conductive layer 212a is electrically connected to the semiconductor layer 208 through the opening 147a.
  • the conductive layer 212b is electrically connected to the semiconductor layer 208 through the opening 147b.
  • the conductive layer 212a functions as one of the source electrode and the drain electrode of the transistor 150, and the conductive layer 212b functions as the other.
  • the conductive layer 204 has a region that overlaps with the semiconductor layer 208 with the insulating layer 106 in between. Conductive layer 204 functions as a gate electrode of transistor 150.
  • the conductive layer 204 may be electrically connected to the conductive layer 202. Accordingly, the same potential can be applied to the conductive layer 204 and the conductive layer 202. By applying the same potential to the conductive layer 204 and the conductive layer 202, the current that can flow when the transistor 200 is in the on state can be increased.
  • the conductive layer 204 can be in contact with the conductive layer 202 through openings 149 provided in the insulating layer 106, the insulating layer 120, and the insulating layer 110.
  • the conductive layer 212a or the conductive layer 212b may be electrically connected to the conductive layer 202. By applying the same potential to the source and back gate, the potential of the back channel is stabilized, and saturation in the Id-Vd characteristics of the transistor can be improved.
  • the conductive layer 212a or the conductive layer 212b can be in contact with the conductive layer 202 through openings provided in the insulating layer 106 and the insulating layer 110.
  • a configuration may be adopted in which the conductive layer 202 is not electrically connected to any of the conductive layer 204, the conductive layer 212a, and the conductive layer 212b.
  • a constant potential can be supplied to the back gate, and a signal for driving the transistor 150 can be supplied to the gate.
  • the threshold voltage when driving the transistor 150 can be controlled by the potential applied to the back gate.
  • the entire region between the source electrode and the drain electrode that overlaps with the gate electrode via the gate insulating layer functions as a channel formation region.
  • the semiconductor layer 208 has a pair of regions 208L sandwiching a channel formation region, and a pair of regions 208D outside the regions 208L.
  • the region 208D can also be referred to as a region with higher carrier concentration than the channel forming region, a region with lower resistance, or an n-type region.
  • a region in contact with the conductive layer 212a and a region 208D adjacent to the region function as one of a source region and a drain region.
  • a region in contact with the conductive layer 212b and a region 208D adjacent to the region function as the other of the source region and the drain region.
  • the region 208L is also referred to as a region with the same or lower electrical resistance, a region with the same or higher carrier concentration, a region with the same or higher oxygen defect density, or a region with the same or higher impurity concentration than the channel forming region. be able to. Furthermore, compared to the region 208D, the region 208L is a region with the same or higher electrical resistance, a region with the same or lower carrier concentration, a region with the same or lower oxygen defect density, and a region with the same or lower impurity concentration. I can say that.
  • the region 208L functions as a buffer region for relaxing the drain electric field. Since the region 208L is a region that does not overlap with the conductive layer 204, a channel is hardly formed even when a gate voltage is applied to the conductive layer 204. It is preferable that the carrier concentration of the region 208L is higher than that of the channel forming region. Thereby, the region 208L can function as an LDD (Lightly Doped Drain) region. By providing the region 208L functioning as an LDD region between the channel formation region and the region 208D, the transistor 150 can have a high drain breakdown voltage.
  • LDD Lightly Doped Drain
  • the region 208L and the region 208D can be formed by adding an impurity element to the semiconductor layer 208 using these conductive layers as a mask.
  • the region 208L is a region of the semiconductor layer 208 that overlaps with the insulating layer 106 but does not overlap with the conductive layer 204.
  • the region 208D is a region of the semiconductor layer 208 that does not overlap with either the insulating layer 106 or the conductive layer 204.
  • some ends of the conductive layer 212a and the conductive layer 212b are located inside the openings 147a and 147b, as shown in FIGS. 14A and 14B.
  • the region in contact with the conductive layer 212a and one of the pair of regions 208D can be made adjacent to each other, and similarly the region in contact with the conductive layer 212b and the other of the pair of regions 208D can be made to be adjacent to each other.
  • the upper surface shapes of the openings 147a and 147b are not particularly limited.
  • the region 208L and the region 208D contain an impurity element.
  • the impurity element one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, magnesium, silicon, and noble gas can be used.
  • noble gases include helium, neon, argon, krypton, and xenon. It is particularly preferable to use one or more of boron, phosphorus, aluminum, magnesium, and silicon as the impurity element.
  • the impurity element may be supplied to the semiconductor layer 108 via the insulating layer 106 using the conductive layer 104 as a mask. As a result, a region having the impurity element is formed in a region of the semiconductor layer 108 that does not overlap with the conductive layer 104.
  • a region of the semiconductor layer 108 in contact with the conductive layer 112b functions as a source region or a drain region. Therefore, a region containing an impurity element is formed in a part of the source region or drain region.
  • the transistor 150 is a so-called top-gate transistor that has a gate electrode above the semiconductor layer 208. For example, by adding an impurity element to the semiconductor layer 208 using the conductive layer 204 functioning as a gate electrode as a mask, a source region and a drain region can be formed in a self-aligned manner.
  • the transistor 150 can be a TGSA (Top Gate Self-Aligned) transistor.
  • the channel length of the transistor 150 can be controlled by the width of the conductive layer 204 in the channel length direction. Therefore, the channel length of the transistor 150 has a value greater than or equal to the resolution limit of the exposure apparatus used for manufacturing the transistor. By increasing the channel length, a transistor with high saturation can be obtained.
  • An insulating layer 195 is provided to cover the transistor 100 and the transistor 150.
  • Insulating layer 195 functions as a protective layer. It is preferable to use a material in which impurities are difficult to diffuse for the insulating layer 195. By providing the insulating layer 195, diffusion of impurities into the transistor from the outside can be effectively suppressed, and the reliability of the semiconductor device can be improved. Examples of impurities include water and hydrogen.
  • the insulating layer 195 includes one or both of an inorganic insulating layer and an organic insulating layer.
  • the insulating layer 195 may have a stacked structure of an inorganic insulating layer and an organic insulating layer.
  • Examples of inorganic insulating films that can be used for the insulating layer 195 include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. Specific examples of these inorganic insulating films are as mentioned in the description of the insulating layer 110. More specifically, one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate can be used for the insulating layer 195. For example, one or more of acrylic resin and polyimide resin can be used as the organic material for the insulating layer 195.
  • the transistor 100 with a short channel length and the transistor 150 with a long channel length can be formed on the same substrate by using some steps in common. For example, by applying the transistor 100 to a transistor that requires a large on-current and applying the transistor 150 to a transistor that requires high saturation characteristics, a high-performance semiconductor device can be obtained.
  • the conductive layer 212a and the conductive layer 212b are formed in the same process as the conductive layer 104 and the conductive layer 204 is shown here, one embodiment of the present invention is not limited to this.
  • the conductive layer 212a and the conductive layer 212b may be formed.
  • openings are provided in the insulating layer 195 and the insulating layer 106, and the conductive layer 212a and the conductive layer 212b are formed to cover the opening.
  • the conductive layer 212a and the conductive layer 212b may be electrically connected to the semiconductor layer 208.
  • FIGS. 15A and 15B Cross-sectional views of a semiconductor device 10A that is one embodiment of the present invention are shown in FIGS. 15A and 15B.
  • FIG. 14A For a top view of the semiconductor device 10A, refer to FIG. 14A.
  • 15A is a sectional view taken along the dashed-dotted line A1-A2 shown in FIG. 14A
  • FIG. 15B is a sectional view taken along the dashed-dotted line B1-B2 shown in FIG. 14A.
  • the semiconductor device 10A includes a transistor 100 and a transistor 150A.
  • the transistor 150A mainly differs from the transistor 150 shown in FIG. 14B and the like in that a conductive layer 202 is provided between the insulating layer 110 and the insulating layer 120.
  • FIG. 15C An enlarged view of FIG. 15A is shown in FIG. 15C.
  • a conductive layer 202 is provided on the insulating layer 110.
  • the same material as the conductive layer 112b can be used for the conductive layer 202.
  • the conductive layer 202 can be formed in the same process as the conductive layer 112b.
  • An insulating layer 120 is provided on the conductive layer 202.
  • the insulating layer 120 is provided so as to cover a portion of the upper surface and side surfaces of the conductive layer 202.
  • part of the insulating layer 120 functions as a back gate insulating layer.
  • the insulating layer 120 has a laminated structure.
  • 15A and the like show an example in which the insulating layer 120 has a laminated structure of an insulating layer 120a and an insulating layer 120b on the insulating layer 120a.
  • the insulating layer 120a provided in contact with the conductive layer 202 is preferably made of a material in which the metal elements contained in the conductive layer 202 are difficult to diffuse. Thereby, the metal element contained in the conductive layer 202 can be suppressed from diffusing into the channel formation region of the semiconductor layer 208 and its vicinity.
  • a material that can be used for the insulating layer 110a and the insulating layer 110c can be suitably used.
  • silicon nitride can be suitably used for the insulating layer 120a.
  • the insulating layer 120b having a region in contact with the channel formation region of the semiconductor layer 208 is preferably an insulating layer containing oxygen.
  • a material suitable for the insulating layer 110b can be used.
  • silicon oxynitride can be suitably used for the insulating layer 120b.
  • transistor 100 the above description can be referred to, so a detailed explanation will be omitted.
  • FIG. 13B A circuit diagram of a semiconductor device 10B, which is one embodiment of the present invention, is shown in FIG. 13B.
  • a top view of the semiconductor device 10B is shown in FIG. 16A.
  • FIG. 16B shows a cross-sectional view of the cut plane taken along dashed-dot line A1-A2 shown in FIG. 16A
  • FIG. 16C shows a cross-sectional view of the cut plane taken along dashed-dotted line B1-B2 and dash-dotted line B3-B4.
  • the semiconductor device 10B includes a transistor 100 and a transistor 200.
  • the other of the source and drain of transistor 200 is electrically connected to the other of the source and drain of transistor 100.
  • the transistor 100 and the transistor 200 are each provided on the substrate 102.
  • the transistor 200 includes a conductive layer 112b, a conductive layer 112c, a semiconductor layer 208, an insulating layer 106, and a conductive layer 204.
  • the transistor 200 can have a similar structure to the transistor 100.
  • the conductive layer 112c functions as one of a source electrode and a drain electrode of the transistor 200.
  • the conductive layer 112b functions as the other of the source electrode and the drain electrode of the transistor 100, and also functions as the other of the source electrode and the drain electrode of the transistor 200.
  • a portion of the insulating layer 106 functions as a gate insulating layer of the transistor 200.
  • the conductive layer 204 functions as a gate electrode of the transistor 200.
  • the same material as the conductive layer 112a can be used for the conductive layer 112c.
  • the conductive layer 112c can be formed in the same process as the conductive layer 112a.
  • the insulating layer 110 has an opening 241 that reaches the conductive layer 112c.
  • the opening 241 can be formed in the same process as the opening 141.
  • the conductive layer 112b has an opening 243 in a region overlapping with the opening 241.
  • the opening 243 can be formed in the same process as the opening 143.
  • the upper surface shapes of the openings 241 and 243 are not limited, they are preferably circular.
  • top surface shape of the opening 241 and the top surface shape of the opening 243 match
  • one embodiment of the present invention is not limited to this.
  • the top surface shape of the opening 241 and the top surface shape of the opening 243 do not have to match.
  • the width of the opening 143 and the width of the opening 243 may be made different. By making the widths of the openings different, two transistors having different channel widths can also be manufactured.
  • a semiconductor layer 208 is provided to cover the openings 241 and 243.
  • the semiconductor layer 208 can be formed in the same process as the semiconductor layer 108.
  • An insulating layer 106 is provided over the semiconductor layer 208, and a conductive layer 204 is provided over the insulating layer 106.
  • the conductive layer 204 can be formed in the same process as the conductive layer 104.
  • FIG. 13C A circuit diagram of a semiconductor device 10C which is one embodiment of the present invention is shown in FIG. 13C.
  • a top view of the semiconductor device 10C is shown in FIG. 17A.
  • FIG. 17B shows a cross-sectional view of the cut plane along the dashed-dotted line A1-A2 shown in FIG. 17A
  • FIG. 17C shows a cross-sectional view of the cut plane taken along the dashed-dotted line B1-B2 and the dashed-dotted line B3-B4.
  • the semiconductor device 10C includes a transistor 100 and a transistor 200.
  • One of the source and drain of transistor 200 is electrically connected to one of the source and drain of transistor 100.
  • the transistor 100 and the transistor 200 are each provided on the substrate 102.
  • the transistor 200 includes a conductive layer 112a, a conductive layer 112c, a semiconductor layer 208, an insulating layer 106, and a conductive layer 204.
  • the conductive layer 112c functions as one of a source electrode and a drain electrode of the transistor 200.
  • the conductive layer 112a functions as one of the source electrode and the drain electrode of the transistor 100, and functions as the other of the source electrode and the drain electrode of the transistor 200.
  • the same material as the conductive layer 112b can be used for the conductive layer 112c.
  • the conductive layer 112c can be formed in the same process as the conductive layer 112b.
  • FIG. 13D A circuit diagram of a semiconductor device 10D that is one embodiment of the present invention is shown in FIG. 13D.
  • a top view of the semiconductor device 10D is shown in FIG. 18A.
  • FIG. 18B shows a cross-sectional view taken along the dashed line A1-A2 shown in FIG. 18A.
  • the semiconductor device 10D includes a transistor 100 and a transistor 250.
  • One of the source and drain of transistor 250 is electrically connected to one of the source and drain of transistor 100.
  • the transistor 100 is shown as an n-channel type and the transistor 250 is shown as a p-channel type in FIGS. 13D to 13H, one embodiment of the present invention is not limited thereto. Both the transistor 100 and the transistor 250 may be n-channel type or may be p-channel type. Alternatively, the transistor 100 may be a p-channel type, and the transistor 250 may be an n-channel type.
  • the transistor 100 and the transistor 250 are each provided on the substrate 102.
  • the semiconductor device 10D has a conductive layer 259 on the substrate 102, an insulating layer 252 on the substrate 102 and the conductive layer 259, and a semiconductor layer 253 on the insulating layer 252. Further, an insulating layer 254 is provided over the insulating layer 252 and the semiconductor layer 253, and a conductive layer 255 is provided over the insulating layer 254. The semiconductor layer 253 and the conductive layer 255 have regions that overlap with each other.
  • the conductive layer 259 functions as a back gate electrode of the transistor 250, and the insulating layer 252 functions as a back gate insulating layer.
  • the insulating layer 254 functions as a gate insulating layer, and the conductive layer 255 functions as a gate electrode.
  • An insulating layer 256 is provided on the insulating layer 254 and the conductive layer 255. Further, an opening 257a is provided in the insulating layer 254 and the insulating layer 256 in a region overlapping a part of the semiconductor layer 253. Further, an opening 257b is provided in the insulating layer 254 and the insulating layer 256 in a region overlapping with another part of the semiconductor layer 253.
  • a conductive layer 258a is provided on the insulating layer 256 and the opening 257a, and a conductive layer 258b is provided on the insulating layer 256 and the opening 257b.
  • the conductive layer 258a is electrically connected to the semiconductor layer 253 at the opening 257a.
  • the conductive layer 258b is electrically connected to the semiconductor layer 253 at the opening 257b.
  • a region overlapping with the conductive layer 255 functions as a channel formation region.
  • the semiconductor layer 253 has a pair of regions 253D sandwiching a channel formation region.
  • One of the pair of regions 253D functions as one of a source region and a drain region, and is electrically connected to the conductive layer 258a.
  • the other of the pair of regions 253D functions as the other of the source region and the drain region, and is electrically connected to the conductive layer 258b.
  • An insulating layer 110 is provided on the insulating layer 256, the conductive layer 258a, and the conductive layer 258b, and a conductive layer 112b is provided on the insulating layer 110.
  • the conductive layer 112b and the insulating layer 110 have an opening 146 in a region overlapping a part of the conductive layer 258a (FIG. 18A).
  • a semiconductor layer 108 is provided to cover the opening 146.
  • An insulating layer 106 is provided on the insulating layer 110, the conductive layer 112b, and the semiconductor layer 108, and a conductive layer 104 is provided on the insulating layer 106. Further, an insulating layer 195 is provided over the insulating layer 106 and the conductive layer 104.
  • the conductive layer 259 overlaps with the channel formation region and extends beyond the edge of the channel formation region. That is, the conductive layer 259 is preferably larger than the channel formation region. Further, it is preferable that the conductive layer 259 extends beyond the edge of the semiconductor layer 253. That is, the conductive layer 259 is preferably larger than the semiconductor layer 253.
  • the gate electrode and the back gate electrode are arranged to sandwich the channel formation region of the semiconductor layer. Further, by changing the potential of the back gate electrode, the threshold voltage of the transistor can be changed.
  • the potential of the back gate electrode may be a ground potential or an arbitrary potential.
  • the back gate electrode can be formed using the same material and method as the gate electrode, source electrode, drain electrode, etc. Further, since the gate electrode and the back gate electrode are conductive layers, they have a function of preventing an electric field generated outside the transistor from acting on a semiconductor layer in which a channel is formed (in particular, an electric field shielding function against static electricity). That is, it is possible to prevent the electrical characteristics of the transistor from changing due to the influence of an external electric field such as static electricity. Further, by providing a back gate electrode, it is possible to reduce the amount of change in the threshold voltage of the transistor before and after a BT (Bias Temperature) stress test. By providing the back gate electrode, variations in transistor characteristics can be reduced and reliability of the semiconductor device can be improved.
  • BT Bias Temperature
  • the back gate and gate of the transistor 250 may be electrically connected. Further, as shown in FIG. 13F, the back gate and the source or drain of the transistor 250 may be electrically connected. Further, as shown in FIG. 13G, the transistor 250 does not need to have a back gate.
  • an OS transistor may be applied to the transistor 250.
  • the same material or different materials may be used for the semiconductor layer 108 and the semiconductor layer 253.
  • the description of the semiconductor layer 108 and the semiconductor layer 208 in the semiconductor device 10 can also be referred to.
  • a transistor whose channel formation region uses silicon (hereinafter also referred to as a Si transistor) may be applied to the transistor 250.
  • Examples of silicon include single crystal silicon, polycrystalline silicon, amorphous silicon, and the like.
  • a transistor having LTPS in a semiconductor layer (hereinafter also referred to as an LTPS transistor) can be used.
  • LTPS transistors have high field effect mobility and good frequency characteristics.
  • the transistor 100 has the same configuration as described above, except that it includes a conductive layer 258a instead of the conductive layer 112a (see FIG. 1).
  • the conductive layer 258a functions as one of the source electrode and the drain electrode of the transistor 100, and also functions as one of the source electrode and the drain electrode of the transistor 250. By sharing the conductive layer 258a between the transistor 100 and the transistor 250, the area occupied by the semiconductor device can be reduced.
  • the transistor 100 is a vertical channel transistor.
  • a current flows in the semiconductor layer in a lateral direction, that is, in a direction parallel or substantially parallel to the surface of the substrate 102.
  • Such a transistor can be called a lateral channel transistor.
  • the semiconductor device of one embodiment of the present invention may include not only a vertical channel transistor but also a horizontal channel transistor.
  • the transistor 100 may be formed in a region overlapping with the opening 257a.
  • the opening 146 can be provided in a region overlapping with the opening 257a, and the conductive layer 258a and the semiconductor layer 108 can be in contact with each other at the opening 257a.
  • a structure may be adopted in which the conductive layer 258a is not provided and the region 253D and the semiconductor layer 108 are in contact with each other at the opening 257a. With such a configuration, it is possible to obtain a semiconductor device that occupies an even smaller area.
  • FIG. 13H A circuit diagram of a semiconductor device 10E, which is one embodiment of the present invention, is shown in FIG. 13H.
  • a top view of the semiconductor device 10E is shown in FIG. 19A.
  • FIG. 19B shows a cross-sectional view taken along the dashed-dotted line A1-A2 shown in FIG. 19A.
  • the semiconductor device 10E includes a transistor 100 and a transistor 250.
  • a gate of the transistor 250 is electrically connected to one of the source and drain of the transistor 100.
  • the main difference between the semiconductor device 10E and the semiconductor device 10D is that the opening 146 is provided overlapping the conductive layer 255 that functions as the gate electrode of the transistor 250. Therefore, in the semiconductor device 10D, the transistor 100 is provided to overlap the gate electrode of the transistor 250.
  • the opening 146 is provided to overlap the channel forming region, but the invention is not limited thereto.
  • the opening 146 may be provided so as not to overlap the channel formation region and to overlap the conductive layer 255.
  • the conductive layer 255 functions as a gate electrode of the transistor 250 and as one of a source electrode and a drain electrode of the transistor 100.
  • the semiconductor device 10E is different from the semiconductor device 10D in the configuration of the opening 257a, the opening 257b, the conductive layer 258a, and the conductive layer 258b.
  • the opening 257a and the opening 257b are formed by selectively removing a portion of each of the insulating layer 254 and the insulating layer 110 in a region overlapping with the region 253D of the semiconductor layer 253.
  • the conductive layer 258a and the conductive layer 258b are provided on the insulating layer 110 and are electrically connected to the region 253D through the opening 257a and the opening 257b.
  • the conductive layer 258a and the conductive layer 258b can be formed in the same process as the conductive layer 112b. Since it is not necessary to form the conductive layers 258a and 258b and the conductive layer 112b in separate processes, the manufacturing process of the semiconductor device can be shortened and the productivity of the semiconductor device can be increased.
  • a semiconductor device includes at least one transistor and at least one capacitor, and has a structure in which the source or drain of the transistor is electrically connected to one of a pair of electrodes of the capacitor.
  • FIG. 13I shows an example in which the source or drain of the transistor 100 is electrically connected to one electrode of the capacitor 190.
  • the transistor of one embodiment of the present invention is a type of vertical transistor, and the source electrode, semiconductor layer, and drain electrode can be provided overlapping each other; therefore, the occupied area is significantly reduced compared to a planar transistor. can. Further, by using a p-channel type Si transistor as the planar transistor and using an n-channel type OS transistor as the vertical transistor, a complementary metal oxide semiconductor (CMOS) circuit can be configured. Moreover, by adopting this structure and providing a planar transistor and a vertical transistor in an overlapping manner, the area occupied by the CMOS circuit can be reduced.
  • CMOS complementary metal oxide semiconductor
  • FIG. 20A An equivalent circuit diagram of a semiconductor device 30 that is one embodiment of the present invention is shown in FIG. 20A.
  • the semiconductor device 30 includes transistors 100_1 to 100_p (p is an integer of 2 or more).
  • the transistors 100_1 to 100_p are connected in parallel, and the semiconductor device 30 can be considered as one transistor.
  • the gate electrodes of the transistors 100_1 to 100_p are electrically connected to each other. Source electrodes of the transistors 100_1 to 100_p are electrically connected to each other. The drain electrodes of the transistors 100_1 to 100_p are electrically connected to each other.
  • FIG. 20A shows the transistors 100_1 to 100_p as n-channel transistors, one embodiment of the present invention is not limited thereto.
  • the transistors 100_1 to 100_p may be p-channel type.
  • FIG. 20B An equivalent circuit diagram of the semiconductor device 30, which is one embodiment of the present invention, is shown in FIG. 20B.
  • a top view of the semiconductor device 30 is shown in FIG. 20C.
  • FIG. 21 shows a cross-sectional view taken along the dashed line A3-A4 shown in FIG. 20C.
  • a perspective view of the semiconductor device 30 is shown in FIG.
  • the semiconductor device 30 includes transistors 100_1 to 100_4.
  • the structure of the transistor 100 described above can be applied to each of the transistors 100_1 to 100_4. Note that although the transistor 100 is described here as an example, one embodiment of the present invention is not limited to this. Any one of the transistors 100A to 100D may be applied to the transistors 100_1 to 100_4.
  • FIG. 15C and the like show a configuration in which the transistors 100_1 to 100_4 are arranged in two rows and two columns
  • the arrangement of the transistors is not particularly limited.
  • the transistors 100_1 to 100_4 may be arranged in one row and four columns.
  • the transistors 100_1 to 100_4 each include a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 112a, and a conductive layer 112b.
  • the conductive layer 104 functions as a gate electrode of the transistors 100_1 to 100_4.
  • a portion of the insulating layer 106 functions as a gate insulating layer of the transistors 100_1 to 100_4.
  • the conductive layer 112a functions as the other of the source electrode and drain electrode of the transistors 100_1 to 100_4, and the conductive layer 112b functions as one.
  • FIG. 23A is a perspective view showing an excerpt of the conductive layer 112a.
  • FIG. 23B is a perspective view selectively showing the conductive layer 112a, the conductive layer 112b, the openings 141_1 to 141_4, and the openings 143_1 to 143_4. Note that the openings 141_1 to 141_4 provided in the insulating layer 110 are indicated by broken lines. Regarding the openings 141_1 to 141_4 and the openings 143_1 to 143_4, the descriptions of the openings 141 and 143 can be referred to, so detailed descriptions thereof will be omitted.
  • the channel width of the transistor is the sum of the channel widths of the transistors 100_1 to 100_4.
  • the semiconductor device 30 can be regarded as a transistor with a channel width of "D143 x ⁇ x 4". (See Figures 4A and 4B).
  • the semiconductor device 30 composed of p transistors can be regarded as a transistor with a channel width of “D143 ⁇ p”. Note that the semiconductor device 30 can be regarded as a transistor with a channel length L100 (see FIG. 4B).
  • the channel width can be increased and the on-state current can be increased. Further, by adjusting the number (p) of transistors connected in parallel, the channel width can be varied. The number (p) of transistors to be connected in parallel may be determined so as to obtain a desired on-current.
  • FIG. 23C is a perspective view showing an excerpt of the conductive layer 112a and the semiconductor layer 108.
  • the semiconductor layer 108 is provided to cover the openings 141_1 to 141_4 and the openings 143_1 to 143_4. Note that although FIG. 23C and the like illustrate a structure in which the transistors 100_1 to 100_4 share the semiconductor layer 108, one embodiment of the present invention is not limited to this.
  • the semiconductor layer 108 may be separated for each of the transistors 100_1 to 100_4.
  • FIG. 23D is a perspective view showing an excerpt of the conductive layer 112a and the conductive layer 104.
  • the conductive layer 104 is provided to cover the openings 141_1 to 141_4 and the openings 143_1 to 143_4.
  • Configuration Example 2-7 can also be applied to other configuration examples.
  • the semiconductor device 30 may be applied to one or more transistors included in the semiconductor devices shown in FIGS. 13A to 13I.
  • FIG. 24A An equivalent circuit diagram of a semiconductor device 40 that is one embodiment of the present invention is shown in FIG. 24A.
  • the semiconductor device 40 includes transistors 100_1 to 100_q (q is an integer of 2 or more).
  • the transistors 100_1 to 100_q are connected in series, and the semiconductor device 40 can be considered as one transistor.
  • FIG. 24A shows the transistors 100_1 to 100_q as n-channel transistors, one embodiment of the present invention is not limited to this.
  • the transistors 100_1 to 100_q may be p-channel type.
  • FIG. 24B An equivalent circuit diagram of the semiconductor device 40, which is one embodiment of the present invention, is shown in FIG. 24B.
  • FIG. 24C A top view of the semiconductor device 40 is shown in FIG. 24C.
  • FIG. 25 shows a cross-sectional view taken along the dashed line A5-A6 shown in FIG. 24C.
  • a perspective view of the semiconductor device 40 is shown in FIG.
  • the semiconductor device 40 includes transistors 100_1 to 100_4.
  • the structure of the transistor 100 described above can be applied to each of the transistors 100_1 to 100_4. Note that although the transistor 100 is described here as an example, one embodiment of the present invention is not limited to this. Any one of the transistors 100A to 100D may be applied to the transistors 100_1 to 100_4.
  • FIG. 24C and the like show a configuration in which the transistors 100_1 to 100_4 are arranged in two rows and two columns
  • the arrangement of the transistors is not particularly limited.
  • the transistors 100_1 to 100_4 may be arranged in one row and four columns.
  • the transistor 100_1 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108_1, a conductive layer 112a, and a conductive layer 112b.
  • the conductive layer 112a functions as one of a source electrode and a drain electrode of the transistor 100_1, and the conductive layer 112b functions as the other.
  • the transistor 100_2 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108_2, a conductive layer 112a, and a conductive layer 112c.
  • the conductive layer 112a functions as one of a source electrode and a drain electrode of the transistor 100_2, and the conductive layer 112c functions as the other.
  • the conductive layer 112a is shared by the transistor 100_1 and the transistor 100_2.
  • the transistor 100_3 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108_3, a conductive layer 112c, and a conductive layer 112d.
  • the conductive layer 112c functions as one of the source electrode and the drain electrode of the transistor 100_3, and the conductive layer 112d functions as the other.
  • the conductive layer 112c is shared by the transistor 100_2 and the transistor 100_3.
  • the transistor 100_4 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108_4, a conductive layer 112d, and a conductive layer 112e.
  • the conductive layer 112d functions as one of the source electrode and the drain electrode of the transistor 100_4, and the conductive layer 112e functions as the other.
  • the conductive layer 112d is shared by the transistor 100_3 and the transistor 100_4.
  • FIG. 27A is a perspective view showing an excerpt of the conductive layer 112a and the conductive layer 112d.
  • the conductive layer 112a and the conductive layer 112d can be formed in the same process.
  • FIG. 27B is a perspective view showing excerpts of the conductive layer 112a, the conductive layer 112b, the conductive layer 112c, the conductive layer 112d, the conductive layer 112e, the openings 141_1 to 141_4, and the openings 143_1 to 143_4.
  • the conductive layers 112a to 112e can be formed in the same process.
  • An opening 143_1 is provided in the conductive layer 112b
  • an opening 143_2 and an opening 143_3 are provided in the conductive layer 112c
  • an opening 143_4 is provided in the conductive layer 112e.
  • FIG. 27C is a perspective view showing an excerpt of the conductive layer 112a, the conductive layer 112d, and the semiconductor layers 108_1 to 108_4.
  • the semiconductor layers 108_1 to 108_4 can be formed in the same process.
  • FIG. 27D is a perspective view showing an excerpt of the conductive layer 112a, the conductive layer 112d, and the conductive layer 104.
  • the conductive layer 104 functions as a gate electrode of the transistors 100_1 to 100_4.
  • One of the source electrode and the drain electrode of the transistor 100_1 is electrically connected to one of the source electrode and the drain electrode of the transistor 100_2.
  • the other of the source electrode and the drain electrode of the transistor 100_2 is electrically connected to one of the source electrode and the drain electrode of the transistor 100_3.
  • the other of the source electrode and the drain electrode of the transistor 100_3 is electrically connected to one of the source electrode and the drain electrode of the transistor 100_4.
  • the channel length of the transistor is the sum of the channel lengths of the transistors 100_1 to 100_4.
  • the semiconductor device 40 can be regarded as a transistor with a channel length of “L100 ⁇ 4” (see FIG. 4B).
  • the semiconductor device 40 composed of q transistors can be regarded as a transistor with a channel length of “L100 ⁇ q”.
  • the semiconductor device 40 can be regarded as a transistor with a channel width W100 (see FIGS. 4A and 4B).
  • Configuration Example 2-8 can also be applied to other configuration examples.
  • the semiconductor device 40 may be applied to one or more transistors included in the semiconductor devices shown in FIGS. 13A to 13I.
  • the semiconductor device 40 may be applied to each transistor included in the semiconductor device 30.
  • a configuration can be obtained in which a group of transistors connected in parallel are further connected in series (hereinafter also referred to as series-parallel connection).
  • Embodiment 2 In this embodiment, a method for manufacturing a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. 28A to 29D. Note that regarding the materials and forming methods of each element, descriptions of the same parts as those previously described in Embodiment 1 may be omitted.
  • 28A to 29D show side by side a cross-sectional view along the dashed-dotted line A1-A2 and a cross-sectional view along the dashed-dotted line B1-B2 shown in FIG. 1A.
  • Thin films (insulating films, semiconductor films, conductive films, etc.) constituting semiconductor devices can be formed using sputtering, chemical vapor deposition (CVD), vacuum evaporation, and pulsed laser deposition (PLD). ) method, ALD method, or the like.
  • the CVD method includes a PECVD method, a thermal CVD method, and the like.
  • one of the thermal CVD methods is a metal organic chemical vapor deposition (MOCVD) method.
  • Thin films (insulating films, semiconductor films, conductive films, etc.) that make up semiconductor devices can be manufactured using spin coating, dip coating, spray coating, inkjet, dispensing, screen printing, offset printing, doctor knife method, slit coating, roll coating, and curtain coating. It can be formed by a wet film forming method such as coating or knife coating.
  • a photolithography method or the like can be used when processing the thin film that constitutes the semiconductor device.
  • the thin film may be processed by a nanoimprint method, a sandblasting method, a lift-off method, or the like.
  • an island-shaped thin film may be directly formed by a film forming method using a shielding mask such as a metal mask.
  • One method is to form a resist mask on a thin film to be processed, process the thin film by etching or the like, and then remove the resist mask.
  • the other method is to form a photosensitive thin film and then process the thin film into a desired shape by exposing and developing the film.
  • the light used for exposure can be, for example, i-line (wavelength: 365 nm), g-line (wavelength: 436 nm), h-line (wavelength: 405 nm), or a mixture of these.
  • ultraviolet rays, KrF laser light, ArF laser light, etc. can also be used.
  • exposure may be performed using immersion exposure technology.
  • extreme ultraviolet (EUV) light or X-rays may be used.
  • an electron beam can be used instead of the light used for exposure. It is preferable to use extreme ultraviolet light, X-rays, or electron beams because extremely fine processing becomes possible. Note that when exposure is performed by scanning a beam such as an electron beam, a photomask is not necessary.
  • etching the thin film one or more of a dry etching method, a wet etching method, and a sandblasting method can be used.
  • a conductive film to be the conductive layer 112a is formed on the substrate 102, and the conductive film is processed to form the conductive layer 112a (FIG. 28A).
  • a sputtering method can be suitably used to form the conductive film.
  • an insulating film 110af that becomes the insulating layer 110a and an insulating film 110bf that becomes the insulating layer 110b are formed on the conductive layer 112a (FIG. 28B).
  • a sputtering method or a PECVD method can be preferably used to form the insulating film 110af and the insulating film 110bf.
  • After forming the insulating film 110af it is preferable to continuously form the insulating film 110bf in a vacuum without exposing the surface of the insulating film 110af to the atmosphere.
  • By continuously forming the insulating film 110af and the insulating film 110bf attachment of impurities derived from the atmosphere to the surface of the insulating film 110af can be suppressed. Examples of such impurities include water and organic substances.
  • the substrate temperature during the formation of the insulating film 110af and the insulating film 110bf is preferably 180° C. or more and 450° C. or less, more preferably 200° C. or more and 450° C. or less, further preferably 250° C. or more and 450° C. or less, and even more preferably 300° C. or more and 450° C. or less. It is preferably 300°C or more and 450°C or less, more preferably 300°C or more and 400°C or less, and even more preferably 350°C or more and 400°C or less.
  • the substrate temperature at the time of forming the insulating film 110af and the insulating film 110bf within the above-mentioned range, it is possible to reduce the release of impurities (for example, water and hydrogen) from themselves, and the impurities are diffused into the semiconductor layer 108. can be suppressed. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.
  • impurities for example, water and hydrogen
  • the insulating film 110af and the insulating film 110bf are formed before the semiconductor layer 108, there is no need to be concerned about oxygen being desorbed from the semiconductor layer 108 due to the heat applied during the formation of the insulating film 110af and the insulating film 110bf. do not have.
  • oxygen may be supplied to the insulating film 110bf.
  • a method for supplying oxygen for example, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or a plasma treatment can be used.
  • the plasma treatment an apparatus that turns oxygen gas into plasma using high-frequency power can be suitably used. Examples of devices that turn gas into plasma using high-frequency power include PECVD devices, plasma etching devices, and plasma ashing devices.
  • the plasma treatment is preferably performed in an atmosphere containing oxygen. For example, it is preferable to perform the plasma treatment in an atmosphere containing one or more of oxygen, dinitrogen monoxide (N 2 O), nitrogen dioxide (NO 2 ), carbon monoxide, and carbon dioxide.
  • the plasma treatment may be performed continuously in a vacuum without exposing the surface of the insulating film 110bf to the atmosphere.
  • a PECVD apparatus is used to form the insulating film 110bf
  • productivity can be increased.
  • N 2 O plasma treatment can be performed continuously in a vacuum.
  • a metal oxide layer 139 on the insulating film 110bf (FIG. 28C).
  • oxygen can be supplied to the insulating film 110bf.
  • the conductivity of the metal oxide layer 139 does not matter.
  • the metal oxide layer 139 at least one of an insulating film, a semiconductor film, and a conductive film can be used.
  • the metal oxide layer 139 for example, aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), or silicon-containing indium tin oxide (ITSO) can be used.
  • an oxide containing one or more of the same elements as the semiconductor layer 108 is preferable to use as the metal oxide layer 139. In particular, it is preferable to use an oxide that can be applied to the semiconductor layer 108.
  • the oxygen flow rate ratio or oxygen partial pressure is, for example, 50% or more and 100% or less, preferably 65% or more and 100% or less, more preferably 80% or more and 100% or less, and still more preferably 90% or more and 100% or less. In particular, it is preferable that the oxygen flow rate ratio be 100% and the oxygen partial pressure as close to 100% as possible.
  • heat treatment may be performed. By performing heat treatment after forming the metal oxide layer 139, oxygen can be effectively supplied from the metal oxide layer 139 to the insulating film 110bf.
  • the temperature of the heat treatment is preferably 150°C or higher and lower than the strain point of the substrate, more preferably 200°C or higher and 450°C or lower, further preferably 250°C or higher and 450°C or lower, and even more preferably 300°C or higher and 450°C or lower. Further, the temperature is preferably 300°C or more and 400°C or less, and even more preferably 350°C or more and 400°C or less.
  • the heat treatment can be performed in an atmosphere containing one or more of noble gases, nitrogen, or oxygen. Dry air (CDA: Clean Dry Air) may be used as the atmosphere containing nitrogen or the atmosphere containing oxygen. Note that it is preferable that the content of hydrogen, water, etc. in the atmosphere is as low as possible.
  • the atmosphere it is preferable to use a high-purity gas having a dew point of -60°C or lower, preferably -100°C or lower.
  • a high-purity gas having a dew point of -60°C or lower, preferably -100°C or lower.
  • an atmosphere containing as little hydrogen, water, or the like as possible it is possible to prevent hydrogen, water, and the like from being taken into the insulating film 110af and the insulating film 110bf as much as possible.
  • an oven, a rapid thermal annealing (RTA) device, or the like can be used. By using an RTA device, the heat treatment time can be shortened.
  • oxygen may be further supplied to the insulating film 110bf via the metal oxide layer 139.
  • a method for supplying oxygen for example, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or a plasma treatment can be used.
  • the plasma treatment the above description can be referred to, so a detailed explanation will be omitted.
  • the metal oxide layer 139 is removed.
  • a wet etching method can be suitably used. By using the wet etching method, it is possible to suppress etching of the insulating film 110bf when removing the metal oxide layer 139. Thereby, the thickness of the insulating film 110bf can be suppressed from becoming thinner, and the thickness of the insulating layer 110b can be made uniform.
  • the process for supplying oxygen to the insulating film 110bf is not limited to the above-mentioned method.
  • oxygen radicals, oxygen atoms, oxygen atom ions, or oxygen molecular ions are supplied to the insulating film 110bf by ion doping, ion implantation, or plasma treatment.
  • oxygen may be supplied to the insulating film 110bf through the film.
  • the film is removed after supplying oxygen.
  • a conductive film or a semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, and tungsten is used as the film for suppressing the above-mentioned oxygen desorption. be able to.
  • an insulating film 110cf that becomes the insulating layer 110c is formed on the insulating film 110bf (FIG. 28D).
  • the description regarding the formation of the insulating film 110af and the insulating film 110bf can be referred to, so a detailed explanation will be omitted.
  • a conductive film 112bf that becomes the conductive layer 112b is formed on the insulating film 110cf (FIG. 28E).
  • a sputtering method can be suitably used to form the conductive film 112bf.
  • the conductive film 112bf is processed to form a conductive layer 112B (FIG. 29A).
  • the conductive layer 112B will later become the conductive layer 112b.
  • a wet etching method can be suitably used to form the conductive layer 112B.
  • a portion of the conductive layer 112B is removed to form a conductive layer 112b having an opening 143.
  • a wet etching method can be suitably used to form the conductive layer 112b.
  • the insulating film 110af, the insulating film 110bf, and the insulating film 110cf are removed to form the insulating layer 110 having the opening 141 (FIG. 29B).
  • the opening 141 is provided in a region overlapping with the opening 143.
  • the conductive layer 112a is exposed.
  • a dry etching method can be suitably used to form the insulating layer 110.
  • the opening 141 can be formed using, for example, the resist mask used to form the opening 143. Specifically, a resist mask is formed on the conductive layer 112B, a part of the conductive layer 112B is removed using the resist mask to form an opening 143, and the insulating film 110af and the insulating film are removed using the resist mask. The opening 141 can be formed by removing part of the insulating film 110bf and the insulating film 110cf. The opening 141 may be formed using a resist mask different from the resist mask used to form the opening 143.
  • a metal oxide film 108f that will become the semiconductor layer 108 is formed so as to cover the openings 141 and 143 (FIG. 29C).
  • the metal oxide film 108f is formed by stacking a metal oxide film 108af to become the semiconductor layer 108a, a metal oxide film 108bf to become the semiconductor layer 108b, and a metal oxide film 108cf to become the semiconductor layer 108c.
  • the metal oxide film 108f is provided in contact with the top surface and side surfaces of the conductive layer 112b, the top surface and side surfaces of the insulating layer 110, and the top surface of the conductive layer 112a.
  • the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf are each preferably formed by a sputtering method using a metal oxide target.
  • each of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf is preferably formed by an ALD method.
  • After forming the metal oxide film 108af it is preferable to continuously form the metal oxide film 108bf without exposing the surface of the metal oxide film 108af to the atmosphere.
  • the metal oxide film 108bf it is preferable to continuously form the metal oxide film 108cf without exposing the surface of the metal oxide film 108bf to the atmosphere.
  • the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf By continuously forming the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf, attachment of impurities derived from the atmosphere to the surface of the metal oxide film 108af can be suppressed. Examples of such impurities include water and organic substances.
  • the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf may be formed using different apparatuses. Different formation methods may be used for the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf.
  • the metal oxide film 108af and the metal oxide film 108cf may be formed by an ALD method, and the metal oxide film 108bf may be formed by a sputtering method.
  • the ALD method Since the ALD method has high coverage, it can be suitably used to form one or more of the metal oxide film 108af, metal oxide film 108bf, and metal oxide film 108cf provided to cover the openings 141 and 143. .
  • a metal oxide film can be formed on the side surfaces of the insulating layer 110 with high coverage.
  • the ALD method allows easy control of the film formation rate, thin films can be formed with good yield. Therefore, the ALD method can be suitably used particularly for forming the metal oxide film 108af that becomes the thin semiconductor layer 108a.
  • a CVD method may be used to form one or more of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf.
  • each of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf be a dense film with as few defects as possible. Further, it is preferable that the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf are highly pure films with impurities containing hydrogen element reduced as much as possible. In particular, it is preferable to use metal oxide films having crystallinity as the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf.
  • oxygen gas when forming the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf.
  • oxygen gas when forming the metal oxide film 108af oxygen can be suitably supplied into the insulating layer 110.
  • oxygen gas when an oxide or an oxynitride is used for the insulating layer 110b, oxygen can be suitably supplied into the insulating layer 110b.
  • oxygen vacancies and V O H in the semiconductor layer 108 can be reduced.
  • oxygen gas and an inert gas for example, helium gas, argon gas, xenon gas, etc.
  • an inert gas for example, helium gas, argon gas, xenon gas, etc.
  • the lower the oxygen flow rate ratio or the oxygen partial pressure the lower the crystallinity and the higher the electrical conductivity of the metal oxide film, and the higher the on-state current of the transistor.
  • the oxygen flow rate ratio or oxygen partial pressure when forming the metal oxide film 108bf which serves as the main current path
  • a transistor with a large on-current can be obtained.
  • the crystallinity of the material film 108af, the metal oxide film 108bf, and the metal oxide film 108cf can be made different. Note that these oxygen flow rate ratios may be the same or different. The same applies to oxygen partial pressure.
  • the metal oxide film may have a polycrystalline structure.
  • crystal grain boundaries become recombination centers and carriers are captured, which may reduce the on-state current of the transistor. Therefore, it is preferable to adjust the oxygen flow rate ratio or oxygen partial pressure of the metal oxide film 108af, metal oxide film 108bf, and metal oxide film 108cf so that they do not have a polycrystalline structure. Since the ease of forming a polycrystalline structure differs depending on the composition of the metal oxide film, the oxygen flow rate ratio or oxygen partial pressure may be changed depending on the composition of the metal oxide film 108af, metal oxide film 108bf, and metal oxide film 108cf. All you have to do is do it.
  • the oxygen flow rate ratio when forming the metal oxide film 108bf is the oxygen flow rate ratio when forming the metal oxide film 108af, and the metal It is preferable that the oxygen flow rate ratio be lower than that when forming the oxide film 108cf. The same applies to oxygen partial pressure.
  • the substrate temperature when forming the metal oxide film the higher the crystallinity and the denser the metal oxide film can be.
  • the lower the substrate temperature the lower the crystallinity and the higher the electrical conductivity of the metal oxide film.
  • the substrate temperature when forming the metal oxide film 108af, the substrate temperature when forming the metal oxide film 108bf, and the substrate temperature when forming the metal oxide film 108cf may be the same, or may be different. It's okay.
  • the crystallinity of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf can be varied.
  • the substrate temperature at the time of forming the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf is preferably at least room temperature and at most 250°C, more preferably at least room temperature and at most 200°C, and even more preferably at least room temperature and at most 140°C. preferable.
  • the metal oxide film may have a polycrystalline structure. It is preferable to adjust the substrate temperature of each of the metal oxide film 108af, metal oxide film 108bf, and metal oxide film 108cf so that they do not have a polycrystalline structure. The substrate temperature may be changed depending on the composition applied to the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf.
  • the substrate temperature when forming the metal oxide film 108bf is the same as the substrate temperature when forming the metal oxide film 108af, and the metal oxide film 108af. It is preferable that the temperature is lower than the substrate temperature when forming the film 108cf.
  • the metal oxide film 108af by using the same sputtering target for forming any two or more of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf, manufacturing costs can be reduced. Furthermore, by using the same substrate temperature during formation of any two or more of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108cf, productivity can be increased using the same processing chamber.
  • An oxide film can be formed.
  • the metal oxide film 108bf and the metal oxide film 108cf can be formed successively in the same processing chamber using the same sputtering target. At this time, the substrate temperature may be kept the same, and the oxygen flow rate ratio or oxygen partial pressure when forming the metal oxide film 108bf may be made different from the oxygen flow rate ratio or oxygen partial pressure when forming the metal oxide film 108cf. .
  • a film forming method such as a thermal ALD method or PEALD (Plasma Enhanced ALD).
  • the thermal ALD method is preferable because it shows extremely high coverage.
  • the PEALD method is preferable because, in addition to exhibiting high coverage, low-temperature film formation is possible.
  • the metal oxide film can be formed, for example, by an ALD method using a precursor containing a constituent metal element and an oxidizing agent.
  • three precursors can be used: a precursor containing indium, a precursor containing gallium, and a precursor containing zinc.
  • a precursor containing indium a precursor containing gallium
  • a precursor containing zinc a precursor containing zinc
  • two precursors may be used, one containing indium and the other containing gallium and zinc.
  • precursors containing indium include triethyl indium, tris(2,2,6,6-tetramethyl-3,5-heptanedioic acid) indium, cyclopentadienyl indium, indium (III) chloride, and (3 -(dimethylamino)propyl)dimethylindium.
  • precursors containing gallium include trimethyl gallium, triethyl gallium, gallium trichloride, tris(dimethylamide) gallium(III), gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3 , 5-heptanedioate), dimethylchlorogallium, and diethylchlorogallium.
  • precursors containing zinc include dimethylzinc, diethylzinc, bis(2,2,6,6-tetramethyl-3,5-heptanedioic acid)zinc, and zinc chloride.
  • oxidizing agent examples include ozone, oxygen, and water.
  • one or more of the type of source gas, the flow rate ratio of the source gas, the time for flowing the source gas, and the order of flowing the source gas may be adjusted.
  • the compositions of the metal oxide film 108af, metal oxide film 108bf, and metal oxide film 108cf can be controlled.
  • the composition of one or more of the metal oxide film 108af, the metal oxide film 108bf, and the metal oxide film 108bf may be changed continuously.
  • the precursor used to form the metal oxide film 108bf preferably has a lower gallium content than the precursor used to form the metal oxide film 108af and the precursor used to form the metal oxide film 108cf.
  • a precursor not containing gallium may be used to form the metal oxide film 108bf, and a precursor containing gallium may be used to form the metal oxide film 108af and the metal oxide film 108cf.
  • gallium has been described here as the element M, one embodiment of the present invention is not limited thereto. Any one or more of the above-mentioned elements M may be used instead of or in addition to gallium.
  • the metal oxide film 108f (specifically, the metal oxide film 108af)
  • a process is performed to remove water, hydrogen, organic substances, etc. adsorbed on the surface of the insulating layer 110, and the insulating layer It is preferable to perform at least one of the processes for supplying oxygen into the process 110.
  • the heat treatment can be performed at a temperature of 70° C. or higher and 200° C. or lower in a reduced pressure atmosphere.
  • plasma treatment may be performed in an atmosphere containing oxygen.
  • oxygen may be supplied to the insulating layer 110 by plasma treatment in an atmosphere containing an oxidizing gas such as dinitrogen monoxide (N 2 O).
  • oxygen can be supplied while suitably removing organic substances on the surface of the insulating layer 110. After such treatment, it is preferable to continuously form the metal oxide film 108f without exposing the surface of the insulating layer 110 to the atmosphere.
  • the metal oxide film 108f is processed into an island shape to form the semiconductor layer 108 (FIG. 29D).
  • a wet etching method can be suitably used to form the semiconductor layer 108.
  • a portion of the conductive layer 112b in a region that does not overlap with the semiconductor layer 108 may be etched and become thinner.
  • a portion of the insulating layer 110 in a region that does not overlap with both the semiconductor layer 108 and the conductive layer 112b may be etched and the film thickness may become thinner.
  • the insulating layer 110c of the insulating layer 110 may be removed by etching, and the surface of the insulating layer 110b may be exposed. Note that in etching the metal oxide film 108f, by using a material with a high selectivity for the insulating layer 110c, it is possible to suppress the film thickness of the insulating layer 110c from becoming thin.
  • Oxygen can also be supplied from the insulating layer 110b to the metal oxide film 108f or the semiconductor layer 108 by heat treatment. At this time, it is more preferable to perform heat treatment before processing into the semiconductor layer 108. Regarding the heat treatment, the above description can be referred to, so a detailed explanation will be omitted.
  • the heat treatment does not need to be performed if it is unnecessary. Further, the heat treatment may not be performed here, but may also serve as the heat treatment performed in a later step. Further, a process in which heat is applied in a later process (for example, a film forming process) may also serve as the heat treatment.
  • the insulating layer 106 is formed to cover the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110.
  • the insulating layer 106 can be formed using, for example, PECVD or ALD.
  • the insulating layer 106 When an oxide semiconductor is used for the semiconductor layer 108, the insulating layer 106 preferably functions as a barrier film that suppresses diffusion of oxygen. Since the insulating layer 106 has a function of suppressing oxygen diffusion, oxygen is suppressed from diffusing into the conductive layer 104 from above the insulating layer 106, and oxidation of the conductive layer 104 can be suppressed. As a result, a transistor exhibiting good electrical characteristics and high reliability can be obtained.
  • barrier film refers to a film that has barrier properties.
  • an insulating layer having barrier properties can be called a barrier insulating layer.
  • barrier property refers to one of the functions of suppressing the diffusion of the corresponding substance (also referred to as low permeability) and the function of capturing or fixing the corresponding substance (also referred to as gettering). or both.
  • the insulating layer can have fewer defects. However, if the temperature during formation of the insulating layer 106 is high, oxygen may be desorbed from the semiconductor layer 108, and oxygen vacancies and V OH in the semiconductor layer 108 may increase.
  • the substrate temperature during formation of the insulating layer 106 is preferably 180°C or more and 450°C or less, more preferably 200°C or more and 450°C or less, further preferably 250°C or more and 450°C or less, and even more preferably 300°C or more and 450°C or less. is preferable, and more preferably 300°C or more and 400°C or less.
  • the substrate temperature during formation of the insulating layer 106 By setting the substrate temperature during formation of the insulating layer 106 within the above range, defects in the insulating layer 106 can be reduced, and desorption of oxygen from the semiconductor layer 108 can be suppressed. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.
  • the surface of the semiconductor layer 108 may be subjected to plasma treatment.
  • plasma treatment Through the plasma treatment, impurities such as water adsorbed on the surface of the semiconductor layer 108 can be reduced. Therefore, impurities at the interface between the semiconductor layer 108 and the insulating layer 106 can be reduced, and a highly reliable transistor can be realized. This is particularly suitable when the surface of the semiconductor layer 108 is exposed to the atmosphere between the formation of the semiconductor layer 108 and the formation of the insulating layer 106.
  • Plasma treatment can be performed, for example, in an atmosphere of oxygen, ozone, nitrogen, dinitrogen monoxide, argon, or the like. Further, it is preferable that the plasma treatment and the formation of the insulating layer 106 are performed continuously without exposure to the atmosphere.
  • a conductive layer 104 is formed on the insulating layer 106 (FIGS. 1A and 1B).
  • a sputtering method for forming the conductive film that will become the conductive layer 104, for example, a sputtering method, a thermal CVD method (including an MOCVD method), or an ALD method can be suitably used.
  • a semiconductor device of one embodiment of the present invention can be manufactured.
  • the display device of this embodiment can be a high-resolution display device or a large-sized display device. Therefore, the display device of this embodiment can be used for relatively large screens such as, for example, television devices, desktop or notebook computers, computer monitors, digital signage, and large game machines such as pachinko machines.
  • the present invention can be used in display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound playback devices.
  • the display device of this embodiment can be a high-definition display device. Therefore, the display device of this embodiment can be used, for example, in a display unit of an information terminal (wearable device) such as a wristwatch type or a bracelet type, as well as a device for VR such as a head mounted display (HMD), and glasses. It can be used in the display section of wearable devices that can be worn on the head, such as AR devices.
  • an information terminal such as a wristwatch type or a bracelet type
  • VR head mounted display (HMD)
  • AR devices head mounted display
  • a semiconductor device of one embodiment of the present invention can be used for a display device or a module including the display device.
  • a module having the display device a module in which a connector such as a flexible printed circuit board (hereinafter referred to as FPC) or TCP (Tape Carrier Package) is attached to the display device, or a COG (Chip On Glass) method.
  • FPC flexible printed circuit board
  • TCP Transmission Carrier Package
  • COG Chip On Glass
  • Another example is a module in which an integrated circuit (IC) is mounted using a COF (Chip On Film) method or the like.
  • the display device of this embodiment may have a function as a touch panel.
  • various detection elements also referred to as sensor elements
  • sensor elements that can detect the proximity or contact of a detected object such as a finger can be applied to the display device.
  • Examples of sensor methods include a capacitance method, a resistive film method, a surface acoustic wave method, an infrared method, an optical method, and a pressure-sensitive method.
  • Examples of the capacitance method include a surface capacitance method and a projected capacitance method.
  • the projected capacitance method there are, for example, a self-capacitance method and a mutual capacitance method. It is preferable to use the mutual capacitance method because simultaneous multi-point detection is possible.
  • touch panels examples include out-cell type, on-cell type, and in-cell type.
  • an in-cell touch panel is a structure in which electrodes constituting sensing elements are provided on one or both of a substrate supporting a display element and a counter substrate.
  • FIG. 30 shows a perspective view of the display device 50A.
  • the display device 50A has a configuration in which a substrate 152 and a substrate 151 are bonded together.
  • the substrate 152 is indicated by a broken line.
  • the display device 50A includes a display section 162, a connection section 140, a circuit section 164, a conductive layer 165, and the like.
  • FIG. 30 shows an example in which an IC 173 and an FPC 172 are mounted on the display device 50A. Therefore, the configuration shown in FIG. 30 can also be called a display module including the display device 50A, an IC, and an FPC.
  • the connecting section 140 is provided outside the display section 162.
  • the connecting portion 140 can be provided along one side or a plurality of sides of the display portion 162.
  • the connecting portion 140 may be singular or plural.
  • FIG. 30 shows an example in which connection parts 140 are provided so as to surround the four sides of the display part.
  • the connection part 140 the common electrode of the display element and the conductive layer are electrically connected, and a potential can be supplied to the common electrode.
  • the circuit section 164 includes, for example, a scanning line drive circuit (also referred to as a gate driver). Furthermore, the circuit section 164 may include both a scanning line drive circuit and a signal line drive circuit (also referred to as a source driver).
  • a scanning line drive circuit also referred to as a gate driver
  • a signal line drive circuit also referred to as a source driver
  • the conductive layer 165 has a function of supplying signals and power to the display section 162 and the circuit section 164.
  • the signal and power are input into the conductive layer 165 from the outside via the FPC 172 or input into the conductive layer 165 from the IC 173.
  • FIG. 30 shows an example in which the IC 173 is provided on the substrate 151 using a COG method, a COF method, or the like.
  • a COG method a COG method
  • COF method a COF method
  • an IC having one or both of a scanning line drive circuit and a signal line drive circuit can be applied to the IC 173.
  • the display device 50A and the display module may have a configuration in which no IC is provided.
  • the IC may be mounted on the FPC using a COF method or the like.
  • the semiconductor device of one embodiment of the present invention can be applied to, for example, one or both of the display portion 162 and the circuit portion 164 of the display device 50A.
  • the semiconductor device of one embodiment of the present invention when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-definition display device can be obtained.
  • the semiconductor device of one embodiment of the present invention when the semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (for example, one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced. Therefore, a display device with a narrow frame can be obtained. Further, since the semiconductor device of one embodiment of the present invention has good electrical characteristics, the reliability of the display device can be increased by using it for a display device.
  • the display section 162 is an area for displaying images on the display device 50A, and has a plurality of periodically arranged pixels 201.
  • FIG. 30 shows an enlarged view of one pixel 201.
  • the arrangement of pixels in the display device of this embodiment is not particularly limited, and various methods can be applied.
  • Examples of pixel arrays include stripe array, S-stripe array, matrix array, delta array, Bayer array, and pentile array.
  • the pixel 201 shown in FIG. 30 has a subpixel 11R that emits red light, a subpixel 11G that emits green light, and a subpixel 11B that emits blue light.
  • the subpixels 11R, 11G, and 11B each include a display element and a circuit that controls driving of the display element.
  • Various elements can be used as the display element, such as liquid crystal elements and light emitting elements.
  • a display element using a shutter method or optical interference method MEMS (Micro Electro Mechanical Systems) element, a microcapsule method, an electrophoresis method, an electrowetting method, an electronic powder fluid (registered trademark) method, etc. may be used. You can also do it.
  • a QLED (Quantum-dot LED) using a light source and a color conversion technology using a quantum dot material may be used.
  • Examples of display devices using liquid crystal elements include transmissive liquid crystal display devices, reflective liquid crystal display devices, and transflective liquid crystal display devices.
  • VA vertical alignment
  • FFS Flexible Field Switching
  • IPS In-Plane-Switching
  • TN Transmission Nema
  • tic Axially Symmetrically aligned Micro-cell
  • OCB Optically Compensated Birefringence
  • FLC Fluorescence Liqui
  • AFLC AntiFerroelectric Liquid Crystal
  • ECB Electrode Controlled Birefringence
  • guest host mode can be mentioned.
  • VA mode for example, MVA (Multi -Domainin Vertical Alignment) mode, PVA (PATTERNED VERTICAL ALIGNMENT) mode, and ASV (ADVANCED SUPER VIEW) mode. It is listed.
  • the light-emitting element examples include self-emitting light-emitting elements such as LEDs (Light Emitting Diodes), OLEDs (Organic LEDs), and semiconductor lasers.
  • LEDs Light Emitting Diodes
  • OLEDs Organic LEDs
  • semiconductor lasers As the LED, for example, a mini LED, a micro LED, etc. can be used.
  • Examples of the light-emitting substance included in the light-emitting element include a substance that emits fluorescence (fluorescent material), a substance that emits phosphorescence (phosphorescent material), and a substance that exhibits thermally activated delayed fluorescence (thermally activated delayed fluorescence (TADF)). materials), and inorganic compounds (quantum dot materials, etc.).
  • the emitted light color of the light emitting element can be infrared, red, green, blue, cyan, magenta, yellow, white, or the like. Furthermore, color purity can be increased by providing a microcavity structure to the light emitting element.
  • one electrode functions as an anode and the other electrode functions as a cathode.
  • the display device of one embodiment of the present invention is a top-emission type that emits light in the opposite direction to the substrate on which the light-emitting element is formed, and a top-emission type that emits light in the opposite direction to the substrate on which the light-emitting element is formed. It may be either a bottom emission type that emits light on both sides (a bottom emission type) or a dual emission type that emits light on both sides.
  • FIG. 31A shows part of the area including the FPC 172, part of the circuit part 164, part of the display part 162, part of the connection part 140, and part of the area including the end of the display device 50A.
  • An example of a cross section when cut is shown.
  • a display device 50A shown in FIG. 31A includes transistors 205D, 205R, 205G, 205B, a light emitting element 130R, a light emitting element 130G, a light emitting element 130B, etc. between a substrate 151 and a substrate 152.
  • the light emitting element 130R is a display element included in the subpixel 11R that emits red light
  • the light emitting element 130G is a display element included in the subpixel 11G that emits green light
  • the light emitting element 130B is a display element that emits blue light. This is a display element included in the sub-pixel 11B.
  • the SBS structure is applied to the display device 50A.
  • materials and configurations can be optimized for each light emitting element, which increases the degree of freedom in selecting materials and configurations, making it easier to improve brightness and reliability.
  • the display device 50A is a top emission type.
  • a transistor or the like can be placed overlapping the light-emitting region of the light-emitting element, so the aperture ratio of the pixel can be increased compared to the bottom-emission type.
  • the transistors 205D, 205R, 205G, and 205B are all formed on the substrate 151. These transistors can be manufactured using the same material and in the same process.
  • the display device 50A includes the transistor of one embodiment of the present invention in both the display portion 162 and the circuit portion 164.
  • the transistor of one embodiment of the present invention in the display portion 162
  • the pixel size can be reduced and high definition can be achieved.
  • the transistor of one embodiment of the present invention for the circuit portion 164 the area occupied by the circuit portion 164 can be reduced, and the frame can be made narrower.
  • the description in the previous embodiment can be referred to.
  • the transistors 205D, 205R, 205G, and 205B each include a conductive layer 104 functioning as a gate, an insulating layer 106 functioning as a gate insulating layer, conductive layers 112a and 112b functioning as a source and a drain, and a metal.
  • a semiconductor layer 108 including an oxide and an insulating layer 110 are included.
  • Insulating layer 110 is located between conductive layer 112a and conductive layer 112b.
  • Insulating layer 106 is located between conductive layer 104 and semiconductor layer 108.
  • the transistor included in the display device of this embodiment is not limited to the transistor of one embodiment of the present invention.
  • a transistor according to one embodiment of the present invention and a transistor having another structure may be included in combination.
  • the display device of this embodiment may include, for example, one or more of a planar transistor, a staggered transistor, and an inverted staggered transistor.
  • the transistor included in the display device of this embodiment may be either a top gate type or a bottom gate type.
  • gates may be provided above and below the semiconductor layer in which the channel is formed.
  • the display device of this embodiment may include a Si transistor.
  • the OS transistor When the transistor operates in the saturation region, the OS transistor can make the change in the source-drain current smaller than the Si transistor with respect to the change in the gate-source voltage. Therefore, by applying an OS transistor as a drive transistor included in a pixel circuit, the current flowing between the source and drain can be precisely determined by changing the voltage between the gate and source, thereby controlling the amount of current flowing to the light emitting element. can be controlled. Therefore, the number of gradations in the pixel circuit can be increased.
  • OS transistors are able to flow a more stable current (saturation current) than Si transistors even when the source-drain voltage gradually increases. can. Therefore, by using the OS transistor as a drive transistor, a stable current can be passed through the light emitting element even if, for example, there are variations in the current-voltage characteristics of the light emitting element. That is, when the OS transistor operates in the saturation region, the source-drain current does not substantially change even if the source-drain voltage changes, so that the luminance of the light emitting element can be stabilized.
  • the transistor included in the circuit portion 164 and the transistor included in the display portion 162 may have the same structure or may have different structures.
  • the plurality of transistors included in the circuit section 164 may all have the same structure, or may have two or more types.
  • the plurality of transistors included in the display section 162 may all have the same structure, or may have two or more types.
  • All of the transistors included in the display section 162 may be OS transistors, all of the transistors included in the display section 162 may be Si transistors, or some of the transistors included in the display section 162 may be OS transistors and the rest may be Si transistors. good.
  • an LTPS transistor for example, by using both an LTPS transistor and an OS transistor in the display section 162, a display device with low power consumption and high driving ability can be realized. Further, a configuration in which an LTPS transistor and an OS transistor are combined is sometimes referred to as an LTPO. Note that a more preferable example is a configuration in which an OS transistor is used as a transistor that functions as a switch for controlling conduction and non-conduction between wirings, and an LTPS transistor is used as a transistor that controls current.
  • one of the transistors included in the display section 162 functions as a transistor for controlling the current flowing to the light emitting element, and can also be called a drive transistor.
  • One of the source and drain of the drive transistor is electrically connected to the pixel electrode of the light emitting element. It is preferable to use an LTPS transistor as the drive transistor. Thereby, the current flowing through the light emitting element in the pixel circuit can be increased.
  • the other transistor included in the display section 162 functions as a switch for controlling selection and non-selection of pixels, and can also be called a selection transistor.
  • the gate of the selection transistor is electrically connected to the gate line, and one of the source and drain is electrically connected to the source line (signal line). It is preferable to use an OS transistor as the selection transistor. This allows the pixel gradation to be maintained even if the frame frequency is significantly reduced (for example, 1 fps or less), so power consumption can be reduced by stopping the driver when displaying still images. can.
  • An insulating layer 218 is provided to cover the transistors 205D, 205R, 205G, and 205B, and an insulating layer 235 is provided on the insulating layer 218.
  • the insulating layer 218 preferably functions as a protective layer for the transistor.
  • the insulating layer 218 preferably has one or more inorganic insulating films.
  • the inorganic insulating film include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. Specific examples of these inorganic insulating films are as described above.
  • the insulating layer 235 preferably has a function as a planarization layer, and is preferably an organic insulating film.
  • examples of materials that can be used for the organic insulating film include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimide amide resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins.
  • the insulating layer 235 may have a stacked structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 235 preferably functions as an etching protection layer.
  • a recess in the insulating layer 235 can be suppressed during processing of the pixel electrodes 111R, 111G, 111B, etc.
  • a recess may be provided in the insulating layer 235 when processing the pixel electrodes 111R, 111G, 111B, etc.
  • Light emitting elements 130R, 130G, and 130B are provided on the insulating layer 235.
  • the light emitting element 130R includes a pixel electrode 111R on the insulating layer 235, an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R.
  • the light emitting element 130R shown in FIG. 31A emits red light (R).
  • the EL layer 113R has a light emitting layer that emits red light.
  • the light emitting element 130G includes a pixel electrode 111G on the insulating layer 235, an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G.
  • the light emitting element 130G shown in FIG. 31A emits green light (G).
  • the EL layer 113G has a light emitting layer that emits green light.
  • the light emitting element 130B includes a pixel electrode 111B on an insulating layer 235, an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B.
  • the light emitting element 130B shown in FIG. 31A emits blue light (B).
  • the EL layer 113B has a light emitting layer that emits blue light.
  • the thickness is not limited to this.
  • the respective film thicknesses of the EL layers 113R, 113G, and 113B may be different.
  • it is preferable that the film thicknesses of the EL layers 113R, 113G, and 113B are set so that the optical path lengths of the respective emitted lights become stronger. This makes it possible to realize a microcavity structure and improve the color purity of light emitted from each light emitting element.
  • the pixel electrode 111R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.
  • the pixel electrode 111G is electrically connected to the conductive layer 112b of the transistor 205G
  • the pixel electrode 111B is electrically connected to the conductive layer 112b of the transistor 205B.
  • the ends of each of the pixel electrodes 111R, 111G, and 111B are covered with an insulating layer 237.
  • the insulating layer 237 functions as a partition.
  • the insulating layer 237 can be provided in a single layer structure or a laminated structure using one or both of an inorganic insulating material and an organic insulating material.
  • a material that can be used for the insulating layer 218 and a material that can be used for the insulating layer 235 can be used.
  • the insulating layer 237 can electrically insulate the pixel electrode and the common electrode. Further, the insulating layer 237 can electrically insulate adjacent light emitting elements from each other.
  • the insulating layer 237 is provided at least in the display section 162.
  • the insulating layer 237 may be provided not only in the display section 162 but also in the connection section 140 and the circuit section 164. Furthermore, the insulating layer 237 may be provided up to the end of the display device 50A.
  • the common electrode 115 is a continuous film provided in common to the light emitting elements 130R, 130G, and 130B.
  • a common electrode 115 that the plurality of light emitting elements have in common is electrically connected to a conductive layer 123 provided in the connection portion 140. It is preferable to use a conductive layer formed of the same material and in the same process as the pixel electrodes 111R, 111G, and 111B for the conductive layer 123.
  • a conductive film that transmits visible light is used for the light extraction side of the pixel electrode and the common electrode. Further, it is preferable to use a conductive film that reflects visible light for the electrode on the side from which light is not extracted.
  • a conductive film that transmits visible light may also be used for the electrode on the side from which light is not extracted.
  • the material for forming the pair of electrodes of the light emitting element metals, alloys, electrically conductive compounds, mixtures thereof, and the like can be used as appropriate.
  • the materials include aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, and yttrium. , metals such as neodymium, and alloys containing these in appropriate combinations.
  • such materials include indium tin oxide (In-Sn oxide, also referred to as ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide), and In- Examples include W--Zn oxide.
  • such materials include alloys containing aluminum (aluminum alloys) such as alloys of aluminum, nickel, and lanthanum (Al-Ni-La), alloys of silver and magnesium, and alloys of silver, palladium, and copper ( Examples include alloys containing silver such as Ag-Pd-Cu (also referred to as APC).
  • such materials include elements belonging to Group 1 or Group 2 of the Periodic Table of Elements not listed above (e.g., lithium, cesium, calcium, strontium), rare earth metals such as europium, ytterbium, and appropriate combinations of these. Examples include alloys and graphene.
  • a micro optical resonator (microcavity) structure is applied to the light emitting element. Therefore, one of the pair of electrodes included in the light emitting element is preferably an electrode that is transparent and reflective to visible light (semi-transparent/semi-reflective electrode), and the other is an electrode that is reflective to visible light ( A reflective electrode) is preferable. Since the light emitting element has a microcavity structure, the light emitted from the light emitting layer can resonate between both electrodes, and the light emitted from the light emitting element can be intensified.
  • the light transmittance of the transparent electrode is 40% or more.
  • an electrode having a transmittance of visible light (light with a wavelength of 400 nm or more and less than 750 nm) of 40% or more as the transparent electrode of the light emitting element.
  • the visible light reflectance of the semi-transparent/semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less.
  • the visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less.
  • the resistivity of these electrodes is preferably 1 ⁇ 10 ⁇ 2 ⁇ cm or less.
  • the EL layers 113R, 113G, and 113B are each provided in an island shape.
  • the ends of adjacent EL layers 113R and 113G overlap, the ends of adjacent EL layers 113G and EL layers 113B overlap, and the ends of adjacent EL layers
  • the end of the EL layer 113R and the end of the EL layer 113B overlap.
  • the ends of adjacent EL layers may overlap each other, as shown in FIG. 31A, but the invention is not limited to this. That is, adjacent EL layers do not overlap and may be spaced apart from each other. Furthermore, in the display device, there may be both a portion where adjacent EL layers overlap and a portion where adjacent EL layers do not overlap and are separated.
  • Each of the EL layers 113R, 113G, and 113B has at least a light emitting layer.
  • the light-emitting layer has one or more types of light-emitting substances.
  • the luminescent substance a substance exhibiting a luminescent color such as blue, violet, blue-violet, green, yellow-green, yellow, orange, or red is appropriately used.
  • a substance that emits near-infrared light can also be used as the light-emitting substance.
  • Examples of light-emitting substances include fluorescent materials, phosphorescent materials, TADF materials, quantum dot materials, and the like.
  • the light emitting layer may contain one or more types of organic compounds (host material, assist material, etc.) in addition to the light emitting substance (guest material).
  • organic compounds host material, assist material, etc.
  • one or more types of organic compounds one or both of a substance with high hole transport properties (hole transport material) and a substance with high electron transport property (electron transport material) can be used.
  • a bipolar substance a substance with high electron transporting properties and hole transporting properties
  • a TADF material may be used as one or more kinds of organic compounds.
  • the light-emitting layer preferably includes, for example, a phosphorescent material and a hole-transporting material and an electron-transporting material that are a combination that tends to form an exciplex.
  • ExTET Exciplex-Triplet Energy Transfer
  • a combination that forms an exciplex that emits light that overlaps with the wavelength of the lowest energy absorption band of the light-emitting substance energy transfer becomes smoother and luminescence can be efficiently obtained.
  • high efficiency, low voltage drive, and long life of the light emitting element can be achieved at the same time.
  • the EL layer includes a layer containing a substance with high hole injection properties (hole injection layer), a layer containing a hole transporting material (hole transport layer), and a substance with high electron blocking properties.
  • hole injection layer a layer containing a substance with high hole injection properties
  • hole transport layer a layer containing a hole transporting material
  • hole blocking layer a layer containing a substance with high electron blocking property
  • the EL layer may include one or both of a bipolar substance and a TADF material.
  • the light-emitting element can use either a low-molecular compound or a high-molecular compound, and may also contain an inorganic compound.
  • the layers constituting the light emitting element can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, a coating method, or the like.
  • a single structure (a structure having only one light emitting unit) or a tandem structure (a structure having a plurality of light emitting units) may be applied to the light emitting element.
  • the light emitting unit has at least one light emitting layer.
  • the tandem structure is a structure in which a plurality of light emitting units are connected in series via a charge generation layer.
  • the charge generation layer has a function of injecting electrons into one of the two light emitting units and injecting holes into the other when a voltage is applied between the pair of electrodes.
  • the EL layer 113R has a structure that has a plurality of light emitting units that emit red light
  • the EL layer 113G has a structure that has a plurality of light emitting units that emit green light.
  • the EL layer 113B preferably has a structure including a plurality of light emitting units that emit blue light.
  • a protective layer 131 is provided on the light emitting elements 130R, 130G, and 130B.
  • the protective layer 131 and the substrate 152 are bonded together via an adhesive layer 142.
  • a light shielding layer 117 is provided on the substrate 152.
  • a solid sealing structure or a hollow sealing structure can be applied to seal the light emitting element.
  • the space between substrate 152 and substrate 151 is filled with adhesive layer 142, and a solid sealing structure is applied.
  • the space may be filled with an inert gas (such as nitrogen or argon) and a hollow sealing structure may be applied.
  • the adhesive layer 142 may be provided so as not to overlap the light emitting element.
  • the space may be filled with a resin different from that of the adhesive layer 142 provided in a frame shape.
  • the protective layer 131 is provided at least on the display section 162, and is preferably provided so as to cover the entire display section 162. It is preferable that the protective layer 131 is provided so as to cover not only the display section 162 but also the connection section 140 and the circuit section 164. Moreover, it is preferable that the protective layer 131 is provided up to the end of the display device 50A. On the other hand, in the connecting portion 197, there is a portion where the protective layer 131 is not provided in order to electrically connect the FPC 172 and the conductive layer 166.
  • the reliability of the light emitting elements can be improved.
  • the protective layer 131 may have a single layer structure or a laminated structure of two or more layers. Furthermore, the conductivity of the protective layer 131 does not matter. As the protective layer 131, at least one of an insulating film, a semiconductor film, and a conductive film can be used.
  • the protective layer 131 includes an inorganic film, it prevents the common electrode 115 from being oxidized, prevents impurities (moisture, oxygen, etc.) from entering the light emitting element, suppresses deterioration of the light emitting element, and improves the performance of the display device. Reliability can be increased.
  • an inorganic insulating film such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film can be used. Specific examples of these inorganic insulating films are as described above.
  • the protective layer 131 preferably includes a nitride insulating film or a nitride oxide insulating film, and more preferably a nitride insulating film.
  • an inorganic film containing ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, IGZO, or the like can also be used. It is preferable that the inorganic film has a high resistance, and specifically, it is preferable that the inorganic film has a higher resistance than the common electrode 115.
  • the inorganic film may further contain nitrogen.
  • the protective layer 131 When emitting light from the light emitting element is extracted through the protective layer 131, the protective layer 131 preferably has high transparency to visible light.
  • ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials that are highly transparent to visible light.
  • the protective layer 131 for example, a stacked structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a stacked structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used. .
  • the laminated structure it is possible to suppress impurities (water, oxygen, etc.) from entering the EL layer side.
  • the protective layer 131 may include an organic film.
  • the protective layer 131 may include both an organic film and an inorganic film.
  • Examples of the organic film that can be used for the protective layer 131 include an organic insulating film that can be used for the insulating layer 235.
  • a connecting portion 197 is provided in a region of the substrate 151 where the substrate 152 does not overlap.
  • the conductive layer 165 is electrically connected to the FPC 172 via the conductive layer 166 and the connection layer 242.
  • the conductive layer 165 has a single-layer structure of a conductive layer obtained by processing the same conductive film as the conductive layer 112b.
  • the conductive layer 166 has a single-layer structure of a conductive layer obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B.
  • the conductive layer 166 is exposed on the upper surface of the connection portion 197. Thereby, the connection portion 197 and the FPC 172 can be electrically connected via the connection layer 242.
  • the display device 50A is a top emission type. Light emitted by the light emitting element is emitted to the substrate 152 side.
  • the substrate 152 is preferably made of a material that is highly transparent to visible light.
  • the pixel electrodes 111R, 111G, and 111B include a material that reflects visible light, and the counter electrode (common electrode 115) includes a material that transmits visible light.
  • the light shielding layer 117 can be provided between adjacent light emitting elements, at the connection portion 140, the circuit portion 164, and the like.
  • a colored layer such as a color filter may be provided on the surface of the substrate 152 on the substrate 151 side or on the protective layer 131. By providing a color filter overlapping the light emitting element, the color purity of light emitted from the pixel can be increased.
  • the colored layer is a colored layer that selectively transmits light in a specific wavelength range and absorbs light in other wavelength ranges.
  • a red (R) color filter transmits light in the red wavelength range
  • a green (G) color filter transmits light in the green wavelength range
  • a blue (B) color filter transmits light in the blue wavelength range.
  • a color filter or the like can be used.
  • Each colored layer can use one or more of metal materials, resin materials, pigments, and dyes.
  • the colored layer is formed at a desired position by a printing method, an inkjet method, an etching method using a photolithography method, or the like.
  • optical members can be arranged on the outside of the substrate 152 (the surface opposite to the substrate 151).
  • the optical member include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an antireflection layer, and a light collecting film.
  • surface protection is provided such as an antistatic film that suppresses the adhesion of dust, a water-repellent film that prevents dirt from adhering, a hard coat film that suppresses the occurrence of scratches due to use, and a shock absorption layer. Layers may be arranged.
  • a glass layer or a silica layer (SiO x layer) as the surface protective layer, since surface contamination and scratches can be suppressed.
  • the surface protective layer DLC (diamond-like carbon), aluminum oxide (AlO x ), a polyester material, a polycarbonate material, or the like may be used. Note that it is preferable to use a material with high transmittance to visible light for the surface protective layer. Moreover, it is preferable to use a material with high hardness for the surface protective layer.
  • the substrate 151 and the substrate 152 glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, etc. can be used, respectively.
  • a material that transmits the light is used for the substrate on the side from which the light from the light emitting element is extracted. If a flexible material is used for the substrate 151 and the substrate 152, the flexibility of the display device can be increased and a flexible display can be realized. Further, a polarizing plate may be used as at least one of the substrate 151 and the substrate 152.
  • the substrate 151 and the substrate 152 are made of polyester resin such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, or polyether sulfone, respectively.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • PES polyacrylonitrile resin
  • acrylic resin acrylic resin
  • polyimide resin polymethyl methacrylate resin
  • PC polycarbonate
  • PC polyether sulfone
  • PS polyamide resin
  • polysiloxane resin polysiloxane resin
  • cycloolefin resin polystyrene resin
  • polyamideimide resin polyurethane resin
  • polyvinyl chloride resin polyvinylidene chloride resin
  • polypropylene resin polytetrafluoroethylene (PTFE) resin
  • PTFE polytetrafluoroethylene
  • ABS resin cellulose
  • a substrate with high optical isotropy has small birefringence (it can also be said that the amount of birefringence is small).
  • films with high optical isotropy include triacetyl cellulose (TAC, also referred to as cellulose triacetate) film, cycloolefin polymer (COP) film, cycloolefin copolymer (COC) film, and acrylic film.
  • various curable adhesives such as a photo-curable adhesive such as an ultraviolet curable adhesive, a reaction-curable adhesive, a thermosetting adhesive, and an anaerobic adhesive can be used.
  • these adhesives include epoxy resin, acrylic resin, silicone resin, phenol resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, EVA (ethylene vinyl acetate) resin, and the like.
  • materials with low moisture permeability such as epoxy resin are preferred.
  • a two-liquid mixed type resin may be used.
  • an adhesive sheet or the like may be used.
  • connection layer 242 an anisotropic conductive film (ACF), anisotropic conductive paste (ACP), or the like can be used.
  • ACF anisotropic conductive film
  • ACP anisotropic conductive paste
  • FIG. 31B shows an example of a cross section of the display section 162 of the display device 50B.
  • the display device 50B mainly differs from the display device 50A in that a light emitting element having a common EL layer 113 and a colored layer (such as a color filter) are used for subpixels of each color.
  • the configuration shown in FIG. 31B can be combined with the configuration of the region including the FPC 172, the circuit section 164, the stacked structure from the substrate 151 of the display section 162 to the insulating layer 235, the connection section 140, and the end section shown in FIG. 31A. Can be done. Note that in the following description of the display device, description of parts similar to those of the display device described above may be omitted.
  • a display device 50B shown in FIG. 31B includes light emitting elements 130R, 130G, 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, a colored layer 132B that transmits blue light, and the like.
  • the light emitting element 130R includes a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113.
  • the light emitted from the light emitting element 130R is extracted as red light to the outside of the display device 50B via the colored layer 132R.
  • the light emitting element 130G includes a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113.
  • the light emitted from the light emitting element 130G is extracted as green light to the outside of the display device 50B via the colored layer 132G.
  • the light emitting element 130B has a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113.
  • the light emitted from the light emitting element 130B is extracted as blue light to the outside of the display device 50B via the colored layer 132B.
  • the light emitting elements 130R, 130G, and 130B each share an EL layer 113 and a common electrode 115.
  • a configuration in which a common EL layer 113 is provided for subpixels of each color can reduce the number of manufacturing steps, compared to a configuration in which different EL layers are provided for subpixels of each color.
  • the light emitting elements 130R, 130G, and 130B shown in FIG. 31B emit white light.
  • the white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, so that light of a desired color can be obtained.
  • the light emitting element that emits white light includes two or more light emitting layers.
  • the light-emitting layers may be selected such that the emission colors of the two light-emitting layers are complementary colors. For example, by making the light emitting color of the first light emitting layer and the light emitting color of the second light emitting layer complementary, it is possible to obtain a configuration in which the light emitting element as a whole emits white light.
  • the light emitting element as a whole may be configured to emit white light by combining the emitted light colors of the three or more light emitting layers.
  • the EL layer 113 preferably has, for example, a light-emitting layer containing a light-emitting substance that emits blue light and a light-emitting layer containing a light-emitting substance that emits visible light with a longer wavelength than blue light.
  • the EL layer 113 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light.
  • the EL layer 113 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.
  • a tandem structure for the light emitting element that emits white light has a two-stage tandem structure having a light emitting unit that emits yellow light and a light emitting unit that emits blue light, and a light emitting unit that emits red and green light, and a light emitting unit that emits blue light.
  • a three-stage tandem structure, etc. which has a light-emitting unit that emits light of , a light-emitting unit that emits yellow, yellow-green, or green light, a light-emitting unit that emits red light, and a light-emitting unit that emits blue light, etc., is applied. can do.
  • the number of stacked layers and the order of colors of the light-emitting units are: a two-tiered structure of B and Y, a two-tiered structure of B and the light-emitting unit X, a three-tiered structure of B, Y, and B, B, X,
  • the three-layer structure of B is mentioned, and the order of the number of laminated layers and the color of the light-emitting layers in the light-emitting unit
  • the structure can be a three-layer structure of G, R, and G, or a three-layer structure of R, G, and R. Further, another layer may be provided between the two light emitting layers.
  • a light emitting element configured to emit white light may emit light with specific wavelengths such as red, green, or blue being intensified.
  • the light emitting elements 130R, 130G, and 130B shown in FIG. 31B emit blue light.
  • the EL layer 113 has one or more light emitting layers that emit blue light.
  • blue light emitted by the light emitting element 130B can be extracted.
  • a color conversion layer is provided between the light emitting element 130R or the light emitting element 130G and the substrate 152, so that the light emitting element 130R or The blue light emitted by the light emitting element 130G can be converted into light with a longer wavelength, and red or green light can be extracted.
  • a colored layer 132R is provided between the color conversion layer and the substrate 152 on the light emitting element 130R, and a colored layer 132G is provided between the color conversion layer and the substrate 152 on the light emitting element 130G.
  • a part of the light emitted by the light emitting element may be transmitted as is without being converted by the color conversion layer.
  • the colored layer absorbs light of a color other than the desired color, thereby increasing the color purity of the light exhibited by the subpixel.
  • Display device 50C The display device 50C shown in FIG. 32 is mainly different from the display device 50B in that it is a bottom emission type display device.
  • the light emitted by the light emitting element is emitted to the substrate 151 side. It is preferable to use a material that has high transparency to visible light for the substrate 151. On the other hand, the light transmittance of the material used for the substrate 152 does not matter.
  • a light shielding layer 117 is formed between the substrate 151 and the transistor.
  • a light shielding layer 117 is provided on a substrate 151, an insulating layer 153 is provided on the light blocking layer 117, and a transistor 205D, a transistor 205R (not shown), a transistor 205G, a transistor 205B, etc. are provided on the insulating layer 153.
  • a colored layer 132R, a colored layer 132G, and a colored layer 132B are provided on the insulating layer 218, and an insulating layer 235 is provided on the colored layer 132R, the colored layer 132G, and the colored layer 132B.
  • the light emitting element 130R that overlaps the colored layer 132R includes a pixel electrode 111R, an EL layer 113, and a common electrode 115.
  • the light emitting element 130G overlapping the colored layer 132G includes a pixel electrode 111G, an EL layer 113, and a common electrode 115.
  • the light emitting element 130B that overlaps the colored layer 132B includes a pixel electrode 111B, an EL layer 113, and a common electrode 115.
  • the pixel electrodes 111R, 111G, and 111B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom emission type display device, a metal or the like with low resistance can be used for the common electrode 115, so it is possible to suppress a voltage drop caused by the resistance of the common electrode 115, and achieve high display quality.
  • the transistor of one embodiment of the present invention can be miniaturized and occupy a small area; therefore, in a display device with a bottom emission structure, the aperture ratio of a pixel can be increased or the size of a pixel can be reduced.
  • Display device 50D The display device 50D shown in FIG. 33A is mainly different from the display device 50A in that it includes a light receiving element 130S.
  • the display device 50D has a light emitting element and a light receiving element in the pixel.
  • the organic EL element and the organic photodiode can be formed on the same substrate. Therefore, an organic photodiode can be built into a display device using an organic EL element.
  • the display unit 162 has one or both of an imaging function and a sensing function. For example, in addition to displaying an image using all the subpixels of the display device 50D, some subpixels provide light as a light source, some other subpixels perform light detection, and the remaining subpixels You can also display images.
  • the display device 50D it is not necessary to provide a light receiving section and a light source separately from the display device 50D, and the number of parts of the electronic device can be reduced. For example, there is no need to separately provide a biometric authentication device provided in the electronic device or a capacitive touch panel for scrolling or the like. Therefore, by using the display device 50D, it is possible to provide an electronic device with reduced manufacturing cost.
  • the display device 50D can capture an image using the light receiving element.
  • an image sensor can be used to capture images for personal authentication using a fingerprint, a palm print, an iris, a pulse shape (including a vein shape and an artery shape), a face, or the like.
  • the light receiving element can be used as a touch sensor (also referred to as a direct touch sensor) or a non-contact sensor (also referred to as a hover sensor, a hover touch sensor, a touchless sensor), or the like.
  • a touch sensor can detect a target object (such as a finger, hand, or pen) when the display device and the target object (finger, hand, pen, etc.) come into direct contact.
  • a non-contact sensor can detect an object even if the object does not come into contact with the display device.
  • the light receiving element 130S includes a pixel electrode 111S on an insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S.
  • Light Lin enters the functional layer 113S from outside the display device 50D.
  • the pixel electrode 111S is electrically connected to the conductive layer 112b of the transistor 205S through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.
  • the end of the pixel electrode 111S is covered with an insulating layer 237.
  • the common electrode 115 is a continuous film provided in common to the light receiving element 130S, the light emitting element 130R (not shown), the light emitting element 130G, and the light emitting element 130B.
  • a common electrode 115 that the light emitting element and the light receiving element have in common is electrically connected to the conductive layer 123 provided in the connection part 140.
  • the functional layer 113S has at least an active layer (also referred to as a photoelectric conversion layer).
  • the active layer includes a semiconductor.
  • the semiconductor include inorganic semiconductors such as silicon, and organic semiconductors containing organic compounds.
  • an organic semiconductor is used as the semiconductor included in the active layer.
  • the light-emitting layer and the active layer can be formed by the same method (eg, vacuum evaporation method), and manufacturing equipment can be shared, which is preferable.
  • the functional layer 113S may further include a layer containing a substance with high hole transport properties, a substance with high electron transport properties, a bipolar substance, etc. as a layer other than the active layer.
  • the material is not limited to the above, and may further include a layer containing a substance with high hole injection property, a hole blocking material, a substance with high electron injection property, an electron blocking material, or the like.
  • a material that can be used in the above-mentioned light emitting element can be used.
  • the light-receiving element can be made of either a low-molecular compound or a high-molecular compound, and may also contain an inorganic compound.
  • the layers constituting the light-receiving element can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, a coating method, or the like.
  • the display device 50D shown in FIGS. 33B and 33C has a layer 353 having a light receiving element, a circuit layer 355, and a layer 357 having a light emitting element between the substrate 151 and the substrate 152.
  • the layer 353 includes, for example, the light receiving element 130S.
  • the layer 357 includes, for example, light emitting elements 130R, 130G, and 130B.
  • the circuit layer 355 has a circuit that drives the light receiving element and a circuit that drives the light emitting element.
  • the circuit layer 355 includes, for example, transistors 205R, 205G, and 205B.
  • the circuit layer 355 may include one or more of a switch, a capacitor, a resistor, a wiring, a terminal, and the like.
  • FIG. 33B is an example in which the light receiving element 130S is used as a touch sensor. As shown in FIG. 33B, when the finger 352 in contact with the display device 50D reflects the light emitted by the light emitting element in the layer 357, the light receiving element in the layer 353 detects the reflected light. Thereby, it is possible to detect that the finger 352 has touched the display device 50D.
  • FIG. 33C is an example in which the light receiving element 130S is used as a non-contact sensor. As shown in FIG. 33C, the light emitted by the light emitting element in the layer 357 is reflected by the finger 352 that is close to (that is, not in contact with) the display device 50D, and the light receiving element in the layer 353 reflects the light. Detect light.
  • a display device 50E shown in FIG. 34A is an example of a display device to which an MML (metal maskless) structure is applied. That is, the display device 50E has a light emitting element manufactured without using a fine metal mask. Note that the laminated structure from the substrate 151 to the insulating layer 235 and the laminated structure from the protective layer 131 to the substrate 152 are the same as those of the display device 50A, so their explanation will be omitted.
  • light emitting elements 130R, 130G, and 130B are provided on the insulating layer 235.
  • the light emitting element 130R includes a conductive layer 124R on the insulating layer 235, a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode on the common layer 114. 115.
  • the light emitting element 130R shown in FIG. 34A emits red light (R).
  • Layer 133R has a light emitting layer that emits red light.
  • the layer 133R and the common layer 114 can be collectively called an EL layer.
  • one or both of the conductive layer 124R and the conductive layer 126R can be called a pixel electrode.
  • the light emitting element 130G includes a conductive layer 124G on the insulating layer 235, a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode on the common layer 114. 115.
  • the light emitting element 130G shown in FIG. 34A emits green light (G).
  • Layer 133G has a light emitting layer that emits green light.
  • the layer 133G and the common layer 114 can be collectively called an EL layer.
  • one or both of the conductive layer 124G and the conductive layer 126G can be called a pixel electrode.
  • the light emitting element 130B includes a conductive layer 124B on the insulating layer 235, a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode on the common layer 114. 115.
  • the light emitting element 130B shown in FIG. 34A emits blue light (B).
  • Layer 133B has a light emitting layer that emits blue light.
  • the layer 133B and the common layer 114 can be collectively called an EL layer.
  • one or both of the conductive layer 124B and the conductive layer 126B can be called a pixel electrode.
  • a layer provided in an island shape for each light emitting element is referred to as a layer 133B, a layer 133G, or a layer 133R
  • a layer shared by a plurality of light emitting elements is referred to as a layer 133B, a layer 133G, or a layer 133R. It is indicated as a common layer 114.
  • the layers 133R, 133G, and 133B may be referred to as an island-shaped EL layer, an island-shaped EL layer, or the like, without including the common layer 114.
  • the layer 133R, the layer 133G, and the layer 133B are spaced apart from each other.
  • the EL layer in an island shape for each light emitting element, leakage current between adjacent light emitting elements can be suppressed. Thereby, unintended light emission due to crosstalk can be prevented, and a display device with extremely high contrast can be realized.
  • the layers 133R, 133G, and 133B are all shown to have the same thickness, but the thickness is not limited to this.
  • the layers 133R, 133G, and 133B may have different thicknesses.
  • the conductive layer 124R is electrically connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235.
  • the conductive layer 124G is electrically connected to the conductive layer 112b of the transistor 205G
  • the conductive layer 124B is electrically connected to the conductive layer 112b of the transistor 205B.
  • the conductive layers 124R, 124G, and 124B are formed to cover the opening provided in the insulating layer 235.
  • a layer 128 is embedded in each of the recesses of the conductive layers 124R, 124G, and 124B.
  • the layer 128 has a function of flattening the recessed portions of the conductive layers 124R, 124G, and 124B.
  • conductive layers 126R, 126G, 126B are provided which are electrically connected to the conductive layers 124R, 124G, 124B. Therefore, the regions overlapping with the recesses of the conductive layers 124R, 124G, and 124B can also be used as light emitting regions, and the aperture ratio of the pixel can be increased. It is preferable to use a conductive layer that functions as a reflective electrode for the conductive layer 124R and the conductive layer 126R.
  • the layer 128 may be an insulating layer or a conductive layer.
  • various inorganic insulating materials, organic insulating materials, and conductive materials can be used as appropriate.
  • layer 128 is preferably formed using an insulating material, and particularly preferably formed using an organic insulating material.
  • an organic insulating material that can be used for the above-described insulating layer 237 can be applied to the layer 128.
  • FIG. 34A shows an example in which the upper surface of the layer 128 has a flat portion
  • the shape of the layer 128 is not particularly limited.
  • the top surface of layer 128 can have at least one of a convex curve, a concave curve, and a flat surface.
  • the height of the top surface of the layer 128 and the height of the top surface of the conductive layer 124R may match or approximately match, or may be different from each other.
  • the height of the top surface of layer 128 may be lower or higher than the height of the top surface of conductive layer 124R.
  • the end of the conductive layer 126R may be aligned with the end of the conductive layer 124R, or may cover the side surface of the end of the conductive layer 124R. It is preferable that each end of the conductive layer 124R and the conductive layer 126R has a tapered shape. Specifically, each end of the conductive layer 124R and the conductive layer 126R preferably has a tapered shape with a taper angle greater than 0 degrees and less than 90 degrees. When the end portion of the pixel electrode has a tapered shape, the layer 133R provided along the side surface of the pixel electrode has an inclined portion. By tapering the side surfaces of the pixel electrode, it is possible to improve the coverage of the EL layer provided along the side surfaces of the pixel electrode.
  • the conductive layers 124G, 126G and the conductive layers 124B, 126B are the same as the conductive layers 124R, 126R, so a detailed explanation will be omitted.
  • the top and side surfaces of the conductive layer 126R are covered with a layer 133R.
  • the top and side surfaces of conductive layer 126G are covered by layer 133G
  • the top and side surfaces of conductive layer 126B are covered by layer 133B. Therefore, the entire region where the conductive layers 126R, 126G, and 126B are provided can be used as the light emitting region of the light emitting elements 130R, 130G, and 130B, so that the aperture ratio of the pixel can be increased.
  • a portion of the upper surface and side surfaces of each of the layers 133R, 133G, and 133B are covered with insulating layers 125 and 127.
  • a common layer 114 is provided on the layer 133R, layer 133G, layer 133B, and insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114.
  • the common layer 114 and the common electrode 115 are each a continuous film provided in common to a plurality of light emitting elements.
  • the insulating layer 237 shown in FIG. 31A and the like is not provided between the conductive layer 126R and the layer 133R.
  • the display device 50E is not provided with an insulating layer (also referred to as a partition, bank, spacer, etc.) that is in contact with the pixel electrode and covers the upper end of the pixel electrode. Therefore, the interval between adjacent light emitting elements can be made extremely narrow. Therefore, a high-definition or high-resolution display device can be achieved. Further, a mask for forming the insulating layer is not required, and the manufacturing cost of the display device can be reduced.
  • the layer 133R, the layer 133G, and the layer 133B each have a light emitting layer. It is preferable that the layer 133R, the layer 133G, and the layer 133B each include a light emitting layer and a carrier transport layer (an electron transport layer or a hole transport layer) on the light emitting layer. Alternatively, each of the layers 133R, 133G, and 133B preferably includes a light-emitting layer and a carrier block layer (hole block layer or electron block layer) on the light-emitting layer.
  • each of the layers 133R, 133G, and 133B preferably includes a light-emitting layer, a carrier block layer on the light-emitting layer, and a carrier transport layer on the carrier block layer. Since the surfaces of the layer 133R, layer 133G, and layer 133B are exposed during the manufacturing process of the display device, by providing one or both of the carrier transport layer and the carrier block layer on the light emitting layer, the light emitting layer is placed on the outermost surface. Exposure can be suppressed and damage to the light emitting layer can be reduced. Thereby, the reliability of the light emitting element can be improved.
  • the common layer 114 includes, for example, an electron injection layer or a hole injection layer.
  • the common layer 114 may have an electron transport layer and an electron injection layer stacked together, or may have a hole transport layer and a hole injection layer stacked together.
  • the common layer 114 is shared by the light emitting elements 130R, 130G, and 130B.
  • each of the layers 133R, 133G, and 133B are covered with an insulating layer 125.
  • the insulating layer 127 covers each side surface of the layer 133R, layer 133G, and layer 133B with the insulating layer 125 interposed therebetween.
  • the common layer 114 or the common electrode 115
  • the pixel electrode By covering the side surfaces (and part of the top surface) of the layers 133R, 133G, and 133B with at least one of the insulating layer 125 and the insulating layer 127, the common layer 114 (or the common electrode 115) , the pixel electrode, and the side surfaces of the layers 133R, 133G, and 133B, thereby suppressing short-circuiting of the light emitting element. Thereby, the reliability of the light emitting element can be improved.
  • the insulating layer 125 is in contact with each side surface of the layer 133R, layer 133G, and layer 133B. With the structure in which the insulating layer 125 is in contact with the layers 133R, 133G, and 133B, peeling of the layers 133R, 133G, and 133B can be prevented, and the reliability of the light-emitting element can be improved.
  • the insulating layer 127 is provided on the insulating layer 125 so as to fill the recessed portion of the insulating layer 125.
  • the insulating layer 127 covers at least a portion of the side surface of the insulating layer 125.
  • the space between adjacent island-like layers can be filled, so that the surface on which layers (for example, carrier injection layer, common electrode, etc.) to be provided on the island-like layer are formed can be It is possible to reduce unevenness with large height differences and make the surface more flat. Therefore, coverage of the carrier injection layer, the common electrode, etc. can be improved.
  • layers for example, carrier injection layer, common electrode, etc.
  • the common layer 114 and the common electrode 115 are provided on the layer 133R, the layer 133G, the layer 133B, the insulating layer 125, and the insulating layer 127.
  • the stage before providing the insulating layer 125 and the insulating layer 127 there are a region where the pixel electrode and the island-shaped EL layer are provided, a region where the pixel electrode and the island-like EL layer are not provided (a region between the light emitting elements), There is a step caused by this.
  • the step can be flattened, and the coverage of the common layer 114 and the common electrode 115 can be improved. Therefore, connection failures due to disconnection can be suppressed. Further, it is possible to suppress the common electrode 115 from becoming locally thin due to the step difference, thereby preventing an increase in electrical resistance.
  • the upper surface of the insulating layer 127 has a shape with higher flatness.
  • the upper surface of the insulating layer 127 may have at least one of a flat surface, a convex curved surface, and a concave curved surface.
  • the upper surface of the insulating layer 127 preferably has a convex curved shape with a large radius of curvature.
  • the insulating layer 125 can be an insulating layer containing an inorganic material.
  • an inorganic insulating film such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film can be used. Specific examples of these inorganic insulating films are as described above.
  • the insulating layer 125 may have a single layer structure or a laminated structure. In particular, aluminum oxide is preferable because it has a high etching selectivity with respect to the EL layer and has a function of protecting the EL layer in forming an insulating layer 127 to be described later.
  • the insulating layer 125 has fewer pinholes and has an excellent function of protecting the EL layer. can be formed.
  • the insulating layer 125 may have a stacked structure of a film formed by an ALD method and a film formed by a sputtering method.
  • the insulating layer 125 may have a laminated structure of, for example, an aluminum oxide film formed by an ALD method and a silicon nitride film formed by a sputtering method.
  • the insulating layer 125 preferably has a function as a barrier insulating layer against at least one of water and oxygen.
  • the insulating layer 125 preferably has a function of suppressing diffusion of at least one of water and oxygen. Furthermore, the insulating layer 125 preferably has a function of capturing or fixing (also referred to as gettering) at least one of water and oxygen.
  • the insulating layer 125 has a function as a barrier insulating layer, so that it is possible to suppress the intrusion of impurities (typically, at least one of water and oxygen) that can diffuse into each light emitting element from the outside. Become. With this configuration, a highly reliable light emitting element and furthermore a highly reliable display device can be provided.
  • impurities typically, at least one of water and oxygen
  • the insulating layer 125 has a low impurity concentration. This can prevent impurities from entering the EL layer from the insulating layer 125 and deteriorating the EL layer. Furthermore, by lowering the impurity concentration in the insulating layer 125, barrier properties against at least one of water and oxygen can be improved. For example, it is desirable that the insulating layer 125 has sufficiently low hydrogen concentration or carbon concentration, or preferably both.
  • the insulating layer 127 provided on the insulating layer 125 has a function of flattening unevenness with a large height difference in the insulating layer 125 formed between adjacent light emitting elements. In other words, the presence of the insulating layer 127 has the effect of improving the flatness of the surface on which the common electrode 115 is formed.
  • an insulating layer containing an organic material can be suitably used. It is preferable to use a photosensitive organic resin as the organic material, and for example, it is preferable to use a photosensitive resin composition containing an acrylic resin. Note that in this specification and the like, acrylic resin does not refer only to polymethacrylic acid ester or methacrylic resin, but may refer to the entire acrylic polymer in a broad sense.
  • the insulating layer 127 may be made of acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimide amide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenol resin, precursors of these resins, etc. good. Further, as the insulating layer 127, an organic material such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin may be used. Furthermore, a photoresist may be used as the photosensitive resin. As the photosensitive organic resin, either a positive type material or a negative type material may be used.
  • a material that absorbs visible light may be used for the insulating layer 127. Since the insulating layer 127 absorbs light emitted from the light emitting element, light leakage from the light emitting element to an adjacent light emitting element via the insulating layer 127 (stray light) can be suppressed. Thereby, the display quality of the display device can be improved. Furthermore, since display quality can be improved without using a polarizing plate in the display device, the display device can be made lighter and thinner.
  • Materials that absorb visible light include materials that contain pigments such as black, materials that contain dyes, resin materials that have light-absorbing properties (for example, polyimide, etc.), and resin materials that can be used for color filters (color filter materials).
  • pigments such as black
  • resin materials that contain dyes for example, polyimide, etc.
  • resin materials that can be used for color filters color filter materials.
  • by mixing color filter materials of three or more colors it is possible to form a black or nearly black resin layer.
  • FIG. 34B shows an example of a cross section of the display section 162 of the display device 50F.
  • the display device 50F differs from the display device 50E mainly in that a colored layer (such as a color filter) is used for each color subpixel.
  • the configuration shown in FIG. 34B can be combined with the configuration of the area including the FPC 172, the circuit section 164, the laminated structure from the substrate 151 of the display section 162 to the insulating layer 235, the connection section 140, and the end section shown in FIG. 34A. Can be done.
  • the display device 50F shown in FIG. 34B includes light emitting elements 130R, 130G, 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, a colored layer 132B that transmits blue light, and the like.
  • the light emitted from the light emitting element 130R is extracted as red light to the outside of the display device 50F via the colored layer 132R.
  • the light emitted from the light emitting element 130G is extracted as green light to the outside of the display device 50F via the colored layer 132G.
  • the light emitted from the light emitting element 130B is extracted as blue light to the outside of the display device 50F via the colored layer 132B.
  • the light emitting elements 130R, 130G, and 130B each have a layer 133. These three layers 133 are formed using the same material and in the same process. Furthermore, these three layers 133 are spaced apart from each other. By providing the EL layer in an island shape for each light emitting element, leakage current between adjacent light emitting elements can be suppressed. Thereby, unintended light emission due to crosstalk can be prevented, and a display device with extremely high contrast can be realized.
  • light emitting elements 130R, 130G, and 130B shown in FIG. 34B emit white light.
  • the white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, so that light of a desired color can be obtained.
  • the light emitting elements 130R, 130G, and 130B shown in FIG. 34B emit blue light.
  • the layer 133 has one or more light emitting layers that emit blue light.
  • blue light emitted by the light emitting element 130B can be extracted.
  • a color conversion layer is provided between the light emitting element 130R or the light emitting element 130G and the substrate 152, so that the light emitting element 130R or The blue light emitted by the light emitting element 130G can be converted into light with a longer wavelength, and red or green light can be extracted.
  • a colored layer 132R is provided between the color conversion layer and the substrate 152 on the light emitting element 130R, and a colored layer 132G is provided between the color conversion layer and the substrate 152 on the light emitting element 130G.
  • the colored layer absorbs light of a color other than the desired color, thereby increasing the color purity of the light exhibited by the subpixel.
  • Display device 50G The display device 50G shown in FIG. 35 is mainly different from the display device 50F in that it is a bottom emission type display device.
  • the light emitted by the light emitting element is emitted to the substrate 151 side. It is preferable to use a material that has high transparency to visible light for the substrate 151. On the other hand, the light transmittance of the material used for the substrate 152 does not matter.
  • a light shielding layer 117 is formed between the substrate 151 and the transistor.
  • a light shielding layer 117 is provided on a substrate 151, an insulating layer 153 is provided on the light blocking layer 117, and a transistor 205D, a transistor 205R (not shown), a transistor 205G, a transistor 205B, etc. are provided on the insulating layer 153.
  • a colored layer 132R, a colored layer 132G, and a colored layer 132B are provided on the insulating layer 218, and an insulating layer 235 is provided on the colored layer 132R, the colored layer 132G, and the colored layer 132B.
  • the light emitting element 130R overlapping the colored layer 132R includes a conductive layer 124R, a conductive layer 126R, a layer 133, a common layer 114, and a common electrode 115.
  • the light emitting element 130G overlapping the colored layer 132G includes a conductive layer 124G, a conductive layer 126G, a layer 133, a common layer 114, and a common electrode 115.
  • the light emitting element 130B that overlaps the colored layer 132B includes a conductive layer 124B, a conductive layer 126B, a layer 133, a common layer 114, and a common electrode 115.
  • the conductive layers 124R, 124G, 124B, 126R, 126G, and 126B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom emission type display device, a metal or the like with low resistance can be used for the common electrode 115, so it is possible to suppress a voltage drop caused by the resistance of the common electrode 115, and achieve high display quality.
  • the transistor of one embodiment of the present invention can be miniaturized and occupy a small area; therefore, in a display device with a bottom emission structure, the aperture ratio of a pixel can be increased or the size of a pixel can be reduced.
  • Display device 50H The display device 50H shown in FIG. 36 is a VA mode liquid crystal display device.
  • the substrate 151 and the substrate 152 are bonded together by an adhesive layer 144. Further, a liquid crystal 262 is sealed in a region surrounded by the substrate 151, the substrate 152, and the adhesive layer 144.
  • a polarizing plate 260a is located on the outer surface of the substrate 152, and a polarizing plate 260b is located on the outer surface of the substrate 151.
  • a backlight can be provided outside the polarizing plate 260a or outside the polarizing plate 260b.
  • the substrate 151 is provided with transistors 205D, 205R, 205G, a connecting portion 197, a spacer 224, and the like.
  • the transistor 205D is a transistor provided in the circuit portion 164, and the transistors 205R and 205G are transistors provided in the display portion 162.
  • the conductive layer 112b of the transistors 205R and 205G functions as a pixel electrode of the liquid crystal element 60.
  • the substrate 152 is provided with colored layers 132R and 132G, a light shielding layer 117, an insulating layer 225, a conductive layer 263, and the like.
  • the conductive layer 263 functions as a common electrode of the liquid crystal element 60.
  • the transistors 205D, 205R, and 205G each include a conductive layer 112a, a semiconductor layer 108, an insulating layer 106, a conductive layer 104, and a conductive layer 112b.
  • the conductive layer 112a functions as one of a source electrode and a drain electrode
  • the conductive layer 112b functions as the other of a source electrode and a drain electrode.
  • the conductive layer 104 functions as a gate electrode.
  • a portion of the insulating layer 106 functions as a gate insulating layer.
  • the display device 50H includes the transistor of one embodiment of the present invention in both the display portion 162 and the circuit portion 164.
  • the transistor of one embodiment of the present invention in the display portion 162
  • the pixel size can be reduced and high definition can be achieved.
  • the transistor of one embodiment of the present invention for the circuit portion 164 the area occupied by the circuit portion 164 can be reduced, and the frame can be made narrower.
  • the description in the previous embodiment can be referred to.
  • the transistors 205D, 205R, and 205G are covered with an insulating layer 218.
  • the insulating layer 218 functions as a protective layer for the transistors 205D, 205R, and 205G.
  • the subpixel included in the display section 162 includes a transistor, a liquid crystal element 60, and a colored layer.
  • a subpixel that emits red light includes a transistor 205R, a liquid crystal element 60, and a colored layer 132R that transmits red light.
  • the subpixel that emits green light includes a transistor 205G, a liquid crystal element 60, and a colored layer 132G that transmits green light.
  • the subpixel that emits blue light similarly includes a transistor, a liquid crystal element 60, and a colored layer that transmits blue light.
  • the liquid crystal element 60 includes a conductive layer 112b, a conductive layer 263, and a liquid crystal 262 sandwiched between them.
  • a conductive layer 264 located on the same surface as the conductive layer 112a is provided on the substrate 151.
  • the conductive layer 264 has a portion that overlaps with the conductive layer 112b via the insulating layer 110 (the insulating layer 110a, the insulating layer 110b, and the insulating layer 110c).
  • a storage capacitor is formed by the conductive layer 112b, the conductive layer 264, and the insulating layer 110 between them. Note that there may be one or more insulating layers between the conductive layer 112b and the conductive layer 264, and any one or two of the insulating layers 110 may be removed by etching.
  • an insulating layer 225 is provided to cover the colored layers 132R, 132G and the light shielding layer 117.
  • the insulating layer 225 may have a function as a planarization film.
  • the insulating layer 225 can make the surface of the conductive layer 263 approximately flat, so that the alignment state of the liquid crystal 262 can be made uniform.
  • an alignment film for controlling the alignment of the liquid crystal 262 may be provided on the surfaces of the conductive layer 263, the insulating layer 218, etc. that are in contact with the liquid crystal 262 (the alignment film 265 in FIGS. 38A and 38B). ).
  • the conductive layer 112b and the conductive layer 263 transmit visible light.
  • it can be a transmissive liquid crystal device.
  • the alignment of the liquid crystal 262 can be controlled by the voltage applied between the conductive layer 112b and the conductive layer 263, and the optical modulation of light can be controlled. That is, the intensity of light emitted through the polarizing plate 260b can be controlled.
  • the colored layer absorbs incident light outside a specific wavelength range, so that the extracted light becomes, for example, red-colored light.
  • a linearly polarizing plate may be used as the polarizing plate 260b
  • a circularly polarizing plate may also be used.
  • the circularly polarizing plate for example, a stack of a linearly polarizing plate and a quarter wavelength retardation plate can be used.
  • a circularly polarizing plate may also be used as the polarizing plate 260a, or a normal linearly polarizing plate can also be used.
  • a desired contrast can be achieved by adjusting the cell gap, orientation, driving voltage, etc. of the liquid crystal element used in the liquid crystal element 60, depending on the type of polarizing plate applied to the polarizing plate 260a and the polarizing plate 260b.
  • the conductive layer 263 is electrically connected to the conductive layer 166b provided on the substrate 151 side by the connecting body 223 at the connecting portion 140.
  • the conductive layer 166b is connected to the conductive layer 165b through an opening provided in the insulating layer 110. Thereby, a potential or signal can be supplied to the conductive layer 263 from the FPC or IC placed on the substrate 151 side.
  • the conductive layer 165b is formed using the same material as the conductive layer 112a in the same process, and the conductive layer 166b is formed using the same material as the conductive layer 112b in the same process. An example is shown below.
  • conductive particles can be used as the connector 223.
  • the conductive particles particles of organic resin or silica whose surfaces are coated with a metal material can be used. It is preferable to use nickel or gold as the metal material because contact resistance can be reduced. Further, it is preferable to use particles coated with two or more types of metal materials in a layered manner, such as nickel further coated with gold. Further, it is preferable to use a material that deforms elastically or plastically as the connecting body 223. At this time, the conductive particles may have a shape that is collapsed in the vertical direction as shown in FIG. 36.
  • the connecting body 223 is disposed so as to be covered with the adhesive layer 144.
  • a connecting portion 197 is provided in a region near the end of the substrate 151.
  • the conductive layer 166a is electrically connected to the FPC 172 via the connection layer 242.
  • the conductive layer 166a is connected to the conductive layer 165a through an opening provided in the insulating layer 110.
  • the conductive layer 165a is formed using the same material and in the same process as the conductive layer 112a, and the conductive layer 166a is formed using the same material and in the same process as the conductive layer 112b. An example is shown below.
  • a display device 50I shown in FIG. 37 is an FFS mode liquid crystal display device.
  • the display device 50I differs from the display device 50H mainly in the configuration of the liquid crystal element 60.
  • a conductive layer 263 that functions as a common electrode of the liquid crystal element 60 is provided on the insulating layer 110, and an insulating layer 261 is provided on the conductive layer 263. Further, on the insulating layer 261, a conductive layer 112b is provided, which functions as the other of the source electrode and drain electrode of the transistor and the pixel electrode of the liquid crystal element 60. An insulating layer 218 is provided on the conductive layer 112b.
  • the conductive layer 112b has a comb-like shape or a shape provided with slits in a plan view. Further, the conductive layer 263 is arranged to overlap the conductive layer 112b. Further, in the region overlapping with the colored layer, there is a portion where the conductive layer 112b is not disposed on the conductive layer 263.
  • a capacitor is formed by laminating the conductive layer 112b and the conductive layer 263 with the insulating layer 261 in between. Therefore, there is no need to separately form a capacitive element, and the aperture ratio of the pixel can be increased.
  • both the conductive layer 112b and the conductive layer 263 may have a comb-like top surface shape.
  • the display device 50I in the liquid crystal element 60, only one of the conductive layer 112b and the conductive layer 263 has a comb-like upper surface shape, so that the conductive layer 112b and the conductive layer 263 are partially separated. This results in overlapping configurations. Thereby, the capacitance between the conductive layer 112b and the conductive layer 263 can be used as a storage capacitance, there is no need to separately provide a capacitive element, and the aperture ratio of the display device can be increased.
  • Display device 50J In the display device 50J shown in FIG. 38A, the portion of the insulating layer 110b that overlaps with the liquid crystal element 60 is removed by etching.
  • the liquid crystal element 60 included in the display device 50J has a portion in which a conductive layer 112b, an insulating layer 110a, and an insulating layer 110c are stacked in this order.
  • the conductive layer 112b functions as a pixel electrode of the liquid crystal element 60.
  • the conductive layer 112m functions as a common electrode of the liquid crystal element 60.
  • the conductive layer 112m is formed of the same conductive film as the conductive layer 112a.
  • the portion of either or both of the insulating layer 106 and the insulating layer 218 that overlaps with the liquid crystal element 60 may be removed by etching. Alternatively, the insulating layer 218 may not be provided. This makes it easier for the electric fields of the conductive layers 112b and 112m to be transmitted to the liquid crystal 262, allowing the liquid crystal element 60 to operate at high speed. Furthermore, not only the light transmittance in the portion overlapping with the liquid crystal element 60 is increased, but also the influence of interface reflection and interface scattering can be suppressed. Furthermore, a portion of either the insulating layer 110a or the insulating layer 110c overlapping with the liquid crystal element 60 may be removed by etching. This also makes it easier for the electric fields of the conductive layer 112b and the conductive layer 112m to be transmitted to the liquid crystal 262. Furthermore, the capacitance between the conductive layer 112b and the conductive layer 112m can be increased in some cases.
  • both the conductive layer 112b and the conductive layer 112m may have a comb-like top surface shape.
  • the display device 50J in the liquid crystal element 60, only one of the conductive layer 112b and the conductive layer 112m has a comb-like upper surface shape, so that the conductive layer 112b and the conductive layer 112m are partially separated. This results in overlapping configurations. Thereby, the capacitance between the conductive layer 112b and the conductive layer 112m can be used as a storage capacitance, there is no need to separately provide a capacitive element, and the aperture ratio of the display device can be increased.
  • the display device 50K shown in FIG. 38B differs from the display device 50I mainly in that a common electrode is provided on the pixel electrode.
  • the conductive layer 112b of the transistor 100 functions as a pixel electrode in the liquid crystal element 60.
  • An insulating layer 106 and an insulating layer 218 are provided on the conductive layer 112b, and a conductive layer 263 is provided on the insulating layer 218.
  • the conductive layer 263 functions as a common electrode in the liquid crystal element 60.
  • the conductive layer 263 has a comb-like shape or a slit-like shape in plan view.
  • FIG. 39 shows cross-sectional views of three light emitting elements included in the display section 162 and the connection section 140 in each step.
  • a vacuum process such as a vapor deposition method, and a solution process such as a spin coating method or an inkjet method can be used to manufacture a light emitting element.
  • the vapor deposition method include physical vapor deposition methods (PVD method) such as sputtering method, ion plating method, ion beam vapor deposition method, molecular beam vapor deposition method, and vacuum vapor deposition method, and chemical vapor deposition method (CVD method).
  • PVD method physical vapor deposition methods
  • CVD method chemical vapor deposition method
  • the functional layers (hole injection layer, hole transport layer, hole block layer, light emitting layer, electron block layer, electron transport layer, electron injection layer, charge generation layer, etc.) included in the EL layer are formed using the vapor deposition method ( vacuum evaporation method, etc.), coating method (dip coating method, die coating method, bar coating method, spin coating method, spray coating method, etc.), printing method (inkjet method, screen (stencil printing) method, offset (lithographic printing) method, It can be formed by a method such as a flexo (letterpress printing) method, a gravure method, or a microcontact method.
  • the island-like layer (layer containing a light-emitting layer) manufactured by the display device manufacturing method described below is not formed using a fine metal mask, but is formed by forming a light-emitting layer over one surface, and then It is formed by processing using a lithography method. Therefore, it is possible to realize a high-definition display device or a display device with a high aperture ratio, which has been difficult to realize up to now. Furthermore, since the light-emitting layer can be made separately for each color, it is possible to realize a display device with extremely brightness, high contrast, and high display quality. Furthermore, by providing a sacrificial layer over the light-emitting layer, damage to the light-emitting layer during the manufacturing process of a display device can be reduced, and reliability of the light-emitting element can be improved.
  • a display device is composed of three types of light-emitting elements: a light-emitting element that emits blue light, a light-emitting element that emits green light, and a light-emitting element that emits red light
  • the film formation of the light-emitting layer and the photolithography By repeating the processing three times, three types of island-shaped light emitting layers can be formed.
  • pixel electrodes 111R, 111G, 111B and a conductive layer 123 are formed on a substrate 151 on which transistors 205R, 205G, 205B, etc. (not shown) are provided. ( Figure 39A).
  • a sputtering method or a vacuum evaporation method can be used to form the conductive film that will become the pixel electrode.
  • the pixel electrodes 111R, 111G, and 111B and the conductive layer 123 can be formed by forming a resist mask on the conductive film by a photolithography process and then processing the conductive film.
  • a wet etching method and a dry etching method can be used for processing the conductive film.
  • Film 133Bf which will later become a layer 133B, is formed on the pixel electrodes 111R, 111G, and 111B (FIG. 39A).
  • Film 133Bf (later layer 133B) includes a light-emitting layer that emits blue light.
  • an example will be described in which an island-shaped EL layer of a light-emitting element that emits blue light is first formed, and then an island-shaped EL layer of a light-emitting element that emits light of another color is formed. show.
  • the pixel electrodes of the light emitting elements of the second and subsequent colors may be damaged by the previous step. As a result, the driving voltage of the light-emitting elements of the second and subsequent colors may become higher.
  • the display device of one embodiment of the present invention it is preferable to manufacture the display device from an island-shaped EL layer of a light-emitting element that emits light with the shortest wavelength (for example, a blue light-emitting element).
  • the island-shaped EL layers be produced in the order of blue, green, and red, or in the order of blue, red, and green.
  • the state of the interface between the pixel electrode and the EL layer in the blue light emitting element can be maintained in good condition, and the driving voltage of the blue light emitting element can be prevented from increasing. Furthermore, the life of the blue light emitting element can be extended and its reliability can be improved. Note that red and green light emitting elements are less affected by increases in driving voltage than blue light emitting elements, so the driving voltage of the entire display device can be lowered and reliability can be increased.
  • the order in which the island-shaped EL layers are produced is not limited to the above, and may be, for example, in the order of red, green, and blue.
  • the film 133Bf is not formed on the conductive layer 123.
  • the film 133Bf can be formed only in a desired region.
  • a light emitting element can be manufactured through a relatively simple process.
  • the heat resistance temperature of each compound contained in the film 133Bf is preferably 100°C or more and 180°C or less, preferably 120°C or more and 180°C or less, and more preferably 140°C or more and 180°C or less.
  • the reliability of the light emitting element can be improved.
  • the upper limit of the temperature that can be applied in the manufacturing process of a display device can be increased. Therefore, the range of selection of materials and forming methods used in the display device can be expanded, and yield and reliability can be improved.
  • the heat-resistant temperature can be, for example, any one of the glass transition point, softening point, melting point, thermal decomposition temperature, and 5% weight loss temperature, preferably the lowest temperature among these.
  • the film 133Bf can be formed by, for example, a vapor deposition method, specifically, a vacuum vapor deposition method. Further, the film 133Bf may be formed by a method such as a transfer method, a printing method, an inkjet method, or a coating method.
  • a sacrificial layer 118B is formed on the film 133Bf and the conductive layer 123 (FIG. 39A).
  • the sacrificial layer 118B can be formed by forming a resist mask on the film to be the sacrificial layer 118B by a photolithography process and then processing the film.
  • the sacrificial layer 118B is preferably provided so as to cover each end of the pixel electrodes 111R, 111G, and 111B.
  • the end of the layer 133B to be formed in a later step is located outside the end of the pixel electrode 111B. Since the entire upper surface of the pixel electrode 111B can be used as a light emitting region, the aperture ratio of the pixel can be increased. Further, since the end of the layer 133B may be damaged in a step after forming the layer 133B, it is preferable to be located outside the end of the pixel electrode 111B, that is, not to use it as a light emitting region. Thereby, variations in characteristics of the light emitting elements can be suppressed and reliability can be improved.
  • each step after forming the layer 133B can be performed without exposing the pixel electrode 111B. If the end of the pixel electrode 111B is exposed, corrosion may occur during an etching process or the like. By suppressing corrosion of the pixel electrode 111B, the yield and characteristics of the light emitting element can be improved.
  • the sacrificial layer 118B is also provided at a position overlapping the conductive layer 123. This can prevent the conductive layer 123 from being damaged during the manufacturing process of the display device.
  • a film with high resistance to the processing conditions of the film 133Bf specifically, a film with a high etching selectivity with respect to the film 133Bf is used.
  • the sacrificial layer 118B is formed at a temperature lower than the allowable temperature limit of each compound included in the film 133Bf.
  • the substrate temperature when forming the sacrificial layer 118B is typically 200°C or lower, preferably 150°C or lower, more preferably 120°C or lower, more preferably 100°C or lower, and even more preferably 80°C or lower. be.
  • the heat resistant temperature of the compound included in the film 133Bf is high because the temperature at which the sacrificial layer 118B is formed can be increased.
  • the substrate temperature when forming the sacrificial layer 118B can be set to 100° C. or higher, 120° C. or higher, or 140° C. or higher.
  • a sputtering method for example, a sputtering method, an ALD method (including a thermal ALD method and a PEALD method), a CVD method, or a vacuum evaporation method can be used.
  • the film may be formed using the wet film forming method described above.
  • the sacrificial layer 118B (if the sacrificial layer 118B has a layered structure, the layer provided in contact with the film 133Bf) is preferably formed using a formation method that causes less damage to the film 133Bf. For example, it is preferable to use an ALD method or a vacuum evaporation method rather than a sputtering method.
  • the sacrificial layer 118B can be processed by a wet etching method or a dry etching method.
  • the sacrificial layer 118B is preferably processed by anisotropic etching.
  • the wet etching method By using the wet etching method, it is possible to reduce damage to the film 133Bf when processing the sacrificial layer 118B, compared to when using the dry etching method.
  • a developer for example, a developer, a tetramethylammonium hydroxide (TMAH) aqueous solution, dilute hydrofluoric acid, oxalic acid, phosphoric acid, acetic acid, nitric acid, or a mixed solution containing two or more of these can be used.
  • TMAH tetramethylammonium hydroxide
  • a mixed acid chemical solution containing water, phosphoric acid, dilute hydrofluoric acid, and nitric acid may be used.
  • the chemical solution used in the wet etching process may be alkaline or acidic.
  • the sacrificial layer 118B for example, one or more of a metal film, an alloy film, a metal oxide film, a semiconductor film, an inorganic insulating film, and an organic insulating film can be used.
  • the sacrificial layer 118B includes, for example, a metal material such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, titanium, aluminum, yttrium, zirconium, and tantalum, or the metal. Alloy materials including materials can be used.
  • the sacrificial layer 118B includes In-Ga-Zn oxide, indium oxide, In-Zn oxide, In-Sn oxide, indium titanium oxide (In-Ti oxide), and indium tin zinc oxide (In-Sn -Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide), and indium tin oxide containing silicon. objects can be used.
  • the element M is aluminum, silicon, boron, yttrium, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten
  • M is aluminum, silicon, boron, yttrium, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten
  • a semiconductor material such as silicon or germanium can be used as a material that is highly compatible with semiconductor manufacturing processes.
  • oxides or nitrides of the above semiconductor materials can be used.
  • a nonmetallic material such as carbon or a compound thereof can be used.
  • metals such as titanium, tantalum, tungsten, chromium, and aluminum, or alloys containing one or more of these may be used.
  • oxides containing the above metals, such as titanium oxide or chromium oxide, or nitrides, such as titanium nitride, chromium nitride, or tantalum nitride, can be used.
  • Various inorganic insulating films that can be used for the protective layer 131 can be used as the sacrificial layer 118B.
  • an oxide insulating film is preferable because it has higher adhesion to the film 133Bf than a nitride insulating film.
  • an inorganic insulating material such as aluminum oxide, hafnium oxide, silicon oxide, etc. can be used for the sacrificial layer 118B.
  • an aluminum oxide film can be formed using, for example, an ALD method. It is preferable to use the ALD method because damage to the underlying layer (particularly the film 133Bf) can be reduced.
  • an inorganic insulating film e.g., aluminum oxide film
  • an inorganic film e.g., In-Ga-Zn oxide film, silicon film, or a tungsten film
  • the same inorganic insulating film can be used for both the sacrificial layer 118B and the insulating layer 125 that will be formed later.
  • an aluminum oxide film formed using an ALD method can be used for both the sacrificial layer 118B and the insulating layer 125.
  • the same film forming conditions may be applied to the sacrificial layer 118B and the insulating layer 125, or different film forming conditions may be applied to the sacrificial layer 118B and the insulating layer 125.
  • the sacrificial layer 118B can be an insulating layer with high barrier properties against at least one of water and oxygen.
  • the sacrificial layer 118B is a layer that will be mostly or completely removed in a later step, it is preferably easy to process. Therefore, the sacrificial layer 118B is preferably formed under conditions where the substrate temperature during film formation is lower than that of the insulating layer 125.
  • An organic material may be used for the sacrificial layer 118B.
  • a material that can be dissolved in a solvent that is chemically stable for at least the film located at the top of the film 133Bf may be used.
  • materials that dissolve in water or alcohol can be suitably used.
  • the material be dissolved in a solvent such as water or alcohol, applied by a wet film forming method, and then heat treated to evaporate the solvent. At this time, by performing heat treatment under a reduced pressure atmosphere, the solvent can be removed at low temperature and in a short time, so thermal damage to the film 133Bf can be reduced, which is preferable.
  • the sacrificial layer 118B is made of an organic resin such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, alcohol-soluble polyamide resin, or fluororesin such as perfluoropolymer. may also be used.
  • PVA polyvinyl alcohol
  • polyvinyl butyral polyvinylpyrrolidone
  • polyethylene glycol polyglycerin
  • pullulan polyethylene glycol
  • polyglycerin polyglycerin
  • pullulan polyethylene glycol
  • pullulan polyglycerin
  • water-soluble cellulose water-soluble cellulose
  • alcohol-soluble polyamide resin or fluororesin such as perfluoropolymer.
  • an organic film e.g., PVA film
  • an inorganic film e.g., silicon nitride film
  • part of the sacrificial film may remain as a sacrificial layer.
  • the film 133Bf is processed to form a layer 133B (FIG. 39B).
  • the laminated structure of the layer 133B and the sacrificial layer 118B remains on the pixel electrode 111B. Further, the pixel electrode 111R and the pixel electrode 111G are exposed. Further, in a region corresponding to the connection portion 140, the sacrificial layer 118B remains on the conductive layer 123.
  • the processing of the film 133Bf is preferably performed by anisotropic etching.
  • anisotropic dry etching is preferred.
  • wet etching may be used.
  • the steps of forming the film 133Bf, the sacrificial layer 118B, and the same steps as the layer 133B are repeated twice by changing at least the light-emitting substance, thereby forming the layer 133R on the pixel electrode 111R, Then, a stacked structure of a sacrificial layer 118R is formed, and a stacked structure of a layer 133G and a sacrificial layer 118G is formed on the pixel electrode 111G (FIG. 39C).
  • the layer 133R is formed to include a light emitting layer that emits red light
  • the layer 133G is formed to include a light emitting layer that emits green light. Materials that can be used for the sacrificial layer 118B can be applied to the sacrificial layers 118R and 118G, and the same material or different materials may be used for both.
  • the side surfaces of the layers 133B, 133G, and 133R are preferably perpendicular or approximately perpendicular to the surface on which they are formed.
  • the angle between the surface to be formed and these side surfaces be 60 degrees or more and 90 degrees or less.
  • the distance between two adjacent layers 133B, 133G, and 133R formed using the photolithography method is 8 ⁇ m or less, 5 ⁇ m or less, 3 ⁇ m or less, 2 ⁇ m or less, or 1 ⁇ m or less. It can be narrowed down to Here, the distance can be defined as, for example, the distance between two adjacent opposing ends of the layer 133B, the layer 133G, and the layer 133R. In this way, by narrowing the distance between the island-shaped EL layers, a display device with high definition and a large aperture ratio can be provided.
  • an insulating film 125f that will later become the insulating layer 125 is formed so as to cover the pixel electrode, the layer 133B, the layer 133G, the layer 133R, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R, and on the insulating film 125f.
  • An insulating layer 127 is formed (FIG. 39D).
  • an insulating film with a thickness of 3 nm or more, 5 nm or more, or 10 nm or more and 200 nm or less, 150 nm or less, 100 nm or less, or 50 nm or less as the insulating film 125f.
  • the insulating film 125f is preferably formed using, for example, an ALD method. It is preferable to use the ALD method because damage to the film can be reduced and a film with high coverage can be formed. As the insulating film 125f, it is preferable to form an aluminum oxide film using, for example, an ALD method.
  • the insulating film 125f may be formed using a sputtering method, a CVD method, or a PECVD method, which has a faster deposition rate than the ALD method. Thereby, a highly reliable display device can be manufactured with high productivity.
  • the insulating film that becomes the insulating layer 127 is preferably formed by the above-mentioned wet film forming method (for example, spin coating) using, for example, a photosensitive resin composition containing an acrylic resin.
  • a photosensitive resin composition containing an acrylic resin After film formation, it is preferable to perform heat treatment (also referred to as pre-baking) to remove the solvent contained in the insulating film.
  • heat treatment also referred to as pre-baking
  • a part of the insulating film is exposed to light by irradiating visible light or ultraviolet rays.
  • development is performed to remove the exposed area of the insulating film.
  • heat treatment also referred to as post-bake
  • the insulating layer 127 shown in FIG. 39D can be formed.
  • the shape of the insulating layer 127 is not limited to the shape shown in FIG. 39D.
  • the upper surface of the insulating layer 127 may have one or more of a convex curved surface, a concave curved surface, and a flat surface.
  • the insulating layer 127 may cover the side surface of at least one end of the insulating layer 125, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R.
  • etching is performed using the insulating layer 127 as a mask to remove the insulating film 125f and parts of the sacrificial layers 118B, 118G, and 118R.
  • openings are formed in each of the sacrificial layers 118B, 118G, and 118R, and the upper surfaces of the layers 133B, 133G, 133R, and conductive layer 123 are exposed.
  • a portion of the sacrificial layers 118B, 118G, and 118R may remain at positions overlapping with the insulating layer 127 and the insulating layer 125 (see sacrificial layers 119B, 119G, and 119R).
  • the etching process can be performed by dry etching or wet etching. Note that it is preferable if the insulating film 125f is formed using the same material as the sacrificial layers 118B, 118G, and 118R because the etching process can be performed at once.
  • the portions divided into the common layer 114 and the common electrode 115 are created between each light emitting element. It is possible to suppress the occurrence of connection failures caused by , and increases in electrical resistance caused by locally thinner parts. Thereby, the display device of one embodiment of the present invention can improve display quality.
  • the common layer 114 and the common electrode 115 are formed in this order on the insulating layer 127, layer 133B, layer 133G, and layer 133R (FIG. 39F).
  • the common layer 114 can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, a coating method, or the like.
  • the common electrode 115 for example, a sputtering method or a vacuum evaporation method can be used. Alternatively, a film formed by vapor deposition and a film formed by sputtering may be stacked.
  • the island-shaped layer 133B, the island-shaped layer 133G, and the island-shaped layer 133R are not formed using a fine metal mask. Since it is formed by depositing a film over one surface and processing the film, it is possible to form an island-like layer with a uniform thickness. Then, a high-definition display device or a display device with a high aperture ratio can be realized. Furthermore, even if the definition or aperture ratio is high and the distance between subpixels is extremely short, it is possible to suppress the layers 133B, 133G, and 133R from coming into contact with each other in adjacent subpixels. Therefore, generation of leakage current between subpixels can be suppressed. Thereby, unintended light emission due to crosstalk can be prevented, and a display device with extremely high contrast can be realized.
  • the display device of one embodiment of the present invention can achieve both high definition and high display quality.
  • the electronic device of this embodiment includes the display device of one embodiment of the present invention in the display portion.
  • the display device of one embodiment of the present invention can easily achieve high definition and high resolution. Therefore, it can be used in display units of various electronic devices.
  • the semiconductor device of one embodiment of the present invention can also be applied to a device other than a display portion of an electronic device.
  • a device other than a display portion of an electronic device For example, it is preferable to use the semiconductor device of one embodiment of the present invention in a control unit of an electronic device, because it enables lower power consumption.
  • Examples of electronic devices include electronic devices with relatively large screens such as television sets, desktop or notebook personal computers, computer monitors, digital signage, large game machines such as pachinko machines, and digital cameras. , digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, sound reproduction devices, and the like.
  • the display device of one embodiment of the present invention can improve definition, so it can be suitably used for electronic devices having a relatively small display portion.
  • electronic devices include wristwatch-type and bracelet-type information terminals (wearable devices), VR devices such as head-mounted displays, glasses-type AR devices, MR devices, and other head-mounted devices. Examples include wearable devices that can be attached to the device.
  • the display device of one embodiment of the present invention includes HD (number of pixels 1280 x 720), FHD (number of pixels 1920 x 1080), WQHD (number of pixels 2560 x 1440), WQXGA (number of pixels 2560 x 1600), and 4K (number of pixels It is preferable to have an extremely high resolution such as 3840 ⁇ 2160) or 8K (pixel count 7680 ⁇ 4320). In particular, it is preferable to set the resolution to 4K, 8K, or higher.
  • the pixel density (definition) in the display device of one embodiment of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, more preferably 1000 ppi or more, more preferably 2000 ppi or more, and 3000 ppi or more. More preferably, it is 5000 ppi or more, and even more preferably 7000 ppi or more.
  • the display device can support various screen ratios such as 1:1 (square), 4:3, 16:9, and 16:10.
  • the electronic device of this embodiment includes sensors (force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage). , power, radiation, flow rate, humidity, tilt, vibration, odor, or infrared radiation).
  • the electronic device of this embodiment can have various functions. For example, functions that display various information (still images, videos, text images, etc.) on the display, touch panel functions, calendars, functions that display date or time, etc., functions that execute various software (programs), wireless communication. It can have a function, a function of reading a program or data recorded on a recording medium, etc.
  • FIGS. 40A to 40D An example of a wearable device that can be worn on the head will be described with reference to FIGS. 40A to 40D.
  • These wearable devices have at least one of a function of displaying AR content, a function of displaying VR content, a function of displaying SR content, and a function of displaying MR content.
  • an electronic device has a function of displaying at least one content such as AR, VR, SR, and MR, it is possible to enhance the user's immersive feeling.
  • the electronic device 700A shown in FIG. 40A and the electronic device 700B shown in FIG. 40B each include a pair of display panels 751, a pair of casings 721, a communication section (not shown), and a pair of mounting sections 723. It includes a control section (not shown), an imaging section (not shown), a pair of optical members 753, a frame 757, and a pair of nose pads 758.
  • a display device of one embodiment of the present invention can be applied to the display panel 751. Therefore, an electronic device capable of extremely high definition display can be achieved.
  • the electronic device 700A and the electronic device 700B can each project the image displayed on the display panel 751 onto the display area 756 of the optical member 753. Since the optical member 753 has translucency, the user can see the image displayed in the display area superimposed on the transmitted image visually recognized through the optical member 753. Therefore, the electronic device 700A and the electronic device 700B are each electronic devices capable of AR display.
  • the electronic device 700A and the electronic device 700B may be provided with a camera capable of capturing an image of the front as an imaging unit. Further, the electronic device 700A and the electronic device 700B are each equipped with an acceleration sensor such as a gyro sensor to detect the direction of the user's head and display an image corresponding to the direction in the display area 756. You can also.
  • an acceleration sensor such as a gyro sensor to detect the direction of the user's head and display an image corresponding to the direction in the display area 756. You can also.
  • the communication unit has a wireless communication device, and can supply video signals and the like through the wireless communication device.
  • a connector to which a cable to which a video signal and a power supply potential are supplied may be connected may be provided.
  • the electronic device 700A and the electronic device 700B are provided with batteries (not shown), and can be charged wirelessly and/or by wire.
  • the housing 721 may be provided with a touch sensor module.
  • the touch sensor module has a function of detecting that the outer surface of the housing 721 is touched.
  • the touch sensor module can detect a user's tap operation or slide operation, and execute various processes. For example, a tap operation can be used to pause or restart a video, and a slide operation can be used to fast forward or rewind.
  • a tap operation can be used to pause or restart a video
  • a slide operation can be used to fast forward or rewind.
  • the range of operations can be expanded.
  • touch sensors can be applied as the touch sensor module.
  • various methods such as a capacitance method, a resistive film method, an infrared method, an electromagnetic induction method, a surface acoustic wave method, an optical method, etc. can be adopted.
  • a photoelectric conversion element When using an optical touch sensor, a photoelectric conversion element can be used as the light receiving element.
  • the active layer of the photoelectric conversion element one or both of an inorganic semiconductor and an organic semiconductor can be used.
  • Electronic device 800A shown in FIG. 40C and electronic device 800B shown in FIG. It has a pair of imaging units 825 and a pair of lenses 832. Note that the display section 820, communication section 822, and imaging section 825 are omitted in FIG. 40D.
  • a display device of one embodiment of the present invention can be applied to the display portion 820. Therefore, an electronic device capable of extremely high definition display can be achieved. This allows the user to feel highly immersive.
  • the display section 820 is provided inside the housing 821 at a position where it can be viewed through the lens 832. Furthermore, by displaying different images on the pair of display units 820, three-dimensional display using parallax can be performed.
  • the electronic device 800A and the electronic device 800B can each be said to be an electronic device for VR.
  • a user wearing the electronic device 800A or the electronic device 800B can view the image displayed on the display unit 820 through the lens 832.
  • the electronic device 800A and the electronic device 800B each have a mechanism that can adjust the left and right positions of the lens 832 and the display unit 820 so that they are in optimal positions according to the position of the user's eyes. It is preferable that you do so. Further, it is preferable to have a mechanism for adjusting the focus by changing the distance between the lens 832 and the display section 820.
  • the mounting portion 823 allows the user to wear the electronic device 800A or the electronic device 800B on the head.
  • the shape is illustrated as a temple (also referred to as a temple) of glasses, but the shape is not limited to this.
  • the mounting portion 823 only needs to be able to be worn by the user, and may have a helmet-shaped or band-shaped shape, for example.
  • the imaging unit 825 has a function of acquiring external information.
  • the data acquired by the imaging unit 825 can be output to the display unit 820.
  • An image sensor can be used for the imaging unit 825.
  • a plurality of cameras may be provided so as to be able to handle a plurality of angles of view such as telephoto and wide angle.
  • a distance measuring sensor (hereinafter also referred to as a detection unit) that can measure the distance to an object may be provided. That is, the imaging unit 825 is one aspect of a detection unit.
  • the detection unit for example, an image sensor or a distance image sensor such as LIDAR (Light Detection and Ranging) can be used.
  • LIDAR Light Detection and Ranging
  • the electronic device 800A may have a vibration mechanism that functions as a bone conduction earphone.
  • a configuration having the vibration mechanism can be applied to one or more of the display section 820, the housing 821, and the mounting section 823.
  • the user can enjoy video and audio simply by wearing the electronic device 800A without requiring additional audio equipment such as headphones, earphones, or speakers.
  • the electronic device 800A and the electronic device 800B may each have an input terminal.
  • a cable for supplying a video signal from a video output device or the like and power for charging a battery provided in the electronic device can be connected to the input terminal.
  • An electronic device may have a function of wirelessly communicating with the earphone 750.
  • Earphone 750 includes a communication section (not shown) and has a wireless communication function.
  • Earphone 750 can receive information (eg, audio data) from an electronic device using a wireless communication function.
  • electronic device 700A shown in FIG. 40A has a function of transmitting information to earphone 750 using a wireless communication function.
  • electronic device 800A shown in FIG. 40C has a function of transmitting information to earphone 750 using a wireless communication function.
  • the electronic device may have an earphone section.
  • Electronic device 700B shown in FIG. 40B has an earphone section 727.
  • the earphone section 727 and the control section can be configured to be connected to each other by wire.
  • a portion of the wiring connecting the earphone section 727 and the control section may be arranged inside the housing 721 or the mounting section 723.
  • the electronic device 800B shown in FIG. 40D has an earphone section 827.
  • the earphone section 827 and the control section 824 can be configured to be connected to each other by wire.
  • a part of the wiring connecting the earphone section 827 and the control section 824 may be arranged inside the housing 821 or the mounting section 823.
  • the earphone section 827 and the mounting section 823 may include magnets. Thereby, the earphone part 827 can be fixed to the mounting part 823 by magnetic force, which is preferable because storage becomes easy.
  • the electronic device may have an audio output terminal to which earphones, headphones, or the like can be connected. Further, the electronic device may have one or both of an audio input terminal and an audio input mechanism.
  • the audio input mechanism for example, a sound collection device such as a microphone can be used.
  • the electronic device may be provided with a function as a so-called headset.
  • the electronic device of one embodiment of the present invention is suitable for both glasses type (electronic device 700A, electronic device 700B, etc.) and goggle type (electronic device 800A, electronic device 800B, etc.). It is.
  • An electronic device can transmit information to earphones by wire or wirelessly.
  • An electronic device 6500 shown in FIG. 41A is a portable information terminal that can be used as a smartphone.
  • the electronic device 6500 includes a housing 6501, a display portion 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, a light source 6508, and the like.
  • the display section 6502 has a touch panel function.
  • a display device of one embodiment of the present invention can be applied to the display portion 6502.
  • FIG. 41B is a schematic cross-sectional view including the end of the housing 6501 on the microphone 6506 side.
  • a light-transmitting protective member 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, an optical member 6512, a touch sensor panel 6513, and a print are placed in a space surrounded by the housing 6501 and the protective member 6510.
  • a board 6517, a battery 6518, and the like are arranged.
  • a display panel 6511, an optical member 6512, and a touch sensor panel 6513 are fixed to the protective member 6510 with an adhesive layer (not shown).
  • a part of the display panel 6511 is folded back in an area outside the display portion 6502, and an FPC 6515 is connected to the folded part.
  • An IC6516 is mounted on the FPC6515.
  • the FPC 6515 is connected to a terminal provided on a printed circuit board 6517.
  • a flexible display of one embodiment of the present invention can be applied to the display panel 6511. Therefore, extremely lightweight electronic equipment can be realized. Furthermore, since the display panel 6511 is extremely thin, a large-capacity battery 6518 can be mounted while suppressing the thickness of the electronic device. Moreover, by folding back a part of the display panel 6511 and arranging the connection part with the FPC 6515 on the back side of the pixel part, an electronic device with a narrow frame can be realized.
  • FIG. 41C shows an example of a television device.
  • a television device 7100 has a display section 7000 built into a housing 7101. Here, a configuration in which a casing 7101 is supported by a stand 7103 is shown.
  • a display device of one embodiment of the present invention can be applied to the display portion 7000.
  • the television device 7100 shown in FIG. 41C can be operated using an operation switch included in the housing 7101 and a separate remote controller 7111.
  • the display section 7000 may include a touch sensor, and the television device 7100 may be operated by touching the display section 7000 with a finger or the like.
  • the remote control device 7111 may have a display unit that displays information output from the remote control device 7111. Using operation keys or a touch panel included in the remote controller 7111, the channel and volume can be controlled, and the image displayed on the display section 7000 can be controlled.
  • the television device 7100 is configured to include a receiver, a modem, and the like.
  • the receiver can receive general television broadcasts. Also, by connecting to a wired or wireless communication network via a modem, information can be communicated in one direction (from the sender to the receiver) or in both directions (between the sender and the receiver, or between the receivers, etc.). is also possible.
  • FIG. 41D shows an example of a notebook personal computer.
  • the notebook personal computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and the like.
  • a display unit 7000 is incorporated into the housing 7211.
  • a display device of one embodiment of the present invention can be applied to the display portion 7000.
  • FIGS. 41E and 41F An example of digital signage is shown in FIGS. 41E and 41F.
  • the digital signage 7300 shown in FIG. 41E includes a housing 7301, a display section 7000, a speaker 7303, and the like. Furthermore, it can have an LED lamp, an operation key (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like.
  • FIG. 41F shows a digital signage 7400 attached to a cylindrical pillar 7401.
  • Digital signage 7400 has a display section 7000 provided along the curved surface of pillar 7401.
  • the display device of one embodiment of the present invention can be applied to the display portion 7000.
  • the wider the display section 7000 is, the more information that can be provided at once can be increased. Furthermore, the wider the display section 7000 is, the easier it is to attract people's attention, and for example, the effectiveness of advertising can be increased.
  • a touch panel By applying a touch panel to the display section 7000, not only images or videos can be displayed on the display section 7000, but also the user can operate it intuitively, which is preferable. Further, when used for providing information such as route information or traffic information, usability can be improved by intuitive operation.
  • the digital signage 7300 or the digital signage 7400 be able to cooperate with an information terminal 7311 or an information terminal 7411 such as a smartphone owned by the user by wireless communication.
  • advertisement information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411.
  • the display on the display unit 7000 can be switched.
  • the digital signage 7300 or the digital signage 7400 can execute a game using the screen of the information terminal 7311 or the information terminal 7411 as an operation means (controller). This allows an unspecified number of users to participate in and enjoy the game at the same time.
  • the electronic device shown in FIGS. 42A to 42G includes a housing 9000, a display section 9001, a speaker 9003, an operation key 9005 (including a power switch or an operation switch), a connection terminal 9006, and a sensor 9007 (force, displacement, position, speed). , acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, tilt, vibration, odor, or infrared rays. , detection, or measurement), a microphone 9008, and the like.
  • the display device of one embodiment of the present invention can be applied to the display portion 9001.
  • the electronic devices shown in FIGS. 42A to 42G have various functions. For example, functions that display various information (still images, videos, text images, etc.) on the display, touch panel functions, calendars, functions that display date or time, etc., functions that control processing using various software (programs), It can have a wireless communication function, a function of reading and processing programs or data recorded on a recording medium, and the like. Note that the functions of the electronic device are not limited to these, and can have various functions.
  • the electronic device may have multiple display units.
  • the electronic device may be equipped with a camera, etc., and may have the function of taking still images or videos and saving them on a recording medium (external or built-in to the camera), the function of displaying the taken images on a display unit, etc. .
  • FIG. 42A is a perspective view showing the mobile information terminal 9101.
  • the mobile information terminal 9101 can be used as, for example, a smartphone.
  • the mobile information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, and the like.
  • the mobile information terminal 9101 can display text and image information on multiple surfaces thereof.
  • FIG. 42A shows an example in which three icons 9050 are displayed.
  • information 9051 indicated by a dashed rectangle can also be displayed on another surface of the display section 9001. Examples of the information 9051 include notification of incoming e-mail, SNS, telephone, etc., title of e-mail or SNS, sender's name, date and time, remaining battery level, radio wave strength, and the like.
  • an icon 9050 or the like may be displayed at the position where the information 9051 is displayed.
  • FIG. 42B is a perspective view showing the mobile information terminal 9102.
  • the mobile information terminal 9102 has a function of displaying information on three or more sides of the display unit 9001.
  • information 9052, information 9053, and information 9054 are displayed on different surfaces.
  • the user can check the information 9053 displayed at a position visible from above the mobile information terminal 9102 while storing the mobile information terminal 9102 in the chest pocket of clothes. The user can check the display without taking out the mobile information terminal 9102 from his pocket and determine, for example, whether to accept a call.
  • FIG. 42C is a perspective view showing the tablet terminal 9103.
  • the tablet terminal 9103 is capable of executing various applications such as mobile phone calls, e-mail, text viewing and creation, music playback, Internet communication, and computer games, for example.
  • the tablet terminal 9103 has a display section 9001, a camera 9002, a microphone 9008, and a speaker 9003 on the front of the housing 9000, an operation key 9005 as an operation button on the side of the housing 9000, and a connection terminal 9006 on the bottom. has.
  • FIG. 42D is a perspective view showing a wristwatch-type mobile information terminal 9200.
  • the mobile information terminal 9200 can be used, for example, as a smart watch (registered trademark).
  • the display portion 9001 is provided with a curved display surface, and can perform display along the curved display surface.
  • the mobile information terminal 9200 can also make a hands-free call by mutually communicating with a headset capable of wireless communication, for example.
  • the mobile information terminal 9200 can also perform data transmission and charging with other information terminals through the connection terminal 9006. Note that the charging operation may be performed by wireless power supply.
  • FIGS. 42E and 42G are perspective views showing a foldable portable information terminal 9201. Further, FIG. 42E is a perspective view of the portable information terminal 9201 in an unfolded state, FIG. 42G is a folded state, and FIG. 42F is a perspective view of a state in the middle of changing from one of FIGS. 42E and 42G to the other.
  • the portable information terminal 9201 has excellent portability in the folded state, and has excellent display visibility due to its wide seamless display area in the unfolded state.
  • a display portion 9001 included in a mobile information terminal 9201 is supported by three casings 9000 connected by hinges 9055. For example, the display portion 9001 can be bent with a radius of curvature of 0.1 mm or more and 150 mm or less.
  • a semiconductor device including a transistor that is one embodiment of the present invention was manufactured, and the electrical characteristics of the transistor were evaluated.
  • the description related to FIGS. 7A and 7B can be referred to.
  • the descriptions related to FIGS. 28A to 29D can be referred to.
  • the insulating layer 110a has a stacked structure of an insulating layer 110a_1 and an insulating layer 110a_2
  • the insulating layer 110c has a stacked structure of an insulating layer 110c_1 and an insulating layer 110c_2.
  • a conductive layer 112a was formed on the substrate 102.
  • the conductive layer 112a had a stacked structure of a copper film with a thickness of about 300 nm and an In-Sn-Si oxide (ITSO) film with a thickness of about 100 nm.
  • a glass substrate with a size of 600 mm x 720 mm was used as the substrate 102.
  • a silicon nitride film with a thickness of about 70 nm is formed as a first insulating film to become the insulating layer 110a_1, and a silicon nitride film with a thickness of about 100 nm is formed as a second insulating film to become the insulating layer 110a_2.
  • a silicon oxynitride film with a thickness of about 500 nm was formed as the third insulating film (insulating film 110bf) serving as the layer 110b.
  • the first insulating film, the second insulating film, and the third insulating film were each successively formed using the same apparatus using the PECVD method.
  • silane (SiH 4 ), nitrogen (N 2 ), and ammonia (NH 3 ) are used as deposition gases used to form the first insulating film, and are used to form the second insulating film (insulating film 110af).
  • Silane (SiH 4 ) and nitrogen (N 2 ) were used as film-forming gases. That is, the ammonia flow rate ratio when forming the first insulating film was made higher than the ammonia flow rate ratio when forming the second insulating film (insulating film 110af).
  • an IGZO film with a thickness of about 20 nm was formed as a metal oxide layer 139 on the third insulating film (insulating film 110bf).
  • the metal oxide layer 139 was removed.
  • a wet etching method was used to remove the metal oxide layer 139.
  • an IGZO film with a thickness of about 5 nm was formed on the third insulating film (insulating film 110bf) by sputtering.
  • plasma treatment was performed in an atmosphere containing oxygen.
  • An ashing device was used for the plasma treatment.
  • the IGZO film was removed.
  • a wet etching method was used to remove the IGZO film.
  • a silicon nitride film with a thickness of about 50 nm is formed as a fourth insulating film to become the insulating layer 110c_1, and as a fifth insulating film to become the insulating layer 110c_2.
  • a silicon nitride film with a thickness of about 100 nm was formed.
  • the fourth insulating film and the fifth insulating film were each successively formed using the same apparatus using the PECVD method.
  • Silane (SiH 4 ) and nitrogen (N 2 ) are used as the film-forming gas used to form the fourth insulating film, and silane (SiH 4 ) and nitrogen are used as the film-forming gas used to form the fifth insulating film.
  • (N 2 ) and ammonia (NH 3 ) were used. That is, the ammonia flow rate ratio when forming the fifth insulating film was made higher than the ammonia flow rate ratio when forming the fourth insulating film.
  • an In-Sn-Si oxide (ITSO) film with a thickness of about 100 nm was formed as a conductive film 112bf on the fifth insulating film by sputtering.
  • the conductive film 112bf was processed to obtain a conductive layer 112B.
  • the conductive layer 112B in the region overlapping with the conductive layer 112a is removed to form a conductive layer 112b having an opening 143, and the first to fifth insulating films in the region overlapping with the conductive layer 112a are removed.
  • an insulating layer 110 having an opening 141 was formed.
  • a wet etching method was used to remove the conductive layer 112B.
  • a dry etching method was used to remove the first to fifth insulating films.
  • the upper surface shapes of the openings 141 and 143 were circular.
  • a metal oxide film 108f was formed by sputtering so as to cover the openings 141 and 143.
  • the metal oxide film 108f includes a metal oxide film 108af with a thickness of about 1 nm, a metal oxide film 108bf with a thickness of about 10 nm on the metal oxide film 108af, and a metal oxide film 108bf with a thickness of about 5 nm on the metal oxide film 108bf.
  • a metal oxide film 108cf was formed.
  • the metal oxide film 108f was processed to obtain a semiconductor layer 108 including a semiconductor layer 108a, a semiconductor layer 108b, and a semiconductor layer 108c.
  • a silicon oxynitride film with a thickness of approximately 50 nm was formed as the insulating layer 106 by plasma CVD.
  • each conductive film was processed to obtain a conductive layer 104.
  • a silicon nitride oxide film with a thickness of approximately 300 nm was formed as a protective layer by plasma CVD.
  • a polyimide film with a thickness of about 1.5 ⁇ m was formed as a protective layer.
  • the Id-Vg characteristics of the transistor were measured by applying a voltage to the gate electrode (hereinafter also referred to as gate voltage (Vg)) from -10V to +10V in steps of 0.1V. Further, the voltage applied to the source electrode (hereinafter also referred to as source voltage (Vs)) is 0V (comm), and the voltage applied to the drain electrode (hereinafter also referred to as drain voltage (Vd)) is 0.1V and 5V. .1V. Note that the lower limit of drain current (Id) measurement was approximately 1 ⁇ 10 ⁇ 13 A.
  • a transistor with a channel width W100 of approximately 6.3 ⁇ m was measured.
  • the number of measurements was 20 within the plane of a 600 mm x 720 mm substrate.
  • the channel length L100 was approximately 0.5 ⁇ m.
  • FIG. 43 shows the Id-Vg characteristics of the sample.
  • the horizontal axis shows the gate voltage (Vg)
  • the left vertical axis shows the drain current (Id)
  • the right vertical axis shows the field effect mobility ( ⁇ FE) at a drain voltage (Vd) of 5.1V. ) is shown.
  • FIG. 43 shows the Id-Vg characteristics of 20 transistors in an overlapping manner.
  • the average threshold voltage (Vth) of the 20 transistors obtained from each Id-Vg characteristic was -0.08V.
  • the maximum field effect mobility (hereinafter also referred to as maximum field effect mobility) in each transistor is 46 cm 2 /Vs or more, and the average value of the maximum field effect mobility of 20 transistors is 52.6 cm 2 /Vs.
  • the off-state current was smaller than the lower measurement limit (about 1 ⁇ 10 ⁇ 13 A).
  • a transistor with a short channel length has a threshold voltage close to 0V, a large on-current, a high field-effect mobility, and a small off-current.

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  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
PCT/IB2023/058423 2022-09-01 2023-08-25 半導体装置 Ceased WO2024047488A1 (ja)

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JP2024543598A JPWO2024047488A1 (https=) 2022-09-01 2023-08-25
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012174836A (ja) * 2011-02-21 2012-09-10 Fujitsu Ltd 縦型電界効果トランジスタとその製造方法及び電子機器
JP2015156477A (ja) * 2013-12-26 2015-08-27 株式会社半導体エネルギー研究所 半導体装置、および電子機器
JP2017092299A (ja) * 2015-11-12 2017-05-25 株式会社 オルタステクノロジー 薄膜トランジスタ
JP2017168764A (ja) * 2016-03-18 2017-09-21 株式会社ジャパンディスプレイ 半導体装置

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Publication number Priority date Publication date Assignee Title
CN110544436B (zh) 2014-09-12 2021-12-07 株式会社半导体能源研究所 显示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012174836A (ja) * 2011-02-21 2012-09-10 Fujitsu Ltd 縦型電界効果トランジスタとその製造方法及び電子機器
JP2015156477A (ja) * 2013-12-26 2015-08-27 株式会社半導体エネルギー研究所 半導体装置、および電子機器
JP2017092299A (ja) * 2015-11-12 2017-05-25 株式会社 オルタステクノロジー 薄膜トランジスタ
JP2017168764A (ja) * 2016-03-18 2017-09-21 株式会社ジャパンディスプレイ 半導体装置

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