WO2024038410A2 - Mesure de fft intelligente pour capteur reconfigurable à l'aide d'un récepteur numérique à large bande - Google Patents

Mesure de fft intelligente pour capteur reconfigurable à l'aide d'un récepteur numérique à large bande Download PDF

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Publication number
WO2024038410A2
WO2024038410A2 PCT/IB2023/058271 IB2023058271W WO2024038410A2 WO 2024038410 A2 WO2024038410 A2 WO 2024038410A2 IB 2023058271 W IB2023058271 W IB 2023058271W WO 2024038410 A2 WO2024038410 A2 WO 2024038410A2
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WIPO (PCT)
Prior art keywords
input signal
fft
bins
frequency
signal
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PCT/IB2023/058271
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English (en)
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WO2024038410A3 (fr
Inventor
Prasanna Kumar Daram
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Prasanna Kumar Daram
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Publication of WO2024038410A2 publication Critical patent/WO2024038410A2/fr
Publication of WO2024038410A3 publication Critical patent/WO2024038410A3/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
    • H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
    • H04B1/0017—Digital filtering
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/22—Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
    • G06F7/24—Sorting, i.e. extracting data from one or more carriers, rearranging the data in numerical or other ordered sequence, and rerecording the sorted data on the original carrier or on a different carrier or set of carriers sorting methods in general

Definitions

  • Ultra-wideband is a radio technology that can use a very low energy level for short-range, high-bandwidth communications over a large portion of the radio spectrum.
  • UWB has traditional applications in non-cooperative radar imaging. Most recent applications target sensor data collection, precise locating, and tracking.
  • a significant difference between conventional radio transmissions and UWB is that conventional systems transmit information by varying the power level, frequency, and/or phase of a sinusoidal wave.
  • UWB transmissions transmit information by generating radio energy at specific time intervals and occupying a large bandwidth, thus enabling pulse-position or time modulation.
  • a process for finding signals within a frequency range includes converting an analog input signal to a digital domain using an analog-to-digital converter to create a digital input signal.
  • a first fast Fourier transform (FFT) converts the digital input signal to a frequency input signal, which is binned based on frequency and a threshold to create a binary filter.
  • a device for finding signals within a frequency range includes converting an analog input signal to a digital domain using an analog-to-digital converter to create a digital input signal.
  • a first fast Fourier transform converts the digital input signal to a frequency input signal, which is binned based on frequency and a threshold to create a binary filter.
  • FIG. 1 is a block diagram of an ultra-wideband receiver, according to aspects of the present disclosure
  • FIG. 2 is a flow chart of a process for detecting signals in an ultra-wideband signal, according to aspects of the present disclosure
  • FIG. 3 is a visual representation of a bucketization process using the Chinese remainder theorem, according to aspects of the present disclosure
  • FIG. 4 is a block diagram of an ultra-wideband receiver, according to aspects of the present disclosure
  • FIG. 5A is frequency graph of a smart fast Fourier transform (SFFT), according to aspects of the present disclosure.
  • FIG. 5B is a frequency graph of a fast Fourier transform, according to aspects of the present disclosure.
  • FIG. 5C is a frequency spectrum of a SFFT binary filter, according to aspects of the present disclosure.
  • FIG. 6A is a frequency graph of a fast Fourier transform (FFT) showing three signals, according to aspects of the present disclosure.
  • FIG. 5A is frequency graph of a fast Fourier transform (FFT) showing three signals, according to aspects of the present disclosure.
  • FIG. 6B is a frequency graph after bucketization, according to aspects of the present disclosure.
  • FIG. 7 is a block diagram of a computing system that may be used for aspects of the processes and devices disclosed herein, according to aspects of the present disclosure.
  • DETAILED DESCRIPTION [0017] According to aspects of the present disclosure, a smart fast Fourier transform (SFFT) is described that, among other things, allows for an ultra-wideband receiver to quickly detect multiple signals within the ultra-wideband.
  • SFFT smart fast Fourier transform
  • UWB offers low-power execution with a fine time target and a high throughput. To achieve this, UWB sends short bursts of data at short separations without interference with other existing remote communications frameworks.
  • FIG. 1 illustrates an UWB receiver 100 according to aspects of the present disclosure.
  • the UWB receiver 100 includes an analog-to-digital converter (ADC) 102 to convert an analog input signal (e.g., a UWB signal) to a digital domain to create a digital input signal.
  • a sampling rate of the ADC 102 should be at least twice the highest relevant frequency in the received signal. For example, if an analog signal is received that includes relevant frequencies 40-1240 MHz in the time domain, a 2.56 GHz 12-bit ADC may be used to convert the analog input signal to the digital input signal.
  • the ADC 102 feeds both a windowing function 104 and a first FFT 106.
  • the first FFT 106 converts the digital input signal to a frequency input signal, which is binned into bins using a threshold to create a binary filter 108.
  • the windowing function 104 distributes the digital input signal timewise into several registers (e.g., eight, twelve-bit registers where the output of one of eight twelve- bit registers feeds a subsequent twelve-bit register).
  • a 32768-point windowing function can store eight samples of 4096-bit data (e.g., an output of the 12-bit ADC mentioned above) over time and shift that data through the eight samples (e.g., 4096-bit data from register_3 is shifted to register_4, register_4 is shifted to register_5, and so on).
  • the windowing function 104 feeds a first sorter 110 that sorts the digital input signal from the windowing function 104 into containers. For example, a Chinese remainder theorem may be used in this sorting process (bucketization process). For example, twelve continuous digitized information focal points are stored in a container that has four information focal points.
  • a second FFT 112 (with a number of points equal to the number of points of the first FFT 106) converts the sorted digital input signal to a frequency intermediate signal. For example, if the first FFT 106 is a 4096-point FFT, then the second FFT 112 is a 4096-point FFT.
  • the first and second FFTs 106, 112 may be implemented in hardware (e.g., a field programmable gate array, application-specific integrated circuit, etc.), in software running on a processor (e.g., a graphic processing unit, other processors), or both.
  • the output of the second FFT 112 feeds a second sorter 114 that sorts the frequency intermediate signal (i.e., output of the second FFT) into designated bins.
  • the binned frequency intermediate signal is multiplied (by a multiplier 116) with the binary filter to find output signals, which are corrected for error in the error correction 116. Then the output signals are run through an ultra-wideband frequency detector 120 to detect the signals of interest in the received ultra-wideband signal.
  • FIG. 2 illustrates a flow chart for a process 200 of detecting signals in an ultra-wideband signal.
  • a received analog input signal is converted to the digital domain using an analog-to-digital converter (creating a digital input signal).
  • a first FFT converts the digital input signal to a frequency input signal.
  • the digital input signal is also windowed using a window function, as discussed above.
  • the FFT may be implemented in hardware (e.g., a field programmable gate array, application-specific integrated circuit, etc.), in software running on a processor (e.g., a graphic processing unit, other processors), or both.
  • the frequency input signal is binned based on frequency and a threshold to create a binary filter.
  • the digital input signal from step 202 (which may be windowed, as discussed above) is sorted into containers. For example, the Chinese remainder theorem may be used to assign the digital input signal to the containers.
  • a number of points equal to the number of points of the first FFT are collected from the containers, and at 212, the collected points are passed through a second FFT to convert the digital input signal to a frequency intermediate signal. For example, if the FFT is 4096 points, then 4096 pieces of data are used.
  • the frequency intermediate signal is sorted into bins, and at 216 is multiplied using the binary filter from step 206, which creates an output signal that may further be error corrected.
  • the process 200 creates a signal that indicates frequencies and signals carried by those frequencies from an ultra-wideband signal. This process 200 may be used in the receiver of FIG. 1, for military applications, etc.
  • the first and second FFTs are part of an FFT system that includes two FFTs. In various embodiments, the first and second FFTs are part of an FFT system that includes one FFT such that the first and second FFTs are the same FFT.
  • Ultra-Wideband (UWB) is not a regular narrowband radio, it is a remote advanced correspondence framework which uses short beats.
  • UWB ensures low-power execution with a fine time target and high throughput at short separations without interference with other existing remote correspondence frameworks.
  • the beneficiary consists of a wide-band low-noise amplifier (LNA), a wide tuning system, range bandpass filter (BPF), a twofold balanced channel. It also contains a Gilbert blender for downshift of the RF signal to zero-IF in quadrature.
  • LNA wide-band low-noise amplifier
  • BPF range bandpass filter
  • the center of the SFFT algorithm is the implementation of the FFT electronic data. FFT is the critical part of flag handling methods. The formal description of the Fast Fourier Transform can be found in numerous articles and books [18]. In order to group ⁇ ( ⁇ ) electronic data, the Fourier change yields I( ⁇ ).
  • the length of the FFT characterizes the size of the change (N).
  • I( ⁇ ) ( ⁇ 0, ⁇ 1,... ⁇ GLVSOD ⁇ V ⁇ WKH ⁇ FKDQJHG ⁇ IUHTXHQF ⁇ DUHD ⁇ data.
  • FFT Binary Filter Tested information from the front end of the computerized collector is taken from the 2.56 GHz ADC samSOHU ⁇ IRU ⁇ V ⁇ 7KH ⁇ SDLUHG ⁇ channel consists of 1s and 0s.
  • B. Bucketization Chinese remainder theorem is included in the bucketization process. For example, 12 continuous digitized information focal points are stored in a bin and the container has 4 information focal points. In this way, the set consists of ⁇ 1, 6, 11, and 4 ⁇ which is delineated in FIG.3.
  • the nearby pinnacle receiver containers are removed from the SFFT channel.
  • the frequency not on the number receiver can be precisely distinguished.
  • the frequency error assessment is significant.
  • the re-enactment with an input frequency from 40 to 1240 MHz with an increase of 1 MHz is completed.
  • Variety in the sufficiency distinction, as the frequency increments are additionally shown in the side plot. Just when the information frequency is on the integer container, the fullness of the distinction is 0.
  • the relative sufficiency contrasts are approximately 12.5 and 15 dB for frequency errors ⁇ 0.125 and ⁇ 0.25 MHz individually.
  • the FFT can't separate two signals that are near one another.
  • SFFT based collector can precisely distinguish two signals, which have a little frequency partition (1 frequency canister) and powerless.
  • FIG. 5A indicates that it is difficult to recognize input signals from FFT. As indicated in the previous part of the SFFT pseudonym, at any rate, there are 9 separate containers for undersampling rate 9.
  • the proposed SFFT-based receiver is validated by using 5 synchronous info signals with almost 1 frequency container separated.
  • the reported frequency error is found to be less than 0.625 MHz (1 frequency receiver) with a 5-signal information range of 30 dB.
  • SNR distinguished SFFT frequency receivers, identified frequency and recognized frequency error are reported. In this case, the most grounded signal is 11 dB SNR, while the most vulnerable signal is -19 dB SNR and the other three signals are -15 dB SNR.
  • Three signals are observed using standard FFT, as shown in FIG. 6A.
  • the sufficiency of the subsequent frequency is much more modest, and the FFT's power is within the primary flap of the strong signal. In this way, FFT cannot distinguish between two low-quality frequencies close to a solid signal.
  • Data processing system 700 may comprise a symmetric multiprocessor (SMP) system or other configuration including a plurality of processors 710 connected to system bus 730. Alternatively, a single processor 710 may be employed. Also connected to system bus 730 is local memory 720.
  • SMP symmetric multiprocessor
  • An I/O bus bridge 740 is connected to the system bus 730 and provides an interface to an I/O bus 750.
  • the I/O bus may be utilized to support one or more buses and corresponding devices 770, such as storage 760, removable media storage 770, input output devices (I/O devices) 780, network adapters 790, etc.
  • Network adapters may also be coupled to the system to enable the data processing system to become coupled to other data processing systems or remote printers or storage devices through intervening private or public networks.
  • Also connected to the I/O bus may be devices such as a graphics adapter, storage and a computer usable storage medium having computer usable program code embodied thereon.
  • aspects of the present disclosure may be embodied as a system, method or computer program product. Accordingly, aspects of the present disclosure may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit,” “module” or “system.” Furthermore, aspects of the present disclosure may take the form of a computer program product embodied in one or more computer readable storage medium(s) having computer readable program code embodied thereon.
  • the computer readable medium may be a computer readable signal medium or a computer readable storage medium.
  • a computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing.
  • a computer readable storage medium may be any tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device.
  • a computer storage medium does not include propagating signals.
  • a computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof.
  • a computer readable signal medium may be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
  • Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
  • Computer program code for carrying out operations for aspects of the present disclosure may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages.
  • the program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server.
  • the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Network using a Network Service Provider).
  • LAN local area network
  • WAN wide area network
  • Network Service Provider for example, AT&T, MCI, Sprint, EarthLink, MSN, GTE, etc.
  • These computer program instructions may also be stored in a computer readable medium that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the computer readable medium produce an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
  • the computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
  • each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s).
  • the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved.

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
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Abstract

L'invention concerne des processus et des dispositifs pour trouver des signaux dans une plage de fréquences comprenant la conversion d'un signal d'entrée analogique en un domaine numérique à l'aide d'un convertisseur analogique-numérique pour créer un signal d'entrée numérique. Une première transformée de Fourier rapide (FFT) convertit le signal d'entrée numérique en un signal d'entrée de fréquence, qui est lié sur la base de la fréquence et d'un seuil pour créer un filtre binaire. Le signal d'entrée numérique (provenant du convertisseur analogique-numérique) est trié dans des conteneurs (par exemple, à l'aide du théorème restant chinois) et ensuite exécuté à travers une seconde FFT pour convertir le signal d'entrée numérique en un signal intermédiaire de fréquence. Le signal intermédiaire de fréquence est trié en compartiments et multiplié à l'aide du filtre binaire pour créer un signal de fréquence de sortie.
PCT/IB2023/058271 2022-08-18 2023-08-18 Mesure de fft intelligente pour capteur reconfigurable à l'aide d'un récepteur numérique à large bande WO2024038410A2 (fr)

Applications Claiming Priority (4)

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US202263399055P 2022-08-18 2022-08-18
US63/399,055 2022-08-18
US18/449,888 2023-08-15
US18/449,888 US20240063829A1 (en) 2022-08-18 2023-08-15 Smart fft measurement for reconfigurable sensor using a wideband digital receiver

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WO2024038410A2 true WO2024038410A2 (fr) 2024-02-22
WO2024038410A3 WO2024038410A3 (fr) 2024-05-23

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