WO2024034697A1 - Élément électroluminescent à semi-conducteur et dispositif d'affichage - Google Patents

Élément électroluminescent à semi-conducteur et dispositif d'affichage Download PDF

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Publication number
WO2024034697A1
WO2024034697A1 PCT/KR2022/011798 KR2022011798W WO2024034697A1 WO 2024034697 A1 WO2024034697 A1 WO 2024034697A1 KR 2022011798 W KR2022011798 W KR 2022011798W WO 2024034697 A1 WO2024034697 A1 WO 2024034697A1
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Prior art keywords
light emitting
layer
electrode
semiconductor light
emitting device
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PCT/KR2022/011798
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English (en)
Korean (ko)
Inventor
황성현
강병준
전기성
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엘지전자 주식회사
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Priority to PCT/KR2022/011798 priority Critical patent/WO2024034697A1/fr
Publication of WO2024034697A1 publication Critical patent/WO2024034697A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

Definitions

  • Embodiments relate to semiconductor light emitting devices and display devices.
  • LCDs liquid crystal displays
  • OLED displays OLED displays
  • Micro-LED displays Micro-LED displays
  • a micro-LED display is a display that uses micro-LED, a semiconductor light emitting device with a diameter or cross-sectional area of 100 ⁇ m or less, as a display element.
  • micro-LED displays use micro-LED, a semiconductor light-emitting device, as a display device, they have excellent performance in many characteristics such as contrast ratio, response speed, color gamut, viewing angle, brightness, resolution, lifespan, luminous efficiency, and luminance.
  • the micro-LED display has the advantage of being able to freely adjust the size and resolution and implement a flexible display because the screen can be separated and combined in a modular manner.
  • micro-LED displays require more than millions of micro-LEDs, there is a technical problem that makes it difficult to quickly and accurately transfer micro-LEDs to the display panel.
  • Transfer technologies that have been recently developed include the pick and place process, laser lift-off method, or self-assembly method.
  • the self-assembly method is a method in which the semiconductor light-emitting device finds its assembly position within the fluid on its own, and is an advantageous method for implementing a large-screen display device.
  • Figure 1 is a cross-sectional view showing a semiconductor light emitting device according to an undisclosed internal technology.
  • the semiconductor light emitting device 1 includes a passivation layer 3 surrounding the light emitting layer 2 and a side electrode 4 on the side of the light emitting layer 2.
  • the side electrodes 4 are formed not only on the lower side but also on the sides of the light emitting layer 2 by a stuttering process.
  • the side electrode 4 is formed even on the side in contact with the upper side of the light emitting layer 2.
  • Figure 2 is a cross-sectional view showing a display device equipped with a semiconductor light-emitting device according to an undisclosed internal technology.
  • a semiconductor light emitting device 1 is disposed in the assembly hole 5H of the partition 5, and an insulating layer 6 is disposed around the semiconductor light emitting device 1.
  • the insulating layer 6 is formed on the barrier rib 5, and a planarization process is performed until the barrier rib 5 and the passivation layer 3 on the upper side of the semiconductor light emitting device (1) are exposed. (6) is removed. Accordingly, the insulating layer 6 is formed around the semiconductor light-emitting device 1 in the assembly hole 5H. Thereafter, the semiconductor light-emitting device ((1) is exposed so that the upper surface of the semiconductor light-emitting device is exposed. ) is removed.
  • first electrode wire 7 and the second electrode wire 8 are formed.
  • the first electrode wire 7 is connected to the side electrode 4 through the insulating layer 6, and the second electrode wire 7 is connected to the upper side of the light emitting layer 2.
  • the side electrode 4 and the second electrode wiring 8 formed on the side of the semiconductor light emitting device 1 are electrically short-circuited, resulting in lighting failure. That is, the side electrode 4 is formed at the same height as the entire side area of the semiconductor light-emitting device 1, especially the upper side of the light-emitting layer 2, and is formed at the same height as the upper side of the light-emitting layer 2 during the planarization process of the insulating layer 6. exposed. Therefore, when the second electrode wiring 8 is formed on the insulating layer 6 and the light emitting layer 2, the exposed side electrode 3 is in contact with the second electrode wiring 8, and the side electrode 3 An electrical short circuit occurs between the and the second electrode wiring 8. As a result, a lighting defect occurs in which the semiconductor light emitting device 1 does not emit light.
  • the side electrode 4 In order to solve this problem, the side electrode 4 must be formed in the lower area of the side of the light emitting layer 2. However, since metal particles randomly stick to the light-emitting layer 2 through the sputtering process to form the side electrode 4, it is impossible to control the side electrode 4 to be formed only in the lower area of the side of the light-emitting layer 2. do.
  • the embodiments aim to solve the above-described problems and other problems.
  • Another object of the embodiment is to provide a semiconductor light emitting device including a side electrode of a new structure.
  • another object of the embodiment is to provide a display device that can prevent electrical short circuit between the side electrode and the second electrode wiring.
  • Another purpose of the embodiment is to provide a display device that can prevent lighting defects.
  • Another purpose of the embodiment is to provide a display device that can improve fixation force.
  • Another object of the embodiment is to provide a display device that can improve assembly speed.
  • a semiconductor light emitting device includes a light emitting layer; A passivation layer surrounding the light emitting layer; a lower electrode below the light emitting layer; and a side electrode extending from an end of the lower electrode onto a side of the light emitting layer,
  • the side electrode is spaced apart from the side of the light emitting layer.
  • the side electrode may be disposed along the perimeter of the side of the light emitting layer.
  • the semiconductor light emitting device is the semiconductor light emitting device
  • It may include a recess between the side electrode and the side of the light emitting layer.
  • the side electrode may be arranged diagonally relative to the lower electrode.
  • the light emitting layer includes a first conductive semiconductor layer; an active layer on the first conductive semiconductor layer; and a second conductivity type semiconductor layer on the active layer.
  • the length of the side electrode may be smaller than the thickness of the first conductivity type semiconductor layer of the light emitting layer.
  • the side of the light-emitting layer may have an acute angle with respect to the lower side of the light-emitting layer.
  • the side electrode may have an obtuse angle with respect to the horizontal surface of the lower electrode.
  • the separation distance between the side electrode and the side of the light emitting layer may increase along the upper direction.
  • the side electrode may have an acute angle with respect to the side of the light emitting layer.
  • the side electrode may have an obtuse angle with respect to the side of the light emitting layer.
  • the passivation layer has an inner surface in contact with the side surface of the light emitting layer and an outer surface in contact with the side electrode, and the width between the inner surface and the outer surface may decrease along the downward direction.
  • the outer surface may have an acute or obtuse angle with respect to the inner surface.
  • the lower electrode and the side electrode may include a magnetic layer.
  • the display device includes: a substrate; a first assembled wiring on the substrate; a second assembled wiring on the substrate; a partition having an assembly hole on the first assembly wiring and the second assembly wiring; a semiconductor light emitting device in the assembly hole; a first electrode wiring on a side of the semiconductor light emitting device; and a second electrode wiring on the upper side of the semiconductor light emitting device,
  • the semiconductor light emitting device includes a light emitting layer; A passivation layer surrounding the light emitting layer; a lower electrode below the light emitting layer; and a side electrode extending from an end of the lower electrode onto a side of the light-emitting layer, wherein the side electrode is spaced apart from the side of the light-emitting layer,
  • the first electrode wiring is disposed between the side of the light emitting layer and the side electrode.
  • the first electrode wire may be disposed on an outer surface of the side electrode.
  • the first electrode wiring may be connected to the side electrode along the circumference of the semiconductor light emitting device.
  • the display device includes an insulating layer in the assembly hole, wherein the first electrode wire and the second electrode wire are disposed on the same horizontal line, and the first electrode wire penetrates the insulating layer to form the semiconductor. It may be connected to the side electrode of the light emitting device.
  • the first electrode wire may be connected to at least one assembly wiring of the first assembly wiring or the second assembly wiring.
  • the side electrode 154-2 of the semiconductor light emitting device 150 may be arranged to be spaced apart from the side of the light emitting layer 150a. That is, the side electrode 154-2 of the semiconductor light emitting device 150 can be prevented from contacting the side of the light emitting layer 150a. Accordingly, since the light-emitting layer 150a of the side electrode 154-2 of the semiconductor light-emitting device 150 is not formed, as shown in FIG. 24, the upper side of the first semiconductor light-emitting device 150-1 and Even if the second electrode wire 372 is formed to be electrically connected, the second electrode wire 372 is not electrically short-circuited between the side electrodes 154-2 of the first semiconductor light emitting device 150-1. Accordingly, lighting defects due to electrical shorts are prevented, and lighting yield can be improved.
  • the first electrode wiring 371 is not only between the side and the side electrode 154-2 of the light emitting layer 150a of the first semiconductor light emitting device 150-1, but also on the side. Since it is disposed on the outer surface of the electrode 154-2, the fixing force of the first semiconductor light emitting device 150-1 can be strengthened.
  • the first electrode wiring 231 is connected to the corresponding side electrode 154-2. Since they are disposed on the periphery, the fixing force of each of the second semiconductor light emitting device 150-2 and the third semiconductor light emitting device 150-3 can be strengthened.
  • the semiconductor light-emitting device 150 can respond more quickly to the movement of the magnet, thereby improving the assembly speed of the semiconductor light-emitting device 150.
  • Figure 1 is a cross-sectional view showing a semiconductor light emitting device according to an undisclosed internal technology.
  • Figure 2 is a cross-sectional view showing a display device equipped with a semiconductor light-emitting device according to an undisclosed internal technology.
  • Figure 3 shows a living room of a house where a display device according to an embodiment is placed.
  • Figure 4 is a block diagram schematically showing a display device according to an embodiment.
  • FIG. 5 is a circuit diagram showing an example of the pixel of FIG. 4.
  • FIG. 6 is an enlarged view of the first panel area in the display device of FIG. 3.
  • Figure 7 is an enlarged view of area A2 in Figure 6.
  • Figure 8 is a diagram showing an example in which a light emitting device according to an embodiment is assembled on a substrate by a self-assembly method.
  • Figure 9 is a perspective view showing a semiconductor light emitting device according to an embodiment.
  • Figure 10 is a cross-sectional view showing a semiconductor light-emitting device according to an embodiment.
  • Figure 11 shows the shape of a first electrode in a semiconductor light emitting device according to an embodiment.
  • FIG. 12 is an example diagram illustrating an arrangement relationship between a first electrode and a semiconductor light emitting device in a semiconductor light emitting device according to an embodiment.
  • FIG. 13 is another example diagram showing an arrangement relationship between a first electrode and a semiconductor light emitting device in a semiconductor light emitting device according to an embodiment.
  • FIG. 14 is an enlarged view showing area X in FIG. 10.
  • Figure 15 shows a multilayer structure of a first electrode in a semiconductor light emitting device according to an embodiment.
  • 16 to 22 show a manufacturing process of a semiconductor light emitting device according to an embodiment.
  • Figure 23 is a circuit diagram showing a display device according to the first embodiment.
  • Figure 24 is a cross-sectional view showing a display device according to the first embodiment.
  • Figure 25 is a plan view showing the first assembly wiring and the second assembly wiring arranged in the assembly hole.
  • Figure 26 is a cross-sectional view showing a display device according to a second embodiment.
  • Display devices described in this specification include TVs, shines, mobile phones, smart phones, head-up displays (HUDs) for automobiles, backlight units for laptop computers, VR, AR, or mixed reality (MR). ) display, etc. may be included.
  • HUDs head-up displays
  • MR mixed reality
  • the configuration according to the embodiment described in this specification can be applied to a device capable of displaying even if it is a new product type that is developed in the future.
  • Figure 3 shows a living room of a house where a display device according to an embodiment is placed.
  • the display device 100 of the embodiment can display the status of various electronic products such as a washing machine 101, a robot vacuum cleaner 102, and an air purifier 103, and displays the status of each electronic product and an IOT-based You can communicate with each other and control each electronic product based on the user's setting data.
  • the display device 100 may include a flexible display manufactured on a thin and flexible substrate.
  • Flexible displays can bend or curl like paper while maintaining the characteristics of existing flat displays.
  • a unit pixel refers to the minimum unit for implementing one color.
  • a unit pixel of a flexible display may be implemented by a light-emitting device.
  • the light emitting device may be Micro-LED or Nano-LED, but is not limited thereto.
  • FIG. 4 is a block diagram schematically showing a display device according to an embodiment
  • FIG. 5 is a circuit diagram showing an example of the pixel of FIG. 4.
  • a display device may include a display panel 10, a driving circuit 20, a scan driver 30, and a power supply circuit 50.
  • the display device 100 of the embodiment may drive the light emitting device in an active matrix (AM) method or a passive matrix (PM) method.
  • AM active matrix
  • PM passive matrix
  • the driving circuit 20 may include a data driver 21 and a timing control unit 22.
  • the display panel 10 may be rectangular, but is not limited thereto. That is, the display panel 10 may be formed in a circular or oval shape. At least one side of the display panel 10 may be bent to a predetermined curvature.
  • the display panel 10 may be divided into a display area (DA) and a non-display area (NDA) disposed around the display area (DA).
  • the display area DA is an area where sub-pixels PX1, PX2, and PX3 are formed to display an image.
  • the display panel 10 includes data lines (D1 to Dm, m is an integer greater than 2), scan lines (S1 to Sn, n is an integer greater than 2) that intersect the data lines (D1 to Dm), and a high potential voltage.
  • Each of the sub-pixels PX1, PX2, and PX3 may include a first sub-pixel (PX1), a second sub-pixel (PX2), and a third sub-pixel (PX3).
  • the first sub-pixel (PX1) emits a first color light of a first main wavelength
  • the second sub-pixel (PX2) emits a second color light of a second main wavelength
  • the third sub-pixel (PX3) A third color light of a third main wavelength may be emitted.
  • the first color light may be red light
  • the second color light may be green light
  • the third color light may be blue light, but are not limited thereto. Additionally, in FIG.
  • each of the sub-pixels PX1, PX2, and PX3 is illustrated as including three sub-pixels, but the present invention is not limited thereto. That is, each of the sub-pixels (PX1, PX2, and PX3) may include four or more sub-pixels.
  • Each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) includes at least one of the data lines (D1 to Dm), at least one of the scan lines (S1 to Sn), and It can be connected to the above voltage line (VDDL).
  • the first sub-pixel PX1 may include light-emitting devices LD, a plurality of transistors for supplying current to the light-emitting devices LD, and at least one capacitor Cst.
  • each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) may include only one light emitting element (LD) and at least one capacitor (Cst). It may be possible.
  • Each of the light emitting elements LD may be a semiconductor light emitting diode including a first electrode, a plurality of conductive semiconductor layers, and a second electrode.
  • the first electrode may be an anode electrode and the second electrode may be a cathode electrode, but this is not limited.
  • the light emitting device may be one of a horizontal light emitting device, a flip chip type light emitting device, and a vertical light emitting device.
  • the plurality of transistors may include a driving transistor (DT) that supplies current to the light emitting elements (LD) and a scan transistor (ST) that supplies a data voltage to the gate electrode of the driving transistor (DT).
  • the driving transistor DT is connected to a gate electrode connected to the source electrode of the scan transistor ST, a source electrode connected to the high potential voltage line VDDL to which a high potential voltage is applied, and the first electrodes of the light emitting elements LD. It may include a connected drain electrode.
  • the scan transistor (ST) has a gate electrode connected to the scan line (Sk, k is an integer satisfying 1 ⁇ k ⁇ n), a source electrode connected to the gate electrode of the driving transistor (DT), and a data line (Dj, j). It may include a drain electrode connected to an integer satisfying 1 ⁇ j ⁇ m.
  • the capacitor Cst is formed between the gate electrode and the source electrode of the driving transistor DT.
  • the storage capacitor (Cst) charges the difference between the gate voltage and source voltage of the driving transistor (DT).
  • the driving transistor (DT) and the scan transistor (ST) may be formed of a thin film transistor.
  • the driving transistor (DT) and the scan transistor (ST) are mainly described as being formed of a P-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor), but the present invention is not limited thereto.
  • the driving transistor (DT) and scan transistor (ST) may be formed of an N-type MOSFET. In this case, the positions of the source and drain electrodes of the driving transistor (DT) and the scan transistor (ST) may be changed.
  • each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) includes one driving transistor (DT), one scan transistor (ST), and one capacitor ( Although it is exemplified to include 2T1C (2 Transistor - 1 capacitor) with Cst), the present invention is not limited thereto.
  • Each of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3) may include a plurality of scan transistors (ST) and a plurality of capacitors (Cst).
  • the second sub-pixel (PX2) and the third sub-pixel (PX3) can be represented by substantially the same circuit diagram as the first sub-pixel (PX1), detailed descriptions thereof will be omitted.
  • the driving circuit 20 outputs signals and voltages for driving the display panel 10.
  • the driving circuit 20 may include a data driver 21 and a timing controller 22.
  • the data driver 21 receives digital video data (DATA) and source control signal (DCS) from the timing control unit 22.
  • the data driver 21 converts digital video data (DATA) into analog data voltages according to the source control signal (DCS) and supplies them to the data lines (D1 to Dm) of the display panel 10.
  • the timing control unit 22 receives digital video data (DATA) and timing signals from the host system.
  • Timing signals may include a vertical sync signal, a horizontal sync signal, a data enable signal, and a dot clock.
  • the host system may be an application processor in a smartphone or tablet PC, a monitor, or a system-on-chip in a TV.
  • the timing control unit 22 generates control signals to control the operation timing of the data driver 21 and the scan driver 30.
  • the control signals may include a source control signal (DCS) for controlling the operation timing of the data driver 21 and a scan control signal (SCS) for controlling the operation timing of the scan driver 30.
  • DCS source control signal
  • SCS scan control signal
  • the driving circuit 20 may be disposed in the non-display area (NDA) provided on one side of the display panel 10.
  • the driving circuit 20 may be formed of an integrated circuit (IC) and mounted on the display panel 10 using a chip on glass (COG) method, a chip on plastic (COP) method, or an ultrasonic bonding method.
  • COG chip on glass
  • COP chip on plastic
  • ultrasonic bonding method The present invention is not limited to this.
  • the driving circuit 20 may be mounted on a circuit board (not shown) rather than on the display panel 10.
  • the data driver 21 may be mounted on the display panel 10 using a chip on glass (COG) method, a chip on plastic (COP) method, or an ultrasonic bonding method, and the timing control unit 22 may be mounted on a circuit board. there is.
  • COG chip on glass
  • COP chip on plastic
  • the scan driver 30 receives a scan control signal (SCS) from the timing controller 22.
  • the scan driver 30 generates scan signals according to the scan control signal SCS and supplies them to the scan lines S1 to Sn of the display panel 10.
  • the scan driver 30 may include a plurality of transistors and may be formed in the non-display area NDA of the display panel 10.
  • the scan driver 30 may be formed as an integrated circuit, and in this case, it may be mounted on a gate flexible film attached to the other side of the display panel 10.
  • the circuit board may be attached to pads provided at one edge of the display panel 10 using an anisotropic conductive film. Because of this, the lead lines of the circuit board can be electrically connected to the pads.
  • the circuit board may be a flexible printed circuit board, a printed circuit board, or a flexible film such as a chip on film. The circuit board may be bent toward the bottom of the display panel 10. Because of this, one side of the circuit board is attached to one edge of the display panel 10, and the other side is placed below the display panel 10 and can be connected to a system board on which the host system is mounted.
  • the power supply circuit 50 may generate voltages necessary for driving the display panel 10 from the main power supplied from the system board and supply them to the display panel 10.
  • the power supply circuit 50 generates a high potential voltage (VDD) and a low potential voltage (VSS) for driving the light emitting elements (LD) of the display panel 10 from the main power supply to It can be supplied to the high potential voltage line (VDDL) and low potential voltage line (VSSL).
  • the power supply circuit 50 may generate and supply driving voltages for driving the driving circuit 20 and the scan driver 30 from the main power supply.
  • FIG. 6 is an enlarged view of the first panel area in the display device of FIG. 3.
  • the display device 100 of the embodiment may be manufactured by mechanically and electrically connecting a plurality of panel areas, such as the first panel area A1, through tiling.
  • the first panel area A1 may include a plurality of semiconductor light emitting devices 150 arranged for each unit pixel (PX in FIG. 4).
  • the unit sub-pixels may include a first sub-pixel (PX1), a second sub-pixel (PX2), and a third sub-pixel (PX3).
  • a plurality of red semiconductor light-emitting devices 150R are disposed in the first sub-pixel PX1
  • a plurality of green semiconductor light-emitting devices 150G are disposed in the second sub-pixel PX2
  • a plurality of blue semiconductor light-emitting devices are disposed in the second sub-pixel PX2.
  • (150B) may be disposed in the third sub-pixel (PX3).
  • the unit sub-pixels (PX1, PX2, and PX3) may further include a fourth sub-pixel in which no semiconductor light-emitting device is disposed, but this is not limited.
  • Figure 7 is an enlarged view of area A2 in Figure 6.
  • the display device 100 of the embodiment may include a substrate 200, assembly wiring 201 and 202, an insulating layer 206, and a plurality of semiconductor light emitting devices 150. More components may be included than this.
  • the assembly wiring may include a first assembly wiring 201 and a second assembly wiring 202 that are spaced apart from each other.
  • the first assembly wiring 201 and the second assembly wiring 202 may be provided to generate dielectrophoresis force (DEP force) to assemble the semiconductor light emitting device 150.
  • the semiconductor light emitting device 150 may be one of a horizontal semiconductor light emitting device, a flip chip type semiconductor light emitting device, and a vertical semiconductor light emitting device.
  • the semiconductor light-emitting device 150 may include, but is not limited to, a red semiconductor light-emitting device 150, a green semiconductor light-emitting device 150G, and a blue semiconductor light-emitting device 150B0 to form a unit pixel (sub-pixel).
  • red and green phosphors may be provided to implement red and green colors, respectively.
  • the substrate 200 may be a support member that supports components disposed on the substrate 200 or a protection member that protects the components.
  • the substrate 200 may be a rigid substrate or a flexible substrate.
  • the substrate 200 may be made of sapphire, glass, silicon, or polyimide. Additionally, the substrate 200 may include a flexible material such as PEN (Polyethylene Naphthalate) or PET (Polyethylene Terephthalate). Additionally, the substrate 200 may be made of a transparent material, but is not limited thereto.
  • the substrate 200 may function as a support substrate in a display panel, and may also function as an assembly substrate when self-assembling a light emitting device.
  • the substrate 200 may be a backplane equipped with circuits in the sub-pixels (PX1, PX2, PX3) shown in FIGS. 4 and 5, such as transistors (ST, DT), capacitors (Cst), signal wires, etc.
  • PX1, PX2, PX3 sub-pixels shown in FIGS. 4 and 5, such as transistors (ST, DT), capacitors (Cst), signal wires, etc.
  • ST, DT transistors
  • Cst capacitors
  • signal wires etc.
  • the insulating layer 206 may include an insulating and flexible organic material such as polyimide, PAC, PEN, PET, polymer, etc., or an inorganic material such as silicon oxide (SiO2) or silicon nitride series (SiNx), and may include a substrate. (200) may be integrated to form one substrate.
  • the insulating layer 206 may be a conductive adhesive layer that has adhesiveness and conductivity, and the conductive adhesive layer may be flexible and enable a flexible function of the display device.
  • the insulating layer 206 may be an anisotropic conductive film (ACF) or a conductive adhesive layer such as an anisotropic conductive medium or a solution containing conductive particles.
  • the conductive adhesive layer may be a layer that is electrically conductive in a direction perpendicular to the thickness, but electrically insulating in a direction horizontal to the thickness.
  • the insulating layer 206 may include an assembly hole 203 into which the semiconductor light emitting device 150 is inserted. Therefore, during self-assembly, the semiconductor light emitting device 150 can be easily inserted into the assembly hole 203 of the insulating layer 206.
  • the assembly hole 203 may be called an insertion hole, a fixing hole, an alignment hole, etc.
  • the assembly hall 203 may also be called a hall.
  • the assembly hole 203 may be called a hole, groove, groove, recess, pocket, etc.
  • the assembly hole 203 may be different depending on the shape of the semiconductor light emitting device 150.
  • the red semiconductor light emitting device, the green semiconductor light emitting device, and the blue semiconductor light emitting device each have different shapes, and may have an assembly hole 203 having a shape corresponding to the shape of each of these semiconductor light emitting devices.
  • the assembly hole 203 may include a first assembly hole for assembling a red semiconductor light emitting device, a second assembly hole for assembling a green semiconductor light emitting device, and a third assembly hole for assembling a blue semiconductor light emitting device. there is.
  • the red semiconductor light emitting device has a circular shape
  • the green semiconductor light emitting device has a first oval shape with a first minor axis and a second major axis
  • the blue semiconductor light emitting device has a second oval shape with a second minor axis and a second major axis.
  • the second major axis of the oval shape of the blue semiconductor light emitting device may be greater than the second major axis of the oval shape of the green semiconductor light emitting device
  • the second minor axis of the oval shape of the blue semiconductor light emitting device may be smaller than the first minor axis of the oval shape of the green semiconductor light emitting device.
  • methods for mounting the semiconductor light emitting device 150 on the substrate 200 may include, for example, a self-assembly method (FIG. 8) and a transfer method.
  • Figure 8 is a diagram showing an example in which a light emitting device according to an embodiment is assembled on a substrate by a self-assembly method.
  • the assembled substrate 200 which will be described later, can also function as the panel substrate 200a in a display device after assembly of the light emitting device, but the embodiment is not limited thereto.
  • the semiconductor light emitting device 150 may be introduced into the chamber 1300 filled with the fluid 1200, and the semiconductor light emitting device 150 may be placed on the assembly substrate ( 200). At this time, the light emitting device 150 adjacent to the assembly hole 207H of the assembly substrate 200 may be assembled into the assembly hole 207H by DEP force caused by the electric field of the assembly wiring.
  • the fluid 1200 may be water such as ultrapure water, but is not limited thereto.
  • the chamber may be called a water tank, container, vessel, etc.
  • the assembled substrate 200 may be placed on the chamber 1300. Depending on the embodiment, the assembled substrate 200 may be input into the chamber 1300.
  • the semiconductor light emitting device 150 may be implemented as a vertical semiconductor light emitting device as shown, but is not limited to this and a horizontal light emitting device may be employed.
  • the semiconductor light emitting device 150 may include a magnetic layer (not shown) containing a magnetic material.
  • the magnetic layer may include a magnetic metal such as nickel (Ni). Since the semiconductor light emitting device 150 introduced into the fluid includes a magnetic layer, it can move to the assembly substrate 200 by the magnetic field generated from the assembly device 1100.
  • the magnetic layer may be disposed on the top or bottom or on both sides of the light emitting device.
  • the assembly substrate 200 may include a pair of first assembly wiring lines 201 and second assembly wiring lines 202 corresponding to each of the semiconductor light emitting devices 150 to be assembled.
  • Each of the first assembled wiring 201 and the second assembled wiring 202 may be formed by stacking multiple single metals, metal alloys, metal oxides, etc.
  • the first assembled wiring 201 and the second assembled wiring 202 each have Cu, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf It may be formed including at least one of the following, but is not limited thereto.
  • the gap between the first assembly wiring 201 and the second assembly wiring 202 may be smaller than the width of the semiconductor light emitting device 150 and the width of the assembly hole 207H, and the assembly of the semiconductor light emitting device 150 using an electric field. The position can be fixed more precisely.
  • An insulating layer 215 is formed on the first assembled wiring 201 and the second assembled wiring 202 to protect the first assembled wiring 201 and the second assembled wiring 202 from the fluid 1200, and Leakage of current flowing through the first assembly wiring 201 and the second assembly wiring 202 can be prevented.
  • the insulating layer 215 may be formed of a single layer or multiple layers of an inorganic insulator such as silica or alumina or an organic insulator.
  • the insulating layer 215 may have a minimum thickness to prevent damage to the first assembly wiring 201 and the second assembly wiring 202 when assembling the semiconductor light emitting device 150. can have a maximum thickness for stable assembly.
  • a partition 207 may be formed on the insulating layer 215. Some areas of the partition wall 207 may be located on top of the first assembly wiring 201 and the second assembly wiring 202, and the remaining area may be located on the top of the assembly substrate 200.
  • An assembly hole 207H where the semiconductor light emitting devices 150 are coupled is formed in the assembly substrate 200, and the surface where the assembly hole 207H is formed may be in contact with the fluid 1200.
  • the assembly hole 207H can guide the exact assembly position of the semiconductor light emitting device 150.
  • the assembly hole 207H may have a shape and size corresponding to the shape of the semiconductor light emitting device 150 to be assembled at the corresponding location. Accordingly, it is possible to prevent another semiconductor light emitting device from being assembled or a plurality of semiconductor light emitting devices from being assembled into the assembly hole 207H.
  • the assembly device 1100 that applies a magnetic field may move along the assembled substrate 200.
  • Assembly device 1100 may be a permanent magnet or an electromagnet.
  • the assembly device 1100 may move while in contact with the assembly substrate 200 in order to maximize the area to which the magnetic field is applied within the fluid 1200.
  • the assembly device 1100 may include a plurality of magnetic materials or may include a magnetic material of a size corresponding to that of the assembly substrate 200. In this case, the moving distance of the assembly device 1100 may be limited to within a predetermined range.
  • the semiconductor light emitting device 150 in the chamber 1300 may move toward the assembly device 1100 and the assembly substrate 200 by the magnetic field generated by the assembly device 1100.
  • the semiconductor light emitting device 150 may enter the assembly hole 207H and be fixed by the DEP force formed by the electric field between the assembly wires 201 and 202 while moving toward the assembly device 1100.
  • the first and second assembly wirings 201 and 202 generate an electric field using an AC power source, and a DEP force may be formed between the assembly wirings 201 and 202 due to this electric field.
  • the semiconductor light emitting device 150 can be fixed to the assembly hole 207H on the assembly substrate 200 by this DEP force.
  • a predetermined solder layer (not shown) is formed between the light emitting device 150 assembled on the assembly hole 207H of the assembly substrate 200 and the assembly wiring 201 and 202 to improve the bonding force of the light emitting device 150. It can be improved.
  • a molding layer (not shown) may be formed in the assembly hole 207H of the assembly substrate 200.
  • the molding layer may be a transparent resin or a resin containing a reflective material or a scattering material.
  • the time required to assemble each semiconductor light-emitting device on a substrate can be drastically shortened, making it possible to implement a large-area, high-pixel display more quickly and economically.
  • FIGS. 9 to 26 Descriptions omitted below can be easily understood from FIGS. 3 to 8 and the description given above in relation to the corresponding drawings.
  • Figure 9 is a perspective view showing a semiconductor light emitting device according to an embodiment.
  • Figure 10 is a cross-sectional view showing a semiconductor light-emitting device according to an embodiment.
  • the semiconductor light emitting device 150 may be one of the semiconductor light emitting devices (FIG. 23) provided in each of a plurality of pixels to display an image. That is, the semiconductor light-emitting device 150 according to the embodiment includes the first semiconductor light-emitting device 150-1, the second semiconductor light-emitting device 150-2, and the third semiconductor light-emitting device 150-3 shown in FIG. 23. It could be one of:
  • the semiconductor light emitting device 150 may include a light emitting layer 150a, a passivation layer 157, and a first electrode 154.
  • the light emitting layer 150a may have a trapezoidal shape, but this is not limited.
  • the light emitting layer 150a may have a mesa structure. That is, the upper side of the light emitting layer 150a may be smaller than the lower side.
  • the side of the light emitting layer 150a may have an acute angle ⁇ 11 with respect to the lower side of the light emitting layer 150a.
  • the side of the light emitting layer 150a may have an obtuse angle with respect to the upper side of the light emitting layer 150a.
  • the light emitting layer 150a may include at least one first conductivity type semiconductor layer 151, an active layer 152, and at least one second conductivity type semiconductor layer 153.
  • the first conductive semiconductor layer 151 may be an n-type semiconductor layer
  • the second conductive semiconductor layer 153 may be a p-type semiconductor layer, but this is not limited.
  • the first conductive semiconductor layer 151, the active layer 152, and the second conductive semiconductor layer 153 may be sequentially deposited on a sapphire substrate using deposition equipment such as MOCVD.
  • the sapphire substrate can be removed later.
  • the first conductivity type semiconductor layer 151 is deposited on a sapphire substrate
  • the active layer 152 is deposited on the first conductivity type semiconductor layer 151
  • the second conductivity type semiconductor layer 153 is an active layer ( 152) can be deposited on.
  • the first conductive semiconductor layer 151, the active layer 152, and the second conductive semiconductor layer 153 may be made of a compound semiconductor material.
  • the passivation layer 157 may be made of an insulating material.
  • the passivation layer 157 may protect the light emitting layer 150a.
  • the passivation layer 157 may affect the intensity of DEP force for assembling the semiconductor light emitting device 150 during self-assembly.
  • the passivation layer 157 may surround the light emitting layer 150a.
  • the passivation layer 157 may surround the remaining area except the lower side of the light emitting layer 150a.
  • the passivation layer 157 may surround the outer surface of the first conductive semiconductor layer 151.
  • the passivation layer 157 may surround the outer surface of the active layer 152.
  • the passivation layer 157 may surround the outer surface of the second conductive semiconductor layer 153.
  • passivation may be disposed on the top surface of the second conductive semiconductor layer.
  • the first electrode 154 may electrically connect the light emitting layer 150a to the outside.
  • the first electrode 154 may include a lower electrode 154-1 and a side electrode 154-2.
  • the lower electrode 154-1 may be disposed on the lower side of the light emitting layer 150a.
  • the lower electrode 154-1 may be disposed on the lower side of the first conductive semiconductor layer 151.
  • the lower electrode 154-1 may be in contact with the lower surface of the first conductive semiconductor layer 151, but this is not limited.
  • the side electrode 154-2 may extend from the lower electrode 154-1 in the side direction.
  • the side electrode 154-2 may extend from the end of the lower electrode 154-1 onto the side of the light emitting layer 150a.
  • the side electrode 154-2 may extend diagonally from the end of the lower electrode 154-1.
  • the side electrode 154-2 may not extend horizontally from the end of the lower electrode 154-1, but may extend diagonally with respect to the lower electrode 154-1. That is, the side electrode 154-2 may be bent upward from the end of the lower electrode 154-1.
  • the side electrode 154-2 is located on the side of the light-emitting layer 150a, but does not contact the side of the light-emitting layer 150a. That is, the side electrode 154-2 may be spaced apart from the side of the light emitting layer 150a. In this case, the recess 160 may be formed by the space between the side electrode 154-2 and the side of the light emitting layer 150a. The recess 160 may have a “V” shape when viewed from the side.
  • the side electrode 154-2 may be disposed along the circumference of the side of the light emitting layer 150a. That is, the side electrode 154-2 may have a closed loop structure along the circumference of the side of the light emitting layer 150a.
  • the side electrode 154-2 may be formed integrally with the lower electrode 154-1.
  • the lower electrode 154-1 and the side electrode 154-2 may be formed simultaneously using the same metal by performing the same process.
  • the side electrode 154-2 may be formed separately from the lower electrode 154-1.
  • the lower electrode 154-1 and the side electrode 154-2 may be made of different metals.
  • the side electrode 154-2 may be formed on the side of the light-emitting layer 150a using a second metal. You can. At this time, the lower electrode 154-1 and the side electrode 154-2 may be in contact with each other, but this is not limited.
  • the length (L) of the side electrode 154-2 may be smaller than the thickness (T11) of the first conductivity type semiconductor layer 151 of the light emitting layer 150a.
  • the length (L) of the side electrode 154-2 is greater than the thickness (T11) of the first conductive semiconductor layer 151 of the light emitting layer 150a, after the semiconductor light emitting device 150 is assembled, an electrical wiring process is performed. When this is performed, an electrical short may occur where the upper wiring (referred to as the second electrode wiring) to be connected to the second conductive semiconductor layer 153 is connected to the side electrode 154-2.
  • the thickness T1 of the lower electrode 154-1 may be greater than the thickness T2 of the side electrode 154-2, but this is not limited. Since the thickness T1 of the lower electrode 154-1 is formed to be thick, ohmic properties, electrical conduction properties, magnetization properties, reflection properties, etc. may be improved.
  • the side electrode 154-2 may have an obtuse angle ⁇ 1 with respect to the horizontal surface of the lower electrode 154-1.
  • the side electrode 154-2 may be inclined at an angle ⁇ 1 of 100° or more with respect to the horizontal surface of the lower electrode 154-1.
  • the side of the light-emitting layer 150a may have an acute angle ⁇ 11 with respect to the lower side of the light-emitting layer 150a. Accordingly, since the side electrode 154-2 extends diagonally from the end of the lower electrode 154-1, the side electrode 154-2 may be spaced apart from the side of the light emitting layer 150a. That is, the side electrode 154-2 may be spatially spaced apart from the passivation layer 157 disposed on the side of the light emitting layer 150a.
  • the separation distance d between the side electrode 154-2 and the side of the light emitting layer 150a may increase along the upper direction.
  • the separation distance d between the side electrode 154-2 and the side of the light emitting layer 150a on the upper surface of the lower electrode 154-1 may be 0.
  • the separation distance d between the side electrode 154-2 and the side of the light emitting layer 150a may increase.
  • the side electrode 154-2 may have an acute angle ⁇ 2 (FIG. 12) or an obtuse angle ⁇ 3 (FIG. 13) with respect to the side of the light emitting layer 150a. Accordingly, the side electrode 154-2 may be spatially spaced from the side of the light emitting layer 150a.
  • the passivation layer 157 may have an inner surface 157-1, a first outer surface 157-2a, and a second outer surface 157-2b.
  • the inner surface 157-1 may be in contact with the side surface of the light emitting layer 150a. That is, the inner surface 157-1 may be in contact with the light emitting layer 150a along the side circumference.
  • the first outer surface 157-2a may be the opposite side of the inner surface 157-1. That is, the first outer surface 157-2a may be parallel to the inner surface 157-1, but this is not limited.
  • the second outer surface 157-2b may be located below the first outer surface 157-2a.
  • the second outer surface 157-2b may be close to the inner surface 157-1 along the lower direction.
  • the inner surface 157-1 and the second outer surface 157-2b may meet each other. That is, the upper surface, inner surface 157-1, and second outer surface 157-2b of the lower electrode 154-1 may be in contact with each other. Accordingly, the width W1 between the inner surface 157-1 and the second outer surface 157-2b may become smaller along the downward direction.
  • the second outer surface 157-2b may have an acute angle ⁇ 4 with respect to the inner surface 157-1.
  • the second outer surface 157-2b is shown as having an acute angle ⁇ 4 with respect to the inner surface 157-1, but it may also have an obtuse angle.
  • the side electrode 154-2 may be positioned on approximately the same horizontal line as the lower electrode 154-1. .
  • the side electrode 154-2 may contact the second outer surface 157-2b of the passivation layer 157.
  • the inclination angle ⁇ 4 of the second outer surface 157-2b is the side electrode 154-2. It may be an inclination angle of -2). That is, as the inclination angle ⁇ 4 of the second outer surface 157-2b with respect to the inner surface 157-1 decreases, the side electrode 154-2 can be erected more and more vertically. As the inclination angle ⁇ 4 of the second outer surface 157-2b with respect to the inner surface 157-1 increases, the side electrode 154-2 can lie more and more horizontally. Therefore, the inclination of the side electrode 154-2 can be adjusted by adjusting the inclination angle ⁇ 4 of the second outer surface 157-2b.
  • the first electrode 154 may include a plurality of layers 154a, 154b, and 154c.
  • the first electrode 154 may include a first layer 154a, a second layer 154b, and a third layer 154c.
  • the figure shows three layers 154a, 154b, and 154c, but more layers may be included.
  • an additional reflective layer may be included.
  • the reflective layer may be disposed on the first layer 154a or between the first layer 154a and the second layer 154b.
  • the first layer 154a may be an ohmic layer
  • the second layer 154b may be an electrode layer
  • the third layer 154c may be a magnetic layer.
  • Au/Ge/Au may be used as the ohmic layer 154a.
  • Au, Cu, Pt, etc. may be used as the electrode layer 154b.
  • Ni, Co, etc. may be used as the magnetic layer 154c.
  • the ohmic layer 154a lowers the electrical resistance with the first conductive semiconductor layer 151, making it easier to supply current and reducing current loss, thereby reducing power consumption.
  • the electrode layer 154b is a material with excellent electrical conductivity, and together with the ohmic layer 154a, it can easily supply current and reduce current loss.
  • the magnetic layer 154c is made of a material with excellent magnetization and can be easily magnetized by a magnet.
  • the semiconductor light emitting device 150 can be assembled on a display substrate using magnetic and electric fields through a self-assembly method. That is, the semiconductor light emitting device 150 can be moved within the fluid using a magnet.
  • a magnetic layer 154c may be provided on the semiconductor light emitting device 150 to increase the response speed of the semiconductor light emitting device 150.
  • Ni which has excellent magnetization
  • the semiconductor light-emitting device 150 can respond more quickly to the movement of the magnet, thereby improving the assembly speed of the semiconductor light-emitting device 150.
  • the second outer surface 157-2b is inclined with respect to the inner surface 157-1, it may also be called an inclined surface.
  • the inclination of the side electrode 154-2 may vary depending on the inclination of the second outer surface 157-2b.
  • the side electrode 154-2 protrudes diagonally from the end of the lower electrode 154-1, it may also be called a protruding electrode.
  • the semiconductor light emitting device 150 described above may be a vertical semiconductor light emitting device, but can also be equally adopted as a horizontal semiconductor light emitting device or a flip chip type semiconductor light emitting device.
  • the side electrode 154-2 may be disposed on the side of the light-emitting layer 150a and not in contact with the side of the light-emitting layer 150a. Accordingly, the side electrode 154-2 is not formed up to the uppermost layer of the passivation layer 157, that is, the upper surface of the second conductive semiconductor layer 153, so that the semiconductor light emitting device 150 is self-organized on the display substrate. After assembly, when an electrical wiring is formed, an electrical short between the wiring and the side electrode 154-2 can be prevented. In this way, electrical shorts between the side electrode 154-2 and the wiring are prevented, thereby preventing lighting defects and improving product quality.
  • the semiconductor light emitting device 150 is self-assembled on the display substrate, when a wire is connected to the side electrode 154-2, between the side electrode 154-2 and the side of the light emitting layer 150a Since it is formed not only in the recess 160 but also on the outer surface of the side electrode 154-2, the contact area between the wiring and the side electrode 154-2 is maximized, thereby increasing the fixing force between the side electrode 154-2 and the wiring. It can be improved.
  • the first electrode 154 of the semiconductor light emitting device 150 includes a magnetic layer 154c, thereby increasing the reaction speed to the movement of the magnet during self-assembly, thereby improving the assembly speed of the semiconductor light emitting device.
  • 16 to 22 show a manufacturing process of a semiconductor light emitting device according to an embodiment.
  • a light emitting layer 150a may be formed on the wafer 1000, and a passivation layer 157 may be formed around the light emitting layer 150a.
  • At least one first conductivity type semiconductor layer 151, an active layer 152, and at least one second conductivity type semiconductor layer 153 may be deposited on the wafer 1000 using MOCVD equipment.
  • the second conductive semiconductor layer 153, the active layer 152, and the first conductive semiconductor layer 151 are removed using an etching process to expose the upper surface of the wafer 1000, thereby forming the light emitting layer 150a. You can. Although one light emitting layer 150a is shown in the drawing, numerous light emitting layers 150a may be formed on the wafer 1000. The upper surface of the wafer 1000 between adjacent light emitting layers 150a may be exposed by the second conductive semiconductor layer 153, the active layer 152, and the first conductive semiconductor layer 151.
  • the side of the light emitting layer 150a composed of the first conductive semiconductor layer 151, the active layer 152, and the second conductive semiconductor layer 153 may have an inclined surface. That is, the side of the light-emitting layer 150a may have an acute angle with respect to the lower side of the light-emitting layer 150a.
  • a passivation layer 157 may be formed on the wafer 1000.
  • the passivation layer 157 may surround the light emitting layer 150a.
  • an anti-deposition layer 1010 may be formed on the passivation layer 157.
  • the deposition prevention layer 1010 may surround the passivation layer 157.
  • the passivation layer 157 and the deposition prevention layer 1010 may surround the light emitting layer 150a and contact the upper surface of the wafer 1000.
  • the anti-deposition layer 1010 may be made of, for example, an organic material.
  • the anti-deposition layer 1010 may be BCB (Benzocyclobutene), but this is not limited.
  • the anti-deposition layer 1010 may be formed by itself as a by-product. That is, by-products generated from various processes such as bonding to a temporary substrate (FIG. 18), separation of the wafer 1000 (FIG. 19), and etching of the passivation layer 157 (FIG. 20) are on the passivation layer 157. It can be deposited and used as an anti-deposition layer 1010.
  • the temporary substrate 1100 may be attached to the upper side of the light emitting layer 150a.
  • the temporary substrate 1100 may be attached to the upper side of the light emitting layer 150a using an adhesive 1110.
  • the sacrificial layer 1120 may be formed on the light emitting layer 150a.
  • the sacrificial layer 1120 may be used later to separate the light emitting layer 150a from the temporary substrate 1100. That is, by removing the sacrificial layer 1120, the light emitting layer 150a can be separated from the temporary substrate 1100.
  • the sacrificial layer 1120 may be formed of a metal such as Al or a photosensitive material.
  • the wafer 1000 may be separated from the light-emitting layer 150a by performing an LLO process. That is, the laser is irradiated to the interface between the wafer 1000 and the light emitting layer 150a, and the laser can be absorbed at the interface. Accordingly, the compound material at the interface, that is, GaN, is decomposed into Ga and N2, so that the wafer 1000 can be separated from the optical layer (FIG. 19).
  • the light emitting layer 150a, the passivation layer 157, and the deposition prevention layer 1010 that were in contact with the wafer 1000 can be positioned on the same horizontal line.
  • the passivation layer 157 and the deposition prevention layer 1010 located on the same horizontal line as the light emitting layer 150a can be etched to have a slope inclined with respect to the surface of the light emitting layer 150a.
  • the slope of the passivation layer 157 and the deposition prevention layer 1010 may be determined by the slope of the side electrode 154-2 of the first electrode 154, which will be described later. That is, the slope of the side electrode 154-2 of the first electrode may correspond to the slope of the slope of the passivation layer 157 and the deposition prevention layer 1010.
  • the inclined surface is shown as a straight surface in the drawing, it may also have a round surface.
  • the first electrode 154 may be formed by depositing a metal film on the light emitting layer 150a and the passivation and deposition prevention layer 1010 using a deposition process.
  • a metal film may be deposited on the light emitting layer 150a, the passivation layer 157, and the deposition prevention layer 1010 by performing a sputtering process using E-beam deposition equipment.
  • E-beam deposition equipment can control the directionality of metal particles. In other words, E-beam deposition equipment can control metal particles to proceed in the vertical direction. Accordingly, metal particles can be deposited on the light emitting layer 150a, the passivation layer 157, and the deposition prevention layer 1010 in a vertical direction using E-beam deposition equipment. In this way, since the metal particles are deposited in the vertical direction, the metal particles may not be deposited on the side of the anti-deposition layer 1010.
  • the anti-deposition layer 1010 is made of a material that has low reactivity with metal particles, the metal particles are not deposited on the anti-deposition layer 1010 and are separated. Therefore, the metal film, which is a stack of metal particles, is only deposited on the top surface of each of the light emitting layer 150a, the passivation layer, and the deposition prevention layer 1010, and is not formed on the side surfaces of the deposition prevention layer 1010.
  • the upper surface of the light-emitting layer 150a has a horizontal surface perpendicular to the direction of movement of the metal particles, while the upper surface of each of the passivation layer 157 and the deposition prevention layer 1010 has an inclined surface inclined with respect to the direction of movement of the metal particles. . Accordingly, since metal particles are more easily deposited on the upper surface of the light-emitting layer (150a) than on the upper surfaces of each of the passivation layer 157 and the deposition prevention layer 1010, the thickness of the metal film on the upper surface of the light-emitting layer (150a) is greater than the thickness of the metal particles on the passivation layer. (157) and the anti-deposition layer (1010) may each be thicker than the thickness of the metal film on the upper surface.
  • the metal film on the top surface of the light emitting layer 150a may be the lower electrode 154-1, and the metal film on the top surfaces of each of the passivation layer 157 and the deposition prevention layer 1010 may be the side electrode 154-2.
  • the first electrode 154 may be formed by the lower electrode 154-1 and the side electrode 154-2.
  • the first electrode 154 may include a plurality of layers (154a, 154b, and 154c in FIG. 15). To this end, the first layer 154a, the second layer 154b, and the third layer 154c may be sequentially deposited on the light emitting layer 150a, the passivation layer 157, and the deposition prevention layer 1010.
  • the anti-deposition layer 1010 is removed by performing an etching process, so that the semiconductor light emitting device 150 can be manufactured.
  • the anti-deposition layer 1010 can be removed using an exposure or dry etching process, but this is not limited.
  • the sacrificial layer 1120 is removed by performing a wet etching process, so that the semiconductor light emitting device 150 can be separated from the temporary substrate 1100.
  • Figure 23 is a circuit diagram showing a display device according to an embodiment.
  • Figure 24 is a cross-sectional view showing a display device according to the first embodiment.
  • the display device 301 includes a substrate 310, a plurality of semiconductor light emitting devices 150-1 to 150-3, and a plurality of signal lines SL1 to SL4. may include.
  • the plurality of semiconductor light emitting devices 150-1 to 150-3 may have the same shape or structure as the semiconductor light emitting device 150 shown in FIGS. 9 and 10.
  • the substrate 310 may serve as a support member that supports various components of the display device 301.
  • a plurality of sub-pixels may be defined on the substrate 310.
  • a unit pixel may be composed of the first sub-pixel (PX1), the second sub-pixel (PX2), and the third sub-pixel (PX3).
  • a plurality of assembly holes 340H1 to 340H3 may be provided on the substrate 310.
  • a partition wall 340 may be disposed on the substrate 310, and a plurality of assembly holes 340H1 to 340H3 may be formed in the partition wall 340.
  • At least one assembly hole 340H1 to 340H3 may be provided in one sub-pixel (PX1, PX2, PX3).
  • the first assembly hole 340H1 may be placed in the first sub-pixel
  • the second assembly hole 340H2 may be placed in the second sub-pixel
  • the third assembly hole 340H3 may be placed in the third sub-pixel. there is.
  • a plurality of semiconductor light emitting devices 150-1 to 150-3 may be disposed in a plurality of sub-pixels PX1, PX2, and PX3, respectively.
  • the plurality of semiconductor light-emitting devices may include a first semiconductor light-emitting device 150-1, a second semiconductor light-emitting device 150-2, and a third semiconductor light-emitting device 150-3.
  • the first semiconductor light emitting device 150-1, the second semiconductor light emitting device 150-2, and the third semiconductor light emitting device 150-3 may emit light of different colors.
  • the first semiconductor light-emitting device 150-1 emits red light
  • the second semiconductor light-emitting device 150-2 emits green light
  • the third semiconductor light-emitting device 150-3 emits blue light. Although it may emit light, there are no limitations to this.
  • the first semiconductor light-emitting device 150-1 is disposed in the first sub-pixel (PX1)
  • the second semiconductor light-emitting device 150-2 is disposed in the second sub-pixel (PX2)
  • the third semiconductor light-emitting device The element 150-3 may be disposed in the third sub-pixel PX3.
  • the first semiconductor light emitting device 150-1 is disposed in the first assembly hole 340H1
  • the second semiconductor light emitting device 150-2 is disposed in the second assembly hole 340H2
  • the third semiconductor light emitting device 150-1 is disposed in the first assembly hole 340H1.
  • the device 150-3 may be placed in the third assembly hole 340H3.
  • a plurality of semiconductor light emitting devices 150-1 to 150-3 may be assembled into a plurality of assembly holes 340H1 to 340H3 using a self-assembly method. Since the self-assembly method has been described in detail previously with reference to FIG. 6, detailed description is omitted.
  • the plurality of semiconductor light emitting devices 150-1 to 150-3 may be individually assembled in the plurality of assembly holes 340H1 to 340H3.
  • a plurality of semiconductor light emitting devices 150-1 to 150-3 may be simultaneously assembled in a plurality of assembly holes 340H1 to 340H3.
  • the first assembly wiring 321 and the second assembly wiring 322 are disposed, and an insulating layer 330 is formed to insulate the first assembly wiring 321 and the second assembly wiring 322. , hereinafter referred to as the first insulating layer) may be disposed on the first assembled wiring 321 and the second assembled wiring 322.
  • the bottoms of the assembly holes 340H1 to 340H3 may be part of the top surface of the first insulating layer 330. That is, a portion of the upper surface of the first insulating layer 330 may be exposed through the assembly holes 340H1 to 340H3.
  • the shape of the assembly holes 340H1 to 340H3 may correspond to the shape of the semiconductor light emitting devices 150-1 to 150-3.
  • the semiconductor light emitting devices 150-1 to 150-3 have a circular shape when viewed from above, so the assembly holes 340H1 to 340H3 may also have a circular shape.
  • the size of the assembly holes 340H1 to 340H3 may be larger than the size of the semiconductor light emitting devices 150-1 to 150-3. That is, when the semiconductor light emitting devices 150-1 to 150-3 are inserted into the assembly holes 340H1 to 340H3, the outer surface of the semiconductor light emitting devices 150-1 to 150-3 is in the assembly holes 340H1 to 340H3. It can be spaced apart from the inner side of.
  • an insulating layer 360 (hereinafter referred to as a second insulating layer) may be formed in the assembly holes 340H1 to 340H3.
  • a black matrix may be disposed between the sub-pixels (PX1, PX2, and PX3) to distinguish between the sub-pixels (PX1, PX2, and PX3).
  • the black matrix may be disposed on the partition wall 340 between the partition wall 340 and the second insulating layer 360, excluding the assembly holes 340H1 to 340H3, but is not limited thereto.
  • the top surface of the second insulating layer 360 and the top surface of the partition wall 340 may be located on the same horizontal line, but this is not limited.
  • the upper surface of the second insulating layer 360 and the upper surface of the partition wall 340 are flat surfaces, which facilitates the formation of the first and second electrode wires 371 and 372 to be formed later and prevents disconnection. .
  • a plurality of signal lines SL1 to SL4 may be disposed around each of the plurality of assembly holes 340H1 to 340H3.
  • a driving transistor (DT in FIG. 3) may be connected between each of the plurality of signal lines (SL-1 to SL-4) and the sub-pixels (PX1, PX2, and PX3).
  • a plurality of signal lines may be connected to each of a plurality of sub-pixels (PX1, PX2, and PX3).
  • the plurality of signal lines may include a first signal line (SL-1), a second signal line (SL-2), a third signal line (SL-3), and a fourth signal line (SL-4).
  • the first signal line (SL-1), the second signal line (SL-2), the third signal line (SL-3), and the fourth signal line (SL-4) are arranged long along the first direction (X) It can be.
  • the first signal line (SL-1), the second signal line (SL-2), the third signal line (SL-3), and the fourth signal line (SL-4) may be arranged parallel to each other, but for this It is not limited.
  • the first semiconductor light emitting device 150-1 may be disposed in each of the plurality of first sub-pixels arranged along the first direction (X).
  • the second semiconductor light emitting device 150-2 may be disposed in each of the plurality of second sub-pixels arranged along the first direction (X).
  • a third semiconductor light emitting device 150-3 may be disposed in each of the plurality of third sub-pixels arranged along the first direction (X).
  • the first signal line (SL-1) may be disposed on one side of each of the first semiconductor light-emitting devices 150-1 arranged along the first direction (X) and connected to each of the first semiconductor light-emitting devices 150-1. there is.
  • the second signal line (SL-2) may be disposed on one side of each of the second semiconductor light-emitting devices 150-2 arranged along the first direction (X) and connected to each of the second semiconductor light-emitting devices 150-2.
  • the third signal line (SL-3) may be disposed on one side of each of the third semiconductor light-emitting devices 150-3 arranged along the first direction (X) and connected to each of the third semiconductor light-emitting devices 150-3. there is.
  • the fourth signal line SL-4 is disposed on the other side of each of the first semiconductor light-emitting device 150-1, the second semiconductor light-emitting device 150-2, and the third semiconductor light-emitting device 150-3, It may be connected to each of the semiconductor light-emitting device 150-1, the second semiconductor light-emitting device 150-2, and the third semiconductor light-emitting device 150-3.
  • the fourth signal line (SL-4) may be arranged parallel to the first signal line (SL-1), the second signal line (SL-2), or the third signal line (SL-3), but this is limited. I never do that.
  • the first semiconductor light emitting device 150-1, the second semiconductor light emitting device 150-2, and the third semiconductor light emitting device 150-3 are shown as being arranged along the second direction (Y). It may also be arranged along the first direction (X).
  • a plurality of signal lines may be connected to a plurality of semiconductor light emitting devices (150-1 to 150-3) through a plurality of connection lines (381-1 to 381-4), respectively.
  • the first signal line is connected to the first semiconductor light emitting device 150-1 through the first connection line 381-1
  • the second signal line SL-2 is connected to the second connection line 381-2.
  • the third signal line SL-3 may be connected to the third semiconductor light emitting device 150-3 through the third connection line 381-3.
  • the fourth signal line SL-4 may be commonly connected to the plurality of semiconductor light emitting devices 150-1 to 150-3 through the fourth connection line 381-4.
  • the display device 301 may include a first electrode wire 371 and a second electrode wire 372.
  • the first electrode wire 371 and the second electrode wire 372 may be arranged horizontally and parallel to each other.
  • the first electrode wire 371 may be disposed on the semiconductor light emitting devices 150-1 to 150-3, the second insulating layer 360, and the partition wall 340.
  • the first electrode wire 371 may extend along the second direction (Y) on the semiconductor light emitting devices 150-1 to 150-3.
  • One side of the first electrode wire 371 may be connected to the side electrode 154-2 of the first electrode 154 of the semiconductor light emitting devices 150-1 to 150-3 through the second insulating layer 360. .
  • the first electrode wire 371 penetrates the second insulating layer 360 from the side electrode 154-2 of the first electrode 154 of the semiconductor light emitting devices 150-1 to 150-3 to the second insulating layer. It may be disposed on (360) and extend along the second direction (Y) on the second insulating layer (360).
  • the second electrode wire 372 may be disposed on the second insulating layer 360 and the partition wall 340. As shown in FIG. 24, the second electrode wire 372 may contact the top surface 153a of the first semiconductor light emitting device 150-1. The second electrode wiring 372 may be in contact with the upper surface 1523a of the second conductivity type semiconductor layer 153 of the first semiconductor light emitting device 150-1, but this is not limited. When a second electrode (not shown) is disposed on the second conductive semiconductor layer 153, the second electrode wiring 372 may contact the upper surface of the second electrode.
  • the first electrode wire 371 and the second electrode wire 372 may be disposed on the same layer.
  • the first electrode wire 371 and the second electrode wire 372 may be arranged to be horizontally spaced apart from each other.
  • the extension direction of the first electrode wire 371 and the extension direction of the second electrode wire 372 may be opposite to each other.
  • the first electrode wiring 371 on the first sub-pixel where the first semiconductor light emitting device 150-1 is disposed may be connected to the first signal line SL-1 through the first connection line 381-1.
  • the first electrode wiring 371 on the second sub-pixel where the second semiconductor light emitting device 150-2 is disposed may be connected to the second signal line SL-2 through the second connection line 381-2.
  • the first power wiring on the third sub-pixel where the third semiconductor light emitting device 150-3 is disposed may be connected to the third signal line SL-3 through the third connection line 381-3.
  • the second electrode wiring 372 on the first sub-pixel, second sub-pixel, and third sub-pixel may be connected to the fourth signal line SL-4 through the fourth connection line 381-4.
  • the first electrode wire 371 may surround the side electrode 154-2 of the first semiconductor light emitting device 150-1. That is, the first electrode wire 371 may be disposed between the side of the light emitting layer 150a of the first semiconductor light emitting device 150-1 and the side electrode 154-2. Additionally, the first electrode wire 371 may be disposed on the outer surface of the side electrode 154-2. Although not shown, the first electrode wire 371 in the second sub-pixel surrounds the side electrode 154-2 of the second semiconductor light-emitting device 150-2, and the first electrode wire 371 in the third sub-pixel may surround the side electrode 154-2 of the third semiconductor light emitting device 150-3.
  • the first electrode wire 371 may be connected to the side electrode 154-2 along the circumference of the first semiconductor light emitting device 150-1.
  • the side electrode 154-2 of the first semiconductor light emitting device 150-1 is attached to the second insulating layer 360 along the circumference of the first semiconductor light emitting device 150-1. ) is formed so that the contact hole (not shown) is exposed, and the first electrode wire 371 may be formed in this contact hole.
  • the first electrode wiring 371 is disposed along the circumference of the first semiconductor light-emitting device 150-1, and is connected to the side electrode 154-2 of the first semiconductor light-emitting device 150-1 through the contact hole. can be connected to
  • the contact hole formed along the circumference of the first semiconductor light emitting device 150-1 is the first electrode wire 371 and the second electrode wire 372. It may not be formed in the second insulating layer 360 corresponding to the two-electrode wiring 372. Accordingly, the first electrode wire 371 disposed in the contact hole is horizontally spaced from the second electrode wire 372, so that an electrical short circuit can be prevented.
  • the first electrode wire 371 may be connected to the side electrode 154-2 along the circumference of the second semiconductor light emitting device 150-2.
  • the first electrode wire 371 may be connected to the side electrode 154-2 along the circumference of the third semiconductor light emitting device 150-3.
  • the first electrode wire 371 surrounds the side electrode 154-2, so that the contact area between the first electrode wire 371 and the side electrode 154-2 is expanded,
  • the fixing force of the first to third semiconductor light emitting devices 150-1 to 150-3 may be strengthened.
  • Figure 26 is a cross-sectional view showing a display device according to a second embodiment.
  • the second embodiment is the same as the first embodiment (FIG. 24) except for the first electrode wiring 371.
  • components having the same shape, structure, and/or function as those of the first embodiment are assigned the same reference numerals and detailed descriptions are omitted.
  • FIG. 23 may be referred to.
  • the display device 302 according to the second embodiment includes a substrate 310, a first assembly wiring 321, a second assembly wiring 322, a partition 340, and a plurality of semiconductor light emitting devices ( 150-1 to 150-1), a first electrode wire 371, and a second electrode wire 372.
  • the display device 302 according to the second embodiment may include a plurality of signal lines (SL-1 to SL-4).
  • first electrode wire 371 Since the remaining components except for the first electrode wire 371 are the same as those of the first embodiment, the description will focus on the first electrode wire 371.
  • the first electrode wire 371 and the second electrode wire 372 may be formed on the same layer at the same time.
  • the first electrode wire 371 may be disposed on a different layer from the second electrode wire 372.
  • the first electrode wire 371 may be formed before the second insulating layer 360 is formed. That is, after the first semiconductor light emitting device 150-1 is assembled in the first assembly hole 340H1 of the partition 340, the first insulating layer 330 is formed along the circumference of the first semiconductor light emitting device 150-1. is removed, the first assembly wiring 321 and/or the second assembly wiring 322 may be exposed through the first assembly hole 340H1. Thereafter, the first electrode wiring 371 may be formed along the circumference of the first semiconductor light emitting device 150-1. Accordingly, the first semiconductor light emitting device 150-1 and the first assembly wiring 321 and/or the second assembly wiring 322 may be connected by the first electrode 154.
  • one side of the first assembly wiring 321 surrounds the side electrode 154-2 of the first semiconductor light emitting device 150-1, and the other side of the first assembly wiring 321 surrounds the exposed first assembly wiring. and/or may contact the upper surface of the second assembly wiring 322.
  • One side of the first assembly wiring 321 may have a closed loop structure connected to the side electrode 154-2 of the first semiconductor light-emitting device 150-1 along the circumference of the first semiconductor light-emitting device 150-1.
  • this there is no limitation to this.
  • the second insulating layer 360 may be formed.
  • the second insulating layer 360 may be disposed on the first semiconductor light emitting device 150-1 and the partition wall 340, and may be disposed in the first assembly hole 340H1.
  • the second electrode wire 372 may be formed on the second insulating layer 360 and connected to the upper side of the first semiconductor light emitting device 150-1 through the second insulating layer 360.
  • the second electrode wire 372 may vertically overlap the first electrode wire 371 with the second insulating layer 360 interposed therebetween.
  • the structures of the second sub-pixel and the third sub-pixel are also the same as those of the first sub-pixel, so detailed descriptions are omitted.
  • the display device described above may be a display panel. That is, in the embodiment, the display device and the display panel may be understood to have the same meaning.
  • a display device in a practical sense may include a display panel and a controller (or processor) capable of controlling the display panel to display an image.
  • Embodiments may be adopted in the field of displays that display images or information. Embodiments may be adopted in the field of displays that display images or information using semiconductor light-emitting devices.
  • the semiconductor light-emitting device may be a micro-level semiconductor light-emitting device or a nano-level semiconductor light-emitting device.
  • embodiments can be adopted in TVs, signage, smart phones, mobile phones, mobile terminals, HUDs for automobiles, backlight units for laptops, and display devices for VR or AR.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

Élément électroluminescent à semi-conducteur comprenant : une couche d'émission de lumière ; une couche de passivation entourant la couche d'émission de lumière ; une électrode inférieure sous la couche d'émission de lumière ; et une électrode latérale s'étendant de l'extrémité de l'électrode inférieure sur la partie latérale de la couche d'émission de lumière. L'électrode latérale est espacée de la partie latérale de la couche d'émission de lumière.
PCT/KR2022/011798 2022-08-08 2022-08-08 Élément électroluminescent à semi-conducteur et dispositif d'affichage WO2024034697A1 (fr)

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US20190013306A1 (en) * 2017-07-07 2019-01-10 Hon Hai Precision Industry Co., Ltd. Micro led display panel
KR20200023319A (ko) * 2020-01-22 2020-03-04 엘지전자 주식회사 반도체 발광소자를 이용한 디스플레이 장치 및 이의 제조방법
US20210265547A1 (en) * 2017-03-23 2021-08-26 Seoul Semiconductor Co., Ltd. Display device and manufacturing method thereof
KR20210137218A (ko) * 2019-05-31 2021-11-17 청두 비스타 옵토일렉트로닉스 씨오., 엘티디. 디스플레이 패널, 그 제조 방법 및 디스플레이 장치

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101771463B1 (ko) * 2016-07-15 2017-08-25 엘지전자 주식회사 반도체 발광 소자를 이용한 디스플레이 장치
US20210265547A1 (en) * 2017-03-23 2021-08-26 Seoul Semiconductor Co., Ltd. Display device and manufacturing method thereof
US20190013306A1 (en) * 2017-07-07 2019-01-10 Hon Hai Precision Industry Co., Ltd. Micro led display panel
KR20210137218A (ko) * 2019-05-31 2021-11-17 청두 비스타 옵토일렉트로닉스 씨오., 엘티디. 디스플레이 패널, 그 제조 방법 및 디스플레이 장치
KR20200023319A (ko) * 2020-01-22 2020-03-04 엘지전자 주식회사 반도체 발광소자를 이용한 디스플레이 장치 및 이의 제조방법

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