WO2024026945A1 - 双频毫米波相控阵系统 - Google Patents

双频毫米波相控阵系统 Download PDF

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Publication number
WO2024026945A1
WO2024026945A1 PCT/CN2022/113528 CN2022113528W WO2024026945A1 WO 2024026945 A1 WO2024026945 A1 WO 2024026945A1 CN 2022113528 W CN2022113528 W CN 2022113528W WO 2024026945 A1 WO2024026945 A1 WO 2024026945A1
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dual
frequency
phased array
polarization
broadband
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PCT/CN2022/113528
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English (en)
French (fr)
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马凯学
马宗琳
马政
王科平
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天津大学
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/36—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith
    • H01Q1/38—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith formed by a conductive layer on an insulating support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/48—Earthing means; Earth screens; Counterpoises
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/50—Structural association of antennas with earthing switches, lead-in devices or lightning protectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q15/00—Devices for reflection, refraction, diffraction or polarisation of waves radiated from an antenna, e.g. quasi-optical devices
    • H01Q15/24—Polarising devices; Polarisation filters 
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q5/00—Arrangements for simultaneous operation of antennas on two or more different wavebands, e.g. dual-band or multi-band arrangements
    • H01Q5/20—Arrangements for simultaneous operation of antennas on two or more different wavebands, e.g. dual-band or multi-band arrangements characterised by the operating wavebands
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0458—Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0483—Transmitters with multiple parallel paths
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H04B1/1027—Means associated with receiver for limiting or suppressing noise or interference assessing signal quality or detecting noise/interference for the received signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H04B1/50—Circuits using different frequencies for the two directions of communication
    • H04B1/52—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
    • H04B1/525—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa with means for reducing leakage of transmitter signal into the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B2001/0408—Circuits with power amplifiers
    • H04B2001/0416—Circuits with power amplifiers having gain or transmission power control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B2001/0491—Circuits with frequency synthesizers, frequency converters or modulators

Definitions

  • the invention relates to the field of communication technology, and in particular to a dual-frequency millimeter wave phased array system.
  • 5G millimeter wave communication technology has higher uplink and downlink communication rates, wider communication frequency bands and low latency characteristics. It can meet the rapid transmission needs of massive data and has huge application potential in industrial automation, smart transportation, virtual reality and other fields. .
  • the dual-frequency millimeter wave system uses a combination of transceiver systems with different operating frequency bands.
  • the transmission of each frequency signal corresponds to a separate set of transceiver links.
  • the overall system is complex and is prone to excessive losses that reduce the transmission efficiency of the chip.
  • the chip area increases significantly, increasing the overall production cost.
  • the present invention provides a dual-frequency bidirectional 5G millimeter wave phased array system with high integration and high reliability.
  • the present invention is implemented as follows:
  • a dual-frequency millimeter wave phased array system including a 5G dual-frequency millimeter wave phased array chip capable of receiving and transmitting dual-frequency dual-polarization signals, and a 5G dual-frequency millimeter wave phased array chip connected to the 5G dual-frequency millimeter wave phased array chip for transmitting dual frequency Multiple dual-band dual-polarized antennas for dual-polarized signals, the 5G dual-band millimeter wave phased array chip supports three dual-band modes, including two single-frequency modes with filter response and a dual-band combined broadband mode.
  • each dual-polarized phased array channel composed of horizontally polarized phased channels and vertically polarized phased channels, broadband power splitters and polarization leakage cancellation circuits; the dual-polarized phased array channels are used for transmitting For dual-band signal amplification, amplitude modulation and phase modulation in the receiving state, each dual-band dual-polarized antenna is connected to a dual-polarized phased array channel, and each dual-polarized phased array channel is connected to the polarized array through a broadband power splitter.
  • the polarization leakage cancellation circuit is connected, and the polarization leakage cancellation circuit is connected to the vertical polarization port and the horizontal polarization port; in the receiving mode, the received polarization signal is synthesized by the broadband power divider and the RF channel signal is passed through the polarization leakage cancellation circuit.
  • the chemical antenna is emitted.
  • the transmission link of the dual polarization phased array channel includes a frequency reconfigurable power amplifier, a first wideband variable gain amplifier connected to the frequency reconfigurable power amplifier through a first matching network, and a first wideband variable gain amplifier connected to the frequency reconfigurable power amplifier through a first matching network.
  • a first wideband buffer connected to the variable gain amplifier, and a first wideband phase shifter connected to the first wideband buffer;
  • the transmit signal is input from the horizontal polarization port and/or vertical polarization port and is offset by the polarization leakage. After power distribution by the broadband power splitter, it enters the dual-polarization phased array channel and passes through the broadband switch in sequence.
  • the first wideband phase shifter modulates the signal phase, the first wideband buffer performs fixed gain amplification, the first wideband variable gain amplifier performs amplitude modulation and the frequency reconfigurable power amplifier performs power amplification, and finally transmits through the dual-frequency dual-polarized antenna ;
  • the receiving link of the dual-polarized phased array channel includes a frequency reconfigurable low-noise amplifier, a second wideband phase shifter connected to the frequency reconfigurable low-noise amplifier through a second matching network, and a second wideband phase shifter. a second wideband buffer connected to the second wideband buffer, and a second wideband variable gain amplifier connected to the second wideband buffer;
  • the dual-frequency dual-polarized antenna amplifies the received signal through the frequency reconfigurable low-noise amplifier, the second broadband phase shifter for phase modulation, the second buffer amplifier for constant gain amplification, and the second variable gain amplifier for amplitude modulation.
  • the second wideband variable gain amplifier and the first wideband phase shifter are each connected to a wideband switch through a matching network, and the wideband switch is used to switch between the transmitting link and the receiving link.
  • the frequency reconfigurable power amplifier operates in two different frequency bands, forming three operating modes, including two single-frequency modes with filter responses and a dual-frequency combination wideband mode, including two operating modes in different frequency bands.
  • the two narrowband driver stages are connected in parallel at the output end and connected to the input end of the broadband output stage through a broadband inter-stage matching network; each narrowband driver stage includes a narrowband input stage amplifier.
  • a narrowband driver stage amplifier connected to the narrowband input stage amplifier through an inter-stage matching network; switching between the three operating modes is achieved by adjusting the bias of the two narrowband driver stages.
  • the frequency reconfigurable low-noise amplifier can work in two different frequency bands, forming three working modes, including a wideband low-noise input stage working in a wideband and two narrowband driving stages working in different frequency bands; two The input end of the narrowband driver stage is connected in parallel to the output end of the broadband low-noise input stage through a wideband inter-stage matching network.
  • Each narrowband driver stage includes a narrowband driver stage amplifier, which is connected to the narrowband driver stage amplifier through an interstage matching network.
  • the narrowband output stage amplifier realizes switching between three operating modes by adjusting the bias of two narrowband driver stages.
  • the broadband output stage of the frequency-reconfigurable power amplifier and the broadband low-noise input stage of the frequency-reconfigurable low-noise amplifier adopt a bidirectional matching form and share a matching network.
  • the dual-band dual-polarized antenna includes a stacked patch antenna.
  • the stacked patch antenna includes a high-frequency antenna layer, a semi-cured layer, a low-frequency antenna layer, a ground layer and a coaxial line; the semi-cured layer is located between the high-frequency antenna and the low-frequency antenna, and the ground layer is at the bottom of the structure.
  • One end of the axis is connected to the ground, and the other end feeds the upper high-frequency antenna and low-frequency antenna.
  • each vertical polarization phase-controlled channel and the horizontal polarization phase-controlled channel are respectively connected to a broadband power divider, and the broadband power divider connected to the vertical polarization phase-controlled channel passes through a
  • the total broadband power divider is connected to the polarization leakage cancellation circuit, and the broadband power divider connected to the horizontal polarization phase-controlled channel is connected to the polarization leakage cancellation circuit through another total broadband power divider.
  • the broadband power splitter includes two one-to-four power splitting networks with a total of eight ports.
  • One of the one-to-four power splitting networks has four vertical polarization channels, and the other one-to-four power splitting network has four Horizontally polarized channel; each one-to-four power dividing network includes a first-order transmission line matching network and two second-order lumped element matching networks; the output of the first-order transmission line matching network and the two second-order lumped element matching networks Input connection.
  • the polarization leakage cancellation circuit adjusts the signal transmission direction and signal path according to the reception mode and the transmission mode, and generates a polarization cancellation signal with the same amplitude and opposite phase as the polarization signal, and cancels each other with the leakage polarization signal, including The first power divider and the third power divider.
  • One channel of the first power divider is connected to the first phase shifter, the first buffer, and the first variable gain amplifier in sequence through the first switch to form a first emission cancellation unit.
  • the third phase shifter, the third buffer, and the third variable gain amplifier are connected in sequence to form a first receiving cancellation unit connection, and the first variable gain amplifier and the third phase shifter are connected to the second power divider through a second switch.
  • the first phase shifter and the third phase shifter are connected to the first switch, and the other path of the first power divider is connected to the output end of the first power amplifier and the input end of the third power amplifier through the third switch.
  • the output end of the amplifier and the input end of the third power amplifier are connected to the fourth power divider through a fourth switch;
  • One channel of the third power divider is sequentially connected to the second phase shifter, the second buffer, and the second variable gain amplifier through the fifth switch to form a second emission cancellation unit, and the fourth phase shifter, the fourth buffer , the fourth variable gain amplifier is connected in sequence to form a second receiving cancellation unit, the fourth phase shifter and the second variable gain amplifier are connected to the sixth switch, the sixth switch is connected to the fourth power divider, and the fifth switch is connected to The second phase shifter is connected to the fourth variable gain amplifier; the other path of the third power divider is connected to the input terminal of the second power amplifier and the output terminal of the fourth power amplifier through the seventh switch.
  • the output of the second power amplifier terminal, the input terminal of the fourth power amplifier is connected to the second component input and output interface of the second power splitter through the eighth switch.
  • the input matching module of the reconfigurable power amplifier uses a coplanar waveguide based on a transmission line to complete the matching of the input stage and source impedance, implements dual-frequency signal splitting based on the transmission line, and has one signal input end and two signal outputs. terminal, the two signal output terminals output signals of different frequencies. Without affecting the matching within the frequency band, the transmission line becomes a high-impedance state in another frequency band, so that the two channels do not affect each other when transmitting signals.
  • the first wideband phase shifter and the second wideband phase shifter adopt wideband phase shifters with the same structure.
  • the wideband phase shifter structure includes a wideband polyphase filter and two variable gain amplifiers.
  • the wideband multiphase The output end of the phase filter is connected to the input ends of the two variable gain amplifiers; the differential signal outputs an orthogonal signal after passing through the broadband polyphase filter, and the two variable gain amplifiers adjust the amplitude of the output orthogonal signal respectively.
  • the wideband polyphase filter includes a plurality of orthogonal coupling units, and the plurality of orthogonal coupling units are connected together at a high level to form a cascaded orthogonal signal generation circuit.
  • the first wideband variable gain amplifier and the second wideband variable gain amplifier adopt the same wideband variable gain amplifier
  • the wideband variable gain amplifier includes differential common circuits connected in sequence from the input end to the output end.
  • Gate transistors and digitally controlled common gate transistor circuits, parasitic compensation circuits, and transistor circuits that provide constant current; the differential common gate transistors and digitally controlled common gate transistor circuits are cross-coupled to achieve digitally controlled variable gain signal amplification; the parasitic The compensation circuit is used to compensate the output parasitic parameters of common gate transistors and digitally controlled common gate transistors; the transistor circuit that provides constant current also provides appropriate output impedance to facilitate matching of differential signals into the switch array composed of differential digitally controlled common gate transistors.
  • Parasitic compensation circuit and constant current source circuit realize broadband controllable gain amplification.
  • the broadband variable gain amplifier adopts a cross-coupled current rudder structure to achieve impedance matching through the inductance of the central node, and compensates the switch array parasitic capacitance to achieve broadband and controllable gain amplification with low parasitic phase shift.
  • the dual-band dual-polarized antenna, dual-polarized phased array channel, broadband power splitter and polarization leakage cancellation circuit are all packaged using antenna packaging technology (AIP), including embedded wafer-level ball grid array packaging .
  • AIP antenna packaging technology
  • the dual-polarized phased array channel, broadband power splitter and polarization leakage cancellation circuit are all packaged using wafer-level chip packaging technology (WLCSP), and then connected to the dual-frequency dual-polarized antenna outside the chip.
  • WLCSP wafer-level chip packaging technology
  • the dual-frequency millimeter wave phased array system is expanded two-dimensionally on the PCB to form a high-order phased array system array.
  • the radio frequency signal in the transmission mode, passes through the polarization leakage cancellation circuit, and the power of the broadband power divider enters each array channel after power distribution.
  • the radio frequency signal After passing through the switch, sequentially modulates the signal through the broadband phase shifter. phase, broadband buffer fixed gain amplification, broadband variable gain amplifier amplitude modulation and dual-band power amplifier power amplification, and finally transmitted through a dual-band dual-polarized antenna.
  • the dual-frequency dual-polarized antenna amplifies the received signal through the dual-frequency low-noise amplifier, the broadband phase shifter for phase modulation, the buffer amplifier for constant gain amplification and the variable gain amplifier for amplitude modulation, and then enters the broadband function through the switch.
  • the splitter completes the power synthesis of the corresponding polarization channel, and finally outputs from the horizontal polarization port and the vertical polarization port through the polarization leakage cancellation circuit.
  • the dual-frequency millimeter wave phased array system of the present invention supports three dual-band modes, including two single-frequency modes with filter response and a dual-frequency combination broadband mode, and the frequency of its transmitting link is reconfigurable power amplifier
  • the input stage of the frequency-reconfigurable low-noise amplifier of the output stage and receiving link adopts a bidirectional matching design and shares the matching network, which can avoid the use of additional switches and transmission lines, effectively improving the transmission efficiency of the phased array chip and reducing the Receive noise figure.
  • Figure 1 is a schematic structural diagram of a dual-frequency millimeter wave phased array system provided by an embodiment of the present invention
  • Figure 2 is a schematic structural diagram of a dual-polarized phased array channel provided by an embodiment of the present invention
  • Figure 3 is a schematic structural diagram of a dual-band dual-polarized antenna provided by an embodiment of the present invention.
  • Figure 4 is a structural diagram of a polarization leakage cancellation circuit provided by an embodiment of the present invention.
  • FIG. 5 is a structural diagram of a broadband power divider provided by an embodiment of the present invention.
  • Figure 6 is a schematic structural diagram of a frequency reconfigurable power amplifier provided by an embodiment of the present invention.
  • Figure 7 is a schematic structural diagram of a frequency reconfigurable low-noise amplifier provided by an embodiment of the present invention.
  • Figure 8 is a schematic structural diagram of a bidirectional amplifier provided by an embodiment of the present invention.
  • Figure 9 is a schematic diagram of the input matching module of the frequency reconfigurable power amplifier provided by an embodiment of the present invention.
  • Figure 10 is a schematic structural diagram of a broadband phase shifter provided by an embodiment of the present invention.
  • Figure 11 is a schematic structural diagram of a broadband polyphase filter provided by an embodiment of the present invention.
  • Figure 12 is a schematic structural diagram of a variable gain amplifier provided by an embodiment of the present invention.
  • Figure 13 is a schematic structural diagram of an orthogonal coupling unit of a variable gain amplifier provided by an embodiment of the present invention.
  • Figure 14 is a schematic diagram of a high-order phased array system provided by an embodiment of the present invention.
  • the dual-frequency millimeter wave phased array system of the embodiment of the present invention includes a 5G dual-frequency millimeter wave phased array chip 1, and a plurality of dual-frequency dual-band millimeter wave phased array chips connected to the 5G dual-frequency millimeter wave phased array chip 1.
  • the 5G dual-frequency millimeter wave phased array chip 1 is arranged with multiple vertical polarization phased array channels, multiple horizontal polarization phased array channels, multiple broadband power dividers and a polarization leakage Cancellation circuit; each dual-frequency dual-polarized antenna is connected to a vertically polarized phased array channel and a horizontally polarized phased array channel, and multiple vertically polarized phased array channels and multiple horizontally polarized phased array channels are respectively connected.
  • the broadband power splitter is connected to a polarization leakage cancellation circuit, and the polarization leakage cancellation circuit is connected to the vertical polarization port and the horizontal polarization port; the vertical polarization phased array channel and the horizontal polarization phased array channel
  • the phased array channel is the core unit of the entire dual-frequency millimeter wave phased array system.
  • a horizontal polarized phased channel and a vertical polarized phased channel form a dual-polarized phased array channel, and a dual-frequency dual
  • the polarized antenna is connected to a dual-polarized phased array channel, and each dual-polarized phased array channel is connected to a polarization leakage cancellation circuit through a broadband power splitter.
  • the number of dual-frequency dual-polarization antennas is equal to the number of vertical polarization phased array channels and horizontal polarization phased array channels.
  • Each dual-frequency dual-polarization antenna is connected to a vertical polarization phased array channel and a horizontal polarization phased array channel. phased array channel.
  • the dual-frequency millimeter wave phased array system can simultaneously realize vertical polarization port output and input signals and horizontal polarization port output and input signals.
  • the vertical polarization port When transmitting a signal, the vertical polarization port serves as the input end of a radio frequency signal transmission link. Along the signal transmission direction, it is connected to the polarization leakage cancellation circuit 23.
  • the polarization leakage cancellation circuit 23 is connected to the third broadband power divider. 19, the third wideband power divider 19 is connected to the first wideband power divider 17 and the second wideband power divider 18 at the same time; one channel of the first wideband power divider 17 is connected to the third wideband power divider 17 through the first vertical polarization phased array channel 2.
  • the dual-band dual-polarized antenna 10 is connected to the third dual-band dual-polarized antenna 12 through the second vertically polarized phased array channel 3; one path of the second broadband power splitter 18 is phased through the third vertically polarized array.
  • the array channel 6 is connected to the second dual-band dual-polarized antenna 11, and the other channel is connected to the fourth dual-band dual-polarized antenna 13 through the fourth vertically polarized phased array channel 7.
  • the horizontal polarization port When transmitting a signal, the horizontal polarization port serves as the input end of another radio frequency signal transmission link. Along the signal transmission direction, it is connected to the polarization leakage cancellation circuit 23.
  • the polarization leakage cancellation circuit 23 is connected to the sixth broadband power divider. 22.
  • the sixth wideband power divider 22 is connected to the fourth wideband power divider 20 and the fifth wideband power divider 21 at the same time; one channel of the fourth wideband power divider 20 is connected to the first horizontally polarized phased array channel 4 through the first horizontally polarized phased array channel 4.
  • the other channel of the dual-frequency dual-polarized antenna 10 is connected to the third dual-frequency dual-polarized antenna 12 through the second horizontally polarized phased array channel 5; the other channel of the fifth broadband power splitter 21 is connected to the third horizontally polarized phased array.
  • Channel 8 is connected to the second dual-band dual-polarized antenna 11, and the other channel is connected to the fourth dual-band dual-polarized antenna 13 through the fourth horizontally polarized phased array channel 9.
  • the two radio frequency signals can be input through the horizontal polarization port and the vertical polarization port, and then pass through the polarization leakage cancellation circuit 23 and the broadband power divider, and then undergo horizontal polarization After the phased array channel and the vertical polarized phased array channel, it is transmitted through the dual-frequency dual-polarized antenna.
  • reception can be achieved through two radio frequency signal receiving links, wherein one radio frequency signal receiving link is received by the first dual-frequency dual-polarized antenna 10 and the third dual-frequency dual-polarized antenna 12
  • the radio frequency signals are then sent to the first broadband power splitter 17 through the first vertically polarized phased array channel 2 and the second vertically polarized phased array channel 3 respectively; and the second dual-frequency dual-polarized antenna 11,
  • the fourth dual-frequency dual-polarization antenna 13 After the fourth dual-frequency dual-polarization antenna 13 receives the radio frequency signal, it is sent to the second broadband power divider 18 through the third vertical polarization phased array channel 6 and the fourth vertical polarization phased array channel 7 respectively;
  • a wideband power divider 17 and a second wideband power divider 18 are jointly connected to a third wideband power divider 19 to send the signal to the polarization leakage cancellation circuit 23 and output it from the vertical polarization port;
  • the other radio frequency signal receiving link is to receive signals from the first dual-frequency dual-polarized antenna 10 and the third dual-frequency dual-polarized antenna 12 through the first horizontally polarized phased array channel 4 and the second horizontally polarized phased array channel 4.
  • the phased array channel 5 sends the signal to the fourth wideband power divider 20, and then sends the signal to the polarization leakage cancellation circuit 23 through the sixth wideband power divider 22, and outputs it from the horizontal polarization port through the polarization leakage cancellation circuit 23; and
  • After the signals are received by the second dual-frequency dual-polarized antenna 11 and the fourth dual-frequency dual-polarized antenna 13, they are respectively sent to the third horizontally polarized phased array channel 8 and the fourth horizontally polarized phased array channel 9.
  • the fifth wideband power divider 21 is then sent to the polarization leakage cancellation circuit 23 through the sixth wideband power divider 22, and is output from the horizontal polarization port through the polarization leakage cancellation circuit 23.
  • each dual-frequency dual-polarization antenna is used to transmit dual-frequency dual-polarization signals, so that the 5G dual-frequency millimeter wave phased array chip can receive and transmit dual-frequency dual-polarization signals;
  • each dual-polarized phased array channel includes a switch module for switching between receiving and transmitting, and is used to amplify, amplitude modulate and phase modulate dual-band signals in the transmitting and receiving states, so that all The 5G dual-band millimeter wave phased array chip has the ability to transmit and receive dual-band signals.
  • each broadband power divider when each broadband power divider operates in the transceiver mode, it is used to synthesize transmission signals, so that the link distance of transmission and reception of the dual-frequency millimeter wave phased array system changes.
  • the signal at the radio frequency synthesis network port passes through the polarization leakage cancellation circuit, which can effectively enhance the isolation between polarization signals, improve the signal-to-noise ratio of the phased array chip in the transceiver mode, and reduce the bit error rate .
  • the polarized signal is synthesized by the wideband power divider and then the RF channel signal is output through the polarization leakage cancellation circuit; in the transmitting mode, the polarized signal is passed through the polarization leakage cancellation circuit and then output to the wideband power divider.
  • Each phased array channel is generated by the wideband power divider and then the RF channel signal is output through the polarization leakage cancellation circuit.
  • the dual-frequency millimeter wave phased array system chip supports three dual-band modes, including two single-frequency modes with filter response and a dual-frequency combination wideband mode. Such as 28GHz single frequency response, 39GHz single frequency response and three working modes of 28GHz and 39GHz broadband.
  • the 5G dual-frequency millimeter wave phased array chip 1 also includes a reference current source circuit 23 (PTAT) to improve current accuracy, an electrostatic protection circuit 24 (ESD) to prevent the influence of external static electricity, and a storage
  • PTAT reference current source circuit 23
  • ESD electrostatic protection circuit 24
  • SRAM static random access memory 25
  • POR power-on reset circuit 26
  • a dual-polarized phased array channel 30 composed of a horizontally polarized phase-controlled channel and a vertically polarized phase-controlled channel includes a frequency reconfigurable power amplifier, a frequency reconfigurable power amplifier, and a frequency reconfigurable power amplifier.
  • Reconfigurable low-noise amplifier, wideband variable gain amplifier, wideband buffer, wideband phase shifter has an RF signal transmitting link and a RF signal receiving link; the RF signal transmitting link and the RF signal receiving link pass through the broadband
  • the switch 31 is connected, and the radio frequency transmission signal is received through the broadband switch 31 and sent to the radio frequency signal transmission link for transmission, or the radio frequency receiving signal received by the radio frequency signal receiving link is output.
  • the broadband switch 31 is used for channel switching.
  • the dual-polarization phased array channel 30 can support three dual-band modes: a single-frequency mode with filter response and a dual-frequency combination wideband mode.
  • the radio frequency signal transmission link includes a first wideband phase shifter 32, a first wideband buffer 33, a first wideband variable gain amplifier 35 and a frequency reconfigurable power amplifier 38.
  • the transmitted radio frequency signal passes through the wideband switch 31, the first The wideband phase shifter 32, the first wideband buffer 33, the wideband variable gain amplifier 34 and the frequency reconfigurable power amplifier 38 are then output.
  • the radio frequency signal receiving chain includes a frequency reconfigurable low noise amplifier 39, a second wideband phase shifter 37, a second wideband buffer 36, and a second wideband variable gain amplifier 35.
  • the received radio frequency signal passes through the frequency reconfigurable low noise amplifier in sequence.
  • the noise amplifier 39, the second wideband phase shifter 37, the second wideband buffer 36, the second wideband variable gain amplifier 35 and the wideband switch 31 are then output.
  • the dual-frequency dual-polarized antenna is connected to a frequency reconfigurable low-noise amplifier and a frequency reconfigurable power amplifier through a matching network.
  • a frequency reconfigurable low-noise amplifier can be a broadband low-noise frequency reconfigurable low-noise amplifier.
  • the input stage is connected in parallel with the broadband output stage of the frequency reconfigurable power amplifier, it is matched and connected to the dual-frequency multi-polarization antenna through a matching network.
  • multiple dual-band dual-polarized antennas have the same structure, as shown in Figure 3.
  • the dual-band dual-polarized antennas can use stacked patch antennas, which is beneficial to the realization of dual-band dual-polarized antennas.
  • the stacked patch antenna includes a ground layer 45, a low-frequency antenna 43, a prepreg layer 42, and a low-frequency antenna 41; the prepreg layer is located between the high-frequency antenna and the low-frequency antenna, and the ground layer is at the lowest layer of the structure.
  • One end of the coaxial line 44 of the antenna is connected to the ground layer 45, and the other end is connected upward to the antenna layer to feed the upper high-frequency antenna and the low-frequency antenna.
  • the low-frequency band antenna 43 and the low-frequency band antenna 41 form an antenna layer, capable of transmitting and Receiving dual-polarized signals in two different frequency bands is beneficial for the antenna to transmit and receive signals in two different frequency bands.
  • the polarization leakage cancellation circuit 23 can generate a polarization cancellation signal with the same amplitude and opposite phase as the polarization signal by adjusting the phase shifter and the variable gain amplifier, so as to be consistent with the leakage polarization signal. Mutually canceling each other out, it is beneficial to improve the polarization isolation of the dual-frequency phased array system chip.
  • the polarization leakage cancellation circuit 23 includes a plurality of power dividers, switches, variable gain amplifiers, buffers, phase shifters, power amplifiers and low noise amplifiers.
  • first power divider 213 includes a first power divider 213 and a third power divider 223.
  • One channel of the first power divider 213 passes through the first switch 205, the first phase shifter 206, the first buffer 207, and the first variable gain.
  • the first transmission cancellation unit formed by the amplifier 208 is connected in sequence, and the first reception cancellation unit formed by the third phase shifter 210, the third buffer 211, and the third variable gain amplifier 212 is connected in turn.
  • the first variable gain amplifier 208 The second power divider 214 is connected to the third phase shifter 210 through the second switch 209.
  • the first phase shifter 206 and the third phase shifter 210 are connected to the first switch 205.
  • the other path of the first power divider 213 is connected to the first power divider 214 through the second switch 209.
  • the three switches 203 are connected to the output terminal of the first power amplifier 204 and the input terminal of the third power amplifier 202.
  • the output terminal of the first power amplifier 204 and the input terminal of the third power amplifier 202 are connected to the fourth power divider through the fourth switch 201.
  • One channel of the third power divider 223 passes through the fifth switch 219 and is sequentially connected to the second phase shifter 220, the second buffer 221, and the second variable gain amplifier 222 to form a second emission cancellation unit and the fourth phase shifter. 216.
  • the fourth buffer 217 and the fourth variable gain amplifier 218 are connected in sequence to form a second receiving cancellation unit.
  • the fourth phase shifter 216 and the second variable gain amplifier 222 are connected to the sixth switch 215.
  • the sixth switch 215 is connected to the fourth power divider 200, the fifth switch 219 is connected to the second phase shifter 220 and the fourth variable gain amplifier 218; the other path of the third power divider 223 passes through the seventh switch 224 and the second power amplifier 227
  • the input end of the fourth power amplifier 225 is connected to the output end of the fourth power amplifier 225.
  • the output end of the second power amplifier 227 and the input end of the fourth power amplifier 225 are connected to the second component input and output interface of the second power splitter 214 through the eighth switch 226. .
  • the horizontally polarized signal and the vertically polarized signal enter the first power divider 213 and the third power divider 223 respectively; the horizontally polarized signal enters the first power divider 213 and is divided into two paths, and one path passes through the first power divider 213.
  • the switch 205, the first phase shifter 206, the first buffer 207, the first variable gain amplifier 208, and the second switch 209 the amplitude modulation and phase modulation amplification is output to the second power divider 214, and the other path passes through the third switch 203 Switch to the first power amplifier 204 and output to the fourth power splitter 200 through the fourth switch 201;
  • the vertically polarized signal entering the third power divider 223 is divided into two paths, and one path passes through the fifth switch 219, the second phase shifter 220, the second buffer 221, the second variable gain amplifier 222, and the sixth switch 215.
  • the amplitude modulation and phase modulation amplification is output to the fourth power divider 200; the other path is switched to the second power amplifier 227 through the seventh switch 224 and output to the second power divider 214 through the eighth switch 226;
  • the two signals of the second power divider 214 and the fourth power divider 200 are compensated and output, thereby enhancing the isolation of polarized signals.
  • the horizontally polarized signal and the vertically polarized signal enter the fourth power divider 200 and the second power divider 214 respectively; the horizontally polarized signal enters the fourth power divider 200 and is divided into two paths, and one path passes through the sixth power divider.
  • the switch 215, the fourth phase shifter 216, the fourth buffer 217, the fourth variable gain amplifier 218, and the fifth switch 219 amplitude modulation and phase modulation amplification is performed, and the output is output to the third power divider 223, and the other path passes through the fourth switch.
  • 201 switches to the third power amplifier 202 and outputs to the first power divider 213 through the third switch 203;
  • the vertically polarized signal enters the second power divider 214 and the horizontally polarized signal is divided into two paths.
  • One path passes through the second switch 209, the third phase shifter 210, the third buffer 211, the third variable gain amplifier 212, the first After the switch 205, amplitude modulation and phase modulation amplification is performed, and the output is sent to the power divider 213.
  • the other path is switched to the fourth power amplifier 225 through the eighth switch 226 and output to the third power divider 223 through the switch 224;
  • the two signals of the first power divider 213 and the third power divider 223 are compensated and output, thereby enhancing the isolation of the polarized signal.
  • the broadband power divider is exemplarily composed of multiple transmission lines and inductive and capacitive element connections, including two symmetrically arranged one-to-four power divider networks, each with one
  • the four-power dividing network includes a first-order transmission line matching network (made up of transmission lines) and two second-order lumped element matching networks (made up of lumped elements); the output end of the first-order transmission line matching network is connected to two second-order lumped elements
  • the input terminals of the component matching networks are connected; a one-to-four-power-dividing network has four vertical polarization channels, and the other one-to-four power-dividing network has four horizontal polarization channels.
  • H1, H2, H3 and H4 respectively represent different horizontal polarization channels; after another vertically polarized or horizontally polarized radio frequency signal (RFin) enters, it passes through the first-order transmission line matching 115 and the second-order lumped element matching network (116 , 114) and then output from the vertical polarization channel respectively.
  • RFin radio frequency signal
  • V1, V2, V3 and V4 respectively represent different vertical polarization channels.
  • the frequency reconfigurable power amplifier supports three modes of dual frequency bands, a single frequency mode with filter response and a wideband mode of dual frequency combination; as shown in Figure 6, it includes two modes operating in different frequency bands.
  • the two narrowband driver stages are connected in parallel at the output end and connected to the input end of the broadband output stage through a broadband inter-stage matching network; each narrowband driver stage includes a narrowband input stage amplifier. , a narrowband driver stage amplifier connected to the narrowband input stage amplifier through an inter-stage matching network.
  • the frequency reconfigurable power amplifier includes a wideband output stage 71, a first narrowband input stage amplifier 75, a first narrowband driver stage amplifier 72, a second narrowband input stage amplifier 77, and a second narrowband driver stage.
  • the amplifier 74, the first narrowband input stage amplifier 75, the first narrowband driver stage amplifier 72, the second narrowband input stage amplifier 76, and the second narrowband driver stage amplifier 74 have different frequency bands.
  • the differential signal enters through the first narrowband input stage amplifier 5, the first narrowband driver stage amplifier 72, the second narrowband input stage amplifier 76, and the second narrowband driver stage amplifier 74, and then is output through the wideband output stage 71 .
  • the frequency reconfigurable low-noise amplifier supports three modes of dual-band, a single-frequency mode with filter response and a wideband mode of dual-frequency combination. By adjusting the bias of the two-stage output amplifier, three modes can be realized. Switching of working modes; as shown in Figure 7, the frequency reconfigurable low-noise amplifier is formed by connecting multiple amplifiers, including a wideband low-noise input stage working in a wideband and two narrowband driver stages working in different frequency bands; two The input terminals of each narrowband driver stage are connected in parallel and connected to the output terminal of the broadband low-noise input stage through a broadband inter-stage matching network. Each narrowband driver stage includes a narrowband driver stage amplifier, which is connected to the narrowband driver stage amplifier through an interstage matching network. A narrowband output stage amplifier realizes switching between three operating modes by adjusting the bias of two narrowband driver stages.
  • the broadband low-noise input stage amplifier 81 includes a broadband low-noise input stage amplifier 81, two first and second narrowband driver stage amplifiers 82 and 83 in different frequency bands, and two first and second narrowband output stage amplifiers 84 and 83 in different frequency bands.
  • Two-way narrowband output stage amplifier 85 includes a broadband low-noise input stage amplifier 81, two first and second narrowband driver stage amplifiers 82 and 83 in different frequency bands, and two first and second narrowband output stage amplifiers 84 and 83 in different frequency bands.
  • Two-way narrowband output stage amplifier 85 includes a broadband low-noise input stage amplifier 81, two first and second narrowband driver stage amplifiers 82 and 83 in different frequency bands, and two first and second narrowband output stage amplifiers 84 and 83 in different frequency bands.
  • Two-way narrowband output stage amplifier 85 includes a broadband low-noise input stage amplifier 81, two first and second narrowband driver stage amplifiers 82 and 83 in different frequency bands, and two first and second narrow
  • the differential signal passes through a wideband low-noise input stage amplifier 81, two first narrowband driver stage amplifiers 82 in different frequency bands, a second narrowband driver stage amplifier 83, and two first narrowband output stage amplifiers 84 and second narrowband output stage amplifiers in different frequency bands.
  • the narrowband output stage amplifier 85 amplifies and outputs.
  • the input stage amplifier 71 of the frequency reconfigurable power amplifier 38 and the wideband input stage low noise amplifier 81 of the dual-frequency low noise reconfigurable amplifier 39 are, for example, a bidirectional amplifier structure.
  • the shared matching network is matched with the antenna impedance, which is beneficial to reducing loss and structural complexity, as shown in Figure 8.
  • the input stage amplifier 71 and the broadband input stage low noise amplifier 81 share the matching network 93.
  • the matching network uses the power amplifier and the low noise amplifier amplifier tube in the off state as matching components, which avoids additional switching losses and transmission lines, and is beneficial to reducing losses. , effectively improve the transmission efficiency and reduce the reception noise coefficient, maximizing the efficiency of the transmission link and the noise of the reception link.
  • the input matching module of the reconfigurable power amplifier based on Embodiment 7 can adopt the input matching structure 100 as shown in Figure 9, use a transmission line to realize dual-frequency signal splitting, and use a coplanar waveguide based on the transmission line to complete
  • the input stage matches the source impedance. It has one signal input terminal and two signal output terminals. The two signal output interfaces have signals of different frequencies.
  • the signal (RFin) enters from the input terminal and is divided into two output ports.
  • RFout1 outputs one frequency signal
  • RFout1 outputs a signal of another frequency to realize the transmission function of dual-frequency signals. Without affecting the matching within the frequency band, changing the transmission line to a high-impedance state in another frequency band can prevent the two channels from affecting each other when transmitting signals, which is beneficial to the power amplifier to independently transmit signals of two different frequencies.
  • the wideband phase shifter (PS) used is shown in Figure 10 and includes a wideband polyphase filter 52 and a wideband variable gain amplifier, wherein the wideband variable gain amplifier includes a first wideband variable gain amplifier 53 , the second wideband variable gain amplifier 54, and the output end of the wideband polyphase filter 52 is connected to the input end of the first wideband variable gain amplifier 53 and the second wideband variable gain amplifier 54 respectively.
  • the generated orthogonal signals After the differential signal enters the wideband polyphase filter 52, the generated orthogonal signals enter the first wideband variable gain amplifier 53 and the second wideband variable gain amplifier 54 respectively for amplitude adjustment and then output.
  • the broadband polyphase filter 52 includes a plurality of orthogonal coupling units (orthogonal signal generation circuits).
  • the plurality of orthogonal coupling units are composed of a first orthogonal coupling unit 61 and a second orthogonal coupling unit.
  • the cross-coupling unit 62, the third orthogonal coupling unit 63, the fourth orthogonal coupling unit 64, the fifth orthogonal coupling unit 65 and the sixth orthogonal coupling unit 66 are connected and formed. After the signal enters the high-level concatenated orthogonal signal generation circuit , providing quadrature signals for broadband variable gain amplifiers.
  • the first orthogonal coupling unit 61, the second orthogonal coupling unit 62, the third orthogonal coupling unit 63, and the fourth orthogonal coupling unit 64 form a second-level differential structure
  • the orthogonal coupling unit 66 forms a first-stage differential structure.
  • the through end of the fifth orthogonal coupling unit 65 is connected to the input end of the first orthogonal coupling unit 61.
  • the coupling end of the fifth orthogonal coupling unit 65 is connected to the second orthogonal coupling unit.
  • the input end of the unit 62 and the through end of the sixth orthogonal coupling unit 66 are connected to the input end of the third orthogonal coupling unit 63 , and the coupling end of the sixth orthogonal coupling unit 66 is connected to the input end of the fourth orthogonal coupling unit 64 .
  • the through end of the first orthogonal coupling unit 61 is connected to the coupling end of the fourth orthogonal coupling unit 64, and the coupling end of the second orthogonal coupling unit 62 is connected to the through end of the third orthogonal coupling unit 64, forming a set of differential Output signal OUT1;
  • the coupling end of the first orthogonal coupling unit 61 is connected to the through end of the second orthogonal coupling unit 62, and the coupling end of the first orthogonal coupling unit 63 is connected to the through end of the fourth orthogonal coupling unit 64 to form an output signal.
  • OUT1 is a quadrature differential output signal OUT2.
  • the signals OUT1 and OUT2 provide quadrature intermediate frequency signals for the mixer.
  • the differential signal enters from the input end, and enters the fifth orthogonal coupling unit 65 all the way. After passing through the fifth orthogonal coupling unit 65, the cascaded first orthogonal coupling unit 61 and the second orthogonal coupling unit 62 are output, and the other way enters. After passing through the sixth orthogonal coupling unit 66, the cascaded third orthogonal coupling unit 63 and the fourth orthogonal coupling unit 64 output.
  • the orthogonal coupling unit adopts a lumped element structure based on coupled inductors and capacitors, which is beneficial to miniaturization of the overall circuit.
  • Each orthogonal coupling unit is an orthogonal coupling unit composed of an inductor and a capacitor.
  • the input terminal (IN) and through terminal (THRU) of each orthogonal coupling unit are The coupling inductor is connected between the coupling end (COUP) and the isolation end (ISO), and the capacitor is connected between the input end and the coupling end, the through end and the isolation end.
  • the broadband variable gain amplifier structure includes a plurality of common gate transistors, a parasitic compensation circuit and a constant current source circuit; the differential signal enters the switch array composed of differential digitally controlled common gate transistors, and passes through the parasitic compensation circuit and constant current source circuit. source circuit to achieve broadband controllable gain amplification; the cross-coupled current rudder structure is used to achieve impedance matching through the inductance of the central node and compensate the switch array parasitic capacitance, which is beneficial to achieving broadband controllable gain amplification with low parasitic phase shift.
  • the broadband variable gain amplifier is a differential circuit, including differential common-gate transistors M4 and M5 connected in sequence from the input end to the output end, digitally controlled common-gate transistor circuits M3 and M6, and a parasitic compensation circuit Ld to provide a constant current.
  • the gates of differential common-gate transistors M4 and M5 are respectively connected to the bias Vb through a resistor.
  • the sources of transistors M3 and M4 are connected and used to connect the radio frequency signal RF in+ .
  • the sources of transistors M5 and M6 are connected and used to connect Radio frequency signal RF in- ; the drain of transistor M3 is connected to the drain of transistor M5 and then connected to one end of a parasitic compensation inductor Ld, the drain of transistor M4 is connected to the drain of transistor M6 and then connected to another parasitic compensation inductor Ld One end of the two parasitic compensation inductances Ld is connected to the sources of the transistors M1 and M2 respectively.
  • the drains of the transistors M1 and M2 serve as the radio frequency signal output terminals (RFout+, Rfout-).
  • the gates of the transistors M1 and M2 pass through the two Two series connected resistors are connected.
  • the connecting line Va point between the two series connected resistors provides bias for the transistors M1 and M2.
  • One end of the capacitor C1 and the capacitor C2 is connected to the source of the transistor M1 and M2 respectively.
  • the two ends of the capacitor C1 and the capacitor C2 The gates of the transistors M1 and M2 are connected to each other at the other end.
  • Radio frequency signals (RF in+ , RF in- ) is input from the sources of transistors M3, M4, M5, and M6.
  • the differential common-gate transistors M4 and M5 and the digitally controlled common-gate transistors M3 and M6 are circuit cross-coupled.
  • the common-gate transistors M3 and M6 are composed of a group of transistors connected in parallel. The number of conductions is controlled by a digital bit. When the digital bit inputs a high level, After passing through the inverter, the signal becomes low level, and the transistor is not turned on; when the digital bit input is low level, after passing through the inverter, the signal becomes high level, the transistor is turned on, and the gain of the amplifier is proportional to the number of transistors turned on. , used to realize digitally controlled variable gain signal amplification function.
  • the parasitic compensation inductor Ld in the intermediate frequency broadband variable gain amplifier is used to compensate the output parasitic parameters of the common gate transistors M4 and M5 and the digitally controlled common gate transistors M3 and M6.
  • the transistor circuits M1, M2, capacitors C1, and C2 that provide constant current in the intermediate frequency broadband variable gain amplifier are placed at the output end of the parasitic compensation inductor Ld. At the same time, they can provide appropriate output impedance, which facilitates the design of the output matching network. .
  • the dual-frequency millimeter wave phased array system can connect multiple dual-frequency dual-polarized antennas and realize two-dimensional expansion on the PCB to form a high-order phased array system array.
  • the dual-frequency millimeter wave phased array system of Embodiment 1 (shown in Figure 1) can be connected together to form a 5G dual-frequency millimeter wave phased array system array, forming a high-order phased array system array, as shown in Figure 14, so
  • the high-end phased array array includes four dual-frequency millimeter wave phased array systems, namely the first dual-frequency millimeter wave phased array system 401, the second dual-frequency millimeter wave phased array system 402, and the third dual-frequency millimeter wave phased array system 401.
  • Wave phased array system 403, fourth dual-frequency millimeter wave phased array system 404; the four dual-frequency millimeter wave phased array systems are connected through the broadband power divider between the arrays.
  • the broadband power divider between the arrays realizes that the horizontal polarization channel and vertical polarization channel input of the four dual-frequency millimeter wave phased array systems will be input into each dual-frequency millimeter wave phased array system.
  • the phased array system transmits to the space through the dual-polarized phased array channel and the dual-frequency dual-polarized antenna to realize the dual-polarized signal transmission of the high-order phased array system; when receiving the signal, it receives it from the dual-frequency dual-polarized antenna.
  • the broadband power divider between the arrays is input to the vertical array of the high-order phased array system.
  • the dual-frequency dual-polarized antenna, multiple dual-polarized phased array channels, multiple broadband power dividers, and polarization leakage cancellation circuits may all adopt antenna-in-package (AIP) packaging technology to combine the antenna with
  • AIP antenna-in-package
  • the overall packaging of the chip is conducive to the use of later chips.
  • antenna-in-package (AIP) packaging technology includes embedded wafer-level ball grid array packaging.
  • the multiple dual-polarized phased array channels, multiple broadband power dividers and polarization leakage cancellation circuits of the dual-frequency millimeter wave phased array system chip can adopt wafer level chip packaging technology (WLCSP). ) package, and then connected to the dual-band dual-polarized antenna outside the chip, which is beneficial to obtain a small size and compact package.
  • WLCSP wafer level chip packaging technology

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Abstract

本发明公开一种双频毫米波相控阵系统，包括5G双频毫米波相控阵芯片，与5G双频毫米波相控阵芯片连接的多个双频双极化天线，5G双频毫米波相控阵芯片上布置有水平极化相控通道与垂直极化相控通道构成的多个双极化相控阵通道、宽带功分器和极化泄露抵消电路；每个双频双极化天线通过一个双极化相控阵通道连接宽带功分器，宽带功分器与极化泄露抵消电路连接，极化泄露抵消电路连接垂直极化端口和水平极化端口。本发明在射频合成网络端口处设置极化泄露抵消电路，可有效增强极化信号之间的隔离度，提升相控阵芯片在收发模式下的信噪比，降低误码率。

Description

双频毫米波相控阵系统 技术领域
本发明涉及通信技术领域，特别涉及一种双频毫米波相控阵系统。
背景技术
随着无线通信需求的快速增加，对于无线通信网络的传输速度、传输信号容量和质量都提出更高的要求。5G毫米波通信技术具有更高的上下行通信速率、更宽通信频段以及低时延特性，能够满足海量数据的快速传输需求，在工业自动化、智慧交通、虚拟现实等领域拥有者巨大的应用潜能。
为进一步提升5G毫米波相控阵系统的传输信号的速率和容量、双频毫米波系统采用不同工作频段的收发机系统组合，每一个频率信号的传输都对应一套各自的收发机链路，整体系统复杂，容易产生过高的损耗降低芯片的传输效率，此外芯片面积显著增大，增加了整体生产成本。
发明内容
为解决背景技术中的问题，本发明提供一种集成度高、可靠性高的双频双向5G毫米波相控阵系统。
为实现要本发明的目的，本发明是这样实现的：
一种双频毫米波相控阵系统，包括能接收和发射双频双极化信号的5G双频毫米波相控阵芯片，与5G双频毫米波相控阵芯片连接的用于传输双频双极化信号的多个双频双极化天线，5G双频毫米波相控阵芯片支持双频段三个模式，包括两个具有滤波响应的单频模式和一个双频组合的宽带模式，其上有由水平极化相控通道与垂直极化相控通道构成的多个双极化相控阵通道、宽带功分器和极化泄露抵消电路；双极化相控阵通道用于在发射和接收状态下对双频段的信 号放大、调幅和调相，每个双频双极化天线连接一个双极化相控阵通道，每个双极化相控阵通道通过宽带功分器与极化泄露抵消电路连接，极化泄露抵消电路连接垂直极化端口和水平极化端口；接收模式下，接收的极化信号经过宽带功分器合成后射频通道的信号经极化泄露抵消电路后由垂直极化端口、水平极化端口输出；发射模式下，发射的极化信号经极化泄露抵消电路后通过宽带功分器功分输出至双极化相控阵通道后，由双频双极化天线发射出去。
其中，所述双极化相控阵通道的发射链路包括频率可重构功率放大器、与频率可重构功率放大器通过第一匹配网络连接的第一宽带可变增益放大器、与第一宽带可变增益放大器连接的第一宽带缓冲器、与第一宽带缓冲器连接的第一宽带移相器；
发射模式下，发射信号由水平极化端口和\或垂直极化端口输入并通过极化泄露抵消后，经宽带功分器功率分配后进入双极化相控阵通道，经宽带开关后依次经第一宽带移相器对信号调相，第一宽带缓冲器进行固定增益放大，第一宽带可变增益放大器进行调幅以及频率可重构功率放大器进行功率放大，最后通过双频双极化天线发射；
所述双极化相控阵通道的接收链路包括频率可重构低噪声放大器、与频率可重构低噪声放大器通过第二匹配网络连接的第二宽带移相器、与第二宽带移相器连接的第二宽带缓冲器、与第二宽带缓冲器连接的第二宽带可变增益放大器；
接收模式下，双频双极化天线将接收信号依次通过频率可重构低噪声放大器放大，第二宽带移相器调相，第二缓冲放大器恒定增益放大以及第二可变增益放大器调幅，之后通过宽带开关进入宽带功分器完成极化通道功率合成，通过极化泄露抵消电路从水平极化端口和\或垂直极化端口输出；
其中，所述第二宽带可变增益放大器、第一宽带移相器各通过一个匹配网络与宽带开关与连接，宽带开关用于发射链路与接收链路的切换。
其中，所述频率可重构的功率放大器工作在两个不同频段，形成三个工作模式，包括两个具有滤波响应的单频模式和一个双频组合的宽带模式，包括工作于不同频带的两个窄带驱动级和工作于宽带的一个宽带输出级，两个窄带驱动级在输出端并联后通过宽带级间匹配网络与宽带输出级的输入端连接；每个窄带驱动级包括一个窄带输入级放大器、与窄带输入级放大器通过级间匹配网络连接的一个窄带驱动级放大器；通过调节两个窄带驱动级的偏置实现三种工作模式的切换。
其中，所述频率可重构低噪声放大器能工作在两个不同频段，形成三个工作模式，包括一个工作于宽带的宽带低噪声输入级和两个工作于不同频带的窄带驱动级；两个窄带驱动级的输入端并联后通过宽带级间匹配网络与宽带低噪声输入级的输出端连接，每个窄带驱动级包括一个窄带驱动级放大器，与窄带驱动级放大器通过级间匹配网络连接的一个窄带输出级放大器，通过调节两个窄带驱动级的偏置实现三种工作模式的切换。
其中，所述频率可重构的功率放大器的宽带输出级以及频率可重构低噪声放大器的宽带低噪声输入级采用双向匹配的形式，共用匹配网络。
其中，所述双频双极化天线包括堆叠式贴片天线。
其中，所述堆叠式贴片天线包括高频天线层，半固化片层，低频天线层、接地层以及同轴线；所述半固化片层位于高频天线和低频天线中间，接地层处于结构最底层，同轴线一端连地，另一端向上层高频天线和低频天线进行馈电。
其中，所述宽带功分器为多个，每个垂直极化相控通道在及水平极化相控通道各自连接一个宽带功分器，垂直极化相控通道连接的宽带功分器通过一个 总宽带功分器与极化泄露抵消电路连接，水平极化相控通道连接的宽带功分器通过另一个总宽带功分器与极化泄露抵消电路连接。
其中，所述宽带功分器包含两个一分四功分网络，共八个端口，其中一个一分四功分网络具有四个垂直极化通道，另一个一分四功分网络具有四个水平极化通道；每个一分四功分网络包含一个一阶传输线匹配网络以及两个二阶集总元件匹配网络；一阶传输线匹配网络的输出端与两个二阶集总元件匹配网络的输入端连接。
其中，所述极化泄露抵消电路，根据接收模式和发射模式调节信号传输方向和信号通路，产生与极化信号幅度相同、相位相反的极化抵消信号，与泄露的极化信号相互抵消，包括第一功分器和第三功分器，第一功分器的一路经第一开关与第一移相器、第一缓冲器、第一可变增益放大器依次连接形成的第一发射抵消单元以及第三移相器、第三缓冲器、第三可变增益放大器依次连接形成的第一接收抵消单元连接，第一可变增益放大器与第三移相器通过第二开关连接第二功分器，第一移相器与第三移相器连接第一开关，第一功分器的另一路经第三开关连接第一功率放大器的输出端、第三功率放大器的输入端，第一功率放大器的输出端、第三功率放大器的输入端通过第四开关连接到第四功分器；
第三功分器的一路经过第五开关与第二移相器、第二缓冲器、第二可变增益放大器依次连接形成的第二发射抵消单元以及由第四移相器、第四缓冲器、第四可变增益放大器依次连接形成的第二接收抵消单元连接，第四移相器及第二可变增益放大器与第六开关连接，第六开关连接第四功分器，第五开关与第二移相器及第四可变增益放大器连接；第三功分器的另一路经过第七开关与第二功率放大器的输入端、第四功率放大器的输出端连接，第二功率放大器的输 出端、第四功率放大器的输入端通过第八开关连接第二功分器的第二分量输入输出接口。
其中，所述可重构功率放大器的输入匹配模块，采用基于传输线实现的共面波导完成输入级与源阻抗的匹配，基于传输线实现双频信号分路，具有一个信号输入端以及两个信号输出端，两个信号输出端输出不同频率的信号，在不影响所在频带内匹配的同时，将传输线在另一频段下变为高阻状态，使得两个通路传输信号时相互之间不影响。
其中，所述第一宽带移相器以及第二宽带移相器采用结构相同的宽带移相器，所述宽带移相器结构包括一个宽带多相滤波器和两个可变增益放大器，宽带多相滤波器的输出端与两个可变增益放大器的输入端连接；差分信号经过宽带多相滤波器后输出正交信号，两个可变增益放大器对输出的正交信号的幅度分别调节。
其中，所述宽带多相滤波器包括多个正交耦合单元，多个正交耦合单元高阶级联在一起，形成级联正交信号生成电路。
其中，所述第一宽带可变增益放大器以及所述第二宽带可变增益放大器采用相同的宽带可变增益放大器，所述宽带可变增益放大器从输入端到输出端，包括依次连接的差分共栅晶体管和数控共栅晶体管电路、寄生补偿电路、提供恒定电流的晶体管电路；所述差分共栅晶体管和数控共栅晶体管电路交叉耦合，用于实现数字控制的可变增益信号放大；所述寄生补偿电路用于补偿共栅晶体管和数控共栅晶体管的输出寄生参数；所述提供恒定电流的晶体管电路同时提供合适的输出阻抗，以便于匹配差分信号进入差分数控共栅晶体管构成的开关阵列，经过寄生补偿电路和恒流源电路，实现宽带可控增益放大。
其中，所述宽带可变增益放大器采用交叉耦合电流舵结构通过中心节点的 电感实现阻抗匹配，并且补偿开关阵列寄生电容，实现宽带低寄生相移的可控增益放大。
其中，所述双频双极化天线、双极化相控阵通道、宽带功分器以及极化泄露抵消电路整体采用天线封装技术(AIP)进行封装，包括嵌入式晶圆级球栅阵列封装。
其中，所述双极化相控阵通道、宽带功分器以及极化泄露抵消电路整体采用晶圆级芯片封装技术(WLCSP)封装后，再与芯片外部的双频双极化天线相连。
其中，双频毫米波相控阵系统在PCB上二维扩展，组成高阶相控阵系统阵列。
本发明的双频毫米波相控阵系统，在发射模式下，射频信号通过极化泄露抵消电路，宽带功分器功率分配后进入各阵列通道，经过开关后依次经过宽带移相器对信号调相、宽带缓冲器固定增益放大、宽带可变增益放大器调幅和双频功率放大器功率放大，最后通过双频双极化天线发射。
在接收模式下，双频双极化天线将得到的接收信号依次通过双频低噪声放大器放大，宽带移相器调相、缓冲放大器恒定增益放大和可变增益放大器调幅，之后通过开关进入宽带功分器完成相应极化通道功率合成，最后通过极化泄露抵消电路从水平极化端口和垂直极化端口输出。
本发明的双频毫米波相控阵系统，支持双频段三个模式，包括两个具有滤波响应的单频模式和一个双频组合的宽带模式，其发射链路的频率可重构的功率放大器的输出级和接收链路的频率可重构的低噪声放大器的输入级采用双向匹配的设计形式，共用匹配网络，可避免使用额外的开关和传输线，有效提升相控阵芯片的发射效率和降低接收噪声系数。
附图说明
图1是本发明实施例提供的双频毫米波相控阵系统的结构示意图；
图2是本发明实施例提供的双极化相控阵通道结构示意图；
图3是本发明实施例提供的双频双极化天线结构示意图；
图4是本发明实施例提供的极化泄露抵消电路结构图；
图5是本发明实施例提供的宽带功分器结构图；
图6是本发明实施例提供的频率可重构功率放大器结构示意图；
图7是本发明实施例提供的频率可重构低噪声放大器结构示意图；
图8是本发明实施例提供的双向放大器结构示意图；
图9是本发明实施例提供的频率可重构功率放大器输入匹配模块示意图；
图10是本发明实施例提供的宽带移相器结构示意图；
图11是本发明实施例提供的宽带多相滤波器结构示意图；
图12是本发明实施例提供的可变增益放大器结构示意图；
图13是本发明实施例提供的可变增益放大器的正交耦合单元结构示意图；
图14是本发明实施例提供的高阶相控阵系统阵列示意图。
具体实施方式
以下将结合本发明具体实施例和附图，对本发明加以详细说明，本发明的示意实施方式及其说明仅用于解释本发明，并非限定本发明的具体实施方式。
如图1所示，本发明实施例的双频毫米波相控阵系统，包括5G双频毫米波相控阵芯片1，与5G双频毫米波相控阵芯片1连接的多个双频双极化天线，所述5G双频毫米波相控阵芯片1上布置有多个垂直极化相控阵通道、多个水平极化相控阵通道、多个宽带功分器和一个极化泄露抵消电路；每个双频双极化天 线连接一个垂直极化相控阵通道与一个水平极化相控阵通道，多个垂直极化相控阵通道及多个水平极化相控阵通道各自与宽带功分器相连，宽带功分器与极化泄露抵消电路连接，极化泄露抵消电路连接垂直极化端口和水平极化端口；垂直极化相控阵通道、水平极化相控阵通道构成的相控阵通道是整个双频毫米波相控阵系统组成的核心单元，一个水平极化相控通道与一个垂直极化相控通道构成一个双极化相控阵通道，一个双频双极化天线连接一个双极化相控阵通道，每个双极化相控阵通道通过宽带功分器与极化泄露抵消电路相连接。
其中，双频双极化天线的数量与垂直极化相控阵通道以及水平极化相控阵通道数量相等，每个双频双极化天线连接一个垂直极化相控阵通道和一个水平极化相控阵通道。双频毫米波相控阵系统能同时实现垂直极化端口输出、输入信号与水平极化端口输出、输入信号。
在发射信号时，所述垂直极化端口作为一条射频信号发射链路的输入端，沿信号发射方向，其连接极化泄露抵消电路23，所述极化泄露抵消电路23连接第三宽带功分器19，第三宽带功分器19同时连接第一宽带功分器17和第二宽带功分器18；第一宽带功分器17的一路通过第一垂直极化相控阵通道2连接第一双频双极化天线10，另一路通过第二垂直极化相控阵通道3连接第三双频双极化天线12；第二宽带功分器18的一路通过第三垂直极化相控阵通道6连接第二双频双极化天线11，另一路通过第四垂直极化相控阵通道7连接第四双频双极化天线13。
在发射信号时，所述水平极化端口作为另一条射频信号发射链路的输入端，沿信号发射方向，其连接极化泄露抵消电路23，极化泄露抵消电路23接第六宽带功分器22，第六宽带功分器22同时连接第四宽带功分器20和第五宽带功分器21；第四宽带功分器20的一路通过第一水平极化相控阵通道4连接第一双频 双极化天线10，另一路通过第二水平极化相控阵通道5连接第三双频双极化天线12；第五宽带功分器21的一路通过第三水平极化相控阵通道8连接第二双频双极化天线11，另一路通过第四水平极化相控阵通道9连接第四双频双极化天线13。
本发明实施例的系统在进行射频信号发射时，两路射频信号可以由所述水平极化端口、垂直极化端口输入，然后经过极化泄露抵消电路23、宽带功分器，经水平极化相控阵通道、垂直极化相控阵通道后，通过双频双极化天线发射出去。
在进行射频信号接收时，可以实现通过两个射频信号接收链路进行接收，其中，一个射频信号接收链路是由第一双频双极化天线10、第三双频双极化天线12接收射频信号，然后分别由第一垂直极化相控阵通道2、第二垂直极化相控阵通道3后，送入第一宽带功分器17；以及第二双频双极化天线11、第四双频双极化天线13接收射频信号后，分别通过第三垂直极化相控阵通道6、第四垂直极化相控阵通道7，送入第二宽带功分器18；最后第一宽带功分器17和第二宽带功分器18共同连接第三宽带功分器19将信号送入极化泄露抵消电路23从垂直极化端口输出；
另一条射频信号接收链路是由从第一双频双极化天线10、第三双频双极化天线12接收信号后，通过第一水平极化相控阵通道4、第二水平极化相控阵通道5将信号送到第四宽带功分器20，然后经第六宽带功分器22送入极化泄露抵消电路23，经过极化泄露抵消电路23从水平极化端口输出；以及由第二双频双极化天线11、第四双频双极化天线13接收信号后，各自通过第三水平极化相控阵通道8、第四水平极化相控阵通道9送入第五宽带功分器21，然后经第六宽带功分器22送入极化泄露抵消电路23，经过极化泄露抵消电路23从水平极化 端口输出。
本发明实施例中，各个双频双极化天线，是用于传输双频双极化信号，使得5G双频毫米波相控阵芯片能接收和发射双频双极化信号；
本发明实施例中，各个双极化相控阵通道，包括用于收、发切换的开关模块，用于在发射和接收状态下对双频段的信号进行放大、调幅和调相，从而使得所述5G双频毫米波相控阵芯片具有发射和接收双频信号的能力。
本发明实施例中，各个宽带功分器在收发模式下工作时，是用于合成传输信号，使得所述双频毫米波相控阵系统发射和接收的链路距离改变。
本发明实施例中，在射频合成网络端口处信号通过极化泄露抵消电路，可以有效增强极化信号之间的隔离度，提升相控阵芯片在收发模式下的信噪比，降低误码率。在接收模式下，极化信号经过宽带功分器合成后射频通道的信号经过极化泄露抵消电路输出；发射模式下，极化信号经过极化泄露抵消电路后通过宽带功分器功分输出至各相控阵通道。
所述的双频毫米波相控阵系统芯片支持双频段三个模式，包括两个具有滤波响应的单频模式和一个双频组合的宽带模式。如28GHz单频响应、39GHz单频响应和28GHz与39GHz宽带三种工作模式。
示例性的，所述的5G双频毫米波相控阵芯片1还包括用来提高电流精度的基准电流源电路23(PTAT)，用来防止外部静电的影响静电保护电路24(ESD)、存储数据的静态随机存取存储器25(SRAM)，对意外降低的电压进行复位的上电复位电路26(POR)，请参阅图1所示。
如图2所示，本发明实施例中，一个所述水平极化相控通道与一个垂直极化相控通道构成的一个双极化相控阵通道30，包括频率可重构功率放大器、频率可重构低噪声放大器、宽带可变增益放大器、宽带缓冲器、宽带移相器；具 有一个射频信号发射链路以及一个射频信号接收链路；射频信号发射链路及射频信号接收链路通过宽带开关31相连接，通过宽带开关31接收射频发射信号送到射频信号发射链路进行发射，或是将射频信号接收链路接收的射频接收信号输出，宽带开关31用于通道的切换。
其中，双极化相控阵通道30能够支持双频段三个模式：具有滤波响应的单频模式和一个双频组合的宽带模式。
射频信号发射链路包括第一宽带移相器32、第一宽带缓冲器33、第一宽带可变增益放大器35和频率可重构功率放大器38，发射的射频信号依次经宽带开关31、第一宽带移相器32、第一宽带缓冲器33、宽带可变增益放大器34和频率可重构功率放大器38后进行输出。
射频信号接收链路包括频率可重构低噪声放大器39、第二宽带移相器37、第二宽带缓冲器36、第二宽带可变增益放大器35，接收的射频信号依次经过频率可重构低噪声放大器39、第二宽带移相器37、第二宽带缓冲器36、第二宽带可变增益放大器35和宽带开关31后进行输出。
本发明实施例中，所述双频双极化天线通过匹配网络与频率可重构低噪声放大器、频率可重构功率放大器连接，具体的，可以是频率可重构低噪声放大器的宽带低噪声输入级与频率可重构功率放大器的宽带输出级并联后，通过匹配网络与所述双频多极化天线匹配连接。
本发明实施例中，多个双频双极化天线的结构一致，如图3所示，所述双频双极化天线可使用堆叠贴片天线，有益于双频双极化天线的实现。
示例性的，所述的堆叠贴片天线包括接地层45、低频段天线43、半固化片层42、低频段天线41；所述半固化片层位于高频天线和低频天线中间，接地层处于结构最底层，天线的同轴线44的一端与接地层45连接，另一端向上接入 天线层，向上层高频天线和低频天线进行馈电，低频段天线43和低频段天线41形成天线层，能够发送和接收两个不同频段的双极化信号，有益于天线发射和接收两个不同频段的信号。
本发明实施例，所述的极化泄露抵消电路23，可以通过调节移相器和可变增益放大器，产生与极化信号幅度相同、相位相反的极化抵消信号，从而与泄露的极化信号相互抵消，有益于提升双频相控阵系统芯片的极化隔离度。
示例性的，如图4所示，极化泄露抵消电路23包括多个功分器、开关、可变增益放大器、缓冲器、移相器、功率放大器和低噪声放大器。
具体的，包括第一功分器213和第三功分器223，第一功分器213的一路经第一开关205与第一移相器206、第一缓冲器207、第一可变增益放大器208依次连接形成的第一发射抵消单元以及第三移相器210、第三缓冲器211、第三可变增益放大器212依次连接形成的第一接收抵消单元连接，第一可变增益放大器208与第三移相器210通过第二开关209连接第二功分器214，第一移相器206与第三移相器210连接第一开关205，第一功分器213的另一路经第三开关203连接第一功率放大器204的输出端、第三功率放大器202的输入端，第一功率放大器204的输出端、第三功率放大器202的输入端通过第四开关201连接到第四功分器200；
第三功分器223的一路经过第五开关219与第二移相器220、第二缓冲器221、第二可变增益放大器222依次连接形成的第二发射抵消单元以及由第四移相器216、第四缓冲器217、第四可变增益放大器218依次连接形成的第二接收抵消单元连接，第四移相器216及第二可变增益放大器222与第六开关215连接，第六开关215连接第四功分器200，第五开关219与第二移相器220及第四可变增益放大器218连接；第三功分器223的另一路经过第七开关224与第二 功率放大器227的输入端、第四功率放大器225的输出端连接，第二功率放大器227的输出端、第四功率放大器225的输入端通过第八开关226连接第二功分器214的第二分量输入输出接口。
在发射模式下，水平极化信号和垂直极化信号分别进入第一功分器213和第三功分器223；水平极化信号进入第一功分器213后分成两路，一路经过第一开关205、第一移相器206、第一缓冲器207、第一可变增益放大器208、第二开关209后调幅调相放大，输出到第二功分器214，另一路经过第三开关203切换至第一功率放大器204通过第四开关201输出到第四功分器200；
垂直极化信号进入第三功分器223的分成两路，一路经过第五开关219、第二移相器220、第二缓冲器221、第二可变增益放大器222、第六开关215后进行调幅调相放大，输出到第四功分器200；另一路经过第七开关224切换至第二功率放大器227通过第八开关226输出到第二功分器214；
最终，第二功分器214和第四功分器200各自的两路信号进行补偿输出，增强极化信号的隔离度。
工作在接收模式下，水平极化信号和垂直极化信号分别进入第四功分器200和第二功分器214；水平极化信号进入第四功分器200分成两路，一路经过第六开关215、第四移相器216、第四缓冲器217、第四可变增益放大器218、第五开关219后进行调幅调相放大，输出到第三功分器223，另一路经过第四开关201切换至第三功率放大器202通过第三开关203输出到第一功分器213；
垂直极化信号进入第二功分器214的水平极化信号分成两路，一路经过第二开关209、第三移相器210、第三缓冲器211、第三可变增益放大器212、第一开关205后进行调幅调相放大，输出到功分器213，另一路经过第八开关226切换至第四功率放大器225通过开关224输出到第三功分器223；
最终，第一功分器213和第三功分器223各自的两路信号进行补偿输出，增强极化信号的隔离度。
本发明实施例中，如图5所示，示例性的，所述的宽带功分器由多个传输线和电感电容元件连接组成，包括两个对称布置的一分四功分网络，每个一分四功分网络包含一个一阶传输线匹配网络(由传输线构成)以及两个二阶集总元件匹配网络(由集总元件构成)；一阶传输线匹配网络的输出端与两个二阶集总元件匹配网络的输入端连接；一个一分四功分网络具有四个垂直极化通道，另一个一分四功分网络具有四个水平极化通道。垂直极化和水平极化的两个输入信号，经过所述一分四功分网络后，得到四个垂直极化通道和四个水平极化通道，共八个输出通道。垂直极化或水平极化的一路射频信号(RFin)进入后，经过一阶传输线匹配网络112和二阶集总元件匹配网络(113、111)后分别从水平极化通道输出，图5中，H1、H2、H3和H4分别表示不同的水平极化通道；垂直极化或水平极化的另一路射频信号(RFin)进入后，经过一阶传输线匹配115和二阶集总元件匹配网络(116、114)后分别从垂直极化通道输出，图5中，V1、V2、V3和V4分别表示不同的垂直极化通道。
本发明实施例中，所述频率可重构功率放大器支持双频段三个模式，具有滤波响应的单频模式和一个双频组合的宽带模式；如图6所示，包括工作于不同频带的两个窄带驱动级和工作于宽带的一个宽带输出级，两个窄带驱动级在输出端并联后通过宽带级间匹配网络与宽带输出级的输入端连接；每个窄带驱动级包括一个窄带输入级放大器、与窄带输入级放大器通过级间匹配网络连接的一个窄带驱动级放大器，通过调节两个窄带驱动级的偏置可实现三种工作模式的切换。
具体的，所述频率可重构功率放大器包括宽带输出级71、第一路窄带输入 级放大器75、第一路窄带驱动级放大器72、第二路窄带输入级放大器77、第二路窄带驱动级放大器74，第一路窄带输入级放大器75、第一路窄带驱动级放大器72与第二路窄带输入级放大器76、第二路窄带驱动级放大器74的频段不同。
差分信号通过第一路窄带输入级放大器5、第一路窄带驱动级放大器72，第二路窄带输入级放大器76、第二路路窄带驱动级放大器74进入，然后通过输宽带输出级71后输出。
本发明实施例，所述频率可重构低噪声放大器支持双频段三个模式，具有滤波响应的单频模式和一个双频组合的宽带模式，通过调节两级输出放大器的偏置可实现三种工作模式的切换；如图7所示，频率可重构低噪声放大器，由多个放大器连接形成，包括一个工作于宽带的宽带低噪声输入级和两个工作于不同频带的窄带驱动级；两个窄带驱动级的输入端并联后通过宽带级间匹配网络与宽带低噪声输入级的输出端连接，每个窄带驱动级包括一个窄带驱动级放大器，与窄带驱动级放大器通过级间匹配网络连接的一个窄带输出级放大器，通过调节两个窄带驱动级的偏置实现三种工作模式的切换。
具体的，包括宽带低噪声输入级放大器81、两路不同频段的第一路窄带驱动级放大器82和第二路窄带驱动级放大器83和两路不同频段的第一路窄带输出级放大器84和第二路窄带输出级放大器85。
差分信号通过宽带低噪声输入级放大器81、两路不同频段的第一路窄带驱动级放大器82，第二路窄带驱动级放大器83和两路不同频段的第一路窄带输出级放大器84和第二路窄带输出级放大器85放大后输出。
本发明实施例中，所述的频率可重构功率放大器38的输入级放大器71和双频低噪声可重构放大器39的宽带输入级低噪声放大器81，示例性的，采用双向放大器的结构，采用双向匹配的设计形式，共用匹配网络与天线阻抗进行匹配， 有益于减少损耗和结构复杂度，如图8所示。输入级放大器71、宽带输入级低噪声放大器81共用匹配网络93，匹配网络采用关断状态的功率放大器和低噪声放大器放大管作为匹配元件，避免了额外的开关损耗和传输线，有益于减小损耗，，有效提升发射效率和降低接收噪声系数，最大化发射链路的效率和接收链路的噪声。
本发明实施例中，基于实施例7的可重构功率放大器的输入匹配模块，可以采用如图9的输入匹配结构100，采用传输线实现双频信号分路，采用基于传输线实现的共面波导完成输入级与源阻抗的匹配，具有一个信号输入端以及两个信号输出端，两个信号输出界面不同频率的信号，信号(RFin)从输入端进入后分成从两个输出端口输出，RFout1输出一个频率的信号，RFout1输出另一个频率的信号，实现双频信号的传输功能。在不影响所在频带内匹配的同时，将传输线在另一频段下变为高阻状态，能使得两个通路传输信号时相互之间不影响，有益于功率放大器独立传输两个不同频率的信号。
本发明实施例中，所用宽带移相器(PS)如图10所示，包括宽带多相滤波器52和宽带可变增益放大器，其中，宽带可变增益放大器包括第一宽带可变增益放大器53、第二宽带可变增益放大器54，宽带多相滤波器52的输出端分别第一宽带可变增益放大器53、第二宽带可变增益放大器54的输入端连接。
差分信号进入宽带多相滤波器52后，生成正交信号分别进入第一宽带可变增益放大器53、第二宽带可变增益放大器54进行幅度调节后输出。
本发明实施例中，所述宽带多相滤波器52所示，包括多个正交耦合单元(正交信号生成电路)，多个正交耦合单元由第一正交耦合单元61、第二正交耦合单元62、第三正交耦合单元63、第四正交耦合单元64、第五正交耦合单元65以及第六正交耦合单元66连接构成，信号进入高阶级联正交信号生成电路后，为 宽带可变增益放大器提供正交信号。
其中，第一正交耦合单元61、第二正交耦合单元62、第三正交耦合单元63、第四正交耦合单元64组成第二级差分结构，第五正交耦合单元65和第六正交耦合单元66组成第一级差分结构，第五正交耦合单元65的直通端连接第一正交耦合单元61的输入端，第五正交耦合单元65的耦合端连接第二正交耦合单元62的输入端，第六正交耦合单元66的直通端连接第三正交耦合单元63的输入端，第六正交耦合单元66的耦合端连接第四正交耦合单元64的输入端。
第一正交耦合单元61的直通端与第四正交耦合单元64的耦合端相连、第二正交耦合单元62的耦合端与第三正交耦合单元64的直通端相连，构成一组差分输出信号OUT1；
第一正交耦合单元61的耦合端与第二正交耦合单元62的直通端相连、第一正交耦合单元63的耦合端与第四正交耦合单元64的直通端相连，构成与输出信号OUT1正交的差分输出信号OUT2，信号OUT1和OUT2为混频器提供正交的中频信号。
差分信号从输入端进入，一路进入第五正交耦合单元65，再经过第五正交耦合单元65后级联的第一正交耦合单元61和第二正交耦合单元62输出，另一路进入第六正交耦合单元66，再经过第六正交耦合单元66后级联的第三正交耦合单元63和第四正交耦合单元64输出。
示例性的，正交耦合单元采用基于耦合电感和电容的集总元件结构，有益于整体电路的小型化。每个正交耦合单元均为由电感、电容组成的正交耦合单元，示例性的，如图12所示，其中，每个正交耦合单元的输入端(IN)和直通端(THRU)、耦合端(COUP)和隔离端(ISO)之间连接耦合电感，输入端和耦合端、直通端和隔离端之间连接电容。
本发明实施例，所述的宽带可变增益放大器结构包括多个共栅晶体管，寄生补偿电路和恒流源电路；差分信号进入差分数控共栅晶体管构成的开关阵列，经过寄生补偿电路和恒流源电路，实现宽带可控增益放大；采用交叉耦合电流舵结构通过中心节点的电感实现阻抗匹配，并且补偿开关阵列寄生电容，有益于实现宽带低寄生相移的可控增益放大。如图13所示，宽带可变增益放大器为差分电路，包括从输入端到输出端依次连接的差分共栅晶体管M4、M5和数控共栅晶体管电路M3、M6、寄生补偿电路Ld、提供恒定电流的晶体管电路M1、M2。差分共栅晶体管M4、M5的栅级分别通过一个电阻连接偏置Vb，晶体管M3、M4的源极相接，并用于接射频信号RF in+，晶体管M5、M6的源极相接，并用于接射频信号RF in-；晶体管M3的漏极与晶体管M5的漏极相接后接一个寄生补偿电感Ld的一端，晶体管M4的漏极与晶体管M6的漏极相接后接另一寄生补偿电感Ld的一端，两个寄生补偿电感Ld的另一端分别接晶体管M1、M2的源极，晶体管M1、M2的漏极作为射频信号输出端(RFout+，Rfout-),晶体管M1、M2的栅极通过两个串联的电阻连接，两个串联的电阻之间的连接线Va点为晶体管M1、M2提供偏置，电容C1、电容C2的一端分别连接晶体管M1、M2的源极，电容C1、电容C2的另一端分别晶体管M1、M2的栅极相接。
中频宽带可变增益放大器中，晶体管M4、M5的栅极各自通过电阻提供Vb偏置，数控晶体管M3、M6的栅极各自通过串联的反相器、电阻提供Vb偏置，射频信号(RF in+，RF in-)由晶体管M3、M4、M5、M6的源极输入。
差分共栅晶体管M4、M5和数控共栅晶体管M3、M6电路交叉耦合连接，其中，共栅晶体管M3和M6由一组晶体管并联组成，导通数量由数字位控制，数字位输入高电平时，通过反相器后信号变为低电平，晶体管不导通；数字位输入低电平时，通过反相器后信号变为高电平，晶体管导通，放大器的增益与 晶体管导通数量成比例，用于实现数字控制的可变增益信号放大功能。
中频宽带可变增益放大器中的寄生补偿电感Ld，用于补偿共栅晶体管M4、M5和数控共栅晶体管M3和M6的输出寄生参数。
本发明的实例中频宽带可变增益放大器中提供恒定电流的晶体管电路M1、M2、电容C1、电容C2置于寄生补偿电感Ld的输出端，同时可以提供合适的输出阻抗，便于输出匹配网络的设计。
工作时，信号从共栅晶体管电路304分别进入共栅晶体管M3、M4组成的第一数控晶体管阵列以及共栅晶体管M4、M6组成的第一数控晶体管阵列(数控晶体管阵列的导通数量由数字位控制，用于实现数字控制的可变增益信号放大功能)，后经过交叉电流舵结构303和寄生补偿电感302来补偿共栅晶体管和数控共栅晶体管的输出寄生参数；最后从提供恒定电流的晶体管电路301输出，恒流源晶体管电路可以提供合适的输出阻抗，易于整体可变增益放大器的匹配。
本发明实施例中，双频毫米波相控阵系统，可以连接多个双频双极化天线，并且在PCB上实现二维扩展，组成高阶相控阵系统阵列。如实施例1的双频毫米波相控阵系统(如图1所示)，可以连接在一起形成5G双频毫米波相控系统阵列，形成高阶相控阵系统阵列，如图14，所述高阶相控阵阵列包括四个双频毫米波相控阵系统，分别是第一双频毫米波相控阵系统401、第二双频毫米波相控阵系统402、第三双频毫米波相控阵系统403、第四双频毫米波相控阵系统404；四个双频毫米波相控阵系统之间通过阵列间的宽带功分器相连接，发射信号时，信号从垂直极化和水平极化端口输入后，通过阵列间的宽带功分器实现将分别从四个双频毫米波相控阵系统的水平极化通道和垂直极化通道输入，进入每一个双频毫米波相控阵系统，经双极化相控阵通道以及双频双极化天线发射到空间，实现高阶相控阵系统的双极化信号传输；接收信号时，从双频双极化天线 接收后，进入每一个双频毫米波相控阵系统，经双极化相控阵通道、极化泄露抵消电路后，再阵列间的经宽带功分器输入到高阶相控阵系统阵列的垂直极化端口、水平极化端口输出。
本发明实施例，所述双频双极化天线和多个双极化相控阵通道、多个宽带功分器以及极化泄露抵消电路整体可以采用封装天线(AIP)封装技术，将天线与芯片整体封装，有利于后期芯片的使用。其中，封装天线(AIP)封装技术，包括嵌入式晶圆级球栅阵列封装。
本发明实施例，所述的双频毫米波相控阵系统芯片的多个双极化相控阵通道、多个宽带功分器以及极化泄露抵消电路可采用晶圆级芯片封装技术(WLCSP)封装，之后再与芯片外部的双频双极化天线相连，从而有益于得到一个小尺寸紧凑型封装。
以上显示和描述了本发明的基本原理和主要特征和本发明的优点,对于本领域技术人员而言，显然本发明不限于上述示范性实施例的细节，而且在不背离本发明的精神或基本特征的情况下，能够以其他的具体形式实现本发明；
因此，无论从哪一点来看，均应将实施例看作是示范性的，而且是非限制性的，本发明的范围由所附权利要求而不是上述说明限定，因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内，不应将权利要求中的任何附图标记视为限制所涉及的权利要求。
此外，应当理解，虽然本说明书按照实施方式加以描述，但并非每个实施方式仅包含一个独立的技术方案，说明书的这种叙述方式仅仅是为清楚起见，本领域技术人员应当将说明书作为一个整体，各实施例中的技术方案也可以经适当组合，形成本领域技术人员可以理解的其他实施方式。

Claims (18)

  1. 双频毫米波相控阵系统，其特征在于，包括能接收和发射双频双极化信号的5G双频毫米波相控阵芯片，与5G双频毫米波相控阵芯片连接的用于传输双频双极化信号的多个双频双极化天线，5G双频毫米波相控阵芯片支持双频段三个模式，包括两个具有滤波响应的单频模式和一个双频组合的宽带模式，其上有由水平极化相控通道与垂直极化相控通道构成的多个双极化相控阵通道、宽带功分器和极化泄露抵消电路；双极化相控阵通道用于在发射和接收状态下对双频段的信号放大、调幅和调相，每个双频双极化天线连接一个双极化相控阵通道，每个双极化相控阵通道通过宽带功分器与极化泄露抵消电路连接，极化泄露抵消电路连接垂直极化端口和水平极化端口；接收模式下，接收的极化信号经过宽带功分器合成后射频通道的信号经极化泄露抵消电路后由垂直极化端口、水平极化端口输出；发射模式下，发射的极化信号经极化泄露抵消电路后通过宽带功分器功分输出至双极化相控阵通道后，由双频双极化天线发射出去。
  2. 如权利要求1所述的双频毫米波相控阵系统，其特征在于，所述双极化相控阵通道的发射链路包括频率可重构功率放大器、与频率可重构功率放大器通过发射匹配网络连接的第一宽带可变增益放大器、与第一宽带可变增益放大器连接的第一宽带缓冲器、与第一宽带缓冲器连接的第一宽带移相器；
    发射模式下，发射信号由水平极化端口和\或垂直极化端口输入并通过极化泄露抵消电路后，经宽带功分器功率分配后进入双极化相控阵通道，经宽带开关后依次经第一宽带移相器对信号调相，第一宽带缓冲器进行固定增益放大，第一宽带可变增益放大器进行调幅以及频率可重构功率放大器进行功率放大，最后通过双频双极化天线发射；
    所述双极化相控阵通道的接收链路包括频率可重构低噪声放大器、与频率 可重构低噪声放大器通过接收匹配网络连接的第二宽带移相器、与第二宽带移相器连接的第二宽带缓冲器、与第二宽带缓冲器连接的第二宽带可变增益放大器；
    接收模式下，双频双极化天线将接收信号依次通过频率可重构低噪声放大器放大，第二宽带移相器调相，第二缓冲放大器恒定增益放大以及第二可变增益放大器调幅，之后通过宽带开关进入宽带功分器完成极化通道功率合成，通过极化泄露抵消电路从水平极化端口和\或垂直极化端口输出；
    其中，所述第二宽带可变增益放大器、第一宽带移相器各通过一个匹配网络与宽带开关与连接，宽带开关用于发射链路与接收链路的切换。
  3. 如权利要求2所述的双频毫米波相控阵系统，其特征在于，所述频率可重构的功率放大器工作在两个不同频段，形成三个工作模式，包括两个具有滤波响应的单频模式和一个双频组合的宽带模式，包括工作于不同频带的两个窄带驱动级和工作于宽带的一个宽带输出级，两个窄带驱动级在输出端并联后通过宽带级间匹配网络与宽带输出级的输入端连接；每个窄带驱动级包括一个窄带输入级放大器、与窄带输入级放大器通过级间匹配网络连接的一个窄带驱动级放大器；通过调节两个窄带驱动级的偏置实现三种工作模式的切换。
  4. 如权利要求2所述的双频毫米波相控阵系统，其特征在于，所述频率可重构低噪声放大器能工作在两个不同频段，形成三个工作模式，包括一个工作于宽带的宽带低噪声输入级和两个工作于不同频带的窄带驱动级；两个窄带驱动级的输入端并联后通过宽带级间匹配网络与宽带低噪声输入级的输出端连接，每个窄带驱动级包括一个窄带驱动级放大器，与窄带驱动级放大器通过级间匹配网络连接的一个窄带输出级放大器，通过调节两个窄带驱动级的偏置实现三种工作模式的切换。
  5. 如权利要求2所述的双频毫米波相控阵系统，其特征在于，所述频率可重构的功率放大器的宽带输出级以及频率可重构低噪声放大器的宽带低噪声输入级采用双向匹配的形式，共用匹配网络。
  6. 如权利要求1所述的双频毫米波相控阵系统，其特征在于，所述双频双极化天线包括堆叠式贴片天线。
  7. 如权利要求6所述的双频毫米波相控阵系统，其特征在于，所述堆叠式贴片天线包括高频天线层，半固化片层，低频天线层、接地层以及同轴线；所述半固化片层位于高频天线和低频天线中间，接地层处于结构最底层，同轴线一端连地，另一端向上层高频天线和低频天线进行馈电。
  8. 如权利要求1所述的双频毫米波相控阵系统，其特征在于，所述宽带功分器为多个，每个垂直极化相控通道在及水平极化相控通道各自连接一个宽带功分器，垂直极化相控通道连接的宽带功分器通过一个总宽带功分器与极化泄露抵消电路连接，水平极化相控通道连接的宽带功分器通过另一个总宽带功分器与极化泄露抵消电路连接。
  9. 如权利要求8所述的双频毫米波相控阵系统，其特征在于，所述宽带功分器包含两个一分四功分网络，共八个端口，其中一个一分四功分网络具有四个垂直极化通道，另一个一分四功分网络具有四个水平极化通道；每个一分四功分网络包含一个一阶传输线匹配网络以及两个二阶集总元件匹配网络；一阶传输线匹配网络的输出端与两个二阶集总元件匹配网络的输入端连接。
  10. 如权利要求1所述双频毫米波相控阵系统，其特征在于，所述极化泄露抵消电路，根据接收模式和发射模式调节信号传输方向和信号通路，产生与极化信号幅度相同、相位相反的极化抵消信号，与泄露的极化信号相互抵消，包括第一功分器和第三功分器，第一功分器的一路经第一开关与第一移相器、第 一缓冲器、第一可变增益放大器依次连接形成的第一发射抵消单元以及第三移相器、第三缓冲器、第三可变增益放大器依次连接形成的第一接收抵消单元连接，第一可变增益放大器与第三移相器通过第二开关连接第二功分器，第一移相器与第三移相器连接第一开关，第一功分器的另一路经第三开关连接第一功率放大器的输出端、第三功率放大器的输入端，第一功率放大器的输出端、第三功率放大器的输入端通过第四开关连接到第四功分器；
    第三功分器的一路经过第五开关与第二移相器、第二缓冲器、第二可变增益放大器依次连接形成的第二发射抵消单元以及由第四移相器、第四缓冲器、第四可变增益放大器依次连接形成的第二接收抵消单元连接，第四移相器及第二可变增益放大器与第六开关连接，第六开关连接第四功分器，第五开关与第二移相器及第四可变增益放大器连接；第三功分器的另一路经过第七开关与第二功率放大器的输入端、第四功率放大器的输出端连接，第二功率放大器的输出端、第四功率放大器的输入端通过第八开关连接第二功分器的第二分量输入输出接口。
  11. 如权利要求2所述双频毫米波相控阵系统，其特征在于，所述可重构功率放大器的输入匹配模块，采用基于传输线实现的共面波导完成输入级与源阻抗的匹配，基于传输线实现双频信号分路，具有一个信号输入端以及两个信号输出端，两个信号输出端输出不同频率的信号，在不影响所在频带内匹配的同时，将传输线在另一频段下变为高阻状态，使得两个通路传输信号时相互之间不影响。
  12. 如权利要求2所述的双频毫米波相控阵系统，其特征在于，所述第一宽带移相器以及第二宽带移相器采用结构相同的宽带移相器，所述宽带移相器结构包括一个宽带多相滤波器和两个可变增益放大器，宽带多相滤波器的输出端 与两个可变增益放大器的输入端连接；差分信号经过宽带多相滤波器后输出正交信号，两个可变增益放大器对输出的正交信号的幅度分别调节。
  13. 如权利要求12所述的双频毫米波相控阵系统，其特征在于，所述宽带多相滤波器包括多个正交耦合单元，多个正交耦合单元高阶级联在一起，形成级联正交信号生成电路。
  14. 如权利要求2所述的双频毫米波相控阵系统，其特征在于，所述第一宽带可变增益放大器以及所述第二宽带可变增益放大器采用相同的宽带可变增益放大器，所述宽带可变增益放大器从输入端到输出端，包括依次连接的差分共栅晶体管和数控共栅晶体管电路、寄生补偿电路、提供恒定电流的晶体管电路；所述差分共栅晶体管和数控共栅晶体管电路交叉耦合，用于实现数字控制的可变增益信号放大；所述寄生补偿电路用于补偿共栅晶体管和数控共栅晶体管的输出寄生参数；所述提供恒定电流的晶体管电路同时提供合适的输出阻抗，以便于匹配差分信号进入差分数控共栅晶体管构成的开关阵列，经过寄生补偿电路和恒流源电路，实现宽带可控增益放大。
  15. 如权利要求14所述的双频毫米波相控阵系统，其特征在于，所述宽带可变增益放大器采用交叉耦合电流舵结构通过中心节点的电感实现阻抗匹配，并且补偿开关阵列寄生电容，实现宽带低寄生相移的可控增益放大。
  16. 如权利要求1所述的双频毫米波相控阵系统，其特征在于，所述双频双极化天线、双极化相控阵通道、宽带功分器以及极化泄露抵消电路整体采用天线封装技术(AIP)进行封装，包括嵌入式晶圆级球栅阵列封装。
  17. 如权利要求1所述的双频毫米波相控阵系统，其特征在于，所述双极化相控阵通道、宽带功分器以及极化泄露抵消电路整体采用晶圆级芯片封装技术(WLCSP)封装后，再与芯片外部的双频双极化天线相连。
  18. 如权利要求1所述的双频毫米波相控阵系统，其特征在于，双频毫米波相控阵系统在PCB上二维扩展，组成高阶相控阵系统阵列。
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