WO2023282482A1 - Method for manufacturing copper foil for semiconductor and copper foil for semiconductor using same - Google Patents

Method for manufacturing copper foil for semiconductor and copper foil for semiconductor using same Download PDF

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Publication number
WO2023282482A1
WO2023282482A1 PCT/KR2022/008214 KR2022008214W WO2023282482A1 WO 2023282482 A1 WO2023282482 A1 WO 2023282482A1 KR 2022008214 W KR2022008214 W KR 2022008214W WO 2023282482 A1 WO2023282482 A1 WO 2023282482A1
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Prior art keywords
copper foil
layer
cathode
semiconductors
rotating plate
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PCT/KR2022/008214
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French (fr)
Korean (ko)
Inventor
이대인
이종인
이이근
Original Assignee
주식회사 다이브
이대인
이종인
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Publication of WO2023282482A1 publication Critical patent/WO2023282482A1/en

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    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D1/00Electroforming
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D1/00Electroforming
    • C25D1/04Wires; Strips; Foils
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/03Manufacturing methods
    • H01L2224/034Manufacturing methods by blanket deposition of the material of the bonding area
    • H01L2224/0346Plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern

Definitions

  • the present invention relates to a method for manufacturing copper foil for semiconductors, which is sequentially deposited on one cathode rotating plate and provided, and to a copper foil for semiconductors using the same.
  • the copper clad laminate for semiconductors refers to a substrate in which a copper plate having a thickness of 10 ⁇ m or less is attached to an insulating substrate.
  • the copper-clad laminate can form a more complex and precise circuit on the printed circuit board as the thickness of the copper foil attached thereto becomes thinner. However, when the thickness of the copper foil is 5 ⁇ m or less, the mechanical strength of the copper foil is rapidly reduced, and damage or cracking may occur during the manufacturing or attachment process of the copper foil.
  • the present invention is a semiconductor copper foil manufacturing method for manufacturing one semiconductor copper foil by sequentially depositing a carrier metal layer, a separation layer, an electrode copper foil layer and a roughening treatment layer on one cathode rotating plate, and using the same A copper foil for semiconductors can be provided.
  • One embodiment of the present invention for achieving the above object is manufactured by a copper foil manufacturing apparatus including a cathode rotating plate rotating in one direction and first to fifth electrolysis cells spaced apart from each other at predetermined intervals along the cathode rotating plate, , depositing a carrier metal layer on the cathode rotating plate by the first electrolytic cell, depositing a separation layer on the carrier metal layer by the second electrolytic cell, and an ultra-copper foil layer on the separation layer by the third electrolytic cell.
  • the first to fifth electrolytic cells include an electrolyte solution and a cathode material therein, and currents and electrolyte solutions having different sizes may be independently supplied to each electrolysis cell.
  • the carrier metal layer is formed by spraying a first electrolyte into the first electrolytic cell and then passing a first current, and the first cathode material included in the first electrolytic cell has solubility. It can be provided as a metal plate or a metal ball.
  • the separation layer is formed by spraying a second electrolyte into the second electrolytic cell and then passing a second current
  • the second anode material included in the second electrolytic cell is iridium oxide ( Ir 2 O 3 ) may be provided as a titanium (Ti) plate.
  • the copper foil layer is formed by spraying a third electrolyte into the third electrolytic cell and then passing a third current
  • the third anode material included in the third electrolytic cell is iridium oxide ( Ir 2 O 3 ) may be provided as a titanium (Ti) plate.
  • the step of forming the roughened layer includes a first roughening step of forming and fixing copper nuclei and a second roughening step of growing the copper nuclei, wherein the first roughening step may be performed by a fourth anode material provided as a titanium (Ti) plate coated with iridium oxide (Ir 2 O 3 ).
  • the second roughening step is a fifth material provided with any one of a soluble metal piece (Metal plate) or a titanium (Ti) plate coated with iridium oxide (Ir 2 O 3 ). Characterized in that it is carried out by a cathode material, a method of manufacturing a copper foil for semiconductors.
  • the separation layer precipitated on the upper surface of the carrier metal layer, the ultra-copper foil layer precipitated on the upper surface of the separation layer, the roughened layer formed on the surface of the ultra-copper thin layer, and the surface of the roughened layer A copper foil for semiconductors including a formed anti-corrosion plating layer, wherein the copper foil for semiconductors includes a cathode rotating plate rotating in one direction and first to fifth electrolytic cells spaced apart from each other along the cathode rotating plate at predetermined intervals. It is manufactured by the apparatus, and as the cathode rotating plate rotates, the first to fifth electrolytic cells are sequentially electroformed with the cathode rotating plate to form a single semiconductor copper foil. It is about.
  • the first to fifth electrolytic cells contain an electrolyte solution and a cathode material therein, and independently supply currents of different magnitudes to each electrolysis cell to independently electroform the cathode rotating plate. It can be manufactured by a copper foil manufacturing apparatus.
  • the carrier metal layer is made of copper (Cu), nickel (Ni), chromium (Cr), aluminum (Al) or an alloy containing the same, and may have a thickness of 5 to 50 ⁇ m. .
  • the separation layer is provided as an alloy layer of indium (In), zinc (Zr), and chromium (Cr), and may have a thickness of 0.01 ⁇ m or less.
  • the present invention deposits the carrier metal layer, the separation layer, the ultra-copper foil layer, and the roughening layer on one cathode rotating plate in one-pass, and the time and cost required when manufacturing copper foil for semiconductors. can save
  • the present invention can prevent the copper foil from being folded or torn by directly depositing the copper foil layer on the carrier metal layer and the separation layer.
  • the present invention divides the step of forming the roughened layer into two steps, and at this time, the temperature of the cathode material and the electrolyte solution is provided differently to form the roughened layer in the most optimized way.
  • FIG. 1 is a flowchart illustrating a method of manufacturing a copper foil for semiconductors according to an embodiment of the present invention.
  • FIG. 2 is a view for explaining a copper foil for semiconductors according to an embodiment of the present invention.
  • FIG. 3 is a view for explaining an apparatus for manufacturing copper foil for semiconductors according to an embodiment of the present invention.
  • One feature of the present invention relates to a method for manufacturing a copper foil for semiconductors. More preferably, it can be manufactured by a copper foil manufacturing apparatus including a cathode rotating plate rotating in one direction and a plurality of electrolytic cells spaced apart from each other at predetermined intervals along the cathode rotating plate. In addition, as the cathode rotating plate rotates, the plurality of electrolytic cells may be electroformed sequentially with the cathode rotating plate to be produced in one-pass.
  • the copper foil for semiconductor according to an embodiment of the present invention can be manufactured as one finished product by performing the deposition process of each layer in real time through one operation cycle (One cycle) using one device.
  • a copper foil for a semiconductor may include a carrier metal layer provided as an electrodeposited copper foil or the like. This means that in order to manufacture the copper foil for semiconductors, the carrier metal layer must be purchased separately or a device for manufacturing the carrier metal layer must be separately provided.
  • the thickness of the ultra-copper foil layer is reduced to 5 ⁇ m or less, there is a problem in that the quality of the ultra-copper foil layer laminated on the carrier metal layer is greatly affected by the surface state of the carrier metal layer.
  • the surface state of the carrier metal layer should be continuously managed, and if the surface state of the carrier metal layer is below a certain level, the entire amount should be discarded.
  • the present invention can manufacture a carrier metal layer through one copper foil manufacturing apparatus, and deposit a separation layer, an ultra-copper foil layer, and a roughened layer on the carrier metal layer in real time. Through this, it is possible to reduce the cost of separately purchasing equipment for manufacturing the carrier metal layer and to reduce the management cost of the carrier metal layer.
  • the present invention can perform the precipitation process of each layer in real time through one cycle using one device, and can manufacture a finished product with one device. Through this, the present invention can improve productivity and reduce cost of the copper foil for semiconductors.
  • the present invention can perform a roughening treatment to generate fine particles on the surface of the ultra-copper foil layer through the above-described single copper foil manufacturing apparatus. Through this, it is possible to form a roughened layer on the surface of the copper foil layer.
  • the fine particles may be provided as copper (Cu) particles, but are not limited thereto.
  • the copper foil for semiconductors can be manufactured by a copper foil manufacturing apparatus including a cathode rotating plate rotating in one direction and a plurality of electrolytic cells spaced apart from each other at predetermined intervals along the cathode rotating plate.
  • a carrier metal layer, a separation layer, an ultra-copper foil layer, and a roughening treatment layer are sequentially deposited through the device of, so that one copper foil for a semiconductor can be manufactured.
  • the copper foil manufacturing apparatus may include a plurality of electrolysis cells in one apparatus. At this time, the user can diversify the properties of the metal layer by independently supplying current and electrolyte of different sizes to each electrolysis cell.
  • the carrier metal layer may be formed by passing a first current after spraying a first electrolyte into the first electrolytic cell, and the separation The layer may be formed by passing a second current after spraying a second electrolyte into the second electrolytic cell.
  • the copper foil layer is formed by spraying a third electrolyte into the third electrolysis cell and then passing a third current
  • the roughening layer is formed by spraying a fourth electrolyte into the fourth electrolysis cell and then passing a third current through the fourth electrolytic cell. It may be formed through a process of passing current and a process of passing a fifth current after spraying a fifth electrolyte into the fifth electrolytic cell.
  • the copper foil for semiconductors according to an embodiment of the present invention is manufactured through a single device including a plurality of electrolysis cells, and by independently supplying current and electrolyte to the plurality of electrolysis cells, the material, thickness, characteristics can be independently controlled.
  • anti-rust treatment may be performed on the copper foil for semiconductors.
  • FIG. 1 is a flowchart for explaining a manufacturing method of a copper foil for semiconductors according to an embodiment of the present invention
  • FIG. 2 is a diagram for explaining a copper foil for semiconductors according to an embodiment of the present invention
  • FIG. 3 is an embodiment of the present invention. It is a figure for explaining the copper foil manufacturing apparatus for semiconductors according to an example.
  • a carrier metal layer is deposited on the cathode rotating plate by a first electrolytic cell (S10), and a carrier metal layer is deposited on the carrier metal layer by a second electrolytic cell.
  • the copper foil 100 for semiconductors according to an embodiment of the present invention can be manufactured as a single device, and more preferably, a copper foil including one cathode rotating plate 200 and a plurality of electrolysis cells 300. It can be manufactured by the manufacturing apparatus 1000.
  • the copper foil manufacturing apparatus 1000 includes a cathode rotating plate 200 rotating in one direction and a plurality of electrolytic cells 300 spaced apart from each other along the cathode rotating plate 200 at predetermined intervals. can include
  • the cathode rotating plate 200 may be provided by welding a plurality of titanium plates (Ti plates) in a ring shape, more preferably in an endless plate ring shape.
  • the titanium plate constituting the cathode rotating plate 200 may be provided in a width of 0.1 to 2 m, a length of 5 to 50 m, and a thickness of 1 to 30 mm, but is not limited thereto, and the manufacturing environment can be changed at any time according to
  • a plurality of conduction rolls may be formed on the inner surface of the cathode rotating plate 200, and may be rotated in one direction using the plurality of conduction rolls.
  • the cathode rotating plate 200 may be energized as a cathode through the conduction roll.
  • the conduction roll may serve to charge the cathode rotary plate 200 and may also serve as a driving roll to rotate the cathode rotary plate 200 in one direction.
  • the cathode rotating plate 200 may perform additional heat treatment after welding and assembling. Through this, the cathode rotating plates 200 can be strongly coupled to each other, and stress formed during the coupling process can be removed to prevent deformation or peeling of the thin film during the manufacturing process.
  • the heat treatment is preferably performed at 500 to 700 ° C for 10 to 100 minutes. If the heat treatment is performed at less than 500 ° C or less than 10 minutes, stress remains between the cathode rotating plate 200 and the metal In the process of manufacturing the thin film, deformation and peeling may occur.
  • productivity may decrease and thermal deformation may occur.
  • the heat treatment may be performed at 500 to 700°C for 10 to 100 minutes, more preferably at 600 to 650°C for 30 to 50 minutes.
  • the plurality of electrolytic cells 300 may include first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2, and may further include more electrolytic cells.
  • the first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2 may be spaced apart from each other at predetermined intervals along one cathode rotation plate 200, and as the cathode rotation plate 200 rotates, Accordingly, the first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2 may be electroformed simultaneously with the cathode rotating plate 200 to form one copper foil 100 for semiconductors.
  • a predetermined space may be formed inside the electrolysis cell 300, and the cathode material 310 and the electrolyte supply nozzle 330 may be included in the space.
  • the electrolyte may be injected into the inner space of the electrolysis cell 300 through the electrolyte supply nozzle 330 .
  • the first electrolysis cell 300a may include a first positive electrode material 310a and a first electrolyte supply nozzle 330a therein, and the first electrolyte supply nozzle 330a may include the first electrolytic solution supply nozzle 330a.
  • the first electrolyte may be filled between the cathode rotating plate 200 and the first positive electrode material 410a by spraying the first electrolyte into the cell 310a.
  • first electrolysis cell 300a In this specification, only the configuration of the first electrolysis cell 300a has been described, but it is not limited thereto, and the second electrolysis cell 300b, the third electrolysis cell 300c, the fourth electrolysis cell 300d-1 and the fifth electrolysis cell 300d-1 are described. The same can be applied to the cell 300d-2, and can be equally applied to more electrolysis cells.
  • step S10 a first current is passed between the cathode rotating plate 200 and the first anode material 310a after spraying the first electrolyte into the first electrolysis cell 300a.
  • This is a step of depositing the carrier metal layer 110 by conducting a current.
  • the carrier metal layer 110 means a metal layer for preventing scratches, wrinkles, and bending of the ultra-copper foil layer 150 to be described later and protecting the glossy surface of the ultra-copper foil layer 150 from being exposed to foreign substances.
  • the carrier metal layer 110 is made of copper (Cu), nickel (Ni), chromium (Cr), aluminum (Al) or an alloy containing the same, and is formed through electroplating or sputtering. It can be.
  • the carrier metal layer is described as an example of an electrodeposited copper foil containing copper (Cu), but is not limited thereto.
  • the carrier metal layer 110 may be formed to have a thickness of 5 to 50 ⁇ m.
  • the thickness of the carrier metal layer 110 is less than 5 ⁇ m, the copper foil layer 150 may be scratched, wrinkled, or bent due to lack of rigidity.
  • the thickness of the carrier metal layer 110 exceeds 50 ⁇ m, residues remain during the peeling process of the carrier metal layer 110, which can reduce electrical characteristics of the insulation layer on which the copper foil layer 150 is stacked. .
  • the carrier metal layer 110 may have a thickness of 5 to 50 ⁇ m, more preferably 9 to 30 ⁇ m.
  • the first electrolyte solution may be provided as an electrolyte solution in which one or more metal ions of copper (Cu), nickel (Ni), and aluminum (Al) are dissolved in a sulfuric acid (H 2 SO 4 ) solution, and more preferably More specifically, it may be provided as an electrolyte solution in which copper (Cu) ions are dissolved in a sulfuric acid (H 2 SO 4 ) solution.
  • the first positive electrode material 310a may be provided as a metal plate or metal ball having solubility. That is, the first cathode material 310a may be provided as a soluble copper plate or a copper ball.
  • an excess of oxygen (O 2 ) is generated on the surface of the first cathode material 310a during the electrolysis process.
  • Excessive oxygen (O 2 ) generated on the surface of the first positive electrode material 310a may be attached to the surface of the negative electrode rotating plate 200 to be electrodeposited and cause surface defects of the carrier metal layer 110, and the carrier metal layer 110 ) may be oxidized to weaken the electrical properties.
  • the present invention provides the first positive electrode material 310a in the form of a soluble copper piece (Cu plate) or a copper ball (Cu ball) so that the excess oxygen (O 2 ) is removed from the cathode rotating plate (200). ) It can be discharged into the space formed between copper plates or copper balls without being attached to the surface. Through this, the quality of the carrier metal layer 110 can be improved.
  • the insoluble cathode material has a problem in that the required power increases during electroforming because the voltage required is higher than that of the soluble cathode material.
  • the downside is that it requires equipment.
  • the user can visually check the remaining amount and replacement period of the first cathode material 310a. Through this, there is an advantage in that it is easy to check the replacement cycle of the first cathode material 310a and optimize process conditions.
  • the separation layer 130 is formed by spraying the second electrolyte into the second electrolysis cell 310b and then passing a second current between the cathode rotating plate 200 and the second anode material 310b. This is the step of precipitation.
  • the peeling layer 130 is a metal layer provided between the carrier metal layer 110 and the copper foil layer 150 to be described later.
  • the carrier metal layer 110 can be separated to adhere the copper foil layer 150 to the insulating layer.
  • the separation layer 130 may be provided as a nano-scale metal layer, and more preferably may have a thickness of less than 20 nm.
  • the peel strength required to peel the separation layer 130 increases, so that the carrier metal layer 110 and the copper foil layer 150 are separated.
  • the peel force of the separation layer 130 may increase to 50 N/m or more. This is because the carrier metal layer 110 is not easily separated, and an additional process is required.
  • the separation layer 130 is too thin and may be separated from the carrier metal layer 110 before the semiconductor copper foil 100 is adhered to the insulating layer. That is, it is difficult to properly attach the copper foil 100 for a semiconductor to a position desired by a user.
  • the thickness of the separation layer 130 is preferably less than 20 nm, more preferably 1 to 10 nm.
  • the separation layer 130 is provided with metal to finely adjust the thickness. More preferably, the separation layer 130 is indium (In), chromium (Cr), zinc (Zr), nickel (Ni), molybdenum (W), cobalt (Co), silver (Ag), copper (Cu) , It may be provided in the form of one or more metals or alloys selected from the group consisting of aluminum (Al), manganese (Mn), iron (Fe), tin (Sn), and vanadium (V).
  • the separation layer 130 includes a metal layer made of indium (In), chromium (Cr), and zinc (Zn), or at least one of indium (In), chromium (Cr), and zinc (Zn).
  • a metal layer made of indium (In), chromium (Cr), and zinc (Zn), or at least one of indium (In), chromium (Cr), and zinc (Zn).
  • an alloy layer is described as an example, but is not limited thereto.
  • the second electrolyte solution may be provided as an electrolyte solution containing indium (In), chromium (Cr), and zinc (Zr) ions, but is not limited thereto, and according to the judgment of a person skilled in the art, indium (In ), chromium (Cr), zinc (Zr), nickel (Ni), molybdenum (W), cobalt (Co), silver (Ag), copper (Cu), aluminum (Al), manganese (Mn), iron (Fe ), can be used as an electrolyte solution containing at least one metal selected from the group consisting of tin (Sn) and vanadium (V).
  • indium (In ), chromium (Cr), zinc (Zr), nickel (Ni), molybdenum (W), cobalt (Co), silver (Ag), copper (Cu), aluminum (Al), manganese (Mn), iron (Fe ) can be used as an electrolyte solution containing at least one metal selected from the group consisting of
  • the second cathode material 310b may be provided as an insoluble cathode material unlike the first cathode material 310a, and more preferably coated with insoluble iridium oxide (Insoluble Ir 2 O 3 ). It may be provided as a titanium (Ti) plate.
  • step S30 after spraying the third electrolyte into the third electrolysis cell 300c, a third current is passed between the cathode rotating plate 200 and the third anode material 310c to form the copper foil layer 150. This is the step of precipitation.
  • the ultra thin copper foil 150 means an ultra thin copper (Cu) thin film precipitated on the carrier metal layer 110 and the separation layer 130 so that the ultra thin copper foil is adhered to the insulating layer.
  • Cu ultra thin copper
  • the copper foil layer 150 may be deposited to a thickness of 10 ⁇ m or less, more preferably 1 to 5 ⁇ m.
  • the thickness of the ultra-copper foil layer 150 is less than 1 ⁇ m, the ultra-thin copper foil layer 150 is too thin and it is difficult to sufficiently realize electrical characteristics when adhered to the insulating layer.
  • the thickness of the ultra-copper foil layer 150 is less than 1 ⁇ m, it is very difficult to evenly deposit the same thickness on the separation layer 130.
  • the thickness of the copper foil layer 150 exceeds 10 ⁇ m, the thickness of the printed circuit board may increase and thus the semiconductor adhesion may be reduced, and a carrier layer is not required.
  • the thickness of the polar copper foil layer 150 is preferably 10 ⁇ m or less, and more preferably, it may be deposited to a thickness of 1 to 5 ⁇ m.
  • the third electrolyte may be provided as a sulfuric acid (H 2 SO 4 ) solution containing copper (Cu) ions. More preferably, it may be provided as a solution in which 30 to 80 g/L of copper (Cu) ions are mixed with 100 to 200 g/L of sulfuric acid.
  • H 2 SO 4 sulfuric acid
  • the third positive electrode material 310c may be provided as an insoluble positive electrode material similar to the second positive electrode material 310b, and more preferably coated with insoluble iridium oxide (Insoluble Ir 2 O 3 ). It may be provided as a titanium (Ti) plate.
  • insoluble Ir 2 O 3 insoluble iridium oxide
  • Ti titanium
  • the step S40 is a step of forming the roughened layer 170 on the surface of the ultra-copper foil layer 150 by the fourth electrolytic cell 300d1 and the fifth electrolytic cell 300d2.
  • the roughened layer 170 means a metal layer created to increase the adhesive strength between the copper foil layer 150 and the insulating layer. More preferably, the roughened layer 170 may be provided by generating a metal core provided as copper (Cu) on the surface of the copper foil layer 150 and growing the generated metal core.
  • Cu copper
  • the roughened layer 170 means a layer in which copper is grown on the surface of the ultra-copper foil layer 150 so as to improve the adhesion of the ultra-copper foil layer.
  • the surface roughness of the copper foil layer 150 after the step S40 is 1.0 ⁇ m or more, electrical characteristics may be reduced due to excessive surface roughness. It is desirable to increase the surface roughness within the range of maintaining less than 1.0 ⁇ m.
  • the step S40 may be performed by separately electroforming two different types of electrolysis cells and the cathode rotating plate 200, unlike steps S10 to S30 described above.
  • a step in which the fourth electrolytic cell 300d1 and the cathode rotary plate 200 are electroformed is defined as a first roughening step, and the fifth electrolytic cell 300d2 and the cathode rotary plate 200 are electroformed. This step is defined as the second harmonization step.
  • the first roughening step is a step of generating and fixing copper nuclei on the surface of the ultra-copper foil layer 150.
  • the first roughening process is performed by injecting a fourth electrolyte into the fourth electrolytic cell 300d1 and then passing a fourth current between the cathode rotating plate 200 and the fourth anode material 310d1.
  • Copper nuclei may be generated on the surface of the ultra-copper thin layer 150, and the generated nuclei may be fixed to the surface of the ultra-poisonous thin layer 150.
  • the fourth electrolyte may be provided as a solution obtained by mixing 50 to 150 g/L of sulfuric acid with 10 to 30 g/L of copper (Cu) ions, and may be maintained at 15 to 25°C.
  • the first roughening process may be performed by injecting a current density of 5 to 15 A/dm 2 into the fourth electrolysis cell 300d1 for 5 to 20 seconds.
  • the surface roughness (Rz) of the present invention can be increased to 0.05 to 0.3 ⁇ m compared to the surface of the ultra-copper foil layer 150 that has not been roughened.
  • a second roughening process may be performed. Through this, copper nuclei formed on the surface of the ultra-copper foil layer 150 can grow to form a roughened layer.
  • the second roughening treatment step is performed by injecting a fifth electrolyte into the fifth electrolytic cell 300d2 and then passing a fifth current between the cathode rotating plate 200 and the fifth anode material 310d2. It can be. That is, the first roughening treatment may be performed using a different electrolytic cell and in a different type of electrolyte and current state.
  • the fifth electrolyte solution may be provided as a solution in which 50 to 100 g/L of copper (Cu) ions are mixed with 100 to 200 g/L of sulfuric acid. That is, the fifth electrolyte has a higher concentration of copper (Cu) ions than the fourth electrolyte. Due to this difference, the second roughening process can grow the copper core to a sufficient size.
  • the fifth electrolyte is preferably provided at 30 to 60 °C, unlike the fourth electrolyte provided at 15 to 25 °C. That is, in the first electrolytic treatment step, the temperature of the electrolyte solution is limited to 25° C. or less, so that a small number of nuclei may be prevented from excessively growing, and more nuclei may be generated. On the other hand, in the second electrolytic treatment step, the growth rate of the copper nuclei may be improved by providing the temperature of the electrolyte at 30° C. or higher.
  • the present invention may finally form the surface of the ultra-copper foil layer 150 to 1.5 to 4.0 Rz.
  • the fourth positive electrode may be provided as an insoluble positive electrode material, more preferably, a titanium (Ti) plate coated with iridium oxide (Insoluble Ir 2 O 3 ) like the second and third positive electrode materials.
  • the first roughening process is a process of generating and fixing nuclei
  • the voltage condition must be kept constant during the nucleation process, so that the fourth cathode material 310d1 is provided as insoluble. it is desirable
  • the fifth cathode material is provided as a soluble cathode material provided as a copper piece (Cu plate) or a copper ball (Cu ball) having solubility, or a titanium (Ti) plate coated with lithium oxide (Insoluble Ir 2 O 3 ) Any one of insoluble cathode materials may be provided.
  • the fourth positive electrode material is provided as an insoluble positive electrode material of a titanium (Ti) plate coated with iridium oxide (Insoluble Ir 2 O 3 ), and the fifth positive electrode material is a copper piece (Cu plate) or a copper ball. It can be provided as a soluble cathode material provided in (Cu ball).
  • the second roughening step is performed using a soluble anode agent, oxygen (O 2 ) is easily discharged, and additional facilities for supplying copper (Cu) ions are not required, so that copper nuclei can be stably grown.
  • the copper foil 1000 for semiconductors may be peeled off from the cathode rotating plate 200 through the step S50.
  • the semiconductor copper foil 100 is obtained by sequentially depositing the carrier metal layer 110, the separation layer 130, the copper foil layer 150, and the roughening treatment layer 170 by one copper foil manufacturing device.
  • the copper foil 100 for semiconductors can be manufactured by one-pass.
  • the copper foil 100 for semiconductors manufactured through steps S10 to S50 may be subjected to anti-rust treatment through step S60.
  • the anti-corrosive treatment can form a zinc alloy layer on the surface of the roughened copper foil 100 for semiconductors to improve softening resistance and prevent the copper foil 100 for semiconductors from being discolored during storage and processing.
  • a current of 10 to 20 / dm 2 is applied in a state in which the copper foil 100 for a semi-structure is supported in a sulfuric acid (H 2 SO 4 ) solution in which 20 to 80 g / l of zinc (Zn) is dissolved.
  • the anti-rust treatment may be performed by pouring for 20 seconds.
  • the chromate treatment layer may be formed by supporting the anti-corrosive copper foil for semiconductors in a chromic acid (CrO 3 ) solution at 20 to 30 °C.
  • the copper foil 100 for semiconductors is manufactured with a plurality of electrolytic cells including at least first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2. It can be manufactured by the device 1000, and through one device, the carrier metal layer 110, the separation layer 130, the copper foil layer 150, and the roughened layer 170 are sequentially deposited to form one copper foil for semiconductors. (100) can be formed.
  • the first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2 are supplied with a cathode material, electrolyte, and current under the conditions shown in Table 1 below, and the carrier metal layer ( 110), the separation layer 130, the copper foil layer 150, and the roughened layer 170 may be sequentially deposited.
  • H 2 SO 4 150g/l Cu ion: 90g/l 45°C -Soluble - Cu metal ball 30A/ dm2 9 ⁇ m separating layer In ion: 10g/l Cr ion: 20g/l Zn ion: 15g/l C 6 H 5 Na 3 O 7 : 100 g/l 45°C - Insoluble -Ti plate coated by Ir 2 O 3 5A/ dm2 0.01 ⁇ m Far East Laminate H 2 SO 4 : 150g/l Cu ion: 65g/l 40°C - Insoluble -Ti plate coated by Ir 2 O 3 15A/ dm2 2 ⁇ m Coordination treatment layer H 2 SO 4 : 100g/l Cu ion: 15g/l 20°C -Insoluble -Ti plate coated by Ir 2 O 3 10A/ dm2 0.1 ⁇ m H 2 SO 4
  • the carrier metal layer 110, the separation layer 130, and the copper foil layer 150 are formed on one cathode rotating plate 200 according to the conditions disclosed in Table 1 above. And it is possible to manufacture one copper foil 100 for semiconductors by sequentially depositing the roughened layer 170 . Through this, the production process can be simplified by using one copper foil manufacturing apparatus 1000, and the precipitation process of each layer can be performed in real time through one cycle to be manufactured as one finished product.
  • the ultra-copper foil layer 150 by directly depositing the ultra-copper foil layer 150 on the separation layer 130, it is possible to minimize damage and cracks occurring during the deposition process of the ultra-copper foil layer 150. For this reason, even a very thin ultra-thin copper foil layer 150 having a thickness of 5 ⁇ m or less can be stably produced.
  • the present invention is an additional process required to maintain the bonding strength of the metal layers by depositing the carrier metal layer 110, the separation layer 130, the copper foil layer 150, and the roughened layer 170 in real time with one device, or Heat treatment may be omitted, thereby minimizing damage or thermal deformation of the copper foil layer 150 during the manufacturing process.
  • process conditions such as the type, concentration, and current density of the electrolyte solution supplied to the first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2 can be independently controlled.
  • process conditions such as the type, concentration, and current density of the electrolyte solution supplied to the first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2 can be independently controlled.

Abstract

The present specification relates to a method for manufacturing a copper foil for a semiconductor, which is manufactured by a copper foil manufacturing apparatus including a negative electrode rotating plate rotating in one direction and first to fifth electrolytic cells spaced apart from each other at a predetermined interval along the negative electrode rotating plate, the method comprising the steps of: depositing a carrier metal layer on the negative electrode rotating plate by the first electrolytic cell; depositing a separation layer on the carrier metal layer by the second electrolytic cell; depositing an ultra-thin copper foil layer on the separation layer by the third electrolytic cell; and forming a roughening treatment layer on the surface of the ultra-thin copper foil layer by the fourth electrolytic cell and the fifth electrolytic cell, wherein as the negative electrode rotating plate rotates, the first to fifth electrolytic cells are sequentially electroformed with the negative electrode rotating plate to form a single semiconductor copper foil.

Description

반도체용 동박의 제조방법 및 이를 이용한 반도체용 동박Manufacturing method of copper foil for semiconductor and copper foil for semiconductor using the same
본 발명은 하나의 음극 회전판에 순차적으로 석출되어 제공되는 반도체용 동박의 제조방법 및 이를 이용한 반도체용 동박에 관한 것이다. The present invention relates to a method for manufacturing copper foil for semiconductors, which is sequentially deposited on one cathode rotating plate and provided, and to a copper foil for semiconductors using the same.
고주파 신호를 전송할 수 있는 소형 및 박형 전자 제품에 대한 수요가 증가함에 따라, 반도체용 동박 및 동박적층판에 대한 수요 또한 증가하고 있다. As the demand for small and thin electronic products capable of transmitting high frequency signals increases, the demand for copper foil and copper clad laminates for semiconductors is also increasing.
반도체용 동박적층판은 절연기판에 두께 10㎛이하의 극동판을 부착한 기판을 의미한다. 상기 동박적층판은 부착되는 동박의 두께가 얇아질수록 상기 인쇄회로기판에 더욱 복잡하고 치밀한 회로를 형성할 수 있다. 하지만, 상기 극동판의 두께가 5㎛이하가 되면, 상기 동박의 기계적 강도가 급감하여 동박의 제조 또는 부착 과정에서 파손, 균열이 발생할 수 있다. The copper clad laminate for semiconductors refers to a substrate in which a copper plate having a thickness of 10 μm or less is attached to an insulating substrate. The copper-clad laminate can form a more complex and precise circuit on the printed circuit board as the thickness of the copper foil attached thereto becomes thinner. However, when the thickness of the copper foil is 5 μm or less, the mechanical strength of the copper foil is rapidly reduced, and damage or cracking may occur during the manufacturing or attachment process of the copper foil.
상기 문제를 해결하기 위해 상기 동박의 강도를 보완해주는 캐리어 금속층에 동박을 형성한 후, 동박을 기판에 부착한 후 캐리어 금속층을 박리하는 방법이 일본 등록특허 제6860706호, 일본 등록특허 제3250994호 및 대한민국 등록특허 제10-1889087호 등 다방면으로 연구되고 있다. In order to solve the above problem, a method of forming a copper foil on a carrier metal layer that supplements the strength of the copper foil, attaching the copper foil to a substrate, and then peeling off the carrier metal layer is disclosed in Japanese Patent Registration No. 6860706, Japanese Patent Registration No. 3250994 and Korean Patent Registration No. 10-1889087 is being studied in various fields.
하지만 상술된 문헌들에 제시된 방법으로는 캐리어 금속층을 제조하는 장치와 동박을 제조하는 장치가 별도로 마련되어야 하고, 극동박층을 형성하는 과정에서 캐리어 금속층의 표면 상태에 따라 동박층의 품질에 큰 편차가 발생한다는 문제가 있다. However, in the method presented in the above-mentioned documents, an apparatus for manufacturing a carrier metal layer and an apparatus for manufacturing copper foil must be provided separately, and in the process of forming an ultra-copper foil layer, there is a large variation in the quality of the copper foil layer depending on the surface state of the carrier metal layer. There is a problem that occurs.
이러한 이유로, 극동박층과 캐리어 금속층을 동일한 장치를 이용하고, 상기 극동박층과 캐리어 금속층을 동시에 제조하여 생산성과 품질을 향상할 수 있는 반도체용 동박의 제조방법이 요구되고 있다. For this reason, there is a demand for a manufacturing method of a copper foil for semiconductors capable of improving productivity and quality by simultaneously manufacturing the ultra-copper foil layer and the carrier metal layer using the same device.
상기와 같은 문제점을 해결하기 위하여 본 발명은, 하나의 음극 회전판 위에 캐리어 금속층, 분리층, 극동박층 및 조화처리층을 순차적으로 석출하여 하나의 반도체용 동박을 제조하는 반도체용 동박 제조방법 및 이를 이용한 반도체용 동박을 제공할 수 있다. In order to solve the above problems, the present invention is a semiconductor copper foil manufacturing method for manufacturing one semiconductor copper foil by sequentially depositing a carrier metal layer, a separation layer, an electrode copper foil layer and a roughening treatment layer on one cathode rotating plate, and using the same A copper foil for semiconductors can be provided.
상기 목적을 달성하기 위한 본 발명의 일 실시예는 일 방향으로 회전하는 음극 회전판 및 상기 음극 회전판을 따라 소정 간격으로 이격되어 배치되는 제1 내지 제5 전해셀을 포함하는 동박 제조장치에 의해 제조되며, 상기 제1 전해셀에 의해 상기 음극 회전판 위에 캐리어 금속층을 석출하는 단계, 상기 제2 전해셀에 의해 상기 캐리어 금속층 위에 분리층을 석출하는 단계, 상기 제3 전해셀에 의해 상기 분리층 위에 극동박층을 석출하는 단계 및 상기 제4 전해셀 및 제5 전해셀에 의해 상기 극동박층 표면에 조화처리층을 형성하는 단계를 포함하며, 상기 음극 회전판이 회전함에 따라, 상기 제1 내지 제5 전해셀이 상기 음극 회전판과 순차적으로 전해주조(electroforming) 하여 하나의 반도체용 동박을 형성하는 것을 특징으로 하는 반도체용 동박의 제조방법에 관한 것이다. One embodiment of the present invention for achieving the above object is manufactured by a copper foil manufacturing apparatus including a cathode rotating plate rotating in one direction and first to fifth electrolysis cells spaced apart from each other at predetermined intervals along the cathode rotating plate, , depositing a carrier metal layer on the cathode rotating plate by the first electrolytic cell, depositing a separation layer on the carrier metal layer by the second electrolytic cell, and an ultra-copper foil layer on the separation layer by the third electrolytic cell. and forming a roughened layer on the surface of the copper foil layer by the fourth and fifth electrolytic cells, wherein as the cathode rotating plate rotates, the first to fifth electrolytic cells It relates to a method for manufacturing a copper foil for semiconductors, characterized in that forming one copper foil for semiconductors by sequentially electroforming with the cathode rotating plate.
상기 일 실시예에 있어, 상기 제1 내지 제5 전해셀은, 내부에 전해액 및 양극재를 포함하며, 각 전해셀에 서로 다른 크기의 전류와 전해액을 독립적으로 공급할 수 있다. In the above embodiment, the first to fifth electrolytic cells include an electrolyte solution and a cathode material therein, and currents and electrolyte solutions having different sizes may be independently supplied to each electrolysis cell.
상기 일 실시예에 있어, 상기 캐리어 금속층은 상기 제1 전해셀 내부에 제1 전해액을 분사한 후 제1 전류를 통전시킴으로써 형성하며, 상기 제1 전해셀 내부에 포함된 제1 양극재는 용해성을 가진 금속 조각(Metal plate) 또는 금속 볼(Metal ball)로 제공될 수 있다. In the above embodiment, the carrier metal layer is formed by spraying a first electrolyte into the first electrolytic cell and then passing a first current, and the first cathode material included in the first electrolytic cell has solubility. It can be provided as a metal plate or a metal ball.
상기 일 실시예에 있어, 상기 분리층은 상기 제2 전해셀 내부에 제2 전해액을 분사한 후 제2 전류를 통전시킴으로써 형성하며, 상기 제2 전해셀 내부에 포함된 제2 양극재는 이리듐 산화물(Ir2O3)을 코팅한 티타늄(Ti) 플레이트로 제공될 수 있다. In the above embodiment, the separation layer is formed by spraying a second electrolyte into the second electrolytic cell and then passing a second current, and the second anode material included in the second electrolytic cell is iridium oxide ( Ir 2 O 3 ) may be provided as a titanium (Ti) plate.
상기 일 실시예에 있어, 상기 극동박층은 상기 제3 전해셀 내부에 제3 전해액을 분사한 후 제3 전류를 통전시킴으로써 형성하며, 상기 제3 전해셀 내부에 포함된 제3 양극재는 이리듐 산화물(Ir2O3)을 코팅한 티타늄(Ti) 플레이트로 제공될 수 있다. In the above embodiment, the copper foil layer is formed by spraying a third electrolyte into the third electrolytic cell and then passing a third current, and the third anode material included in the third electrolytic cell is iridium oxide ( Ir 2 O 3 ) may be provided as a titanium (Ti) plate.
상기 일 실시예에 있어, 상기 조화처리층을 형성하는 단계는 구리 핵을 형성하고 고착하는 제1 조화처리 단계 및 상기 구리 핵을 성장하는 제2 조화처리 단계를 포함하며, 상기 제1 조화처리 단계는 이리듐 산화물(Ir2O3)을 코팅한 티타늄(Ti) 플레이트로 제공되는 제4 양극재에 의해 수행될 수 있다.In the above embodiment, the step of forming the roughened layer includes a first roughening step of forming and fixing copper nuclei and a second roughening step of growing the copper nuclei, wherein the first roughening step may be performed by a fourth anode material provided as a titanium (Ti) plate coated with iridium oxide (Ir 2 O 3 ).
상기 일 실시예에 있어, 상기 제2 조화처리 단계는 용해성을 가진 금속 조각(Metal plate) 또는 이리듐 산화물(Ir2O3)을 코팅한 티타늄(Ti) 플레이트 중 어느 하나의 소재로 제공되는 제5 양극재에 의해 수행되는 것을 특징으로 하는, 반도체용 동박의 제조방법.In the above embodiment, the second roughening step is a fifth material provided with any one of a soluble metal piece (Metal plate) or a titanium (Ti) plate coated with iridium oxide (Ir 2 O 3 ). Characterized in that it is carried out by a cathode material, a method of manufacturing a copper foil for semiconductors.
본 발명의 또 다른 일 실시 예에 의하면, 본 발명은 상기 캐리어 금속층 상면에 석출된 분리층, 상기 분리층 상면에 석출되는 극동박층, 상기 극동박층 표면에 형성된 조화처리층 및 상기 조화처리층 표면에 형성된 방청 도금층을 포함하는 반도체용 동박에 있어서, 상기 반도체용 동박은, 일 방향으로 회전하는 음극 회전판 및 상기 음극 회전판을 따라 소정 간격으로 이격되어 배치되는 제1 내지 제5 전해셀을 포함하는 동박 제조장치에 의해 제조되며, 상기 음극 회전판이 회전함에 따라, 상기 제1 내지 제5 전해셀이 상기 음극 회전판과 순차적으로 전해주조(electroforming) 하여 하나의 반도체용 동박을 형성하는 것을 특징으로 하는 반도체용 동박에 관한 것이다. According to another embodiment of the present invention, the separation layer precipitated on the upper surface of the carrier metal layer, the ultra-copper foil layer precipitated on the upper surface of the separation layer, the roughened layer formed on the surface of the ultra-copper thin layer, and the surface of the roughened layer A copper foil for semiconductors including a formed anti-corrosion plating layer, wherein the copper foil for semiconductors includes a cathode rotating plate rotating in one direction and first to fifth electrolytic cells spaced apart from each other along the cathode rotating plate at predetermined intervals. It is manufactured by the apparatus, and as the cathode rotating plate rotates, the first to fifth electrolytic cells are sequentially electroformed with the cathode rotating plate to form a single semiconductor copper foil. It is about.
상기 일 실시예에 있어, 상기 제1 내지 제5 전해셀은, 내부에 전해액 및 양극재를 포함하며, 각 전해셀에 서로 다른 크기의 전류를 독립적으로 공급하여, 상기 음극 회전판과 독립적으로 전해주조하는 동박 제조장치에 의해 제조될 수 있다. In the above embodiment, the first to fifth electrolytic cells contain an electrolyte solution and a cathode material therein, and independently supply currents of different magnitudes to each electrolysis cell to independently electroform the cathode rotating plate. It can be manufactured by a copper foil manufacturing apparatus.
상기 일 실시예에 있어, 상기 캐리어 금속층은 구리(Cu), 니켈(Ni), 크롬(Cr), 알루미늄(Al) 또는 이를 포함하는 합금으로 이루어지며, 두께가 5 내지 50㎛로 형성될 수 있다. In the above embodiment, the carrier metal layer is made of copper (Cu), nickel (Ni), chromium (Cr), aluminum (Al) or an alloy containing the same, and may have a thickness of 5 to 50 μm. .
상기 일 실시예에 있어, 상기 분리층은 인듐(In), 아연(Zr) 및 크롬(Cr)합금층으로 제공되며 두께가 0.01㎛ 이하로 형성될 수 있다.In the above embodiment, the separation layer is provided as an alloy layer of indium (In), zinc (Zr), and chromium (Cr), and may have a thickness of 0.01 μm or less.
상술한 특징에 따라, 본 발명은 하나의 음극 회전판 위에 캐리어 금속층, 분리층, 극동박층 및 조화처리층을 원 패스(One-pass)로 석출하여, 반도체용 동박을 제조할 때 소요되는 시간과 비용을 절감할 수 있다.According to the above-described features, the present invention deposits the carrier metal layer, the separation layer, the ultra-copper foil layer, and the roughening layer on one cathode rotating plate in one-pass, and the time and cost required when manufacturing copper foil for semiconductors. can save
아울러, 본 발명은 상기 극동박층을 상기 캐리어 금속층 및 분리층 위에 직접 석출하여 상기 동박의 접힙, 찢어짐 등을 방지할 수 있다.In addition, the present invention can prevent the copper foil from being folded or torn by directly depositing the copper foil layer on the carrier metal layer and the separation layer.
또한, 본 발명은 상기 조화처리층을 형성하는 단계를 2단계로 나누고, 이 때의 양극재와 전해액의 온도를 서로 다르게 제공하여 가장 최적화된 방법으로 조화처리층을 형성할 수 있다.In addition, the present invention divides the step of forming the roughened layer into two steps, and at this time, the temperature of the cathode material and the electrolyte solution is provided differently to form the roughened layer in the most optimized way.
도 1은 본 발명의 실시 예에 따른 반도체용 동박의 제조방법을 설명하기 위한 순서도이다. 1 is a flowchart illustrating a method of manufacturing a copper foil for semiconductors according to an embodiment of the present invention.
도 2는 본 발명의 실시 예에 따른 반도체용 동박을 설명하기 위한 도면이다.2 is a view for explaining a copper foil for semiconductors according to an embodiment of the present invention.
도 3은 본 발명의 실시 예에 따른 반도체용 동박 제조장치를 설명하기 위한 도면이다.3 is a view for explaining an apparatus for manufacturing copper foil for semiconductors according to an embodiment of the present invention.
이하 본 발명에 따른 반도체용 동박의 제조방법 및 이를 이용한 반도체용 동박에 대하여 상세히 설명한다. 다음에 소개되는 도면들은 당업자에게 본 발명의 사상이 충분히 전달될 수 있도록 예로서 제공되는 것이다. 따라서, 본 발명은 이하 제시되는 도면들에 한정되지 않고 다른 형태로 구체화될 수도 있으며, 이하 제시되는 도면들은 본 발명의 사상을 명확히 하기 위해 과장되어 도시될 수 있다. 이 때, 사용되는 기술 용어 및 과학 용어에 있어서 다른 정의가 없다면, 이 발명이 속하는 기술 분야에서 통상의 지식을 가진 자가 통상적으로 이해하고 있는 의미를 가지며, 하기의 설명 및 첨부 도면에서 본 발명의 요지를 불필요하게 흐릴 수 있는 공지 기능 및 구성에 대한 설명은 생략한다.Hereinafter, a method for manufacturing a copper foil for semiconductors according to the present invention and a copper foil for semiconductors using the same will be described in detail. The drawings introduced below are provided as examples so that the spirit of the present invention can be sufficiently conveyed to those skilled in the art. Therefore, the present invention may be embodied in other forms without being limited to the drawings presented below, and the drawings presented below may be exaggerated to clarify the spirit of the present invention. At this time, unless there is another definition in the technical terms and scientific terms used, they have meanings commonly understood by those of ordinary skill in the art to which this invention belongs, and the gist of the present invention in the following description and accompanying drawings Descriptions of known functions and configurations that may unnecessarily obscure are omitted.
본 발명의 일 특징은 반도체용 동박의 제조방법에 관한 것이다. 더욱 바람직하게는 일 방향으로 회전하는 음극 회전판 및 상기 음극 회전판을 따라 소정 간격으로 이격되어 배치되는 복수의 전해셀을 포함하는 동박 제조장치에 의해 제조될 수 있다. 또한, 상기 음극 회전판이 회전함에 따라, 상기 복수의 전해셀이 상기 음극 회전판과 순차적으로 전해주조(electroforming)하여 원 패스(One-pass)로 생산될 수 있다. One feature of the present invention relates to a method for manufacturing a copper foil for semiconductors. More preferably, it can be manufactured by a copper foil manufacturing apparatus including a cathode rotating plate rotating in one direction and a plurality of electrolytic cells spaced apart from each other at predetermined intervals along the cathode rotating plate. In addition, as the cathode rotating plate rotates, the plurality of electrolytic cells may be electroformed sequentially with the cathode rotating plate to be produced in one-pass.
즉, 본 발명의 실시 예에 따른 반도체용 동박은 하나의 장치를 사용하여 한 번의 작동주기(One cycle)를 통해 각 층의 석출 공정이 실시간으로 수행하여 하나의 완제품으로 제조될 수 있다.That is, the copper foil for semiconductor according to an embodiment of the present invention can be manufactured as one finished product by performing the deposition process of each layer in real time through one operation cycle (One cycle) using one device.
통상적으로, 반도체용 동박은 전해동박 등으로 제공되는 캐리어 금속층을 포함할 수 있다. 이는 반도체용 동박을 제조하기 위해서는 상기 캐리어 금속층을 별도로 구입하거나, 캐리어 금속층을 제조하기 위한 장치를 별도로 구비하여야 된다는 것을 의미한다.Typically, a copper foil for a semiconductor may include a carrier metal layer provided as an electrodeposited copper foil or the like. This means that in order to manufacture the copper foil for semiconductors, the carrier metal layer must be purchased separately or a device for manufacturing the carrier metal layer must be separately provided.
또한, 상기 극동박층의 두께가 5㎛ 이하로 얇아지는 경우 상기 캐리어 금속층의 표면 상태에 따라 상기 캐리어 금속층 위에 적층되는 극동박층의 품질에 큰 영향을 준다는 문제가 있다. 예를 들어, 상기 캐리어 금속층의 표면이 고르지 않거나 미세한 이물질이 삽입되면 상기 극동박층이 파손 및 균열이 발생하여 품질이 급격히 저하되는 문제가 발생한다. 이를 방지하기 위해 캐리어 금속층의 표면 상태를 지속적으로 관리하고, 캐리어 금속층의 표면 상태가 일정 수준 미만이면 전량 폐기해야 한다. In addition, when the thickness of the ultra-copper foil layer is reduced to 5 μm or less, there is a problem in that the quality of the ultra-copper foil layer laminated on the carrier metal layer is greatly affected by the surface state of the carrier metal layer. For example, when the surface of the carrier metal layer is uneven or fine foreign substances are inserted, the ultra-copper foil layer is damaged or cracked, resulting in a rapid deterioration in quality. In order to prevent this, the surface state of the carrier metal layer should be continuously managed, and if the surface state of the carrier metal layer is below a certain level, the entire amount should be discarded.
즉, 상기 캐리어 금속층을 생산 또는 구입하고 관리하기 위해 지속적으로 비용과 시간이 소요되며, 이로 인해 제품 생산성이 감소될 수 있다는 것을 의미한다. That is, cost and time are continuously required to produce, purchase, and manage the carrier metal layer, which means that product productivity may be reduced.
이를 개선하기 위해, 본 발명은 하나의 동박 제조장치를 통해 캐리어 금속층을 제조하고, 상기 캐리어 금속층 위에 분리층, 극동박층 및 조화처리층을 실시간으로 석출할 수 있다. 이를 통해, 상기 캐리어 금속층을 제조하기 위한 장비를 별도로 구매해야 하는 비용을 줄이고, 캐리어 금속층의 관리 비용을 절감할 수 있다. In order to improve this, the present invention can manufacture a carrier metal layer through one copper foil manufacturing apparatus, and deposit a separation layer, an ultra-copper foil layer, and a roughened layer on the carrier metal layer in real time. Through this, it is possible to reduce the cost of separately purchasing equipment for manufacturing the carrier metal layer and to reduce the management cost of the carrier metal layer.
즉 본 발명은 하나의 장치를 사용하여 한 번의 작동주기(One cycle)를 통해 각 층의 석출 공정이 실시간으로 수행할 수 있으며, 하나의 장치로 완제품을 제조할 수 있다. 이를 통해 본 발명은 상기 반도체용 동박의 생산성을 향상하고 비용을 절감할 수 있다. That is, the present invention can perform the precipitation process of each layer in real time through one cycle using one device, and can manufacture a finished product with one device. Through this, the present invention can improve productivity and reduce cost of the copper foil for semiconductors.
또한, 본 발명은 상술한 하나의 동박 제조장치를 통해 극동박층 표면에 미세 입자를 생성하는 조화처리를 수행할 수 있다. 이를 통해, 상기 극동박층 표면에 조화처리층(Roughened layer)을 형성할 수 있다. 이 때 미세 입자는 구리(Cu)입자로 제공될 수 있으나 이에 한정되지 않는다. In addition, the present invention can perform a roughening treatment to generate fine particles on the surface of the ultra-copper foil layer through the above-described single copper foil manufacturing apparatus. Through this, it is possible to form a roughened layer on the surface of the copper foil layer. At this time, the fine particles may be provided as copper (Cu) particles, but are not limited thereto.
즉 본 발명의 실시 예에 따른 반도체용 동박은 일 방향으로 회전하는 음극 회전판 및 상기 음극 회전판을 따라 소정 간격으로 이격되어 배치되는 복수의 전해셀을 포함하는 동박 제조장치에 의해 제조될 수 있으며, 하나의 장치를 통해 캐리어 금속층, 분리층, 극동박층 및 조화처리층이 순차적으로 석출되어 하나의 반도체용 동박이 제조될 수 있다. That is, the copper foil for semiconductors according to an embodiment of the present invention can be manufactured by a copper foil manufacturing apparatus including a cathode rotating plate rotating in one direction and a plurality of electrolytic cells spaced apart from each other at predetermined intervals along the cathode rotating plate. A carrier metal layer, a separation layer, an ultra-copper foil layer, and a roughening treatment layer are sequentially deposited through the device of, so that one copper foil for a semiconductor can be manufactured.
또한 본 발명의 실시 예에 따른 동박 제조장치는 하나의 장치에 전해셀을 복수개 포함할 수 있다. 이 때, 사용자는 각 전해셀에 서로 다른 크기의 전류와 전해액을 독립적으로 공급하여 금속층의 성질을 다양화 할 수 있다. In addition, the copper foil manufacturing apparatus according to an embodiment of the present invention may include a plurality of electrolysis cells in one apparatus. At this time, the user can diversify the properties of the metal layer by independently supplying current and electrolyte of different sizes to each electrolysis cell.
예를 들어, 상기 전해셀이 제1 내지 제5 전해셀로 제공되는 경우, 상기 캐리어 금속층은 상기 제1 전해셀 내부에 제1 전해액을 분사한 후 제1 전류를 통전시킴으로써 형성될 수 있으며 상기 분리층은 상기 제2 전해셀 내부에 제2 전해액을 분사한 후 제2 전류를 통전시킴으로써 형성될 수 있다. 또한, 상기 극동박층은 상기 제3 전해셀 내부에 제3 전해액을 분사한 후 제3 전류를 통전시킴으로써 형성하며, 상기 조화처리층은 상기 제4 전해셀 내부에 제4 전해액을 분사한 후 제4 전류를 통전시키는 과정과 상기 제5 전해셀 내부에 제5 전해액을 분사한 후 제5 전류를 통전시키는 과정을 통해 형성할 수 있다. For example, when the electrolytic cells are provided as first to fifth electrolytic cells, the carrier metal layer may be formed by passing a first current after spraying a first electrolyte into the first electrolytic cell, and the separation The layer may be formed by passing a second current after spraying a second electrolyte into the second electrolytic cell. In addition, the copper foil layer is formed by spraying a third electrolyte into the third electrolysis cell and then passing a third current, and the roughening layer is formed by spraying a fourth electrolyte into the fourth electrolysis cell and then passing a third current through the fourth electrolytic cell. It may be formed through a process of passing current and a process of passing a fifth current after spraying a fifth electrolyte into the fifth electrolytic cell.
즉, 본 발명의 실시 예에 따른 반도체용 동박은 복수의 전해셀을 포함하는 하나의 장치를 통해 제조되며, 상기 복수의 전해셀에 각각 전류와 전해액을 독립적으로 공급하여 각 금속층의 재질, 두께, 특성을 독립적으로 제어할 수 있다. That is, the copper foil for semiconductors according to an embodiment of the present invention is manufactured through a single device including a plurality of electrolysis cells, and by independently supplying current and electrolyte to the plurality of electrolysis cells, the material, thickness, characteristics can be independently controlled.
본 발명의 또 다른 실시 예에 따르면, 상기 반도체용 동박에 방청 처리를 수행할 수 있다. According to another embodiment of the present invention, anti-rust treatment may be performed on the copper foil for semiconductors.
이상 본 발명의 실시 예에 따른 반도체용 동박의 구성에 대해 설명하였다. 이하 도 1 내지 3을 통해 본 발명의 실시 예에 따른 반도체용 동박의 제조방법에 대해 설명한다. The configuration of the copper foil for semiconductors according to an embodiment of the present invention has been described above. Hereinafter, a method of manufacturing a copper foil for semiconductors according to an embodiment of the present invention will be described with reference to FIGS. 1 to 3.
도 1은 본 발명의 실시 예에 따른 반도체용 동박의 제조방법을 설명하기 위한 순서도이고, 도 2는 본 발명의 실시 예에 따른 반도체용 동박을 설명하기 위한 도면이고, 도 3은 본 발명의 실시 예에 따른 반도체용 동박 제조장치를 설명하기 위한 도면이다.1 is a flowchart for explaining a manufacturing method of a copper foil for semiconductors according to an embodiment of the present invention, FIG. 2 is a diagram for explaining a copper foil for semiconductors according to an embodiment of the present invention, and FIG. 3 is an embodiment of the present invention. It is a figure for explaining the copper foil manufacturing apparatus for semiconductors according to an example.
도 1을 참조하면, 본 발명의 실시 예에 따른 반도체용 동박(100)은 제1 전해셀에 의해 상기 음극 회전판 위에 캐리어 금속층을 석출하는 단계(S10), 제2 전해셀에 의해 상기 캐리어 금속층 위에 분리층을 석출하는 단계(S20), 제3 전해셀에 의해 상기 분리층 위에 극동박층을 석출하는 단계(S30), 제4 전해셀 및 제5 전해셀에 의해 상기 극동박층 표면에 조화처리층을 형성하는 단계(S40), 제조된 반도체용 동박을 박리하는 단계(S50) 및 반도체용 동박을 방청 처리하는 단계(S60)를 포함할 수 있다. 1, in the copper foil 100 for semiconductor according to an embodiment of the present invention, a carrier metal layer is deposited on the cathode rotating plate by a first electrolytic cell (S10), and a carrier metal layer is deposited on the carrier metal layer by a second electrolytic cell. Depositing a separation layer (S20), depositing an ultra-copper foil layer on the separation layer by a third electrolytic cell (S30), and a roughening treatment layer on the surface of the ultra-copper foil layer by the fourth and fifth electrolysis cells. It may include a forming step (S40), a step of peeling the manufactured copper foil for semiconductors (S50), and a step of anticorrosive treatment of the copper foil for semiconductors (S60).
본 발명의 실시 예에 따른 반도체용 동박(100)은 앞서 설명하였듯이, 하나의 장치로 제조될 수 있으며, 더욱 바람직하게는 하나의 음극 회전판(200)과 복수의 전해셀(300)이 포함된 동박 제조장치(1000)에 의해 제조될 수 있다. As described above, the copper foil 100 for semiconductors according to an embodiment of the present invention can be manufactured as a single device, and more preferably, a copper foil including one cathode rotating plate 200 and a plurality of electrolysis cells 300. It can be manufactured by the manufacturing apparatus 1000.
구체적으로 도 2를 참조하면, 상기 동박 제조장치(1000)는 일 방향으로 회전하는 음극 회전판(200) 및 상기 음극 회전판(200)을 따라 소정 간격으로 이격되어 배치되는 복수의 전해셀(300)을 포함할 수 있다. Specifically, referring to FIG. 2 , the copper foil manufacturing apparatus 1000 includes a cathode rotating plate 200 rotating in one direction and a plurality of electrolytic cells 300 spaced apart from each other along the cathode rotating plate 200 at predetermined intervals. can include
상기 음극 회전판(200)은 복수의 티타늄 판(Ti plate)이 고리 형상, 더 바람직하게는 끊김없는 판 링(Endless plate ring)형태로 용접되어 제공될 수 있다. The cathode rotating plate 200 may be provided by welding a plurality of titanium plates (Ti plates) in a ring shape, more preferably in an endless plate ring shape.
실시 예에 따르면, 상기 음극 회전판(200)을 구성하는 티타늄 판(Ti plate)은 0.1 내지 2m의 폭과 5 내지 50m 길이 및 1 내지 30㎜의 두께로 제공될 수 있으나, 이에 한정되지 않으며 제조환경에 따라 얼마든지 변경 가능하다. According to an embodiment, the titanium plate constituting the cathode rotating plate 200 may be provided in a width of 0.1 to 2 m, a length of 5 to 50 m, and a thickness of 1 to 30 mm, but is not limited thereto, and the manufacturing environment can be changed at any time according to
또한, 음극 회전판(200)의 내측면에는 복수의 전도롤이 형성될 수 있으며, 상기 복수의 전도롤을 이용하여 일 방향으로 회전될 수 있다. 또한, 상기 음극 회전판(200)은 상기 전도롤을 통해 음극으로 통전될 수 있다.In addition, a plurality of conduction rolls may be formed on the inner surface of the cathode rotating plate 200, and may be rotated in one direction using the plurality of conduction rolls. In addition, the cathode rotating plate 200 may be energized as a cathode through the conduction roll.
즉, 상기 전도롤은 상기 음극 회전판(200)을 대전시키는 역할을 수행할 수 있으며, 상기 음극 회전판(200)을 일 방향으로 회전시키는 구동롤의 역할 또한 수행할 수 있다. That is, the conduction roll may serve to charge the cathode rotary plate 200 and may also serve as a driving roll to rotate the cathode rotary plate 200 in one direction.
실시 예에 따르면, 상기 음극 회전판(200)은 용접 조립 후 추가적인 열처리를 수행할 수 있다. 이를 통해, 상기 음극 회전판(200)이 서로 강하게 결합할 수 있으며, 결합하는 과정에서 형성된 응력을 제거 하여 박막이 제조 과정에서 변형되거나 박리가 발생하는 것을 방지할 수 있다. According to an embodiment, the cathode rotating plate 200 may perform additional heat treatment after welding and assembling. Through this, the cathode rotating plates 200 can be strongly coupled to each other, and stress formed during the coupling process can be removed to prevent deformation or peeling of the thin film during the manufacturing process.
이 때, 상기 열처리는 500 내지 700℃에서 10 내지 100분 동안 수행되는 것이 바람직한데, 상기 열처리가 500℃ 미만 또는 10분 미만으로 수행되면, 상기 음극 회전판(200)과 사이 응력이 남아있어서 상기 금속박막이 제조되는 과정에서 변형, 박리가 발생될 수 있다. At this time, the heat treatment is preferably performed at 500 to 700 ° C for 10 to 100 minutes. If the heat treatment is performed at less than 500 ° C or less than 10 minutes, stress remains between the cathode rotating plate 200 and the metal In the process of manufacturing the thin film, deformation and peeling may occur.
반대로 상기 열처리가 700℃ 또는 100분을 초과하여 수행되면, 생산성이 감소할 수 있으며, 열변형이 발생될 수 있다. Conversely, if the heat treatment is performed at 700° C. or longer than 100 minutes, productivity may decrease and thermal deformation may occur.
이러한 이유로 상기 열처리는 500 내지 700℃에서 10 내지 100분 동안 수행될 수 있으며, 더 바람직하게는 600 내지 650℃에서 30 내지 50분 동안 수행될 수 있다. For this reason, the heat treatment may be performed at 500 to 700°C for 10 to 100 minutes, more preferably at 600 to 650°C for 30 to 50 minutes.
상기 복수의 전해셀(300)은 제1 내지 제 5 전해셀(300a, 300b, 300c, 300d1, 300d2)로 이루어질 수 있으며, 그 이상의 전해셀을 추가로 더 포함할 수 있다. 또한, 상기 제1 내지 제5 전해셀(300a, 300b, 300c, 300d1, 300d2)은 하나의 음극 회전판(200)을 따라 소정 간격으로 이격되어 배치될 수 있으며, 상기 음극 회전판(200)이 회전함에 따라, 상기 제1 내지 제5 전해셀(300a, 300b, 300c, 300d1, 300d2)이 상기 음극 회전판(200)과 동시에 전해주조(electroforming)되어 하나의 반도체용 동박(100)을 형성할 수 있다. The plurality of electrolytic cells 300 may include first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2, and may further include more electrolytic cells. In addition, the first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2 may be spaced apart from each other at predetermined intervals along one cathode rotation plate 200, and as the cathode rotation plate 200 rotates, Accordingly, the first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2 may be electroformed simultaneously with the cathode rotating plate 200 to form one copper foil 100 for semiconductors.
실시 예에 따르면 상기 전해셀(300)은 내부에 소정의 공간이 형성될 수 있으며, 상기 공간에 양극재(310) 및 전해액 공급노즐(330)이 포함될 수 있다. 아울러, 상기 전해액 공급노즐(330)을 통해 상기 전해셀(300) 내부 공간에 전해액을 분사할 수 있다. According to the embodiment, a predetermined space may be formed inside the electrolysis cell 300, and the cathode material 310 and the electrolyte supply nozzle 330 may be included in the space. In addition, the electrolyte may be injected into the inner space of the electrolysis cell 300 through the electrolyte supply nozzle 330 .
예를 들어, 상기 제1 전해셀(300a)은 내부에 제1 양극재(310a) 및 제1 전해액 공급노즐(330a)을 포함할 수 있으며, 상기 제1 전해액 공급노즐()은 상기 제1 전해셀(310a 내부에 제1 전해액을 분사하여 상기 음극 회전판(200)과 제1 양극재(410a) 사이에 제1 전해액을 충진할 수 있다. For example, the first electrolysis cell 300a may include a first positive electrode material 310a and a first electrolyte supply nozzle 330a therein, and the first electrolyte supply nozzle 330a may include the first electrolytic solution supply nozzle 330a. The first electrolyte may be filled between the cathode rotating plate 200 and the first positive electrode material 410a by spraying the first electrolyte into the cell 310a.
본 명세서에서는 제1 전해셀(300a)의 구성에 대해서만 설명하였으나, 이에 한정된 것이 아니고 제2 전해셀(300b), 제3 전해셀(300c), 제4 전해셀(300d-1) 및 제5 전해셀(300d-2)에도 동등하게 적용할 수 있으며, 그 이상의 전해셀에도 동일하게 적용될 수 있다.In this specification, only the configuration of the first electrolysis cell 300a has been described, but it is not limited thereto, and the second electrolysis cell 300b, the third electrolysis cell 300c, the fourth electrolysis cell 300d-1 and the fifth electrolysis cell 300d-1 are described. The same can be applied to the cell 300d-2, and can be equally applied to more electrolysis cells.
도 1 내지 도 3을 참조하면, 상기 S10 단계는 상기 제1 전해셀(300a) 내부에 제1 전해액을 분사한 후 상기 음극 회전판(200)과 상기 제1 양극재(310a) 사이에 제1 전류를 통전시켜 캐리어 금속층(110)을 석출하는 단계이다. Referring to FIGS. 1 to 3 , in step S10, a first current is passed between the cathode rotating plate 200 and the first anode material 310a after spraying the first electrolyte into the first electrolysis cell 300a. This is a step of depositing the carrier metal layer 110 by conducting a current.
상기 캐리어 금속층(110)은 후술할 극동박층(150)의 상처 주름 꺾임등을 방지하고 상기 극동박층(150)의 광택면이 이물질에 노출되지 않도록 보호하기 위한 금속층을 의미한다. The carrier metal layer 110 means a metal layer for preventing scratches, wrinkles, and bending of the ultra-copper foil layer 150 to be described later and protecting the glossy surface of the ultra-copper foil layer 150 from being exposed to foreign substances.
실시 예에 따르면, 상기 캐리어 금속층(110)은 구리(Cu), 니켈(Ni), 크롬(Cr), 알루미늄(Al) 또는 이를 포함하는 합금으로 이루어지며, 전해도금 또는 스퍼터링(sputtering)을 통해 형성될 수 있다. 이하, 본 명세서에 캐리어 금속층은 구리(Cu)를 포함하는 전해동박인 것을 예를 들어 설명하나 이에 한정되지 않는다. According to an embodiment, the carrier metal layer 110 is made of copper (Cu), nickel (Ni), chromium (Cr), aluminum (Al) or an alloy containing the same, and is formed through electroplating or sputtering. It can be. Hereinafter, in this specification, the carrier metal layer is described as an example of an electrodeposited copper foil containing copper (Cu), but is not limited thereto.
실시 예에 따르면, 상기 캐리어 금속층(110)은 두께가 5 내지 50㎛로 형성될 수 있다. 상기 캐리어 금속층(110)의 두께가 5㎛ 미만이면, 강성이 부족하여 상기 극동박층(150)이 상처 주름 꺾임등이 발생할 수 있다. 반면에 상기 캐리어 금속층(110)의 두께가 50㎛를 초과하면 상기 캐리어 금속층(110)이 박리되는 과정에서 잔류물이 남아 상기 극동박층(150)이 적층된 절연층의 전기적 특성을 감소시킬 수 있다. 이러한 이유로 상기 캐리어 금속층(110)은 두께가 5 내지 50㎛로 형성될 수 있으며, 더욱 바람직하게는 9 내지 30㎛로 형성될 수 있다. According to an embodiment, the carrier metal layer 110 may be formed to have a thickness of 5 to 50 μm. When the thickness of the carrier metal layer 110 is less than 5 μm, the copper foil layer 150 may be scratched, wrinkled, or bent due to lack of rigidity. On the other hand, when the thickness of the carrier metal layer 110 exceeds 50 μm, residues remain during the peeling process of the carrier metal layer 110, which can reduce electrical characteristics of the insulation layer on which the copper foil layer 150 is stacked. . For this reason, the carrier metal layer 110 may have a thickness of 5 to 50 μm, more preferably 9 to 30 μm.
실시 예에 따르면, 상기 제1 전해액은 황산(H2SO4) 용액에 구리(Cu), 니켈(Ni) 및 알루미늄(Al) 중 어느 하나 이상의 금속 이온을 용해한 전해액으로 제공될 수 있으며, 더 바람직하게는 황산(H2SO4) 용액에 구리(Cu) 이온을 용해한 전해액으로 제공될 수 있다. According to an embodiment, the first electrolyte solution may be provided as an electrolyte solution in which one or more metal ions of copper (Cu), nickel (Ni), and aluminum (Al) are dissolved in a sulfuric acid (H 2 SO 4 ) solution, and more preferably More specifically, it may be provided as an electrolyte solution in which copper (Cu) ions are dissolved in a sulfuric acid (H 2 SO 4 ) solution.
실시 예에 따르면, 상기 제1 양극재(310a)는 용해성을 가진 용해성을 가진 금속 조각(Metal plate) 또는 금속 볼(Metal ball)으로 제공될 수 있다. 즉, 상기 제1 양극재(310a는 용해성을 가진 구리 조각(Cu plate) 또는 구리 볼(Cu ball)으로 제공될 수 있다.According to an embodiment, the first positive electrode material 310a may be provided as a metal plate or metal ball having solubility. That is, the first cathode material 310a may be provided as a soluble copper plate or a copper ball.
만약 제1 양극재(310a)를 통상적인 불용성 양극재를 사용하는 경우, 전해과정 중 상기 제1 양극재(310a) 표면에서 과량의 산소(O2)가 발생하게 된다. If a conventional insoluble cathode material is used as the first cathode material 310a, an excess of oxygen (O 2 ) is generated on the surface of the first cathode material 310a during the electrolysis process.
상기 제1 양극재(310a) 표면에서 발생한 과량의 산소(O2)는 전착되는 상기 음극 회전판(200) 표면에 부착되어 상기 캐리어 금속층(110)의 표면결함을 유발할 수 있으며, 상기 캐리어 금속층(110)의 일부를 산화시켜 전기적 특성을 약화할 수 있다. Excessive oxygen (O 2 ) generated on the surface of the first positive electrode material 310a may be attached to the surface of the negative electrode rotating plate 200 to be electrodeposited and cause surface defects of the carrier metal layer 110, and the carrier metal layer 110 ) may be oxidized to weaken the electrical properties.
이를 방지하기 위해 본 발명은 상기 제1 양극재(310a)를 용해성을 가진 구리 조각(Cu plate) 또는 구리 볼(Cu ball) 형태로 제공하여 상기 과량의 산소(O2)가 상기 음극 회전판(200) 표면에 부착되지 않고 구리 조각(Cu plate) 또는 구리 볼(Cu ball) 사이에 형성된 공간으로 배출시킬 수 있다. 이를 통해 상기 캐리어 금속층(110)의 품질을 향상할 수 있다. To prevent this, the present invention provides the first positive electrode material 310a in the form of a soluble copper piece (Cu plate) or a copper ball (Cu ball) so that the excess oxygen (O 2 ) is removed from the cathode rotating plate (200). ) It can be discharged into the space formed between copper plates or copper balls without being attached to the surface. Through this, the quality of the carrier metal layer 110 can be improved.
또한, 상기 불용성 양극재는 용해성 양극재에 비해 소요되는 전압이 높아서 전해주조 시 요구 전력이 증가하는 문제가 있으며, 지속적으로 박막을 석출하기 위해서는 전해주조에 의해 소요되는 구리(Cu)이온을 공급하는 추가적인 설비가 요구된다는 단점이 있다. In addition, the insoluble cathode material has a problem in that the required power increases during electroforming because the voltage required is higher than that of the soluble cathode material. The downside is that it requires equipment.
또한, 상기 제1 양극재(310a)가 상기 제1 전해액에 용해됨에 따라, 사용자는 상기 제1 양극재(310a)의 잔류량 및 교체 주기를 눈으로 확인할 수 있다. 이를 통해, 상기 제1 양극재(310a)의 교체주기를 확인하고, 공정조건을 최적화 하기 용이하는 장점이 있다.In addition, as the first cathode material 310a is dissolved in the first electrolyte solution, the user can visually check the remaining amount and replacement period of the first cathode material 310a. Through this, there is an advantage in that it is easy to check the replacement cycle of the first cathode material 310a and optimize process conditions.
상기 S20 단계는 상기 제2 전해셀(310b) 내부에 제2 전해액을 분사한 후 상기 음극 회전판(200)과 상기 제2 양극재(310b) 사이에 제2 전류를 통전시켜 분리층(130)을 석출하는 단계이다. In the step S20, the separation layer 130 is formed by spraying the second electrolyte into the second electrolysis cell 310b and then passing a second current between the cathode rotating plate 200 and the second anode material 310b. This is the step of precipitation.
상기 분리층(peeling layer, 130)은 상기 캐리어 금속층(110)과 후술할 극동박층(150)사이에 제공되는 금속층으로, 상기 반도체용 동박(100)이 절연층에 접착되면, 상기 캐리어 금속층(110)을 분리시켜 상기 극동박층(150)을 상기 절연층에 접착할 수 있다.The peeling layer 130 is a metal layer provided between the carrier metal layer 110 and the copper foil layer 150 to be described later. When the semiconductor copper foil 100 is bonded to the insulating layer, the carrier metal layer 110 ) can be separated to adhere the copper foil layer 150 to the insulating layer.
실시 예에 다르면, 상기 분리층(130)은 나노 스케일의 금속층으로 제공될 수 있으며, 더욱 바람직하게는 20㎚ 미만의 두께를 가질 수 있다. 상기 분리층의 두께가 20㎚를 초과하면 상기 분리층(130)을 박리시키는데 요구되는 힘(peel strength; 박리력)이 증가되기 때문에 상기 캐리어 금속층(110)과 상기 극동박층(150)을 분리시키는데 어려움이 있다. 예를 들어 상기 분리층(130)의 두께가 20㎚를 초과하면, 상기 분리층(130)의 박리력이 50N/m 이상으로 증가할 수 있다. 이는 상기 캐리어 금속층(110)이 쉽게 분리되지 못하고, 추가적인 공정이 요구된다. According to an embodiment, the separation layer 130 may be provided as a nano-scale metal layer, and more preferably may have a thickness of less than 20 nm. When the thickness of the separation layer exceeds 20 nm, the peel strength required to peel the separation layer 130 increases, so that the carrier metal layer 110 and the copper foil layer 150 are separated. There are difficulties. For example, when the thickness of the separation layer 130 exceeds 20 nm, the peel force of the separation layer 130 may increase to 50 N/m or more. This is because the carrier metal layer 110 is not easily separated, and an additional process is required.
반면에 상기 분리층(130)이 1㎚ 미만이면, 상기 분리층(130)이 지나치게 얇아 상기 반도체용 동박(100)이 절연층에 접착되기 전에 상기 캐리어 금속층(110)과 분리될 수 있다. 즉, 상기 반도체용 동박(100)이 사용자가 원하는 위치에 적절하게 부착하기 어렵다. On the other hand, if the thickness of the separation layer 130 is less than 1 nm, the separation layer 130 is too thin and may be separated from the carrier metal layer 110 before the semiconductor copper foil 100 is adhered to the insulating layer. That is, it is difficult to properly attach the copper foil 100 for a semiconductor to a position desired by a user.
이러한 이유로 상기 분리층(130)의 두께는 20㎚ 미만으로 제공되는 것이 바람직하며, 더욱 바람직하게는 1 내지 10㎚로 제공될 수 있다. For this reason, the thickness of the separation layer 130 is preferably less than 20 nm, more preferably 1 to 10 nm.
실시 예에 따르면, 상기 분리층(130)은 금속으로 제공되어 두께를 미세하게 조정할 수 있다. 더욱 바람직하게는 상기 분리층(130)은 인듐(In), 크롬(Cr), 아연(Zr), 니켈(Ni), 몰리브덴(W), 코발트(Co), 은(Ag), 구리(Cu), 알루미늄(Al), 망간(Mn), 철(Fe), 주석(Sn) 및 바나듐(V)으로 이루어진 군에서 선택되는 하나 이상의 금속 또는 합금의 형태로 제공될 수 있다. 이하, 본 명세서에서는 상기 분리층(130)을 인듐(In), 크롬(Cr) 및 아연(Zn)으로 이루어진 금속층 또는 인듐(In), 크롬(Cr) 및 아연(Zn) 중 어느 하나 이상이 포함된 합금층으로 제공되는 것을 예를 들어 설명하나 이에 한정되지 않는다.According to an embodiment, the separation layer 130 is provided with metal to finely adjust the thickness. More preferably, the separation layer 130 is indium (In), chromium (Cr), zinc (Zr), nickel (Ni), molybdenum (W), cobalt (Co), silver (Ag), copper (Cu) , It may be provided in the form of one or more metals or alloys selected from the group consisting of aluminum (Al), manganese (Mn), iron (Fe), tin (Sn), and vanadium (V). Hereinafter, in the present specification, the separation layer 130 includes a metal layer made of indium (In), chromium (Cr), and zinc (Zn), or at least one of indium (In), chromium (Cr), and zinc (Zn). Provided as an alloy layer is described as an example, but is not limited thereto.
실시 예에 따르면, 상기 제2 전해액은 인듐(In), 크롬(Cr) 및 아연(Zr) 이온을 포함하는 전해용액으로 제공될 수 있으나 이에 한정되지 않으며, 통상의 기술자의 판단에 따라 인듐(In), 크롬(Cr), 아연(Zr), 니켈(Ni), 몰리브덴(W), 코발트(Co), 은(Ag), 구리(Cu), 알루미늄(Al), 망간(Mn), 철(Fe), 주석(Sn) 및 바나듐(V)으로 이루어진 군에서 선택되는 하나 이상의 금속을 포함하는 전해용액으로 사용 가능함은 물론이다. According to an embodiment, the second electrolyte solution may be provided as an electrolyte solution containing indium (In), chromium (Cr), and zinc (Zr) ions, but is not limited thereto, and according to the judgment of a person skilled in the art, indium (In ), chromium (Cr), zinc (Zr), nickel (Ni), molybdenum (W), cobalt (Co), silver (Ag), copper (Cu), aluminum (Al), manganese (Mn), iron (Fe ), can be used as an electrolyte solution containing at least one metal selected from the group consisting of tin (Sn) and vanadium (V).
실시 예에 따르면 상기 제2 양극재(310b)는 상기 제1 양극재(310a)와는 다르게 비용해성 양극재로 제공될 수 있으며, 더욱 바람직하게는 비용해성 이리듐 산화물(Insoluble Ir2O3)을 코팅한 티타늄(Ti) 플레이트로 제공될 수 있다. According to the embodiment, the second cathode material 310b may be provided as an insoluble cathode material unlike the first cathode material 310a, and more preferably coated with insoluble iridium oxide (Insoluble Ir 2 O 3 ). It may be provided as a titanium (Ti) plate.
상기 S30 단계는 상기 제3 전해셀(300c) 내부에 제3 전해액을 분사한 후 상기 음극 회전판(200)과 상기 제3 양극재(310c) 사이에 제3 전류를 통전시켜 극동박층(150)을 석출하는 단계이다. In the step S30, after spraying the third electrolyte into the third electrolysis cell 300c, a third current is passed between the cathode rotating plate 200 and the third anode material 310c to form the copper foil layer 150. This is the step of precipitation.
상기 극동박층(Ultra thin copper foil, 150)은 상기 절연층에 극동박이 접착되기 위해 상기 캐리어 금속층(110) 및 상기 분리층(130)에 석출된 초 극박 구리(Cu)박막을 의미한다. The ultra thin copper foil 150 means an ultra thin copper (Cu) thin film precipitated on the carrier metal layer 110 and the separation layer 130 so that the ultra thin copper foil is adhered to the insulating layer.
실시 예에 따르면 상기 극동박층(150)은 10㎛이하, 더욱 바람직하게는 1 내지 5㎛의 두께로 석출될 수 있다. 상기 극동박층(150)의 두께가 1㎛ 미만이면, 상기 극동박층(150)이 너무 얇아 상기 절연층에 접착되었을 때 전기적 특성을 충분히 구현하기 어렵다. 또한, 상기 극동박층(150)의 두께가 1㎛ 미만이면, 상기 분리층(130) 위에 동일한 두께로 고르게 석출하기 매우 어렵게 된다. 반대로 상기 극동박층(150)의 두께가 10㎛를 초과하면, 상기 인쇄회로기판의 두께가 증가하여 반도체 집착도가 감소될 수 있으며, 캐리어층이 필요하지 않다. 이러한 이유로 상기 극동박층(150)의 두께는 10㎛이하인 것이 바람직하며, 더욱 바람직하게는 1 내지 5㎛의 두께로 석출될 수 있다. According to an embodiment, the copper foil layer 150 may be deposited to a thickness of 10 μm or less, more preferably 1 to 5 μm. When the thickness of the ultra-copper foil layer 150 is less than 1 μm, the ultra-thin copper foil layer 150 is too thin and it is difficult to sufficiently realize electrical characteristics when adhered to the insulating layer. In addition, when the thickness of the ultra-copper foil layer 150 is less than 1 μm, it is very difficult to evenly deposit the same thickness on the separation layer 130. Conversely, if the thickness of the copper foil layer 150 exceeds 10 μm, the thickness of the printed circuit board may increase and thus the semiconductor adhesion may be reduced, and a carrier layer is not required. For this reason, the thickness of the polar copper foil layer 150 is preferably 10 μm or less, and more preferably, it may be deposited to a thickness of 1 to 5 μm.
실시 예에 따르면, 상기 제3 전해액은 구리(Cu)이온을 포함한 황산(H2SO4)용액으로 제공될 수 있다. 더 바람직하게는 황산 100 내지 200g/ℓ에 구리(Cu)이온을 30 내지 80g/ℓ를 혼합한 용액으로 제공될 수 있다. According to an embodiment, the third electrolyte may be provided as a sulfuric acid (H 2 SO 4 ) solution containing copper (Cu) ions. More preferably, it may be provided as a solution in which 30 to 80 g/L of copper (Cu) ions are mixed with 100 to 200 g/L of sulfuric acid.
실시 예에 따르면 상기 제3 양극재(310c)는 상기 제2 양극재(310b)와 마찬가지로 비용해성 양극재로 제공될 수 있으며, 더욱 바람직하게는 비용해성 이리듐 산화물(Insoluble Ir2O3)을 코팅한 티타늄(Ti) 플레이트로 제공될 수 있다. According to the embodiment, the third positive electrode material 310c may be provided as an insoluble positive electrode material similar to the second positive electrode material 310b, and more preferably coated with insoluble iridium oxide (Insoluble Ir 2 O 3 ). It may be provided as a titanium (Ti) plate.
상기 S40 단계는 상기 제4 전해셀(300d1) 및 제5 전해셀(300d2)에 의해 상기 극동박층(150) 표면에 조화처리층(170)을 형성하는 단계이다. The step S40 is a step of forming the roughened layer 170 on the surface of the ultra-copper foil layer 150 by the fourth electrolytic cell 300d1 and the fifth electrolytic cell 300d2.
상기 조화처리층(170)은 상기 극동박층(150)과 상기 절연층 사이의 접착력을 증가시키기 위해 생성된 금속층을 의미한다. 더욱 바람직하게 상기 조화처리층(170)은 상기 극동박층(150) 표면에 구리(Cu)로 제공되는 금속핵을 생성하고, 상기 생성된 금속핵을 성장하여 제공될 수 있다. The roughened layer 170 means a metal layer created to increase the adhesive strength between the copper foil layer 150 and the insulating layer. More preferably, the roughened layer 170 may be provided by generating a metal core provided as copper (Cu) on the surface of the copper foil layer 150 and growing the generated metal core.
즉, 상기 조화처리층(170)은 상기 극동박층의 접착력을 향상할 수 있도록 상기 극동박층(150) 표면에 구리를 성장시킨 층을 의미한다. 다만, 상기 S40 단계 이후의 극동박층(150)의 표면 거칠기가 1.0㎛ 이상인 경우 과도한 표면 거칠기로 인하여 전기적 특성이 감소될 수 있으니 상기 조화처리층(170)은 상기 극동박층(150)의 표면 거칠기가 1.0㎛ 미만으로 유지하는 범위 내에서 표면 거칠기를 증가시키는 것이 바람직하다. That is, the roughened layer 170 means a layer in which copper is grown on the surface of the ultra-copper foil layer 150 so as to improve the adhesion of the ultra-copper foil layer. However, if the surface roughness of the copper foil layer 150 after the step S40 is 1.0 μm or more, electrical characteristics may be reduced due to excessive surface roughness. It is desirable to increase the surface roughness within the range of maintaining less than 1.0 μm.
실시 예에 따르면, 상기 S40 단계는 앞서 설명한 S10 내지 S30 단계와는 다르게 서로 다른 두가지 종류의 전해셀과 상기 음극 회전판(200)이 각각 별도로 전해주조 되어 수행될 수 있다. 이하, 상기 제4 전해셀(300d1)과 상기 음극 회전판(200)이 전해주조 되는 단계를 제1 조화처리 단계로 정의하며, 상기 제5 전해셀(300d2)과 상기 음극 회전판(200)이 전해주조 되는 단계를 제2 조화처리 단계로 정의한다. According to an embodiment, the step S40 may be performed by separately electroforming two different types of electrolysis cells and the cathode rotating plate 200, unlike steps S10 to S30 described above. Hereinafter, a step in which the fourth electrolytic cell 300d1 and the cathode rotary plate 200 are electroformed is defined as a first roughening step, and the fifth electrolytic cell 300d2 and the cathode rotary plate 200 are electroformed. This step is defined as the second harmonization step.
상기 제1 조화처리 단계는 상기 극동박층(150) 표면에 구리 핵을 생성하고 고착화하는 단계이다. The first roughening step is a step of generating and fixing copper nuclei on the surface of the ultra-copper foil layer 150.
구체적으로 상기 제1 조화처리 단계는 상기 제4 전해셀(300d1) 내부에 제4 전해액을 분사한 후 상기 음극 회전판(200)과 상기 제4 양극재(310d1) 사이에 제4 전류를 통전시켜 상기 극동박층(150) 표면에 구리 핵을 생성할 수 있으며, 생성된 핵을 상기 극독박층(150) 표면에 고착시킬 수 있다. Specifically, the first roughening process is performed by injecting a fourth electrolyte into the fourth electrolytic cell 300d1 and then passing a fourth current between the cathode rotating plate 200 and the fourth anode material 310d1. Copper nuclei may be generated on the surface of the ultra-copper thin layer 150, and the generated nuclei may be fixed to the surface of the ultra-poisonous thin layer 150.
실시 예에 따르면, 상기 제4 전해액은 황산 50 내지 150g/ℓ에 구리(Cu) 이온 10 내지 30g/ℓ를 혼합한 용액으로 제공될 수 있으며, 15 내지 25℃로 유지될 수 있다. According to an embodiment, the fourth electrolyte may be provided as a solution obtained by mixing 50 to 150 g/L of sulfuric acid with 10 to 30 g/L of copper (Cu) ions, and may be maintained at 15 to 25°C.
또한, 제1 조화처리 단계는 상기 제4 전해셀(300d1)에 5 내지 15A/d㎡의 전류밀도를 5 내지 20초 동안 주입하여 제공될 수 있다.In addition, the first roughening process may be performed by injecting a current density of 5 to 15 A/dm 2 into the fourth electrolysis cell 300d1 for 5 to 20 seconds.
실시 예에 따르면, 상기 제1 조화처리 단계를 통해 본 발명은 조화처리되지 않은 극동박층(150) 표면에 비해 0.05 내지 0.3㎛로 표면 거칠기(Rz)를 증가시킬 수 있다. According to an embodiment, through the first roughening step, the surface roughness (Rz) of the present invention can be increased to 0.05 to 0.3 μm compared to the surface of the ultra-copper foil layer 150 that has not been roughened.
상기 제1 조화처리를 수행한 이후, 제2 조화처리를 수행할 수 있다. 이를 통해, 상기 극동박층(150) 표면에 형성된 구리 핵이 성장하여 조화처리층을 형성할 수 있다. After performing the first roughening process, a second roughening process may be performed. Through this, copper nuclei formed on the surface of the ultra-copper foil layer 150 can grow to form a roughened layer.
구체적으로 상기 제2 조화처리 단계는 상기 제5 전해셀(300d2) 내부에 제5 전해액을 분사한 후 상기 음극 회전판(200)과 상기 제5 양극재(310d2) 사이에 제5 전류를 통전시켜 수행될 수 있다. 즉, 상기 제1 조화처리와는 다른 전해셀을 이용하여 다른 종류의 전해액과 전류 상태에서 수행될 수 있다. Specifically, the second roughening treatment step is performed by injecting a fifth electrolyte into the fifth electrolytic cell 300d2 and then passing a fifth current between the cathode rotating plate 200 and the fifth anode material 310d2. It can be. That is, the first roughening treatment may be performed using a different electrolytic cell and in a different type of electrolyte and current state.
상기 제5 전해액은 황산 100 내지 200g/ℓ에 구리(Cu) 이온 50 내지 100g/ℓ를 혼합한 용액으로 제공될 수 있다. 즉, 상기 제5 전해액은 상기 제4 전해액보다 구리(Cu) 이온의 농도가 더 높은 특징을 가진다. 이러한 차이로 인하여 상기 제2 조화처리 단계는 상기 구리 핵을 충분한 크기로 성장시킬 수 있다.The fifth electrolyte solution may be provided as a solution in which 50 to 100 g/L of copper (Cu) ions are mixed with 100 to 200 g/L of sulfuric acid. That is, the fifth electrolyte has a higher concentration of copper (Cu) ions than the fourth electrolyte. Due to this difference, the second roughening process can grow the copper core to a sufficient size.
또한, 상기 제5 전해액은 15 내지 25℃로 제공되는 상기 제4 전해액과는 다르게 30 내지 60℃로 제공되는 것이 바람직하다. 즉, 상기 제1 전해처리 단계는 전해액의 온도를 25℃ 이하로 제한하여 소수의 핵이 과도하게 성장하는 것을 방지하고, 더 많은 핵을 생성할 수 있다. 반면에 상기 제2 전해처리 단계는 전해액의 온도를 30℃ 이상으로 제공하여 상기 구리 핵의 성장속도를 향상할 수 있다.In addition, the fifth electrolyte is preferably provided at 30 to 60 °C, unlike the fourth electrolyte provided at 15 to 25 °C. That is, in the first electrolytic treatment step, the temperature of the electrolyte solution is limited to 25° C. or less, so that a small number of nuclei may be prevented from excessively growing, and more nuclei may be generated. On the other hand, in the second electrolytic treatment step, the growth rate of the copper nuclei may be improved by providing the temperature of the electrolyte at 30° C. or higher.
실시 예에 따르면 상기 제2 조화처리 단계를 통해 본 발명은 상기 극동박층(150) 표면을 최종적으로 1.5 내지 4.0Rz 로 형성할 수 있다. According to an embodiment, through the second roughening step, the present invention may finally form the surface of the ultra-copper foil layer 150 to 1.5 to 4.0 Rz.
또한, 상기 제4 양극제는 비용해성 양극재, 더욱 바람직하게는 상기 제2, 제3 양극재와 마찬가지로 이리듐 산화물(Insoluble Ir2O3)을 코팅한 티타늄(Ti) 플레이트로 제공될 수 있다. In addition, the fourth positive electrode may be provided as an insoluble positive electrode material, more preferably, a titanium (Ti) plate coated with iridium oxide (Insoluble Ir 2 O 3 ) like the second and third positive electrode materials.
구체적으로, 상기 제1 조화처리 단계는 핵을 생성 및 고착화 하는 과정이기 때문에, 핵 생성 과정에서 전압조건이 일정하게 유지되어야 하며, 하기 때문에, 상기 제4 양극재(310d1)는 비용해성으로 제공되는 것이 바람직하다. Specifically, since the first roughening process is a process of generating and fixing nuclei, the voltage condition must be kept constant during the nucleation process, so that the fourth cathode material 310d1 is provided as insoluble. it is desirable
반면에 상기 제5 양극재는 용해성을 가진 구리 조각(Cu plate) 또는 구리 볼(Cu ball)로 제공되는 용해성 양극재 또는 리듐 산화물(Insoluble Ir2O3)을 코팅한 티타늄(Ti) 플레이트로 제공되는 비용해성 양극재 중 어느 하나로 제공될 수 있다.On the other hand, the fifth cathode material is provided as a soluble cathode material provided as a copper piece (Cu plate) or a copper ball (Cu ball) having solubility, or a titanium (Ti) plate coated with lithium oxide (Insoluble Ir 2 O 3 ) Any one of insoluble cathode materials may be provided.
실시 예에 따르면, 상기 제4 양극재는 이리듐 산화물(Insoluble Ir2O3)을 코팅한 티타늄(Ti) 플레이트의 비용해성 양극재로 제공되며, 상기 제5 양극재는 구리 조각(Cu plate) 또는 구리 볼(Cu ball)로 제공되는 용해성 양극재로 제공될 수 있다. According to an embodiment, the fourth positive electrode material is provided as an insoluble positive electrode material of a titanium (Ti) plate coated with iridium oxide (Insoluble Ir 2 O 3 ), and the fifth positive electrode material is a copper piece (Cu plate) or a copper ball. It can be provided as a soluble cathode material provided in (Cu ball).
이 경우, 상기 제2 조화처리 단계는 용해성 양극제를 통해 수행되기 때문에 산소(O2) 배출이 쉽고 구리(Cu)이온을 공급하는 추가적인 설비가 요구되지 않아 안정적으로 구리 핵을 성장시킬 수 있다. In this case, since the second roughening step is performed using a soluble anode agent, oxygen (O 2 ) is easily discharged, and additional facilities for supplying copper (Cu) ions are not required, so that copper nuclei can be stably grown.
이후, 상기 S50 단계를 통해 상기 반도체용 동박(1000)은 상기 음극 회전판(200)에서 박리(peeling off)될 수 있다. Thereafter, the copper foil 1000 for semiconductors may be peeled off from the cathode rotating plate 200 through the step S50.
상술한 과정을 통해, 상기 반도체용 동박(100)은 하나의 동박 제조 장치에 의해 상기 캐리어 금속층(110, 분리층(130, 극동박층(150) 및 조화처리층(170)이 순차적으로 석출되어 원 패스(One-pass)로 반도체용 동박(100)을 제조할 수 있다.Through the above-described process, the semiconductor copper foil 100 is obtained by sequentially depositing the carrier metal layer 110, the separation layer 130, the copper foil layer 150, and the roughening treatment layer 170 by one copper foil manufacturing device. The copper foil 100 for semiconductors can be manufactured by one-pass.
실시 예에 따르면, 상기 S10 내지 S50 단계를 거쳐 제조된 반도체용 동박(100)은 상기 S60 단계를 통해 방청 처리될 수 있다. According to the embodiment, the copper foil 100 for semiconductors manufactured through steps S10 to S50 may be subjected to anti-rust treatment through step S60.
상기 방청 처리는 상기 조화처리된 반도체용 동박(100) 표면에 아연 합금층을 형성하여 내연화 성능을 향상시키고 보관 및 공정 중에 상기 반도체용 동박(100)이 변색되는 것을 방지할 수 있다.The anti-corrosive treatment can form a zinc alloy layer on the surface of the roughened copper foil 100 for semiconductors to improve softening resistance and prevent the copper foil 100 for semiconductors from being discolored during storage and processing.
구체적으로 상기 S60 단계에서는 20 내지 80g/ℓ의 아연(Zn)이 용해된 황산(H2SO4)용액에 상기 반조체용 동박(100)을 담지한 상태에서 10 내지 20/d㎡의 전류를 5 내지 20초 동안 주입하여 방청 처리를 수행할 수 있다. Specifically, in the step S60, a current of 10 to 20 / dm 2 is applied in a state in which the copper foil 100 for a semi-structure is supported in a sulfuric acid (H 2 SO 4 ) solution in which 20 to 80 g / ℓ of zinc (Zn) is dissolved. The anti-rust treatment may be performed by pouring for 20 seconds.
실시 예에 따르면, 방청 처리를 수행한 이 후, 20 내지 30℃의 크롬산(CrO3) 용액에 방청 처리된 상기 반도체용 동박을 담지하여 크로메이트 처리층을 형성할 수 있다.According to an embodiment, after performing the anti-corrosive treatment, the chromate treatment layer may be formed by supporting the anti-corrosive copper foil for semiconductors in a chromic acid (CrO 3 ) solution at 20 to 30 °C.
이상 본 발명의 실시 예에 따른 반도체용 동박의 제조방법에 대해 설명하였다. 이후, 구체적인 실시 예를 통해 상기 반도체용 동박을 더욱 상세하게 설명한다. The manufacturing method of the copper foil for semiconductors according to the embodiment of the present invention has been described above. Hereinafter, the copper foil for semiconductors will be described in more detail through specific examples.
앞서 설명한 바와 같이, 본 발명의 실시 예에 따른 반도체용 동박(100)은 최소 제1 내지 제5 전해셀(300a, 300b, 300c, 300d1, 300d2)을 포함하는 복수의 전해셀이 구비된 동박 제조장치(1000)에 의해 제조될 수 있으며, 하나의 장치를 통해 캐리어 금속층(110), 분리층(130), 극동박층(150) 및 조화처리층(170)이 순차적으로 석출되어 하나의 반도체용 동박(100)을 형성할 수 있다. As described above, the copper foil 100 for semiconductors according to an embodiment of the present invention is manufactured with a plurality of electrolytic cells including at least first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2. It can be manufactured by the device 1000, and through one device, the carrier metal layer 110, the separation layer 130, the copper foil layer 150, and the roughened layer 170 are sequentially deposited to form one copper foil for semiconductors. (100) can be formed.
실시 예에 따르면 상기 제1 내지 제5 전해셀(300a, 300b, 300c, 300d1, 300d2)은 하기 표 1과 같은 조건으로 양극재, 전해액 및 전류를 공급받아 음극 회전판(200)위에 상기 캐리어 금속층(110), 분리층(130), 극동박층(150) 및 조화처리층(170)을 순차적으로 석출할 수 있다. According to the embodiment, the first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2 are supplied with a cathode material, electrolyte, and current under the conditions shown in Table 1 below, and the carrier metal layer ( 110), the separation layer 130, the copper foil layer 150, and the roughened layer 170 may be sequentially deposited.
음극재cathode material 전해액electrolyte 전해액 온도electrolyte temperature 양극재cathode material 전류electric current 두께thickness
캐리어 금속층carrier metal layer Ti PlateTi Plate H2SO4: 150g/ℓ
Cu ion: 90g/ℓ
H 2 SO 4 : 150g/ℓ
Cu ion: 90g/ℓ
45℃45℃ - Soluble
- Cu metal ball
-Soluble
- Cu metal ball
30A/dm2 30A/ dm2 9㎛9㎛
분리층separating layer In ion: 10g/ℓ
Cr ion: 20g/ℓ
Zn ion: 15g/ℓ
C6H5Na3O7: 100g/ℓ
In ion: 10g/ℓ
Cr ion: 20g/ℓ
Zn ion: 15g/ℓ
C 6 H 5 Na 3 O 7 : 100 g/ℓ
45℃45℃ - Insoluble
- Ti plate coated
by Ir2O3
- Insoluble
-Ti plate coated
by Ir 2 O 3
5A/dm2 5A/ dm2 0.01㎛0.01 μm
극동박층Far East Laminate H2SO4: 150g/ℓ
Cu ion: 65g/ℓ
H 2 SO 4 : 150g/ℓ
Cu ion: 65g/ℓ
40℃40℃ - Insoluble
- Ti plate coated
by Ir2O3
- Insoluble
-Ti plate coated
by Ir 2 O 3
15A/dm2 15A/ dm2 2㎛2㎛
조화처리층Coordination treatment layer H2SO4: 100g/ℓ
Cu ion: 15g/ℓ
H 2 SO 4 : 100g/ℓ
Cu ion: 15g/ℓ
20℃20℃ -Insoluble
- Ti plate coated
by Ir2O3
-Insoluble
-Ti plate coated
by Ir 2 O 3
10A/dm2 10A/ dm2 0.1㎛0.1㎛
H2SO4: 150g/ℓ
Cu ion: 65g/ℓ
H 2 SO 4 : 150g/ℓ
Cu ion: 65g/ℓ
40℃40℃ - Soluble
- Cu metal ball
-Soluble
- Cu metal ball
15A/dm2 15A/ dm2
즉, 본 발명의 실시 예에 따른 반도체용 동박(100)은 상기 표 1에 개시된 조건에 따라 하나의 음극 회전판(200)위에 상기 캐리어 금속층(110), 분리층(130), 극동박층(150) 및 조화처리층(170)을 순차적으로 석출하여 하나의 반도체용 동박(100)을 제조할 수 있다. 이를 통해 하나의 동박 제조 장치(1000)를 사용하여 생산과정을 간소화 하고, 한 번의 작동주기(One cycle)를 통해 각 층의 석출 공정이 실시간으로 수행하여 하나의 완제품으로 제조될 수 있다.That is, in the copper foil 100 for semiconductors according to an embodiment of the present invention, the carrier metal layer 110, the separation layer 130, and the copper foil layer 150 are formed on one cathode rotating plate 200 according to the conditions disclosed in Table 1 above. And it is possible to manufacture one copper foil 100 for semiconductors by sequentially depositing the roughened layer 170 . Through this, the production process can be simplified by using one copper foil manufacturing apparatus 1000, and the precipitation process of each layer can be performed in real time through one cycle to be manufactured as one finished product.
아울러, 상기 극동박층(150)을 상기 분리층(130)위에 직접 석출하여 상기 극동박층(150)의 석출 과정에서 파손 및 균열이 발생하는 것을 최소화 할 수 있다. 이러한 이유로 5㎛ 이하의 두께의 매우 얇은 극동박층(150)도 안정적으로 생산할 수 있다. In addition, by directly depositing the ultra-copper foil layer 150 on the separation layer 130, it is possible to minimize damage and cracks occurring during the deposition process of the ultra-copper foil layer 150. For this reason, even a very thin ultra-thin copper foil layer 150 having a thickness of 5 μm or less can be stably produced.
이는 캐리어 금속층(110)을 생산하는 장치와 상기 극동박층(150)을 석출하는 장치가 별도로 요구되는 기존의 제조방법과 비교하여 생산성과 품질이 향상된 진일보한 기술임을 알 수 있다. It can be seen that this is an advanced technology with improved productivity and quality compared to the existing manufacturing method in which the device for producing the carrier metal layer 110 and the device for depositing the copper foil layer 150 are separately required.
또한, 본 발명은 상기 캐리어 금속층(110), 분리층(130, 극동박층(150) 및 조화처리층(170)을 하나의 장치로 실시간으로 석출함으로써 상기 금속층들의 접합력을 유지하는데 요구되는 추가적인 공정 또는 열처리를 생략할 수 있다. 이를 통해, 제조과정에서 상기 극동박층(150)이 파손 또는 열변형 되는 것을 최소화 할 수 있다.In addition, the present invention is an additional process required to maintain the bonding strength of the metal layers by depositing the carrier metal layer 110, the separation layer 130, the copper foil layer 150, and the roughened layer 170 in real time with one device, or Heat treatment may be omitted, thereby minimizing damage or thermal deformation of the copper foil layer 150 during the manufacturing process.
마지막으로, 본 발명은 상기 제1 내지 제5 전해셀(300a, 300b, 300c, 300d1, 300d2)에 공급되는 전해액의 종류, 농도, 전류밀도 등의 공정 조건을 독립적으로 제어할 수 있다. 이를 통해, 상기 반도체용 동박(100)의 전기적, 물리적 특성 및 기계적 특성을 다양화 할 수 있으며, 각 금속층의 전기적 성질, 두께, 재질 등을 필요에 따라 쉽게 변환할 수 있다. Lastly, according to the present invention, process conditions such as the type, concentration, and current density of the electrolyte solution supplied to the first to fifth electrolytic cells 300a, 300b, 300c, 300d1, and 300d2 can be independently controlled. Through this, the electrical, physical and mechanical properties of the copper foil 100 for semiconductors can be diversified, and the electrical properties, thickness, material, etc. of each metal layer can be easily converted as needed.
이상, 본 발명을 바람직한 실시 예를 사용하여 상세히 설명하였으나, 본 발명의 범위는 특정 실시 예에 한정되는 것은 아니며, 첨부된 특허청구범위에 의하여 해석되어야 할 것이다. 또한, 이 기술분야에서 통상의 지식을 습득한 자라면, 본 발명의 범위에서 벗어나지 않으면서도 많은 수정과 변형이 가능함을 이해하여야 할 것이다.In the above, the present invention has been described in detail using preferred embodiments, but the scope of the present invention is not limited to specific embodiments, and should be interpreted according to the appended claims. In addition, those skilled in the art should understand that many modifications and variations are possible without departing from the scope of the present invention.

Claims (11)

  1. 일 방향으로 회전하는 음극 회전판 및 상기 음극 회전판을 따라 소정 간격으로 이격되어 배치되고, 내부에 전해액 및 양극재를 포함하는 제1 내지 제5 전해셀을 포함하는 동박 제조장치에 의해 제조되며, Manufactured by a copper foil manufacturing apparatus including a cathode rotating plate rotating in one direction and first to fifth electrolytic cells spaced apart from each other at predetermined intervals along the cathode rotating plate and containing an electrolyte solution and a cathode material therein,
    상기 제1 전해셀에 의해 상기 음극 회전판 위에 캐리어 금속층을 석출하는 단계;depositing a carrier metal layer on the cathode rotating plate by the first electrolysis cell;
    상기 제2 전해셀에 의해 상기 캐리어 금속층 위에 분리층을 석출하는 단계;depositing a separation layer on the carrier metal layer by the second electrolysis cell;
    상기 제3 전해셀에 의해 상기 분리층 위에 극동박층을 석출하는 단계; 및depositing an ultra-copper foil layer on the separation layer by the third electrolysis cell; and
    상기 제4 전해셀 및 제5 전해셀에 의해 상기 극동박층 표면에 조화처리층을 형성하는 단계;를 포함하며, Forming a roughened layer on the surface of the copper foil layer by the fourth electrolytic cell and the fifth electrolytic cell;
    상기 음극 회전판이 회전함에 따라, 상기 제1 내지 제5 전해셀이 상기 음극 회전판과 순차적으로 전해주조(electroforming) 하여 하나의 반도체용 동박을 형성하는 것을 특징으로 하는 반도체용 동박의 제조방법.As the cathode rotation plate rotates, the first to fifth electrolysis cells are sequentially electroformed with the cathode rotation plate to form a single semiconductor copper foil.
  2. 제 1항에 있어서, According to claim 1,
    상기 제1 내지 제5 전해셀은, The first to fifth electrolytic cells,
    각 전해셀에 서로 다른 크기의 전류와 전해액을 독립적으로 공급하는 것을 특징으로 하는, 반도체용 동박의 제조방법.A method for manufacturing a copper foil for semiconductors, characterized in that each electrolytic cell is independently supplied with a current and an electrolyte of different sizes.
  3. 제 1항에 있어서,According to claim 1,
    상기 캐리어 금속층은 The carrier metal layer is
    상기 제1 전해셀 내부에 제1 전해액을 분사한 후 제1 전류를 통전시킴으로써 형성하며, Formed by injecting a first electrolyte solution into the first electrolysis cell and then passing a first current;
    상기 제1 전해셀 내부에 포함된 제1 양극재는 용해성을 가진 금속 조각(Metal plate) 또는 금속 볼(Metal ball)으로 제공되는 것을 특징으로 하는, 반도체용 동박의 제조방법.The method of manufacturing copper foil for semiconductors, characterized in that the first cathode material included in the first electrolysis cell is provided as a metal plate or metal ball having solubility.
  4. 제 1항에 있어서,According to claim 1,
    상기 분리층은 The separation layer is
    상기 제2 전해셀 내부에 제2 전해액을 분사한 후 제2 전류를 통전시킴으로써 형성하며, Formed by injecting a second electrolyte into the second electrolysis cell and then passing a second current;
    상기 제2 전해셀 내부에 포함된 제2 양극재는 이리듐 산화물(Ir2O3)을 코팅한 티타늄(Ti) 플레이트로 제공되는 것을 특징으로 하는, 반도체용 동박의 제조방법.The second anode material included in the second electrolysis cell is provided as a titanium (Ti) plate coated with iridium oxide (Ir 2 O 3 ).
  5. 제 1항에 있어서,According to claim 1,
    상기 극동박층은 The far copper thin layer is
    상기 제3 전해셀 내부에 제3 전해액을 분사한 후 제3 전류를 통전시킴으로써 형성하며, Formed by injecting a third electrolyte into the third electrolysis cell and then passing a third current;
    상기 제3 전해셀 내부에 포함된 제3 양극재는 이리듐 산화물(Ir2O3)을 코팅한 티타늄(Ti) 플레이트로 제공되는 것을 특징으로 하는, 반도체용 동박의 제조방법.The third anode material included in the third electrolysis cell is provided as a titanium (Ti) plate coated with iridium oxide (Ir2O3).
  6. 제 1항에 있어서,According to claim 1,
    상기 조화처리층을 형성하는 단계는 The step of forming the roughened layer is
    구리 핵을 형성하고 고착하는 제1 조화처리 단계; 및A first roughening step of forming and fixing copper cores; and
    상기 구리 핵을 성장하는 제2 조화처리 단계를 포함하며,A second roughening step of growing the copper core,
    상기 제1 조화처리 단계는 이리듐 산화물(Ir2O3)을 코팅한 티타늄(Ti) 플레이트로 제공되는 제4 양극재에 의해 수행되는 것을 특징으로 하는, 반도체용 동박의 제조방법.The first roughening step is characterized in that performed by the fourth anode material provided as a titanium (Ti) plate coated with iridium oxide (Ir2O3), a method for manufacturing copper foil for semiconductors.
  7. 제 6항에 있어서,According to claim 6,
    상기 제2 조화처리 단계는 용해성을 가진 금속 조각(Metal plate) 또는 이리듐 산화물(Ir2O3)을 코팅한 티타늄(Ti) 플레이트 중 어느 하나의 소재로 제공되는 제5 양극재에 의해 수행되는 것을 특징으로 하는, 반도체용 동박의 제조방법.Characterized in that the second roughening step is performed by the fifth anode material provided with any one of a soluble metal plate or a titanium (Ti) plate coated with iridium oxide (Ir2O3) , Manufacturing method of copper foil for semiconductors.
  8. 캐리어 금속층; a carrier metal layer;
    상기 캐리어 금속층 상면에 석출된 분리층;a separation layer precipitated on the upper surface of the carrier metal layer;
    상기 분리층 상면에 석출되는 극동박층;an ultra-copper foil layer precipitated on the upper surface of the separation layer;
    상기 극동박층 표면에 형성된 조화처리층; 및a roughening layer formed on the surface of the copper foil layer; and
    상기 조화처리층 표면에 형성된 방청 도금층;을 포함하는 반도체용 동박에 있어서, In the copper foil for semiconductors comprising a; anti-rust plating layer formed on the surface of the roughened layer,
    상기 반도체용 동박은, The copper foil for semiconductors,
    일 방향으로 회전하는 음극 회전판; 및a cathode rotating plate rotating in one direction; and
    상기 음극 회전판을 따라 소정 간격으로 이격되어 배치되고, 내부에 전해액 및 양극재를 포함하는 제1 내지 제5 전해셀;을 포함하는 동박 제조장치에 의해 제조되며, It is manufactured by a copper foil manufacturing apparatus including; first to fifth electrolytic cells spaced apart from each other at predetermined intervals along the cathode rotating plate and containing an electrolyte solution and a cathode material therein;
    상기 음극 회전판이 회전함에 따라, 상기 제1 내지 제5 전해셀이 상기 음극 회전판과 순차적으로 전해주조(electroforming) 하여 하나의 반도체용 동박을 형성하는 것을 특징으로 하는 반도체용 동박.As the cathode rotating plate rotates, the first to fifth electrolytic cells are sequentially electroformed with the cathode rotating plate to form a single semiconductor copper foil.
  9. 제 8항에 있어서, According to claim 8,
    상기 제1 내지 제5 전해셀은, The first to fifth electrolysis cells,
    각 전해셀에 서로 다른 크기의 전류를 독립적으로 공급하여, 상기 음극 회전판과 독립적으로 전해주조하는 동박 제조장치에 의해 제조되는 것을 특징으로 하는, 반도체용 동박.A copper foil for semiconductors, characterized in that it is produced by a copper foil manufacturing apparatus that independently supplies currents of different magnitudes to each electrolysis cell and electrolytically molds it independently of the cathode rotating plate.
  10. 제 8항에 있어서, According to claim 8,
    상기 캐리어 금속층은 구리(Cu), 니켈(Ni), 크롬(Cr), 알루미늄(Al) 또는 이를 포함하는 합금으로 이루어지며, 두께가 5 내지 50㎛로 형성되는 것을 특징으로 하는, 반도체용 동박.The carrier metal layer is made of copper (Cu), nickel (Ni), chromium (Cr), aluminum (Al) or an alloy containing the same, characterized in that formed to a thickness of 5 to 50㎛, copper foil for semiconductors.
  11. 제 8항에 있어서, According to claim 8,
    상기 분리층은 인듐(In), 아연(Zr), 크롬(Cr)또는 이를 포함하는 합금층으로 제공되며 두께가 0.01㎛ 이하로 형성되는 것을 특징으로 하는, 반도체용 동박.The separation layer is provided with indium (In), zinc (Zr), chromium (Cr) or an alloy layer containing the same, characterized in that the thickness is formed to 0.01㎛ or less, copper foil for semiconductors.
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