WO2023280474A1 - Module d'émission et procédé d'émission de signaux différentiels dans un système de bus série - Google Patents

Module d'émission et procédé d'émission de signaux différentiels dans un système de bus série Download PDF

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Publication number
WO2023280474A1
WO2023280474A1 PCT/EP2022/064764 EP2022064764W WO2023280474A1 WO 2023280474 A1 WO2023280474 A1 WO 2023280474A1 EP 2022064764 W EP2022064764 W EP 2022064764W WO 2023280474 A1 WO2023280474 A1 WO 2023280474A1
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WO
WIPO (PCT)
Prior art keywords
transmission
stages
current
bus
stage
Prior art date
Application number
PCT/EP2022/064764
Other languages
German (de)
English (en)
Inventor
Steffen Walker
Felix Lang
Original Assignee
Robert Bosch Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch Gmbh filed Critical Robert Bosch Gmbh
Priority to CN202280060782.0A priority Critical patent/CN117957818A/zh
Publication of WO2023280474A1 publication Critical patent/WO2023280474A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40006—Architecture of a communication node
    • H04L12/40032—Details regarding a bus interface enhancer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L2012/40208—Bus networks characterized by the use of a particular bus standard
    • H04L2012/40215—Controller Area Network CAN

Definitions

  • the present invention relates to a transmission module and a method for transmitting differential signals in a serial bus system, which can be used in particular for CAN XL.
  • Serial bus systems are used for message or data transmission in technical systems.
  • a serial bus system can enable communication between sensors and control devices in a vehicle or a technical production facility, etc.
  • CAN FD In a CAN bus system, messages are transmitted using the CAN and/or CAN FD protocol, as described in the ISO-11898-1:2015 standard as a CAN protocol specification with CAN FD.
  • CAN FD With CAN FD, during transmission on the bus, there is a switch back and forth between a slow operating mode in a first communication phase (arbitration phase) and a fast operating mode in a second communication phase (data phase).
  • data phase With a CAN FD bus system, a data transmission rate of more than 1 MBit per second (1Mbps) is possible in the second communication phase.
  • CAN FD becomes used by most manufacturers in the first step with 500kbit/s arbitration bit rate and 2Mbit/s data bit rate in the vehicle.
  • CAN FD In order to enable even higher data rates in the second communication phase, there are successor bus systems for CAN FD, such as CANSIC and CAN XL.
  • CANSIC according to the CiA601-4 standard, a data rate of around 5 to 8 Mbit/s can be achieved in the second communication phase.
  • CAN XL a data rate of > 10 Mbit/s is required in the second communication phase, whereby the standard (CiA610-3) for this is currently being defined by the CAN in Automation (CiA) organization.
  • a bus signal CAN_H and ideally a bus signal CAN_L are driven onto a bus separately for a transmission signal TxD.
  • a bus state is actively driven in the bus signals CAN_H, CAN_L.
  • the other bus state is not driven and is set due to a terminating resistor for bus lines or bus cores of the bus.
  • the signal forms of the bus signals CAN_H, CAN_L can deviate from the ideal signal form in a real bus system.
  • transceivers which are also referred to as CAN transceivers or CAN FD transceivers, etc., are usually used in a CAN bus system for the individual communication participants.
  • the CAN transceivers or CAN FD transceivers must not be allowed to transmit or
  • Tranceivers for CAN XL must comply with even more stringent limit values that are specified in the IEC62228-3 standard. This is the only way to operate the bus system at the specified higher bit rates than with CAN FD and CAN SIC. Depending on the semiconductor technology available, compliance with these strict limits poses a major challenge.
  • transceivers for CAN SIC or transceivers for CAN XL must have a third state in the arbitration phase, which is also called SIC mode or SIC operating mode, in addition to the states recessive (rec) and dominant (dom). , the state sic, are generated.
  • a common mode voltage of the bus lines for the CAN_H, CAN_L signals must be kept within narrow limits in three transmission states, namely recessive, dominant, sic.
  • the common-mode voltage is generated across a common-mode choke, which is used in particular in a certification measurement to check compliance with the IEC62228-3 standard.
  • the common mode choke is also called common mode choke (CMC).
  • CMC common mode choke
  • DM differential mode
  • CM common mode
  • the common-mode choke generates a differential signal with an undesired common-mode signal superimposed on it at the output from a differential signal without a common-mode component at the input. This is unfavorable since this is fed directly into the CAN bus on the bus side and is visible to other CAN modules.
  • the object of the present invention to provide a transmission module and a method for transmitting differential signals in a serial bus system which solve the aforementioned problems.
  • the transmission module and the method for sending differential signals in a serial bus system are intended to allow compensation for disturbance variables that affect the emission behavior of the transmission module.
  • the object is achieved by a transmission module for sending differential signals in a serial bus system having the features of claim 1.
  • the transmission module has a first transmission stage for generating transmission currents for a first signal that is to be sent to a bus of the bus system, a second transmission stage for generating transmission currents for a second signal that is applied to the bus as a signal that is different from the first signal is to send, a third transmission stage for generating transmission currents for the first signal, and a fourth transmission stage for generating transmission currents for the second signal, the first to fourth transmission stages being connected in a full bridge in which the first and fourth transmission stages are connected in series and the third and second transmission stages are connected in series, each of the first to fourth transmission stages having at least two current stages which are connected in parallel with one another, each of the at least two current stages having a switchable resistor, and the switchable resistors of a transmitter stage having different resistance values to have.
  • the transmission module described enables the required limit values for the emission of a transmission/reception device for CAN XL to be achieved.
  • the transmitter module meets the IEC62228-3 standard, which defines the limit values to be observed for the bus states dom, sic and rec.
  • the transmission module can adapt the impedance between the bus lines for the signals CAN_H and CAN_L very well to the characteristic characteristic impedance or impedance of the bus line used.
  • the transmitter module prevents reflections and thus allows operation in the bus system at higher bit rates.
  • the transmission module described permits a chronologically staggered and controlled switching process. Switching on according to the Gaussian error function can be implemented here. This enables a soft behavior to be set during the switch-on process. In addition, the possible variation of time stages when switching on prevents the occurrence of a narrow-band frequency line in the emission frequency spectrum. Alternatively, it is possible to carry out a staggered and controlled switching process using fixed time steps and varied voltage steps with the transmission module described. This can also influence the emission behavior of the transmission module in such a way that the specified limit values are complied with.
  • the transmission module described can reduce effects due to asymmetrical behavior of the transmission stages, which can occur in the transmission states dom, sic, rec and worsen the emission.
  • the transmit module prevents unequal behavior of components in transmit stages A, B (effect 1) of a full bridge, so that in the dom state a change in the common-mode voltage is minimized or prevented compared to the rec state.
  • the transmit module can prevent unequal behavior of components in transmit stages A/D and C/B of the full bridge (Effect 2), so that in the sic state, a change in the common-mode voltage is minimized or prevented compared to the rec state will.
  • a number n of the at least two current stages may be the same for each of the first to fourth transmission stages, where n is a natural number greater than 1.
  • each of the at least two current stages has a CMOS transistor for switching the resistance of the current stage.
  • the CMOS transistor of the current stages of the first transmission stage is a PMOS transistor
  • the CMOS transistor of the current stages of the second transmission stage being an NMOS transistor
  • the CMOS transistor of the current stages of the third transmission stage being a PMOS transistor
  • the CMOS transistor of the current stages of the fourth transmit stage is an NMOS transistor.
  • Each of the first to fourth transmission stages can also have a polarity reversal diode to protect against positive feedback in a connection for the bus voltage supply and negative feedback from a connection for ground, and at least one cascode to protect the CMOS transistors.
  • At least two cascodes are connected in parallel with one another, with a number y of the cascodes being the same for each of the first to fourth transmission stages, with y being a natural number greater than 1, and with the on-resistance of the at least two cascodes being different.
  • the transmission module can also have at least a first current-limiting module as a current source, which is connected between a connection for the bus voltage supply and the full bridge, and at least a second current-limiting module as a current sink, which is connected between a connection for ground and the full bridge.
  • At least two first current-limiting modules are connected in parallel to one another, the on-resistance of which is different, with at least two second current-limiting modules being connected in parallel to one another, the on-resistance of which is different, and the number x of the first current-limiting modules is equal to the number x of the second current-limiting modules, where x is a natural number greater than 1.
  • the transmission module can also have a control circuit for controlling switchable components of the first to fourth transmission stage depending on a digital transmission signal and an operating mode set for the transmission module.
  • the drive circuit may be designed for the time-staggered and controlled switching of the resistance values of the at least two current stages.
  • the transmission module described above can be part of a transmission/reception device for a subscriber station for a serial bus system, which also has a reception module for receiving signals from the bus.
  • the transmitting/receiving device can be part of a subscriber station for a serial bus system, which also has a communication control device for controlling communication in the bus system and for generating a digital transmission signal for driving the first to fourth transmission stages.
  • the aforementioned object is also achieved by a method for sending differential signals in a serial bus system having the features of claim 15.
  • the method is carried out with a transmission module, the method having the steps of generating, with a first transmission stage, transmission streams for a first signal that is to be sent to a bus of the bus system, generating with a second transmission stage, transmission streams for a second signal, which is to be sent to the bus as a signal that is differential with respect to the first signal, generating, with a third transmission stage, transmission currents for the first signal, and generating, with a fourth transmission stage, transmission currents for the second signal, the first to fourth transmission stages are connected in a full bridge, in which the first and fourth transmission stages are connected in series and the third and second transmission stages are connected in series, each of the first to fourth transmission stages having at least two current stages connected in parallel with one another, wherein each of the at least two current stages has a switchable resistor, and where the switchable resistors of a transmission stage have different resistance values.
  • the method offers the same advantages as those mentioned above with regard to the transmission module.
  • FIG. 1 shows a simplified block diagram of a bus system according to a first exemplary embodiment
  • FIG. 2 shows a diagram to illustrate the structure of a message that can be sent by a subscriber station of the bus system according to the first exemplary embodiment
  • FIG. 3 shows an example of the ideal time profile of bus signals CAN_H, CAN_L in the bus system of FIG. 1;
  • 5 shows an example of a time profile of a digital transmission signal which is to be converted into bus signals CAN_H, CAN_L for a bus of the bus system of FIG. 1 in the arbitration phase (SIC operating mode); 6 shows the time profile of the bus signals CAN_H, CAN_L when changing from a recessive bus state to a dominant bus state and back to the recessive bus state, which are sent to the bus in the arbitration phase (SIC operating mode) on the basis of the transmission signal from FIG. 5;
  • the subscriber stations 10, 30 each have a communication control device 11 and a transceiver 12.
  • the transceiver 12 has a transmit module 121 and a receive module 122.
  • the dominant state 401 is determined by matching the resistors R_A1 to R_An (transmission stage 121A) with the resistors R_B1 to R_Bn (transmission stage 121B).
  • the term “adjustment” means an active trimming step according to one possibility.
  • “matching” means that the resistor values match as well as possible, which by default is done without a matching or trimming step.
  • the transmission module 1210 has, instead of the current limiting modules 1211, 1212, a first to xth current limiting module 1211_1 to 1211x and a first to xth current limiting module 1212_1 to 1212_x.
  • x is a natural number > 1.
  • the transmission stage 121C0 has a first to y-th transistor HVP_C1 to HVP_Cy, where y is the natural number >1.
  • Each of the first through y-th transistors HVP_C1 through HVP_Cy is a CMOS transistor, specifically a PMOS transistor, as previously described for the transistor HVP_C with respect to FIG.
  • the resistance Ron (switch-on resistance) of the cascodes in the transmission stages 121A0, 121B0 can be changed, in particular by driving with the respectively associated control circuit T_A, T_B. This is done by changing the up to y parallel-connected transistors HVP_A1 to HVP_Ay and/or the up to y parallel-connected transistors HVN_B1 to HVN_By.
  • the cascodes from the transmission stages 121DO, 121C0 must also experience the same change.
  • the up to y parallel connected transistors HVN_D1 to HVP_Dy and/or up to y parallel-connected transistors HVP_C1 to HVP_Cy changed accordingly.
  • each of the transistors HVP_A1 to HVP_Ay, HVN_B1 to HVN_By, HVP_C1 to HVP_Cy, HVN_D1 to HVP_Dy is connected to a connection 125 at its control connection (gate connection).
  • Each of these transistors can thus be controlled by the at least one control device 124 .
  • the transmission module 1210 can prevent unequal behavior of components in transmission stages 121A0 / 121D0 and 121C0 / 121B0 of the full bridge (Effect 2), so that in the sic state a change in the common-mode voltage is minimized compared to the rec state 402 or prevented.
  • the polarity reversal diodes D_A and D_B are energized to a lesser extent and all polarity reversal diodes D_A, D_B, D_C, D_D of the four transmission stages 121A0, 121B0, 121C0, 121D0 are also active.
  • the transmit module 1210 can prevent different common mode levels from being present in the dom state and in the sic state. In addition, it can be prevented that effects of the same quality are produced by unequal behavior in the cascodes.
  • the transmission module 1210 can positively influence the effects on the emission values of the transmission/reception device 12, which are decisively influenced by the transmission module 1210.
  • the bus system 1 is in particular a CAN bus system or a CAN HS bus system or a CAN FD bus system or a CAN SIC bus system or a CAN XL bus system.
  • the bus system 1 can be different Be communication network in which the signals are transmitted as differential signals and serially over the bus.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Dc Digital Transmission (AREA)

Abstract

L'invention concerne un module d'émission (121 ; 1210) et un procédé d'émission de signaux différentiels dans un système de bus série (1). Le module d'émission (121 ; 1210) présente un premier étage d'émission (121A ; 121A0) pour générer des courants d'émission (I1 à In) pour un premier signal (CAN _H) qui doit être envoyé sur un bus (40) du système de bus (1), un deuxième étage d'émission (121B ; 121B0) pour générer des courants d'émission (I1 à In) pour un deuxième signal (CAN _L) qui doit être envoyé en tant que signal différentiel du premier signal (CAN _H) sur le bus (40), un troisième étage d'émission (121C ; 121C0) pour générer des courants d'émission (I1 à In) pour le premier signal (CAN _H) et un quatrième étage d'émission (121D ; 121D0) pour générer des courants d'émission (I1 à In) pour le deuxième signal (CAN _L), les quatre étages d'émission (121A à 121D ; 121A0 à 121D0) étant montés en pont complet, de telle sorte que le premier et le quatrième étage d'émission (121A, 121D ; 121A0, 121D0) sont montés en série et que le troisième et le deuxième étage d'émission (121C, 121B ; 121C0, 121B0) sont montés en série, chacun des quatre étages d'émission (121A à 121D ; 121A0 à 121D0) présentant au moins deux étages de courant (S1 à Sn) qui sont montés en parallèle, chacun desdits au moins deux étages de courant (S1 à Sn) présentant une résistance commutable (R_A1 à R_An ; R_B1 à R_Bn ; R_C1 à R_Cn ; R_D1 à R_Dn) et les résistances commutables (R_A1 à R_An ; R_B1 à R_Bn ; R_C1 à R_Cn ; R_D1 à R_Dn) d'un étage d'émission (121A à 121D ; 121A0 à 121D0) ayant des valeurs de résistance différentes.
PCT/EP2022/064764 2021-07-08 2022-05-31 Module d'émission et procédé d'émission de signaux différentiels dans un système de bus série WO2023280474A1 (fr)

Priority Applications (1)

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CN202280060782.0A CN117957818A (zh) 2021-07-08 2022-05-31 用于在串行总线系统中发送差分信号的发送模块和方法

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DE102021207199.6 2021-07-08
DE102021207199.6A DE102021207199A1 (de) 2021-07-08 2021-07-08 Sendemodul und Verfahren zum Senden von differentiellen Signalen in einem seriellen Bussystem

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DE (1) DE102021207199A1 (fr)
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3445003A1 (fr) * 2017-08-19 2019-02-20 Nxp B.V. Dispositif de réseau de zone de contrôleur (can) et procédé de fonctionnement d'un dispositif can

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3445003A1 (fr) * 2017-08-19 2019-02-20 Nxp B.V. Dispositif de réseau de zone de contrôleur (can) et procédé de fonctionnement d'un dispositif can

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CN117957818A (zh) 2024-04-30
DE102021207199A1 (de) 2023-01-12

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