WO2023280011A1 - 一种基于频率控制的高可靠性休眠电路 - Google Patents

一种基于频率控制的高可靠性休眠电路 Download PDF

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WO2023280011A1
WO2023280011A1 PCT/CN2022/101803 CN2022101803W WO2023280011A1 WO 2023280011 A1 WO2023280011 A1 WO 2023280011A1 CN 2022101803 W CN2022101803 W CN 2022101803W WO 2023280011 A1 WO2023280011 A1 WO 2023280011A1
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resistor
circuit
capacitor
optocoupler
sleep
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PCT/CN2022/101803
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English (en)
French (fr)
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刘寅虎
谷林柱
赵飒
孙晓群
刘海洋
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南京中车浦镇海泰制动设备有限公司
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Publication of WO2023280011A1 publication Critical patent/WO2023280011A1/zh

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • the invention relates to a method for realizing a dormant circuit of a high-speed EMU, belonging to a rail transit vehicle control system.
  • the power supply of the whole vehicle is maintained by the vehicle battery.
  • the vehicle requires that the braking system can quickly respond to the vehicle braking request after the master control key is put into the vehicle. circuit, turn off the non-critical peripherals of the braking system and enter the sleep mode, only retain the main control system, and detect the state of the master key. After the vehicle is put into the master key, the brake system immediately stops dormancy, and all peripherals are turned on to enter the active state.
  • the purpose of the present invention is to design a high-reliability dormancy circuit for high-speed EMUs based on frequency control, so as to ensure that any single electronic component in the circuit fails and the circuit will not enter the dormancy mode.
  • a high-reliability dormancy circuit based on frequency control including a bootstrap boost circuit and an isolated optocoupler drive circuit, characterized in that:
  • the bootstrap boost circuit includes: a triode Q1, a first bootstrap capacitor C1 and a second bootstrap capacitor C2 connected in series, a first diode D1, a second diode D2 and a third capacitor C3 connected in series in sequence,
  • the base of the transistor Q1 is connected to the input signal Sleep_PWM, the collector of the transistor Q1 is connected to the power supply VCC and the negative pole of the first bootstrap capacitor C1 through a resistor, and the emitter of the transistor Q1 is grounded;
  • the positive pole of the first diode D1 is connected to the resistor R7 Connect the power supply VCC, the anode of the second bootstrap capacitor C2 is connected to the cathode of the first diode D1 and the anode of the second diode D2, the cathode of the third capacitor C3 is grounded, and the anode of the third capacitor C3 acts as a bootstrap boost The signal output terminal of the circuit;
  • the isolated optocoupler driving circuit includes: a first isolated optocoupler IC1 and a second isolated optocoupler IC2, the positive pole of the input terminal of the first isolated optocoupler IC1 is used as the signal input of the isolated optocoupler drive circuit, the The negative pole of the input terminal is connected to the positive pole of the input terminal of the second isolated optocoupler IC2, and the negative pole of the input terminal of the second isolated optocoupler IC2 is connected to the power supply VCC; the negative pole of the output terminal of the first isolated optocoupler IC1 is connected to the positive pole of the output terminal of the second isolated optocoupler IC2; The negative pole of the output terminal of the optocoupler IC2 is connected to the isolation ground ISO_GND, and the positive pole of the output terminal of the first isolated optocoupler IC1 is used as the signal output terminal of the isolated optocoupler drive circuit, and is connected to the power control chip.
  • the dormant circuit for high-speed EMU system based on frequency control in the present invention receives the frequency signal sent by the main control circuit, controls the operation of the subsequent circuit, and turns off the peripheral power supply to enter the dormant mode.
  • the circuit uses the frequency signal as the control signal.
  • the frequency signal When the frequency signal is received, it enters the sleep mode, which improves the anti-interference ability and avoids the problem of wrong transmission level caused by the failure of the traditional level transmission such as disconnection; through the circuit design, it is guaranteed that any single electronic element in the circuit If the device fails, the circuit will not enter the sleep mode by mistake, ensuring driving safety.
  • the invention is built by simple devices such as resistors, capacitors, diodes, and isolated optocouplers, and is controlled by frequency signals.
  • the circuit is safe and reliable, and the failure of any single electronic component in the circuit will not cause the circuit to enter the sleep mode by mistake, and has a wide range of application prospects. .
  • FIG. 1 is a schematic diagram of the dormancy circuit of the present invention.
  • the embodiment of the present invention provides a high-speed EMU sleep circuit, which mainly includes a bootstrap boost circuit on the left and an isolated optocoupler drive circuit on the right.
  • the bootstrap boost circuit on the left side includes the first resistor R1 connected to the input signal Sleep_PWM, the input signal is connected to the base of the NPN transistor Q1 through the first resistor R1, and connected to the ground through the second resistor R2; the emitter of the NPN transistor Q1 It is directly connected to the ground, and the collector is connected to the power supply VCC through the third resistor R3, the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6 in series and in parallel, and the collector of the NPN transistor Q1 is also connected to the first The negative pole of the bootstrap capacitor C1; the positive pole of the first bootstrap capacitor C1 is connected to the negative pole of the second bootstrap capacitor C2, and the positive pole of the second bootstrap capacitor C2 is connected to the negative pole of the first diode D
  • the VCC power supply voltage is 5V
  • the input sleep control signal Sleep_PWM is a square wave signal with an amplitude of 5V, a frequency of 1khz, and a duty cycle of 50%
  • the output Sleep signal is the open-drain output of an isolated optocoupler.
  • the optocouplers are both on, Sleep outputs a low level to control the power chip and enter the sleep mode.
  • the power supply VCC reaches the anode of the third capacitor C3 through the seventh resistor R7, the first diode D1, and the second diode D2, about 4.4V (the diode crimping is about 0.3V), at this time, the voltage difference between the positive and negative terminals of the first isolated optocoupler IC1 and the second isolated optocoupler IC2 input terminal is less than 0V, the circuit will not conduct, and the circuit will not enter sleep mode.
  • the positive voltage of the second bootstrap capacitor C2 It also rises accordingly, and then charges the third capacitor C3 through the second diode D2. After several cycles of charging, the anode voltage of the third capacitor C3 gradually increases, and finally stabilizes at about 9.5V; through the eighth resistor R8, the first The nine resistors R9, the tenth resistor R10, and the eleventh resistor R11 drive the first isolated optocoupler IC1 and the second isolated optocoupler IC2.
  • the Sleep signal When both the first isolated optocoupler IC1 and the second isolated optocoupler IC2 are turned on, the Sleep signal
  • the first isolation optocoupler IC1 and the second isolation optocoupler IC2 are connected to the isolation ground ISO_GND, and then the power chip is controlled to enter the sleep mode.
  • the sleep circuit is required to have high reliability.
  • the vehicle cannot enter the sleep mode by mistake, that is, Sleep_PWM has not received the frequency signal sent by the main controller, and the first isolated optocoupler IC1 and the second isolated optocoupler They cannot be turned on at the same time, connect the Sleep signal to ISO_GND.
  • the frequency signal is used as the control signal in the design to improve the anti-interference ability and avoid the disconnection or transmission level error of the level signal through long-distance transmission such as the backplane; secondly, in the circuit design Capacitor bootstrapping, resistor series, parallel connection, etc. are used to ensure that any single electronic component fails and the circuit enters sleep mode by mistake. The following describes the impact of each electronic component failure on the circuit.
  • the two extreme modes of electronic component failure are short circuit or open circuit.
  • the following analysis uses these two modes to discuss the impact of electronic component failure on the circuit.
  • the isolated optocoupler IC1 and the second isolated optocoupler IC2 will not conduct, and the circuit will not enter Sleep mode; if the first resistor R1 is short-circuited, the Sleep_PWM signal will be directly applied to the base of the NPN transistor Q1, because the collector of Q1 passes through the current limiting resistor (the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6) is connected to the power supply VCC, so when Q1 is saturated and turned on, it will not cause overcurrent burnout, so when R1 is short-circuited, it will not affect the circuit function.
  • the current limiting resistor the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6
  • the second resistor R2 is a voltage divider resistor, which increases the conduction threshold of the NPN transistor Q1 and improves the anti-interference ability. If the second resistor R2 is disconnected, when the Sleep_PWM is 0.7V, the NPN transistor Q1 will be turned on, but It will not affect the circuit function; if the second resistor R2 is short-circuited, the NPN transistor Q1 will not be turned on, and the fault effect is the same as that of the first resistor R1 being disconnected.
  • the third resistor R3, the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6 If any one of the resistors is short-circuited or disconnected, the total resistance will decrease or increase after series and parallel connection, but only need to ensure that the NPN The triode Q1 is not broken down by the current when it is turned on, and only affects the charging time of the third capacitor C3, and will not affect the circuit function and enter the sleep mode by mistake.
  • NPN transistor Q1 failure If the NPN transistor Q1 is disconnected, the fault effect is the same as the disconnection of the first resistor R1; if the NPN transistor Q1 is short-circuited, it is always on, and the first bootstrap capacitor C1 and the second bootstrap capacitor C2 pass through the seventh resistor R7 and the second resistor R7. A diode D1 and NPN transistor Q1 are charged, the anode of the second diode D2 is about 4.7V, and the voltage of the anode of the third capacitor C3 is about 4.4V. The isolation optocoupler IC1 and the second isolation optocoupler IC2 will not conduct, and the circuit will not will enter sleep mode.
  • the seventh resistor R7 Failure of the seventh resistor R7: If the seventh resistor R7 is disconnected, the power supply VCC cannot charge the first bootstrap capacitor C1, the second bootstrap capacitor C2, and the third capacitor C3, and the positive voltage of the third capacitor C3 is 0V, and the optocoupler is isolated IC1 and the second isolated optocoupler IC2 will not conduct, and the circuit will not enter the sleep mode; if the seventh resistor R7 is short-circuited, the charging speed of the first bootstrap capacitor C1 and the second bootstrap capacitor C2 will be accelerated, and the circuit function will not be affected. Affected, mistakenly enter sleep mode.
  • the Fault of the first diode D1 If the first diode D1 is disconnected, the failure effect is the same as that of the seventh resistor R7; if the first diode D1 is short-circuited, when the first bootstrap capacitor C1 and the second bootstrap capacitor C2 are charged After completion, the anode of the second diode D2 maintains the VCC power supply voltage of 5V, the anode voltage of the third capacitor C3 is 4.7V, the isolation optocoupler IC1 and the second isolation optocoupler IC2 will not conduct, and the circuit will not enter the sleep mode.
  • the isolation optocoupler IC1 and the second isolation optocoupler IC2 will not conduct, and the circuit will not enter the sleep mode; Two diodes D2 are short-circuited, the anode of the second bootstrap capacitor C2 is directly connected to the anode of the third capacitor C3, the voltage will not exceed 5V, the isolation optocoupler IC1 and the second isolation optocoupler IC2 will not conduct, and the circuit will not enter sleep model.
  • the eighth resistor R8, the ninth resistor R9, the tenth resistor R10, and the eleventh resistor R11 are faulty: if any one of the resistors is short-circuited or disconnected, the total resistance will decrease or increase after being connected in series or in parallel, but it is only necessary to ensure that the When the isolation optocoupler is turned on, there is a certain current-limiting resistance so that the isolation optocoupler will not burn out, that is, it will not affect the circuit function and enter the sleep mode by mistake.
  • Isolation optocoupler IC1 and the second isolation optocoupler IC2 fault: If any one of the isolation optocouplers is short-circuited, the other isolation optocoupler can still be controlled normally, and will not enter the sleep mode by mistake if the corresponding frequency signal is not received; If any of the isolated optocouplers is short-circuited, the Sleep signal will not be connected to the isolated ground ISO_GND, and will not enter the sleep mode.
  • the circuit will not enter the sleep mode by mistake, so as to achieve the purpose of ensuring driving safety.
  • the present invention can also have other implementations. All technical solutions formed by equivalent replacement or equivalent transformation fall within the scope of protection required by the present invention.

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  • Power Engineering (AREA)
  • Inverter Devices (AREA)
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Abstract

提供了一种基于频率控制的高可靠性休眠电路,包括自举升压电路和隔离光耦驱动电路,主要由电阻、电容、二极管、隔离光耦等器件构成。采用频率信号控制,电路安全可靠,电路中任一单个电子元器件发生故障不会导致电路误进入休眠模式,具有广泛的应用前景。

Description

一种基于频率控制的高可靠性休眠电路 技术领域
本发明涉及一种高速动车组休眠电路的实现方法,属于轨道交通车辆控制系统。
背景技术
高速动车组在车辆入库断开主控钥匙后,整车供电通过车辆蓄电池维持,为了降低整车能耗,车辆要求制动系统在投入主控钥匙后能够快速响应车辆制动要求,设计休眠电路,关闭制动系统非关键外设进入休眠模式,仅保留主控制系统,检测主控钥匙状态。在车辆投入主控钥匙后,制动系统立刻停止休眠,打开所有外设进入激活状态。
车辆在正常运营过程中,若误进入休眠模式,则会影响行车安全,因此需要设计一种高可靠性的休眠电路,保证电路中任一单个电子元器件发生故障,导向安全侧,电路不会误进入休眠模式。
发明内容
本发明的目的在于设计一种基于频率控制的高可靠性高速动车组用休眠电路,保证电路中任一单个电子元器件发生故障,电路不会进入休眠模式。
本发明的技术方案:基于频率控制的高可靠性休眠电路,包括自举升压电路和隔离光耦驱动电路,其特征在于:
所述自举升压电路包括:三极管Q1,串联的第一自举电容C1和第二自举电容C2,依次串联的第一二极管D1、第二二极管D2和第三电容C3,三极管Q1的基极连接输入信号Sleep_PWM,三极管Q1的集电极通过电阻连接电源VCC和第一自举电容C1的负极,三极管Q1的发射极接地;所述第一二极管D1的正极通过电阻R7连接电源VCC,第二自举电容C2的正极连接第一二极管D1负极和第二二极管D2 正极,第三电容C3的负极接地,所述第三电容C3的正极作为自举升压电路的信号输出端;
隔离光耦驱动电路包括:第一隔离光耦IC1和第二隔离光耦IC2,所述第一隔离光耦IC1的输入端正极作为隔离光耦驱动电路的信号输入,第一隔离光耦IC1的输入端负极连接第二隔离光耦IC2输入端正极,第二隔离光耦IC2输入端负极连接电源VCC;第一隔离光耦IC1输出端负极连接第二隔离光耦IC2输出端正极;第二隔离光耦IC2输出端负极连接隔离地ISO_GND,第一隔离光耦IC1输出端正极作为隔离光耦驱动电路的信号输出端,连接电源控制芯片。
本发明基于频率控制的高速动车组制用休眠电路,接收主控电路发送的频率信号,控制后级电路工作,关闭外设电源,则进入休眠模式。电路使用频率信号作为控制信号,接收到频率信号进入休眠模式,提高抗干扰能力,避免传统电平传输发生断线等故障而误传输电平问题;通过电路设计,保证电路中任一单个电子元器件发生故障,不会使电路误进入休眠模式,保证行车安全。
本发明通过电阻、电容、二极管、隔离光耦等简单器件搭建,采用频率信号控制,电路安全可靠,电路中任一单个电子元器件发生故障不会导致电路误进入休眠模式,具有广泛的应用前景。
附图说明
图1为本发明的休眠电路原理图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述。
如图1所示,本发明如图1所示,本发明实施例提供一种高速动车组休眠电路,主要包含左侧自举升压电路和右侧隔离光耦驱动电路。左侧自举升压电路包括第一电阻R1与输入信号Sleep_PWM连接,输入信号经第一电阻R1连接 至NPN三极管Q1的基极,同时通过第二电阻R2连接到地;NPN三极管Q1的发射极直接连接到地,集电极通过第三电阻R3、第四电阻R4、第五电阻R5、第六电阻R6串、并联后接入到电源VCC,同时NPN三极管Q1的集电极还接入到第一自举电容C1的负极;第一自举电容C1正极连接到第二自举电容C2负极,第二自举电容C2正极连接第一二极管D1负极及第二二极管D2正极;第一二极管D1正极经过第七电阻R7后连接到电源VCC;第二二极管D2负极通过第三电容C3连接到地,同时连接到右侧隔离光耦驱动电路;右侧隔离光耦驱动电路输入连接第三电容C3正极,经过第八电阻R8、第九电阻R9、第十电阻R10、第十一电阻R11串、并联后接入第一隔离光耦IC1输入端正极;第一隔离光耦IC1输入端负极连接到第二隔离光耦IC2输入端正极;第二隔离光耦IC2输入端负极连接到电源VCC;第一隔离光耦IC1输出端正极输出Sleep信号,接入电源控制芯片;第一隔离光耦IC1输出端负极连接到第二隔离光耦IC2输出端正极;第二隔离光耦IC2输出端负极连接到隔离地ISO_GND。
本发明实施例中VCC电源电压为5V,输入休眠控制信号Sleep_PWM为幅值5V、频率1khz、占空比50%的方波信号,输出Sleep信号为隔离光耦的开漏输出,当两个隔离光耦均导通时Sleep输出低电平,控制电源芯片,进入休眠模式。
初始状态下,无Sleep_PWM控制信号(持续为高电平或者低电平)时,电源VCC经第七电阻R7、第一二极管D1、第二二极管D2到达第三电容C3正极,约为4.4V(二极管压接约为0.3V),此时第一隔离光耦IC1及第二隔离光耦IC2输入端正负极间电压差小于0V,不会导通,电路不会进入休眠模式。
Sleep_PWM接收到频率信号时,当Sleep_PWM为高电平时,NPN三极管Q1导通,集电极电压约为0.3V,即第一自举电容C1负极电压约为0.3V,VCC电源通过第七电阻R7、第一二极管D1给第一自举电容C1及第二自举电容C2充电;当Sleep_PWM为低电平时,NPN三极管Q1截止,第一自举电容C1负极经第三电阻R3、第四电阻R4、第五电阻R5、第六电阻R6连接至VCC,电压约为VCC电 压5V,抬高了第一自举电容C1负极电压,由于电容两端电压不能突变,第二自举电容C2正极电压也随之抬高,进而通过第二二极管D2对第三电容C3充电,经过几个周期充电,第三电容C3正极电压逐渐提高,最终稳定在9.5V左右;通过第八电阻R8、第九电阻R9、第十电阻R10、第十一电阻R11驱动第一隔离光耦IC1及第二隔离光耦IC2,当第一隔离光耦IC1及第二隔离光耦IC2都导通时,Sleep信号通过第一隔离光耦IC1及第二隔离光耦IC2接入到隔离地ISO_GND,进而控制电源芯片,进入休眠模式。
本发明实施例中要求休眠电路具有高可靠性,在车辆正常运营时,不能误进入休眠模式,即Sleep_PWM未接收到主控制器发送的频率信号,第一隔离光耦IC1及第二隔离光耦不能同时导通,将Sleep信号接入ISO_GND。为了达到不能误进入休眠模式的目的,在设计上采用频率信号做为控制信号,提高抗干扰能力,避免电平信号经过背板等长距离传输发生断线或者传输电平错误;其次在电路设计上采用电容自举、电阻串、并联等方式,保证任一单个电子元器件故障,电路误进入休眠模式,下面介绍各电子元器件故障时对电路产生的影响。
电子元器件故障的两种极限模式为短路或者断路,下述分析以这两种模式讨论电子元器件故障情况对电路影响。
第一电阻R1故障:若第一电阻R1断路,则NPN三极管Q1不会导通,第一自举电容C1及第二自举电容C2上无电流流过,电源通过第七电阻R7、第一二级管D1及第二二极管D2对第三电容C3充电,第三电容C3正极电压保持在4.4V左右,隔离光耦IC1及第二隔离光耦IC2不会导通,电路不会进入休眠模式;若第一电阻R1短路,Sleep_PWM信号会直接施加到NPN三极管Q1基极,由于Q1集电极是经过限流电阻(第三电阻R3、第四电阻R4、第五电阻R5、第六电阻R6)接入电源VCC,因此当Q1饱和导通时,不会造成过流烧毁,故当R1短路,对电路功能不会产生影响。
第二电阻R2故障:第二电阻R2为分压电阻,提高NPN三极管Q1导通门槛,提高抗干扰能力,若第二电阻R2断路,当Sleep_PWM为0.7V时NPN三极管Q1 就会导通,但对电路功能不会产生影响;若第二电阻R2短路,则NPN三极管Q1不会导通,故障影响同第一电阻R1断路。
第三电阻R3、第四电阻R4、第五电阻R5、第六电阻R6故障:若其中任一电阻发生短路或者断路,经串、并联后总电阻会降低或升高,但只需保证在NPN三极管Q1在导通时不被电流击穿,仅影响第三电容C3的充电时间,不会对电路功能造成影响,误进入休眠模式。
NPN三极管Q1故障:若NPN三极管Q1断路,故障影响同第一电阻R1断路;若NPN三极管Q1短路,一直导通,第一自举电容C1及第二自举电容C2经过第七电阻R7、第一二极管D1及NPN三极管Q1充电,第二二极管D2正极约4.7V,第三电容C3正极电压约4.4V,隔离光耦IC1及第二隔离光耦IC2不会导通,电路不会进入休眠模式。
第一自举电容C1及第二自举电容C2故障:若其中任一电容短路,则串联回路中电容容值增大,但仍能够起到隔离直流信号作用,仅影响第三电容C3的充电时间,不会对电路功能造成影响,误进入休眠模式;若其中任一电容断路,第三电容C3正极电压约4.4V,隔离光耦IC1及第二隔离光耦IC2不会导通,电路不会进入休眠模式。
第七电阻R7故障:若第七电阻R7断路,电源VCC不能对第一自举电容C1、第二自举电容C2及第三电容C3进行充电,第三电容C3正极电压为0V,隔离光耦IC1及第二隔离光耦IC2不会导通,电路不会进入休眠模式;若第七电阻R7短路,会加快第一自举电容C1、第二自举电容C2充电速度,不会对电路功能造成影响,误进入休眠模式。
第一二极管D1故障:若第一二极管D1断路,故障影响同第七电阻R7断路;若第一二极管D1短路,当第一自举电容C1、第二自举电容C2充电完成后,第二二极管D2正极维持VCC电源电压5V,第三电容C3正极电压为4.7V,隔离光耦IC1及第二隔离光耦IC2不会导通,电路不会进入休眠模式。
第二二极管D2故障:若第二二极管D2断路,第三电容C3正极为0V,隔离光耦IC1及第二隔离光耦IC2不会导通,电路不会进入休眠模式;若第二二极管D2短路,第二自举电容C2正极与第三电容C3正极直连,电压不会超过5V,隔离光耦IC1及第二隔离光耦IC2不会导通,电路不会进入休眠模式。
第八电阻R8、第九电阻R9、第十电阻R10、第十一电阻R11故障:若其中任一电阻发生短路或者断路,经串、并联后总电阻会降低或升高,但只需保证在隔离光耦导通时存在一定限流电阻不至于隔离光耦烧毁,即不会对电路功能造成影响,误进入休眠模式。
隔离光耦IC1及第二隔离光耦IC2故障:若其中任一隔离光耦短路,另一隔离光耦仍可正常控制,在未接收到相应频率信号情况下,不会误进入休眠模式;若其中任一隔离光耦短路,则Sleep信号不会连接到隔离地ISO_GND上,不会进入休眠模式。
经以上器件逐一说明,在任一单个电子元器件故障情况下,电路不会误进入休眠模式,从而达到保证行车安全的目的。
除上述实施例外,本发明还可以有其他实施方式。凡采用等同替换或等效变换形成的技术方案,均落在本发明要求的保护范围。

Claims (9)

  1. 一种基于频率控制的高可靠性休眠电路,包括自举升压电路和隔离光耦驱动电路,其特征在于:
    所述自举升压电路包括:三极管Q1,串联的第一自举电容C1和第二自举电容C2,依次串联的第一二极管D1、第二二极管D2和第三电容C3,三极管Q1的基极连接输入信号Sleep_PWM,三极管Q1的集电极通过电阻连接电源VCC和第一自举电容C1的负极,三极管Q1的发射极接地;所述第一二极管D1的正极通过电阻R7连接电源VCC,第二自举电容C2的正极连接第一二极管D1负极和第二二极管D2正极,第三电容C3的负极接地,所述第三电容C3的正极作为自举升压电路的信号输出端;
    隔离光耦驱动电路包括:第一隔离光耦IC1和第二隔离光耦IC2,所述第一隔离光耦IC1的输入端正极作为隔离光耦驱动电路的信号输入,第一隔离光耦IC1的输入端负极连接第二隔离光耦IC2输入端正极,第二隔离光耦IC2输入端负极连接电源VCC;第一隔离光耦IC1输出端负极连接第二隔离光耦IC2输出端正极;第二隔离光耦IC2输出端负极连接隔离地ISO_GND,第一隔离光耦IC1输出端正极作为隔离光耦驱动电路的信号输出端,连接电源控制芯片;
    第一隔离光耦IC1的输入端正极经电阻连接第三电容C3的正极。
  2. 根据权利要求1所述的基于频率控制的高可靠性休眠电路,其特征在于:所述输入信号Sleep_PWM经第一电阻R1连接三极管Q1的基极,三极管Q1的基极经第二电阻R2接地。
  3. 根据权利要求1所述的基于频率控制的高可靠性休眠电路,其特征在于:所述三极管Q1的集电极经串联的第三电阻R3和第四电阻R4连接电源VCC。
  4. 根据权利要求3所述的基于频率控制的高可靠性休眠电路,其特征在于:所述三极管Q1的集电极经串联的第五电阻R5和第六电阻R6连接电源VCC。
  5. 根据权利要求1所述的基于频率控制的高可靠性休眠电路,其特征在于:所述第一隔离光耦IC1的输入端正极经串联的第八电阻R8和第九电阻R9连接第三电容C3的正极。
  6. 根据权利要求5所述的基于频率控制的高可靠性休眠电路,其特征在于:所述第一隔离光耦IC1的输入端正极经串联的第十电阻R10和第十一电阻R11连接第三电容C3的正极。
  7. 根据权利要求1所述的基于频率控制的高可靠性休眠电路,其特征在于:所述第一自举电容C1正极连接到第二自举电容C2负极。
  8. 根据权利要求1所述的基于频率控制的高可靠性休眠电路,其特征在于:第一隔离光耦IC1输出端正极输出休眠信号Sleep给电源控制芯片。
  9. 根据权利要求1所述的基于频率控制的高可靠性休眠电路,其特征在于:所述输入信号Sleep_PWM为PWM频率信号。
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