WO2023272546A1 - 显示模组及其驱动方法、显示装置 - Google Patents

显示模组及其驱动方法、显示装置 Download PDF

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Publication number
WO2023272546A1
WO2023272546A1 PCT/CN2021/103390 CN2021103390W WO2023272546A1 WO 2023272546 A1 WO2023272546 A1 WO 2023272546A1 CN 2021103390 W CN2021103390 W CN 2021103390W WO 2023272546 A1 WO2023272546 A1 WO 2023272546A1
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WIPO (PCT)
Prior art keywords
base substrate
display module
light
layer
pixel
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PCT/CN2021/103390
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English (en)
French (fr)
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WO2023272546A9 (zh
Inventor
杨松
梁蓬霞
石戈
刘玉杰
方正
孙艳六
韩佳慧
吴谦
李鸿鹏
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202180001728.4A priority Critical patent/CN116018551A/zh
Priority to US17/785,960 priority patent/US20240169867A1/en
Priority to PCT/CN2021/103390 priority patent/WO2023272546A1/zh
Publication of WO2023272546A1 publication Critical patent/WO2023272546A1/zh
Publication of WO2023272546A9 publication Critical patent/WO2023272546A9/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/001—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background
    • G09G3/002—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background to project the image of a two-dimensional display, such as an array of light emitting or modulating elements or a CRT
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/1336—Illuminating devices
    • G02F1/133616—Front illuminating devices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133526—Lenses, e.g. microlenses or Fresnel lenses
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133553—Reflecting elements
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133553—Reflecting elements
    • G02F1/133555—Transflectors
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406—Control of illumination source
    • G09G3/3413—Details of control of colour illumination sources
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406—Control of illumination source
    • G09G3/342—Control of illumination source using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines
    • G09G3/3426—Control of illumination source using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines the different display panel areas being distributed in two dimensions, e.g. matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G09G3/3629—Control of matrices with row and column drivers using a passive matrix using liquid crystals having memory effects, e.g. ferroelectric liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/13363—Birefringent elements, e.g. for optical compensation
    • G02F1/133638—Waveplates, i.e. plates with a retardation value of lambda/n
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display module, a driving method thereof, and a display device.
  • a light field display device is a display device that uses light field display technology to generate stereoscopic images.
  • a transmissive display module generally includes a base substrate with an opening area and a non-opening area, a pixel circuit located in the non-opening area, a pixel electrode located in the opening area, and a light source and a liquid crystal layer located on one side of the base substrate.
  • the pixel electrode can control the liquid crystal molecules in the liquid crystal layer to deflect under the drive of the pixel circuit. After the liquid crystal molecules are deflected, the light emitted by the light source can be irradiated through the liquid crystal layer through the opening area, thereby realizing display.
  • the resolution is relatively low.
  • the present application provides a display module, a driving method thereof, and a display device, and the technical solution is as follows:
  • a display module includes:
  • a plurality of pixel circuits arranged in an array a plurality of pixel electrodes arranged in an array, a liquid crystal layer, and a light source located on one side of the base substrate and arranged in sequence along a direction away from the base substrate;
  • the pixel circuit at least includes a driving transistor, and the driving transistor has a gate, a first electrode and a second electrode; the pixel electrode includes at least a reflective electrode;
  • the plurality of pixel electrodes are electrically connected to the plurality of pixel circuits in one-to-one correspondence, and the orthographic projection of at least one of the pixel circuits on the substrate is located on the corresponding pixel electrode on the substrate.
  • the pixel electrode is used to reflect the light transmitted by the liquid crystal layer to the liquid crystal layer, so that the light is emitted from the side of the liquid crystal layer away from the base substrate.
  • the gate of the driving transistor is electrically connected to the gate line
  • the first pole of the driving transistor is electrically connected to the data line
  • the second pole of the driving transistor is electrically connected to the pixel electrode;
  • the electrodes cover the data lines and the gate lines.
  • the drive transistors included in the plurality of pixel circuits located in the same column are electrically connected to two data lines, and the pixel electrodes cover the two data lines.
  • the pixel electrode further includes: a transparent electrode located on a side of the reflective electrode away from the substrate; the display module further includes:
  • the side of the raised layer away from the base substrate has a plurality of protrusions; the reflective electrode and the pixel circuit pass through the first via hole passing through the raised layer and the first flat layer and the reflective electrode is electrically connected to the transparent electrode through a second via hole penetrating through the second planar layer.
  • the first via hole and the second via hole are spaced apart, and the orthographic projection of the first via hole on the base substrate is the same as that of the second via hole on the base substrate
  • the orthographic projections on do not overlap.
  • the protruding direction of the protrusion is a direction away from the base substrate, the section of the protrusion perpendicular to the base substrate is arc-shaped, and a plurality of the protrusions are arranged on the base substrate.
  • the orthographic projection on the base substrate overlaps with an orthographic projection of the pixel circuit on the base substrate.
  • the slope angle of the protrusion is greater than or equal to 30 degrees and less than or equal to 60 degrees;
  • the ratio of the interval between every two adjacent protrusions to the diameter of the orthographic projection of each of the two adjacent protrusions on the base substrate is less than or equal to 1 .
  • the plurality of protrusions are arranged in an array
  • the plurality of protrusions include a plurality of protrusion groups arranged in a first direction, each of the protrusion groups includes at least two protrusions arranged in a second direction, and the second direction
  • the included angle with the first direction is an acute angle.
  • the material of the raised layer includes: resin; the material of the reflective electrode includes metallic silver; the material of the transparent electrode includes: indium tin oxide;
  • the morphology of the surface of the reflective electrode away from the base substrate is the same as that of the surface of the raised layer away from the base substrate;
  • the reflective electrode includes: a plurality of reflective electrode blocks insulated, and each reflective electrode block corresponds to cover one of the pixel circuits.
  • the liquid crystal layer includes: a first alignment layer, the liquid crystal molecules, and a second alignment layer arranged in sequence along a direction away from the base substrate;
  • the thickness of the support layer is greater than or equal to 1 micron and less than or equal to 2 microns.
  • the liquid crystal layer further includes: a common electrode, a third flat layer, a second A black matrix layer, packaging cover plate and composite optical film;
  • the orthographic projection of the first black matrix layer on the base substrate covers the orthographic projection of the supporting layer on the base substrate.
  • the composite optical film includes: a linear polarizer, a quarter wave plate and a half wave plate;
  • the light source is a direct-type light source;
  • the direct-type light source includes: a filling layer arranged in sequence along a direction away from the base substrate, a plurality of light-emitting units and a plurality of second black matrix layers;
  • the orthographic projection of one second black matrix layer on the base substrate overlaps with the orthographic projection of one light emitting unit on the base substrate.
  • each pixel electrode and a common electrode included in the liquid crystal layer form a pixel
  • Each of the light-emitting units includes a plurality of light-emitting diodes, and the orthographic projection of one light-emitting diode on the substrate overlaps with the orthographic projections of multiple pixels on the substrate.
  • the orthographic projection of one light emitting diode on the base substrate overlaps with the orthographic projections of 5 rows and 5 columns of the pixels on the base substrate.
  • each of the light emitting units includes a red light emitting diode, a blue light emitting diode and a green light emitting diode;
  • the red light-emitting diodes, the blue light-emitting diodes and the green light-emitting diodes in each light-emitting unit are arranged along a row direction;
  • the red light-emitting diodes, the blue light-emitting diodes and the green light-emitting diodes in each of the light-emitting units are arranged in a triangle;
  • each of the light-emitting units includes two green light-emitting diodes, and the red light-emitting diodes, the blue light-emitting diodes, and the two green light-emitting diodes in each light-emitting unit are arranged in a rectangular shape .
  • the display module further includes: a plurality of lenses located on the side of the light source away from the base substrate and arranged in an array;
  • the orthographic projection of one lens on the base substrate overlaps with the orthographic projections of a plurality of pixels in the display module on the base substrate, and the lens is used to transmit the light.
  • the reflective electrodes are located in the focal planes of the plurality of lenses arranged in the array.
  • the focal length of the lens is greater than or equal to 2 millimeters and less than or equal to 10 millimeters;
  • the aperture of the lens is greater than or equal to 0.5 mm and less than or equal to 1 mm.
  • the display module further includes: a light diffusion layer located between the liquid crystal layer and the light source.
  • a method for driving a display module wherein the display module has a plurality of display subregions arranged in sequence along the column direction, and each of the display subregions includes multiple rows of pixel circuits; the method include:
  • a driving signal is provided row by row to multiple rows of pixel circuits in the target display subregion, and the driving signal is used for the pixel circuit to apply a driving voltage to the pixel electrode.
  • each of the display partitions includes the same number of rows of pixel circuits, and the phases of supplying driving signals to the pixel circuits in each of the target display partitions overlap.
  • a display device is provided, wherein the display device is a near-eye light field display device, and the near-eye light field display device includes the display module as described in the above aspect.
  • FIG. 1 is a schematic structural diagram of a display module provided by an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of a partial structure of a display module provided by an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a partial structure of another display module provided by an embodiment of the present disclosure.
  • FIG. 4 is an equivalent diagram of a raised layer provided by an embodiment of the present disclosure.
  • Fig. 5 is a schematic diagram of an arrangement of a plurality of protrusions provided by an embodiment of the present disclosure
  • Fig. 6 is a schematic diagram of another arrangement of a plurality of protrusions provided by an embodiment of the present disclosure.
  • Fig. 7 is a partially equivalent schematic diagram of a display module provided by an embodiment of the present disclosure.
  • FIG. 8 is an equivalent schematic diagram of a pixel circuit and a pixel provided by an embodiment of the present disclosure.
  • Fig. 9 is a partially enlarged schematic view of the structure shown in Fig. 8.
  • FIG. 10 is a schematic structural diagram of a liquid crystal layer provided by an embodiment of the present disclosure.
  • FIG. 11 is a schematic structural diagram of another liquid crystal layer provided by an embodiment of the present disclosure.
  • Fig. 12 is a schematic structural diagram of a light source provided by an embodiment of the present disclosure.
  • Fig. 13 is a schematic diagram of an arrangement of light emitting diodes provided by an embodiment of the present disclosure.
  • Fig. 14 is a schematic diagram of another arrangement of light emitting diodes provided by an embodiment of the present disclosure.
  • Fig. 15 is a schematic diagram of another arrangement of light emitting diodes provided by an embodiment of the present disclosure.
  • Fig. 16 is a schematic diagram of another arrangement of light emitting diodes provided by an embodiment of the present disclosure.
  • FIG. 17 is a sequence diagram of display module refreshing provided by an embodiment of the present disclosure.
  • FIG. 18 is a schematic diagram of the overall structure of a display module provided by an embodiment of the present disclosure.
  • Fig. 19 is a schematic diagram of the overall structure of another display module provided by an embodiment of the present disclosure.
  • FIG. 20 is a schematic diagram of the overall structure of another display module provided by an embodiment of the present disclosure.
  • Fig. 21 is an equivalent schematic diagram of a light emitted through a lens provided by an embodiment of the present disclosure.
  • Fig. 22 is an equivalent schematic diagram of an image point constructed by a lens based on light rays provided by an embodiment of the present disclosure
  • FIG. 23 is a flowchart of a driving method of a display module provided by an embodiment of the present disclosure.
  • Fig. 24 is a schematic structural diagram of a display module provided by an embodiment of the present disclosure.
  • FIG. 25 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure.
  • Words such as “comprises” or “comprising” and similar terms mean that the elements or items listed before “comprising” or “comprising” include the elements or items listed after “comprising” or “comprising” and their equivalents, and do not exclude other component or object.
  • Words such as “connected” or “connected” are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. “Up”, “Down”, “Left”, “Right” and so on are only used to indicate relative positional relationship. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.
  • a and/or B may mean that A exists alone, A and B exist simultaneously, and B exists alone.
  • the character "/” generally indicates that the contextual objects are an "or" relationship.
  • the base substrate of the transmissive display module generally has a light-transmitting opening area and an opaque non-opening area.
  • the pixel circuit is located in the non-opening area, and the pixels electrically connected to the pixel circuit are located in the opening area.
  • the light can be emitted through the opening area.
  • the resolution of the transmissive display module is generally low due to the need to separately open the non-aperture area to set the pixel circuit.
  • the resolution can be represented by the number of pixels per inch (pixel per inch, PPI).
  • PPI pixel per inch
  • the display module with low PPI is prone to screen door effect when displaying images.
  • the screen door effect refers to the thin line dancing caused by real-time rendering and the separation flickering of high-contrast edges when the number of pixels is insufficient.
  • the display effect is poor.
  • the aperture ratio of the transmissive display module is relatively low.
  • the light utilization rate (that is, the light efficiency) of the transmissive display module is low, generally only reaching 33%, and the display effect is poor.
  • An embodiment of the present disclosure provides a display module that can be applied to a near-eye light field display device.
  • the display module not only can be designed with a higher resolution, but also has a higher light utilization rate, and the overall display effect is better.
  • FIG. 1 is a schematic structural diagram of a display module provided by an embodiment of the present disclosure.
  • the display module includes: a base substrate 01 , and a plurality of pixel circuits 02 arranged in an array arranged in sequence along a direction X1 away from the base substrate 01 located on one side of the base substrate 01 , A plurality of pixel electrodes 03 , a liquid crystal layer 04 and a light source 05 arranged in an array.
  • FIG. 1 only schematically shows one pixel circuit 02 and one pixel electrode 03 .
  • FIG. 2 is a schematic structural diagram of another display module provided by an embodiment of the present disclosure.
  • the pixel circuit 02 includes at least a driving transistor T1, and the driving transistor T1 may have a gate, a first pole and a second pole.
  • the first pole may be called a source, and correspondingly, the second pole may be called a drain.
  • the first pole may be called a drain, and correspondingly, the second pole may be called a source.
  • the pixel electrode 03 includes at least a reflective electrode 031 .
  • a plurality of pixel electrodes 03 can be electrically connected to a plurality of pixel circuits 02 in one-to-one correspondence, that is, each pixel electrode 03 can be electrically connected to one pixel circuit 02 , and different pixel electrodes 03 are connected to different pixel circuits 02 .
  • the orthographic projection of at least one pixel circuit 02 on the base substrate 01 may be located within the orthographic projection of the corresponding pixel electrode 03 on the base substrate 01 . That is, the installation regions of the pixel electrode 03 and the pixel circuit 02 may overlap. In this way, compared with the transmissive display module that needs to separately reserve the non-opening area for setting the pixel circuit 02 , the resolution of the display module in the embodiment of the present disclosure can be higher. Furthermore, it is possible to effectively avoid the phenomenon of the screen window effect when displaying images, and ensure a better display effect.
  • the light source 05 may be used to emit light to the liquid crystal layer 04 .
  • the pixel electrode 03 can be used to reflect the light transmitted by the liquid crystal layer 04 to the liquid crystal layer 04 , so that the light is emitted from the side of the liquid crystal layer 04 away from the base substrate 01 . That is, the light emitted by the light source 05 can be irradiated on the pixel electrode 03 through the liquid crystal layer 04 first, then reflected by the pixel electrode 03 and then pass through the liquid crystal layer 04 again, and then transmitted from the side away from the base substrate 01, so as to realize effective display. In other words, the side away from the base substrate 01 is the display side. Based on this, the light source 05 may also be called a front light unit (FLU).
  • FLU front light unit
  • the area where the pixel electrode 03 is located may be an opening area that can be used for display, which effectively improves the light utilization rate and further ensures a better display effect.
  • the embodiments of the present disclosure provide a display module, the display module includes at least a pixel electrode having a reflective electrode, and the pixel electrode can reflect the light transmitted by the liquid crystal layer to the liquid crystal layer under the driving of the pixel circuit. , so that the light is emitted through the liquid crystal layer to ensure the normal display of the display module.
  • the pixel electrode covers the pixel circuit, that is, the area where the pixel electrode is located and the area where the pixel circuit is located can overlap. In this way, compared with the transmissive display module, there is no need to reserve a separate area for the pixel circuit, so the display module can be effectively improved. resolution.
  • the pixel electrode 03 and the reflective electrode 031 may be multiplexed. That is, the reflective electrode 031 can directly serve as the pixel electrode 03 .
  • the pixel electrode 03 can directly control the deflection of the liquid crystal molecules in the liquid crystal layer 04 driven by the pixel circuit 02 , so that the light emitted by the light source 05 can be transmitted to the pixel electrode 03 through the liquid crystal layer 04 .
  • the pixel electrode 03 can further reflect the light transmitted from the liquid crystal layer 04 to the liquid crystal layer 04 , so that the light is emitted from the side of the liquid crystal layer 04 away from the base substrate 01 . That is, the pixel electrode 03 can not only reflect the light emitted by the light source 05 , but also directly drive the liquid crystal molecules to deflect to realize the modulation of the light.
  • the liquid crystal layer 04 may further include a common electrode.
  • the pixel circuit 02 can transmit a driving voltage to the pixel electrode 03 , there is a certain voltage difference between the driving voltage and the voltage applied to the common electrode, and the liquid crystal molecules can be deflected under the action of the voltage difference.
  • the pixel electrode 03 can be electrically connected to the corresponding driving transistor T1 in the pixel circuit 02 through the via hole K0 .
  • the second pole of the driving transistor T1 can overlap with the pixel electrode 03 through the via hole K0.
  • the display module may further include: a first flat layer 06 and a raised layer 07 located between the pixel electrode 03 and the pixel circuit 02 .
  • the first planar layer 06 can be used to planarize the hierarchical structure included in the pixel circuit 02 to avoid the formation of gaps.
  • the side of the protrusion layer 07 away from the base substrate 01 that is, the upper surface of the protrusion layer 07 may have a plurality of protrusions.
  • the raised layer 07 can be used to pattern the side of the pixel electrode 03 away from the base substrate 01 . That is, the protrusion layer 07 can be used as a configuration layer of the pixel electrode 03 , so that the topography of the surface of the pixel electrode 03 away from the base substrate 01 is consistent with the topography of the surface of the protrusion layer 07 away from the base substrate 01 .
  • the pixel electrode 03 also has a plurality of protrusions.
  • the raised layer 07 may be a continuous whole layer
  • the pixel electrode 03 may include a plurality of reflective electrode blocks insulated from each other, and each reflective electrode block may cover one pixel circuit 02 correspondingly.
  • the protrusion direction may be a direction X1 away from the base substrate 01 .
  • the section of the protrusion perpendicular to the base substrate 01 may be arc-shaped as shown in FIG. 3 .
  • the orthographic projection of each protrusion on the base substrate 01 may be circular.
  • each protrusion may include a part of a spherical surface, for example, may include a hemispherical surface.
  • each protrusion may also be in other shapes, such as 1/3 of a complete sphere.
  • the slope angle ⁇ of the protrusion may be greater than or equal to 30 degrees and less than or equal to 60 degrees.
  • the ratio (d1/R) of the distance d1 between every two adjacent protrusions to the diameter R of the orthographic projection of each protrusion on the base substrate 01 among the two adjacent protrusions may be less than or equal to 1.
  • the interval d1 between two adjacent protrusions may be greater than or equal to 0.5 micrometer ( ⁇ m), and may be less than or equal to 20 ⁇ m.
  • the diameter of the orthographic projection of each protrusion on the base substrate 01 may also be greater than or equal to 0.5 ⁇ m, and may be less than or equal to 20 ⁇ m.
  • the orthographic projection of the plurality of protrusions on the base substrate 01 may overlap with the orthographic projection of one pixel circuit 02 on the base substrate 01 .
  • the orthographic projection of a pixel circuit 02 on the base substrate 01 can be compared with 5*5 bumps to 10*10 bumps.
  • the orthographic projections of 02 on the base substrate 01 are superimposed.
  • 5*5 represents a bump with 5 rows and 5 columns
  • 10*10 represents a bump with 10 rows and 10 columns.
  • the reflection angle of the light reflected by the pixel electrode 03 can be increased, so that the reflection angle of the light can be reliably located between 0 and 90 degrees.
  • the light mixing effect can be realized to ensure a better display effect.
  • the uniform reflection effect can be achieved by adjusting the slope angle ⁇ of each protrusion and the distance d1 between two adjacent protrusions, further ensuring a better display effect.
  • the display effect can also be improved by adjusting the arrangement of the plurality of protrusions.
  • the arrangement manner can be set through a mask (mask) process.
  • FIG. 5 shows a top view of the structure shown in FIG. 3 .
  • the plurality of protrusions of the protrusion layer 07 can be arranged in an array, that is, the orthographic projections of the plurality of protrusions on the base substrate 01 can be regularly arranged in rows and columns.
  • FIG. 6 shows another top view of the structure shown in FIG. 2 .
  • the plurality of protrusions of the protrusion layer 07 may include a plurality of protrusion groups 071 arranged in the first direction Y1, and each protrusion group 071 may include protrusions arranged in the second direction Y2.
  • the included angle between the second direction Y2 and the first direction Y1 may be an acute angle, that is, the second direction Y2 is not perpendicular to and not parallel to the first direction Y1.
  • This arrangement can also be referred to as a staggered arrangement. Based on this, for the arrangement shown in FIG. 5 , if it is defined by the first direction Y1 and the second direction Y2 , then the first direction Y1 and the second direction Y2 in FIG. 5 are perpendicular to each other.
  • the pixel electrode 03 may also include a transparent electrode 032 in addition to the pixel electrode 031 .
  • the display module may further include: a second flat layer 08 .
  • the reflective electrode 031 may be located on the side of the raised layer 07 away from the base substrate 01 , and the second flat layer 08 and the transparent electrode 032 are sequentially arranged on the side of the reflective electrode 031 away from the base substrate 01 . That is, the protruding layer 07 actually configures the reflective electrode 031 in the pixel electrode 03 .
  • the second flat layer 08 may be located between the reflective electrode 031 and the transparent electrode 032, and the second flat layer 08 may be used to planarize the protrusion on the upper surface of the reflective electrode 031 away from the base substrate 01, so that It is conducive to the regular arrangement of liquid crystal molecules.
  • the planarization effect of the second planarization layer 08 on the reflective electrode 031 may refer to the equivalent diagram shown in FIG. 7 .
  • the shortest distance d01 between the side of the transparent electrode 032 away from the base substrate 01 and the upper surface of the raised layer 07 may be between 2 ⁇ m and 2.5 ⁇ m
  • the side of the transparent electrode 032 away from the base substrate 01 and the raised surface The longest distance d02 between the upper surfaces of the layer 07 may be between 3 ⁇ m and 3.5 ⁇ m
  • the distance d03 between the upper surface and the lower surface of the raised layer 07 may be between 2.5 ⁇ m and 3 ⁇ m
  • the diameter of one protrusion r1 may lie between 5 ⁇ m and 5.5 ⁇ m.
  • the pixel electrode 03 includes a reflective electrode 031 and a transparent electrode 032
  • the reflective electrode 031 and the pixel circuit 02 can pass through the first via hole K1 penetrating the raised layer 07 and the first flat layer 06.
  • the reflective electrode 031 and the transparent electrode 032 can be electrically connected through the second via hole K2 penetrating through the second planar layer 08 . That is, the pixel electrode 03 including the reflective electrode 031 and the transparent electrode 032 can be electrically connected to the pixel circuit 02 through the reflective electrode 031 .
  • the pixel circuit 02 actually loads the driving voltage directly to the reflective electrode 031, and then transmits the driving voltage from the reflective electrode 031 to the transparent electrode 032.
  • the deflection of the liquid crystal molecules in the liquid crystal layer 04 is controlled by the transparent electrode 032 based on the driving voltage.
  • FIG. 3 it shows that the orthographic projection of the transparent electrode 032 on the base substrate 01 completely coincides with the orthographic projection of the reflective electrode 031 on the base substrate 01 .
  • the orthographic projection of the first via hole K1 on the base substrate 01 and the orthographic projection of the second via hole K2 on the base substrate 01 may both be located in the overlapping area described in the above embodiments. . Moreover, the first via hole K1 and the second via hole K2 may be arranged at intervals, and the orthographic projection of the first via hole K1 on the base substrate 01 does not overlap with the orthographic projection of the second via hole K2 on the base substrate 01 .
  • the reflective electrode 031 may be made of a reflective and opaque material.
  • the material of the reflective electrode 031 may be metallic silver (Ag), and the metallic silver may be plated on the surface of the protruding layer 07 away from the base substrate 01 to form the reflective electrode 031 . Based on the plating process, it can be further confirmed that the morphology of the surface of the reflective electrode 031 formed in the embodiment of the present disclosure away from the base substrate 01 is the same as that of the surface of the protrusion layer 07 away from the base substrate 01 .
  • the transparent electrode 032 can be made of a transparent conductive material, for example, the transparent conductive material can be indium tin oxide (ITO).
  • the material of the protrusion layer 07 may include resin.
  • the buffer layer, the active layer, the first insulating layer, the second insulating layer, the gate and the dielectric layer can be arranged in sequence along the direction X1 away from the base substrate 01, and the first pole, the second pole and the first pole of the drive transistor T1
  • the gates can be on the same layer.
  • the first pole and the second pole may be electrically connected to the active layer through via holes penetrating the first insulating layer and the second insulating layer.
  • the buffer layer can be used to planarize the base substrate 01 , so as to facilitate the setting of various film layers included in the pixel circuit 02 .
  • the first insulating layer and the second insulating layer can be used to avoid signal interference between adjacent metal layers.
  • a dielectric layer may be used to protect the pixel circuit 02 .
  • the pixel circuit 02 with the structure shown in FIG. 2 and FIG. 3 can be called a pixel circuit with a top gate structure.
  • the pixel circuit can also be a bottom gate structure.
  • FIG. 8 shows an equivalent diagram of a base substrate 01 including a plurality of pixel circuits 02 .
  • FIG. 9 shows a partially enlarged view of the area where a pixel circuit is located in the structure shown in FIG. 8 .
  • each driving transistor T1 can be electrically connected to the gate line GATE
  • the source of the driving transistor T1 can be electrically connected to the data line DATA
  • the drain of the driving transistor T1 can be electrically connected to the data line DATA. It is electrically connected with the pixel electrode 03.
  • the drain of the driving transistor T1 is actually electrically connected to the reflective electrode 031 .
  • FIG. 8 and FIG. 9 also show the common electrode Vcom.
  • the orthographic projection of the reflective electrode 031 on the base substrate 01 and the orthographic projection of the transparent electrode 032 on the base substrate 01 may overlap.
  • the orthographic projection of the reflective electrode 031 on the base substrate 01 and the orthographic projection of the transparent electrode 032 on the base substrate 01 are completely coincident (that is, the same size), and pass through the second via hole K2 overlap each other.
  • the reflective electrode 031 is also electrically connected to the drain of the driving transistor T1 through the first via hole K1 .
  • the orthographic projection of the common electrode Vcom forming the pixel on the base substrate 01 is the same as the orthographic projection of the pixel electrode 03 forming the pixel on the base substrate 01. Projections can overlap, and the overlapping parts are used to form pixels.
  • FIG. 9 it shows that the orthographic projection of each pixel electrode 03 on the base substrate 01 covers the corresponding orthographic projection of the common electrode Vcom on the base substrate 01 .
  • Each pixel electrode 03 is rectangular, and the common electrode Vcom covered by it is T-shaped.
  • the common electrode Vcom may also be in other shapes, such as a rectangle.
  • the common electrode Vcom forming each pixel may be an integral structure.
  • each driving transistor T1 when the gate line GATE provides a gate driving signal of effective potential to its gate, its source and drain can be turned on, that is, the driving transistor T1 can be turned on.
  • the data signal written into the source by the data line DATA can be further transmitted to the drain, and since the drain is electrically connected to the pixel electrode 03 , the data signal can be written into the pixel electrode 03 .
  • the data signal provided by the data line DATA can be transmitted to the pixel electrode 03 through the turned-on driving transistor T1.
  • the data signal is the driving voltage described in the above embodiments.
  • the orthographic projection of at least one pixel circuit 02 on the base substrate 01 is located within the orthographic projection of the corresponding pixel electrode 03 on the base substrate 01, that is, the pixel electrode 03 covering the pixel circuit 02 may refer to: the pixel electrode 03 covers at least two signal lines electrically connected to the pixel circuit 02 to which it is electrically connected. In other words, at least two signal lines electrically connected to the pixel circuit 02 can be hidden under the pixel electrode 03 . In this way, the traditional transmissive display module can avoid the disadvantage of avoiding wiring in the opening area, and further increase the opening ratio. After testing, the aperture ratio of the display module recorded in the embodiments of the present disclosure can reach 85-95%.
  • the pixel electrode 03 covering at least two signal lines electrically connected to the pixel circuit 02 may refer to: the orthographic projection of the pixel electrode 03 on the base substrate 01 and the at least two signal lines on the base substrate 01 Orthographic projections overlap.
  • the overlapping may refer to overlapping, or partial overlapping. For example, referring to FIG. 9 , part of the signal lines located between every two adjacent pixel electrodes 03 may not be covered by the pixel electrodes 03 .
  • the at least two signal lines may include at least one gate line GATE and at least one data line DATA.
  • each data line DATA may extend along the column direction of the pixel circuit 02
  • each gate line GATE may extend along the row direction of the pixel circuit 02 .
  • Each pixel electrode 03 may have opposite first and second sides along a column direction, and may have opposite third and fourth sides along a row direction.
  • the pixel electrode 03 covering the data line DATA may refer to: the orthographic projection of the part of the data line DATA between the first side and the second side of the pixel electrode 03 on the base substrate 01 is located on the pixel electrode 03 in the orthographic projection on the base substrate 01.
  • the pixel electrode 03 covering the gate line GATE may refer to: the orthographic projection of the gate line GATE located between the third side and the fourth side of the pixel electrode 03 on the base substrate 01 is located at the pixel electrode 03 Inside the orthographic projection on substrate substrate 01.
  • each pixel electrode 03 may cover a data line DATA and a gate line GATE to which the driving transistor T1 is electrically connected in a pixel circuit 02 to which it is electrically connected.
  • the driving transistor T1 included in the pixel circuit 02 located in the same column may be electrically connected to two data lines DATA.
  • each pixel circuit 02 located in an odd row is electrically connected to one data line DATA of the two data lines DATA
  • each pixel circuit 02 located in an even row is electrically connected to the other data line DATA of the two data lines DATA .
  • the two data lines DATA may be respectively located on the left and right sides of the corresponding row of pixel circuits 02 .
  • each pixel electrode 03 can cover two data lines DATA. That is, the two data lines DATA located on the left and right sides of the column of pixel circuits 02 may be covered by the pixel electrodes 03 .
  • the data line DATA on the left side is called the first data line
  • the data line DATA on the right side is called the second data line
  • Both of the two data lines are covered by the corresponding pixel electrode 03 may mean: the orthographic projection of the part of the first data line located between the first side and the second side of the pixel electrode 03 on the base substrate 01 is located at the pixel electrode 03
  • the orthographic projection of the part of the second data line on the base substrate 01 between the first side and the second side of the pixel electrode 03 is also located on the substrate 03 of the pixel electrode 03. Orthographic projection on substrate 01.
  • the material of the driving transistor T1 described in the embodiments of the present disclosure may be any of the following materials: amorphous silicon (aSi), low temperature polysilicon (low temperature poly-silicon, LTPS), low temperature polycrystalline oxide (low temperature polycrystalline oxide, LTPO) and oxide (oxide).
  • amorphous silicon aSi
  • low temperature polysilicon low temperature poly-silicon
  • LTPO low temperature polycrystalline oxide
  • oxide (oxide) oxide
  • FIG. 10 is a schematic structural diagram of a liquid crystal layer provided by an embodiment of the present disclosure.
  • the liquid crystal layer 04 may include: a first alignment layer 041 , liquid crystal molecules 042 and a second alignment layer 043 arranged in sequence along a direction X1 away from the base substrate 01 .
  • the support layer 044 located between the first alignment layer 041 and the second alignment layer 043 .
  • first alignment layer 041 and the second alignment layer 043 can be used for the alignment directions of the liquid crystal molecules 042 .
  • the orientation direction of the molecules 042 can be adjusted by setting the rubbing direction of the first alignment layer 041 and the rubbing direction of the second alignment layer 043 .
  • the thickness d0 of the support layer 044 described in the embodiment of the present disclosure may be greater than or equal to 1 ⁇ m and less than or equal to 2 ⁇ m.
  • the overall thickness of the liquid crystal layer 04 can be between 1 ⁇ m and 2 ⁇ m.
  • the overall thickness of the liquid crystal layer 04 described in the embodiments of the present disclosure is reduced.
  • the deflection speed of the liquid crystal molecules Based on the relationship between the deflection speed of the liquid crystal molecules and the thickness of the liquid crystal layer, that is, the larger the thickness of the liquid crystal layer 04, the slower the deflection speed of the liquid crystal molecules 042 contained in it, and the smaller the thickness of the liquid crystal layer 04, the smaller the liquid crystal molecules contained in it.
  • the faster the deflection speed of 042 it can be seen that by setting a liquid crystal layer with a smaller thickness, the deflection speed of liquid crystal molecules 042 can be increased, that is, the liquid crystal molecules 042 can quickly respond to the pressure difference to complete the deflection.
  • the refresh rate of the display module is also relatively improved.
  • the refresh rate of the display module can only reach 60 hertz (Hz).
  • Hz hertz
  • the response speed of the liquid crystal molecules 042 can be effectively improved, thereby increasing the refresh rate of the display module, avoiding dizziness of the user, and improving user experience.
  • the material of the supporting layer 044 may be a transparent and viscous material, such as optical glue.
  • the liquid crystal molecules can be any of the following modes: twisted nematic (twisted nematic, TN) type, vertical alignment (vertical alignment, VA) type, advanced super dimension switch (advanced super dimension switch, ADS) ) type and in-plane switching (IPS) type.
  • twisted nematic twisted nematic, TN
  • vertical alignment vertical alignment
  • VA advanced super dimension switch
  • ADS advanced super dimension switch
  • IPS in-plane switching
  • FIG. 11 is a schematic diagram of a partial structure of another display module provided by an embodiment of the present disclosure.
  • the liquid crystal layer 04 may further include: a common electrode 045, a third flat layer 046, A first black matrix layer (black matrix, BM) 047 , a packaging cover plate 048 and a composite optical film 049 .
  • the orthographic projection of the first black matrix layer 047 on the base substrate 01 may cover the orthographic projection of the supporting layer 044 on the base substrate 01 .
  • the orthographic projection of the first black matrix layer 047 on the base substrate 01 and the orthographic projection of the supporting layer 044 on the base substrate 01 may only partially overlap.
  • the first black matrix layer 047 can be used to block light leakage at the supporting layer 044 .
  • the third planarization layer 046 may be used to planarize the first black matrix layer 047 .
  • the composite optical film 049 can be used to modulate the polarization state of the light, so that only the light satisfying the specific polarization state can exit from the display side.
  • the composite optical film 049 may include a linear polarizer, a quarter wave plate and a half wave plate.
  • the composite optical film 049 can also be called a circular polarizer.
  • the angle ⁇ pol between the light absorption axis of the linear polarizer and the target axis, the angle ⁇ 1/2 between the slow axis of the quarter-wave plate and the target axis, and the slow axis of the half-wave plate can satisfy:
  • the target axis may be a preset coordinate axis z0, which is generally 0 degrees.
  • the light transmittance (also called liquid crystal efficiency) of the liquid crystal layer 04 is increased.
  • ⁇ pol 80°
  • ⁇ 1/2 62.5°
  • ⁇ 1/ 4 is 0°
  • the phase delay of the half-wave plate can be set to be 270 nanometers (nm) to 280 nm
  • the phase delay of the quarter-wave plate can be set to be 150 nm to 170 nm.
  • the rubbing direction of the first alignment layer 041 can be set to be 110° to 120°
  • the rubbing direction of the second alignment layer 043 can be set to be 50° to 60°.
  • the difference between the refractive index in the direction of the fast axis and the refractive index in the direction of the slow axis of the composite optical film is greater than or equal to 0.13 and less than or equal to 0.14.
  • the thickness of the liquid crystal layer 04 is set to 1 ⁇ m to 2 ⁇ m. On this basis, a phase retardation of 200nm to 210nm can be achieved, ensuring better liquid crystal efficiency under low cell thickness (that is, liquid crystal layer 04 with a smaller thickness).
  • the light source 05 described in the embodiments of the present disclosure may be a direct-type light source.
  • Fig. 12 shows a schematic structural diagram of a direct light source.
  • the light source 05 may include: a filling layer 051 arranged in sequence along a direction away from the base substrate 01 , a plurality of light emitting units 052 and a plurality of second black matrix layers 053 .
  • the orthographic projection of a second black matrix layer 053 on the base substrate 01 and the orthographic projection of a light emitting unit 052 on the base substrate 01 may overlap. Overlapping may mean that the orthographic projection of the second black matrix layer 053 on the base substrate 01 coincides with or partially overlaps the orthographic projection of the light emitting unit 052 on the base substrate 01 .
  • the second black matrix layer 053 can be used to block the light leakage from the light emitting unit 052, so as to prevent the light emitted by the light emitting unit 052 from directly irradiating the user's eyes.
  • the filling layer 051 can be used to prevent lateral light leakage from the light emitting unit 052 and reduce light reflection between adjacent interfaces.
  • the filling layer 052 may be water glue, and the refractive index of the filling layer 052 may be greater than or equal to 1.4 and less than or equal to 1.8.
  • Each light emitting unit 052 described in the embodiments of the present disclosure may include a plurality of light emitting diodes.
  • the orthographic projection of a light emitting diode on the base substrate 01 may overlap with the orthographic projections of multiple pixels on the base substrate 01 .
  • the orthographic projection of a light emitting diode on the substrate 01 may overlap with the orthographic projection of 5*5 pixels (ie, pixels in 5 rows and 5 columns) on the substrate 01 . That is, the ratio of the arrangement period of the light emitting diodes to the arrangement period of the pixels may be 1:5. After testing, this arrangement can ensure good uniformity of display brightness, which can generally reach 92%.
  • each light emitting diode may be in the shape of a cuboid, and the area of each light emitting diode may be greater than or equal to 5 ⁇ m to 30 ⁇ m.
  • each second black matrix layer 053 can be rectangular, and the width Wbm of each second black matrix layer 053 can satisfy:
  • each second black matrix layer 053 at least satisfies:
  • Wled can refer to the width of each light emitting diode
  • Lled can refer to the height of each light emitting diode
  • Hled can refer to the thickness of each light emitting diode
  • Hbm can refer to the thickness of each second black matrix layer 053
  • nx may refer to the refractive index of the filling layer 052 . Assuming that the area of each LED is 5 ⁇ m, Hled is 1 ⁇ m, and Hbm is 1 ⁇ m, then Wbm is at least 6.8 ⁇ m.
  • the width Wled of the light emitting diodes may refer to the length of the light emitting diodes in the row direction
  • the height Lled of the light emitting diodes may refer to the length of the light emitting diodes in the column direction
  • the thickness Hled of the light emitting diodes may refer to the length of the light emitting diodes in the column direction.
  • the length of a diode in the other direction perpendicular to the row and column directions.
  • the width Wbm of the second black matrix layer 053 may refer to the length of the second black matrix layer 053 in the row direction
  • the thickness Hbm of the second black matrix layer 053 may refer to the length of the second black matrix layer 053 in the column direction.
  • each light emitting unit 052 described in the embodiments of the present disclosure may include: a red light emitting diode (light emitting diode, LED) R, a blue light emitting diode B, and a green light emitting diode G.
  • a red light emitting diode light emitting diode, LED
  • B blue light emitting diode
  • G green light emitting diode
  • the red light emitting diodes R, blue light emitting diodes B and green light emitting diodes G in each light emitting unit 052 may be arranged along the row direction. Moreover, the arrangement order of the red LED R, the blue LED B and the green LED G in each light emitting unit 052 is the same. That is, the light emitting diodes in each row of light emitting units 052 can be arranged in sequence: one red light emitting diode R, one blue light emitting diode B and one green light emitting diode G. This arrangement manner may also be referred to as equal-spaced arrangement.
  • the red light emitting diodes R, blue light emitting diodes B and green light emitting diodes G in each light emitting unit 052 may be arranged along the row direction. And in every three adjacent rows of light-emitting units 052 , the arrangement order of the red light-emitting diodes R, blue light-emitting diodes B and green light-emitting diodes G in each light-emitting unit 052 is different. For example, as for Fig.
  • the first row follows a red light-emitting diode R, a blue light-emitting diode B and a green light-emitting diode G Arranged in order, the second row is arranged in the order of a blue light-emitting diode B, a red light-emitting diode R and a green light-emitting diode G, and the third row is arranged in the order of a green light-emitting diode G, a blue light-emitting diode B and a red light-emitting diode
  • the sequence of the light emitting diodes R is arranged sequentially. This arrangement manner can also be referred to as equidistant staggered arrangement.
  • the red light emitting diodes R, blue light emitting diodes B and green light emitting diodes G in each light emitting unit 052 may be arranged in a triangle. That is, in every two adjacent rows of light-emitting units 052, the first row is arranged in sequence according to the order of a red light-emitting diode R, a green light-emitting diode G and a blue light-emitting diode B, and the second row is arranged according to the order of a blue light-emitting diode B , a red light-emitting diode R and a green light-emitting diode G are arranged in sequence, and a red light-emitting diode R, a green light-emitting diode G and a blue light-emitting diode B located in two adjacent rows can form a triangle as shown in Figure 15 arranged. This arrangement can also be called a triangular
  • Each of the light emitting units 052 shown in FIGS. 13 to 15 includes only one red light emitting diode R, one green light emitting diode G and one blue light emitting diode B. As shown in FIG. Certainly, in some embodiments, each light emitting unit 052 may also include one red light emitting diode R, one green light emitting diode G and two green light emitting diodes G.
  • each light emitting unit 052 includes two green light emitting diodes G
  • the green light-emitting diodes G can be arranged in a rectangle. That is, in every two adjacent rows of light-emitting units 052, the first row can be arranged sequentially according to the order of a red light-emitting diode R and a green light-emitting diode G, and the second row can be arranged in the order of a green light-emitting diode G and a blue light-emitting diode.
  • the order of B is in order. This arrangement may also be referred to as an RGBG arrangement.
  • the orthographic projection of one light emitting diode on the base substrate 01 may overlap with the orthographic projections of multiple pixels on the base substrate 01 .
  • the orthographic projection of a light emitting diode on the substrate 01 may overlap with the orthographic projection of 5*5 pixels (ie, pixels in 5 rows and 5 columns) on the substrate 01 . That is, the ratio of the arrangement period of the light emitting diodes to the arrangement period of the pixels may be 1:5. After testing, this arrangement can ensure good uniformity of display brightness, which can generally reach 92%.
  • the area of each light emitting diode may be greater than or equal to 5 ⁇ m to 30 ⁇ m.
  • the display module is a full high definition (FHD) display module, that is, the resolution of the display module is 1980*1020, and 1980*1020 means that the display module includes 1980 rows and 1020 columns of pixel circuits.
  • each light emitting unit 052 includes a red light emitting diode R, a green light emitting diode G and a blue light emitting diode B.
  • the thickness of the liquid crystal layer 04 is between 1 ⁇ m and 2 ⁇ m.
  • the material of the driving transistor T1 is LTPS as an example, the refresh rate of the display module recorded in the embodiment of the present disclosure is described as follows:
  • the refresh frequency of the R picture displayed by turning on the red light-emitting diode R, the G picture displayed by turning on the green light-emitting diode G, and the B picture displayed by turning on the blue light-emitting diode B should be 180Hz, the corresponding refresh time is about 5.56ms, and Figure 17 shows the equivalent timing diagram.
  • the display module described in the embodiments of the present disclosure may further include: a plurality of lenses (lens) 09 arranged in an array on the side of the light source 05 away from the substrate 01 .
  • the lens 09 can be used to transmit light and control the light.
  • the range of the light transmitted through the lens 09 can be longer, and the brightness can also be improved.
  • the orthographic projection of one lens 09 on the base substrate 01 may overlap with the orthographic projections of multiple pixels on the base substrate 01 .
  • the orthographic projection of one lens 09 on the base substrate 01 may overlap with the orthographic projection of 100*100 pixels (ie, pixels in 100 rows and 100 columns) on the base substrate 01 . That is, the ratio of the arrangement period of the light emitting diodes to the arrangement period of the pixels may be 1:100.
  • FIG. 18 shows a schematic diagram of an overall structure of a display module provided by an embodiment of the present disclosure.
  • the pixel electrode 03 may have the shape shown in FIG. 3 .
  • the structure shown in FIG. 18 uses a front light source and a raised raised layer to achieve uniform light mixing and effectively improve the display effect.
  • the light source may also be a side-type light source.
  • the light source as an edge-type light source and including a lens 09 as an example
  • FIG. 19 shows a schematic diagram of the overall structure of another display module provided by an embodiment of the present disclosure.
  • the pixel electrode 03 can have the planar structure shown in FIG. 2, that is, the pixel electrode 03
  • the electrode 03 and the reflective electrode 031 can be reused.
  • the display module may not include the protrusion layer 07 having a plurality of protrusions.
  • the display module may not include the first flat layer 06 , the second flat layer 08 and the dielectric layer.
  • the pixel electrode 03 may be directly connected to the pixel circuit 02 to be electrically connected to the pixel circuit 02 .
  • the dots can be used to take light. That is, a plurality of evenly arranged light-trapping structures can be provided on the side of the filling layer close to the light source, and the light emitted by the light source can be irradiated onto the pixel electrode 03 through the plurality of evenly arranged light-trapping structures.
  • the light can be evenly irradiated to the pixel electrode 03 under the premise of using the side-in type light source, that is, the light can be evenly distributed in the entire display module.
  • FIG. 20 is a schematic diagram of the overall structure of another display module provided by an embodiment of the present disclosure.
  • the display module may further include: a light diffusion layer 10 located between the liquid crystal layer 04 and the light source 05 .
  • the light diffusion layer 10 can be used to diffuse and reflect light.
  • the pixel electrode 03 can also be The planar structure shown in FIG. 2 , that is, the pixel electrode 03 and the reflective electrode 031 can be multiplexed and directly connected to the pixel circuit 02 . In this way, the required film layers of the display module can be reduced, the manufacturing process can be simplified, and the cost can be reduced.
  • each layer structure on the side of the liquid crystal layer 04 close to the base substrate 01 is uniformly marked as 00.
  • the focal length of the lens 09 described in the embodiment of the present disclosure may be greater than or equal to 2 millimeters (ms) and less than or equal to 10 ms.
  • the aperture of the lens 09 may be greater than or equal to 0.5 ms and less than or equal to 1 ms.
  • the reflective electrode 031 in the pixel electrode 03 may be located in the focal plane (ie, the plane where the focus is located) of the plurality of lenses arranged in an array. In this way, light rays from various angles can be collimated to a specific angle to ensure a better display effect.
  • Figure 21 shows the equivalent diagram of light irradiation.
  • the light distribution shown in FIG. 22 can be realized in space.
  • the light can be transmitted to the user's eyes through the lens 09, and the image points A1 and A2 can be reconstructed in space to present a picture.
  • different lenses 09 can construct image points at different depths to realize light field display including depth information.
  • the first lens 09 and the second lens 09 can jointly construct the image point A1
  • the second lens 09 and the third lens 09 can jointly construct the image point A2.
  • the first lens 09 and the third lens 09 can jointly form the image point B1.
  • the second lens 09 and the fourth lens 09 can jointly construct the image point A2, and so on.
  • RLCD in FIG. 22 refers to including the base substrate 01 and various layer structures located between the front light source FLU and the base substrate 01 .
  • the aperture ratio is improved.
  • the thickness of the liquid crystal layer 04 is reduced by using the support layer 044 with a lower thickness, so the response time of the liquid crystal molecules is improved, and the refresh rate is improved.
  • the pixel electrode 03 is configured by setting the convex layer 07 with protrusions, so the uniform light mixing is ensured.
  • the lens is provided, the control of light is realized, and the aperture ratio is further increased, so that the display effect of full-color near-eye light field can be realized by using black and white pixels.
  • the embodiments of the present disclosure provide a display module, the display module includes at least a pixel electrode having a reflective electrode, and the pixel electrode can reflect the light transmitted by the liquid crystal layer to the liquid crystal layer under the driving of the pixel circuit. , so that the light is emitted through the liquid crystal layer to ensure the normal display of the display module.
  • the pixel electrode covers the pixel circuit, that is, the area where the pixel electrode is located and the area where the pixel circuit is located can overlap. In this way, compared with the transmissive display module, there is no need to reserve a separate area for the pixel circuit, so the display module can be effectively improved. resolution.
  • FIG. 23 is a flowchart of a driving method of a display module provided by an embodiment of the present disclosure, and the method can be applied to the display module shown in the above-mentioned drawings.
  • the premise of this method is that the display module is provided with a plurality of display partitions arranged in sequence along the column direction, and each display partition may include multiple rows of pixel circuits.
  • the display module 000 shown therein has four display areas A11 to A14 in total.
  • the method may include:
  • Step 2301 for at least one target display zone among the plurality of display zones, provide driving signals row by row to multiple rows of pixel circuits in the target display zone.
  • the driving signal can be used for the pixel circuit to apply a driving voltage to the pixel electrode. That is, in the embodiment of the present disclosure, the display modules can be driven in partitions for display. In this way, display flexibility is improved.
  • the display module may further include a gate driving circuit and a source driving circuit.
  • the gate driving circuit can be electrically connected to the gate line
  • the source driving circuit can be electrically connected to the data line.
  • the gate driving circuit can be used to provide gate driving signals to the gate lines
  • the source driving circuit can provide data signals to the data lines. Based on this, it can be seen that in the embodiment of the present disclosure, multiple gate driving circuits may be provided, and the multiple gate driving circuits may correspond to multiple display partitions one by one.
  • Each gate driving circuit can individually provide gate driving signals to the gate lines in the corresponding display partition row by row, so that the driving transistors in each row of pixel circuits electrically connected to the gate lines can be turned on row by row, and provide driving signals to the pixel electrodes.
  • each gate driving circuit can simultaneously provide a gate driving signal to the i-th row in the corresponding display partition, where i is greater than or equal to 1 and less than or equal to the number of rows of pixel circuits included in the display partition.
  • the pixel circuits in the same column may be electrically connected to the same group of data lines, and different display partitions may be electrically connected to different data lines.
  • Each group of data lines may include one or more data lines.
  • the data line electrically connected to the pixel circuits in the same column is DATA1 .
  • the data line electrically connected to the pixel circuits in the same column is DATA2.
  • the data line electrically connected to the pixel circuits in the same column is DATA3.
  • the data line electrically connected to the pixel circuits in the same column is DATA4.
  • the source driving circuit can provide data signals with different potentials to different data lines, so that the display brightness of each display partition can be different, further improving display flexibility.
  • the embodiments of the present disclosure provide a method for driving a display module.
  • the display module can be divided into multiple display partitions, and for at least one target display partition among the multiple display partitions,
  • the driving signals are provided row by row to the pixel circuits of multiple rows in the target display partition. That is, individual control over the display of each display partition can be realized, thus improving display flexibility.
  • FIG. 25 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure. As shown in FIG. 25 , the display device may include: a power supply component 100 , and a display module 000 as shown in the above-mentioned figures.
  • the power supply component 100 can be electrically connected with the display module 000 , and the power supply component 100 can be used to supply power to the display module 000 .
  • the display device may be a near-eye light field display device.
  • the display device may be a virtual reality (virtual reality, VR) display device, and the VR display device may be a head-mounted display device, such as VR glasses.
  • the display device may be an augmented reality (augmented reality, AR) display device.
  • the display device may also be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, or a navigator.

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Abstract

一种显示模组及其驱动方法、显示装置，属于显示技术领域。显示模组包括至少具有反射电极（031）的像素电极（03），像素电极（03）能够在像素电路（02）的驱动下将液晶层（04）透射的光线反射至液晶层（04），以便光线经液晶层（04）射出，确保显示模组的正常显示。像素电极（03）覆盖像素电路（02），即像素电极（03）所在区域和像素电路（02）所在区域可以重叠，如此相对于透射式显示模组，因无需单独预留区域专门设置像素电路（02），故可以有效提高显示模组的分辨率。

Description

显示模组及其驱动方法、显示装置 技术领域
本公开涉及显示技术领域，特别涉及一种显示模组及其驱动方法、显示装置。
背景技术
光场显示装置是一种使用光场显示技术产生立体视觉影像的显示装置。
相关技术中，光场显示装置包括的显示模组大多为透射式显示模组。透射式显示模组一般包括具有开口区和非开口区的衬底基板，位于非开口区的像素电路，位于开口区的像素电极，以及位于衬底基板一侧的光源和液晶层。像素电极能够在像素电路的驱动下控制液晶层中的液晶分子发生偏转，在液晶分子发生偏转后，光源发出的光可以经开口区透过液晶层照射出来，从而实现显示。
但是，因透射式显示模组中需要单独开设非开口区以设置像素电路，故分辨率较低。
发明内容
本申请提供了一种显示模组及其驱动方法、显示装置，所述技术方案如下：
一方面，提供了一种显示模组，所述显示模组包括：
衬底基板；
以及，位于所述衬底基板的一侧，且沿远离所述衬底基板的方向依次设置的阵列排布的多个像素电路、阵列排布的多个像素电极、液晶层和光源；所述像素电路至少包括驱动晶体管，所述驱动晶体管具有栅极、第一极和第二极；所述像素电极至少包括反射电极；
其中，所述多个像素电极与所述多个像素电路一一对应电连接，且至少一个所述像素电路在所述衬底基板上的正投影位于对应的所述像素电极在所述衬底基板上的正投影内；所述像素电极用于将所述液晶层透射的光线反射至所述液晶层，以使所述光线从所述液晶层远离所述衬底基板的一侧射出。
可选的，所述驱动晶体管的栅极与栅线电连接，所述驱动晶体管的第一极与数据线电连接，所述驱动晶体管的第二极与所述像素电极电连接；所述像素电极覆盖所述数据线与所述栅线。
可选的，位于同一列的多个所述像素电路包括的驱动晶体管与两条数据线电连接，所述像素电极覆盖所述两条数据线。
可选的，所述像素电极还包括：位于所述反射电极远离所述衬底基板一侧的透明电极；所述显示模组还包括：
位于所述反射电极与所述像素电路之间，且沿远离所述衬底基板的方向依次设置的第一平坦层和凸起层；
以及，位于所述反射电极与所述透明电极之间的第二平坦层；
其中，所述凸起层远离所述衬底基板的一侧具有多个凸起；所述反射电极与所述像素电路通过贯穿所述凸起层和所述第一平坦层的第一过孔电连接，且所述反射电极与所述透明电极通过贯穿所述第二平坦层的第二过孔电连接。
可选的，所述第一过孔与所述第二过孔间隔设置，且所述第一过孔在所述衬底基板上的正投影与所述第二过孔在所述衬底基板上的正投影不重叠。
可选的，所述凸起的凸起方向为远离所述衬底基板的方向，所述凸起垂直于所述衬底基板的截面呈弧形，且多个所述凸起在所述衬底基板上的正投影与一个所述像素电路在所述衬底基板上的正投影重叠。
可选的，所述凸起的坡度角大于等于30度，且小于等于60度；
且，每相邻两个所述凸起的间隔，与所述每相邻两个所述凸起中，各个所述凸起在所述衬底基板上的正投影的直径之比小于等于1。
可选的，所述多个凸起阵列排布；
或者，所述多个凸起包括按照第一方向排布的多个凸起组，每个所述凸起组包括按照第二方向排布的至少两个所述凸起，所述第二方向与所述第一方向的夹角为锐角。
可选的，所述凸起层的材料包括：树脂；所述反射电极的材料包括：金属银；所述透明电极的材料包括：氧化铟锡；
并且，所述反射电极远离所述衬底基板一侧的表面的形貌与所述凸起层远离所述衬底基板一侧的表面的形貌相同；
所述反射电极包括：绝缘设置的多个反射电极块，每个所述反射电极块对 应覆盖一个所述像素电路。
可选的，所述液晶层包括：沿远离所述衬底基板的方向依次设置的第一取向层、所述液晶分子和第二取向层；
以及，位于所述第一取向层与所述第二取向层之间的支撑层，所述支撑层的厚度大于等于1微米，且小于等于2微米。
可选的，所述液晶层还包括：位于所述第二取向层远离所述衬底基板的一侧，且沿远离所述衬底基板的方向依次设置的公共电极、第三平坦层、第一黑矩阵层、封装盖板和复合光学膜；
其中，所述第一黑矩阵层在所述衬底基板上的正投影覆盖所述支撑层在所述衬底基板上的正投影。
可选的，所述复合光学膜包括：线偏光片、四分之一波片和二分之一波片；
其中，所述线偏光片的光吸收轴与目标轴的夹角θpol，所述四分之一波片的慢轴与所述目标轴的夹角θ1/2，以及所述二分之一波片的慢轴与所述目标轴的夹角θ1/4满足：θpol-2θ1/2+θ1/4＝45度。
可选的，所述光源为直下式光源；所述直下式光源包括：沿远离所述衬底基板的方向依次设置的填充层，多个发光单元和多个第二黑矩阵层；
其中，一个所述第二黑矩阵层在所述衬底基板上的正投影与一个所述发光单元在所述衬底基板上的正投影重叠。
可选的，每个所述像素电极与所述液晶层包括的公共电极形成一个像素；
每个所述发光单元包括多个发光二极管，且一个所述发光二极管在所述衬底基板上的正投影与多个所述像素在所述衬底基板上的正投影重叠。
可选的，一个所述发光二极管在所述衬底基板上的正投影与5行5列个所述像素在所述衬底基板上的正投影重叠。
可选的，每个所述发光单元包括红色发光二极管、蓝色发光二极管和绿色发光二极管；
其中，每个所述发光单元中的所述红色发光二极管、所述蓝色发光二极管和所述绿色发光二极管沿行方向排布；
或者，每个所述发光单元中的所述红色发光二极管、所述蓝色发光二极管和所述绿色发光二极管呈三角形排布；
或者，每个所述发光单元包括两个所述绿色发光二极管，且每个所述发光 单元中的所述红色发光二极管、所述蓝色发光二极管和两个所述绿色发光二极管呈矩形排布。
可选的，所述显示模组还包括：位于所述光源远离所述衬底基板一侧且阵列排布的多个透镜；
其中，一个所述透镜在所述衬底基板上的正投影与所述显示模组中的多个像素在所述衬底基板上的正投影重叠，所述透镜用于透射所述光线。
可选的，所述反射电极位于所述阵列排布的多个透镜的焦平面内。
可选的，所述透镜的焦距大于等于2毫米，且小于等于10毫米；
且，所述透镜的孔径大于等于0.5毫米，且小于等于1毫米。
可选的，所述显示模组还包括：位于所述液晶层与所述光源之间的光扩散层。
另一方面，提供了一种显示模组的驱动方法，其中，所述显示模组具有沿列方向依次排布的多个显示分区，每个所述显示分区包括多行像素电路；所述方法包括：
对于所述多个显示分区中的至少一个目标显示分区，向所述目标显示分区中的多行像素电路逐行提供驱动信号，所述驱动信号用于供所述像素电路向像素电极加载驱动电压。
可选的，各个所述显示分区包括的像素电路的行数相等，且向各个所述目标显示分区中的像素电路提供驱动信号的阶段重叠。
又一方面，提供了一种显示装置，其中，所述显示装置为近眼光场显示装置，且所述近眼光场显示装置包括如上述方面所述的显示模组。
附图说明
为了更清楚地说明本公开实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本公开实施例提供的一种显示模组的结构示意图；
图2是本公开实施例提供的一种显示模组的局部结构示意图；
图3是本公开实施例提供的另一种显示模组的局部结构示意图；
图4是本公开实施例提供的一种凸起层的等效图；
图5是本公开实施例提供的多个凸起的一种排布方式示意图；
图6是本公开实施例提供的多个凸起的另一种排布方式示意图；
图7是本公开实施例提供的一种显示模组的局部等效示意图；
图8是本公开实施例提供的一种像素电路和像素的等效示意图；
图9是图8所示结构的局部放大示意图；
图10是本公开实施例提供的一种液晶层的结构示意图；
图11是本公开实施例提供的另一种液晶层的结构示意图；
图12是本公开实施例提供的一种光源的结构示意图；
图13是本公开实施例提供的一种发光二极管的排布方式示意图；
图14是本公开实施例提供的另一种发光二极管的排布方式示意图；
图15是本公开实施例提供的又一种发光二极管的排布方式示意图；
图16是本公开实施例提供的再一种发光二极管的排布方式示意图；
图17是本公开实施例提供的一种显示模组刷新时序图；
图18是本公开实施例提供的一种显示模组的整体结构示意图；
图19是本公开实施例提供的另一种显示模组的整体结构示意图；
图20是本公开实施例提供的又一种显示模组的整体结构示意图；
图21是本公开实施例提供的一种光线经透镜射出的等效示意图；
图22是本公开实施例提供的一种透镜基于光线构建的像点等效示意图；
图23是本公开实施例提供的一种显示模组的驱动方法流程图；
图24是本公开实施例提供的一种显示模组的结构示意图；
图25是本公开实施例提供的一种显示装置的结构示意图。
具体实施方式
为了使本公开的目的、技术方案和优点更加清楚，下面将结合附图对本公开作进一步地详细描述。
本公开的实施方式部分使用的术语仅用于对本公开的实施例进行解释，而非旨在限定本公开。除非另作定义，本公开的实施方式使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开专利申请说明书以及权利要求书中使用的“第一”、“第二”、“第三”以 及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”或者“一”等类似词语也不表示数量限制，而是表示存在至少一个。“包括”或者“包含”等类似的词语意指出现在“包括”或者“包含”前面的元件或者物件涵盖出现在“包括”或者“包含”后面列举的元件或者物件及其等同，并不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则所述相对位置关系也可能相应地改变。在本公开实施例中提及的“和/或”，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。字符“/”一般表示前后关联对象是一种“或”的关系。
透射式显示模组的衬底基板上一般具有透光的开口区和不透光的非开口区，像素电路位于非开口区，像素电路所电连接的像素位于开口区，像素电路驱动像素所发的光线能够经开口区射出。但是，因需要单独开设非开口区设置像素电路，故透射式显示模组的分辨率一般较低。分辨率可以用每英寸所能设置的像素数量(pixel per inch，PPI)所表示。低PPI的显示模组在显示画面时易出现纱窗效应，纱窗效应是指在像素数量不足的情况下，实时渲染引发的细线条舞动、高对比度边缘出现分离式闪烁现象。显示效果较差。此外，因非开口区无法实现透光，故透射式显示模组的开口率较低。相应的，透射式显示模组的光利用率(即，光效)较低，一般仅能达到33％，显示效果较差。
本公开实施例提供了一种显示模组，可以应用于近眼光场显示装置中。该显示模组不仅分辨率可以设计的较高，而且光利用率较高，整体显示效果较好。
图1是本公开实施例提供的一种显示模组的结构示意图。如图1所示，该显示模组包括：衬底基板01，以及位于衬底基板01的一侧，且沿远离衬底基板01的方向X1依次设置的阵列排布的多个像素电路02、阵列排布的多个像素电极03、液晶层04和光源05。图1仅示意性示出一个像素电路02和一个像素电极03。
图2是本公开实施例提供的另一种显示模组的结构示意图。如图2所示，像素电路02至少包括驱动晶体管T1，驱动晶体管T1可以具有栅极、第一极和 第二极。其中，第一极可以称为源极，相应的，第二极可以称为漏极。或者，第一极可以称为漏极，相应的，第二极可以称为源极。像素电极03至少包括反射电极031。
其中，多个像素电极03与多个像素电路02可以一一对应电连接，即每个像素电极03可以与一个像素电路02电连接，不同的像素电极03所连接的像素电路02不同。并且，至少一个像素电路02在衬底基板01上的正投影可以位于对应的像素电极03在衬底基板01上的正投影内。即，像素电极03和像素电路02的设置区域可以重叠。如此，相对于需单独预留非开口区设置像素电路02的透射式显示模组而言，本公开实施例的显示模组的分辨率可以较高。进而，可以有效避免显示画面时出现纱窗效应现象，确保显示效果较好。
在本公开实施例中，光源05可以用于向液晶层04发射光线。像素电极03可以用于将液晶层04透射的光线反射至液晶层04，以使光线从液晶层04远离衬底基板01的一侧射出。即，光源05发出的光线可以先经液晶层04照射至像素电极03上，再经像素电极03反射后再次经过液晶层04，从远离衬底基板01的一侧透射出来，从而实现有效显示。换言之，远离衬底基板01的一侧为显示侧。基于此，光源05也可以称为前置光源(front light unit，FLU)。
基于上述实施例记载的显示原理可知，像素电极03所在区域可以均为可用于显示的开口区，如此有效提高了光利用率，进一步确保了显示效果较好。
综上所述，本公开实施例提供了一种显示模组，该显示模组包括至少具有反射电极的像素电极，该像素电极能够在像素电路的驱动下将液晶层透射的光线反射至液晶层，以便光线经液晶层射出，确保显示模组的正常显示。且，该像素电极覆盖像素电路，即该像素电极所在区域和像素电路所在区域可以重叠，如此相对于透射式显示模组，因无需单独预留区域专门设置像素电路，故可以有效提高显示模组的分辨率。
作为一种可选的实现方式，参考图2，像素电极03与反射电极031可以复用。即反射电极031可以直接作为像素电极03。在此基础上，像素电极03可以在像素电路02的驱动下直接控制液晶层04中的液晶分子偏转，以使得光源05发射的光线可以经液晶层04透射至像素电极03。然后，像素电极03可以再将该从液晶层04透射的光线进一步反射至液晶层04，以使光线从液晶层04远离 衬底基板01的一侧射出。即，像素电极03不仅可以用于反射光源05发射的光线，而且可以直接驱动液晶分子偏转实现对光线的调制。
示例的，液晶层04中还可以包括公共电极。像素电路02可以向像素电极03传输驱动电压，该驱动电压和加载至公共电极上的电压会存在一定压差，液晶分子可以在该压差作用下发生偏转。
继续参考图2可以看出，在该结构基础上，像素电极03可以通过过孔K0与对应的像素电路02中的驱动晶体管T1电连接。如，该驱动晶体管T1的第二极可以通过过孔K0与像素电极03搭接。
作为另一种可选的实现方式，参考图3，显示模组还可以包括：位于像素电极03与像素电路02之间的第一平坦层06和凸起层07。
其中，第一平坦层06可以用于将像素电路02包括的层级结构进行平坦化，以避免形成断差。该凸起层07远离衬底基板01的一侧，即该凸起层07的上表面可以具有多个凸起。凸起层07可以用于对像素电极03远离衬底基板01的一面构型。即，凸起层07可以作为像素电极03的构型层，以使得像素电极03远离衬底基板01的表面的形貌与凸起层07远离衬底基板01的表面的形貌一致。如此，参考图3可以看出，像素电极03也具有多个凸起。
需要说明的是，凸起层07可以为连续的一整层，像素电极03可以包括多个彼此绝缘设置的反射电极块，每个反射电极块可以对应覆盖一个像素电路02。
可选的，该凸起的凸起方向可以为远离衬底基板01的方向X1。该凸起垂直于衬底基板01的截面可以呈图3所示的弧形。相应的，每个凸起在衬底基板01上的正投影可以呈圆形。
示例的，结合图4所示的凸起层07的等效图，每个凸起的外表面可以包括球面的一部分，如可以包括半球面。当然，在一些实施例中，每个凸起也可以呈其他形状，如一个完整的球形的1/3。
可选的，结合图3，该凸起的坡度角α可以大于等于30度，且小于等于60度。并且，每相邻两个凸起的间隔d1，与每相邻两个凸起中，各个凸起在衬底基板01上的正投影的直径R之比(d1/R)可以小于等于1。如，每相邻两个凸起的间隔d1可以大于等于0.5微米(μm)，且可以小于等于20μm。每个凸起在衬底基板01上的正投影的直径也可以大于等于0.5μm，且可以小于等于20μm。当然，在一些实施例中，每相邻两个凸起之间也可以没有间隔。
此外，在本公开实施例中，多个凸起在衬底基板01上的正投影可以与一个像素电路02在衬底基板01上的正投影重叠。
例如，在像素电路02和多个凸起阵列排布于衬底基板01的前提下，一个像素电路02在衬底基板01上的正投影可以与5*5个凸起至10*10个凸起02在衬底基板01上的正投影重叠。5*5代表5行5列的凸起，10*10代表10行10列的凸起。
通过设置具有多个凸起的凸起层07，可以增大像素电极03对光线进行反射的反射角，使得光线的反射角度能够可靠位于0至90度之间。且，可以实现混光效果，确保显示效果较好。此外，可以通过调整每个凸起的坡度角α，以及每相邻两个凸起的间隔d1，实现均匀反射的效果，进一步确保显示效果较好。
可选的，在本公开实施例中，还可以通过调整多个凸起的排布方式改善显示效果。该排布方式可以通过掩膜(mask)工艺进行设置。
例如，图5示出了图3所示结构的一种俯视图。参考图5可以看出，凸起层07具有的多个凸起可以阵列排布，即多个凸起在衬底基板01上的正投影可以按行和列规整的排布。
或者，例如，图6示出了图2所示结构的另一种俯视图。参考图6可以看出，凸起层07具有的多个凸起可以包括按照第一方向Y1排布的多个凸起组071，每个凸起组071可以包括按照第二方向Y2排布的至少两个凸起。第二方向Y2与第一方向Y1之间的夹角可以为锐角，即第二方向Y2与第一方向Y1不垂直且不平行。该排布方式也可以称为交错排布。基于此，对于图5所示排布方式而言，若以第一方向Y1和第二方向Y2对其进行限定，则图5中第一方向Y1与第二方向Y2互相垂直。
因具有凸起(即，凹凸不平)的像素电极03上形成的电场均一性有限，故进一步的，参考图3，像素电极03除包括像素电极031之外，还可以包括透明电极032。在此基础上，显示模组还可以包括：第二平坦层08。
其中，反射电极031可以位于凸起层07远离衬底基板01的一侧，第二平坦层08和透明电极032依次设置于反射电极031远离衬底基板01的一侧。即凸起层07其实是对像素电极03中的反射电极031进行构型。
第二平坦层08可以位于反射电极031和透明电极032之间，第二平坦层08可以用于将反射电极031远离衬底基板01的一侧的上表面的凸起进行平坦化， 如此，可以利于液晶分子的规整排布。
可选的，第二平坦层08对反射电极031进行平坦化的平坦效果可以参考图7示出的等效图。其中，透明电极032远离衬底基板01的一侧与凸起层07的上表面之间的最短间距d01可以位于2μm至2.5μm之间，透明电极032远离衬底基板01的一侧与凸起层07的上表面之间的最长间距d02可以位于3μm至3.5μm之间，凸起层07的上表面与下表面之间的间距d03可以位于2.5μm至3μm之间，一个凸起的直径r1可以位于5μm至5.5μm之间。
继续参考图3可以看出，在像素电极03包括反射电极031和透明电极032的前提下，反射电极031与像素电路02可以通过贯穿凸起层07和第一平坦层06的第一过孔K1电连接，且反射电极031与透明电极032可以通过贯穿第二平坦层08的第二过孔K2电连接。即包括反射电极031和透明电极032的像素电极03可以通过反射电极031与像素电路02电连接。基于该连接方式可以确定，在像素电极03包括反射电极031和透明电极032的前提下，像素电路02其实是将驱动电压直接加载至反射电极031，再由反射电极031传输至透明电极032，再由透明电极032基于该驱动电压控制液晶层04中的液晶分子偏转。
可选的，透明电极032在衬底基板01上的正投影与反射电极031在衬底基板01上的正投影可以存在交叠区域。例如，参考图3，其示出的透明电极032在衬底基板01上的正投影与反射电极031在衬底基板01上的正投影完全重合。
可选的，继续参考图3，第一过孔K1在衬底基板01上的正投影与第二过孔K2在衬底基板01上的正投影可以均位于上述实施例记载的交叠区域内。且，第一过孔K1和第二过孔K2可以间隔设置，第一过孔K1在衬底基板01上的正投影与第二过孔K2在衬底基板01上的正投影不重叠。
可选的，反射电极031可以由具有反射功能且不透光的材料制成。如，反射电极031的材料可以为金属银(Ag)，该金属银可以镀于凸起层07远离衬底基板01的一侧的表面，形成反射电极031。基于该镀涂工艺可以进一步确定，本公开实施例形成的反射电极031远离衬底基板01的表面的形貌与凸起层07远离衬底基板01的表面的形貌相同。透明电极032可以由透明导电材料制成，如该透明导电材料可以为氧化铟锡(indium tin oxide，ITO)。凸起层07的材料可以包括树脂。
可选的，继续参考图2和图3还可以看出，显示模组还可以包括：有源层， 缓冲层，第一绝缘层，第二绝缘层和电介质层。
其中，缓冲层、有源层、第一绝缘层、第二绝缘层、栅极和电介质层可以沿远离衬底基板01的方向X1依次设置，且驱动晶体管T1的第一极、第二极和栅极可以位于同层。第一极和第二极可以通过贯穿第一绝缘层和第二绝缘层的过孔与有源层电连接。缓冲层可以用于对衬底基板01进行平坦化，便于设置像素电路02包括的各个膜层。第一绝缘层和第二绝缘层可以用于避免相邻金属层之间信号发生干扰。电介质层可以用于保护像素电路02。
图2和图3所示结构的像素电路02可以称为顶栅结构的像素电路。当然，在一些实施例中，像素电路也可以为底栅结构。
以图3所示显示模组，第一极为源极，第二极为漏极为例，图8示出了一种包括多个像素电路02的衬底基板01的等效图。图9示出了图8所示结构中一个像素电路所在区域的局部放大图。
结合图2、图3和图9可以看出，每个驱动晶体管T1的栅极可以与栅线GATE电连接，驱动晶体管T1的源极可以与数据线DATA电连接，驱动晶体管T1的漏极可以与像素电极03电连接。对于图3所示结构而言，驱动晶体管T1的漏极其实是与反射电极031电连接。此外，图8和图9还示出了公共电极Vcom。一个像素电路02电连接的像素电极03与其上方的公共电极Vcom可以形成一个像素。
可选的，本公开实施例记载的每个像素电极03中，反射电极031在衬底基板01上的正投影与透明电极032在衬底基板01上的正投影可以存在交叠。例如，参考图9，其示出的反射电极031在衬底基板01上的正投影与透明电极032在衬底基板01上的正投影完全重合(即大小相同)，且通过第二过孔K2相互搭接。此外，反射电极031还通过第一过孔K1与驱动晶体管T1的漏极电连接。
可选的，在本公开实施例中，对于每个像素而言，形成该像素的公共电极Vcom在衬底基板01上的正投影与形成该像素的像素电极03在衬底基板01上的正投影可以存在交叠，交叠部分用于形成像素。例如，参考图9，其示出的每个像素电极03在衬底基板01上的正投影覆盖对应的公共电极Vcom在衬底基板01上的正投影。每个像素电极03呈矩形，其所覆盖的公共电极Vcom呈T字型。当然，在一些实施例中，公共电极Vcom也可以呈其他形状，如矩形。
可选的，在本公开实施例中，形成各个像素的公共电极Vcom可以为一体 结构。
对于每个驱动晶体管T1而言，当栅线GATE向其栅极提供有效电位的栅极驱动信号时，其源极与漏极可以导通，即驱动晶体管T1可以开启。此时，数据线DATA写入至源极的数据信号可以进一步传输至漏极，因漏极与像素电极03电连接，故该数据信号可以被写入至像素电极03。换言之，数据线DATA提供的数据信号可以经开启的驱动晶体管T1传输至像素电极03。该数据信号即为上述实施例记载的驱动电压。
结合图2、图3、图8和图9所示结构，至少一个像素电路02在衬底基板01上的正投影位于对应的像素电极03在衬底基板01上的正投影内，即像素电极03覆盖像素电路02可以是指：像素电极03覆盖其电连接的像素电路02所电连接的至少两条信号线。换言之，像素电路02所电连接的至少两条信号线可以隐藏于像素电极03的下方。如此，可以避免传统透射式显示模组必须要避免开口区走线的劣势，进一步提高开口率。经测试，本公开实施例记载的显示模组的开口率可以达到85～95％。
需要说明的是，像素电极03覆盖像素电路02所电连接的至少两条信号线可以是指：像素电极03在衬底基板01上的正投影与至少两条信号线在衬底基板01上的正投影存在交叠。该交叠可以是指重叠，或者部分重叠。如，结合图9，位于每相邻两个像素电极03之间的部分信号线可以不被像素电极03覆盖。
可选的，结合图9，该至少两条信号线可以包括至少一条栅线GATE和至少一条数据线DATA。其中，每条数据线DATA可以沿像素电路02的列方向延伸，每条栅线GATE可以沿像素电路02的行方向延伸。每个像素电极03可以沿列方向具有相对的第一边和第二边，且可以沿行方向具有相对的第三边和第四边。
在此基础上，像素电极03覆盖数据线DATA可以是指：该数据线DATA位于该像素电极03的第一边和第二边之间的部分在衬底基板01上的正投影位于该像素电极03在衬底基板01上的正投影内。同理，像素电极03覆盖栅线GATE可以是指：该栅线GATE位于该像素电极03的第三边和第四边之间的部分在衬底基板01上的正投影位于该像素电极03在衬底基板01上的正投影内。
示例的，在本公开实施例中，每个像素电极03可以覆盖其电连接的一个像素电路02中，驱动晶体管T1所电连接的一条数据线DATA和一条栅线GATE。
或者，在本公开实施例中，参考图9，位于同一列的像素电路02包括的驱 动晶体管T1可以与两条数据线DATA电连接。如，位于奇数行的各个像素电路02与该两条数据线DATA中的一条数据线DATA电连接，位于偶数行的各个像素电路02与该两条数据线DATA中的另一条数据线DATA电连接。且该两条数据线DATA可以分别位于对应的一列像素电路02的左右两侧。在此基础上，每个像素电极03可以覆盖两条数据线DATA。即，该位于一列像素电路02的左右两侧的两条数据线DATA可以均被像素电极03覆盖。
假设对每列像素电路02而言，将位于其左侧的数据线DATA称为第一数据线，将位于其右侧的数据线DATA称为第二数据线，则该第一数据线和第二数据线均被对应的像素电极03覆盖可以是指：第一数据线位于像素电极03的第一边和第二边之间的部分在衬底基板01上的正投影位于该像素电极03在衬底基板01上的的正投影内，第二数据线位于该像素电极03的第一边和第二边之间的部分在衬底基板01上的正投影也位于该像素电极03在衬底基板01上的正投影内。
可选的，本公开实施例记载的驱动晶体管T1的材料可以为下述材料中的任一种：非晶硅(aSi)、低温多晶硅(low temperature poly-silicon，LTPS)、低温多晶氧化物(low temperature polycrystalline oxide，LTPO)和氧化物(oxide)。
可选的，图10是本公开实施例提供的一种液晶层的结构示意图。如图10所示，该液晶层04可以包括：沿远离衬底基板01的方向X1依次设置的第一取向层041、液晶分子042和第二取向层043。以及，位于第一取向层041与第二取向层043之间的支撑层044。
其中，该第一取向层041和第二取向层043可以用于液晶分子042的取向方向。可选的，可以通过设置第一取向层041的摩擦(rubbing)方向，以及设置第二取向层043的rubbing方向来调整分子042的取向方向。
可选的，结合图10，本公开实施例记载的支撑层044的厚度d0可以大于等于1μm，且小于等于2μm。如此，可以使得液晶层04的整体厚度位于1μm至2μm之间。相对于目前厚度位于3μm至5μm的液晶层，本公开实施例记载的液晶层04的整体厚度降低。
基于液晶分子的偏转速度与液晶层的厚度负相关的关系，即液晶层04的厚度越大，其包括的液晶分子042的偏转速度越慢，液晶层04的厚度越小，其包括的液晶分子042的偏转速度越快的关系可知，通过设置厚度较小的液晶层， 可以提高液晶分子042的偏转速度，即使得液晶分子042可以快速响应压差完成偏转。在响应速度提升的基础上，显示模组的刷新率也相对提升。
经测试，目前3μm至5μm的液晶层中，液晶分子042完成偏转所需时间约为16毫秒(ms)，显示模组的刷新率仅能达到60赫兹(Hz)。此时，观看显示模组的用户眼动或头动时，会因画面刷新延迟而出现眩晕问题。而在本公开实施例中，通过设置液晶层04的厚度较小，能够有效提升液晶分子042的响应速度，进而提升显示模组的刷新率，避免用户出现眩晕问题，改善用户体验。
可选的，支撑层044的材料可以为可透光且具有粘性的材料，如光学胶。
可选的，液晶分子可以为下述模式中的任一种：扭曲向列(twisted nematic，TN)型，垂直配向(vertical alignment，VA)型，高级超维场转换(advanced super dimension switch，ADS)型和面内转换(in-plane switching，IPS)型。
可选的，图11是本公开实施例提供的另一种显示模组的局部结构示意图。如图11所示，液晶层04还可以包括：位于第二取向层043远离衬底基板01的一侧，且沿远离衬底基板01的方向依次设置的公共电极045、第三平坦层046、第一黑矩阵层(black matric，BM)047、封装盖板048和复合光学膜049。
其中，第一黑矩阵层047在衬底基板01上的正投影可以覆盖支撑层044在衬底基板01上的正投影。当然，在一些实施例中，第一黑矩阵层047在衬底基板01上的正投影与支撑层044在衬底基板01上的正投影也可以仅部分重叠。
该第一黑矩阵层047可以用于遮挡支撑层044处的漏光。第三平坦层046可以用于对第一黑矩阵层047进行平坦化。复合光学膜049可以用于对光线的偏振状态进行调制进行，使得仅有满足特定偏振状态的光线才可从显示侧出射。
可选的，复合光学膜049可以包括线偏光片、四分之一波片和二分之一波片。复合光学膜049也可以称为圆偏光片。
可选的，线偏光片的光吸收轴与目标轴的夹角θ pol，四分之一波片的慢轴与目标轴的夹角θ 1/2，以及二分之一波片的慢轴与目标轴的夹角θ 1/4可以满足：
θ pol-2θ 1/2+θ 1/4＝45度(°)。
其中，结合图11，目标轴可以为预先设定的坐标轴z0，一般为0度。
通过上述角度设置，可以进一步确保光线经像素电极03反射后，从液晶层04充分透射至远离衬底基板01的一侧。即，提高液晶层04的透光率(也可以称为液晶效率)。
以TN型液晶分子为例，经测试，采用下述设定的角度和rubbing方向可以确保液晶层04的透光率较好：θ pol为80°，θ 1/2为62.5°，θ 1/4为0°。同时，可以设置二分之一波片的相位延迟量为270纳米(nm)至280nm，四分之一波片的相位延迟量为150nm至170nm。与此匹配，可以设置第一取向层041的rubbing方向为110°至120°，且设置第二取向层043的rubbing方向为50°至60°。此外，复合光学膜的快轴方向的折射率与慢轴方向的折射率的差值大于等于0.13，且小于等于0.14。液晶层04的厚度设置为1μm至2μm。在此基础上，可以实现200nm至210nm的相位延迟量，确保低盒厚(即，厚度较小的液晶层04)下的液晶效率较好。
可选的，本公开实施例记载的光源05可以为直下式光源。图12示出了一种直下式光源的结构示意图。参考图12，光源05可以包括：沿远离衬底基板01的方向依次设置的填充层051，多个发光单元052和多个第二黑矩阵层053。
其中，一个第二黑矩阵层053在衬底基板01上的正投影与一个发光单元052在衬底基板01上的正投影可以重叠。重叠可以是指第二黑矩阵层053在衬底基板01上的正投影与发光单元052在衬底基板01上的正投影重合，或部分重叠。
该第二黑矩阵层053可以用于对发光单元052的漏光进行遮挡，以避免发光单元052发出的光直接照射至用户的眼睛。填充层051可以用于防止发光单元052发生侧向漏光，以及可以减少相邻界面间的光线反射。
可选的，填充层052可以为水胶，填充层052的折射率可以大于等于1.4，且小于等于1.8。
本公开实施例记载的每个发光单元052可以包括多个发光二极管。
其中，一个发光二极管在衬底基板01上的正投影可以与多个像素在衬底基板01上的正投影重叠。例如，一个发光二极管在衬底基板01上的正投影可以与5*5个像素(即，5行5列的像素)在衬底基板01上的正投影重叠。即，发光二极管的排布周期与像素的排布周期的比例可以为1:5。经测试，该排布方式可以确保显示亮度的均一性较好，一般能达到92％。
可选的，结合图12，每个发光二极管可以呈长方体，且每个发光二极管的面积可以大于等于5μm至30μm。
可选的，结合图12，每个第二黑矩阵层053可以呈矩形，且每个第二黑矩阵层053的宽度Wbm可以满足：
(Wbm/2-Wled/2)/(Hled+Hbm)＝tan(arcsin(1/nx))。
换言之，每个第二黑矩阵层053的宽度Wbm至少满足：
Wbm<2*tan(arcsin(1/nx))*(Hled+Hbm)+Wled。
其中，Wled可以是指每个发光二极管的宽度，Lled可以是指每个发光二极管的高度，Hled可以是指每个发光二极管的厚度，Hbm可以是指每个第二黑矩阵层053的厚度，nx可以是指填充层052的折射率。假设每个发光二极管的面积为5μm，Hled为1μm，Hbm为1μm，则Wbm至少为6.8μm。
可选的，结合图12，发光二极管的宽度Wled可以是指发光二极管在行方向上的长度，发光二极管的高度Lled可以是指发光二极管在列方向上的长度，发光二极管的厚度Hled可以是指发光二极管在垂直于行方向和列方向的另一方向的长度。第二黑矩阵层053的宽度Wbm可以是指第二黑矩阵层053在行方向上的长度，第二黑矩阵层053的厚度Hbm可以是指第二黑矩阵层053在列方向上的长度。
可选的，本公开实施例记载的每个发光单元052可以包括：红色发光二极管(light emitting diode，LED)R、蓝色发光二极管B和绿色发光二极管G。
作为一种可选的实现方式，参考图13，每个发光单元052中的红色发光二极管R、蓝色发光二极管B和绿色发光二极管G可以沿行方向排布。且，各个发光单元052中红色发光二极管R、蓝色发光二极管B和绿色发光二极管G的排列顺序相同。即，每行发光单元052中的各个发光二极管可以均按照：一个红色发光二极管R、一个蓝色发光二极管B和一个绿色发光二极管G的顺序依次排布。该排布方式也可以称为等间隔排布。
作为另一种可选的实现方式，参考图14，每个发光单元052中的红色发光二极管R、蓝色发光二极管B和绿色发光二极管G可以沿行方向排布。且每相邻三行发光单元052中，各个发光单元052中红色发光二极管R、蓝色发光二极管B和绿色发光二极管G的排列顺序各不相同。如，对于图14而言，其示出的显示模组中，每相邻的三行发光单元中，第一行按照一个红色发光二极管R、一个蓝色发光二极管B和一个绿色发光二极管G的顺序依次排列，第二行按照一个蓝色发光二极管B、一个红色发光二极管R和一个绿色发光二极管G的顺序依次排列，第三行按照一个绿色发光二极管G、一个蓝色发光二极管B和一个红色发光二极管R的顺序依次排列。该排布方式也可以称为等间隔错排。
作为又一种可选的实现方式，参考图15，每个发光单元052中的红色发光二极管R、蓝色发光二极管B和绿色发光二极管G可以呈三角形排布。即，每相邻的两行发光单元052中，第一行按照一个红色发光二极管R、一个绿色发光二极管G和一个蓝色发光二极管B的顺序依次排列，第二行按照一个蓝色发光二极管B、一个红色发光二极管R和一个绿色发光二极管G的顺序依次排列，且位于相邻两行的一个红色发光二极管R、一个绿色发光二极管G和一个蓝色发光二极管B可以呈图15所示的三角形排布。该排布方式也可以称为三角排布。
上述图13至图15中示出的每个发光单元052均仅包括一个红色发光二极管R、一个绿色发光二极管G和一个蓝色发光二极管B。当然，在一些实施例中，每个发光单元052还可以包括一个红色发光二极管R、一个绿色发光二极管G和两个绿色发光二极管G。
作为再一种可选的实现方式，在每个发光单元052包括两个绿色发光二极管G的前提下，参考图16，每个发光单元052中的红色发光二极管R、蓝色发光二极管B和两个绿色发光二极管G可以呈矩形排布。即，每相邻的两行发光单元052中，第一行可以按照一个红色发光二极管R和一个绿色发光二极管G的顺序依次排列，第二行可以按照一个绿色发光二极管G和一个蓝色发光二极管B的顺序依次排列。该排布方式也可以称为RGBG排布。
可选的，在本公开实施例中，一个发光二极管在衬底基板01上的正投影可以与多个像素在衬底基板01上的正投影重叠。
如，一个发光二极管在衬底基板01上的正投影可以与5*5个像素(即，5行5列的像素)在衬底基板01上的正投影重叠。即，发光二极管的排布周期与像素的排布周期的比例可以为1:5。经测试，该排布方式可以确保显示亮度的均一性较好，一般能达到92％。
可选的，在本公开实施例中，红色发光二极管R、蓝色发光二极管B和绿色发光二极管G中，每个发光二极管的面积可以大于等于5μm至30μm。
以显示模组为全高清(full high definition，FHD)显示模组，即显示模组的分辨率为1980*1020，1980*1020是指显示模组包括1980行1020列像素电路。且每个发光单元052包括一个红色发光二极管R、一个绿色发光二极管G和一个蓝色发光二极管B。且液晶层04的厚度位于1μm至2μm之间。且显示60Hz的画面。且场序点亮RGB。且驱动晶体管T1的材料为LTPS为例，对本公开实 施例记载的显示模组的刷新率进行如下说明：
其中，若要显示60Hz的画面，则点亮红色发光二极管R显示的R画面，点亮绿色发光二极管G显示的G画面，以及点亮蓝色发光二极管B显示的B画面各自的刷新频率应为180Hz，对应刷新时间约为5.56ms，图17示出了等效时序图。相应的，刷新整个画面所需耗时约为：1920*1us＝1.92ms。液晶分子042在低盒厚下响应时间为2ms。如此，可以确定发光二极管的开启时长可以为：5.5ms-(1.92ms+2ms)＝1.58ms。开启时长较长，相应的显示效果较好。
可选的，本公开实施例记载的显示模组还可以包括：位于光源05远离衬底基板01一侧且阵列排布的多个透镜(lens)09。该透镜09可以用于透射光线，对光线进行控制。经透镜09透射后的光线的射程可以较长，且亮度也可以提升。
可选的，一个透镜09在衬底基板01上的正投影可以与多个像素在衬底基板01上的正投影重叠。如，一个透镜09在衬底基板01上的正投影可以与100*100个像素(即，100行100列的像素)在衬底基板01上的正投影重叠。即，发光二极管的排布周期与像素的排布周期的比例可以为1:100。
以光源为直下式光源，且包括透镜09为例，图18示出了本公开实施例提供的一种显示模组的整体结构示意图。参考图18可以看出，该结构中，像素电极03可以为图3所示的形状。图18所示结构，采用前置光源与具有凸起的凸起层搭配，能够实现均匀混光，有效改善显示效果。
当然，在一些实施例中，光源也可以为侧入式光源。以光源为侧入式光源，且包括透镜09为例，图19示出了本公开实施例提供的另一种显示模组的整体结构示意图。参考图19可以看出，因采用了侧入式光源，侧入式光源发出的光线能够向各个方向反射，且具有散射的效果，故像素电极03可以为图2所示的平面结构，即像素电极03与反射电极031可以复用。显示模组可以不包括具有多个凸起的凸起层07。且相应的，显示模组可以不包括第一平坦层06、第二平坦层08和电介质层。像素电极03可以直接搭接于像素电路02上，与像素电路02电连接。此外，也无需设置黑矩阵层对光源发出的光线进行遮挡。如此，不仅提升了光线透过率，而且有效减少了显示模组所需包括的膜层，制造工艺简单，且成本较低。
需要说明的是，在光源为侧入式光源的前提下，可以利用网点取光。即，可以在填充层靠近光源的一侧开设多个均匀排布的取光结构，光源发射的光线 可以经该多个均匀排布的取光结构照射至像素电极03上。
因多个取光结构均匀排布，故在采用侧入式光源的前提下，确保了光线能够均匀照射至像素电极03，即光线在整个显示模组中可以均匀分布。
图20是本公开实施例提供的又一种显示模组的整体结构示意图。参考图20可以看出，显示模组还可以包括：位于液晶层04与光源05之间的光扩散层10。
该光扩散层10可以用于对光线进行扩散和反射。如此，结合图20可以看出，因无需制作凸起层07实现对光线的扩散和反射，故在包括光扩散层10的前提下，不仅可以直接采用直下式光源，而且像素电极03也可以为图2所示的平面结构，即像素电极03与反射电极031可以复用并直接搭接于像素电路02上。如此，也可以减少显示模组所需包括的膜层，简化制造工艺，降低成本。
需要说明的是，图18至图20中，均未示出复合光学膜，且均将液晶层04靠近衬底基板01一侧的各层结构统一标识为00。
可选的，本公开实施例记载的透镜09的焦距可以大于等于2毫米(ms)，且小于等于10ms。透镜09的孔径可以大于等于0.5ms，且小于等于1ms。
可选的，在本公开实施例中，像素电极03中反射电极031可以位于该多个阵列排布的透镜的焦平面(即，焦点所在平面)内。如此，各个角度的光线均可以被准直到特定角度，确保显示效果较好。图21示出了光线照射的等效图。
可选的，在本公开实施例中，经透镜09对光线进行准直后，可在空间中实现图22所示的光线分布。其中，参考图20可以看出，光线可以经透镜09透射至用户眼睛，且可以在空间中重构出像点A1和A2，呈现画面。且不同的透镜09可以在不同深度下构建出像点，实现包括景深信息的光场显示。如，第一个透镜09和第二个透镜09可以共同构建出像点A1，第二个透镜09和第三个透镜09可以共同构建出像点A2。第一个透镜09和第三个透镜09可以共同构建出像点B1。第二个透镜09和第四个透镜09可以共同构建出像点A2，以此类推。
其中，图22中RLCD是指包括衬底基板01，以及位于前置光源FLU和衬底基板01之间的各层结构。
结合上述实施例可知，本公开实施例提供的显示模组中，因像素电极03覆盖了像素电路02，故开口率有所提升。因采用了较低厚度的支撑层044使得液晶层04的厚度降低，故提高了液晶分子的响应时间，提高了刷新率。因在设置前置光源的前提下，设置具有凸起的凸起层07对像素电极03进行构型，故保 证了均匀混光。此外，因设置了透镜，故实现了对光线的控制，进一步提高了开口率，使得采用黑白像素即实现全彩近眼光场的显示效果。
综上所述，本公开实施例提供了一种显示模组，该显示模组包括至少具有反射电极的像素电极，该像素电极能够在像素电路的驱动下将液晶层透射的光线反射至液晶层，以便光线经液晶层射出，确保显示模组的正常显示。且，该像素电极覆盖像素电路，即该像素电极所在区域和像素电路所在区域可以重叠，如此相对于透射式显示模组，因无需单独预留区域专门设置像素电路，故可以有效提高显示模组的分辨率。
图23是本公开实施例提供的一种显示模组的驱动方法流程图，该方法可以应用于上述附图所示的显示模组中。该方法的执行前提是：设置显示模组具有沿列方向依次排布的多个显示分区，每个显示分区可以包括多行像素电路。如，参考图24，其示出的显示模组000共具有四个显示分区A11至A14。
继续参考图23可以看出，该方法可以包括：
步骤2301、对于多个显示分区中的至少一个目标显示分区，向目标显示分区中的多行像素电路逐行提供驱动信号。
其中，该驱动信号可以用于供像素电路向像素电极加载驱动电压。即，在本公开实施例中，可以分区驱动显示模组进行显示。如此，提高了显示灵活性。
可选的，显示模组还可以包括栅极驱动电路和源极驱动电路。结合图7所示实施例，栅极驱动电路可以与栅线电连接，源极驱动电路可以与数据线电连接。栅极驱动电路可以用于向栅线提供栅极驱动信号，源极驱动电路可以向数据线提供数据信号。基于此可知，在本公开实施例中，可以设置多个栅极驱动电路，多个栅极驱动电路与多个显示分区可以一一对应。每个栅极驱动电路可以单独向对应显示分区中的栅线逐行提供栅极驱动信号，进而使得电连接栅线的各行像素电路中驱动晶体管能够逐行开启，并向像素电极提供驱动信号。
可选的，结合图24，在本公开实施例中，各个显示分区包括的像素电路的行数可以相等，且向各个目标显示分区中的像素电路提供驱动信号的阶段可以重叠。如，各个栅极驱动电路可以同时向所对应的显示分区中的第i行提供栅极驱动信号，i大于等于1，且小于等于显示分区所包括的像素电路的行数。
可选的，每个显示分区中，同一列的像素电路可以与同一组数据线电连接， 且不同显示分区所电连接的数据线可以不同。每组数据线可以包括一条或多条数据线。如，结合图24，其示出的四个显示分区中，第一个显示分区A11中，同一列像素电路电连接的数据线为DATA1。第二个显示分区A12中，同一列像素电路电连接的数据线为DATA2。第三个显示分区A13中，同一列像素电路电连接的数据线为DATA3。第二个显示分区A14中，同一列像素电路电连接的数据线为DATA4。源极驱动电路可以向不同数据线提供不同电位的数据信号，如此可以使得各个显示分区的显示亮度不同，进一步提高显示灵活性。
结合图24所示显示模组和上述针对FHD显示模组的刷新率记载可知，原有的FHD需扫描1920行像素电路，在划分为4个显示分区中，每个分区内仅需扫描1920/4＝480行像素电路。在对4个显示分区同时刷新时，可以使得刷新时间由原来的1.92ms缩减至0.48ms。若发光二极管的开启时间保持为1.58ms液晶分子042的响应时间保持为2ms，则此时一帧扫描的时间可以为0.48+1.58+2＝4.06ms。三个不同颜色的画面扫描所需总时长为4.06*3＝12.18ms。如此，可以使得刷新率达到82Hz。进一步提高了刷新率，改善了显示效果。
综上所述，本公开实施例提供了一种显示模组的驱动方法，该方法中，显示模组可以被划分为多个显示分区，且对于多个显示分区中的至少一个目标显示分区，向目标显示分区中的多行像素电路逐行提供驱动信号。即可以实现对各个显示分区显示的单独控制，如此提高了显示灵活性。
图25是本公开实施例提供的一种显示装置的结构示意图。如图25所示，该显示装置可以包括：供电组件100，以及如上述附图所示的显示模组000。
其中，供电组件100可以与显示模组000电连接，供电组件100可以用于为显示模组000供电。
可选的，该显示装置可以为近眼光场显示装置。如，该显示装置可以为虚拟现实(virtual reality，VR)显示装置，且该VR显示装置可以为头戴式显示装置，如可以为VR眼镜。或者，该显示装置可以为增强现实(augmented reality，AR)显示装置。当然，在一些实施例中，该显示装置也可以为手机、平板电脑、电视机、显示器、笔记本电脑或导航仪等任何具有显示功能的产品或部件。
以上所述仅为本公开的可选实施例，并不用以限制本公开，凡在本公开的 精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (23)

  1. 一种显示模组，所述显示模组包括：
    衬底基板；
    以及，位于所述衬底基板的一侧，且沿远离所述衬底基板的方向依次设置的阵列排布的多个像素电路、阵列排布的多个像素电极、液晶层和光源；所述像素电路至少包括驱动晶体管，所述驱动晶体管具有栅极、第一极和第二极；所述像素电极至少包括反射电极；
    其中，所述多个像素电极与所述多个像素电路一一对应电连接，且至少一个所述像素电路在所述衬底基板上的正投影位于对应的所述像素电极在所述衬底基板上的正投影内；所述像素电极用于将所述液晶层透射的光线反射至所述液晶层，以使所述光线从所述液晶层远离所述衬底基板的一侧射出。
  2. 根据权利要求1所述的显示模组，其中，所述驱动晶体管的栅极与栅线电连接，所述驱动晶体管的第一极与数据线电连接，所述驱动晶体管的第二极与所述像素电极电连接；所述像素电极覆盖所述数据线与所述栅线。
  3. 根据权利要求2所述的显示模组，其中，位于同一列的多个所述像素电路包括的驱动晶体管与两条数据线电连接，所述像素电极覆盖所述两条数据线。
  4. 根据权利要求1至3任一所述的显示模组，其中，所述像素电极还包括：位于所述反射电极远离所述衬底基板一侧的透明电极；所述显示模组还包括：
    位于所述反射电极与所述像素电路之间，且沿远离所述衬底基板的方向依次设置的第一平坦层和凸起层；
    以及，位于所述反射电极与所述透明电极之间的第二平坦层；
    其中，所述凸起层远离所述衬底基板的一侧具有多个凸起；所述反射电极与所述像素电路通过贯穿所述凸起层和所述第一平坦层的第一过孔电连接，且所述反射电极与所述透明电极通过贯穿所述第二平坦层的第二过孔电连接。
  5. 根据权利要求4所述的显示模组，其中，所述第一过孔与所述第二过孔间 隔设置，且所述第一过孔在所述衬底基板上的正投影与所述第二过孔在所述衬底基板上的正投影不重叠。
  6. 根据权利要求4所述的显示模组，其中，所述凸起的凸起方向为远离所述衬底基板的方向，所述凸起垂直于所述衬底基板的截面呈弧形，且多个所述凸起在所述衬底基板上的正投影与一个所述像素电路在所述衬底基板上的正投影重叠。
  7. 根据权利要求6所述的显示模组，其中，所述凸起的坡度角大于等于30度，且小于等于60度；
    且，每相邻两个所述凸起的间隔，与所述每相邻两个所述凸起中，各个所述凸起在所述衬底基板上的正投影的直径之比小于等于1。
  8. 根据权利要求4所述的显示模组，其中，所述多个凸起阵列排布；
    或者，所述多个凸起包括按照第一方向排布的多个凸起组，每个所述凸起组包括按照第二方向排布的至少两个所述凸起，所述第二方向与所述第一方向的夹角为锐角。
  9. 根据权利要求4所述的显示模组，其中，所述凸起层的材料包括：树脂；所述反射电极的材料包括：金属银；所述透明电极的材料包括：氧化铟锡；
    并且，所述反射电极远离所述衬底基板一侧的表面的形貌与所述凸起层远离所述衬底基板一侧的表面的形貌相同；
    所述反射电极包括：绝缘设置的多个反射电极块，每个所述反射电极块对应覆盖一个所述像素电路。
  10. 根据权利要求1至9任一所述的显示模组，其中，所述液晶层包括：沿远离所述衬底基板的方向依次设置的第一取向层、所述液晶分子和第二取向层；
    以及，位于所述第一取向层与所述第二取向层之间的支撑层，所述支撑层的厚度大于等于1微米，且小于等于2微米。
  11. 根据权利要求10所述的显示模组，其中，所述液晶层还包括：位于所述第二取向层远离所述衬底基板的一侧，且沿远离所述衬底基板的方向依次设置的公共电极、第三平坦层、第一黑矩阵层、封装盖板和复合光学膜；
    其中，所述第一黑矩阵层在所述衬底基板上的正投影覆盖所述支撑层在所述衬底基板上的正投影。
  12. 根据权利要求11所述的显示模组，其中，所述复合光学膜包括：线偏光片、四分之一波片和二分之一波片；
    其中，所述线偏光片的光吸收轴与目标轴的夹角θ pol，所述四分之一波片的慢轴与所述目标轴的夹角θ 1/2，以及所述二分之一波片的慢轴与所述目标轴的夹角θ 1/4满足：θ pol-2θ 1/2+θ 1/4＝45度。
  13. 根据权利要求1至12任一所述的显示模组，其中，所述光源为直下式光源；所述直下式光源包括：沿远离所述衬底基板的方向依次设置的填充层，多个发光单元和多个第二黑矩阵层；
    其中，一个所述第二黑矩阵层在所述衬底基板上的正投影与一个所述发光单元在所述衬底基板上的正投影重叠。
  14. 根据权利要求13所述的显示模组，其中，每个所述像素电极与所述液晶层包括的公共电极形成一个像素；
    每个所述发光单元包括多个发光二极管，且一个所述发光二极管在所述衬底基板上的正投影与多个所述像素在所述衬底基板上的正投影重叠。
  15. 根据权利要求14所述的显示模组，其中，一个所述发光二极管在所述衬底基板上的正投影与5行5列个所述像素在所述衬底基板上的正投影重叠。
  16. 根据权利要求13所述的显示模组，其中，每个所述发光单元包括红色发光二极管、蓝色发光二极管和绿色发光二极管；
    其中，每个所述发光单元中的所述红色发光二极管、所述蓝色发光二极管和所述绿色发光二极管沿行方向排布；
    或者，每个所述发光单元中的所述红色发光二极管、所述蓝色发光二极管和所述绿色发光二极管呈三角形排布；
    或者，每个所述发光单元包括两个所述绿色发光二极管，且每个所述发光单元中的所述红色发光二极管、所述蓝色发光二极管和两个所述绿色发光二极管呈矩形排布。
  17. 根据权利要求1至16任一所述的显示模组，其中，所述显示模组还包括：位于所述光源远离所述衬底基板一侧且阵列排布的多个透镜；
    其中，一个所述透镜在所述衬底基板上的正投影与所述显示模组中的多个像素在所述衬底基板上的正投影重叠，所述透镜用于透射所述光线。
  18. 根据权利要求17所述的显示模组，其中，所述反射电极位于所述阵列排布的多个透镜的焦平面内。
  19. 根据权利要求17所述的显示模组，其中，所述透镜的焦距大于等于2毫米，且小于等于10毫米；
    且，所述透镜的孔径大于等于0.5毫米，且小于等于1毫米。
  20. 根据权利要求1至19任一所述的显示模组，其中，所述显示模组还包括：位于所述液晶层与所述光源之间的光扩散层。
  21. 一种显示模组的驱动方法，其中，所述显示模组具有沿列方向依次排布的多个显示分区，每个所述显示分区包括多行像素电路；所述方法包括：
    对于所述多个显示分区中的至少一个目标显示分区，向所述目标显示分区中的多行像素电路逐行提供驱动信号，所述驱动信号用于供所述像素电路向像素电极加载驱动电压。
  22. 根据权利要求21所述的方法，其中，各个所述显示分区包括的像素电路的行数相等，且向各个所述目标显示分区中的像素电路提供驱动信号的阶段重叠。
  23. 一种显示装置，其中，所述显示装置为近眼光场显示装置，且所述近眼光场显示装置包括如权利要求1至20任一所述的显示模组。
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