WO2023249000A1 - Semiconductor module - Google Patents

Semiconductor module Download PDF

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Publication number
WO2023249000A1
WO2023249000A1 PCT/JP2023/022703 JP2023022703W WO2023249000A1 WO 2023249000 A1 WO2023249000 A1 WO 2023249000A1 JP 2023022703 W JP2023022703 W JP 2023022703W WO 2023249000 A1 WO2023249000 A1 WO 2023249000A1
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WO
WIPO (PCT)
Prior art keywords
substrate
semiconductor module
main surface
cooler
heat transfer
Prior art date
Application number
PCT/JP2023/022703
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French (fr)
Japanese (ja)
Inventor
諒 前田
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ニデック株式会社
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Publication of WO2023249000A1 publication Critical patent/WO2023249000A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/427—Cooling by change of state, e.g. use of heat pipes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/20—Modifications to facilitate cooling, ventilating, or heating

Definitions

  • the present disclosure relates to a semiconductor module.
  • Patent Document 1 there is a semiconductor module configured to radiate heat emitted from semiconductor elements by disposing heat radiating members on both the front and back sides of a plurality of substrates on which semiconductor elements are provided (for example, Patent Document 1 and Patent Document 1) (See Reference 2).
  • a semiconductor module in which heat dissipation members are arranged on both the front and back sides of a plurality of substrates has room for improvement in terms of cooling efficiency.
  • the present disclosure provides a semiconductor module that can improve cooling efficiency.
  • a semiconductor module includes a first substrate, a second substrate, and a cooler.
  • the first substrate has a first semiconductor element provided on one main surface and a cooling plate provided on the other main surface.
  • the second substrate is arranged to face the first substrate, and a second semiconductor element is provided on one main surface facing the one main surface of the first substrate, and a second semiconductor element is provided on the other main surface.
  • a cooling plate is provided.
  • a cooler is disposed between the first substrate and the second substrate, and the cooler has a surface facing at least the one main surface of the first substrate and the one main surface of the second substrate in the heat transfer section. is covered with an insulating layer.
  • FIG. 1 is a diagram showing a circuit configuration of a semiconductor module according to an embodiment.
  • FIG. 2 is a plan view of the semiconductor module according to the embodiment.
  • FIG. 3 is a side view of the semiconductor module according to the embodiment.
  • FIG. 4 is a side view of the semiconductor module according to the embodiment.
  • FIG. 5 is a plan view of a cooler according to a first modification of the embodiment.
  • FIG. 6 is a sectional view of a cooler according to a first modification of the embodiment.
  • FIG. 7 is a plan view of a cooler according to a second modification of the embodiment.
  • FIG. 8 is a sectional view of a cooler according to a second modification of the embodiment.
  • each of the drawings referred to below shows an orthogonal coordinate system in which the X-axis direction, Y-axis direction, and Z-axis direction that are orthogonal to each other are defined, and the positive Z-axis direction is the vertically upward direction. There are cases.
  • FIG. 1 is a diagram showing a circuit configuration of a semiconductor module 1 according to an embodiment.
  • the semiconductor module 1 constitutes a part of a power conversion device that converts DC power supplied from a DC power source into AC power.
  • the semiconductor module 1 includes a power terminal 3, a circuit section 5, and an input/output terminal 7.
  • the power supply terminal 3 is a terminal connected to a DC power supply (not shown). Specifically, the power supply terminal 3 includes a positive terminal 31 connected to the positive side of the DC power supply and a negative terminal 32 connected to the negative side.
  • the circuit section 5 includes a transistor 52 and a diode 54 that are an example of a first semiconductor element, and a transistor 51 and a diode 53 that are an example of a second semiconductor element.
  • the two transistors 51 and 52 are connected in series between the positive terminal 31 and the negative terminal 32.
  • Diode 53 is connected in antiparallel to transistor 51.
  • Diode 54 is connected anti-parallel to transistor 52.
  • the transistors 51 and 52 are, for example, IGBTs. Further, the diodes 53 and 54 are free wheel diodes for protecting the IGBT. Note that the transistors 51 and 52 may be power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), GTO (Gate Turn-Off) thyristors, or the like.
  • MOSFETs Metal Oxide Semiconductor Field Effect Transistors
  • GTO Gate Turn-Off
  • the input/output terminal 7 includes a load terminal 71 and a control terminal 72.
  • the load terminal 71 is an output terminal for outputting AC power to a load such as a motor.
  • Load terminal 71 is connected to a connection node between two transistors 51 and 52.
  • the control terminal 72 is an input terminal into which a drive signal for driving the transistors 51 and 52 is input.
  • the two transistors 51 and 52 are alternately turned on in accordance with the drive signal input from the control terminal 72, so that the drive signal input between the positive terminal 31 and the negative terminal 32 is It converts DC power into AC power and outputs it from load terminal 71. Note that when two semiconductor modules 1 are connected in parallel, single-phase AC power can be generated, and when three semiconductor modules 1 are connected in parallel, three-phase AC power can be generated.
  • FIG. 2 is a plan view of the semiconductor module 1 according to the embodiment.
  • 3 and 4 are side views of the semiconductor module 1 according to the embodiment. Note that FIG. 3 is a side view of the semiconductor module 1 when the line of sight direction is the positive direction of the X-axis.
  • FIG. 4 is a side view of the semiconductor module 1 when the viewing direction is the positive direction of the Y-axis.
  • the semiconductor module 1 includes a first substrate 4 and a second substrate 6.
  • the first substrate 4 and the second substrate 6 include an insulating substrate and copper patterns provided on both the front and back surfaces of the insulating substrate.
  • the insulating substrate is, for example, a substrate made of an insulator such as alumina or silicon nitride.
  • the first substrate 4 and the second substrate 6 are arranged to face each other so as to overlap in the Z-axis direction.
  • the first substrate 4 is provided with a first semiconductor element on one main surface.
  • the first substrate 4 is provided with a first semiconductor element on its lower surface.
  • the first semiconductor elements are, for example, the transistor 52 and the diode 54.
  • a cooling plate 8 is provided on the other main surface of the first substrate 4.
  • the first substrate 4 is provided with a cooling plate 8 on its upper surface.
  • the cooling plate 8 is, for example, a copper plate.
  • the cooling plate 8 may be made of aluminum other than copper, or a material mainly composed of copper or aluminum, as long as it has heat dissipation properties.
  • the cooling plate 8 and the first substrate 4 are bonded together using solder 80 .
  • the second substrate 6 is arranged to face the first substrate 4, and has a second main surface on one main surface facing the one main surface on which the first semiconductor element is provided in the first substrate 4.
  • a semiconductor element is provided.
  • the second substrate 6 is provided with a second semiconductor element on its upper surface.
  • the second semiconductor elements are, for example, the transistor 51 and the diode 53.
  • a cooling plate 9 is provided on the other main surface of the second substrate 6.
  • the second substrate 6 is provided with a cooling plate 9 on its lower surface.
  • the cooling plate 9 is, for example, a copper plate.
  • the cooling plate 9 may be made of aluminum other than copper, or a material mainly composed of copper or aluminum, as long as it has heat dissipation properties.
  • the cooling plate 9 and the second substrate 6 are bonded together with solder 90.
  • the first substrate 4 and the second substrate 6 are supported by a conductive plate 41 and are electrically connected.
  • the conductive plate 41 is an arch-shaped plate having spring properties.
  • the conductive plate 41 is arranged so as to contact the second substrate 6 at both ends of the arch, and to contact the first substrate 4 at the center of the arch.
  • the second substrate 6 is connected to the negative terminal 32 (see FIG. 2) by a bus bar 61.
  • the first substrate 4 and the second substrate 6 are disposed facing each other so that the cooling plates 8 and 9 are exposed to the outside, and the positive terminal 31, the negative terminal 32, the load terminal 71, and the control terminal 72 protrude to the outside. It is resin-sealed with a sealing resin 2.
  • the semiconductor module 1 can cool the transistors 51 and 52, for example, by discharging heat generated inside to the outside from the cooling plates 8 and 9 provided on the upper and lower surfaces.
  • heat is trapped inside the sealing resin 2 only by heat dissipation from the cooling plates 8 and 9, and the cooling performance is insufficient.
  • the semiconductor module 1 includes a cooler 10 between the first substrate 4 and the second substrate 6.
  • the cooler 10 is arranged to cross the inside of the semiconductor module 1 in a direction parallel to the surface directions of the first substrate 4 and the second substrate 6.
  • the cooler 10 includes a heat transfer section 11 and an insulating layer 12.
  • the heat transfer unit 11 includes, for example, a vapor chamber, a heat pipe, a heat sink, or a cooling pipe through which a refrigerant circulates.
  • the refrigerant includes, for example, LLC (Long Life Coolant), insulating mineral oil, and synthetic oil.
  • the heat transfer section 11 protrudes toward the outside of the first substrate 4 and the second substrate 6 in the surface direction of the first substrate 4 and the second substrate 6, and connects to a cooling flow provided outside the semiconductor module 1 shown in FIG.
  • a protrusion 13 connected to the channel 100 is provided.
  • the heat transfer section 11 absorbs heat from the surface of the first substrate 4 on the side where the first semiconductor element is provided and the surface of the second substrate 6 on the side where the second semiconductor element is provided, The collected heat can be transferred to the cooling channel 100 and released to the outside of the semiconductor module 1.
  • the insulating layer 12 covers at least the surface of the heat transfer section 11 that faces one main surface of the first substrate 4 and one main surface of the second substrate 6. Specifically, the insulating layer 12 covers at least the main surface of the first substrate 4 on the side where the first semiconductor element is provided, among the surfaces of the heat transfer part 11, and the second semiconductor element on the second substrate 6. Coat the surface facing the main surface on the side where it is provided.
  • the insulating layer 12 covers the entire surface of the heat transfer section 11 except for the connection portion with the cooling channel 100.
  • the insulating layer 12 is, for example, a resin layer containing insulating fine particles.
  • the resin layer is made of a highly thermally conductive resin having a thermal conductivity of about 1 W/m ⁇ K, preferably 2 to 5 W/m ⁇ K, in order to improve heat dissipation.
  • the insulating fine particles contained in the insulating layer 12 include, for example, at least one of aluminum oxide particles, boron nitride particles, aluminum nitride particles, and silicon nitride particles.
  • the insulating fine particles are mixed with the main resin of the insulating layer 12 at a volume content of 50 to 90%.
  • the particle diameter of the insulating fine particles is preferably 10 to 200 ⁇ m. Thereby, the insulating layer 12 can improve thermal conductivity.
  • the insulating layer 12 may be a metal oxide film subjected to anodic oxidation.
  • the cooler 10 prevents short circuits between the first substrate 4 and the second substrate 6 by covering the surface of the heat transfer section 11 facing the first substrate 4 and the second substrate 6 with the insulating layer 12. (short circuit) can be prevented.
  • the first substrate 4 can be cooled from both the front and back sides by the cooling plate 8 and the cooler 10, and the second substrate 6 can be cooled from both the front and back sides by the cooling plate 9 and the cooler 10. can do. That is, according to the semiconductor module 1, cooling can be performed using three layers, that is, the two cooling plates 8 and 9 and the cooler 10, so that the cooling efficiency can be improved.
  • the first substrate 4 to which the transistor 52, the diode 54, the positive terminal 31, the control terminal 72, the conductive plate 41, etc. are attached is prepared. Further, a second substrate 6 to which a transistor 51, a diode 53, a load terminal 71, a negative terminal 32, a control terminal 72, a bus bar 61, etc. are attached is prepared.
  • the first substrate 4 and the second substrate 6 are arranged to face each other, and the cooler 10, in which the surface of the heat transfer section 11 is covered with an insulating layer 12 containing a semi-hardened insulating resin, is placed between the first substrate 4 and the second substrate 6. It is inserted between the second board 6 and the second board 6.
  • the first substrate 4 and the second substrate 6 are brought into contact with the insulating layer 12, and the insulating resin of the insulating layer 12 is cured with the cooler 10 sandwiched between the first substrate 4 and the second substrate 6. Thereby, in the semiconductor module 1, the first substrate 4 and the second substrate 6 are stably supported by the cooler 10. Thereafter, the semiconductor module 1 is resin-sealed with a sealing resin 2.
  • cooler 10 shown in FIGS. 2 to 4 is an example, and various modifications are possible.
  • a cooler according to a modification of the embodiment will be described with reference to FIGS. 5 to 8.
  • the cooler according to the modified example is arranged between the first substrate 4 and the second substrate 6, similar to the cooler 10 shown in FIGS. 2 to 4.
  • the cooler according to the modified example differs in the configuration of the cooler itself from the cooler 10 shown in FIGS. 2 to 4.
  • FIG. 5 is a plan view of a cooler 10A according to a first modification of the embodiment.
  • FIG. 6 is a sectional view of a cooler 10A according to a first modification of the embodiment.
  • FIG. 7 is a plan view of a cooler 10B according to a second modification of the embodiment.
  • FIG. 8 is a sectional view of a cooler 10B according to a second modification of the embodiment.
  • the entire surface of the heat transfer section 11A of the cooler 10A according to the first modification is covered with an insulating layer 12A.
  • the material of the insulating layer 12A is the same as that of the insulating layer 12 shown in FIGS. 2 to 4.
  • the cooler 10A is not connected to the cooling channel 100 provided outside the semiconductor module 1, but includes a protrusion 13 that protrudes from the sealing resin 2 of the semiconductor module 1 to the outside.
  • the heat transfer section 11A includes a vapor chamber, a heat pipe, a heat sink, or a cooling pipe through which a refrigerant circulates.
  • the cooler 10A transfers the heat absorbed inside the semiconductor module 1 to the protrusion 13 and releases it to the outside of the semiconductor module 1 while preventing short circuit between the first substrate 4 and the second substrate 6. can do.
  • the entire circumferential surface excluding the protrusion 13 is covered with an insulating layer 12B. That is, the surface of the protruding part 13 protruding from the sealing resin 2 in the heat transfer part 11B of the cooler 10B is exposed.
  • the material of the insulating layer 12B is the same as that of the insulating layer 12 shown in FIGS. 2 to 4.
  • the cooler 10B transfers the heat absorbed inside the semiconductor module 1 to the protrusion 13 and releases it to the outside of the semiconductor module 1 while preventing short circuit between the first substrate 4 and the second substrate 6. can do.
  • the protruding part 13 in the heat transfer part 11B is not covered with the insulating layer 12B, and the surface is exposed, so that the heat dissipation efficiency of the protruding part 13 can be further improved.
  • the present technology can have the following configuration.
  • a first substrate having a first semiconductor element provided on one main surface and a cooling plate provided on the other main surface;
  • a second semiconductor element is arranged to face the first substrate, a second semiconductor element is provided on one main surface facing the one main surface of the first substrate, and a cooling plate is provided on the other main surface.
  • a second substrate The heat transfer section is arranged between the first substrate and the second substrate, and at least a surface facing the one main surface of the first substrate and the one main surface of the second substrate is formed by an insulating layer.
  • a coated cooler semiconductor module.
  • the heat transfer section includes: the entire surface is covered with the insulating layer; The semiconductor module according to (1) above.
  • the heat transfer section includes: a protruding portion that protrudes outward from the first substrate and the second substrate in the surface direction of the first substrate and the second substrate and is connected to a cooling channel; The semiconductor module according to (1) or (2) above.
  • the heat transfer section includes: The semiconductor module according to any one of (1) to (3), including a vapor chamber, a heat pipe, a heat sink, or a cooling pipe through which a refrigerant circulates.
  • the insulating layer is A resin layer containing fine particles having insulating properties, The semiconductor module according to any one of (1) to (4) above.
  • the fine particles are Containing at least one of aluminum oxide particles, boron nitride particles, aluminum nitride particles, and silicon nitride particles, The semiconductor module according to (5) above.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thermal Sciences (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

A semiconductor module according to one aspect of the present disclosure comprises a first substrate, a second substrate, and a cooler. The first substrate is provided with a first semiconductor element on one main surface thereof, and is provided with a cooling plate on the other main surface thereof. The second substrate is disposed oppositely from the first substrate, is provided with a second semiconductor element on one main surface thereof that faces the one main surface of the first substrate, and is provided with a cooling plate on the other main surface thereof. The cooler is disposed between the first substrate and the second substrate and, at a heat transfer part, at least surfaces of the cooler which face the one main surface of the first substrate and the one main surface of the second substrate are covered with an insulation layer.

Description

半導体モジュールsemiconductor module
　本開示は、半導体モジュールに関する。 The present disclosure relates to a semiconductor module.
　従来、半導体素子が設けられる複数の基板の表裏両面側に放熱部材が配置されることによって、半導体素子から発せられる熱を放熱させるように構成される半導体モジュールがある（例えば、特許文献１および特許文献２参照）。 Conventionally, there is a semiconductor module configured to radiate heat emitted from semiconductor elements by disposing heat radiating members on both the front and back sides of a plurality of substrates on which semiconductor elements are provided (for example, Patent Document 1 and Patent Document 1) (See Reference 2).
日本国公開公報：特開２００１－１５６２１９号公報Japanese publication: Japanese Patent Application Publication No. 2001-156219 日本国公開公報：特開２００１－１５６２２５号公報Japanese publication: Japanese Patent Application Publication No. 2001-156225
　しかしながら、複数の基板の表裏両面側に放熱部材が配置される半導体モジュールは、冷却効率の観点において改善の余地がある。 However, a semiconductor module in which heat dissipation members are arranged on both the front and back sides of a plurality of substrates has room for improvement in terms of cooling efficiency.
　本開示は、冷却効率を向上できる半導体モジュールを提供する。 The present disclosure provides a semiconductor module that can improve cooling efficiency.
　本開示の一態様による半導体モジュールは、第１基板と、第２基板と、冷却器とを備える。第１基板は、一方の主面に第１の半導体素子が設けられ、他方の主面に冷却板が設けられる。第２基板は、前記第１基板に対して対向するように配置され、前記第１基板の前記一方の主面に面する一方の主面に第２の半導体素子が設けられ、他方の主面に冷却板が設けられる。冷却器は、前記第１基板と前記第２基板との間に配置され、熱移送部における少なくとも前記第１基板の前記一方の主面および前記第２基板の前記一方の主面に面する表面が絶縁層によって被覆される。 A semiconductor module according to one aspect of the present disclosure includes a first substrate, a second substrate, and a cooler. The first substrate has a first semiconductor element provided on one main surface and a cooling plate provided on the other main surface. The second substrate is arranged to face the first substrate, and a second semiconductor element is provided on one main surface facing the one main surface of the first substrate, and a second semiconductor element is provided on the other main surface. A cooling plate is provided. A cooler is disposed between the first substrate and the second substrate, and the cooler has a surface facing at least the one main surface of the first substrate and the one main surface of the second substrate in the heat transfer section. is covered with an insulating layer.
　本開示によれば、冷却効率を向上できる半導体モジュールを提供することができる。 According to the present disclosure, it is possible to provide a semiconductor module that can improve cooling efficiency.
図１は、実施形態に係る半導体モジュールの回路構成を示す図である。FIG. 1 is a diagram showing a circuit configuration of a semiconductor module according to an embodiment. 図２は、実施形態に係る半導体モジュールの平面図である。FIG. 2 is a plan view of the semiconductor module according to the embodiment. 図３は、実施形態に係る半導体モジュールの側面図である。FIG. 3 is a side view of the semiconductor module according to the embodiment. 図４は、実施形態に係る半導体モジュールの側面図である。FIG. 4 is a side view of the semiconductor module according to the embodiment. 図５は、実施形態の第１変形例に係る冷却器の平面図である。FIG. 5 is a plan view of a cooler according to a first modification of the embodiment. 図６は、実施形態の第１変形例に係る冷却器の断面図である。FIG. 6 is a sectional view of a cooler according to a first modification of the embodiment. 図７は、実施形態の第２変形例に係る冷却器の平面図である。FIG. 7 is a plan view of a cooler according to a second modification of the embodiment. 図８は、実施形態の第２変形例に係る冷却器の断面図である。FIG. 8 is a sectional view of a cooler according to a second modification of the embodiment.
　以下に、本開示による半導体モジュールを実施するための形態（以下、「実施形態」と記載する）について図面を参照しつつ詳細に説明する。なお、この実施形態により本開示が限定されるものではない。また、各実施形態は、処理内容を矛盾させない範囲で適宜組み合わせることが可能である。また、以下の各実施形態において、同一の機能を担う構成要素については、同一の符号を付することにより、重複する説明を省略する。 Hereinafter, embodiments for implementing the semiconductor module according to the present disclosure (hereinafter referred to as "embodiments") will be described in detail with reference to the drawings. Note that the present disclosure is not limited to this embodiment. Moreover, each embodiment can be combined as appropriate within a range that does not conflict with the processing contents. Furthermore, in each of the embodiments below, the same reference numerals are given to the constituent elements that have the same functions, and redundant explanation will be omitted.
　また、以下に示す実施形態では、「一定」、「直交」、「垂直」あるいは「平行」といった表現が用いられる場合があるが、これらの表現は、厳密に「一定」、「直交」、「垂直」あるいは「平行」であることを要しない。すなわち、上記した各表現は、例えば製造精度、設置精度などのずれを許容するものとする。 In addition, in the embodiments described below, expressions such as "constant", "orthogonal", "perpendicular", or "parallel" may be used, but these expressions strictly do not mean "constant", "orthogonal", "parallel", etc. They do not need to be "perpendicular" or "parallel". That is, each of the above expressions allows for deviations in manufacturing accuracy, installation accuracy, etc., for example.
　また、以下参照する各図面では、説明を分かりやすくするために、互いに直交するＸ軸方向、Ｙ軸方向およびＺ軸方向を規定し、Ｚ軸正方向を鉛直上向き方向とする直交座標系を示す場合がある。 In addition, in order to make the explanation easier to understand, each of the drawings referred to below shows an orthogonal coordinate system in which the X-axis direction, Y-axis direction, and Z-axis direction that are orthogonal to each other are defined, and the positive Z-axis direction is the vertically upward direction. There are cases.
＜実施形態に係る半導体モジュールの回路構成＞
　まず、実施形態に係る半導体モジュールの回路構成について図１を参照して説明する。図１は実施形態に係る半導体モジュール１の回路構成を示す図である。 <Circuit configuration of semiconductor module according to embodiment>
First, a circuit configuration of a semiconductor module according to an embodiment will be described with reference to FIG. 1. FIG. 1 is a diagram showing a circuit configuration of a semiconductor module 1 according to an embodiment.
　実施形態に係る半導体モジュール１は、直流電源から供給される直流電力を交流電力に変換する電力変換装置の一部を構成する。 The semiconductor module 1 according to the embodiment constitutes a part of a power conversion device that converts DC power supplied from a DC power source into AC power.
　図１に示すように、実施形態に係る半導体モジュール１は、電源端子３と、回路部５と、入出力端子７とを備える。 As shown in FIG. 1, the semiconductor module 1 according to the embodiment includes a power terminal 3, a circuit section 5, and an input/output terminal 7.
　電源端子３は、図示しない直流電源に接続される端子である。具体的には、電源端子３は、直流電源の正極側に接続される正極端子３１と負極側に接続される負極端子３２とを備える。 The power supply terminal 3 is a terminal connected to a DC power supply (not shown). Specifically, the power supply terminal 3 includes a positive terminal 31 connected to the positive side of the DC power supply and a negative terminal 32 connected to the negative side.
　回路部５は、第１半導体素子の一例であるトランジスタ５２、および、ダイオード５４と、第２半導体素子の一例であるトランジスタ５１、および、ダイオード５３とを含む。２つのトランジスタ５１，５２は、正極端子３１と負極端子３２との間に直列に接続される。ダイオード５３は、トランジスタ５１に逆並列に接続される。ダイオード５４は、トランジスタ５２に逆並列に接続される。 The circuit section 5 includes a transistor 52 and a diode 54 that are an example of a first semiconductor element, and a transistor 51 and a diode 53 that are an example of a second semiconductor element. The two transistors 51 and 52 are connected in series between the positive terminal 31 and the negative terminal 32. Diode 53 is connected in antiparallel to transistor 51. Diode 54 is connected anti-parallel to transistor 52.
　トランジスタ５１，５２は、例えば、ＩＧＢＴである。また、ダイオード５３，５４は、ＩＧＢＴを保護するための還流ダイオードである。なお、トランジスタ５１，５２は、パワーＭＯＳＦＥＴ（Metal　Oxide　Semiconductor　Field　Effect　Transistor）またはＧＴＯ（Gate　Turn-Off）サイリスタなどであってもよい。 The transistors 51 and 52 are, for example, IGBTs. Further, the diodes 53 and 54 are free wheel diodes for protecting the IGBT. Note that the transistors 51 and 52 may be power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), GTO (Gate Turn-Off) thyristors, or the like.
　入出力端子７は、負荷端子７１と、制御端子７２とを含む。負荷端子７１は、モータ等の負荷に対して交流電力を出力するための出力端子である。負荷端子７１は、２つのトランジスタ５１，５２の間の接続ノードに接続される。制御端子７２は、トランジスタ５１，５２を駆動させるための駆動信号が入力される入力端子である。 The input/output terminal 7 includes a load terminal 71 and a control terminal 72. The load terminal 71 is an output terminal for outputting AC power to a load such as a motor. Load terminal 71 is connected to a connection node between two transistors 51 and 52. The control terminal 72 is an input terminal into which a drive signal for driving the transistors 51 and 52 is input.
　上記のように構成された半導体モジュール１は、制御端子７２から入力される駆動信号に従って２つのトランジスタ５１，５２を交互にオンすることにより、正極端子３１と負極端子３２との間に入力された直流電力を交流電力に変換して負荷端子７１から出力する。なお、２つの半導体モジュール１を並列に接続した場合、単相交流電力を生成することができ、３つの半導体モジュール１を並列に接続した場合には、３相交流電力を生成することができる。 In the semiconductor module 1 configured as described above, the two transistors 51 and 52 are alternately turned on in accordance with the drive signal input from the control terminal 72, so that the drive signal input between the positive terminal 31 and the negative terminal 32 is It converts DC power into AC power and outputs it from load terminal 71. Note that when two semiconductor modules 1 are connected in parallel, single-phase AC power can be generated, and when three semiconductor modules 1 are connected in parallel, three-phase AC power can be generated.
＜実施形態に係る半導体モジュールの構造＞
　次に、図２～図４を参照して、実施形態に係る半導体モジュール１の構造について説明する。 <Structure of semiconductor module according to embodiment>
Next, the structure of the semiconductor module 1 according to the embodiment will be described with reference to FIGS. 2 to 4.
　図２は、実施形態に係る半導体モジュール１の平面図である。図３および図４は、実施形態に係る半導体モジュール１の側面図である。なお、図３は、視線方向がＸ軸の正方向である場合の半導体モジュール１の側面図である。図４は、視線方向がＹ軸の正方向である場合の半導体モジュール１の側面図である。 FIG. 2 is a plan view of the semiconductor module 1 according to the embodiment. 3 and 4 are side views of the semiconductor module 1 according to the embodiment. Note that FIG. 3 is a side view of the semiconductor module 1 when the line of sight direction is the positive direction of the X-axis. FIG. 4 is a side view of the semiconductor module 1 when the viewing direction is the positive direction of the Y-axis.
　図２～図４に示すように、半導体モジュール１は、第１基板４と、第２基板６とを備える。第１基板４および第２基板６は、絶縁基板と、絶縁基板の表裏両面に設けられる銅パターンとを含む。絶縁基板は、例えば、アルミナまたは窒化シリコンなどの絶縁体によって構成される基板である。第１基板４と第２基板６とは、Ｚ軸方向において重なるように対向配置される。 As shown in FIGS. 2 to 4, the semiconductor module 1 includes a first substrate 4 and a second substrate 6. The first substrate 4 and the second substrate 6 include an insulating substrate and copper patterns provided on both the front and back surfaces of the insulating substrate. The insulating substrate is, for example, a substrate made of an insulator such as alumina or silicon nitride. The first substrate 4 and the second substrate 6 are arranged to face each other so as to overlap in the Z-axis direction.
　第１基板４は、一方の主面に第１の半導体素子が設けられる。図３および図４に示す例では、第１基板４は、下面に第１の半導体素子が設けられる。第１の半導体素子は、例えば、トランジスタ５２、および、ダイオード５４である。 The first substrate 4 is provided with a first semiconductor element on one main surface. In the example shown in FIGS. 3 and 4, the first substrate 4 is provided with a first semiconductor element on its lower surface. The first semiconductor elements are, for example, the transistor 52 and the diode 54.
　第１基板４は、他方の主面に冷却板８が設けられる。図３および図４に示す例では、第１基板４は、上面に冷却板８が設けられる。冷却板８は、例えば、銅板である。冷却板８は、放熱性を有する材料であれば、銅以外のアルミニウムや、銅やアルミニウムを主成分とする材料によって構成されてもよい。冷却板８と第１基板４とは、半田８０によって接着される。 A cooling plate 8 is provided on the other main surface of the first substrate 4. In the example shown in FIGS. 3 and 4, the first substrate 4 is provided with a cooling plate 8 on its upper surface. The cooling plate 8 is, for example, a copper plate. The cooling plate 8 may be made of aluminum other than copper, or a material mainly composed of copper or aluminum, as long as it has heat dissipation properties. The cooling plate 8 and the first substrate 4 are bonded together using solder 80 .
　第２基板６は、第１基板４に対して対向するように配置され、第１基板４における第１の半導体素子が設けられる一方の主面に面する側の一方の主面に第２の半導体素子が設けられる。図３および図４に示す例では、第２基板６は、上面に第２の半導体素子が設けられる。第２の半導体素子は、例えば、トランジスタ５１、および、ダイオード５３である。 The second substrate 6 is arranged to face the first substrate 4, and has a second main surface on one main surface facing the one main surface on which the first semiconductor element is provided in the first substrate 4. A semiconductor element is provided. In the example shown in FIGS. 3 and 4, the second substrate 6 is provided with a second semiconductor element on its upper surface. The second semiconductor elements are, for example, the transistor 51 and the diode 53.
　第２基板６は、他方の主面に冷却板９が設けられる。図３および図４に示す例では、第２基板６は、下面に冷却板９が設けられる。冷却板９は、例えば、銅板である。冷却板９は、放熱性を有する材料であれば、銅以外のアルミニウムや、銅やアルミニウムを主成分とする材料によって構成されてもよい。冷却板９と第２基板６とは、半田９０によって接着される。 A cooling plate 9 is provided on the other main surface of the second substrate 6. In the example shown in FIGS. 3 and 4, the second substrate 6 is provided with a cooling plate 9 on its lower surface. The cooling plate 9 is, for example, a copper plate. The cooling plate 9 may be made of aluminum other than copper, or a material mainly composed of copper or aluminum, as long as it has heat dissipation properties. The cooling plate 9 and the second substrate 6 are bonded together with solder 90.
　第１基板４と第２基板６とは、導電性板４１によって支持されると共に、電気的に接続される。導電性板４１は、バネ性を有するアーチ状の板体である。導電性板４１は、アーチの両端部において第２基板６に当接し、アーチの中央部において第１基板４に当接するように配置される。第２基板６は、バスバー６１よって負極端子３２（図２参照）に接続される。 The first substrate 4 and the second substrate 6 are supported by a conductive plate 41 and are electrically connected. The conductive plate 41 is an arch-shaped plate having spring properties. The conductive plate 41 is arranged so as to contact the second substrate 6 at both ends of the arch, and to contact the first substrate 4 at the center of the arch. The second substrate 6 is connected to the negative terminal 32 (see FIG. 2) by a bus bar 61.
　第１基板４および第２基板６は、対向配置された状態で冷却板８，９が外部に露出し、正極端子３１、負極端子３２、負荷端子７１、および制御端子７２が外部に突出するように封止樹脂２によって樹脂封止される。 The first substrate 4 and the second substrate 6 are disposed facing each other so that the cooling plates 8 and 9 are exposed to the outside, and the positive terminal 31, the negative terminal 32, the load terminal 71, and the control terminal 72 protrude to the outside. It is resin-sealed with a sealing resin 2.
　これにより、半導体モジュール１は、内部で発生する熱を上下両面に設けられる冷却板８，９から外部へ放出することによって、例えば、トランジスタ５１，５２を冷却することができる。しかし、半導体モジュール１は、冷却板８，９からの放熱だけでは、封止樹脂２よりも内側に熱がこもり、冷却性能としては不十分である。 Thereby, the semiconductor module 1 can cool the transistors 51 and 52, for example, by discharging heat generated inside to the outside from the cooling plates 8 and 9 provided on the upper and lower surfaces. However, in the semiconductor module 1, heat is trapped inside the sealing resin 2 only by heat dissipation from the cooling plates 8 and 9, and the cooling performance is insufficient.
　そこで、半導体モジュール１は、第１基板４と第２基板６との間に、冷却器１０を備える。冷却器１０は、半導体モジュール１の内部を、第１基板４および第２基板６の面方向と平行な方向に横断するように配置される。 Therefore, the semiconductor module 1 includes a cooler 10 between the first substrate 4 and the second substrate 6. The cooler 10 is arranged to cross the inside of the semiconductor module 1 in a direction parallel to the surface directions of the first substrate 4 and the second substrate 6.
　冷却器１０は、熱移送部１１と、絶縁層１２とを含む。熱移送部１１は、例えば、ベーパーチャンバ、ヒートパイプ、ヒートシンク、または、内部を冷媒が還流する冷却管を含む。冷媒は、例えば、ＬＬＣ（Long　Life　Coolant）や絶縁性の鉱物油、化学合成油を含む。 The cooler 10 includes a heat transfer section 11 and an insulating layer 12. The heat transfer unit 11 includes, for example, a vapor chamber, a heat pipe, a heat sink, or a cooling pipe through which a refrigerant circulates. The refrigerant includes, for example, LLC (Long Life Coolant), insulating mineral oil, and synthetic oil.
　熱移送部１１は、第１基板４および第２基板６の面方向において、第１基板４および第２基板６の外側へ向けて突出し、図２に示す半導体モジュール１の外部に設けられる冷却流路１００に接続される突出部１３を備える。 The heat transfer section 11 protrudes toward the outside of the first substrate 4 and the second substrate 6 in the surface direction of the first substrate 4 and the second substrate 6, and connects to a cooling flow provided outside the semiconductor module 1 shown in FIG. A protrusion 13 connected to the channel 100 is provided.
　これにより、熱移送部１１は、第１基板４における第１の半導体素子が設けられる側の面、および、第２基板６における第２の半導体素子が設けられる側の面から熱を吸収し、収集した熱を冷却流路１００へ移送して半導体モジュール１の外部へ放出できる。 Thereby, the heat transfer section 11 absorbs heat from the surface of the first substrate 4 on the side where the first semiconductor element is provided and the surface of the second substrate 6 on the side where the second semiconductor element is provided, The collected heat can be transferred to the cooling channel 100 and released to the outside of the semiconductor module 1.
　絶縁層１２は、熱移送部１１における少なくとも第１基板４の一方の主面および第２基板６の一方の主面に面する表面を被覆する。具体的には、絶縁層１２は、熱移送部１１の表面のうち、少なくとも第１基板４における第１の半導体素子が設けられる側の主面、および、第２基板６における第２の半導体素子が設けられる側の主面に面する表面を被覆する。 The insulating layer 12 covers at least the surface of the heat transfer section 11 that faces one main surface of the first substrate 4 and one main surface of the second substrate 6. Specifically, the insulating layer 12 covers at least the main surface of the first substrate 4 on the side where the first semiconductor element is provided, among the surfaces of the heat transfer part 11, and the second semiconductor element on the second substrate 6. Coat the surface facing the main surface on the side where it is provided.
　図２～図４に示す例では、絶縁層１２は、熱移送部１１における冷却流路１００との接続部を除く表面全体を被覆する。絶縁層１２は、例えば、絶縁性を有する微粒子を含む樹脂層である。樹脂層は、放熱性を高めるために熱伝導率が１Ｗ／ｍ・Ｋ程度、好ましくは２～５Ｗ／ｍ・Ｋの高熱伝導樹脂である。 In the examples shown in FIGS. 2 to 4, the insulating layer 12 covers the entire surface of the heat transfer section 11 except for the connection portion with the cooling channel 100. The insulating layer 12 is, for example, a resin layer containing insulating fine particles. The resin layer is made of a highly thermally conductive resin having a thermal conductivity of about 1 W/m·K, preferably 2 to 5 W/m·K, in order to improve heat dissipation.
　絶縁層１２に含まれる絶縁性の微粒子は、例えば、酸化アルミニウムの粒子、窒化ホウ素の粒子、窒化アルミニウムの粒子、および、窒化ケイ素の粒子のうち、少なくともいずれか一つを含む。絶縁性の微粒子は、絶縁層１２の主剤樹脂に対して５０～９０％の体積含有率で混合される。絶縁性の微粒子の粒子径は、１０～２００μｍが望ましい。これにより、絶縁層１２は、熱伝導率を向上できる。なお、絶縁層１２は、陽極酸化をした酸化金属膜であってもよい。 The insulating fine particles contained in the insulating layer 12 include, for example, at least one of aluminum oxide particles, boron nitride particles, aluminum nitride particles, and silicon nitride particles. The insulating fine particles are mixed with the main resin of the insulating layer 12 at a volume content of 50 to 90%. The particle diameter of the insulating fine particles is preferably 10 to 200 μm. Thereby, the insulating layer 12 can improve thermal conductivity. Note that the insulating layer 12 may be a metal oxide film subjected to anodic oxidation.
　このように、冷却器１０は、熱移送部１１における第１基板４および第２基板６に面する表面が絶縁層１２によって被覆されることによって、第１基板４と第２基板６とのショート（短絡）を防止できる。 In this manner, the cooler 10 prevents short circuits between the first substrate 4 and the second substrate 6 by covering the surface of the heat transfer section 11 facing the first substrate 4 and the second substrate 6 with the insulating layer 12. (short circuit) can be prevented.
　半導体モジュール１によれば、第１基板４を冷却板８と冷却器１０とによって、表裏両面から冷却することができ、第２基板６を冷却板９と冷却器１０とによって、表裏両面から冷却することができる。つまり、半導体モジュール１によれば、２枚の冷却板８，９と、冷却器１０との３層によって冷却できるので、冷却効率を向上できる。 According to the semiconductor module 1, the first substrate 4 can be cooled from both the front and back sides by the cooling plate 8 and the cooler 10, and the second substrate 6 can be cooled from both the front and back sides by the cooling plate 9 and the cooler 10. can do. That is, according to the semiconductor module 1, cooling can be performed using three layers, that is, the two cooling plates 8 and 9 and the cooler 10, so that the cooling efficiency can be improved.
　また、半導体モジュール１を製造する場合には、トランジスタ５２、ダイオード５４、正極端子３１、制御端子７２、および導電性板４１などが取り付けられた第１基板４を用意する。さらに、トランジスタ５１、ダイオード５３、負荷端子７１、負極端子３２、制御端子７２、およびバスバー６１などが取り付けられた第２基板６を用意する。 Further, when manufacturing the semiconductor module 1, the first substrate 4 to which the transistor 52, the diode 54, the positive terminal 31, the control terminal 72, the conductive plate 41, etc. are attached is prepared. Further, a second substrate 6 to which a transistor 51, a diode 53, a load terminal 71, a negative terminal 32, a control terminal 72, a bus bar 61, etc. are attached is prepared.
　そして、第１基板４と第２基板６とを対向配置し、熱移送部１１の表面が半硬化状態の絶縁性樹脂を含む絶縁層１２によって被覆された冷却器１０を、第１基板４と第２基板６との間に挿入する。 Then, the first substrate 4 and the second substrate 6 are arranged to face each other, and the cooler 10, in which the surface of the heat transfer section 11 is covered with an insulating layer 12 containing a semi-hardened insulating resin, is placed between the first substrate 4 and the second substrate 6. It is inserted between the second board 6 and the second board 6.
　その後、第１基板４および第２基板６を絶縁層１２に当接させ、第１基板４および第２基板６によって冷却器１０を挟み込んだ状態で絶縁層１２の絶縁性樹脂を硬化させる。これにより、半導体モジュール１は、冷却器１０によって第１基板４および第２基板６が安定的に支持される。その後、半導体モジュール１は、封止樹脂２によって樹脂封止される。 Thereafter, the first substrate 4 and the second substrate 6 are brought into contact with the insulating layer 12, and the insulating resin of the insulating layer 12 is cured with the cooler 10 sandwiched between the first substrate 4 and the second substrate 6. Thereby, in the semiconductor module 1, the first substrate 4 and the second substrate 6 are stably supported by the cooler 10. Thereafter, the semiconductor module 1 is resin-sealed with a sealing resin 2.
　なお、図２～図４に示す冷却器１０は、一例であり種々の変形が可能である。以下、図５～図８を参照して、実施形態の変形例に係る冷却器について説明する。変形例に係る冷却器は、図２～図４に示す冷却器１０と同様に、第１基板４と第２基板６との間に配置される。ただし、変形例に係る冷却器は、冷却器自体の構成が図２～図４に示す冷却器１０とは異なる。 Note that the cooler 10 shown in FIGS. 2 to 4 is an example, and various modifications are possible. Hereinafter, a cooler according to a modification of the embodiment will be described with reference to FIGS. 5 to 8. The cooler according to the modified example is arranged between the first substrate 4 and the second substrate 6, similar to the cooler 10 shown in FIGS. 2 to 4. However, the cooler according to the modified example differs in the configuration of the cooler itself from the cooler 10 shown in FIGS. 2 to 4.
　図５は、実施形態の第１変形例に係る冷却器１０Ａの平面図である。図６は、実施形態の第１変形例に係る冷却器１０Ａの断面図である。図７は、実施形態の第２変形例に係る冷却器１０Ｂの平面図である。図８は、実施形態の第２変形例に係る冷却器１０Ｂの断面図である。 FIG. 5 is a plan view of a cooler 10A according to a first modification of the embodiment. FIG. 6 is a sectional view of a cooler 10A according to a first modification of the embodiment. FIG. 7 is a plan view of a cooler 10B according to a second modification of the embodiment. FIG. 8 is a sectional view of a cooler 10B according to a second modification of the embodiment.
　図５および図６に示すように、第１変形例に係る冷却器１０Ａの熱移送部１１Ａは、表面全体が絶縁層１２Ａによって被覆される。絶縁層１２Ａの材質は、図２～図４に示す絶縁層１２と同一である。この場合、冷却器１０Ａは、半導体モジュール１の外部に設けられる冷却流路１００には接続されないが、半導体モジュール１の封止樹脂２から外部に突出する突出部１３を備える。 As shown in FIGS. 5 and 6, the entire surface of the heat transfer section 11A of the cooler 10A according to the first modification is covered with an insulating layer 12A. The material of the insulating layer 12A is the same as that of the insulating layer 12 shown in FIGS. 2 to 4. In this case, the cooler 10A is not connected to the cooling channel 100 provided outside the semiconductor module 1, but includes a protrusion 13 that protrudes from the sealing resin 2 of the semiconductor module 1 to the outside.
　なお、熱移送部１１Ａは、図２～図４に示す冷却器１０と同様に、ベーパーチャンバ、ヒートパイプ、ヒートシンク、または、内部を冷媒が還流する冷却管を含む。これにより、冷却器１０Ａは、第１基板４と第２基板６とのショートを防止しつつ、半導体モジュール１の内部において吸収した熱を突出部１３へ移送して、半導体モジュール１の外部へ放出することができる。 Note that, like the cooler 10 shown in FIGS. 2 to 4, the heat transfer section 11A includes a vapor chamber, a heat pipe, a heat sink, or a cooling pipe through which a refrigerant circulates. Thereby, the cooler 10A transfers the heat absorbed inside the semiconductor module 1 to the protrusion 13 and releases it to the outside of the semiconductor module 1 while preventing short circuit between the first substrate 4 and the second substrate 6. can do.
　また、図７および図８に示すように、第２変形例に係る冷却器１０Ｂは、突出部１３を除く周面全体が絶縁層１２Ｂによって被覆される。つまり、冷却器１０Ｂの熱移送部１１Ｂにおける封止樹脂２から突出する突出部１３は、表面が露出した状態である。絶縁層１２Ｂの材質は、図２～図４に示す絶縁層１２と同一である。 Furthermore, as shown in FIGS. 7 and 8, in the cooler 10B according to the second modification, the entire circumferential surface excluding the protrusion 13 is covered with an insulating layer 12B. That is, the surface of the protruding part 13 protruding from the sealing resin 2 in the heat transfer part 11B of the cooler 10B is exposed. The material of the insulating layer 12B is the same as that of the insulating layer 12 shown in FIGS. 2 to 4.
　これにより、冷却器１０Ｂは、第１基板４と第２基板６とのショートを防止しつつ、半導体モジュール１の内部において吸収した熱を突出部１３へ移送して、半導体モジュール１の外部へ放出することができる。 Thereby, the cooler 10B transfers the heat absorbed inside the semiconductor module 1 to the protrusion 13 and releases it to the outside of the semiconductor module 1 while preventing short circuit between the first substrate 4 and the second substrate 6. can do.
　しかも、冷却器１０Ｂは、熱移送部１１Ｂにおける突出部１３が絶縁層１２Ｂによって被覆されておらず、表面が露出した状態であるため、突出部１３の放熱効率をさらに向上させることができる。 Furthermore, in the cooler 10B, the protruding part 13 in the heat transfer part 11B is not covered with the insulating layer 12B, and the surface is exposed, so that the heat dissipation efficiency of the protruding part 13 can be further improved.
　なお、本技術は以下のような構成をとることが可能である。
（１）
　一方の主面に第１の半導体素子が設けられ、他方の主面に冷却板が設けられる第１基板と、
　前記第１基板に対して対向するように配置され、前記第１基板の前記一方の主面に面する一方の主面に第２の半導体素子が設けられ、他方の主面に冷却板が設けられる第２基板と、
　前記第１基板と前記第２基板との間に配置され、熱移送部における少なくとも前記第１基板の前記一方の主面および前記第２基板の前記一方の主面に面する表面が絶縁層によって被覆される冷却器とを備える、
　半導体モジュール。
（２）
　前記熱移送部は、
　表面全体が前記絶縁層によって被覆される、
　前記（１）に記載の半導体モジュール。
（３）
　前記熱移送部は、
　前記第１基板および前記第２基板の面方向において、前記第１基板および前記第２基板の外側へ向けて突出し、冷却流路に接続される突出部を備える、
　前記（１）または（２）に記載の半導体モジュール。
（４）
　前記熱移送部は、
　ベーパーチャンバ、ヒートパイプ、ヒートシンク、または、内部を冷媒が還流する冷却管を含む
　（１）～（３）のいずれか一つに記載の半導体モジュール。
（５）
　前記絶縁層は、
　絶縁性を有する微粒子を含む樹脂層である、
　前記（１）～（４）のいずれか一つに記載の半導体モジュール。
（６）
　前記微粒子は、
　酸化アルミニウムの粒子、窒化ホウ素の粒子、窒化アルミニウムの粒子、および、窒化ケイ素の粒子のうち、少なくともいずれか一つを含む、
　前記（５）に記載の半導体モジュール。 Note that the present technology can have the following configuration.
(1)
a first substrate having a first semiconductor element provided on one main surface and a cooling plate provided on the other main surface;
A second semiconductor element is arranged to face the first substrate, a second semiconductor element is provided on one main surface facing the one main surface of the first substrate, and a cooling plate is provided on the other main surface. a second substrate,
The heat transfer section is arranged between the first substrate and the second substrate, and at least a surface facing the one main surface of the first substrate and the one main surface of the second substrate is formed by an insulating layer. a coated cooler;
semiconductor module.
(2)
The heat transfer section includes:
the entire surface is covered with the insulating layer;
The semiconductor module according to (1) above.
(3)
The heat transfer section includes:
a protruding portion that protrudes outward from the first substrate and the second substrate in the surface direction of the first substrate and the second substrate and is connected to a cooling channel;
The semiconductor module according to (1) or (2) above.
(4)
The heat transfer section includes:
The semiconductor module according to any one of (1) to (3), including a vapor chamber, a heat pipe, a heat sink, or a cooling pipe through which a refrigerant circulates.
(5)
The insulating layer is
A resin layer containing fine particles having insulating properties,
The semiconductor module according to any one of (1) to (4) above.
(6)
The fine particles are
Containing at least one of aluminum oxide particles, boron nitride particles, aluminum nitride particles, and silicon nitride particles,
The semiconductor module according to (5) above.
　１　半導体モジュール
　２　封止樹脂
　３　電源端子
　３１　正極端子
　３２　負極端子
　４　第１基板
　４１　導電性板
　５１，５２　トランジスタ
　５３，５４　ダイオード
　６　第２基板
　６１　バスバー
　７　入出力端子
　７１　負荷端子
　７２　制御端子
　８，９　冷却板
　８０，９０　半田
　１０，１０Ａ，１０Ｂ　冷却器
　１１，１１Ａ，１１Ｂ　熱移送部
　１２，１２Ａ，１２Ｂ　絶縁層
　１３　突出部
　１００　冷却流路 1 Semiconductor module 2 Sealing resin 3 Power terminal 31 Positive terminal 32 Negative terminal 4 First substrate 41 Conductive plate 51, 52 Transistor 53, 54 Diode 6 Second substrate 61 Bus bar 7 Input/output terminal 71 Load terminal 72 Control terminal 8, 9 Cooling plate 80, 90 Solder 10, 10A, 10B Cooler 11, 11A, 11B Heat transfer part 12, 12A, 12B Insulating layer 13 Projection part 100 Cooling channel

Claims (6)

  1. 　一方の主面に第１の半導体素子が設けられ、他方の主面に冷却板が設けられる第１基板と、
    　前記第１基板に対して対向するように配置され、前記第１基板の前記一方の主面に面する一方の主面に第２の半導体素子が設けられ、他方の主面に冷却板が設けられる第２基板と、
    　前記第１基板と前記第２基板との間に配置され、熱移送部における少なくとも前記第１基板の前記一方の主面および前記第２基板の前記一方の主面に面する表面が絶縁層によって被覆される冷却器とを備える、
    　半導体モジュール。     a first substrate having a first semiconductor element provided on one main surface and a cooling plate provided on the other main surface;
    A second semiconductor element is arranged to face the first substrate, a second semiconductor element is provided on one main surface facing the one main surface of the first substrate, and a cooling plate is provided on the other main surface. a second substrate,
    The heat transfer section is arranged between the first substrate and the second substrate, and at least a surface facing the one main surface of the first substrate and the one main surface of the second substrate is formed by an insulating layer. a coated cooler;
    semiconductor module.
  2. 　前記熱移送部は、
    　表面全体が前記絶縁層によって被覆される、
    　請求項１に記載の半導体モジュール。     The heat transfer section includes:
    the entire surface is covered with the insulating layer;
    The semiconductor module according to claim 1.
  3. 　前記熱移送部は、
    　前記第１基板および前記第２基板の面方向において、前記第１基板および前記第２基板の外側へ向けて突出し、冷却流路に接続される突出部を備える、
    　請求項１に記載の半導体モジュール。     The heat transfer section includes:
    a protruding portion that protrudes outward from the first substrate and the second substrate in the surface direction of the first substrate and the second substrate and is connected to a cooling channel;
    The semiconductor module according to claim 1.
  4. 　前記熱移送部は、
    　ベーパーチャンバ、ヒートパイプ、ヒートシンク、または、内部を冷媒が還流する冷却管を含む
    　請求項１に記載の半導体モジュール。     The heat transfer section includes:
    The semiconductor module according to claim 1, comprising a vapor chamber, a heat pipe, a heat sink, or a cooling pipe through which a refrigerant circulates.
  5. 　前記絶縁層は、
    　絶縁性を有する微粒子を含む樹脂層である、
    　請求項１に記載の半導体モジュール。     The insulating layer is
    A resin layer containing fine particles having insulating properties,
    The semiconductor module according to claim 1.
  6. 　前記微粒子は、
    　酸化アルミニウムの粒子、窒化ホウ素の粒子、窒化アルミニウムの粒子、および、窒化ケイ素の粒子のうち、少なくともいずれか一つを含む、
    　請求項５に記載の半導体モジュール。     The fine particles are
    Containing at least one of aluminum oxide particles, boron nitride particles, aluminum nitride particles, and silicon nitride particles,
    The semiconductor module according to claim 5.
PCT/JP2023/022703 2022-06-23 2023-06-20 Semiconductor module WO2023249000A1 (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09260559A (en) * 1996-03-19 1997-10-03 Fuji Electric Co Ltd Water-cooled semiconductor element stack
JP2001244407A (en) * 2000-02-25 2001-09-07 Mitsubishi Materials Corp Semiconductor device
JP2010062491A (en) * 2008-09-08 2010-03-18 Denso Corp Semiconductor device and composite semiconductor device
WO2010147199A1 (en) * 2009-06-19 2010-12-23 株式会社安川電機 Wiring board and power conversion device
WO2011064841A1 (en) * 2009-11-25 2011-06-03 トヨタ自動車株式会社 Cooling structure of semiconductor device
JP2013123040A (en) * 2011-11-07 2013-06-20 Daikin Ind Ltd Semiconductor device
JP2018037545A (en) * 2016-08-31 2018-03-08 株式会社豊田中央研究所 Semiconductor module

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09260559A (en) * 1996-03-19 1997-10-03 Fuji Electric Co Ltd Water-cooled semiconductor element stack
JP2001244407A (en) * 2000-02-25 2001-09-07 Mitsubishi Materials Corp Semiconductor device
JP2010062491A (en) * 2008-09-08 2010-03-18 Denso Corp Semiconductor device and composite semiconductor device
WO2010147199A1 (en) * 2009-06-19 2010-12-23 株式会社安川電機 Wiring board and power conversion device
WO2011064841A1 (en) * 2009-11-25 2011-06-03 トヨタ自動車株式会社 Cooling structure of semiconductor device
JP2013123040A (en) * 2011-11-07 2013-06-20 Daikin Ind Ltd Semiconductor device
JP2018037545A (en) * 2016-08-31 2018-03-08 株式会社豊田中央研究所 Semiconductor module

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