WO2023246285A1 - 量子芯片的制备方法、装置、电子设备、计算机可读存储介质、计算机程序产品及量子芯片 - Google Patents
量子芯片的制备方法、装置、电子设备、计算机可读存储介质、计算机程序产品及量子芯片 Download PDFInfo
- Publication number
- WO2023246285A1 WO2023246285A1 PCT/CN2023/090539 CN2023090539W WO2023246285A1 WO 2023246285 A1 WO2023246285 A1 WO 2023246285A1 CN 2023090539 W CN2023090539 W CN 2023090539W WO 2023246285 A1 WO2023246285 A1 WO 2023246285A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- chip substrate
- quantum
- chip
- eigenfrequency
- pattern
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 78
- 238000004590 computer program Methods 0.000 title claims abstract description 15
- 238000003860 storage Methods 0.000 title claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 360
- 238000005530 etching Methods 0.000 claims abstract description 57
- 238000005520 cutting process Methods 0.000 claims description 66
- 239000002096 quantum dot Substances 0.000 claims description 44
- 230000008569 process Effects 0.000 claims description 43
- 239000000463 material Substances 0.000 claims description 38
- 238000002360 preparation method Methods 0.000 claims description 33
- 238000012545 processing Methods 0.000 claims description 29
- 230000005540 biological transmission Effects 0.000 claims description 26
- 230000015654 memory Effects 0.000 claims description 26
- 230000004927 fusion Effects 0.000 claims description 14
- 238000003062 neural network model Methods 0.000 claims description 11
- 238000013507 mapping Methods 0.000 claims description 7
- 230000035699 permeability Effects 0.000 claims description 5
- 238000007499 fusion processing Methods 0.000 claims 2
- 229910052594 sapphire Inorganic materials 0.000 description 41
- 239000010980 sapphire Substances 0.000 description 41
- 239000000523 sample Substances 0.000 description 22
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 238000010586 diagram Methods 0.000 description 10
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- 230000006870 function Effects 0.000 description 6
- 238000004364 calculation method Methods 0.000 description 5
- 238000004891 communication Methods 0.000 description 5
- 230000007423 decrease Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 235000012431 wafers Nutrition 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 230000003993 interaction Effects 0.000 description 3
- 230000005610 quantum mechanics Effects 0.000 description 3
- 238000013515 script Methods 0.000 description 3
- 238000013473 artificial intelligence Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 238000003698 laser cutting Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000000644 propagated effect Effects 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical group [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004422 calculation algorithm Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000028161 membrane depolarization Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000012892 rational function Methods 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 208000024891 symptom Diseases 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 238000012549 training Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
- G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
- G06F30/27—Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
- G06N10/20—Models of quantum computing, e.g. quantum circuits or universal quantum computers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
- G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
- G06N10/80—Quantum programming, e.g. interfaces, languages or software-development kits for creating or handling programs capable of running on quantum computers; Platforms for simulating or accessing quantum computers, e.g. cloud-based quantum computing
Definitions
- quantum computing uses the principle of superposition states for calculations, quantum computing has more powerful computing capabilities than traditional computers on specific problems, thus arousing great interest in academia and industry.
- the computing power of quantum computing mainly depends on relaxation time and scalability.
- superconducting materials are usually used to prepare nonlinear circuits on the substrate to construct qubits.
- an important factor affecting the relaxation time of the qubit is the substrate eigenmode of the chip.
- Embodiments of the present application provide a method for preparing a quantum chip, including:
- the quantum operating frequency is the operating frequency of the qubit of the quantum circuit
- the second surface is opposite to the first surface
- the target pattern is the intrinsic frequency of the chip substrate and the quantum operating frequency. The pattern when the difference between is the largest
- Embodiments of the present application provide a quantum chip preparation device, including:.
- a determination module configured to determine the initial eigenfrequency of the chip substrate
- An etching module configured to perform a pattern etching process on the first surface of the chip substrate based on the numerical comparison result between the initial eigenfrequency and the quantum operating frequency, so that the second surface is complete and the first surface has Chip substrate with target pattern;
- the first surface has a target pattern, wherein the target pattern is the pattern when the difference between the intrinsic frequency of the chip substrate and the quantum operating frequency is the largest;
- the second surface is configured with a quantum circuit, wherein the operating frequency of a qubit of the quantum circuit is the quantum operating frequency.
- An embodiment of the present application provides an electronic device, including:
- a processor configured to implement the method for preparing a quantum chip provided by embodiments of the present application when executing computer-executable instructions stored in the memory.
- Embodiments of the present application provide a computer program product, which includes computer-executable instructions.
- the computer-executable instructions are executed by a processor, the method for preparing a quantum chip provided by the embodiments of the present application is implemented.
- pattern etching is performed on the first surface of the chip substrate to obtain a chip substrate with a complete second surface and a target pattern on the first surface. Since the target pattern is The pattern when the difference between the eigenfrequency of the chip substrate and the quantum operating frequency is the largest, therefore can eliminate the influence of the eigenfrequency of the chip substrate on the coherence of qubits, thus increasing the computing power of the quantum chip.
- the quantum circuit is etched to form a quantum chip. Since the etching pattern on the first surface of the chip substrate does not affect the morphology and size of the second surface of the chip substrate, it can be prepared normally. Quantum circuits.
- Figure 1 is a schematic structural diagram of a quantum chip preparation system provided by an embodiment of the present application.
- Figure 2 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.
- FIGS 3A-3B are schematic flow charts of the preparation method of quantum chips provided by embodiments of the present application.
- Figure 4 is a schematic flow chart of a method for preparing a quantum chip provided by an embodiment of the present application
- Figure 6 is a cutting schematic diagram of the preparation method of the quantum chip provided by the embodiment of the present application.
- Figure 7 is a schematic diagram of changes in the intrinsic frequency of the quantum chip preparation method provided by the embodiment of the present application.
- Figure 8 is a cutting schematic diagram of the preparation method of the quantum chip provided by the embodiment of the present application.
- Figure 9 is a cutting schematic diagram of the preparation method of the quantum chip provided by the embodiment of the present application.
- FIG. 10 is a schematic diagram of changes in the intrinsic frequency of the quantum chip preparation method provided by the embodiment of the present application.
- Eigenmode of the chip substrate a standing wave field formed along the longitudinal direction of the axis that satisfies the resonance conditions. Since the substrate of the chip is usually square, it is equivalent to a two-dimensional resonant cavity in the microwave band formed on the chip substrate, thus having its own intrinsic model.
- Quantum computing It is a new computing model that follows the laws of quantum mechanics to control quantum information units for calculation. Compared with the traditional general-purpose computer, its theoretical model is a universal Turing machine; the theoretical model of a general-purpose quantum computer is a universal Turing machine reinterpreted using the laws of quantum mechanics.
- Quantum circuit a collection of quantum gates connected non-cyclically through input and output lines.
- the size and depth of a quantum circuit are the number of nodes and the depth of the underlying connection graph.
- Relaxation rate the rate at which a qubit degenerates from a quantum superposition state to a classical state.
- the factors that affect the relaxation time of the qubit also include the eigenmode of the substrate. Since the substrate is generally square, there will also be electromagnetic standing waves inside the substrate, which can form the eigenmode of the substrate.
- the working frequency of superconducting qubits generally operates between 4 GHz and 6 GHz.
- Quantum chips often use 8 mm * 8 mm silicon substrates.
- the intrinsic frequency of 8 mm * 8 mm silicon substrates is 7.7 GHz
- the eigenfrequency of a mm x 8 mm sapphire substrate is approximately 8.4 GHz. This is relatively close to the working frequency of qubits.
- the size of the chip needs to be increased, such as using 10 mm * 10 mm silicon wafers and sapphire wafers.
- the eigenfrequency of the 10 mm * 10 mm silicon wafer is 6.1 GHz
- the eigen frequency of the 10 mm * 10 mm sapphire substrate is 6.7 GHz.
- the chip eigenfrequency and the qubit operating frequency will be more near.
- the devices provided by embodiments of the present application can be implemented as notebook computers, tablet computers, desktop computers, set-top boxes, mobile devices (for example, mobile phones, portable music players, personal Various types of user terminals, such as digital assistants, dedicated messaging devices, portable gaming devices, etc., can also be implemented as servers. Next, the actual equipment will be described Example application when used as a server.
- Figure 1 is a schematic structural diagram of a quantum chip preparation system provided by an embodiment of the present application.
- the terminal 400 is connected to the server 200 through a network 300.
- the network 300 can be a wide area network or a local area network, or a combination of the two.
- the quantum chip preparation method provided by the embodiments of the present application can also be implemented by a terminal or a server alone.
- the terminal alone is implemented as an example.
- the terminal 400 determines the initial eigenfrequency of the chip substrate.
- the terminal 400 determines the initial eigenfrequency of the chip substrate.
- the initial eigenfrequency of the chip substrate and the quantum operating frequency are compared.
- the terminal 400 determines the target pattern based on the numerical comparison result, and sends the target pattern to the terminal 400.
- the terminal 400 performs pattern etching on the first surface of the chip substrate to obtain A chip substrate with a complete second surface and a target pattern on the first surface.
- the quantum operating frequency is the operating frequency of the qubit of the quantum circuit.
- the second surface is opposite to the first surface.
- the target pattern is the intrinsic frequency of the chip substrate and the quantum
- the terminal 400 etch the quantum circuit on the second surface of the chip substrate that has undergone the pattern etching process to form a quantum chip.
- the server 200 may be an independent physical server, a server cluster or a distributed system composed of multiple physical servers, or may provide cloud services, cloud databases, cloud computing, cloud functions, cloud storage, Cloud servers for basic cloud computing services such as network services, cloud communications, middleware services, domain name services, security services, CDN, and big data and artificial intelligence platforms.
- the terminal 400 can be a smartphone, a tablet computer, a notebook computer, a desktop computer, a smart speaker, a smart phone Watches, smart voice interaction devices, smart home appliances, vehicle terminals, aircraft, etc., but are not limited to these.
- the terminal and the server can be connected directly or indirectly through wired or wireless communication methods, which are not limited in the embodiments of this application.
- a terminal or server can implement the quantum chip preparation method provided in the embodiments of this application by running a computer program.
- a computer program can be a native program or software module in the operating system; it can be a native (Native) application (APP, Application), that is, a program that needs to be installed in the operating system to run, such as an industrial equipment maintenance APP. ; It can also be a small program, that is, a program that only needs to be downloaded to the browser environment to run.
- APP Native
- the computer program described above can be any form of application, module or plug-in.
- the processor 410 may be an integrated circuit chip with signal processing capabilities, such as a general-purpose processor, a digital signal processor (DSP, Digital Signal Processor), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware Components, etc., wherein the general processor can be a microprocessor or any conventional processor, etc.
- DSP Digital Signal Processor
- User interface 430 includes one or more output devices 431 that enable the presentation of media content, including one or more speakers and/or one or more visual displays.
- User interface 430 also includes one or more input devices 432, including user interface components that facilitate user input, such as a keyboard, mouse, microphone, touch screen display, camera, and other input buttons and controls.
- Memory 450 may be removable, non-removable, or a combination thereof.
- Exemplary hardware devices include solid state memory, hard disk drives, optical disk drives, etc.
- Memory 450 may include one or more storage devices physically located remotely from processor 410 .
- Memory 450 includes volatile memory or non-volatile memory, and may include both volatile and non-volatile memory. Both lossless memory.
- the non-volatile memory may be a read-only memory (ROM), and the volatile memory may be a random-access memory (RAM).
- the memory 450 described in the embodiments of this application is intended to include any suitable type of memory.
- the memory 450 is capable of storing data to support various operations, examples of which include programs, modules, and data structures, or subsets or supersets thereof, as exemplarily described below.
- the operating system 451 includes system programs used to process various basic system services and perform hardware-related tasks, such as the framework layer, core library layer, driver layer, etc., which are used to implement various basic services and process hardware-based tasks;
- Network communication module 452 for reaching other electronic devices via one or more (wired or wireless) network interfaces 420.
- Exemplary network interfaces 420 include: Bluetooth, Wireless Compliance Certification (WiFi), and Universal Serial Bus ( USB, Universal Serial Bus), etc.;
- Presentation module 453 for enabling the presentation of information (e.g., a user interface for operating peripheral devices and displaying content and information) via one or more output devices 431 (e.g., display screens, speakers, etc.) associated with user interface 430 );
- information e.g., a user interface for operating peripheral devices and displaying content and information
- output devices 431 e.g., display screens, speakers, etc.
- An input processing module 454 for detecting one or more user inputs or interactions from one or more input devices 432 and translating the detected inputs or interactions.
- the device provided by the embodiment of the present application can be implemented in a software manner.
- Figure 2 shows a quantum chip preparation device 455 stored in the memory 450, which can be software in the form of programs, plug-ins, etc., including the following Software modules: determination module 4551, etching module 4552, and preparation module 4553. These modules are logical, so they can be arbitrarily combined or further divided according to the functions implemented. The functions of each module are explained below.
- the preparation method of the quantum chip provided by the embodiment of the present application will be described in conjunction with the exemplary application and implementation of the terminal provided by the embodiment of the present application.
- the steps performed by the terminal may be performed by a client running on the terminal.
- this application does not make a specific distinction between the terminal and the client running on the terminal.
- the quantum chip preparation method provided by the embodiments of the present application can be executed by various forms of computer programs running on the terminal, and is not limited to the client running on the terminal. It can also be the above-mentioned ones. operating systems, software modules, scripts and applets described above.
- FIG. 3A is a schematic flow chart of a method for preparing a quantum chip provided by an embodiment of the present application, which will be described in conjunction with steps 101 to 103 shown in FIG. 3A .
- step 101 the initial eigenfrequency of the chip substrate is determined.
- determining the initial eigenfrequency of the chip substrate in step 101 can be achieved through the following technical solution: when the first surface of the chip substrate is a rectangle, obtain the length and width of the first surface, for example, the first surface When it is a rectangle, obtain the length and width of the rectangle, and determine the initial eigenfrequency of the chip substrate based on the length and width of the first surface. Since the thickness of the chip substrate is much smaller than the length and width of the chip substrate, the chip substrate can be seen Construct a two-dimensional resonant cavity to calculate the initial eigenfrequency.
- the chip substrate is regarded as a two-dimensional resonant cavity to calculate the initial eigenfrequency, which can improve the calculation efficiency of the initial eigenfrequency.
- the above-mentioned determination of the initial eigenfrequency of the chip substrate based on the length and width of the first surface can be achieved through the following technical solutions: squaring the length to obtain the first square result, and squaring the width.
- Process to obtain the second square result determine the first ratio between the square result of the pi constant and the first square result, and the second ratio between the square result of the pi constant and the second square result; calculate the first ratio and the second ratio Perform square root processing on the sum result to obtain the square root result; use the ratio of the square root result to the base constant as the initial eigenfrequency, where the base constant is obtained based on the magnetic permeability of the chip substrate and the dielectric constant of the chip substrate.
- the chip substrate can be regarded as a two-dimensional resonant cavity to calculate the initial eigenfrequency, so that the initial eigenfrequency can be accurately and effectively determined.
- the chip substrate is regarded as a two-dimensional resonant cavity to calculate the initial eigenfrequency
- the calculation of the initial eigenfrequency can be referred to formula (2):
- ⁇ and ⁇ are the magnetic permeability and dielectric constant of the chip substrate respectively
- l and w are the length and width of the chip substrate respectively
- f is the initial eigenfrequency
- the substrate constant is ⁇ is the pi constant.
- step 102 based on the numerical comparison result between the initial eigenfrequency and the quantum operating frequency, a pattern etching process is performed on the first surface of the chip substrate, so that the second surface is complete and the first surface has Target patterned chip substrate.
- the quantum operating frequency is the operating frequency of the qubit of the quantum circuit
- the second surface is opposite to the first surface
- the target pattern is the pattern when the difference between the intrinsic frequency of the chip substrate and the quantum operating frequency is the largest.
- the substrate etching method is determined, specifically the etching target pattern is determined, and then the first step of the chip substrate is performed based on the target pattern.
- the surface is subjected to pattern etching treatment to obtain a chip substrate with a complete second surface and a first surface with a target pattern.
- the target pattern should be etched to move the eigenfrequency of the chip substrate to high frequency, that is, the target pattern on the first surface when the eigenfrequency of the chip substrate reaches its maximum value is obtained.
- the initial chip substrate is a cube.
- the thickness (height) of the cube is much smaller than the length and width of the cube.
- the initial chip substrate has two surfaces determined by the long side and the wide side (two opposite faces of the cube). The first surface is any one of the two surfaces, and the second surface is the other surface.
- the surface where pattern etching is performed is regarded as the back side of the chip substrate (first surface). Pattern etching is not performed and during the etching process The intact surface is used as the front side (second surface) of the chip substrate.
- the target pattern when the initial eigenfrequency is less than the quantum operating frequency, the target pattern has a cubic depression at the center of the first surface. When the initial eigenfrequency is not less than the quantum operating frequency, the target pattern is to have a cubic boss at the center of the first surface.
- the eigenfrequency can be minimized or maximized through a simple target pattern, effectively improving the pattern etching efficiency.
- the chip substrate can be regarded as a resonant cavity.
- the chip substrate Before the back side is etched, the chip substrate is a two-dimensional resonant cavity. After the back side is etched, the shape of the resonant cavity changes, resulting in The standing wave field formed along the longitudinal direction of the axis changes, causing the eigenfrequency of the substrate to change.
- the eigenfrequency of the substrate is not less than the operating frequency of the qubit, see Figure 5- Figure 6, Figure 5- Figure 6
- the method of using a dicing machine grinding wheel to process grooves on the back of the chip substrate is schematically shown. When cutting, the cutting depth of the chip substrate by the grinding wheel can be set to 330 microns.
- the remaining thickness of the chip substrate is 100 microns.
- the lateral removal amount is 200 microns, which means that each cutting can cut a 200 micron wide and 330 micron deep groove, and the back side of the chip substrate can be processed into something like
- the boss shape shown in Figure 5 can also be further removed from the back surface of the chip substrate in sequence to form a boss shape with a raised center as shown in Figure 6 .
- Figure 7 shows the eigenfrequency of the substrate as a function of the amount of material removal from the chip substrate. As the amount of removal on both sides or around the back of the chip substrate increases, the eigenfrequency of the chip substrate will increase significantly.
- the eigenfrequency of the chip substrate will begin to decrease until the back side becomes After the 330 micron thick material has been removed, the side length of the chip substrate is 10 mm and the thickness of the chip substrate is 100 microns. This is equivalent to obtaining the target pattern corresponding to the maximum eigenfrequency in Figure 7, which is shown in Figure 6.
- the cube boss shown has a raised center.
- Figure 8 schematically shows the method of using a dicing machine grinding wheel to process grooves on the back of the sapphire substrate.
- each cutting can obtain a groove with a width of 200 microns and a depth of 330 microns.
- the shape shown in Figure 8 can be obtained after multiple cuts, or only the central area can be processed.
- the dicing machine can only completely cut from one side of the chip to the other side of the chip. Referring to FIG. 10 , FIG.
- step 1021 when the initial eigenfrequency is less than the quantum operating frequency, the target pattern of the first surface when the eigenfrequency of the chip substrate reaches a minimum value is obtained.
- step 1022 when the initial eigenfrequency is not less than the quantum operating frequency, the target pattern of the first surface when the eigenfrequency of the chip substrate reaches a maximum value is obtained.
- the above-mentioned acquisition of the target pattern of the first surface when the eigenfrequency of the chip substrate reaches a minimum value can be achieved through the following technical solution: obtaining the geometric parameters of the chip substrate, the material of the chip substrate, and multiple candidates of the chip substrate pattern; call the first neural network model to perform the following processing: obtain the geometric features of the corresponding geometric parameters, the material features of the corresponding material, and the pattern features of each candidate pattern; for each candidate pattern, obtain the geometric features, material features, and candidate patterns
- the pattern features are fused to obtain the first fusion feature, and the first fusion feature is subjected to the first mapping process to obtain the predicted eigenfrequencies of the candidate patterns; the predicted eigenfrequencies of the multiple candidate patterns are sorted from small to large,
- the candidate pattern corresponding to the predicted eigenfrequency ranked first is used as the target pattern, so that the target pattern of the chip substrate when the eigenfrequency is the smallest can be obtained.
- the above-mentioned acquisition of the target pattern on the first surface when the eigenfrequency of the chip substrate reaches its maximum value can be achieved through the following technical solutions: obtaining the geometric parameters of the chip substrate, the chip substrate materials and multiple candidate patterns of the chip substrate; call the first neural network model to perform the following processing: obtain the geometric characteristics of the corresponding geometric parameters, the material characteristics of the corresponding material, and the pattern characteristics of each candidate pattern; for each candidate pattern, The geometric features, the material features and the pattern features of the candidate pattern are fused to obtain the first fusion feature, and the first fusion feature is subjected to the first mapping process to obtain the predicted eigenfrequency of the candidate pattern; the predicted eigenfrequency of the multiple candidate patterns is obtained The eigenfrequencies are sorted from large to small, and the candidate pattern corresponding to the predicted eigenfrequency ranked first is used as the target pattern, so that the target pattern of the chip substrate when the eigenfrequency is the largest can be obtained.
- the following describes the training process of the above-mentioned first neural network model, obtaining the sample geometric parameters of the sample chip substrate, the sample material of the sample chip substrate, and multiple sample candidate patterns of the sample chip substrate; calling the initialized first neural network model to perform the following processing: Obtain the sample geometric characteristics corresponding to the sample geometric parameters, the sample material characteristics corresponding to the sample material, and the sample pattern characteristics of each sample candidate pattern; for each sample candidate pattern, obtain the sample geometric characteristics, sample material characteristics, and sample pattern of the sample candidate pattern. The features are fused to obtain the first sample fusion feature, and the first sample fusion feature is subjected to the first mapping process to obtain the predicted eigenfrequency of the sample candidate pattern, and determine the predicted eigenfrequency of the sample candidate pattern and the sample candidate pattern. The error between the marked eigenfrequencies, the parameters of the first neural network model are updated based on the error, and the first neural network model updated when the error converges to the minimum value is used as the first neural network model for subsequent calls.
- the transmission frequency of the electromagnetic wave when resonance occurs during the propagation process is obtained as the original value of the corresponding pattern.
- Eigenfrequency sort the transmission frequencies corresponding to each simulated cutting process from small to large, determine the transmission frequency ranked first as the eigenfrequency that obtains the minimum value, and take the pattern corresponding to the transmission frequency ranked first as the target pattern.
- the first surface of the chip substrate is a plane.
- the first surface of the chip substrate is subjected to multiple simulated cutting processes until The first surface of the chip substrate becomes a plane again; perform the following processing on the first surface of the chip substrate obtained by each simulated cutting process: simulate the propagation of electromagnetic waves on the first surface of the chip substrate, and obtain the time when the resonance phenomenon occurs during the propagation process.
- the transmission frequency of electromagnetic waves; the transmission frequencies corresponding to each simulated cutting process are sorted from large to small, and the transmission frequency ranked first is determined as the eigenfrequency with the maximum value.
- the transmission frequency of the electromagnetic wave when resonance occurs during the propagation process is obtained as the original value of the corresponding pattern.
- Eigenfrequency sort the transmission frequencies corresponding to each simulated cutting process from large to small, determine the transmission frequency ranked first as the eigenfrequency with the maximum value, and take the pattern corresponding to the transmission frequency ranked first as the target pattern.
- the remaining thickness of the chip substrate is 100 microns.
- the lateral removal amount is 200 microns, which means that each cutting can cut a 200 micron wide and 330 micron deep groove;
- the first step to obtain the simulated beam is on the chip substrate.
- the movement trajectory of the surface and the residence time of the simulated beam corresponding to each position during the movement are simulated.
- Cutting is performed on the first surface of the chip substrate based on the movement trajectory and residence time.
- focused plasma or laser can also be used to cut the chip. center for processing. First, the position of the focused plasma on the chip substrate or the position of the focus of the laser beam on the chip substrate is precisely controlled.
- the chip substrate of the quantum chip includes an opposing first surface and a second surface; the first surface has a target pattern, wherein the target pattern is the largest difference between the eigenfrequency of the chip substrate and the quantum operating frequency.
- the second surface is configured with a quantum circuit, where the operating frequency of the qubits of the quantum circuit is the quantum operating frequency.
- first determine the initial eigenfrequency of the chip substrate and then perform a pattern etching process on the first surface of the chip substrate based on the numerical comparison result between the initial eigenfrequency and the quantum operating frequency to obtain a complete second surface.
- the first surface has a chip substrate with a target pattern
- the quantum operating frequency is the operating frequency of the qubit of the quantum circuit
- the second surface is opposite to the first surface
- the target pattern is The pattern when the difference between the intrinsic frequency of the chip substrate and the quantum operating frequency is the largest, and finally the quantum circuit is etched on the second surface of the chip substrate that has undergone pattern etching to form a quantum chip.
- pattern etching is performed on the first surface of the chip substrate to obtain a chip substrate with a complete second surface and a target pattern on the first surface.
- the target pattern is the chip
- a quantum circuit is etched on the second surface of the substrate to form a quantum chip. Since the pattern is etched on the first surface of the chip substrate, the morphology and size of the second surface of the chip substrate are not affected, so the quantum circuit can be prepared normally.
- the quantum chip preparation method provided by the embodiments of the present application can be implemented by a terminal and a server in collaboration.
- the server determines the initial eigenfrequency of the chip substrate, and the server determines the initial eigenfrequency of the chip substrate and the quantum operating frequency.
- the server determines the target pattern based on the numerical comparison result and sends the target pattern to the terminal.
- the terminal performs pattern etching on the first surface of the chip substrate to obtain a chip substrate with a complete second surface and a first surface with the target pattern.
- the quantum operating frequency is the operating frequency of the qubit of the quantum circuit.
- the second surface is opposite to the first surface.
- the target pattern is the pattern when the difference between the intrinsic frequency of the chip substrate and the quantum operating frequency is the largest.
- the terminal passes through The quantum circuit is etched on the second surface of the chip substrate subjected to pattern etching to form a quantum chip.
- the embodiment of the present application adjusts the eigenfrequency of the substrate by etching a pattern on the back of the substrate to change the overall shape of the substrate, increasing the distance between the qubit operating frequency and the eigenfrequency of the substrate, which can significantly reduce the coherence of the substrate mode to the bit. influence, extending the bit coherence time.
- the preparation method of the quantum chip provided by the embodiment of the present application is to use the pattern etched on the back of the substrate to change the eigenfrequency of the eigenmode of the substrate, so that the difference between the operating frequency of the qubit and the eigenfrequency of the substrate is widened, so that It can reduce the impact of the eigenmode of the chip substrate on the coherence of qubits and extend the coherence time.
- etching is performed on the chip substrate using ion cutting, laser cutting or mechanical dicing.
- a target pattern is etched on the back of the chip substrate using ion cutting, laser cutting or mechanical dicing.
- a groove structure or a boss structure is etched, and the size of the groove or boss is precisely controlled to maximize the difference between the eigenfrequency of the chip substrate and the operating frequency of the qubit.
- a quantum circuit is etched on the front side of the chip substrate to form a quantum chip. Specifically, since the size and shape of the front side are not affected by pattern etching, a qubit circuit can be prepared on the front side.
- the qubit circuit includes a read circuit. , filters, resonant cavities and Josephson junctions and other structures.
- the cutting depth of the sapphire by the grinding wheel can be set to 330 microns during cutting. At this time, the remaining thickness of the sapphire is 100 Micron.
- the horizontal removal amount is 200 microns, which means that each cutting can cut a groove of 200 microns wide and 330 microns deep, and the back of the sapphire can be processed as shown in Figure 5
- the surrounding sides of the back side of the sapphire can be removed in sequence and processed into a boss shape with a convex center as shown in Figure 6.
- FIG. 7 illustrates the eigenfrequency of a sapphire substrate as a function of the amount of sapphire substrate removed.
- the eigenfrequency of the sapphire will increase significantly.
- the structure of the sapphire will become closer and closer to a thinner complete sapphire.
- the eigenfrequency will begin to decrease until the 330 micron thick sapphire on the back is removed.
- the size of the sapphire is 10 mm on a side and 100 microns thick.
- the difference between the eigenfrequency of sapphire at this time and the eigenfrequency when the thickness is 430 microns is small. Therefore, in actual operations, it is necessary to accurately select the appropriate removal amount to maximize the difference between the eigenfrequency of sapphire and the operating frequency of qubits.
- Pattern etching is performed on one surface to obtain a chip substrate with a complete second surface and a target pattern on the first surface; wherein the quantum operating frequency is the operating frequency of the qubit of the quantum circuit, and the second surface is opposite to the first surface,
- the target pattern is the pattern when the difference between the eigenfrequency of the chip substrate and the quantum operating frequency is the largest; the preparation module 4553 is configured to etch the quantum circuit on the second surface of the chip substrate that has undergone pattern etching processing, so as to Form a quantum chip.
- the determination module 4551 is further configured to: when the first surface of the chip substrate is a rectangle, obtain the length and width of the first surface; based on the length and width of the first surface, determine the initial nature of the chip substrate. Symptom frequency.
- the target pattern when the initial eigenfrequency is less than the quantum operating frequency, the target pattern has a cubic depression at the center of the first surface. When the initial eigenfrequency is not less than the quantum operating frequency, the target pattern is to have a cubic boss at the center of the first surface.
- the etching module 4554 is also configured to: before obtaining the target pattern of the first surface when the eigenfrequency of the chip substrate reaches its maximum value, obtain the geometric parameters of the chip substrate, the material of the chip substrate, and the Multiple candidate patterns; call the first neural network model to perform the following processing: obtain the geometric features of the corresponding geometric parameters, the material features of the corresponding material, and the pattern features of each candidate pattern; for each candidate pattern, obtain the geometric features, material features, and The pattern features of the candidate pattern are fused to obtain the first fusion feature, and the first fusion feature is subjected to the first mapping process to obtain the predicted eigenfrequency of the candidate pattern; the predicted eigenfrequencies of the multiple candidate patterns are processed from large to small. small sort, The candidate pattern corresponding to the predicted eigenfrequency ranked first is used as the target pattern.
- the first surface of the chip substrate is a plane
- the etching module 4554 is further configured to: before obtaining the target pattern of the first surface when the eigenfrequency of the chip substrate reaches its maximum, The surface is subjected to multiple simulated cutting processes until the first surface of the chip substrate becomes flat again; the following processing is performed on the first surface of the chip substrate obtained by each simulated cutting process: simulated propagation of electromagnetic waves on the first surface of the chip substrate, And obtain the transmission frequency of electromagnetic waves when resonance occurs during propagation; sort the transmission frequencies corresponding to each simulated cutting process from large to small, and determine the transmission frequency ranked first as the eigenfrequency with the maximum value.
- any simulated cutting process is any one of the following processes: obtaining a grinding wheel cutting unit, performing simulated cutting on the first surface of the chip substrate based on the grinding wheel cutting unit; obtaining the movement of the simulated light beam on the first surface of the chip substrate The trajectory and the residence time of the simulated beam correspond to each position during the movement process, and the first surface of the chip substrate is simulated cutting based on the movement trajectory and the residence time.
- Embodiments of the present application provide a quantum chip.
- the chip substrate of the quantum chip includes an opposing first surface and a second surface; the first surface has a target pattern, wherein the target pattern is the original pattern of the chip substrate.
- Embodiments of the present application provide a computer program product or computer program.
- the computer program product or computer program includes computer instructions, and the computer instructions are stored in a computer-readable storage medium.
- the processor of the electronic device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the electronic device executes the method for preparing a quantum chip described above in the embodiment of the present application.
- Embodiments of the present application provide a computer-readable storage medium storing executable instructions.
- the executable instructions are stored therein.
- the executable instructions When executed by a processor, they will cause the processor to execute the quantum chip provided by the embodiments of the present application.
- the preparation method is, for example, the preparation method of the quantum chip as shown in Figures 3A-3B.
- the computer-readable storage medium may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface memory, optical disk, or CD-ROM; it may also include one or any combination of the above memories.
- Various equipment may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface memory, optical disk, or CD-ROM; it may also include one or any combination of the above memories.
- Various equipment may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface memory, optical disk, or CD-ROM; it may also include one or any combination of the above memories.
- executable instructions may take the form of a program, software, software module, script, or code, written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and their May be deployed in any form, including deployed as a stand-alone program or deployed as a module, component, subroutine, or other unit suitable for use in a computing environment.
- executable instructions may, but do not necessarily correspond to, files in a file system and may be stored as part of a file holding other programs or data, for example, in a Hyper Text Markup Language (HTML) document. in one or more scripts, in a single file that is specific to the program in question, or in multiple collaborative files (e.g., files that store one or more modules, subroutines, or portions of code).
- HTML Hyper Text Markup Language
- executable instructions may be deployed to execute on one electronic device, or on multiple electronic devices located at one location, or on multiple electronic devices distributed across multiple locations and interconnected by a communications network. execute on.
- the first surface of the chip substrate is pattern etched, so that the second surface is complete and the first surface has The chip substrate of the target pattern.
- the target pattern is the pattern when the difference between the eigenfrequency of the chip substrate and the quantum operating frequency is the largest. This eliminates the influence of the eigenfrequency of the chip substrate on the coherence of the qubit, thereby ensuring that the quantum circuit can operate normally.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Evolutionary Computation (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Artificial Intelligence (AREA)
- Computing Systems (AREA)
- Mathematical Analysis (AREA)
- Mathematical Physics (AREA)
- Pure & Applied Mathematics (AREA)
- Computational Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Data Mining & Analysis (AREA)
- Mathematical Optimization (AREA)
- Geometry (AREA)
- Computer Hardware Design (AREA)
- Medical Informatics (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Optics & Photonics (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
Claims (15)
- 一种量子芯片的制备方法,所述方法由电子设备执行,所述方法包括:确定芯片基底的初始的本征频率;基于初始的本征频率与量子工作频率之间的数值比较结果,对所述芯片基底的第一表面进行图案刻蚀处理,得到第二表面完整且所述第一表面具有目标图案的芯片基底;其中,所述量子工作频率是量子电路的量子比特的工作频率,所述第二表面与所述第一表面是相对的,所述目标图案是所述芯片基底的本征频率与所述量子工作频率之间的差值最大时的图案;在经过图案刻蚀处理的芯片基底的第二表面上,刻蚀所述量子电路,以形成量子芯片。
- 根据权利要求1所述的方法,其中,所述确定芯片基底的初始的本征频率,包括:当所述芯片基底的第一表面是矩形时,获取所述第一表面的长度以及宽度;基于所述第一表面的长度以及宽度,确定所述芯片基底的初始的本征频率。
- 根据权利要求2所述的方法,其中,所述基于所述第一表面的长度以及宽度,确定所述芯片基底的初始的本征频率,包括:对所述长度进行平方处理,得到第一平方结果,并对所述宽度进行平方处理,得到第二平方结果;确定圆周率常数的平方结果与所述第一平方结果的第一比值、以及所述圆周率常数的平方结果与所述第二平方结果的第二比值;对所述第一比值与所述第二比值的求和结果进行开方处理,得到开方结果;将所述开方结果与基底常数的比值作为初始的本征频率,其中,所述基底常数是基于所述芯片基底的磁导率以及所述芯片基底的介电常数得到的。
- 根据权利要求1所述的方法,其中,所述基于初始的本征频率与量子工作频率之间的数值比较结果,对所述芯片基底的第一表面进行图案刻蚀处理, 得到第二表面完整且所述第一表面具有目标图案的芯片基底,包括:当初始的本征频率小于所述量子工作频率时,获取所述芯片基底的本征频率取得最小值时所述第一表面的目标图案;当初始的本征频率不小于所述量子工作频率时,获取所述芯片基底的本征频率取得最大值时所述第一表面的目标图案;基于所述目标图案对所述芯片基底的第一表面进行图案刻蚀处理,得到第二表面完整且所述第一表面具有所述目标图案的芯片基底。
- 根据权利要求4所述的方法,其中,所述获取所述芯片基底的本征频率取得最小值时所述第一表面的目标图案,包括:获取所述芯片基底的几何参数、所述芯片基底的材质以及所述芯片基底的多个候选图案;调用第一神经网络模型执行以下处理:获取对应所述几何参数的几何特征、对应所述材质的材质特征以及每个所述候选图案的图案特征;针对每个所述候选图案,对所述几何特征、所述材质特征以及所述候选图案的图案特征进行融合处理,得到第一融合特征,并对所述第一融合特征进行第一映射处理,得到所述候选图案的预测本征频率;对所述多个候选图案的预测本征频率进行由小到大排序,将排序在首位的预测本征频率对应的候选图案作为所述目标图案。
- 根据权利要求4所述的方法,其中,所述获取所述芯片基底的本征频率取得最大值时所述第一表面的目标图案,包括:获取所述芯片基底的几何参数、所述芯片基底的材质以及所述芯片基底的多个候选图案;调用第一神经网络模型执行以下处理:获取对应所述几何参数的几何特征、对应所述材质的材质特征以及每个所述候选图案的图案特征;针对每个所述候选图案,对所述几何特征、所述材质特征以及所述候选图 案的图案特征进行融合处理,得到第一融合特征,并对所述第一融合特征进行第一映射处理,得到所述候选图案的预测本征频率;对所述多个候选图案的预测本征频率进行由大到小排序,将排序在首位的预测本征频率对应的候选图案作为所述目标图案。
- 根据权利要求4所述的方法,其中,所述芯片基底的第一表面为平面,在获取所述芯片基底的本征频率取得最小值时所述第一表面的目标图案之前,所述方法还包括:对所述芯片基底的第一表面进行多次模拟切割处理,直至所述芯片基底的第一表面再次成为平面;针对每次模拟切割处理得到的芯片基底的第一表面执行以下处理:将电磁波在所述芯片基底的第一表面进行仿真传播,并获取传播过程中出现共振现象时所述电磁波的传输频率;将对应每次所述模拟切割处理的传输频率进行由小到大的排序,将排序在首位的传输频率确定为取得最小值的本征频率。
- 根据权利要求4所述的方法,其中,所述芯片基底的第一表面为平面,在获取所述芯片基底的本征频率取得最大值时所述第一表面的目标图案之前,所述方法还包括:对所述芯片基底的第一表面进行多次模拟切割处理,直至所述芯片基底的第一表面再次成为平面;针对每次模拟切割处理得到的芯片基底的第一表面执行以下处理:将电磁波在所述芯片基底的第一表面进行仿真传播,并获取传播过程中出现共振现象时所述电磁波的传输频率;将对应每次所述模拟切割处理的传输频率进行由大到小的排序,将排序在首位的传输频率确定为取得最大值的本征频率。
- 根据权利要求7或8所述的方法,其中,任意一次所述模拟切割处理为以下处理中任意一种:基于砂轮切割单元对所述芯片基底的第一表面进行模拟切割;获取模拟光束在所述芯片基底的第一表面的移动轨迹以及所述模拟光束在所述移动过程中对应每个位置的停留时间,基于所述移动轨迹以及所述停留时间对所述芯片基底的第一表面进行模拟切割处理。
- 根据权利要求1所述的方法,其中,当初始的本征频率小于所述量子工作频率时,所述目标图案是在所述第一表面的中心位置具有立方体凹陷;当初始的本征频率不小于所述量子工作频率时,所述目标图案是在所述第一表面的中心位置具有立方体凸台。
- 一种量子芯片,所述量子芯片的芯片基底包括相对的第一表面以及第二表面;所述第一表面具有目标图案,其中,所述目标图案是所述芯片基底的本征频率与量子工作频率之间的差值最大时的图案;所述第二表面配置有量子电路,其中,所述量子电路的量子比特的工作频率是所述量子工作频率。
- 一种量子芯片的制备装置,所述装置包括:确定模块,配置为确定芯片基底的初始的本征频率;刻蚀模块,配置为基于初始的本征频率与量子工作频率之间的数值比较结果,对所述芯片基底的第一表面进行图案刻蚀处理,得到第二表面完整且所述第一表面具有目标图案的芯片基底;其中,所述量子工作频率是量子电路的量子比特的工作频率,所述第二表面与所述第一表面是相对的,所述目标图案是所述芯片基底的本征频率与所述量子工作频率之间的差值最大时的图案;制备模块,配置为在经过图案刻蚀处理的芯片基底的第二表面上,刻蚀量子电路,以形成量子芯片。
- 一种电子设备,所述电子设备包括:存储器,用于存储计算机可执行指令;处理器,用于执行所述存储器中存储的计算机可执行指令时,实现权利要 求1至10任一项所述的量子芯片的制备方法。
- 一种计算机可读存储介质,存储有计算机可执行指令,所述可执行指令被处理器执行时实现权利要求1至10任一项所述的量子芯片的制备方法。
- 一种计算机程序产品,包括计算机可执行指令,所述计算机可执行指令被处理器执行时实现权利要求1至10任一项所述的量子芯片的制备方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020247009241A KR20240051186A (ko) | 2022-06-22 | 2023-04-25 | 양자 칩의 제조 방법, 장치, 전자 기기, 컴퓨터 판독 가능한 저장 매체, 컴퓨터 프로그램 제품 및 양자 칩 |
US18/233,732 US20230419148A1 (en) | 2022-06-22 | 2023-08-14 | Quantum chip and method for preparing the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210713974.9 | 2022-06-22 | ||
CN202210713974.9A CN117313886A (zh) | 2022-06-22 | 2022-06-22 | 芯片处理方法、装置、设备、存储介质及程序产品 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US18/233,732 Continuation US20230419148A1 (en) | 2022-06-22 | 2023-08-14 | Quantum chip and method for preparing the same |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2023246285A1 true WO2023246285A1 (zh) | 2023-12-28 |
Family
ID=89260936
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2023/090539 WO2023246285A1 (zh) | 2022-06-22 | 2023-04-25 | 量子芯片的制备方法、装置、电子设备、计算机可读存储介质、计算机程序产品及量子芯片 |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN117313886A (zh) |
WO (1) | WO2023246285A1 (zh) |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108231992A (zh) * | 2018-01-10 | 2018-06-29 | 合肥本源量子计算科技有限责任公司 | 一种含铌膜的超导量子芯片刻蚀方法 |
US20200335685A1 (en) * | 2019-04-19 | 2020-10-22 | International Business Machines Corporation | Qubit frequency tuning structures and fabrication methods for flip chip quantum computing devices |
CN113215574A (zh) * | 2021-02-01 | 2021-08-06 | 南京大学 | 一种用于蓝宝石基底镀铝膜的量子芯片的湿法刻蚀方法 |
CN113887733A (zh) * | 2021-11-02 | 2022-01-04 | 北京百度网讯科技有限公司 | 用于调节zz耦合强度的超导电路及控制方法 |
CN114065939A (zh) * | 2021-11-22 | 2022-02-18 | 北京百度网讯科技有限公司 | 量子芯片设计模型的训练方法、装置、设备及存储介质 |
CN114142946A (zh) * | 2021-11-29 | 2022-03-04 | 中国科学院上海微系统与信息技术研究所 | 一种集成量子纠缠光源的光量子芯片的制备方法及其结构 |
CN114492810A (zh) * | 2022-02-11 | 2022-05-13 | 北京百度网讯科技有限公司 | 超导量子芯片设计方法及装置、电子设备和介质 |
-
2022
- 2022-06-22 CN CN202210713974.9A patent/CN117313886A/zh active Pending
-
2023
- 2023-04-25 WO PCT/CN2023/090539 patent/WO2023246285A1/zh active Application Filing
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108231992A (zh) * | 2018-01-10 | 2018-06-29 | 合肥本源量子计算科技有限责任公司 | 一种含铌膜的超导量子芯片刻蚀方法 |
US20200335685A1 (en) * | 2019-04-19 | 2020-10-22 | International Business Machines Corporation | Qubit frequency tuning structures and fabrication methods for flip chip quantum computing devices |
CN113215574A (zh) * | 2021-02-01 | 2021-08-06 | 南京大学 | 一种用于蓝宝石基底镀铝膜的量子芯片的湿法刻蚀方法 |
CN113887733A (zh) * | 2021-11-02 | 2022-01-04 | 北京百度网讯科技有限公司 | 用于调节zz耦合强度的超导电路及控制方法 |
CN114065939A (zh) * | 2021-11-22 | 2022-02-18 | 北京百度网讯科技有限公司 | 量子芯片设计模型的训练方法、装置、设备及存储介质 |
CN114142946A (zh) * | 2021-11-29 | 2022-03-04 | 中国科学院上海微系统与信息技术研究所 | 一种集成量子纠缠光源的光量子芯片的制备方法及其结构 |
CN114492810A (zh) * | 2022-02-11 | 2022-05-13 | 北京百度网讯科技有限公司 | 超导量子芯片设计方法及装置、电子设备和介质 |
Also Published As
Publication number | Publication date |
---|---|
CN117313886A (zh) | 2023-12-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP3992868A1 (en) | Quantum chip, quantum processor, and quantum computer | |
CN114065939B (zh) | 量子芯片设计模型的训练方法、装置、设备及存储介质 | |
JP2023058606A (ja) | 超伝導量子チップの設計方法及び装置、電子機器並びに媒体 | |
US20220029266A1 (en) | Quantum chip preparation method, apparatus, and device and quantum chip | |
US20240070500A1 (en) | Method and apparatus for simulating quantum circuit | |
CN116187258B (zh) | 量子芯片版图的仿真方法、装置、计算设备及存储介质 | |
US20240046140A1 (en) | Simulation method, electronic device, and storage medium | |
CN115169569A (zh) | 超导量子芯片设计方法及装置、电子设备和介质 | |
AU2023200143A1 (en) | Quantum chip and construction method and construction apparatus thereof | |
EP4113316A2 (en) | Method and apparatus for processing table, device, and storage medium | |
WO2023246285A1 (zh) | 量子芯片的制备方法、装置、电子设备、计算机可读存储介质、计算机程序产品及量子芯片 | |
Chen et al. | Analytical theory of finite-size photonic crystal slabs near the band edge | |
Koziel et al. | Globalized simulation-driven miniaturization of microwave circuits by means of dimensionality-reduced constrained surrogates | |
US20240046130A1 (en) | Simulation method, electronic device, and storage medium | |
Makri | Electronic frustration, Berry’s phase interference and slow dynamics in some tight-binding systems coupled to harmonic baths | |
US20230419148A1 (en) | Quantum chip and method for preparing the same | |
US11526152B2 (en) | Techniques for determining fabricability of designs by searching for forbidden patterns | |
US10885262B1 (en) | Systems and methods for determining fabrication loss of segmented designs using paintbrush patterns | |
CN113887733A (zh) | 用于调节zz耦合强度的超导电路及控制方法 | |
Koziel et al. | Cost-efficient electromagnetic-simulation-driven antenna design using co-Kriging | |
US11157163B1 (en) | Paintbrush-like techniques for determining fabricable segmented designs | |
US11321498B2 (en) | Techniques for transforming arbitrary designs into manufacturable designs by removing forbidden patterns | |
CN115329975A (zh) | 仿真方法、装置、设备及存储介质 | |
Reineri et al. | Exploration of superconducting multi-mode cavity architectures for quantum computing | |
Li et al. | Isogeometric analysis with trimming technique for quadruple arch‐cut ridged circle waveguide |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 23825938 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 20247009241 Country of ref document: KR Kind code of ref document: A |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2023825938 Country of ref document: EP Ref document number: 23825938.6 Country of ref document: EP |
|
ENP | Entry into the national phase |
Ref document number: 2023825938 Country of ref document: EP Effective date: 20240402 |