WO2023207440A1 - 一种基于电路翻转行为的vcd矢量压缩方法及装置 - Google Patents

一种基于电路翻转行为的vcd矢量压缩方法及装置 Download PDF

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WO2023207440A1
WO2023207440A1 PCT/CN2023/083013 CN2023083013W WO2023207440A1 WO 2023207440 A1 WO2023207440 A1 WO 2023207440A1 CN 2023083013 W CN2023083013 W CN 2023083013W WO 2023207440 A1 WO2023207440 A1 WO 2023207440A1
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vcd
sub
flipping
region
current
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PCT/CN2023/083013
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French (fr)
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卓成
陈宇飞
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浙江大学
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00—Details relating to the type of the circuit
    • G06F2115/06—Structured ASICs

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  • the invention relates to engineering technical fields such as design circuit verification, power supply integrity analysis, circuit power consumption analysis, etc., and particularly relates to a VCD vector compression method and device based on circuit flipping behavior for circuit transient simulation power consumption analysis.
  • Static IR analysis is based on the average IR Drop of the power grid. Different from the static IR Drop analysis, the dynamic IR analysis of the circuit targets the flipping behavior of the circuit, and the results are highly correlated with the input vector. In addition, dynamic IR Drop depends on the time of logic switching, and is not affected by the clock cycle like static IR Drop. For example, in Figure 1, the current average value of the same dynamic flip current at different clock cycles, that is, the results of static IR Drop will also be very different.
  • VCD files record the flipping behavior of the entire circuit during simulation, and their scale is generally very large, making it difficult for simulation software to analyze the entire VCD.
  • most of the moments recorded in the VCD file do not have the worst-case dynamic IR information, and it is not necessary to simulate these fragments when performing dynamic simulation. Therefore, it is very necessary to select key segments in the VCD for simulation.
  • providing a VCD vector compression method based on circuit flipping behavior to shorten the length of the transient simulation excitation vector is the key to improving simulation speed and shortening the design cycle.
  • the purpose of the present invention is to provide a VCD vector compression method and device based on circuit flipping behavior in view of the transient simulation speed problem of VCD vector excitation in current power supply integrity analysis.
  • this method can quickly compress the VCD vector without affecting the simulation results, and use the compressed VCD vector to obtain the power integrity simulation results.
  • the present invention provides a VCD vector compression method based on circuit flipping behavior, which method includes the following steps:
  • the preliminary screening current distribution matrix is re-divided into several time segments in the time dimension at equal intervals, and further screening is based on the local flipping characteristics.
  • the filtered time segments A fine-screen current distribution matrix is formed;
  • the local flipping feature is to divide the preliminary screening current distribution matrix into several sub-regions according to the position of the components, and calculate the flip rate of each sub-region itself and the mutual influence between different sub-regions;
  • step (1) the specific process of converting the VCD format file into a three-dimensional current matrix model is: map the flips recorded in the VCD file to the pins of the specific device, and then obtain the device position through the Def file to convert The flip is positioned at a specific position, corresponding to the two spatial dimensions of the current matrix; the initial time is determined based on the flip moment recorded in the VCD file, and then the specific current change with time is determined based on the mapping of flip to current, corresponding to the current matrix time dimension.
  • mapping from flip to current is the flip waveform recorded in the APL format file, or the current estimated based on the power consumption in the lib file.
  • step (1) the device flip vector recorded in the VCD format file is converted into a three-dimensional current distribution matrix; the flip behavior is recorded in matrix form to generate a sparse matrix, and the three-dimensional sparse matrix is recorded in dictionary form.
  • step (2) is specifically: for the current matrix model obtained in step (1), obtain the flip rate of each time segment according to the following formula:
  • ⁇ is the length of the time segment, and N total is the total number of component flips during this period;
  • step (2) the overall flip feature is to calculate the flip rate of circuit elements in each time segment, Filter out time segments that are greater than the preliminary filtering threshold.
  • the response sub-regions to the same flip excitation are in parallel relationship. It is assumed that the bottom metal layer is a horizontal layout and the next bottom metal layer is a vertical layout. The response The ratio of current is:
  • I s,a and I s,b represent the response currents of sub-region s in sub-region a and sub-region b
  • R s,a and R s,b respectively represent the response currents from sub-region s to sub-region a and sub-region b.
  • the resistance of , the lateral distance from sub-region s to sub-region a is d 1,a
  • the longitudinal distance is d 2,a
  • the lateral distance from sub-region s to sub-region b is d 1,b
  • the longitudinal distance is d 2,b
  • the ratio of the resistivity of the bottom metal layer and the next bottom metal layer is ⁇ ;
  • the influence of the flip on the sub-region where the flip is located is used as the normalization standard, that is, assuming that I s, s is 1, the ratio between each sub-region is calculated to obtain the mutual influence between different sub-regions.
  • time segment screening is as follows: the flip rate T s of sub-region s is calculated, and the response of sub-region a to this flip region is calculated.
  • the corresponding screening criteria are:
  • I s,a represents the response current of the excitation of sub-region s in sub-region a; D represents all sub-regions that need to be calculated, S represents all sub-regions with flips at the current moment, and ⁇ f represents the set fine screen threshold. , as long as the maximum response value of the sub-region in the time segment is greater than the fine screening threshold, the time segment is retained, otherwise it is removed.
  • step (4) is specifically: when the fine-sieved current distribution matrix of step (3) is spliced into a new VCD file, the length of each time segment should be greater than 10% of the length of the time segment used in screening, so as to To avoid the impact of the tailing of the previous time segment on the simulation results; when generating a new VCD file, it is necessary to complete the header information in the original VCD file, the mapping information from the VCD node name to the design name, and the initial value information.
  • the present invention provides a VCD vector compression device based on circuit flipping behavior, including a memory and one or more processors, executable code is stored in the memory, and the processor executes the executable code When, the steps are used to implement the VCD vector compression method based on circuit flipping behavior.
  • the present invention also provides a computer-readable storage medium for storing one or more computer programs.
  • the one or more computer programs include program codes.
  • the program code is used to execute a VCD vector compression method based on circuit flipping behavior.
  • the present invention uses flip rate characteristics to screen VCD files in two stages, and can ensure the accuracy of simulation results on the basis of significantly reducing the length of test vectors.
  • this method can filter out 60% of VCD vector fragments while ensuring that the relative error is within 10%. This method can quickly and accurately shorten the length of the transient simulation excitation vector, improve the simulation speed and shorten the design cycle.
  • Figure 1 is a schematic flow chart of a VCD vector compression method based on circuit flipping behavior of the present invention
  • Figure 2 is a schematic diagram of the metal lines Metal1 and Metal2 of the PDN network according to an embodiment of the present invention
  • Figure 3 is an error comparison diagram of the preliminary screening and original vector simulation results of the present invention in a specific scenario
  • Figure 4 is an error comparison diagram of the detailed screening and original vector simulation results of the present invention in a specific scenario
  • Figure 5 is an error comparison diagram of the two-stage sequential screening and the original vector simulation results of the present invention in a specific scenario
  • Figure 6 is a structural diagram of a VCD vector compression device based on circuit flipping behavior of the present invention.
  • a VCD vector compression method based on circuit flipping behavior of the present invention includes the following modules:
  • VCD format file Convert the VCD format file into a three-dimensional current matrix.
  • the three dimensions of the current matrix model are one time dimension and two space dimensions. This step is used to read the VCD file and convert it into a three-dimensional current distribution matrix model.
  • the VCD file can be divided into four parts: the header information part, the name mapping part, the initial value assigned to the circuit part and the flip value recording part.
  • the header information part records information such as the version when the VCD was generated, the tools used, and the time scale.
  • the time scale controls how much of a specific time each timestamp represents and is important information for mapping flips to actual time.
  • VCD maps the design name to a sequenced ASCII code name.
  • the name mapping part records the corresponding relationship between the design name and the ASCII code name. This part of the information pair associates the flip with the actual physical position and is important information for mapping the flip to the actual position.
  • the VCD file By assigning an initial value to the circuit and recording every flip of each component of the circuit, the VCD file describes the entire flip behavior process of the circuit in detail.
  • the initial value assigned to the circuit and the flip value recording part jointly record the flip behavior of the circuit throughout the simulation time and are the main components of the VCD file. For each component, its status at each moment can be read from the VCD file, so the input of the power consumption simulation can be determined through the VCD file.
  • the circuit behavior recorded in the VCD is also called the VCD vector.
  • the VCD vector has three dimensions, one time dimension to record the behavior of the component at different simulation times and two spatial dimensions to correspond to the coordinates of the component in the actual design.
  • the present invention records this three-dimensional sparse matrix in the dictionary form of ⁇ instance:[(time 1 , value 1 ), (time 2 , value 2 )...(time n , value n )] ⁇ .
  • instance represents the name of the device and is also the key of the dictionary
  • value 1 represents the moment of a certain flip and the corresponding flip value.
  • the current matrix obtained in step (1) is divided into several time segments in the time dimension at equal intervals, and is screened according to the overall flipping characteristics.
  • the screened time segments are composed of a preliminary screening current distribution matrix. This step Used for preliminary screening of the extracted current distribution matrix.
  • ⁇ is the length of the time segment
  • N total is the total number of component flips during this period of time.
  • this method is easy to implement, and in actual operation it can be completed in the same scan of the VCD file as the format conversion in step (1).
  • the flip rate at the current moment of conversion can be calculated at the same time. If the flip rate is lower than the threshold, this segment will be discarded.
  • the compression rate of the preliminary screening module can be easily adjusted.
  • the preliminary screening threshold ⁇ c can be selected from 40% to 60% of the maximum flip rate.
  • the preliminary screening current distribution matrix is redivided into several time segments at equal intervals in the time dimension, and further filtered according to the local flipping characteristics.
  • the filtered time segments form a fine meshing current distribution matrix; the local flipping.
  • the feature is to divide the preliminary screening current distribution matrix into several sub-regions according to the device position and its subordinate functional area, and then calculate the flip rate of each sub-region itself and the mutual influence between different sub-regions.
  • This module is used to utilize local flip. Features to measure the difference in flip distribution, thereby screening the current distribution matrix in more detail.
  • I s,a and I s,b represent the response currents of sub-region s in sub-region a and sub-region b
  • R s,a and R s,b respectively represent the response currents from sub-region s to sub-region a and sub-region b.
  • the resistance of , the lateral distance from sub-region s to sub-region a is d 1,a
  • the longitudinal distance is d 2,a
  • the lateral distance from sub-region s to sub-region b is d 1,b
  • the longitudinal distance is d 2,b
  • the ratio of the resistivity of the bottom metal layer and the next bottom metal layer is ⁇ ;
  • the influence of the flip on the sub-region where the flip is located is used as the normalization standard, that is, assuming that I s, s is 1, the ratio between each sub-region is calculated to obtain the mutual influence between different sub-regions.
  • time segment screening is as follows: the flip rate T s of sub-region s is calculated, and the response of sub-region a to this flip region is calculated.
  • the corresponding screening criteria are:
  • I s,a represents the response current of the excitation of sub-region s in sub-region a; D represents all sub-regions that need to be calculated, S represents all sub-regions with flips at the current moment, and ⁇ f represents the set fine screen threshold.
  • ⁇ f represents the set fine screen threshold.
  • Step (3) Re-output the fine-sieved current distribution matrix in step (3) into a VCD format file after vector compression.
  • the function of this step is to re-output the filtered current matrix into a VCD format file.
  • the length of each time segment should be slightly longer than the time length used for screening to avoid the tailing of the previous high flip rate segment from affecting the simulation results. Influence.
  • the header information, mapping information from VCD node name to design name, and initial value information in the original VCD file should also be completed.
  • the present invention uses flip rate characteristics to screen VCD files in two stages, and can ensure the accuracy of simulation results on the basis of significantly reducing the length of test vectors.
  • the present invention defines the compression ratio to measure the degree of compression, the global error (GE) and the regional error (RE) to measure the error, specifically as follows:
  • max(IR c ) represents the maximum IRDrop value obtained by using the compressed VCD simulation
  • max(IR r ) represents the maximum IRDrop value obtained by using the original VCD simulation
  • GE r represents the global error of sub-area r
  • R represents the entire area of the simulated circuit
  • RE is the average of the maximum IRDrop error in each sub-region.
  • the preliminary screening and detailed screening algorithms are cascaded.
  • the compression rate of the preliminary screening is selected as 0.8 to ensure that useful fragments are not over-filtered.
  • the results are shown in Figure 5.
  • the compression rate of detailed compression is 0.5
  • the overall compression rate is 0.4
  • the relative error is less than 10%.
  • the results show that compared with directly using the detailed compression algorithm, the error of the two-stage compression algorithm is reduced, and thanks to the low computational complexity of the preliminary screening algorithm, the calculation speed is significantly faster than directly using the detailed screening algorithm.
  • a VCD vector compression method based on circuit flipping behavior can quickly and accurately shorten the length of transient simulation excitation vectors through two-stage compression of VCD test vectors based on flip rate characteristics, which is to improve simulation speed and shorten Design cycle.
  • the present invention also provides embodiments of a VCD vector compression device based on circuit flipping behavior.
  • an embodiment of the present invention provides a VCD vector compression device based on circuit flipping behavior, including a memory and one or more processors.
  • the memory stores executable code
  • the processor executes the executable code.
  • the code is executed, it is used to implement the VCD vector compression method based on circuit flipping behavior in the above embodiment.
  • the embodiment of the VCD vector compression device based on circuit flipping behavior of the present invention can be applied to any device with data processing capabilities, and any device with data processing capabilities can be a device or device such as a computer.
  • the device embodiments may be implemented by software, or may be implemented by hardware or a combination of software and hardware. Taking software implementation as an example, as a logical device, it is formed by reading the corresponding computer program instructions in the non-volatile memory into the memory and running them through the processor of any device with data processing capabilities. From the hardware level, as shown in Figure 6, it is a hardware structure diagram of any device with data processing capabilities where the VCD vector compression device based on circuit flipping behavior of the present invention is located.
  • any device with data processing capabilities where the device in the embodiment is located may also include other hardware based on the actual functions of any device with data processing capabilities, which will not be described again. .
  • the device embodiment since it basically corresponds to the method embodiment, please refer to the partial description of the method embodiment for relevant details.
  • the device embodiments described above are only illustrative.
  • the units described as separate components may or may not be physically separated.
  • the components shown as units may or may not be physical units, that is, they may be located in One location, or it can be distributed across multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of the present invention. Persons of ordinary skill in the art can understand and implement the method without any creative effort.
  • An embodiment of the present invention also provides a computer-readable storage medium on which a program is stored.
  • the program is executed by a processor, the VCD vector compression method based on circuit flipping behavior in the above embodiment is implemented.
  • the computer-readable storage medium may be an internal storage unit of any device with data processing capabilities as described in any of the foregoing embodiments, such as a hard disk or a memory.
  • the computer-readable storage medium can also be an external storage device of any device with data processing capabilities, such as a plug-in hard disk, smart memory card (Smart Media Card, SMC), SD card, flash memory card equipped on the device (Flash Card) etc.
  • the computer-readable storage medium may also include both an internal storage unit and an external storage device of any device with data processing capabilities.
  • the computer-readable storage medium is used to store the computer program and other programs and data required by any device with data processing capabilities, and can also be used to temporarily store data that has been output or is to be output.

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Abstract

本发明公开了一种基于电路翻转行为的VCD矢量压缩方法及装置，该方法包括：VCD格式文件至电流矩阵模型之间的变换，电流矩阵模型的三个维度为一个时间维度和两个空间维度；基于整体翻转特征的初步筛选，按照等间隔在时间维度上将电流矩阵划分为若干时间片段，根据总体翻转特征进行筛选，筛选后的时间片段组成的初筛电流分布矩阵；基于区域翻转特征的细致筛选，根据局部翻转特征进一步筛选，筛选后的时间片段组成细筛电流分布矩阵；细筛电流分布矩阵重新输出为矢量压缩后的VCD格式文件。该方法利用VCD矢量不同时刻的翻转率来筛选VCD片段，对于缩短集成电路设计中电源完整性仿真具有重要意义。

Description

一种基于电路翻转行为的VCD矢量压缩方法及装置 技术领域
本发明设计电路验证、电源完整性分析、电路功耗分析等工程技术领域，特别涉及用于电路瞬态仿真功耗分析的基于电路翻转行为的VCD矢量压缩方法及装置。
背景技术
随着超大规模集成电路工艺的发展，芯片工作电压越来越低，但是电流密度却越来越高。这导致系统的噪声容限越来越低，从而对电源系统在整个工作频段内的稳定性提出了更高的要求。电源完整性对系统可靠性、信噪比与误码率、EMI/EMC等电路设计中重要指标有着越来越重要的影响。因此，先进工艺的集成电路设计通常对电源完整性具有很严格的指标以确保电路的稳定性。
芯片上的功率分配需要确保电路的鲁棒性，这意味着它不仅要满足平均功率/电流要求，而且还需要确保时序或可靠性不因局部电源需求和开关模式引起的动态IR下降而受到影响。静态IR分析针对于电源网的平均IR Drop。区别于静态IR Drop分析，电路的动态IR分析针对电路的翻转行为，其结果因输入向量高度相关。此外，动态IR Drop取决于逻辑切换的时间，而并非像静态IR Drop一样受时钟周期的影响。比如在图1中，相同的动态翻转电流在不同的时钟周期下的电流平均值，即静态IR Drop的结果差别也会很大。
尽管现有的仿真软件也支持无矢量的动态IR仿真，但是由VCD驱动的动态IR仿真更贴近电路的实际运行状态，更有助于发现实际场景下的设计缺陷。但是VCD文件记录了仿真时整个电路的翻转行为，其规模一般非常庞大，仿真软件很难对整个VCD进行分析。与此同时，VCD文件中记录的大部分时刻都不会出现最差情况的动态IR信息，在进行动态仿真时是没有必要对这些片段进行仿真的。因此，选取出VCD中关键片段进行仿真是非常必要的。
但是据我们所知，目前还没有一种开源且成熟的VCD片段筛选技术出现。设计者更多地凭借自己的经验对VCD片段进行筛选，而没有出现一种统一的标准，这更要求我们开发出一种准确的VCD片段筛选技术，以加快动态IR仿真的速度，从而能够缩减芯片设计的验证时间。
综上，提供一种基于电路翻转行为的VCD矢量压缩方法，缩短瞬态仿真激励向量的长度，是提高仿真速度，缩短设计周期的关键。
发明内容
本发明的目的在于针对目前电源完整性分析中VCD向量激励的瞬态仿真速度问题，提供一种基于电路翻转行为的VCD矢量压缩方法及装置。在进行电源完整性测试时，本方法可以快速且不影响仿真结果地VCD矢量进行压缩，利用压缩的VCD矢量得到电源完整性仿真结果。
本发明的目的是通过以下技术方案来实现的：第一方面，本发明提供了一种基于电路翻转行为的VCD矢量压缩方法，该方法包括以下步骤：
(1)将VCD格式文件变换成三维电流矩阵，电流矩阵模型的三个维度为一个时间维度和两个空间维度；
(2)基于整体翻转特征的初步筛选；根据为步骤(1)所得到的电流矩阵，按照等间隔在时间维度上将电流矩阵划分为若干时间片段，根据总体翻转特征进行筛选，筛选后的时间片段组成的初筛电流分布矩阵；
(3)基于区域翻转特征的细致筛选；根据初筛电流分布矩阵，按照等间隔在时间维度上将初筛电流分布矩阵重新划分为若干时间片段，根据局部翻转特征进一步筛选，筛选后的时间片段组成细筛电流分布矩阵；所述局部翻转特征为将初筛电流分布矩阵按照元件位置划分为若干子区域，计算每个子区域自身翻转率以及不同子区域之间的相互影响；
(4)将步骤(3)的细筛电流分布矩阵重新输出为矢量压缩后的VCD格式文件。
进一步地，步骤(1)中，将VCD格式文件变换成三维电流矩阵模型的具体过程为：将VCD文件中记录的翻转对应到具体器件的管脚上，再通过Def文件获取器件位置，以将翻转定位到具体位置上，对应于电流矩阵的两个空间维度；根据VCD文件中记录的翻转时刻确定初始时间，再根据翻转到电流的映射确定具体的电流随时间的变化，对应于电流矩阵的时间维度。
进一步地，翻转到电流的映射为APL格式文件记录的翻转波形，或者根据lib文件中功耗估算的电流。
进一步地，步骤(1)中，将VCD格式文件记录的器件翻转矢量转换为三维电流分布矩阵；以矩阵形式记录翻转行为生成一个稀疏的矩阵，以字典形式来记录此三维稀疏矩阵。
进一步地，步骤(2)具体为：对于步骤(1)得到的电流矩阵模型，根据下式求得每个时间片段的翻转率：
式中，τ是时间片段的长度，Ntotal是此段时间内元件翻转的总次数；
设置初步筛选阈值θc，保留翻转率高于θc的片段，去除翻转率低于阈值的片段。
进一步地，步骤(2)中，所述总体翻转特征为计算每个时间片段内的电路元件翻转率， 筛选出大于初步筛选阈值的时间片段。
进一步地，计算不同子区域之间的相互影响，具体过程为：对同一翻转激励的响应子区域之间是并联关系，假设最底层金属层是横向布局，次底层金属层是纵向布局，其响应电流的比值为：
式中，Is,a和Is,b表示子区域s的激励在子区域a和子区域b的响应电流，Rs,a和Rs,b分别表示子区域s到子区域a和子区域b的电阻，子区域s到子区域a的横向距离为d1,a，纵向距离为d2,a，子区域s到子区域b的横向距离为d1,b，纵向距离为d2,b，最底层金属层与次底层金属层电阻率的比值为α；
以翻转对翻转所在子区域的影响为归一化标准，即假设Is,s为1，从而计算的各个子区域之间的比值，得到不同子区域之间的相互影响。
进行时间片段筛选的过程具体为：子区域s的翻转率Ts，计算出子区域a对此翻转区域的响应，对应的筛选标准为：
式中，Is,a表示子区域s的激励在子区域a的响应电流；D代表所有需要计算的子区域，S代表当前时刻所有有翻转的子区域，θf表示设定的细筛阈值，只要时间片段内的子区域响应最大值大于细筛阈值，则保留该时间片段，否则去除。
进一步地，步骤(4)具体为，对步骤(3)的细筛电流分布矩阵拼接成新的VCD文件时，每个时间片段的长度应大于筛选时所用的时间片段长度的10％以上，以避免前一个时间片段的拖尾对仿真结果的影响；生成新VCD文件时，需要补齐原VCD文件中的头信息、VCD节点名称到设计名称的映射信息和初值信息。
第二方面，本发明提供了一种基于电路翻转行为的VCD矢量压缩装置，包括存储器和一个或多个处理器，所述存储器中存储有可执行代码，所述处理器执行所述可执行代码时，用于实现基于电路翻转行为的VCD矢量压缩方法的步骤。
第三方面，本发明还提供了一种计算机可读的存储介质，用于存储一个或多个计算机程序，所述一个或多个计算机程序包括程序代码，当所述计算机程序在计算机上运行时，所述程序代码用于执行基于电路翻转行为的VCD矢量压缩方法。
本发明的有益效果：
本发明利用翻转率特征，分两阶段逐次筛选VCD文件，并能够在显著减少测试矢量长度的基础上保证仿真结果的正确。对于一个典型的PDN的功耗仿真实例，该方法保证相对误差在10％以内的同时，可以筛选掉60％的VCD矢量片段。这种方法能够快速且准确地缩短瞬态仿真激励向量的长度，是提高仿真速度，缩短设计周期。
附图说明
图1是本发明一种基于电路翻转行为的VCD矢量压缩方法的流程示意图；
图2是本发明一个实施例PDN网络Metal1和Metal2金属线示意图；
图3是本发明一个在具体场景下本发明初步筛选与原始向量仿真结果误差对比图；
图4是本发明一个在具体场景下本发明细致筛选与原始向量仿真结果误差对比图；
图5是本发明一个在具体场景下本发明两阶段逐次筛选与原始向量仿真结果误差对比图；
图6是本发明一种基于电路翻转行为的VCD矢量压缩装置的结构图。
具体实现方式
下面结合附图和具体实施例对本发明作进一步详细说明。
如图1所示，本发明一种基于电路翻转行为的VCD矢量压缩方法包括以下模块：
(1)VCD文件读取与转换
将VCD格式文件变换成三维电流矩阵，电流矩阵模型的三个维度为一个时间维度和两个空间维度，此步骤用于读取VCD文件并将其转换为三维电流分布矩阵模型。
其具体为，VCD文件可以分为四个部分：头信息部分、名称映射部分、赋予电路初值部分和翻转数值记录部分。
其中头信息部分记录了VCD生成时的版本、所用工具和时间尺度等信息。时间尺度控制了每个时间戳代表具体时间的多少，是将翻转映射到实际时间的重要信息。
为了压缩文件长度，VCD将设计名称映射为一个按序排列的ascii码名称，名称映射部分就记录了设计名称和ascii码名称的对应关系。此部分信息对将翻转与实际物理位置关联起来，是将翻转映射到实际位置的重要信息。
通过赋予电路初值并记录电路每个元件每一次翻转，VCD文件详尽地描述了电路的整个翻转行为过程。赋予电路初值部分和翻转数值记录部分共同记录了整个仿真时间内电路的翻转行为，是VCD文件的主要组成部分。对每一个元件来说，其每一时刻的状态都可以从VCD文件中读取，因而可以通过VCD文件来确定功耗仿真的输入，VCD中记录的电路行为，也被称为VCD矢量。一般来说，VCD矢量有三个维度，一个时间维度用以记录元件在不同仿真时间的行为和两个空间维度以对应元件在实际设计中的坐标。
对VCD文件读取，首先需要读出头信息中的时间尺度用于确定时间片段的长度；然后要记录名称映射部分VCD记录的元件ascii名称到物理设计名称的映射信息，以便于将每个翻转映射到具体的位置；最后是结合初值与翻转信息，得到电流变化矩阵。由于VCD文件中一个元件的翻转间隔远远大于记录间隔，所以直接以矩阵形式记录翻转行为会生成一个非常稀疏的矩阵。为了降低储存量，本发明以{instance:[(time1,value1),(time2,value2)…(timen,valuen)]}的字典形式来记录此三维稀疏矩阵。
其中，instance代表器件的名称同时也是字典的键，(time1,value1)表示某次翻转的时刻与对应的翻转值。
(2)基于整体翻转特征的初步筛选
根据为步骤(1)所得到的电流矩阵，按照等间隔在时间维度上将电流矩阵划分为若干时间片段，根据总体翻转特征进行筛选，筛选后的时间片段组成的初筛电流分布矩阵，此步骤用于初步筛选所提取出的电流分布矩阵。
其具体为，供电网络存在电阻是导致电源存在IRDrop的根本原因，而翻转率越高对应着所需的供电电流越大，越大的供电电流就会导致更严重的IR Drop。因此，翻转率与IR Drop存在着正相关的关系，可以使用翻转率作为特征来筛选有效地VCD片段。根据下式求得每个片段的翻转率：
式中，τ是时间片段的长度，Ntotal是此段时间内元件翻转的总次数。
设置初步筛选阈值θc，比较每个时间片段的翻转率，保留翻转率高于θc的片段，去除翻转率低于阈值的片段。
与此同时，这种方法易于实现，在实际操作中可以同时与步骤(1)中的格式转换在对VCD文件的同一次扫描中完成。在格式转换时，可以同时计算当前被转换时刻的翻转率，如果翻转率低于阈值，则舍去这一片段。通过控制初步筛选阈值θc，可以很方便的调节初步筛选模块的压缩率。一般来说，初步筛选阈值θc可以选择最大翻转率的40％到60％。
(3)基于区域翻转特征的细致筛选
根据初筛电流分布矩阵，按照等间隔在时间维度上将初筛电流分布矩阵重新划分为若干时间片段，根据局部翻转特征进一步筛选，筛选后的时间片段组成细筛电流分布矩阵；所述局部翻转特征为将初筛电流分布矩阵按照器件位置以及其从属的功能区域等条件划分为若干子区域，然后计算每个子区域自身翻转率以及不同子区域之间的相互影响，此模块用于利用局部翻转特征，衡量翻转分布的差异性，从而更细致地筛选电流分布矩阵。
考虑到电路的翻转行为在空间上的分布并不均匀，具有相同总翻转率的片段在各个子区域上的翻转率并不相同。当总翻转率相同时，翻转越集中的区域的IRDrop值越大。因此，需要更细致地分区域进行进一步分析。将初步筛选后的电流分布矩阵按照元件位置划分为若干子区域，统计每个子区域自身翻转率以及不同子区域之间的相互影响，以对VCD做更精确的筛选。考虑到电源完整性分析的对象通常是如图2所示的横纵交错的电源分配网络，在图2中横向是最底层的金属线，纵向是次底层的金属线。由于底层金属更靠近各种设计的功能元件，其电流密度更大，因此是电源完整性分析的重点。且不同子区域对同一翻转激励的响应是并联关系，其响应电流的比值为：
式中，Is,a和Is,b表示子区域s的激励在子区域a和子区域b的响应电流，Rs,a和Rs,b分别表示子区域s到子区域a和子区域b的电阻，子区域s到子区域a的横向距离为d1,a，纵向距离为d2,a，子区域s到子区域b的横向距离为d1,b，纵向距离为d2,b，最底层金属层与次底层金属层电阻率的比值为α；
以翻转对翻转所在子区域的影响为归一化标准，即假设Is,s为1，从而计算的各个子区域之间的比值，得到不同子区域之间的相互影响。
进行时间片段筛选的过程具体为：子区域s的翻转率Ts，计算出子区域a对此翻转区域的响应，对应的筛选标准为：
式中，Is,a表示子区域s的激励在子区域a的响应电流；D代表所有需要计算的子区域，S代表当前时刻所有有翻转的子区域，θf表示设定的细筛阈值，只要时间片段内的子区域响应最大值大于细筛阈值，则保留该时间片段，否则去除。θf的选择要依实际设计和期望筛选率而定，一般而言可以选择为所有时间片段的所有子区域最大翻转率的70％。
(4)电流矩阵转换
将步骤(3)的细筛电流分布矩阵重新输出为矢量压缩后的VCD格式文件，此步骤的作用为将筛选后的电流矩阵重新输出为VCD格式文件。
其具体为，细致筛选后的电流分布模型拼接成新的VCD文件时，每个时间片段的长度应略长于筛选时所用的时间长度，以避免前一个高翻转率片段的拖尾对仿真结果的影响。生成新VCD文件时，也应该补齐原VCD文件中的头信息、VCD节点名称到设计名称的映射信息和初值信息。
本发明利用翻转率特征，分两阶段逐次筛选VCD文件，并能够在显著减少测试矢量长度的基础上保证仿真结果的正确。为了衡量压缩程度和压缩后矢量与原始矢量的误差，本发明定义压缩率衡量压缩程度、全局误差(GE)和区域误差(RE)衡量误差，具体为：


式中，max(IRc)表示使用压缩后VCD仿真得到的IRDrop最大值，max(IRr)表示使用原始VCD仿真得到的IRDrop最大值。GEr表示子区域r的全局误差，R代表仿真电路的整个区域。RE是每个子区域最大值IRDrop误差的平均数。
如图3所示，对于一个3mm×3mm的PDN实例，以1000ns的VCD序列作为输入，当初步筛选压缩率高于0.7时，相对误差低于5％；当压缩率高于0.8时，相对误差低于1％。如图4所示，对于细致筛选阶段，当压缩率高于0.5时，算法筛选后片段误差低于3％。
为了衡量累计误差，将初步筛选和细致筛选算法级联，其中初步筛选的压缩率选定为0.8以保证没有过度筛选掉有用片段，其结果如图5所示。当细致压缩的压缩率为0.5时，此时总体压缩率为0.4，相对误差低于10％。结果表明，相较于直接使用细致压缩算法，两阶段的压缩算法误差有所降低，且得益于低计算复杂度的初步筛选算法，计算速度显著快于直接使用细致筛选算法。综上，一种基于电路翻转行为的VCD矢量压缩方法，通过两阶段的基于翻转率特征对VCD测试矢量进行压缩，能够快速且准确地缩短瞬态仿真激励向量的长度，是提高仿真速度，缩短设计周期。
与前述基于电路翻转行为的VCD矢量压缩方法的实施例相对应，本发明还提供了基于电路翻转行为的VCD矢量压缩装置的实施例。
参见图6，本发明实施例提供的一种基于电路翻转行为的VCD矢量压缩装置，包括存储器和一个或多个处理器，所述存储器中存储有可执行代码，所述处理器执行所述可执行代码时，用于实现上述实施例中的基于电路翻转行为的VCD矢量压缩方法。
本发明基于电路翻转行为的VCD矢量压缩装置的实施例可以应用在任意具备数据处理能力的设备上，该任意具备数据处理能力的设备可以为诸如计算机等设备或装置。装置实施例可以通过软件实现，也可以通过硬件或者软硬件结合的方式实现。以软件实现为例，作为一个逻辑意义上的装置，是通过其所在任意具备数据处理能力的设备的处理器将非易失性存储器中对应的计算机程序指令读取到内存中运行形成的。从硬件层面而言，如图6所示，为本发明基于电路翻转行为的VCD矢量压缩装置所在任意具备数据处理能力的设备的一种硬件结构图，除了图6所示的处理器、内存、网络接口、以及非易失性存储器之外，实施例中装置所在的任意具备数据处理能力的设备通常根据该任意具备数据处理能力的设备的实际功能，还可以包括其他硬件，对此不再赘述。
上述装置中各个单元的功能和作用的实现过程具体详见上述方法中对应步骤的实现过程，在此不再赘述。
对于装置实施例而言，由于其基本对应于方法实施例，所以相关之处参见方法实施例的部分说明即可。以上所描述的装置实施例仅仅是示意性的，其中所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本发明方案的目的。本领域普通技术人员在不付出创造性劳动的情况下，即可以理解并实施。
本发明实施例还提供一种计算机可读存储介质，其上存储有程序，该程序被处理器执行时，实现上述实施例中的基于电路翻转行为的VCD矢量压缩方法。
所述计算机可读存储介质可以是前述任一实施例所述的任意具备数据处理能力的设备的内部存储单元，例如硬盘或内存。所述计算机可读存储介质也可以是任意具备数据处理能力的设备的外部存储设备，例如所述设备上配备的插接式硬盘、智能存储卡(Smart Media Card，SMC)、SD卡、闪存卡(Flash Card)等。进一步的，所述计算机可读存储介质还可以既包括任意具备数据处理能力的设备的内部存储单元也包括外部存储设备。所述计算机可读存储介质用于存储所述计算机程序以及所述任意具备数据处理能力的设备所需的其他程序和数据，还可以用于暂时地存储已经输出或者将要输出的数据。
上述实施例用来解释说明本发明，而不是对本发明进行限制，在本发明的精神和权利要求的保护范围内，对本发明作出的任何修改和改变，都落入本发明的保护范围。

Claims (10)

  1. 一种基于电路翻转行为的VCD矢量压缩方法，其特征在于，该方法包括以下步骤：
    (1)将VCD格式文件变换成三维电流矩阵，电流矩阵模型的三个维度为一个时间维度和两个空间维度；
    (2)基于整体翻转特征的初步筛选；根据为步骤(1)所得到的电流矩阵，按照等间隔在时间维度上将电流矩阵划分为若干时间片段，根据总体翻转特征进行筛选，筛选后的时间片段组成的初筛电流分布矩阵；
    (3)基于区域翻转特征的细致筛选；根据初筛电流分布矩阵，按照等间隔在时间维度上将初筛电流分布矩阵重新划分为若干时间片段，根据局部翻转特征进一步筛选，筛选后的时间片段组成细筛电流分布矩阵；所述局部翻转特征为将初筛电流分布矩阵按照元件位置划分为若干子区域，计算每个子区域自身翻转率以及不同子区域之间的相互影响；
    (4)将步骤(3)的细筛电流分布矩阵重新输出为矢量压缩后的VCD格式文件。
  2. 根据权利要求1所述的一种基于电路翻转行为的VCD矢量压缩方法，其特征在于，步骤(1)中，将VCD格式文件变换成三维电流矩阵模型的具体过程为：将VCD文件中记录的翻转对应到具体器件的管脚上，再通过Def文件获取器件位置，以将翻转定位到具体位置上，对应于电流矩阵的两个空间维度；根据VCD文件中记录的翻转时刻确定初始时间，再根据翻转到电流的映射确定具体的电流随时间的变化，对应于电流矩阵的时间维度。
  3. 根据权利要求2所述的一种基于电路翻转行为的VCD矢量压缩方法，其特征在于，翻转到电流的映射为APL格式文件记录的翻转波形，或者根据lib文件中功耗估算的电流。
  4. 根据权利要求1所述的一种基于电路翻转行为的VCD矢量压缩方法，其特征在于，步骤(1)中，将VCD格式文件记录的器件翻转矢量转换为三维电流分布矩阵；以矩阵形式记录翻转行为生成一个稀疏的矩阵，以字典形式来记录此三维稀疏矩阵。
  5. 根据权利要求1所述的一种基于电路翻转行为的VCD矢量压缩方法，其特征在于，步骤(2)具体为：对于步骤(1)得到的电流矩阵模型，根据下式求得每个时间片段的翻转率：
    式中，τ是时间片段的长度，Ntotal是此段时间内元件翻转的总次数；
    设置初步筛选阈值θc，保留翻转率高于θc的片段，去除翻转率低于阈值的片段。
  6. 根据权利要求1所述的一种基于电路翻转行为的VCD矢量压缩方法，其特征在于，步骤(2)中，所述总体翻转特征为计算每个时间片段内的电路元件翻转率，筛选出大于初步筛选阈值的时间片段。
  7. 根据权利要求1所述的一种基于电路翻转行为的VCD矢量压缩方法，其特征在于，计算不同子区域之间的相互影响，具体过程为：对同一翻转激励的响应子区域之间是并联关系，假设最底层金属层是横向布局，次底层金属层是纵向布局，其响应电流的比值为：
    式中，Is,a和Is,b表示子区域s的激励在子区域a和子区域b的响应电流，Rs,a和Rs,b分别表示子区域s到子区域a和子区域b的电阻，子区域s到子区域a的横向距离为d1,a，纵向距离为d2,a，子区域s到子区域b的横向距离为d1,b，纵向距离为d2,b，最底层金属层与次底层金属层电阻率的比值为α；
    以翻转对翻转所在子区域的影响为归一化标准，即假设Is,s为1，从而计算的各个子区域之间的比值，得到不同子区域之间的相互影响。
    进行时间片段筛选的过程具体为：子区域s的翻转率Ts，计算出子区域a对此翻转区域的响应，对应的筛选标准为：
    式中，Is,a表示子区域s的激励在子区域a的响应电流；D代表所有需要计算的子区域，S代表当前时刻所有有翻转的子区域，θf表示设定的细筛阈值，只要时间片段内的子区域响应最大值大于细筛阈值，则保留该时间片段，否则去除。
  8. 根据权利要求1所述的一种基于电路翻转行为的VCD矢量压缩方法，其特征在于，步骤(4)具体为，对步骤(3)的细筛电流分布矩阵拼接成新的VCD文件时，每个时间片段的长度应大于筛选时所用的时间片段长度的10％以上，以避免前一个时间片段的拖尾对仿真结果的影响；生成新VCD文件时，需要补齐原VCD文件中的头信息、VCD节点名称到设计名称的映射信息和初值信息。
  9. 一种基于电路翻转行为的VCD矢量压缩装置，包括存储器和一个或多个处理器，所述存储器中存储有可执行代码，其特征在于，所述处理器执行所述可执行代码时，用于实现如权利要求1-8中任一项所述的基于电路翻转行为的VCD矢量压缩方法的步骤。
  10. 一种计算机可读的存储介质，用于存储一个或多个计算机程序，所述一个或多个计算机程序包括程序代码，当所述计算机程序在计算机上运行时，所述程序代码用于执行上述权利要求1-8任一项所述的基于电路翻转行为的VCD矢量压缩方法。
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