WO2023193489A1 - Oled电路、oled显示面板、显示屏及电子设备 - Google Patents

Oled电路、oled显示面板、显示屏及电子设备 Download PDF

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Publication number
WO2023193489A1
WO2023193489A1 PCT/CN2022/143675 CN2022143675W WO2023193489A1 WO 2023193489 A1 WO2023193489 A1 WO 2023193489A1 CN 2022143675 W CN2022143675 W CN 2022143675W WO 2023193489 A1 WO2023193489 A1 WO 2023193489A1
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Prior art keywords
circuit
sub
ambient light
row
electrically connected
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PCT/CN2022/143675
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English (en)
French (fr)
Inventor
孙建明
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荣耀终端有限公司
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Publication of WO2023193489A1 publication Critical patent/WO2023193489A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/14—Detecting light within display terminals, e.g. using a single or a plurality of photosensors
    • G09G2360/141—Detecting light within display terminals, e.g. using a single or a plurality of photosensors the light conveying information used for selecting or modulating the light emitting or modulating element
    • G09G2360/142—Detecting light within display terminals, e.g. using a single or a plurality of photosensors the light conveying information used for selecting or modulating the light emitting or modulating element the light being detected by light detection means within each pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/14—Detecting light within display terminals, e.g. using a single or a plurality of photosensors
    • G09G2360/144—Detecting light within display terminals, e.g. using a single or a plurality of photosensors the light being ambient light

Definitions

  • the present application relates to the field of display technology, and in particular to an OLED circuit, an OLED display panel, a display screen and electronic equipment.
  • the display brightness of the display screen in the electronic device can be manually adjusted through user manipulation.
  • an ambient light sensor can also be installed in the electronic device to sense the intensity of the surrounding ambient light, so that the electronic device can adaptively adjust the display brightness of the display screen according to the intensity of the ambient light.
  • This application provides an OLED circuit, OLED display panel, display screen and electronic equipment, which can not only adapt to high refresh rates, but also collect ambient light when the same row and two adjacent rows of OLED sub-pixel circuits do not emit light, improving detection efficiency. Accuracy.
  • an ambient light sub-pixel circuit which is provided in an OLED display panel.
  • the ambient light sub-pixel circuit includes: an ambient light reset sub-circuit, a photoelectric conversion sub-circuit and a switch control sub-circuit.
  • the ambient light reset sub-circuit is The placement sub-circuit, the photoelectric conversion sub-circuit and the switch control sub-circuit are all electrically connected to the first node;
  • the ambient light reset sub-circuit is also electrically connected to the first control terminal and the reset control terminal.
  • the ambient light reset sub-circuit is used to reset the reset sub-circuit under the control of the voltage from the first control terminal.
  • the voltage of the control terminal is input to the first node;
  • the photoelectric conversion subcircuit is also electrically connected to the ground terminal, and the photoelectric conversion subcircuit is used to convert ambient light into voltage and provide it to the first node;
  • the switch control sub-circuit is also electrically connected to the third control terminal and the primary ambient light output terminal.
  • the switch control sub-circuit is used to control the third control terminal during the non-light-emitting phase of the OLED sub-pixel circuit.
  • the first-level ambient light output terminal outputs the voltage at the first node as the first-level ambient light signal.
  • the ambient light reset circuit can input the voltage of the reset control terminal into the first node under the control of the voltage from the first control terminal when the corresponding OLED sub-pixel circuit is in the light-emitting stage to implement the reset.
  • the switch control sub-circuit can be controlled by the first-level ambient light under the control of the third control terminal when the OLED sub-pixel circuits of the same row, the OLED sub-pixel circuits of the previous row and the OLED sub-pixel circuits of the next row are all in the non-light-emitting stage.
  • the output terminal outputs the voltage at the first node as a first-level ambient light signal.
  • Embodiments of the present application provide an ambient light sub-pixel circuit.
  • the first control terminal controls the ambient light reset sub-circuit to be turned on, so that the voltage provided by the reset control terminal is input to the first node, eliminating the The residual voltage; then, during the non-luminous stage of the OLED sub-pixel circuit, the third control terminal can control the switch control sub-circuit to turn on, so that the voltage after the photoelectric conversion sub-circuit collects and converts ambient light can pass through the first node , output through the switch control subcircuit.
  • the circuit collects ambient light during the non-luminous phase, thereby improving the accuracy of collection.
  • the ambient light reset sub-circuit includes a first transistor
  • the gate electrode of the first transistor is electrically connected to the first control terminal, the first electrode of the first transistor is electrically connected to the reset control terminal, and the second electrode of the first transistor is electrically connected to the first control terminal.
  • One node is electrically connected.
  • the photoelectric conversion subcircuit includes a photodiode and a first capacitor
  • the first end of the photodiode is electrically connected to the first node, and the second end of the photodiode is electrically connected to the ground end;
  • the first end of the first capacitor is electrically connected to the first node, and the second end of the first capacitor is electrically connected to the ground end.
  • the photodiode is used to generate charges under the illumination of ambient light to form a current to form a voltage difference between the first node and the ground terminal to achieve photoelectric conversion.
  • the first capacitance is the capacitance generated by the photodiode itself.
  • the switch control sub-circuit includes a second transistor
  • the gate of the second transistor is electrically connected to the third control terminal, the first pole of the second transistor is electrically connected to the first node, and the second pole of the second transistor is electrically connected to the first stage.
  • the ambient light output terminal is electrically connected.
  • an OLED circuit which is used in an OLED display panel.
  • the OLED display panel includes a plurality of sub-pixels arranged in an array; the OLED circuit includes: a multi-row scanning synchronization circuit and a multi-row enabling synchronization circuit;
  • the OLED circuit also includes:
  • the Nth row scan synchronization circuit is electrically connected to the Mth row ambient light sub-pixel circuit, and the Nth row scan synchronization circuit is used to provide a first control signal to the Mth row ambient light sub-pixel circuit;
  • the Nth row enabling synchronization circuit is electrically connected to the Mth row ambient light sub-pixel circuit, and the Nth row enabling synchronization circuit is used to provide a third control signal to the Mth row ambient light sub-pixel circuit;
  • the M-th row ambient light sub-pixel circuit is used for resetting under the control of the first control signal, and is also used for the N-1-th row OLED sub-pixel circuit, the N-th row OLED sub-pixel circuit and the N-th row OLED sub-pixel circuit.
  • the N+1 rows of OLED sub-pixel circuits emit light
  • ambient light is collected under the control of the third control signal, and a first-level ambient light signal is generated.
  • Embodiments of the present application provide an OLED circuit that provides a first control signal for the ambient light sub-pixel circuit of the current row by adding a scan synchronization circuit to reset the ambient light sub-pixel circuit of the current row.
  • An enable synchronization circuit is also added to provide a third control signal for the ambient light sub-pixel circuit of this row to control the ambient light sub-pixel circuit of this row to collect ambient light when the OLED sub-pixel circuits of the same row and two adjacent rows do not emit light. and output.
  • the impact of the light intensity generated by the OLED sub-pixel circuit during the light-emitting phase on the ambient photo-pixel circuit can be avoided, so that the ambient photo-sub pixel circuit can only operate in the same or similar environment.
  • the adjacent two rows of OLED sub-pixel circuits collect ambient light during the non-emitting phase, which can improve the accuracy of collection.
  • the acquisition process can be adapted to high refresh rate displays.
  • the OLED circuit further includes: a multi-row scanning circuit and a multi-row enabling circuit;
  • each row of scanning circuits is electrically connected to the scanning end of the OLED sub-pixel circuit of the same row.
  • Each row of scanning circuit is used to provide scanning signals to the OLED sub-pixel circuits of the same row.
  • the OLED sub-pixel circuit is used to Under the control of the scanning signal provided by the scanning circuit of the same counterpart, receiving the voltage provided by the data line;
  • the enable output terminal of each row of enable circuits is electrically connected to the enable terminal of the OLED sub-pixel circuit of the same row.
  • the enable circuit of each row is used to provide an enable signal for the OLED sub-pixel circuit of the same row.
  • the OLED sub-pixels The circuit is used to not emit light under the control of an enable signal provided by the enable circuit of the same counterpart;
  • the scan output terminal of the N-1th row scan circuit is electrically connected to the scan synchronization input terminal of the N-th row scan synchronization circuit, and the scan synchronization output terminal of the N-th row scan synchronization circuit is electrically connected to the scan synchronization input terminal of the M-th row ambient photon pixel circuit.
  • the first control terminal is electrically connected, and the Nth row scanning synchronization circuit is also electrically connected to the amplification control terminal; the Nth row scanning synchronization circuit is used to connect the scanning signal provided by the N-1th row scanning circuit to the Under the common control of the amplification control signal provided by the amplification control terminal, the first control signal is provided to the first control terminal of the M-th row of ambient light sub-pixel circuit;
  • the enable output terminal of the N-1th row enable circuit is electrically connected to the first enable input terminal of the Nth row enable synchronous circuit, and the enable output terminal of the N+1 row enable circuit is electrically connected to the Nth row enable synchronous circuit.
  • the second enable input terminal is electrically connected, and the enable synchronization output terminal of the Nth row enable synchronization circuit is electrically connected to the third control terminal of the Mth row ambient photon pixel circuit.
  • the Nth row enable synchronization circuit For controlling the enable signal provided by the N-1th row enable circuit and the enable signal provided by the N+1th row enable circuit, to the Mth row ambient light sub-pixel circuit.
  • the third control terminal provides the third control signal.
  • the scanning signal provided by the scanning circuit of the previous row is multiplexed; then, the environmental photons provided to the current row are jointly controlled according to the first control signal and the amplification control signal provided by the amplification control terminal.
  • the first control signal of the pixel circuit is used to reset the ambient light sub-pixel circuit of the current row.
  • the enable signals provided by the upper and lower adjacent rows of enable circuits can be multiplexed to control the respective corresponding OLED sub-pixel circuits in the upper and lower adjacent rows of enable circuits.
  • the third control signal provided to the ambient light sub-pixel circuit of the current row can be jointly controlled based on the two enable signals to control the ambient light sub-pixel circuit of the current row to collect and output ambient light.
  • the sub-pixels include sub-pixels of F colors
  • the OLED circuit further includes: F ambient light amplification circuits and analog amplification circuits, where F is an integer greater than or equal to 3. ;
  • the scan synchronization output terminal of the N-M+1th row scan synchronization circuit is electrically connected to the second control terminal of the F ambient light amplifier circuits respectively.
  • the N-M+1th row scan synchronization circuit is used to provide
  • the second control terminals of the F ambient light amplification circuits provide a second control signal, and the F ambient light amplification circuits are used under the common control of the second control signal and the amplification control signal from the amplification control terminal. perform a reset;
  • the first-level ambient light output end of the ambient light sub-pixel circuit in the sub-pixels of the same color is electrically connected to an ambient light amplification circuit.
  • the ambient light amplification circuit is used to combine the ambient light sub-pixel circuits in multiple rows of the same color sub-pixels.
  • the first-level ambient light signals collected once or multiple times are integrated to generate a second-level ambient light signal;
  • the secondary ambient light output terminals of the F ambient light amplifier circuits are electrically connected to the analog amplifier circuit.
  • the F ambient light amplifier circuits are also used to amplify the second control signal and the amplifier control terminal. Under the common control of control signals, the secondary ambient light signal is provided to the analog amplifier circuit, and the analog amplifier circuit is used to amplify the secondary ambient light signal and convert it into ambient light data.
  • the charges generated by multiple rows of ambient light sub-pixel circuits can be collected and integrated, and then output to the added analog amplification circuit to convert into ambient light data. Due to the collection of ambient light in this application It is not limited to the number of rows of the ambient light sub-pixel circuit, that is, it is not limited to the size of the ambient light sensor. Therefore, the method of collecting ambient light provided by this application can adapt to high refresh rates.
  • This application also multiplexes the signal output by the scanning synchronization circuit of the corresponding row of the first row of ambient light sub-pixel circuits, that is, multiplexes the first control signal corresponding to the first row of ambient light sub-pixel circuits and provides it as a second control signal to
  • the second control terminal of the ambient light amplification circuit is used to reset the ambient light amplification circuit. Since the signal output by the scan synchronization circuit is combined with the state of the amplification control signal at the amplification control terminal, the ambient light amplification circuit will not be re-done when the ambient light amplification circuit is outputting, that is, when the analog amplification circuit is working. reset, and the ambient light sub-pixel circuit is reset only when the ambient light amplification circuit is not working.
  • the Nth row enabling synchronous circuit includes: a first inverting sub-circuit, a second inverting sub-circuit, and an enabling synchronous output sub-circuit;
  • the first inverting sub-circuit is electrically connected to the first enable input terminal and the enable synchronous output sub-circuit, and the first inverting sub-circuit is used to respond to the first enable input signal from the first enable input terminal. Under the control of the enable signal, a first inverted signal inverted with the first enable signal is provided to the enable synchronous output sub-circuit, and the first enable signal enables the N-1th row The enable signal provided by the enable output of the circuit;
  • the second inverting sub-circuit is electrically connected to the second enable input terminal and the enable synchronous output sub-circuit, and the second inverting sub-circuit is used to respond to the second enable input signal from the second enable input terminal.
  • a second inverted signal inverted with the second enable signal is provided to the enable synchronous output sub-circuit, and the second enable signal enables the N+1th row The enable signal provided by the enable output of the circuit;
  • the enable synchronous output sub-circuit is also electrically connected to the first power supply voltage terminal, the second power supply voltage terminal and the enable synchronous output terminal.
  • the enable synchronous output sub-circuit is used to operate between the first inverted signal and all Under the control of the second inverted signal, the first voltage provided by the first power supply voltage terminal or the second voltage provided by the second power supply voltage terminal is transmitted to the enable synchronous output terminal for output. .
  • the first enable signal and the second enable signal are received and inverted by enabling two sub-circuits, the first inverter sub-circuit and the second inverter sub-circuit in the synchronization circuit, and then, The two inverted signals are then used to control the output of the enable synchronous output sub-circuit, so that the purpose of two enable signals controlling one output signal can be achieved.
  • the first inversion sub-circuit includes a third transistor and a fourth transistor
  • the gate of the third transistor is electrically connected to the first enable input terminal, the first pole of the third transistor is electrically connected to the third power supply voltage terminal, and the second pole of the third transistor is electrically connected to the second enable input terminal. Node electrical connection;
  • the gate electrode and the second electrode of the fourth transistor are both electrically connected to the fourth power supply voltage terminal, and the first electrode of the fourth transistor is electrically connected to the second node.
  • the second inversion sub-circuit includes a fifth transistor and a sixth transistor
  • the gate electrode of the fifth transistor is electrically connected to the second enable input terminal, the first electrode of the fifth transistor is electrically connected to the third power supply voltage terminal, and the second electrode of the fifth transistor is electrically connected to the third power supply voltage terminal. Node electrical connection;
  • the gate electrode and the second electrode of the sixth transistor are both electrically connected to the fourth power supply voltage terminal, and the first electrode of the sixth transistor is electrically connected to the third node.
  • the enabled synchronous output sub-circuit includes a seventh transistor, an eighth transistor and a ninth transistor;
  • the gate of the seventh transistor is electrically connected to the second node, the first electrode of the seventh transistor is electrically connected to the second electrode of the eighth transistor, and the second electrode of the seventh transistor is electrically connected to the second node.
  • the fourth power supply voltage terminal is electrically connected;
  • the gate of the eighth transistor is electrically connected to the third node, and the first pole of the eighth transistor is electrically connected to the enable synchronization output terminal;
  • the gate of the ninth transistor is electrically connected to the fourth power supply voltage terminal, the first pole of the ninth transistor is electrically connected to the third power supply voltage terminal, and the second pole of the ninth transistor is electrically connected to the fourth power supply voltage terminal.
  • the above-mentioned enable synchronization output terminal is electrically connected.
  • the Nth row scan synchronization circuit includes: an electrically connected scan synchronization inverting sub-circuit and a scan synchronization output sub-circuit;
  • the scanning synchronous inversion sub-circuit is also electrically connected to the amplification control terminal, the third power supply voltage terminal and the fourth power supply voltage terminal.
  • the scanning synchronous inversion sub-circuit is used to adjust the amplification control signal from the amplification control terminal. Under the control of The fourth voltage provided by the fourth power supply voltage terminal;
  • the scan synchronization output sub-circuit is also electrically connected to the scan synchronization input terminal, the third power supply voltage terminal, the fourth power supply voltage terminal and the scan synchronization output terminal. Under the control of the three inverted signals and the scan signal from the scan synchronization input terminal, the third voltage provided by the third power supply voltage terminal or the fourth voltage provided by the fourth power supply voltage terminal is transmitted to the scan synchronization Output terminal output.
  • the amplification control signal provided by the amplification control terminal is inverted through the scanning synchronization inversion sub-circuit, and then the inverted voltage and the scanning signal provided by the scanning synchronization input terminal are used to jointly control the scanning synchronization output sub-circuit. output, so that the first control signal can be jointly controlled based on the previous row scanning signal and the amplification control signal provided by the amplification control terminal, so as to reset the ambient light sub-pixel circuit when the ambient light amplification circuit is not working. When the amplification circuit is working, it does not reset the ambient light sub-pixel circuit.
  • the scan synchronization inversion sub-circuit includes: a twelfth transistor and a thirteenth transistor;
  • the gate of the thirteenth transistor is electrically connected to the amplification control signal terminal, the first electrode of the thirteenth transistor is electrically connected to the third power supply voltage terminal, and the second electrode of the thirteenth transistor is electrically connected to the amplification control signal terminal. electrically connected to the first electrode of the twelfth transistor;
  • the gate electrode and the second electrode of the twelfth transistor are both electrically connected to the fourth power supply voltage terminal.
  • the scan synchronization output sub-circuit includes: a tenth transistor, an eleventh transistor and a fourteenth transistor;
  • the gate electrode of the eleventh transistor is electrically connected to the fourth power supply voltage terminal, the first electrode of the eleventh transistor is electrically connected to the third power supply voltage terminal, and the second electrode of the eleventh transistor is electrically connected to the third power supply voltage terminal.
  • the pole is electrically connected to the scanning synchronization output terminal;
  • the gate of the tenth transistor is electrically connected to the scan synchronization input terminal, the first pole of the tenth transistor is electrically connected to the scan synchronization output terminal, and the second pole of the tenth transistor is electrically connected to the scan synchronization input terminal.
  • the first pole of the fourteen transistors is electrically connected;
  • the gate electrode of the fourteenth transistor is electrically connected to the second electrode of the thirteenth transistor, and the second electrode of the fourteenth transistor is electrically connected to the fourth power supply voltage terminal.
  • the ambient light amplification circuit includes: an amplification reset sub-circuit, an integrator sub-circuit and an amplification output sub-circuit;
  • the amplification reset sub-circuit is electrically connected to the second control terminal, the reset control terminal and the integrator circuit, and the amplification reset sub-circuit is used to adjust the second control signal from the second control terminal. Under the control of the signal, the voltage from the reset control terminal is provided to the integrator circuit to reset the integrator circuit;
  • the integrator circuit is also electrically connected to the first-level ambient light output end of the ambient light sub-pixel circuit in multiple rows of sub-pixels of the same color, the first power supply voltage end, and the amplification output sub-circuit, and the integrator circuit is used to Integrate the primary ambient light signal output from the primary ambient light output terminal to generate a secondary ambient light signal;
  • the amplification output sub-circuit is electrically connected to the amplification control terminal and the secondary ambient light output terminal, and the amplification output sub-circuit is used to amplify the two levels of light under the control of the amplification control signal from the amplification control terminal.
  • the first-level ambient light signal is transmitted to the second-level ambient light output terminal for output.
  • the ambient light sub-pixel circuits corresponding to the same color in each row are connected to the same detection signal line, multiple detection signal lines connected to the ambient light sub-pixel circuits corresponding to the same color in multiple rows are electrically connected to the first-level ambient light output end of the ambient light amplifier circuit, as shown in Therefore, when the ambient light sub-pixel circuit performs short integration row by row, the signals collected in each row can be transferred to the ambient light amplifier circuit row by row for accumulation, which is equivalent to performing long integration of the ambient light of that color. This can improve detection accuracy.
  • the integrator circuit is reset through the amplification reset sub-circuit in the ambient light amplification circuit under the control of the second control terminal, and then the first-level environment of the multi-row ambient light sub-pixel circuit is reset through the integrator circuit.
  • the signal provided by the optical output terminal is integrated for a long time, and then output through the amplification output sub-circuit under the control of the voltage of the amplification control terminal, thereby improving the accuracy of detection.
  • the amplification reset sub-circuit includes: a fifteenth transistor
  • the gate of the fifteenth transistor is electrically connected to the second control terminal, the first pole of the fifteenth transistor is electrically connected to the integrator circuit, and the second pole of the fifteenth transistor is electrically connected to the integrator circuit.
  • the reset control terminal is electrically connected.
  • the integrator circuit includes: a third capacitor and a sixteenth transistor
  • the first end of the third capacitor is electrically connected to the first power supply voltage end and the first pole of the sixteenth transistor, and the second end of the third capacitor is electrically connected to the environment in multiple rows of sub-pixels of the same color.
  • the primary ambient light output end of the photonic pixel circuit is electrically connected, and the first electrode of the fifteenth transistor is electrically connected to the gate of the sixteenth transistor;
  • the second pole of the sixteenth transistor is electrically connected to the amplification output sub-circuit.
  • the amplification output sub-circuit includes: a seventeenth transistor
  • the gate of the seventeenth transistor is electrically connected to the amplification control terminal, the first electrode of the seventeenth transistor is electrically connected to the second electrode of the sixteenth transistor, and the first electrode of the seventeenth transistor is electrically connected.
  • the diode is electrically connected to the secondary ambient light output terminal.
  • a third aspect provides a driving method for an ambient light sub-pixel circuit as in the first aspect or any possible implementation of the first aspect, where the driving method includes:
  • the ambient light reset sub-circuit inputs the voltage provided by the reset control terminal into the first node under the control of the voltage from the first control terminal;
  • the switch control sub-circuit outputs the voltage generated by the photoelectric conversion sub-circuit from the first-level ambient light output terminal under the control of the voltage from the third control terminal.
  • Embodiments of the present application provide a driving method for an ambient light sub-pixel circuit.
  • the first control terminal controls the ambient light reset sub-circuit to be turned on, so that the voltage provided by the reset control terminal is input to the first Node Q1 eliminates the residual voltage; then, during the non-light-emitting phase of the OLED sub-pixel circuit, the third control terminal can control the switch control sub-circuit to conduct, so that the photoelectric conversion sub-circuit collects ambient light and converts the voltage to Through the first node, the output of the subcircuit is controlled via the switch.
  • the circuit collects ambient light during the non-luminous phase, thereby improving the accuracy of collection.
  • a fourth aspect provides a driving method for an OLED circuit as in the second aspect or any possible implementation of the second aspect.
  • the driving method for an OLED circuit includes:
  • the N-th row scanning synchronization circuit provides a first control signal to the M-th row ambient light sub-pixel circuit, and the M-th row ambient light sub-pixel circuit performs reset under the control of the first control signal. set;
  • the Nth row enabling synchronization circuit provides a third control signal to the Mth row ambient light sub-pixel circuit, and the Mth row ambient light sub-pixel circuit is in the N-1th row OLED sub-pixel circuit.
  • the N-th row OLED sub-pixel circuit nor the N+1-th row OLED sub-pixel circuit emits light, ambient light is collected under the control of the third control signal and a first-level ambient light signal is generated.
  • Embodiments of the present application provide a driving method for an OLED circuit.
  • a scan synchronization circuit By adding a scan synchronization circuit, a first control signal is provided for the ambient light sub-pixel circuit of the current row to reset the ambient light sub-pixel circuit of the current row.
  • An enable synchronization circuit is also added to provide a third control signal for the ambient light sub-pixel circuit of this row to control the ambient light sub-pixel circuit of this row to collect ambient light when the OLED sub-pixel circuits of the same row and two adjacent rows do not emit light. and output.
  • the impact of the light intensity generated by the OLED sub-pixel circuit during the light-emitting phase on the ambient photo-pixel circuit can be avoided, so that the ambient photo-sub pixel circuit can only operate in the same or similar environment.
  • the adjacent two rows of OLED sub-pixel circuits collect ambient light during the non-emitting phase, thereby improving the accuracy of collection.
  • the acquisition process can be adapted to high refresh rate displays.
  • the N-th row scanning synchronization circuit provides a first control signal to the M-th row ambient light sub-pixel circuit, including:
  • the enable output terminal of the N-1th row enable circuit provides an enable signal to the enable terminal of the N-1th row OLED sub-pixel circuit, and the N-1-th row OLED sub-pixel circuit is in the Line N-1 does not emit light under the control of the enable signal provided by the enable circuit; i is an integer greater than or equal to 1;
  • the scan output terminal of the N-1th row scan circuit provides a scan signal to the scan synchronization input terminal of the N-th row scan synchronization circuit, and the N-th row scan synchronization circuit provides Under the control of the scanning signal and the amplification control signal provided by the amplification control terminal, the first control signal is provided to the first control terminal of the M-th row of ambient light sub-pixel circuit;
  • the Nth row enabling synchronization circuit provides a third control signal to the Mth row ambient light sub-pixel circuit, including:
  • the enable output terminal of the N+1th row enable circuit provides an enable signal to the enable terminal of the N+1th row OLED sub-pixel circuit.
  • the N+1th row OLED The sub-pixel circuit does not emit light under the control of the enable signal provided by the N+1th row enable circuit;
  • the enable output end of the N-1th row enable circuit provides an enable signal to the first enable input end of the Nth row enable synchronization circuit
  • the enable output end of the N+1th row enable circuit provides an enable signal to
  • the second enable input terminal of the Nth row enable synchronization circuit provides an enable signal
  • the Nth row enable synchronization circuit provides an enable signal at the N-1th row enable circuit and the N+1th row enable synchronization circuit.
  • the third control signal is provided to the third control terminal of the ambient light sub-pixel circuit of the Mth row;
  • the driving method of the OLED circuit also includes:
  • the enable output terminal of the Nth row enable circuit provides an enable signal to the enable terminal of the Nth row OLED sub-pixel circuit, and the N-th row OLED sub-pixel circuit is in the The Nth row does not emit light under the control of the enable signal provided by the enable circuit;
  • the scan output terminal of the Nth row scanning circuit provides a scanning signal to the scanning terminal of the Nth row OLED sub-pixel circuit, and the N-th row OLED sub-pixel circuit receives the voltage provided by the data signal line.
  • the i+1-th stage is after the i-th stage and before the i+2-th stage.
  • the driving method of the OLED circuit provided by this application multiplexes the scanning signal provided by the previous row of scanning circuit through the scanning synchronization circuit; then, based on the first control signal and the amplification control signal provided by the amplification control terminal, the Control the first control signal provided to the ambient light sub-pixel circuit of the current row to reset the ambient light sub-pixel circuit of the current row.
  • the OLED circuit driving method provided by this application also multiplexes the enable signals provided by the upper and lower adjacent rows of enable circuits through the enable synchronization circuit, so that the upper and lower adjacent rows of enable circuits control their respective corresponding While the OLED sub-pixel circuit is in the non-light-emitting stage, the third control signal provided to the ambient light sub-pixel circuit of the row can be jointly controlled based on the two enable signals to control the ambient light sub-pixel circuit of the row to control ambient light. Collection and output.
  • the driving method of the OLED circuit further includes:
  • the enable output terminal of the N-1 row enable circuit provides an enable signal to the enable terminal of the N-1 row OLED sub-pixel circuit.
  • the N-1 row OLED sub-pixel circuit is in The N-1th row emits light under the control of the enable signal provided by the enable circuit;
  • the enable output end of the N-1th row enable circuit provides an enable signal to the first enable input end of the Nth row enable synchronization circuit
  • the enable output end of the N+1th row enable circuit provides an enable signal to
  • the second enable input terminal of the Nth row enable synchronization circuit provides an enable signal
  • the Nth row enable synchronization circuit provides an enable signal at the N-1th row enable circuit and the N+1th row enable synchronization circuit.
  • the third control signal is provided to the third control terminal of the M-th row ambient light sub-pixel circuit, and the M-th row ambient light sub-pixel circuit is in the The ambient light collection is ended under the control of the third control signal.
  • stage i+3 follows stage i+2.
  • the driving method of the OLED circuit further includes:
  • the amplification control signal provided by the F ambient light amplification circuits at the amplification control end and the scan synchronization output end of the N-M+1th row scan synchronization circuit are sent to the second
  • the control terminal provides a second control signal to perform reset.
  • the present application also multiplexes the signal output by the scanning synchronization circuit of the corresponding row of the environmental light sub-pixel circuit of the first row, that is, multiplexes the first control signal corresponding to the environmental light sub-pixel circuit of the first row, as The second control signal is provided to the second control end of the ambient light amplifier circuit to achieve the purpose of resetting the ambient light amplifier circuit. Since the signal output by the scan synchronization circuit is combined with the state of the amplification control signal of the amplification control terminal, the ambient light amplification circuit will not be reset when the ambient light amplification circuit is outputting, that is, when the analog amplification circuit is working. The ambient light sub-pixel circuit is reset only when the ambient light amplification circuit is not operating.
  • the driving method further includes:
  • the amplification control signal provided by the F ambient light amplification circuits at the amplification control terminal and the scan synchronization output terminal of the N-M+1 row scan synchronization circuit Does not work under the control of providing a second control signal to the second control terminal;
  • the amplification control signal provided by the F ambient light amplification circuits at the amplification control terminal and the scan synchronization output terminal of the N-M+1th row scan synchronization circuit are sent to the Under the control of the second control signal provided by the second control terminal, the first-level ambient light signal output by the M-th row of ambient light sub-pixel circuits is integrated;
  • the amplification control signal provided by the F ambient light amplification circuits at the amplification control terminal and the scan synchronization output terminal of the N-M+1th row scan synchronization circuit are sent to the Under the control of the second control signal provided by the second control terminal, the secondary ambient light signal generated by integrating the multiple rows of ambient light sub-pixel circuits one or more times is provided to the analog amplifier circuit.
  • this application also collects and integrates the charges generated by multiple rows of ambient light sub-pixel circuits through an ambient light amplification circuit, and then outputs them to an additional analog amplification circuit to convert them into ambient light data. Since the ambient light in this application Collection is not limited to the number of rows of ambient light sub-pixel circuits, that is, it is not limited to the size of the ambient light sensor. Therefore, the method of collecting ambient light provided by this application can adapt to high refresh rates.
  • an OLED display panel includes: a substrate substrate such as the OLED circuit described in the above first aspect or any possible implementation of the first aspect.
  • the OLED sub-pixel circuit in the OLED circuit includes: a light-emitting element
  • the ambient light sub-pixel circuit in the OLED circuit is disposed between the substrate substrate and the light-emitting element.
  • the ambient light sensor provided by this application may be an ambient light sub-pixel circuit, or, in addition to the ambient light sub-pixel circuit, the ambient light sensor provided by this application may also include other circuits or components.
  • the embodiments of this application do not make any limit.
  • This application provides an OLED display panel. Since the ambient photopixel circuit is integrated into the OLED display panel, the ambient photopixel circuit will no longer be affected by the light transmittance of the display screen when collecting external ambient light intensity. Therefore, the detection accuracy of ambient light can be improved.
  • the OLED sub-pixel circuit in the OLED display panel further includes: an OLED sub-pixel drive circuit, the OLED sub-pixel drive circuit is used to drive the light-emitting element to emit light;
  • the OLED sub-pixel driving circuit and the ambient light sub-pixel circuit are arranged on the same layer.
  • the process steps can be reduced and the preparation efficiency can be improved through the same layer arrangement.
  • the photodiode in the ambient light sub-pixel circuit includes: a first electrode, a photoelectric material layer and a second electrode arranged in a stack;
  • the first electrode is located on a side close to the base substrate and parallel to the base substrate.
  • the second transistor in the ambient light sub-pixel circuit is electrically connected to the first electrode for transmitting the voltage on the first electrode.
  • a sixth aspect provides a display screen, including the OLED display panel as described in the above first aspect or any possible implementation of the first aspect.
  • a seventh aspect provides an electronic device, characterized in that it includes a display screen as described in the sixth aspect.
  • Embodiments of the present application provide an OLED circuit, an OLED display panel, a display screen and an electronic device.
  • the ambient light sensor is integrated into the display screen, so that when the ambient light sensor collects the intensity of external ambient light, The interference of the transmittance of the display screen can be reduced;
  • the ambient light sub-pixel circuit included in the ambient light sensor provided by this application can cooperate with the OLED sub-pixel circuit, by controlling the ambient light sub-pixel circuit to be located in the same row or the same row and adjacent
  • the ambient light sub-pixel circuit performs photoelectric conversion, which can reduce the impact of the pixel emission of the display screen on the ambient light collected by the ambient light sensor, thereby achieving accurate measurement of the external ambient light intensity. detection, and for the purpose of electronic equipment with high refresh rates.
  • Figure 1 is a schematic diagram of an application scenario provided by an embodiment of the present application.
  • Figure 2 is a schematic top view of an electronic device provided by an embodiment of the present application.
  • Figure 3 is a schematic diagram of the arrangement of sub-pixels in the second display area provided by an embodiment of the present application.
  • Figure 4 is a schematic cross-sectional view of the second display area shown in Figure 3 along the direction AA';
  • Figure 5 is another schematic cross-sectional view of the second display area shown in Figure 3 along the direction AA';
  • Figure 6 is a schematic diagram of the arrangement of sub-pixels in the first display area provided by an embodiment of the present application.
  • Figure 7 is a schematic cross-sectional view of the first display area shown in Figure 6 along the BB' direction;
  • Figure 8 is another schematic cross-sectional view of the first display area shown in Figure 6 along the BB' direction;
  • Figure 9 is a schematic structural diagram of an OLED circuit provided by an embodiment of the present application.
  • Figure 10 is a schematic structural diagram of an OLED sub-pixel circuit provided by an embodiment of the present application.
  • Figure 11 is a schematic structural diagram of an ambient light sub-pixel circuit provided by an embodiment of the present application.
  • Figure 12 is a schematic structural diagram of another ambient light sub-pixel circuit provided by an embodiment of the present application.
  • Figure 13 is a driving timing diagram of an ambient light sub-pixel circuit provided by an embodiment of the present application.
  • Figure 14 is a schematic structural diagram of an ambient light sub-pixel circuit and an OLED sub-pixel circuit included in the OLED circuit in the first display area provided by the embodiment of the present application;
  • Figure 15 is a schematic structural diagram of an ambient light sub-pixel circuit, an OLED sub-pixel circuit and a driving circuit included in the OLED circuit in the first display area provided by the embodiment of the present application;
  • Figure 16 is a schematic structural diagram of an enabling circuit provided by an embodiment of the present application.
  • Figure 17 is a schematic structural diagram of an enabling synchronization circuit provided by an embodiment of the present application.
  • Figure 18 is a schematic structural diagram of another enablement synchronization circuit provided by an embodiment of the present application.
  • Figure 19 is a schematic diagram of the connection structure of an enabling circuit and an enabling synchronization circuit provided by an embodiment of the present application;
  • Figure 20 is a schematic structural diagram of a scanning circuit provided by an embodiment of the present application.
  • Figure 21 is a schematic structural diagram of an ambient light amplification circuit provided by an embodiment of the present application.
  • Figure 22 is a schematic structural diagram of another ambient light amplification circuit provided by an embodiment of the present application.
  • Figure 23 is a schematic structural diagram of a scan synchronization circuit provided by an embodiment of the present application.
  • Figure 24 is a schematic structural diagram of another scan synchronization circuit provided by an embodiment of the present application.
  • Figure 25 is a schematic diagram of the connection structure of a scanning circuit and a scanning synchronization circuit provided by an embodiment of the present application;
  • FIG. 26 is a driving timing diagram corresponding to the OLED circuit shown in FIG. 15 .
  • first and second are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of indicated technical features. Therefore, features defined as “first” and “second” may explicitly or implicitly include one or more of these features. In the description of this embodiment, unless otherwise specified, “plurality” means two or more.
  • Black matrix black matirx, BM
  • an opaque black light-shielding layer is coated between the filter units included in the color filter layer to block light and avoid cross-color.
  • the color filter layer is an optical filter that expresses color. It can accurately select a small range of light waves that you want to pass through, and reflect other wavelength bands that you don't want to pass.
  • the color filter layer provided in the embodiment of the present application is used to filter white light into light of different colors.
  • Figure 1 shows an application scenario to which embodiments of the present application are applicable.
  • the street lamp emits strong light and illuminates the nearby area very brightly, while the surrounding area without light is very dark.
  • the light of the surrounding environment changes greatly from weak to strong.
  • an ambient light sensor is added to an electronic device to sense the intensity of the surrounding ambient light, so that the electronic device can adaptively adjust the brightness of the display screen according to the intensity of the ambient light. For example, the display brightness can be increased when the ambient light is strong, and the display brightness can be decreased when the ambient light is weak. In this way, the effect of meeting user needs and reducing product power consumption can be achieved. Therefore, ambient light sensors are widely used in electronic devices such as mobile phones, notebooks, and tablet computers.
  • the "off-screen cutout solution” refers to using an ambient light sensor to simultaneously detect the ambient light intensity outside the screen and the pixel luminous intensity in the display. Then, the pixel luminous intensity in the display is subtracted through a software algorithm to obtain the external ambient light. strength.
  • this solution is limited by the detection of the luminous intensity of the pixels in the display screen. When the detection of the luminous intensity of the pixels in the display screen is inaccurate, it will directly affect the detection results of the external ambient light intensity.
  • the "off-screen short integration scheme” means that when the display screen is refreshed under the control of the enable signal, several rows of pixels in the display screen will be turned off and scrolled to refresh.
  • the ambient light sensor can be placed above its physical position. When the corresponding rows of pixels are turned off, the intensity of external ambient light is detected.
  • this solution is not limited to the luminous intensity of all pixels in the display compared to the previous solution, in order to improve the user's visual enjoyment, the refresh rate of the existing display is getting higher and higher, and in high refresh Under the condition of high refresh frequency, the corresponding rows of pixels in the display above the ambient light sensor cannot all be turned off.
  • the "off-screen short integration solution” also has limitations and is not suitable for electronic devices with high refresh frequencies.
  • the ambient light sensor detects the intensity of external ambient light
  • all corresponding pixels above the ambient light sensor are required to be turned off.
  • the width of the ambient light sensor is generally 4mm, which requires that the corresponding 4mm-wide rows of pixels above the ambient light sensor are turned off.
  • the width of non-luminous pixels is much less than 4mm, for example, it may be only 2mm or 3mm. Other pixels outside the 2mm or 3mm range are still emitting light, so it is impossible to achieve the corresponding pixels above the ambient light sensor. All are turned off, which makes it impossible to accurately detect the intensity of external ambient light.
  • the sensitivity of the ambient light sensor depends on the photosensitive area of the ambient light sensor, if you choose to use an ambient light sensor with a smaller width to adapt to the high refresh frequency, on the one hand, the requirements for the ambient light sensor device will be higher, and on the other hand, the environment The signal collected by the light sensor will be easily interfered during the transmission process, thus affecting the sensitivity of the ambient light sensor and thus affecting the accuracy of detection.
  • embodiments of the present application provide an OLED circuit, an OLED display panel, a display screen and an electronic device.
  • the ambient light sensor is integrated into the display screen, so that the ambient light sensor collects the external environment.
  • the interference of the transmittance of the display screen can be reduced;
  • the ambient light sub-pixel circuit included in the ambient light sensor provided by this application can cooperate with the OLED sub-pixel circuit by controlling the ambient light sub-pixel circuit to be located in the same row or in the same row.
  • the ambient light sub-pixel circuit When the row and adjacent rows of OLED sub-pixel circuits are in the non-emitting stage, the ambient light sub-pixel circuit performs photoelectric conversion, which can reduce the impact of the pixel luminescence of the display screen on the ambient light collected by the ambient light sensor, thereby achieving better control of the external environment. Accurate detection of light intensity, and suitable for the purpose of high refresh frequency electronic equipment.
  • the ambient light sensor provided by this application may be an ambient light sub-pixel circuit, or the ambient light sensor provided by the embodiments of this application may also include other circuits or components in addition to the ambient light sub-pixel circuit.
  • the implementation of this application There are no restrictions on this.
  • FIG. 2 shows a schematic top view of an electronic device 100 applicable to the embodiment of the present application.
  • the electronic device 100 in the embodiment of the present application may be a smartphone, a wearable device (such as a smart bracelet, a smart watch, headsets, etc.), tablet computers, laptop computers (laptops), handheld computers, notebook computers, ultra-mobile personal computers (UMPC), cellular phones, personal digital assistants (personal digital assistants, PDAs), enhanced Reality (Augmented reality, AR) ⁇ virtual reality (VR) equipment and other IOT (internet of things, Internet of Things) equipment, can also be TVs, large screens, printers, projectors and other equipment.
  • a wearable device such as a smart bracelet, a smart watch, headsets, etc.
  • tablet computers laptop computers (laptops), handheld computers, notebook computers, ultra-mobile personal computers (UMPC), cellular phones
  • personal digital assistants personal digital assistants, PDAs
  • enhanced Reality (Augmented reality, AR) ⁇ virtual reality (VR) equipment and other IOT (internet of things, Internet of Things) equipment can also be TVs, large screens, printers
  • the electronic device 100 As shown in FIG. 2 , taking the electronic device 100 as a mobile phone as an example, the electronic device 100 includes a display screen 110 .
  • the display screen 110 may be used to display images or videos, and the display screen 110 includes a display panel.
  • the display panel can use organic light-emitting diode (OLED), active-matrix organic light-emitting diode (AMOLED), micro OLED (Micro OLED), etc.
  • the electronic device 100 may include 1 or N display screens 110, where N is a positive integer greater than 1. The following description takes the example that the electronic device 100 includes a display screen 110 and the display screen 110 includes an OLED display panel 111.
  • the OLED display panel 111 includes an ambient light sensor 120 .
  • the ambient light sensor 120 is used to sense ambient light brightness.
  • the electronic device 100 can adaptively adjust the brightness of the display screen 110 according to the perceived ambient light brightness.
  • the ambient light sensor 120 can be used to automatically adjust the white balance when taking pictures.
  • the ambient light sensor 120 can also cooperate with the proximity light sensor to detect whether the electronic device 100 is in the pocket to prevent accidental touching.
  • the ambient light sensor 120 since the ambient light sensor 120 is integrated into the OLED display panel 111, when the ambient light sensor 120 collects the intensity of external ambient light, it will no longer be affected by the light transmittance of the display screen 110. Therefore, the detection accuracy of ambient light can be improved.
  • the ambient light sensor 120 may be set at a local position in the display area 1 of the OLED display panel 111 .
  • the display area 1 refers to the area of the OLED display panel 111 used to display images or videos.
  • the corresponding top-view shape of the ambient light sensor 120 is a rectangle, and the rectangle is located at a local position in the display area 1 of the OLED display panel 111 .
  • the ambient light sensor 120 can also be set in the entire display area 1 of the OLED display panel 111 , that is, the top view size of the ambient light sensor 120 is the same as the size of the display area 1 of the OLED display panel 111 .
  • the top view shape, size, and setting position of the ambient light sensor 120 can be set and modified as needed, as long as the sensitivity requirements are met, and the embodiments of the present application do not impose any restrictions on this.
  • the ambient light sensor 120 can be set where the user's hand is not. Locations easily accessible and covered. Taking FIG. 2 as an example, the ambient light sensor 120 can be set at an upper position of the OLED display panel 111 .
  • the display area 1 including the ambient light sensor 120 can be called the first display area 11
  • the remaining display area 1 can be called the second display area 12 .
  • the corresponding display panels of the first display area 11 and the second display area 12 The internal structure is different.
  • the electronic device 100 may also include a processor, an external memory interface, an internal memory, a universal serial bus interface, a charging management module, a power management module, a battery, etc.
  • the above structure does not constitute a specific limitation on the electronic device 100.
  • the electronic device 100 may include more or fewer components than those shown above, or the electronic device 100 may include a combination of some of the components shown above, or the electronic device 100 may include a combination of some of the components shown above.
  • Device 100 may include sub-components of some of the components shown above.
  • the components shown above can be implemented in hardware, software, or a combination of software and hardware.
  • Figure 3 is a schematic diagram of the arrangement of sub-pixels 3 in the second display area 12 according to an embodiment of the present application.
  • Figure 4 is a diagram of the second display area 12 shown in Figure 3 along the AA' direction.
  • FIG. 5 is another schematic cross-sectional view of the second display area 12 shown in FIG. 3 along the direction AA'.
  • each pixel 2 in the OLED display panel 111 may include three sub-pixels 3 , for example, a red sub-pixel R, a green sub-pixel G and a pixel 3 respectively.
  • Blue sub-pixel B The red sub-pixel R is used to emit red light
  • the green sub-pixel G is used to emit green light
  • the blue sub-pixel B is used to emit blue light.
  • first direction x is the row direction
  • second direction y is the column direction
  • first direction x and the second direction y are perpendicular to each other.
  • the sub-pixels 3 in the OLED display panel 111 may be arranged in a strip manner. For example, along the first direction x, the red sub-pixel R, the green sub-pixel G and the blue sub-pixel B are arranged in sequence, while the sub-pixels 3 along the second direction y are all of the same color.
  • the OLED display panel 111 may include a base substrate 10 and an OLED element 20 disposed on one side of the base substrate 10.
  • the OLED display The panel 111 also includes a color filter layer 30 disposed on the light exit side of the OLED element 20 .
  • Each sub-pixel 3 corresponds to an OLED element 20, and the plurality of OLED elements 20 can be used to emit red light, green light and blue light respectively, or all the OLED elements 20 can be used to emit white light, and the color filter layer 30 can be used to convert the white light into Filters light into different colors.
  • the color filter layer 30 includes a red filter unit 31, a green filter unit 32 and a blue filter unit 33.
  • the red filter unit 31 can filter white light into red
  • the green filter unit 32 can filter white light into green
  • the blue filter unit 33 can filter white light into blue. Therefore, by laying filter units of different colors in different sub-pixels 3, a red sub-pixel R, a green sub-pixel G and a blue sub-pixel B can be formed.
  • the red-emitting OLED element 20 corresponds to the red filter unit 31
  • the green-emitting OLED element 20 corresponds to the green filter unit 32
  • the blue-emitting OLED element 20 corresponds to the blue filter unit 33 to form Red sub-pixel R, green sub-pixel G and blue sub-pixel B.
  • red filter unit 31, the green filter unit 32 and the blue filter unit 33 are all band-pass filters.
  • the OLED element 20 includes an anode 71 and a cathode 73 arranged in a stack, and an organic material functional layer 72 arranged between the anode 71 and the cathode 73 .
  • the organic material functional layer 72 may include a luminescent material layer 723.
  • the organic material functional layer 72 may also include a hole transport layer (HTL) 722 disposed between the anode 71 and the luminescent material layer 723, and a hole transport layer 722 disposed between the anode 71 and the luminescent material layer 723.
  • An electron transport layer (ETL) 724 between the cathode 73 and the luminescent material layer 723.
  • the organic material functional layer 72 may also include a hole injection layer (HIL) 721 disposed between the anode 71 and the hole transport layer 722, and An electron injection layer (EIL) 725 is provided between the cathode 73 and the electron transport layer 724.
  • HIL hole injection layer
  • EIL electron injection layer
  • the anode 71 is located between the cathode 73 and the base substrate 10 , and the cathodes 73 included in different sub-pixels 3 can be laid in an entire layer.
  • the light-emitting principle of the above-mentioned OLED element 20 is as follows: applying voltage to the anode 71 and the cathode 73 through a circuit connected by the anode 71 and the cathode 73, using the anode 71 to inject holes, and the cathode 73 to inject electrons.
  • the formed electrons and holes are in the luminescent material.
  • the layers 723 meet to generate excitons, thereby stimulating the luminescent material layer 723 to emit light.
  • the material of the anode 71 can be selected from, for example: silver (Ag), indium tin oxide (ITO) or nickel-chromium alloy (Ni:Cr alloy), etc.; the material of the luminescent material layer 723 can be Tris(8-hydroxyquinoline)aluminum (Alq3), etc., emits white light through a three-primary color multilayer film luminescence combination.
  • the material of the cathode 73 may include: CuPc (copper titanium cyanine) or magnesium silver alloy (Mg:Ag alloy), etc.
  • the OLED display panel 111 also includes an OLED sub-pixel driving circuit.
  • the OLED sub-pixel driving circuit may include one or more driving transistors (thin film transistor (TFT) 60, the drive transistor 60 is used to provide voltage to the anode 71.
  • TFT thin film transistor
  • a black matrix is also made between two adjacent filter units.
  • an encapsulation layer 80 may be laid between the cathode 73 and the color filter layer 30 for encapsulation, and a planarization layer 90 may be laid between the driving transistor 60 and the anode 71 for planarization.
  • each pixel 2 in the OLED display panel 111 includes three sub-pixels 3 is only an example, and each pixel 2 may also include four sub-pixels 3, for example, They are red sub-pixel R, green sub-pixel G, blue sub-pixel B and white sub-pixel W respectively.
  • the white sub-pixel W does not include a filter unit, and the white sub-pixel W can directly use the white light generated by the OLED element 20 for emission.
  • each pixel 2 in the OLED display panel 111 can be set as needed.
  • the OLED display panel 111 The sub-pixels 3 in can also be arranged in a delta manner, and the embodiment of the present application does not impose any limitation on this.
  • the ambient light sensor 120 can be integrated in the non-emitting area of the sub-pixel 3, and the area not blocked by the anode 71 is used to detect external ambient light. Strength of.
  • Figure 6 shows a schematic diagram of the arrangement of sub-pixels 3 in the first display area 11 provided by the embodiment of the present application.
  • Figure 7 shows the first display area 11 shown in Figure 6 at BB'
  • FIG. 8 shows another schematic cross-sectional view of the first display area 11 shown in FIG. 6 in the BB' direction.
  • the sub-pixel 3 in the first display area 11 only uses the effective light-emitting area (the first area 4 shown in FIG. 6 ) as the sub-pixel. 3 corresponds to the actual display area, and the area in the sub-pixel 3 except the effective light-emitting area, such as the second area 5 shown in FIG. 6 , is used as the corresponding installation area of the ambient light sensor 120 .
  • Figure 6 is only an example. The sizes of the first area 4 and the second area 5 can be divided according to the actual structure. This embodiment of the present application does not impose any restrictions on this.
  • the ambient light sensor 120 when the ambient light sensor 120 is integrated into the OLED display panel 111, the ambient light sensor 120 and the OLED element 20 can share the color filter layer 30. Therefore, as shown in FIG. 6, when the OLED display panel 111 When each pixel 2 in includes a red sub-pixel R, a green sub-pixel G and a blue sub-pixel B, the ambient light sensor 120 disposed in the second area 5 of the red sub-pixel R can use red when collecting ambient light.
  • the filter unit 31 correspondingly collects the red channel signal.
  • the green filter unit 32 when the ambient light sensor 120 disposed in the second area 5 of the green sub-pixel G collects ambient light, the green filter unit 32 can be used to correspondingly collect the green channel signal.
  • the blue filter unit 33 can be used to correspondingly collect the blue channel signal.
  • each pixel 2 in the OLED display panel 111 includes a red sub-pixel R, a green sub-pixel G, a blue sub-pixel B, and a white sub-pixel W
  • the environment provided in the second area 5 of the red sub-pixel R When the light sensor 120 collects ambient light, it can use the red filter unit 31 to correspondingly collect the red channel signal.
  • the ambient light sensor 120 disposed in the second area 5 of the green sub-pixel G can collect the ambient light, it can use the green filter.
  • the unit 32 corresponds to collecting the green channel signal.
  • the ambient light sensor 120 arranged in the second area 5 of the blue sub-pixel B can use the blue filter unit 33 to correspondingly collect the blue channel signal, which is arranged in the white
  • the ambient light sensor 120 in the second area 5 of the sub-pixel W will correspondingly collect the white channel signal.
  • the channel color adopted by the ambient light sensor 120 is the same as the channel color used for display by the OLED display panel 111 .
  • the OLED display panel 111 located in the first display area 11 further includes an ambient light sensor 120 disposed between the base substrate 10 and the OLED element 20 .
  • an ambient light sensor 120 disposed between the base substrate 10 and the OLED element 20 .
  • the ambient light sensor 120 may include a photodiode 121 and a second transistor T22.
  • the photodiode 121 includes a first electrode 1211 , a photoelectric material layer 1213 and a second electrode 1212 that are stacked and parallel to the base substrate 10 .
  • the first electrode 1211 is located on a side close to the base substrate 10 .
  • the second transistor T22 is electrically connected to the first electrode 1211 and used to transmit the voltage on the first electrode 1211 .
  • the driving transistor 60 and the second transistor T22 are arranged on the same layer.
  • the working principle of the above-mentioned ambient light sensor 120 is: external ambient light irradiates the photodiode 121, and the photoelectric material layer 1213 performs photoelectric conversion, thereby generating voltage on the first electrode 1211 and the second electrode 1212, the second transistor T22 and other circuits Then, the voltages of the first electrode 1211 and the second electrode 1212 are transmitted and collected.
  • the second electrode should be made of a transparent material.
  • the first electrode 1211 needs to be an opaque and highly reflective metal.
  • the first electrode 1211 should be made of a transparent material.
  • the material of the electrode 1211 may be molybdenum (Mo).
  • the material of the optoelectronic material layer 1213 may be amorphous silicon (a-Si), cadmium antimonide (CdTe), copper indium gallium tin (CIGS), organic optoelectronic materials, or other optoelectronic materials.
  • a-Si amorphous silicon
  • CdTe cadmium antimonide
  • CIGS copper indium gallium tin
  • organic optoelectronic materials or other optoelectronic materials.
  • the selected optoelectronic material requires that after the device is formed, the optoelectronic performance will not degrade significantly below a certain temperature threshold (for example, below 250°C).
  • the second electrode 1212 is a metal oxide transparent conductive film.
  • the material of the second electrode 1212 may be indium tin oxide (ITO) or indium zinc oxide (IZO).
  • the photodiode 121 can also be packaged through processes such as chemical vapor deposition (CVD) or physical vapor deposition (PVD).
  • a first planarization layer 91 may be provided for planarization, and/or between the second electrode 1212 and the OLED element 20 , a first planarization layer 91 may be provided.
  • a second planarization layer 92 is provided for planarization.
  • the structure shown in FIG. 8 does not constitute a specific limitation on the structure of the ambient light sensor 120 integrated in the OLED display panel 111 .
  • the OLED display panel 111 may include more or fewer components than those shown in FIG. 8 , or the electronic device 100 may include a combination of some of the components shown in FIG. 8 , Alternatively, the OLED display panel 111 may include sub-components of some of the components shown in FIG. 8 .
  • FIG. 9 is a schematic structural diagram of an OLED circuit 200 provided by an embodiment of the present application.
  • the display area 1 includes the second display area 12 shown in FIG. 3 without the ambient light sensor 120 integrated, and also includes the first display area 11 shown in FIG. 6 with the ambient light sensor 120 integrated.
  • the OLED display panel 111 also includes a non-display area, which is the remaining area except the display area 1.
  • the non-display area can be used to set up relevant circuits and drive the circuits located in the display area 1 to achieve display and ambient light detection. .
  • the second display area 12 includes a plurality of sub-pixels 3 arranged in an array.
  • the first area 4 of each sub-pixel 3 is correspondingly provided with an OLED sub-pixel circuit 210
  • the second area 5 is correspondingly provided with an ambient light sub-pixel circuit 220.
  • the second display area 12 also includes: a plurality of data signal lines, a plurality of first power supply voltage lines, a plurality of second power supply voltage lines, a plurality of scanning signal lines, a plurality of enable signal lines, a plurality of control signal lines, and Multiple detection signal output lines.
  • Each OLED sub-pixel circuit 210 corresponding to the sub-pixel 3 in the same row is electrically connected to the same scanning signal line and the same enable signal line, and each ambient light sub-pixel circuit 220 corresponding to the sub-pixel 3 in the same row is electrically connected to the same control signal line.
  • each ambient light sub-pixel circuit 220 corresponding to the same row of sub-pixels 3 can be electrically connected to multiple control signal lines.
  • the plurality of scanning signal lines are used to provide scanning signals for each row of OLED sub-pixel circuits 210 respectively
  • the plurality of enable signal lines are used to provide enable signals for each row of OLED sub-pixels respectively
  • the plurality of control signal lines is used to provide control signals to each row of ambient light sub-pixel circuits 220 respectively
  • different control signal lines connected to the same row of ambient light sub-pixel circuits 220 are used to provide different control signals to the row of ambient light sub-pixel circuits 220 to control ambient photons.
  • the pixel circuit 220 is in different working stages. For example, each ambient light sub-pixel circuit 220 corresponding to the same row of sub-pixels 3 is electrically connected to the first control signal line.
  • each ambient light sub-pixel circuit 220 is also electrically connected to the third control signal line.
  • the first control signal line is used for this purpose.
  • the row ambient light sub-pixel circuit 220 provides a first control signal
  • the third control signal line is used to provide a third control signal to the row ambient light sub-pixel circuit 220 .
  • the ambient light sub-pixel circuits 220 corresponding to the same color in the same row are electrically connected to the same detection signal line.
  • the multiple detection signal lines are used to separately connect the ambient light sub-pixel circuits of the same color in each row of ambient light sub-pixel circuits 220. 220 generates detection signals for collection and transmission.
  • the ambient light sub-pixel circuit 220 includes ambient light sub-pixel circuits 220 corresponding to three primary colors (red, green and blue). Based on this, all the ambient light sub-pixel circuits 220 corresponding to red in the same row can be is electrically connected to a red detection signal line, all the ambient light sub-pixel circuits 220 corresponding to green are electrically connected to a green detection signal line, and all the ambient light sub-pixel circuits 220 corresponding to blue are electrically connected to a blue detection signal line, and the red detection signal
  • the green detection signal line will collect and transmit the detection signal generated by the green ambient light sub-pixel circuit 220 corresponding to the red ambient light sub-pixel circuit 220, and the blue detection signal line will correspond to the blue ambient light.
  • the detection signals generated by the photonic pixel circuit 220 are collected and transmitted.
  • Each OLED sub-pixel circuit 210 corresponding to the same column of sub-pixels 3 is electrically connected to the same data signal line, the same first power supply voltage signal line, and the same second power supply voltage signal line.
  • the data signal line is used to provide data signals for the OLED sub-pixel circuits 210 of the corresponding columns.
  • the plurality of first power supply voltage signals are used to provide first power supply voltages for the OLED sub-pixel circuits 210 of each column.
  • the plurality of second power supplies The voltage signal line is used to provide the second power supply voltage to each column of OLED sub-pixel circuits 210 respectively.
  • the OLED circuit 200 also includes a scan circuit 250 , a scan synchronization circuit 260 , an enable circuit and an enable synchronization circuit 240 .
  • the scan circuit 250 is used to provide scan signals for the scan signal lines; the enable circuit 230 is used to provide enable signals for the enable signal lines; the scan circuit 250 is also used to provide scan signals for the scan synchronization circuit 260, and the scan synchronization circuit 260
  • enabling the synchronization circuit 240 may, for example, be used to provide a third control signal for the third control terminal S3 of the ambient light sub-pixel circuit 220 in the second display area 12 under the control of the enable signals provided by the upper and lower row enable circuits 230 .
  • the OLED circuit 200 also includes an ambient light amplification circuit 270 and an analog amplification circuit 280 .
  • the ambient light amplifying circuit 270 is connected to a plurality of detection signal lines and is used to amplify the detection signals generated by each row of ambient light sub-pixel circuits 220 collected on the detection signal lines.
  • the red detection signal lines connected to the ambient light sub-pixel circuit 220 corresponding to red in each row can be connected to the ambient light amplification circuit 270 (F1). Electrically connected, the ambient light amplifier circuit 270 (F1) is used to integrate and amplify the detection signals generated by the ambient light sub-pixel circuits 220 corresponding to red in multiple rows; similarly, the detection signals generated by the ambient light sub-pixel circuits 220 corresponding to green in each row are connected. The green detection signal lines are all electrically connected to the ambient light amplification circuit 270 (F2).
  • the ambient light amplification circuit 270 (F2) is used to integrate and amplify the detection signals generated by the multiple rows of green ambient light sub-pixel circuits 220; and each row is The blue detection signal lines connected to the ambient light sub-pixel circuit 220 corresponding to blue are all electrically connected to the ambient light amplification circuit 270 (F3).
  • the ambient light amplification circuit 270 (F3) is used to connect multiple rows of ambient light sub-pixel circuits corresponding to green.
  • the detection signal generated by 220 is integrated and amplified.
  • the analog amplifier circuit 280 is used to further amplify and integrate the voltage amplified by the ambient light amplifier circuit 270 (F1), the ambient light amplifier circuit 270 (F2), and the ambient light amplifier circuit 270 (F3), so that it can be converted into For ambient light data, realize the detection of ambient light.
  • FIG. 10 is a schematic structural diagram of an OLED sub-pixel circuit 210 provided by an embodiment of the present application.
  • the OLED sub-pixel circuit 210 may be, for example, a 7T1C sub-pixel circuit.
  • the transistor T16 is used to control the voltage provided by the reset control terminal Vref to be transmitted to the gate of the transistor T13, and the transistor T17 is used to control the voltage provided by the reset control terminal Vref to be transmitted to the light-emitting element L; transistor T11 is used to control the transmission of the voltage provided by the first power supply voltage terminal VDD to the first end of the transistor T13.
  • the transistor T15 is used to control the transmission of the voltage provided by the data voltage terminal Vdata.
  • the transistor T14 is used to control the gate and the second terminal of the transistor T13.
  • the transistor T13 is used to determine the driving current of the OLED sub-pixel circuit 210, the transistor T12 is used to transfer the driving current from the transistor T13 to the light-emitting element L, and the light-emitting element L is used to emit light and display in response to the driving current.
  • the light-emitting element L is the OLED element 20 shown in FIG. 5 and FIG. 8 and the anode 71 and cathode 73 connected up and down.
  • the partial circuits in the OLED sub-pixel circuit 210 except the light-emitting element L may refer to the aforementioned OLED sub-pixel driving circuit.
  • the OLED sub-pixel circuit 210 can also be other sub-pixel circuits such as 2T1C and 6T1C, and the embodiments of the present application do not impose any restrictions on this.
  • the first power supply voltage terminal VDD electrically connected to the OLED sub-pixel circuit 210 is a high-level terminal and can output a constant high voltage
  • the second power supply voltage terminal VSS electrically connected to the OLED sub-pixel circuit 210 is a low-level terminal. , can output a constant low voltage.
  • the second power supply voltage terminal VSS can also be grounded.
  • FIG. 11 is a schematic structural diagram of an ambient light sub-pixel circuit 220 provided by an embodiment of the present application.
  • FIG. 12 is a schematic structural diagram of another ambient light sub-pixel circuit 220 provided by an embodiment of the present application.
  • the ambient light sub-pixel circuit 220 may include: an ambient light reset sub-circuit 221 , a photoelectric conversion sub-circuit 222 and a switch control sub-circuit 223 .
  • the ambient light reset sub-circuit 221, the photoelectric conversion sub-circuit 222 and the switch control sub-circuit 223 are all electrically connected to the first node Q1.
  • the ambient light reset sub-circuit 221 is also electrically connected to the first control terminal S1 and the reset control terminal Vref; the ambient light reset sub-circuit 221 is used to reset the sub-circuit 221 under the control of the voltage from the first control terminal S1.
  • the control terminal Vref is connected to the first node, and the voltage provided by the reset control terminal Vref is input to the first node Q1 to reset the voltage at the first node Q1.
  • the photoelectric conversion subcircuit 222 is also electrically connected to the ground terminal GND; the photoelectric conversion subcircuit 222 is used to convert ambient light into voltage and provide it to the first node Q1.
  • the switch control sub-circuit 223 is also electrically connected to the third control terminal S3 and the first-level ambient light output terminal Out1; the switch control sub-circuit 223 is used to control the third control terminal S3 during the non-light-emitting phase of the OLED sub-pixel circuit 210.
  • the first node Q1 is connected to the first-level ambient light output terminal Out1, and the first-level ambient light output terminal Out1 outputs the voltage at the first node.
  • the first control signal lines connected to the first control terminal S1 are different, and the timing of the first control signals provided by the different first control signal lines is different. , therefore, the timing of the first control signals corresponding to the ambient light sub-pixel circuits 220 in different rows is different.
  • the third control signal lines connected to the third control terminal S3 are different, and the timing of the third control signals provided by different third control signal lines is different, so , the timing of the third control signal corresponding to the ambient light sub-pixel circuit 220 in different rows is different.
  • the third control terminal S3 can provide the third control terminal S3 during the non-light-emitting phase of the OLED sub-pixel circuit 210 of the same row corresponding to the ambient light sub-pixel circuit 220.
  • the third control terminal S3 corresponding to the ambient light sub-pixel circuit 220 of the current row can also be When the OLED sub-pixel circuit 210 of the previous row and the OLED sub-pixel circuit 210 of the current row are both in the non-emitting stage, or the OLED sub-pixel circuit 210 of the current row and the OLED sub-pixel circuit 210 of the next row are both in the non-emitting stage, or when the OLED sub-pixel circuit 210 of the previous row is in the non-emitting stage.
  • the third control signal is provided when the OLED sub-pixel circuit 210, the OLED sub-pixel circuit 210 of this row and the OLED sub-pixel circuit 210 of the next row are all in the non-light-emitting stage.
  • an ambient light sub-pixel circuit During the light-emitting phase of the OLED sub-pixel circuit, the first control terminal controls the ambient light reset sub-circuit to be turned on, so that the voltage provided by the reset control terminal is input to the first Node Q1 eliminates the residual voltage; then, during the non-light-emitting phase of the OLED sub-pixel circuit, the third control terminal S3 can control the switch control sub-circuit to conduct, so that the photoelectric conversion sub-circuit collects ambient light and converts the voltage The output of the subcircuit can be controlled through the first node through the switch.
  • the ambient photo-sub pixel circuit can only operate in the same industry and/or Or multiple adjacent rows of OLED sub-pixel circuits collect ambient light during the non-emitting phase, thereby improving the accuracy of collection.
  • the ambient light reset sub-circuit 221 may include a first transistor T21; the gate of the first transistor T21 is electrically connected to the first control terminal S1, and the first The first electrode of the transistor T21 is electrically connected to the reset control terminal Vref, and the second electrode of the first transistor T21 is electrically connected to the first node Q1.
  • the ambient light reset sub-circuit 221 may also include a plurality of transistors connected in parallel with the first transistor T21.
  • the above is only an example of the ambient light reset sub-circuit 221. Others have the same functions as the ambient light reset sub-circuit 221. The structure will not be described in detail here, but it should also fall within the protection scope of this application.
  • the photoelectric conversion sub-circuit 222 may include a photodiode D1 and a first capacitor C1.
  • the first end of the photodiode D1 is electrically connected to the first node Q1.
  • the second terminal of the diode D1 is electrically connected to the ground terminal GND.
  • the first terminal of the first capacitor C1 is electrically connected to the first node Q1, and the second terminal of the first capacitor C1 is electrically connected to the ground terminal GND.
  • the photodiode D1 is used to generate charges under the illumination of ambient light and form a current to form a voltage difference between the first node Q1 and the ground terminal GND to achieve photoelectric conversion.
  • the first capacitor C1 is the capacitance generated by the photodiode D1 itself.
  • the ambient light reset sub-circuit 221 is input from the reset control terminal Vref to the first node Q1 under the control of the voltage from the first control terminal S1. voltage, the residual voltage at the first end of the first capacitor C1 can be eliminated, and the first capacitor C1 can be reset.
  • the photoelectric conversion sub-circuit 222 may also include a plurality of capacitors connected in parallel with the first capacitor C1.
  • the above is only an example of the photoelectric conversion sub-circuit 222.
  • Other structures with the same functions as the photoelectric conversion sub-circuit 222 will not be described again here. , but it should also fall within the protection scope of this application.
  • the switch control sub-circuit 223 may include a second transistor T22, the gate of the second transistor T22 is electrically connected to the third control terminal S3, and the second transistor T22 The first pole of the second transistor T22 is electrically connected to the first node Q1, and the second pole of the second transistor T22 is electrically connected to the primary ambient light output terminal Out1.
  • the switch control sub-circuit 223 may also include a plurality of transistors connected in parallel with the second transistor T22.
  • the above is only an example of the switch control sub-circuit 223.
  • Other structures with the same functions as the switch control sub-circuit 223 will not be described again here. , but it should also fall within the protection scope of this application.
  • the first transistor T21 and the second transistor T22 are of the same type, and both are N-type or P-type; alternatively, the first transistor T21 and the second transistor T22 can also be of different types, and one of the transistors is N-type. , the other transistor is P-type, and the embodiment of the present application does not impose any limitation on this.
  • the first transistor T21 and the second transistor T22 may have a first electrode that is a drain electrode and a second electrode that is a source electrode; or, the first electrode is a source electrode and the second electrode is a drain electrode.
  • the first transistor T21 and the second transistor T22 may be enhancement mode transistors or depletion mode transistors, which may be selected as needed. The embodiments of the present application do not impose any restrictions on this.
  • both the first transistor T21 and the second transistor T22 are P-type.
  • FIG. 13 is a driving timing diagram of the ambient light sub-pixel circuit 220 provided by an embodiment of the present application.
  • the working process of the ambient light sub-pixel circuit 220 corresponds to the reset phase P1; during the non-light-emitting phase of the OLED sub-pixel circuit 210, the working process of the ambient light sub-pixel circuit 220 Corresponds to the output stage P2. Specifically:
  • the OLED sub-pixel circuit 210 can be an OLED sub-pixel circuit 210 whose ambient light sub-pixel circuit 220 belongs to the same row, or it can be an adjacent row, or it can be an OLED sub-pixel circuit 210 in multiple adjacent rows. Specifically, it can be carried out as needed. Settings, the embodiments of this application do not impose any restrictions on this.
  • the first control terminal S1 inputs a low-level voltage
  • the third control terminal S3 inputs a high-level voltage. Therefore, the first transistor T21 is turned on, and the second transistor T22 is turned off. Due to the conduction of the first transistor T21, the voltage provided by the reset control terminal Vref can be input to the first node Q1, so that the voltage on the first end of the photodiode D1 connected to the first node Q1 is connected to the first node. The voltage on the first terminal of the first capacitor C1 of Q1 is reset, eliminating the influence of the residual voltage from the last acquisition.
  • the first control terminal S1 inputs a high-level voltage
  • the third control terminal S3 inputs a low-level voltage. Therefore, the first transistor T21 is turned off, and the second transistor T22 is turned on. Due to the conduction of the second transistor T22, the first-level ambient light output terminal Out1 can output the voltage generated by the photoelectric conversion of the photodiode D1.
  • Embodiments of the present application provide a driving method for an ambient light sub-pixel circuit.
  • the first control terminal controls the ambient light reset sub-circuit to be turned on, so that the voltage provided by the reset control terminal is input to the first Node Q1 eliminates the residual voltage; then, during the non-light-emitting phase of the OLED sub-pixel circuit, the third control terminal can control the switch control sub-circuit to conduct, so that the photoelectric conversion sub-circuit collects ambient light and converts the voltage to Through the first node, the output of the subcircuit is controlled via the switch.
  • the circuit collects ambient light during the non-luminous phase, thereby improving the accuracy of collection.
  • the ambient light sub-pixel circuit 220 is used to collect and convert ambient light. Although the accuracy of some detections can be improved, the accuracy of some detections will not be improved. If the OLED sub-pixel circuits 210 are still emitting light, they will still have a certain impact on each other. In order to avoid this impact, this application proposes to use OLED sub-pixels that belong to the same row as the ambient light sub-pixel circuit 220 and one or more adjacent rows.
  • the ambient light sub-pixel circuit 220 of the current row is used for collection and conversion, thereby reducing the interference of the light intensity of other rows of OLED sub-pixel circuits 210 on the ambient light sub-pixel circuit 220 of the current row.
  • the present application provides the following OLED circuit to reduce the impact of the light emission of two adjacent rows of OLED sub-pixel circuits 210 on the ambient light sub-pixel circuit 220 of the current row. Take the influence of ambient light collection as an example to illustrate.
  • OLED display panel 111 is refreshed row by row during the display process, that is, several rows of pixels are in the non-luminous stage (dark state) and move downward row by row.
  • the OLED sub-pixel circuits 210 in the 6th, 7th, 8th and 9th rows are in the non-emitting stage, while the OLED sub-pixel circuits 210 in the 10th, 11th and other rows are in the non-emitting stage.
  • the 7th, 8th, 9th and 10th row OLED sub-pixel circuits 210 are in the non-light-emitting stage, and the 11th row OLED sub-pixel circuit 210 is still in the light-emitting stage; in In the i+2 stage, the OLED sub-pixel circuits 210 in the 8th, 9th, 10th and 11th rows are in the non-emitting stage; while in the i+3 stage, the OLED sub-pixel circuits 210 in the 10th and 11th rows are in the non-emitting stage.
  • the pixel circuit 210 is in a non-light-emitting stage, and the 9th row OLED sub-pixel circuit 210 is in a light-emitting stage.
  • the other stages are analogous and will not be described again here.
  • the ambient light sub-pixel circuit 220 of the same row as the OLED sub-pixel circuit 210 of the 10th row as the ambient light sub-pixel circuit 220 of the second row in the first display area 11 as an example.
  • the OLED sub-pixel circuit 210 in the 10th row is still in the light-emitting stage, so the corresponding ambient light sub-pixel circuit 220 in the 2nd row cannot be used to collect ambient light; by the i+1-th stage, although the 9th row and The OLED sub-pixel circuit 210 in the 10th row is already in the non-light-emitting stage, but the OLED sub-pixel circuit 210 in the 11th row is still in the light-emitting stage.
  • the OLED sub-pixel circuit 210 in the 11th row will also illuminate the OLED sub-pixel circuit in the 10th row.
  • the ambient light sub-pixel circuit 220 in the second row corresponding to 210 is affected, so the ambient light sub-pixel circuit 220 in the second row is still unable to collect ambient light.
  • the OLED sub-pixel circuits 210 in the 9th, 10th and 11th rows are all in the non-emitting stage, which affects the ambient light sub-pixel circuit 220 in the second row corresponding to the OLED sub-pixel circuit 210 in the 10th row. minimum, so in these two stages, the ambient light sub-pixel circuit 220 in the second row can be turned on to collect and convert ambient light.
  • the 9th row OLED sub-pixel circuit 210 is in the light-emitting stage again and affects the 2nd row ambient light sub-pixel circuit 220 corresponding to the 10th row OLED sub-pixel circuit 210, the 2nd row environment is turned off. Photonic pixel circuit 220.
  • the condition for determining that the ambient light sub-pixel circuit 220 of the second row corresponding to the OLED sub-pixel circuit of the 10th row is turned on is that the OLED sub-pixel circuit 210 of the 11th row is in the non-emitting stage;
  • the condition for the ambient light sub-pixel circuit 220 of the second row to be turned off is that the OLED sub-pixel circuit 210 of the ninth row is in the light-emitting stage.
  • the ambient light sub-pixel circuit 220 in the second row corresponding to the OLED sub-pixel circuit in the 10th row is turned on, otherwise it is turned off.
  • FIG. 14 is a schematic structural diagram of an ambient light sub-pixel circuit 220 and an OLED sub-pixel circuit 210 included in the OLED circuit 200 in the first display area 11 provided by an embodiment of the present application.
  • FIG. 15 is a schematic structural diagram of the ambient light sub-pixel circuit 220, the OLED sub-pixel circuit 210 and the driving circuit included in the OLED circuit 200 in the first display area 11 provided by the embodiment of the present application.
  • the 10th row scan circuit 250 can be used to drive the 10th row OLED sub-pixel circuit 210.
  • the scanning terminal Scan10 in the sub-pixel circuit 210 provides the scanning signal, and uses the 10th row to enable the circuit 230
  • the specific structure of the 10th row OLED sub-pixel circuit 210 can be shown in FIG. 10 and will not be described again here.
  • the 10th row enable synchronization circuit 240 (Emit10 synchronization circuit) can be used to synchronize the 9th row enablement circuit 230 (Emit9 circuit) and the 11th row enablement circuit 230 (Emit11 circuit).
  • the 10th row is enabled.
  • the synchronization circuit 240 provides a third control signal to the third control terminal S3 (10) of the second row of ambient light sub-pixel circuit 220 to control the second row of ambient light sub-pixel circuit 220 to collect and output ambient light.
  • the 10th row OLED sub-pixel circuit 210 is also in the non-light-emitting stage.
  • the enable circuit 230 of the 9th row is also used to provide an enable signal for the enable terminal Emit9 of the OLED sub-pixel circuit 210 of the 9th row
  • the enable circuit 230 of the 11th row is also used to provide the enable signal of the OLED sub-pixel circuit 210 of the 11th row.
  • the enable terminal Emit11 provides the enable signal.
  • Embodiments of the present application provide an OLED circuit.
  • the enable signals provided by the upper and lower adjacent row enable circuits can be multiplexed to control the respective corresponding While the OLED sub-pixel circuits are in the non-emitting stage, they can jointly control the enabling synchronization circuit, and then control the ambient light sub-pixel circuit of the row to collect and output ambient light through the enabling synchronization circuit.
  • Figure 16 is a schematic structural diagram of an enabling circuit 230 provided by an embodiment of the present application.
  • Figure 17 is a schematic structural diagram of an enabling synchronization circuit 240 provided by an embodiment of the present application.
  • Figure 18 is a schematic structural diagram of an enabling circuit 230 provided by an embodiment of the present application.
  • FIG. 19 is a schematic structural diagram of the connection between the enable circuit and the enable synchronization circuit provided by the embodiment of the application.
  • the description is given as an example in which the enabling circuit 230 of each row has the same structure, and the enabling synchronization circuit 240 of each row has the same structure.
  • the enabling circuit 230 of each row has the same structure
  • the enabling synchronization circuit 240 of each row has the same structure.
  • they may also be different, and the embodiments of this application do not impose any limitation on this.
  • the enabling circuit 230 is an existing structure in the related art, and will not be described again here.
  • the enable synchronization circuit 240 is introduced in detail below.
  • the enable synchronization circuit 240 includes: a first inversion sub-circuit 241 , a second inversion sub-circuit 242 and an enable synchronization output sub-circuit 243 .
  • the first inversion sub-circuit 241 is electrically connected to the first enable input terminal EmIn1 and the enable synchronous output sub-circuit 243.
  • the first inversion sub-circuit 241 is used to detect the first enable signal from the first enable input terminal EmIn1. Under the control of , the first inverted signal inverted with the first enable signal is provided to the enable synchronous output sub-circuit 243 .
  • the second inverting sub-circuit 242 is electrically connected to the second enable input terminal EmIn2 and the enable synchronous output sub-circuit 243.
  • the second inverting sub-circuit 242 is used to detect the second enable signal from the second enable input terminal EmIn2. Under the control of , a second inverted signal inverted with the second enable signal is provided to the enable synchronization output sub-circuit 243 .
  • the enable synchronous output sub-circuit 243 is also electrically connected to the third power supply voltage terminal VGH, the fourth power supply voltage terminal VGL, and the enable synchronous output terminal EmOut.
  • the enable synchronous output sub-circuit 243 is used to operate between the first inverted signal and the second Under the control of the inverted signal, the third voltage provided by the third power supply voltage terminal VGH or the fourth voltage provided by the fourth power supply voltage terminal VGL is transmitted to the enabled synchronous output terminal EmOut for output.
  • inversion refers to changing a high-level voltage into a low-level voltage, or changing a low-level voltage into a high-level voltage.
  • the third voltage provided by the third power supply voltage terminal VGH is a high level
  • the fourth voltage provided by the fourth power supply voltage terminal VGL is a low level.
  • the third voltage is 8V and the fourth voltage is -7V.
  • the size of the voltage can be specifically set according to needs, and the embodiments of this application do not impose any restrictions on this.
  • the synchronous output sub-circuit 243 is enabled to output the third inverted signal provided by the fourth power supply voltage terminal VGL when both the first inverted signal and the second inverted signal are low-level voltages.
  • the four voltages are transmitted to enable the synchronous output terminal EmOut to be output, otherwise, the third voltage provided by the third power supply voltage terminal VGH is provided to enable the synchronous output terminal EmOut to be output.
  • first inverted signal and the second inverted signal are both low-level voltages, it means that the first enable signal and the second enable signal are both high-level voltages.
  • the ambient light sub-pixel circuit 220 in the second row corresponding to the OLED sub-pixel circuit 210 in the tenth row is only turned on when the OLED sub-pixel circuits 210 in the ninth and eleventh rows are both in the non-emitting stage, otherwise
  • the first enable input terminal EmIn1 of the enable synchronization circuit 240 in the 10th row can be electrically connected to the enable output terminal EOut of the 9th row enable circuit 230 corresponding to the OLED sub-pixel circuit 210 in the 9th row.
  • the second enable input terminal EmIn2 of the row enable synchronization circuit 240 is electrically connected to the enable output terminal EOut of the tenth row enable circuit 230 corresponding to the OLED sub-pixel circuit 210 in the eleventh row, and the enable of the tenth row enable synchronization circuit 240 is The synchronization output terminal EmOut is electrically connected to the third control terminal S3 (10) of the ambient light sub-pixel circuit 220 in the second row.
  • the enable signal of the 9th row enable circuit 230 will be input as the first enable signal to the 10th row enable synchronization circuit 240, and the enable signal of the 11th row enable circuit 230 will be input as the second enable signal to the 10th row.
  • the enable signals provided by the enable circuit 230 of the 9th row and the enable circuit 230 of the 11th row while controlling the OLED sub-pixel circuits 210 of the corresponding rows, can jointly control the ambient light sub-pixels of the second row through the enable synchronization circuit 240.
  • the working condition of the circuit 220 is to achieve the purpose of avoiding the influence of the luminous intensity of the adjacent two rows of OLED sub-pixel circuits 210 when the second row of ambient light sub-pixel circuits 220 collects ambient light.
  • embodiments of the present application provide an enable synchronization circuit that receives the first enable signal and the second enable signal through two sub-circuits, the first inverter sub-circuit and the second inverter sub-circuit, and inverts them. , and then use the two inverted signals to control the output of the enable synchronous output sub-circuit, so that the purpose of two enable signals controlling one output signal can be achieved.
  • the first inversion sub-circuit 241 includes a third transistor T41 and a fourth transistor T42.
  • the gate of the third transistor T41 is electrically connected to the first enable input terminal EmIn1, the first electrode of the third transistor T41 is electrically connected to the third power supply voltage terminal VGH, and the second electrode of the third transistor T41 is electrically connected to the second node Q2. Connection; the gate electrode and the second electrode of the fourth transistor T42 are both electrically connected to the fourth power supply voltage terminal VGL, and the first electrode of the fourth transistor T42 is electrically connected to the second node Q2.
  • the first inversion sub-circuit 241 may also include a plurality of transistors connected in parallel with the third transistor T41 and/or a plurality of transistors connected in parallel with the fourth transistor T42.
  • the above is only for the first inversion sub-circuit 241.
  • other structures with the same function as the first inverter sub-circuit 241 will not be described again here, but they should also fall within the protection scope of the present application.
  • the second inversion sub-circuit 242 includes a fifth transistor T43 and a sixth transistor T44.
  • the gate of the fifth transistor T43 is electrically connected to the second enable input terminal EmIn2, the first electrode of the fifth transistor T43 is electrically connected to the third power supply voltage terminal VGH, and the second electrode of the fifth transistor T43 is electrically connected to the third node. ;
  • the gate electrode and the second electrode of the sixth transistor T44 are both electrically connected to the fourth power supply voltage terminal VGL, and the first electrode of the sixth transistor T44 is electrically connected to the third node.
  • the fourth transistor T42 and the sixth transistor T44 function as pull-down resistors.
  • the width-to-length ratio of the third transistor T41 and the fifth transistor T43 may be more than ten times the width-to-length ratio of the fourth transistor T42 and the sixth transistor T44.
  • the second inversion sub-circuit 242 may also include a plurality of transistors connected in parallel with the fifth transistor T43, and/or a plurality of transistors connected in parallel with the sixth transistor T44.
  • the above is only for the second inversion sub-circuit 242.
  • other structures with the same function as the second inverter sub-circuit 242 will not be described again here, but they should also fall within the protection scope of the present application.
  • the enable synchronous output sub-circuit 243 includes a seventh transistor T45, an eighth transistor T46, and a ninth transistor T47.
  • the gate of the seventh transistor T45 is electrically connected to the second node, the first electrode of the seventh transistor T45 is electrically connected to the second electrode of the eighth transistor T46, and the second electrode of the seventh transistor T45 is electrically connected to the fourth power supply voltage terminal VGL. connection; the gate of the eighth transistor T46 is electrically connected to the third node, the first pole of the eighth transistor T46 is electrically connected to the enable synchronous output terminal EmOut; the gate of the ninth transistor T47 is electrically connected to the fourth power supply voltage terminal VGL , the first pole of the ninth transistor T47 is electrically connected to the third power supply voltage terminal VGH, and the second pole of the ninth transistor T47 is electrically connected to the enable synchronization output terminal EmOut.
  • the ninth transistor T47 also functions as a pull-down resistor.
  • the enable synchronous output sub-circuit 243 may also include a plurality of transistors connected in parallel with the seventh transistor T45, and/or a plurality of transistors connected in parallel with the eighth transistor T46, and/or a plurality of transistors connected in parallel with the ninth transistor T47. transistor.
  • the above is only an example of the enable synchronous output sub-circuit 243.
  • Other structures with the same function as the enable synchronous output sub-circuit 243 will not be described again here, but they should also fall within the protection scope of this application.
  • the third to ninth transistors T41 to T47 are of the same type, and are all N-type or P-type; alternatively, the third to ninth transistors T41 to T47 can also be of different types, and one of the transistors is N-type. , the other transistor is P-type, and the embodiment of the present application does not impose any limitation on this.
  • the threshold voltage of the P-type transistor can be set to about -0.5V.
  • the third to ninth transistors T41 to T47 may have a first electrode that is a drain electrode and a second electrode that is a source electrode; or, the first electrode is a source electrode and the second electrode is a drain electrode.
  • the third to ninth transistors T41 to T47 may be enhancement mode transistors or depletion mode transistors, which may be selected as needed. This embodiment of the present application does not impose any limitation on this.
  • the third to ninth transistors T41 to T47 are all P-type.
  • FIG. 26 is a driving timing diagram of the OLED circuit 200 provided by an embodiment of the present application.
  • the first enable input terminal EmIn1 of the enable synchronization circuit 240 of the tenth row is used to receive the The enable output terminal Eout of the 9th row enable circuit 230 outputs the enable signal Emit9, and uses the second enable input terminal EmIn2 to receive the enable output terminal Eout of the 11th row enable circuit 230 to output the enable signal Emit11.
  • the OLED sub-pixel circuit 210 in the 9th row is in the non-emitting stage, and the OLED sub-pixel circuit 210 in the 11th row is in the emitting stage. stage.
  • the third transistor T41 is turned off, the fourth transistor T42 is turned on, and the low-level voltage provided by the fourth power supply voltage terminal VGL is transmitted to the gate of the seventh transistor T45, whereby the seventh transistor T45 is turned on; at the same time, The fifth transistor T43 is turned on, and the high-level voltage provided by the third power supply voltage terminal VGH is transmitted to the gate of the eighth transistor T46, so that the eighth transistor T46 is turned off.
  • the transistor 47 since the transistor 47 is in a normally open state, it can The high-level voltage provided by the third power supply voltage terminal VGH is output from the enable synchronization output terminal EmOut and provided to the third control terminal S3 (10) of the second row of ambient light sub-pixel circuit 220, thereby enabling the second row of ambient light sub-pixels. Circuit 220 is closed and no ambient light collection is performed.
  • the 9th row OLED sub-pixel circuit 210 and the 11th row OLED sub-pixel circuit 210 are both in the non-emitting stage.
  • the third transistor T41 is turned off, the fourth transistor T42 is turned on, and the low-level voltage provided by the fourth power supply voltage terminal VGL is transmitted to the gate of the seventh transistor T45, whereby the seventh transistor T45 is turned on; at the same time, The fifth transistor T43 is turned off, the sixth transistor T44 is turned on, and the low-level voltage provided by the fourth power supply voltage terminal VGL is transmitted to the gate of the eighth transistor T46, so that the eighth transistor T46 is turned on. Then, since the transistor 45 and the The eight transistors T46 are all in an open state.
  • the low-level voltage provided by the fourth power supply voltage terminal VGL can be output from the enable synchronization output terminal EmOut and provided to the third control terminal S3 of the ambient light sub-pixel circuit 220 of the second row. (10), thereby causing the second row of ambient light sub-pixel circuits 220 to open to collect ambient light.
  • the OLED sub-pixel circuit 210 in the 9th row is in the light-emitting stage, and the OLED sub-pixel circuit 210 in the 11th line is in the non-light-emitting stage.
  • the third transistor T41 is turned on and transmits the high-level voltage provided by the third power supply voltage terminal VGH to the gate of the seventh transistor T45.
  • the seventh transistor T45 is turned off; at the same time, the fifth transistor T43 is turned off.
  • the sixth transistor T44 is turned on, and the low-level voltage provided by the fourth power supply voltage terminal VGL is transmitted to the gate of the eighth transistor T46, so that the eighth transistor T46 is turned on.
  • the seventh transistor T45 is turned off, and the transistor 47 is in Normally open state, therefore, the high-level voltage provided by the third power supply voltage terminal VGH can only be output from the enable synchronous output terminal EmOut and provided to the third control terminal S3 (10) of the second row ambient photon pixel circuit 220 , thereby causing the ambient light sub-pixel circuit 220 of the second row to turn off, stopping the collection of ambient light.
  • Embodiments of the present application provide a driving method for enabling a synchronous circuit, which receives a first enable signal and a second enable signal through two sub-circuits, a first inversion sub-circuit and a second inversion sub-circuit, and inverts them. , and then use the two inverted signals to control the output of the enable synchronous output sub-circuit, so that the purpose of two enable signals controlling one output signal can be achieved.
  • the first control signal is provided to the first control terminal S1 (10) of the second row of ambient light sub-pixel circuit 220 to reset the photodiode D1 and the capacitor in the second row of ambient light sub-pixel circuit 220.
  • the first control signal can be synchronized with the scanning signal provided by the 9th row scanning circuit 250 , and the 9th row scanning circuit 250 (Scan9 circuit) controls the 9th row OLED sub-pixel circuit 210 While providing the scanning signal, the scanning signal provided by the 9th row scanning circuit 250 is provided as the first control signal to the 2nd row ambient light sub-pixel circuit 220 corresponding to the 10th row OLED sub-pixel circuit 210 to control the 2nd row ambient light sub-pixel. Circuit 220 resets.
  • the ambient light sub-pixel circuit 220 of the second row corresponding to the OLED sub-pixel circuit 210 of the tenth row is driven, and the ambient light amplification circuit 270 performs integration and amplification, it cannot The ambient light sub-pixel circuits 220 of the second row are reset. Therefore, the first control signal required by the ambient light sub-pixel circuit 220 of the first row needs to be combined with the amplification control signal provided by the amplification control terminal E1 connected to the ambient light amplification circuit 270. Synchronous control.
  • the first control signal provided to the first control terminal S1 (10) of the second row ambient light sub-pixel circuit 220 is jointly controlled based on the ninth row scanning signal and the amplification control signal provided by the amplification control terminal E1 , to reset the ambient light sub-pixel circuit 220 of the second row.
  • Embodiments of the present application provide an OLED circuit.
  • the scanning signal provided by the scanning circuit of the previous row is multiplexed and provided as a first control signal to the ambient photon pixel circuit of the current row; then, according to the first control signal and the amplification control signal provided by the amplification control terminal to jointly control the first control signal provided to the ambient light sub-pixel circuit of the current row, so as to enable the synchronization circuit to provide the third control signal to control the ambient light sub-pixel circuit of the current row to collect ambient light. Reset the bank's ambient photon pixel circuit.
  • the amplification control signal provided by the amplification control terminal to jointly provide the first control signal, interference with the ambient light amplification circuit can also be avoided, and the purpose of resetting the ambient light sub-pixel circuit when the ambient light amplification circuit is not working can be achieved.
  • the ambient light amplifier circuit 270 usually also needs to be reset. Therefore, the first control signal provided to the first control terminal S1 of the ambient light sub-pixel circuit 220 of the first row can be After multiplexing, it is provided to the second control terminal S2 of the ambient light amplifier circuit 270 to reset the ambient light amplifier circuit 270 when it is not integrating.
  • the ambient light amplification circuit 270 is a circuit that collects and integrates the charges output by multiple rows of ambient light sub-pixel circuits 220, the ambient light amplification circuit 270 does not need to perform the operation before each row of ambient light sub-pixels 220 operates. The reset only needs to be performed before the ambient light sub-pixel circuit 220 in the first row operates. Therefore, the first control signal provided to the first control terminal S1 of the ambient light sub-pixel circuit 220 in the first row can be multiplexed. , is provided to the second control terminal S2 of the ambient light amplifier circuit 270.
  • the second control terminal S2 of the ambient light amplifier circuit 270 should be connected to the scan output terminal SOut of the scan synchronization circuit of the corresponding row of the ambient light sub-pixel circuit 220 of the first row.
  • the ambient light sub-pixel circuit of the first row The pixel 220 corresponds to the 9th row scan synchronization circuit (Scan9 synchronization circuit). Therefore, the second control terminal S2 of the ambient light amplification circuit 270 should be connected to the scan synchronization output terminal ScOut of the 9th row scan synchronization circuit, so that the 9th row scan synchronization circuit can be connected to the second control terminal S2 of the ambient light amplifier circuit 270 .
  • the scanning signal output by the row scanning synchronization circuit 260 not only serves as the first control signal corresponding to the ambient light sub-pixel circuit 220 of the first row, but also serves as the second control signal of the ambient light amplifier circuit 270 .
  • the ninth row scan synchronization circuit provides a signal as the second control signal to trigger the ambient light amplification circuit 270 to reset, the ninth row scan synchronization circuit also needs to consider the state of the amplification control signal provided by the amplification control terminal E1 for control.
  • Embodiments of the present application provide an OLED circuit.
  • an ambient light amplification circuit By adding an ambient light amplification circuit, the charges generated by multiple rows of ambient light sub-pixel circuits can be collected and integrated, and then output to the added analog amplification circuit for conversion into ambient light data. Since in this application The collection of ambient light is not limited to the number of rows of the ambient light sub-pixel circuit, that is, it is not limited to the size of the ambient light sensor. Therefore, the method of collecting ambient light provided by this application can adapt to high refresh rates.
  • the embodiment of the present application also multiplexes the signal output by the scanning synchronization circuit of the corresponding row of the first row of ambient light sub-pixel circuits, that is, multiplexes the first control signal corresponding to the first row of ambient light sub-pixel circuits as the second control signal.
  • a second control terminal is provided to the ambient light amplification circuit to achieve the purpose of resetting the ambient light amplification circuit. Since the signal output by the scan synchronization circuit is combined with the state of the amplification control signal at the amplification control terminal, the ambient light amplification circuit will not be reset when the ambient light amplification circuit is outputting, that is, when the analog amplification circuit is working.
  • Figure 20 is a schematic structural diagram of a scanning circuit 250 provided by an embodiment of the present application.
  • Figure 21 is a schematic structural diagram of an ambient light amplification circuit 270 provided by an embodiment of the present application;
  • Figure 22 is a schematic structural diagram of a scanning circuit 250 provided by an embodiment of the present application.
  • Figure 23 is a schematic structural diagram of a scan synchronization circuit 260 provided by an embodiment of the present application;
  • Figure 24 is a schematic structural diagram of another scan synchronization circuit provided by an embodiment of the present application.
  • Figure 25 is a schematic diagram of the connection structure of a scanning circuit and a scanning synchronization circuit provided by an embodiment of the present application.
  • the description is given as an example in which the scanning circuit 250 of each row has the same structure and the scanning synchronization circuit 260 of each row has the same structure.
  • the scanning circuit 250 of each row has the same structure
  • the scanning synchronization circuit 260 of each row has the same structure.
  • they may also be different, and the embodiments of this application do not impose any limitation on this.
  • the scanning circuit 250 has an existing structure in the related art, and will not be described again here.
  • the ambient light amplification circuit 270 Since the output of the scan synchronization circuit 260 is affected by the amplification control signal provided by the amplification control terminal E1 connected to the ambient light amplification circuit 270, the ambient light amplification circuit 270 will be introduced in detail below.
  • the ambient light amplification circuit 270 includes: an amplification reset sub-circuit 271 , an integrator circuit 272 and an amplification output sub-circuit 273 .
  • the amplification reset sub-circuit 271 is electrically connected to the second control terminal S2, the reset control terminal Vref and the integrator circuit 272.
  • the amplification reset sub-circuit 271 is used to control the second control signal from the second control terminal S2, The voltage from the reset control terminal Vref is supplied to the integrator circuit 272 to reset the integrator circuit 272 .
  • the integrator circuit 272 is also electrically connected to the first-level ambient light output terminal Out1 of multiple ambient light sub-pixel circuits 220 in multiple rows of sub-pixels of the same color, as well as the first power supply voltage terminal VDD and the amplification output sub-circuit 273.
  • the integrator circuit 272 272 is used to accumulate the primary ambient light signals output by the multiple primary ambient light output terminals Out1 to generate a secondary ambient light signal.
  • the amplification output sub-circuit 273 is electrically connected to the amplification control terminal E1 and the secondary ambient light output terminal Out2.
  • the amplification output sub-circuit 273 is used to convert the two levels of light provided by the integrator circuit 272 under the control of the amplification control signal from the amplification control terminal E1.
  • the first-level ambient light signal is transmitted to the second-level ambient light output terminal Out2 for output.
  • the amplification control signal input to the amplification control terminal E1 can be provided by an integrated circuit (IC).
  • IC integrated circuit
  • each row corresponds to the same color of the ambient light sub-pixel circuit 220 and is connected to the same detection signal line, multiple rows corresponding to the same color of the ambient light sub-pixel circuit 220 are connected to multiple detection signal lines and the first-level ambient light of the ambient light amplification circuit 270 The output end is electrically connected. Therefore, when the ambient light sub-pixel circuit 220 performs short integration row by row, the signals collected in each row can be sequentially transmitted to the ambient light amplifier circuit 270 for accumulation, which is equivalent to the color The ambient light is integrated over a long period of time, which can improve the accuracy of detection.
  • embodiments of the present application provide an ambient light amplification circuit, which resets the integrator circuit through the amplification reset sub-circuit under the control of the second control terminal, and then resets the multi-row ambient light sub-pixel circuit through the integrator circuit.
  • the signal provided by the first-level ambient light output terminal is integrated for a long time, and then output through the amplification output sub-circuit under the control of the voltage of the amplification control terminal, thereby improving the accuracy of detection.
  • the amplification reset sub-circuit 271 includes a fifteenth transistor T71.
  • the gate of the fifteenth transistor T71 is electrically connected to the second control terminal S2, the first pole of the fifteenth transistor T71 is electrically connected to the integrator circuit 272, and the second pole of the fifteenth transistor T71 is electrically connected to the reset control terminal Vref. connect.
  • the amplification reset sub-circuit 271 may also include a plurality of transistors connected in parallel with the fifteenth transistor T71.
  • the above is only an example of the amplification reset sub-circuit 271.
  • Other structures with the same function as the amplification reset sub-circuit 271 are This will not be described in detail, but it should also fall within the protection scope of this application.
  • the integrator circuit 272 includes a third capacitor C3 and a sixteenth transistor T72.
  • the first terminal of the third capacitor C3 is electrically connected to the first power supply voltage terminal VDD and the first electrode of the sixteenth transistor T72, and the second terminal of the third capacitor C3 is connected to the ambient light sub-pixel circuit 220 in multiple rows of sub-pixels of the same color.
  • the first-level ambient light output terminal Out1 is electrically connected, and the first electrode of the fifteenth transistor T71 is electrically connected to the gate electrode of the sixteenth transistor T72.
  • the second pole of the sixteenth transistor T72 is electrically connected to the amplification output sub-circuit.
  • the integrator circuit 272 may also include a plurality of capacitors connected in parallel with the third capacitor C3, and/or a plurality of transistors connected in parallel with the fifteenth transistor T71, and/or a plurality of transistors connected in parallel with the sixteenth transistor T72. transistor.
  • the above is only an example of the integrator circuit 272.
  • Other structures with the same function as the integrator circuit 272 will not be described in detail here, but they should also fall within the protection scope of this application.
  • the third capacitor C3 is a storage capacitor that can store the photocharge generated by the ambient light sub-pixel circuit 220 .
  • the potential of the second end of the third capacitor C3, that is, the lower plate will change (decrease).
  • the Vgs of the sixteenth transistor T72 will change, causing the voltage flowing through T72 to change.
  • the current changes.
  • the size of the change is related to the time of current integration.
  • the sixteenth transistor T72 is equivalent to amplifying the photocurrent formed by the photocharge.
  • the amplification output sub-circuit 273 includes a seventeenth transistor T73.
  • the gate of the seventeenth transistor T73 is electrically connected to the amplification control terminal E1.
  • the first electrode of the seventeenth transistor T73 is electrically connected to the second electrode of the sixteenth transistor T72.
  • the second electrode of the seventeenth transistor T73 is electrically connected to the second electrode.
  • the ambient light output terminal Out2 is electrically connected.
  • the amplifying output sub-circuit 273 may also include a plurality of transistors connected in parallel with the seventeenth transistor T73.
  • the above is only an example of the amplifying output sub-circuit 273, and other structures with the same functions as the amplifying output sub-circuit 273 will not be omitted here. It should not be described in detail, but it should also fall within the protection scope of this application.
  • the fifteenth to seventeenth transistors T71 to T73 are of the same type, and are all N-type or P-type; alternatively, the types of the fifteenth to seventeenth transistors T71 to T73 can also be different, one of which The transistor is N-type, and the other transistor is P-type. This embodiment of the present application does not impose any limitation on this.
  • the fifteenth to seventeenth transistors T71 to T73 may have a first electrode that is a drain electrode and a second electrode that is a source electrode; or, the first electrode is a source electrode and the second electrode is a drain electrode.
  • the fifteenth to seventeenth transistors T71 to T73 may be enhancement mode transistors or depletion mode transistors, which may be selected as needed. This embodiment of the present application does not impose any restrictions on this.
  • the working process of the ambient light amplification circuit 270 will be described below in conjunction with FIG. 21 and FIG. 22.
  • the fifteenth to seventeenth transistors T71 to T73 are all P-type.
  • the scanning synchronization circuit of the ninth row provides the scanning signal to the first control terminal S1 of the ambient light sub-pixel circuit of the first row
  • the scanning signal can be multiplexed and provided to the second control terminal connected to the ambient light amplifier circuit 270 S2, in this way, the ninth row scan synchronization circuit provides a low level voltage to the second control terminal S2, the fifteenth transistor T71 is turned on, and the reset control terminal Vref resets the second end of the third capacitor C3, that is, , to reset the ambient light amplifier circuit 270.
  • the 9th row scanning synchronization circuit continues to provide high-level voltage to the second control terminal S2, the fifteenth transistor T71 is turned off, and the reset is completed; the amplification control terminal E1 is a high-level voltage , the seventeenth transistor T73 is turned off and does not output.
  • the ambient light sub-pixel circuit 220 of the second row corresponding to the OLED sub-pixel circuit 210 of the tenth row is turned on to collect ambient light.
  • the third capacitor C3 begins to store photocharges, and the sixteenth transistor T72 Amplification of photocurrent formed by photocharges.
  • the second control terminal S2 continues to provide a high-level voltage, the fifteenth transistor T71 is turned off, the amplification control terminal E1 is a high-level voltage, and the seventeenth transistor T73 is turned off and does not output.
  • the OLED sub-pixel circuit 210 of the ninth row emits light again, and the ambient light sub-pixel circuit 220 of the second row is turned off. At this time, the charging of the third capacitor C3 ends.
  • the ninth row scanning synchronization circuit continues to provide high-level voltage to the second control terminal S2, the fifteenth transistor T71 is turned off, the amplification control terminal E1 can still be a high-level voltage, and the seventeenth transistor T73 is turned off. output.
  • the amplification control signal E1 can then provide a low level. Voltage. At this time, since the amplification control signal E1 provides a low-level voltage, the seventeenth transistor T73 will be turned on, so that the long-integrated secondary ambient light signal can be output from the secondary ambient light output terminal Out2.
  • long integration refers to the cumulative integration of all rows of ambient light sub-pixel circuits 22, or refers to the cumulative integration of all rows of ambient light sub-pixel circuits 220 after multiple rounds of charging.
  • the secondary ambient light signal obtained by long integration refers to the signal obtained by the cumulative integration of all rows of ambient light sub-pixel circuits 220, or the signal obtained by the cumulative integration of all rows of ambient light sub-pixel circuits 220 after multiple rounds of charging.
  • Embodiments of the present application provide a driving method for an ambient light amplification circuit.
  • the amplification reset sub-circuit resets the integrator circuit under the control of the second control terminal.
  • the integrator circuit resets the multi-row ambient light sub-pixel circuits through the integrator circuit.
  • the signal provided by the first-level ambient light output terminal is accumulated and amplified, and then output through the amplification output sub-circuit under the control of the voltage of the amplification control terminal, thereby improving the accuracy of detection and adapting to high refresh rates.
  • the scan synchronization circuit 260 includes: an electrically connected scan synchronization inversion sub-circuit 261 and a scan synchronization output sub-circuit 262 .
  • the scan synchronous inversion sub-circuit 261 is also electrically connected to the amplification control terminal E1, the third power supply voltage terminal VGH, and the fourth power supply voltage terminal VGL.
  • the scan synchronous inversion sub-circuit 261 is used to adjust the amplification control signal from the amplification control terminal E1. Under control, a third inverted signal inverted with the amplification control signal is provided to the scan synchronization output sub-circuit 262 .
  • the third inverted signal is the third voltage provided by the third power supply voltage terminal VGH or the fourth voltage provided by the fourth power supply voltage terminal VGL.
  • the scan synchronization output sub-circuit 262 is also electrically connected to the scan synchronization input terminal ScIn, the third power supply voltage terminal VGH, the fourth power supply voltage terminal VGL and the scan synchronization output terminal ScOut; the scan synchronization output sub-circuit 262 is used to detect the third inversion signal Under the control of the scan signal from the scan synchronization input terminal ScIn, the third voltage provided by the third power supply voltage terminal VGH or the fourth voltage provided by the fourth power supply voltage terminal VGL is transmitted to the scan synchronization output terminal ScOut.
  • the scan synchronization subcircuit is used to convert the third inverted signal provided by the fourth power supply voltage terminal VGL to the voltage received by the scan synchronization input terminal ScIn when both are low-level voltages.
  • the four voltages are provided to the scan synchronization output terminal ScOut.
  • the third voltage provided by the third power supply voltage terminal VGH is provided to the scan synchronization output terminal ScOut.
  • the amplification control signal is a high-level voltage.
  • the ambient light sub-pixel circuit 220 of the second row corresponding to the ambient sub-pixel circuit of the tenth row can only be used for ambient light sub-pixels of the second row when it is not driven and the ambient light amplification circuit 270 does not perform integration and amplification.
  • the circuit 220 is reset, whereby the scanning signal provided by the scanning output terminal SOut of the ninth row scanning circuit 250 and the amplification control terminal E1 of the ambient light amplifying circuit 270 can be multiplexed, and the scanning signal of the ninth row scanning circuit 250 can be multiplexed.
  • the scan signal provided and the amplification control signal provided by the amplification control terminal E1 jointly control whether the ambient light sub-pixel circuit 220 of the second row is reset.
  • embodiments of the present application provide a scan synchronization circuit that inverts the amplification control signal provided by the amplification control terminal through the scan synchronization inversion sub-circuit, and then uses the inverted voltage to match the scan synchronization input signal provided by the scan synchronization input terminal.
  • the signals jointly control the output of the scan synchronization output sub-circuit, so that the first control signal can be jointly controlled according to the previous row scanning signal and the amplification control signal provided by the amplification control terminal, so as to realize the environmental light sub-pixel when the ambient light amplification circuit is not working.
  • the circuit is reset, and when the ambient light amplification circuit is working, the ambient light sub-pixel circuit is not reset.
  • the scan synchronization inversion sub-circuit 261 includes: a twelfth transistor T63 and a thirteenth transistor T64.
  • the gate of the thirteenth transistor T64 is electrically connected to the amplification control signal terminal E1
  • the first electrode of the thirteenth transistor T64 is electrically connected to the third power supply voltage terminal VGH
  • the second electrode of the thirteenth transistor T64 is electrically connected to the twelfth transistor
  • the first pole of T63 is electrically connected.
  • the gate electrode and the second electrode of the twelfth transistor T63 are both electrically connected to the fourth power supply voltage terminal VGL.
  • the scan synchronization inversion sub-circuit 261 may also include multiple transistors connected in parallel with the twelfth transistor T63 and/or the thirteenth transistor T64.
  • the above is only an example of the scan synchronization inversion sub-circuit 261. Others The structure with the same function as the scan synchronization inversion sub-circuit 261 will not be described again here, but it should also fall within the protection scope of the present application.
  • the scan synchronization output sub-circuit 262 includes: a tenth transistor T61, an eleventh transistor T62, and a fourteenth transistor T65.
  • the gate of the eleventh transistor T62 is electrically connected to the fourth power supply voltage terminal VGL, the first pole of the eleventh transistor T62 is electrically connected to the third power supply voltage terminal VGH, and the second pole of the eleventh transistor T62 is output synchronously with the scan.
  • Terminal ScOut is electrically connected.
  • the gate of the tenth transistor T61 is electrically connected to the scan synchronization input terminal ScIn, the first pole of the tenth transistor T61 is electrically connected to the scan synchronization output terminal ScOut, and the second pole of the tenth transistor T61 is electrically connected to the first pole of the fourteenth transistor T65. Electrical connection.
  • the gate electrode of the fourteenth transistor T65 is electrically connected to the second electrode of the thirteenth transistor T64, and the second electrode of the fourteenth transistor T65 is electrically connected to the fourth power supply voltage terminal VGL.
  • the scan synchronization output sub-circuit 262 may also include a plurality of transistors connected in parallel with the tenth transistor T61, and/or a plurality of transistors connected in parallel with the eleventh transistor T62, and/or a plurality of transistors connected in parallel with the twelfth transistor T63. transistor.
  • the above is only an example of the scan synchronization output sub-circuit 262.
  • Other structures with the same function as the scan synchronization output sub-circuit 262 will not be described again, but they should also fall within the protection scope of the present application.
  • the tenth to fourteenth transistors T61 to T65 are all P-type.
  • the 9th row scanning circuit 250 is used to provide the 9th row scanning signal to the 9th row OLED sub-pixel circuit 210 row by row
  • the 10th row scanning circuit 250 is used to provide the 10th row OLED sub-pixel circuit 210 with the 9th row scanning signal.
  • the 11th row scanning circuit 250 is used to provide the 11th row scanning signal to the 11th row OLED sub-pixel circuit 210 .
  • the 10th row scanning synchronization circuit 260 uses the scan synchronization input terminal ScIn to receive the 9th row scanning signal output by the 9th row scanning circuit 250, and at the same time, uses the amplification control terminal E1 to receive the amplification control signal.
  • the scanning signal of the ninth row is a low-level voltage and the amplification control signal is a high-level voltage
  • the tenth transistor T61 is turned on, the thirteenth transistor T64 is turned off, and the twelfth transistor T63 is turned on, so that the The fourth voltage provided by the fourth power supply voltage terminal VGL, that is, the inverse voltage of the amplified control signal, is transmitted to the gate of the fourteenth transistor T65, turning on the fourteenth transistor T65. Therefore, the fourth voltage, which is The low-level voltage is output from the output terminal of the scan synchronization circuit 260.
  • the tenth transistor T61 is turned off.
  • the amplification control signal is either a high-level voltage or a low-level voltage. It will not affect the output; and the gate of the eleventh transistor T62 is connected to the fourth power supply voltage terminal VGL, and the eleventh transistor T62 is normally open. Therefore, the first electrode of the eleventh transistor T62 can receive the third The third voltage of the three power supply voltage terminals VGH, that is, the high-level voltage, is transmitted to the output terminal of the scan synchronization circuit 260 for output.
  • embodiments of the present application provide a driving method for a scan synchronization circuit.
  • the amplification control signal provided by the amplification control terminal is inverted through the scan synchronization inversion sub-circuit, and then the inverted voltage is used to communicate with the scan synchronization input terminal.
  • the provided scan signal jointly controls the output of the scan synchronization output sub-circuit, so that the first control signal can be jointly controlled according to the previous row scan signal and the amplification control signal provided by the amplification control terminal, so as to realize the control of the ambient light amplification circuit when the ambient light amplification circuit does not work.
  • the ambient light sub-pixel circuit is reset, but when the ambient light amplifier circuit is working, the ambient light sub-pixel circuit is not reset.
  • the OLED circuit 200 includes: OLED sub-pixel circuit 210, ambient light sub-pixel circuit 220, scanning circuit 250, scanning synchronization circuit 260, enable circuit 230, enable synchronization circuit 240, ambient light amplification circuit 270 and analog amplification circuit 280.
  • the analog amplification circuit 280 may include an amplifier and an analog-to-digital converter.
  • the amplifier is used to integrate the secondary ambient light signal output by the ambient light amplification circuit 270 and convert it into a voltage value, and then provides it to the analog-to-digital converter.
  • the analog-to-digital converter then converts the analog voltage into a digital quantity.
  • the analog amplifier circuit 280 may also include other devices, and the embodiments of the present application do not impose any limitations on this.
  • the following description takes the analog amplification circuit 280 including an amplifier and an analog-to-digital converter as an example, and will not be described in detail below.
  • the scan output terminal SOut of the 10th row scanning circuit 250 is electrically connected to the scanning terminal Scan10 of the 10th row OLED sub-pixel circuit 210; the enable output terminal Eout of the 10th row enable circuit 230 is connected to the enable output terminal Eout of the 10th row OLED sub-pixel circuit 210. Can be electrically connected to Emit10.
  • the scan output terminal SOut of the ninth row scan circuit 250 is electrically connected to the scan synchronization input terminal ScIn of the tenth row scan synchronization circuit 260, and the scan synchronization output terminal ScOut of the tenth row scan synchronization circuit 260 is electrically connected to the second row ambient photon pixel circuit 220.
  • the first control terminal S1 is electrically connected.
  • the 10th row scanning synchronization circuit 260 is also electrically connected to the amplification control terminal E1.
  • the enable output terminal Eout of the ninth row enable circuit 230 is electrically connected to the first enable input terminal EmIn1 of the tenth row enable synchronization circuit 240, and the enable output terminal Eout of the eleventh row enable circuit 230 is electrically connected to the tenth row enable synchronization circuit.
  • the second enable input terminal EmIn2 of the second row 240 is electrically connected, and the enable synchronization output terminal EmOut of the tenth row enable synchronization circuit 240 is electrically connected to the third control terminal S3 of the second row ambient photon pixel circuit 220 .
  • the first-level ambient light output terminal Out1 of the ambient light sub-pixel circuit 220 in the second row is electrically connected to the secondary ambient light input terminal In2 of the ambient light amplification circuit 270.
  • the ambient light amplification circuit 270 is also electrically connected to the amplification control terminal E1.
  • the environment The second control terminal S2 of the optical amplifier circuit 270 is electrically connected to the scan synchronization output terminal ScOut of the ninth row scan synchronization circuit 260 .
  • the secondary ambient light output terminal of the ambient light amplifier circuit 270 is electrically connected to the third-level ambient light input terminal In3 of the analog amplifier circuit 280.
  • the analog amplifier circuit 280 also includes a third-level ambient light output terminal Out3.
  • the driving process of the OLED circuit can include:
  • the scan synchronization output terminal SCout of the scan synchronization circuit of the ninth row is connected to the ambient light amplification circuit 270.
  • the second control terminal S2 provides a low-level voltage
  • the fifteenth transistor T71 in the ambient light amplifier circuit 270 is turned on
  • the reset control terminal Vref provides a voltage to reset the voltage of the third capacitor C3; at this time, the amplification control terminal E1 is a high level voltage, the seventeenth transistor T73 is turned off, the secondary ambient light output terminal Out2 has no output, and the analog amplifier circuit 280 does not work.
  • the scan output terminal SOut of the 10th row scanning circuit 250 provides a high-level voltage to the scanning terminal Scan10 of the 10th row OLED sub-pixel circuit 210; the enable output terminal Eout of the 10th row enabling circuit 230 provides a high-level voltage to the The enable terminal Emit10 of the 10-row OLED sub-pixel circuit 210 provides a low-level voltage, and at the same time, the enable output terminal Eout of the 9-row enable circuit 230 provides a high-level voltage to the enable terminal Emit9 of the 9-row OLED sub-pixel circuit 210.
  • the enable output terminal Eout of the enable circuit 230 in the 11th row provides a low-level voltage to the enable terminal Emit11 of the OLED sub-pixel circuit 210 in the 11th row.
  • the OLED sub-pixel circuit 210 in the 9th row is in the non-light-emitting stage.
  • the 10th and 11th row OLED sub-pixel circuits 210 are in the light-emitting stage.
  • the scan output terminal SOut of the ninth row scanning circuit 250 provides a low level voltage to the scanning synchronization input terminal ScIn of the tenth row scanning synchronization circuit 260, and the amplification control terminal E1 provides a high level voltage.
  • the tenth row scanning synchronization circuit The fourteenth transistor T65 and the tenth transistor T61 in 260 are turned on, thereby providing the low-level voltage provided by the fourth power supply voltage terminal VGL to the first control terminal S1 (10 ).
  • the first control terminal S1 (10) inputs a low level voltage, the first transistor T21 in the ambient light sub-pixel circuit 220 of the second row is turned on, and the reset control terminal Vref provides voltage to reset the photodiode D1 and the second capacitor C2.
  • the enable output terminal Eout of the ninth row enable circuit 230 provides a high level voltage to the first enable input terminal EmIn1 of the tenth row enable synchronization circuit 240, and the enable output terminal Eout of the eleventh row enable circuit 230 supplies a high level voltage to the first enable output terminal Eout of the eleventh row enable circuit 230.
  • the second enable input terminal EmIn2 of the enable synchronization circuit 240 provides a low level voltage.
  • the seventh transistor T45 of the enable synchronization circuit 240 in the 10th row is turned on, the eighth transistor T46 is turned off, and the ninth transistor T47 is normally open.
  • the high-level voltage provided by the third power supply voltage terminal VGH is output from the enable synchronization output terminal EmOut and is provided to the third control terminal S3 of the ambient light sub-pixel circuit 220 of the second row.
  • the third control terminal S3 (10) inputs a high level voltage, and the second transistor T22 in the second row of ambient light sub-pixel circuit 220 is turned off. Therefore, the first-level ambient light output terminal Out1 of the second row of ambient light sub-pixel circuit 220 has no output.
  • the scan synchronization output terminal SCout of the ninth row scan synchronization circuit provides a high level voltage to the second control terminal S2 of the ambient light amplification circuit 270.
  • the fifteenth transistor T71 in the ambient light amplification circuit 270 is turned off and will not be reset.
  • the first-level ambient light output terminal Out1 of the ambient light sub-pixel circuit in the second row has no output, there is no integration; and because the amplification control terminal E1 is a high-level voltage, the seventeenth transistor T73 is turned off, and the secondary ambient light output There is no output at terminal Out2, and the analog amplifier circuit 280 does not work.
  • the scan output terminal SOut of the 10th row scanning circuit 250 provides a low-level voltage to the scanning terminal Scan10 of the 10th row OLED sub-pixel circuit 210; the enable output terminal Eout of the 10th row enable circuit 230 A high-level voltage is provided to the enable terminal Emit10 of the OLED sub-pixel circuit 210 in the 10th row, and at the same time, the enable output terminal Eout of the enable circuit 230 in the 9th row provides a high-level voltage to the enable terminal Emit9 of the OLED sub-pixel circuit 210 in the 9th row.
  • the enable output terminal Eout of the 11th row enable circuit 230 provides a low level voltage to the enable terminal Emit11 of the 11th row OLED sub-pixel circuit 210, that is, the 9th and 10th row OLED sub-pixel circuits 210 In the non-light-emitting stage, the 11th row OLED sub-pixel circuit 210 is in the light-emitting stage.
  • the scan output terminal SOut of the ninth row scanning circuit 250 provides a high level voltage to the scanning synchronization input terminal ScIn of the tenth row scanning synchronization circuit 260, and the amplification control terminal E1 provides a high level voltage.
  • the tenth row scanning synchronization circuit The fourteenth transistor T65 in 260 is turned on, the tenth transistor T61 is turned off, and the eleventh transistor T62 is normally open. Therefore, the high-level voltage provided by the third power supply voltage terminal VGH can be provided to the second row of ambient light sub-pixel circuits.
  • the first control terminal S1(10) of 220 is provided to the second row of ambient light sub-pixel circuits.
  • the first control terminal S1 (10) inputs a high level voltage, and the first transistor T21 in the ambient light sub-pixel circuit 220 of the second row is turned off and will not be reset.
  • the enable output terminal Eout of the ninth row enable circuit 230 provides a high level voltage to the first enable input terminal EmIn1 of the tenth row enable synchronization circuit 240, and the enable output terminal Eout of the eleventh row enable circuit 230 supplies a high level voltage to the first enable output terminal Eout of the eleventh row enable circuit 230.
  • the second enable input terminal EmIn2 of the enable synchronization circuit 240 provides a low level voltage.
  • the seventh transistor T45 of the enable synchronization circuit 240 in the 10th row is turned on, the eighth transistor T46 is turned off, and the ninth transistor T47 is normally open.
  • the high-level voltage provided by the third power supply voltage terminal VGH is output from the enable synchronization output terminal EmOut and is provided to the third control terminal S3 of the ambient light sub-pixel circuit 220 of the second row.
  • the third control terminal S3 inputs a high-level voltage, and the second transistor T22 in the second row of ambient light sub-pixel circuit 220 is turned off. Therefore, the first-level ambient light output terminal Out1 of the second row of ambient light sub-pixel circuit 220 has no output.
  • the scan synchronization output terminal SCout of the ninth row scan synchronization circuit provides a high level voltage to the second control terminal S2 of the ambient light amplification circuit 270.
  • the fifteenth transistor T71 in the ambient light amplification circuit 270 is turned off and will not be reset.
  • the first-level ambient light output terminal Out1 of the ambient light sub-pixel circuit in the second row has no output, there is no integration; and because the amplification control terminal E1 is a high-level voltage, the seventeenth transistor T73 is turned off, and the secondary ambient light output There is no output at terminal Out2, and the analog amplifier circuit 280 does not work.
  • the scan output terminal SOut of the 10th row scanning circuit 250 provides a high level voltage to the scanning terminal Scan10 of the 10th row OLED sub-pixel circuit 210; the enable output terminal Eout of the 10th row enable circuit 230 A high-level voltage is provided to the enable terminal Emit10 of the OLED sub-pixel circuit 210 in the 10th row, and at the same time, the enable output terminal Eout of the enable circuit 230 in the 9th row provides a high-level voltage to the enable terminal Emit9 of the OLED sub-pixel circuit 210 in the 9th row.
  • the enable output terminal Eout of the 11th row enable circuit 230 provides a high level voltage to the enable terminal Emit11 of the 11th row OLED sub-pixel circuit 210, that is, the 9th row, 10th row and 11th row OLED
  • the sub-pixel circuit 210 is in a non-light emitting stage.
  • the scan output terminal SOut of the ninth row scanning circuit 250 provides a high level voltage to the scanning synchronization input terminal ScIn of the tenth row scanning synchronization circuit 260, and the amplification control terminal E1 provides a high level voltage.
  • the tenth row scanning synchronization circuit The fourteenth transistor T65 in 260 is turned on, the tenth transistor T61 is turned off, and the eleventh transistor T62 is normally open. Therefore, the high-level voltage provided by the third power supply voltage terminal VGH can be provided to the second row of ambient light sub-pixel circuits.
  • the first control terminal S1(10) of 220 is provided to the second row of ambient light sub-pixel circuits.
  • the first control terminal S1 (10) inputs a high level voltage, and the first transistor T21 in the ambient light sub-pixel circuit 220 of the second row is turned off and will not be reset.
  • the enable output terminal Eout of the ninth row enable circuit 230 provides a high level voltage to the first enable input terminal EmIn1 of the tenth row enable synchronization circuit 240, and the enable output terminal Eout of the eleventh row enable circuit 230 supplies a high level voltage to the first enable output terminal Eout of the eleventh row enable circuit 230.
  • the second enable input terminal EmIn2 of the enable synchronization circuit 240 provides a high level voltage.
  • the seventh transistor T45 of the tenth row enable synchronization circuit 240 is turned on, and the eighth transistor T46 is turned on, and the fourth power supply voltage terminal VGL is provided.
  • the low-level voltage is output from the enable synchronization output terminal EmOut and is provided to the third control terminal S3 of the ambient light sub-pixel circuit 220 of the second row.
  • the third control terminal S3 inputs a low-level voltage, and the second transistor T22 in the second-row ambient light sub-pixel circuit 220 is turned on. As a result, the second-row ambient light sub-pixel circuit 220 performs photoelectric conversion, and the photocharge generated is from the first-level environment.
  • the light output terminal Out1 outputs.
  • the scan synchronization output terminal SCout of the ninth row scan synchronization circuit provides a high level voltage to the second control terminal S2 of the ambient light amplification circuit 270.
  • the fifteenth transistor T71 in the ambient light amplification circuit 270 is turned off and will not be reset.
  • the ambient light amplifier circuit 270 integrates the output of the second row of ambient light sub-pixel circuits; and because the amplification control terminal E1 is high level voltage, the seventeenth transistor T73 is turned off, the secondary ambient light output terminal Out2 has no output, and the analog amplifier circuit 280 does not work.
  • the scan output terminal SOut of the 10th row scanning circuit 250 provides a high level voltage to the scanning terminal Scan10 of the 10th row OLED sub-pixel circuit 210; the enable output terminal Eout of the 10th row enable circuit 230 A high level voltage is provided to the enable terminal Emit10 of the OLED sub-pixel circuit 210 in the 10th row.
  • the enable output terminal Eout of the enable circuit 230 in the 9th row provides a low voltage to the enable terminal Emit9 of the OLED sub-pixel circuit 210 in the 9th row.
  • the enable output terminal Eout of the 11th row enable circuit 230 provides a high level voltage to the enable terminal Emit11 of the 11th row OLED sub-pixel circuit 210, that is, the 9th row OLED sub-pixel circuit 210 is in the light-emitting stage,
  • the OLED sub-pixel circuits 210 in the 10th and 11th rows are in the non-light emitting stage.
  • the scan output terminal SOut of the ninth row scanning circuit 250 provides a high level voltage to the scanning synchronization input terminal ScIn of the tenth row scanning synchronization circuit 260, and the amplification control terminal E1 provides a low level voltage.
  • the tenth row scanning synchronization circuit The fourteenth transistor T65 in 260 is turned on, the tenth transistor T61 is turned off, and the eleventh transistor T62 is normally open. Therefore, the high-level voltage provided by the third power supply voltage terminal VGH can be provided to the second row of ambient light sub-pixel circuits.
  • the first control terminal S1(10) of 220 is provided to the second row of ambient light sub-pixel circuits.
  • the first control terminal S1 (10) inputs a high level voltage, and the first transistor T21 in the ambient light sub-pixel circuit 220 of the second row is turned off and will not be reset.
  • the enable output terminal Eout of the ninth row enable circuit 230 provides a low level voltage to the first enable input terminal EmIn1 of the tenth row enable synchronization circuit 240, and the enable output terminal Eout of the eleventh row enable circuit 230 supplies a low level voltage to the first enable input terminal EmIn1 of the tenth row enable synchronization circuit 240.
  • the second enable input terminal EmIn2 of the enable synchronization circuit 240 provides a high level voltage.
  • the seventh transistor T45 of the enable synchronization circuit 240 in the 10th row is turned off, the eighth transistor T46 is turned on, and the ninth transistor T47 is normally open.
  • the high-level voltage provided by the three power supply voltage terminals VGH is output from the enable synchronization output terminal EmOut and provided to the third control terminal S3 of the ambient light sub-pixel circuit 220 of the second row.
  • the third control terminal S3 inputs a high level voltage, and the second transistor T22 in the second row of ambient light sub-pixel circuit 220 is turned off. As a result, the photoelectric conversion of the second row of ambient light sub-pixel circuit 220 is completed, and the first-level ambient light output terminal Out1 No more output.
  • the scan synchronization output terminal SCout of the ninth row scan synchronization circuit provides a high level voltage to the second control terminal S2 of the ambient light amplification circuit 270, and the fifteenth transistor T71 in the ambient light amplification circuit 270 is turned off; and because of the amplification control The terminal E1 is at a high level voltage, the seventeenth transistor T73 is turned off, the secondary ambient light output terminal Out2 has no output, and the analog amplifier circuit 280 does not work.
  • the amplification control terminal E1 provides a low-level voltage again, so that the seventeenth transistor T73 turns on , the crystal light T72 outputs the charge stored in the third capacitor C3 from the secondary ambient light output terminal Out2, and at this time, the second control terminal S2 continues to input a high level voltage, and the fifteenth transistor T71 in the ambient light amplifier circuit 270 Closed, will not reset.
  • the third-level ambient light input terminal In3 of the analog amplifier circuit 280 receives the amplified charge, integrates it into a voltage, and then converts it into a data amount to generate ambient light data and output it from the third-level ambient light output terminal Out3.
  • Embodiments of the present application provide a driving method for an OLED circuit.
  • the scanning signal provided by the previous row of scanning circuit is multiplexed through the scanning synchronization circuit; and then jointly controlled according to the first control signal and the amplification control signal provided by the amplification control terminal.
  • the first control signal is provided to the ambient light sub-pixel circuit of the current row to reset the ambient light sub-pixel circuit of the current row.
  • the enable signals provided by the upper and lower adjacent row enable circuits are also multiplexed through the enable synchronization circuit, so that while the upper and lower adjacent row enable circuits control the respective corresponding OLED sub-pixel circuits in the non-light-emitting stage, the enable signals can be controlled according to the
  • the two enable signals jointly control the third control signal provided to the ambient light sub-pixel circuit of the row to control the ambient light sub-pixel circuit of the row to collect and output ambient light.
  • the charges generated by multiple rows of ambient light sub-pixel circuits are also collected and integrated through the ambient light amplification circuit, and then output to the added analog amplifier circuit to convert into ambient light data. Since the collection of ambient light in this application is not limited to ambient light sub-pixels The number of circuit rows, that is, the size of the ambient light sensor, is not limited. Therefore, the method of collecting ambient light provided by this application can adapt to high refresh rates.
  • This application also multiplexes the signal output by the scanning synchronization circuit of the corresponding row of the first row of ambient light sub-pixel circuits, that is, multiplexes the first control signal corresponding to the first row of ambient light sub-pixel circuits and provides it as a second control signal to
  • the second control terminal of the ambient light amplification circuit is used to reset the ambient light amplification circuit. Since the signal output by the scan synchronization circuit is combined with the state of the amplification control signal of the amplification control terminal, the ambient light amplification circuit will not be reset when the ambient light amplification circuit is outputting, that is, when the analog amplification circuit is working. The ambient light sub-pixel circuit is reset only when the ambient light amplification circuit is not operating.
  • An embodiment of the present application also provides an OLED display panel, which includes an OLED circuit as described above on a substrate substrate.
  • the OLED sub-pixel circuit in the OLED circuit includes: a light-emitting element; the ambient light sub-pixel circuit in the OLED circuit is arranged between the substrate substrate and the light-emitting element.
  • the ambient light sub-pixel circuit is integrated into the OLED display panel, when the ambient light sub-pixel circuit collects the intensity of external ambient light, it will no longer be affected by the light transmittance of the display screen. Therefore, the ambient light can be improved. detection accuracy.
  • the OLED sub-pixel circuit in the OLED display panel further includes: a driving circuit, the driving circuit is used to drive the light-emitting element to emit light.
  • the driving circuit and the ambient light sub-pixel circuit are arranged on the same layer.
  • the photodiode in the ambient light sub-pixel circuit includes: a first electrode, a photoelectric material layer and a second electrode arranged in a stack;
  • the first electrode is located on a side close to the base substrate and parallel to the base substrate.
  • the second transistor in the ambient light sub-pixel circuit is electrically connected to the first electrode for transmitting the voltage on the first electrode.
  • the voltage of the first electrode is the collected primary ambient light signal.
  • An embodiment of the present application also provides a display screen, including the OLED display panel as mentioned above.
  • An embodiment of the present application also provides an electronic device, including the display screen as described above.
  • the electronic devices and display screens provided by the above embodiments of the present application are all used to perform the methods provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects corresponding to the methods provided above, and will not be described again here. .
  • the ambient light sub-pixel circuit included in the ambient light sensor provided by the present application can cooperate with the OLED sub-pixel circuit, by controlling the ambient light sub-pixel circuit
  • the ambient light sub-pixel circuit performs photoelectric conversion, thereby reducing the impact of the pixel luminescence of the display screen on the ambient light collected by the ambient light sensor. , which can achieve accurate detection of the intensity of the external environment.
  • the ambient light sensor in the display can quickly and accurately detect the change in surrounding ambient light. Adjust the brightness of the display screen in a timely manner. For example, the closer the user is to the place with the strongest light under the street lamp, the brightness of the mobile phone's display screen will also increase to ensure that it is clear enough.
  • the ambient light detection method of this application is suitable for high refresh rate electronic devices, so even if the user is playing games, the ambient light can be accurately measured and the brightness of the display screen can be adjusted in a timely manner to satisfy the user's visual experience.
  • preset and predefined can be realized by pre-saving corresponding codes, tables or other methods that can be used to indicate relevant information in the device (for example, including electronic devices). , this application does not limit its specific implementation.

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Abstract

一种OLED电路、OLED显示面板、显示屏及电子设备，涉及显示技术领域。OLED电路中，第N行扫描同步电路（260）与第M行环境光子像素电路（220）电连接，第N行扫描同步电路（260）用于向第M行环境光子像素电路（220）提供第一控制信号；第N行使能同步电路（240）与第M行环境光子像素电路（220）电连接,第N行使能同步电路（240）用于向第M行环境光子像素电路（220）提供第三控制信号;第M行环境光子像素电路（220）用于在第一控制信号的控制下进行重置，还用于在第N-1行OLED子像素电路（210）、第N行 OLED子像素电路（210）和第 N+1行OLED子像素电路（210）均不发光时，在第三控制信号的控制下进行环境光采集，并生成一级环境光信号。如此，即可能够适应高刷新率，又能在OLED子像素非发光阶段对环境光进行采集，提高检测的准确率。

Description

OLED电路、OLED显示面板、显示屏及电子设备
本申请要求于2022年04月07日提交国家知识产权局、申请号为202210360040.1、申请名称为“OLED电路、OLED显示面板、显示屏及电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种OLED电路、OLED显示面板、显示屏及电子设备。
背景技术
在现有技术中，可以通过用户的操纵，手动调节电子设备中显示屏的显示亮度。此外，还可以在电子设备中设置环境光传感器，以感知周边环境光线的强弱，使得电子设备可根据环境光线的强弱来适应性调节显示屏的显示亮度。
随着全面屏的进一步发展，挖孔方案将不再适用，于是，相关技术方案将环境光传感器放置在显示屏的下方，基于这种屏下设置的方式所实现的检测有的不准确，有的不适用于高刷新频率。因此，需要一种能提高检测准确性、适用高刷新频率的新方案。
发明内容
本申请提供一种OLED电路、OLED显示面板、显示屏及电子设备，既能适应高刷新率，又能在同行及相邻两行OLED子像素电路不发光时对环境光进行采集，提高检测的准确率。
为达到上述目的，本申请采用如下技术方案：
第一方面，提供了一种环境光子像素电路，设置于OLED显示面板中，所述环境光子像素电路包括：环境光重置子电路、光电转换子电路和开关控制子电路，所述环境光重置子电路、所述光电转换子电路和所述开关控制子电路均与第一节点电连接；
所述环境光重置子电路还与第一控制端和重置控制端电连接，所述环境光重置子电路用于在来自所述第一控制端的电压的控制下，将所述重置控制端的电压输入至所述第一节点；
所述光电转换子电路还与接地端电连接，所述光电转换子电路用于将环境光转换为电压，并提供给所述第一节点；
所述开关控制子电路还与第三控制端和一级环境光输出端电连接，所述开关控制子电路用于在所述OLED子像素电路的非发光阶段，在所述第三控制端的控制下，由所述一级环境光输出端将所述第一节点处的电压作为所述一级环境光信号输出。
可选地，环境光重置电路可以在同行的OLED子像素电路处于发光阶段时，在来自第一控制端的电压的控制下，将重置控制端的电压输入第一节点，以实现重置。
可选地，开关控制子电路可以在同行的OLED子像素电路、上一行OLED子像素 电路和下一行OLED子像素电路均处于非发光阶段时，在第三控制端的控制下，由一级环境光输出端将第一节点处的电压作为一级环境光信号输出。
本申请实施例提供一种环境光子像素电路，在OLED子像素电路的发光阶段，第一控制端控制环境光重置子电路导通，使得重置控制端提供的电压输入至第一节点，消除残余的电压；然后，在OLED子像素电路的非发光阶段，第三控制端则可以控制开关控制子电路导通，使得光电转换子电路对环境光进行采集和转换后的电压可以通过第一节点，经开关控制子电路输出。由此，通过将环境光子像素电路与OLED子像素电路的工作过程相配合，可以避免OLED子像素电路发光阶段产生的光强对环境光子像素电路的影响，使环境光子像素电路仅在OLED子像素电路非发光阶段采集环境光，从而可以提高采集的准确度。
在第一方面一种可能的实现方式中，所述环境光重置子电路包括第一晶体管；
所述第一晶体管的栅极与所述第一控制端电连接，所述第一晶体管的第一极与所述重置控制端电连接，所述第一晶体管的第二极与所述第一节点电连接。
在第一方面一种可能的实现方式中，所述光电转换子电路包括光电二极管和第一电容；
所述光电二极管的第一端与所述第一节点电连接，所述光电二极管的第二端与所述接地端电连接；
所述第一电容的第一端与所述第一节点电连接，所述第一电容的第二端与所述接地端电连接。
其中，光电二极管用于在环境光的光照下产生电荷，形成电流，以在第一节点和接地端之间形成电压差，实现光电转换。第一电容为光电二极管自身产生的电容。
在第一方面一种可能的实现方式中，所述开关控制子电路包括第二晶体管；
所述第二晶体管的栅极与所述第三控制端电连接，所述第二晶体管的第一极与所述第一节点电连接，所述第二晶体管的第二极与所述一级环境光输出端电连接。
第二方面，提供一种OLED电路，应用于OLED显示面板中，所述OLED显示面板包括呈阵列排布的多个子像素；所述OLED电路包括：多行扫描同步电路和多行使能同步电路；
所述OLED电路还包括：
位于每个子像素中的OLED子像素电路，位于部分子像素中的环境光子像素电路，其中，第N行OLED子像素电路与第M行环境光子像素电路位于同一行子像素中，N为大于或等于2的整数，M为大于或等于1的整数；
第N行扫描同步电路与第M行环境光子像素电路电连接，所述第N行扫描同步电路用于向所述第M行环境光子像素电路提供第一控制信号；
第N行使能同步电路与所述第M行环境光子像素电路电连接，所述第N行使能同步电路用于向所述第M行环境光子像素电路提供第三控制信号；
所述第M行环境光子像素电路用于在所述第一控制信号的控制下进行重置，还用于在第N-1行OLED子像素电路、所述第N行OLED子像素电路和第N+1行OLED子像素电路均不发光时，在所述第三控制信号的控制下进行环境光采集，并生成一级环境光信号。
本申请实施例提供了一种OLED电路，通过增设扫描同步电路，来为本行环境光子像素电路提供第一控制信号，以对本行环境光子像素电路进行重置。还通过增设使能同步电路，来为本行环境光子像素电路提供第三控制信号，以控制本行的环境光子像素电路在同行以及相邻两行OLED子像素电路不发光时进行环境光的采集和输出。由此，通过将环境光子像素电路与OLED子像素电路的工作过程相配合，可以避免OLED子像素电路发光阶段产生的光强对环境光子像素电路的影响，使环境光子像素电路仅在同行以及相邻两行OLED子像素电路非发光阶段采集环境光，从而可以提高采集的准确度。此外，该采集过程可以适用高刷新率的显示屏。
在第二方面一种可能的实现方式中，所述OLED电路还包括：多行扫描电路、多行使能电路；
每行扫描电路的扫描输出端与同行的所述OLED子像素电路的扫描端电连接，每行扫描电路用于为同行的所述OLED子像素电路提供扫描信号，所述OLED子像素电路用于在同行的所述扫描电路提供的扫描信号的控制下，接收数据线提供的电压；
每行使能电路的使能输出端与同行的所述OLED子像素电路的使能端电连接，每行使能电路用于为同行的所述OLED子像素电路提供使能信号，所述OLED子像素电路用于在同行的所述使能电路提供的使能信号的控制下不发光；
第N-1行扫描电路的扫描输出端与第N行扫描同步电路的扫描同步输入端电连接，所述第N行扫描同步电路的扫描同步输出端与所述第M行环境光子像素电路的第一控制端电连接，所述第N行扫描同步电路还与放大控制端电连接；所述第N行扫描同步电路用于在所述第N-1行扫描电路提供的扫描信号和所述放大控制端提供的放大控制信号的共同控制下，为所述第M行环境光子像素电路的所述第一控制端提供所述第一控制信号；
第N-1行使能电路的使能输出端与第N行使能同步电路的第一使能输入端电连接，第N+1行使能电路的使能输出端与所述第N行使能同步电路的第二使能输入端电连接，所述第N行使能同步电路的使能同步输出端与所述第M行环境光子像素电路的第三控制端电连接，所述第N行使能同步电路用于在所述第N-1行使能电路提供的使能信号和所述第N+1行使能电路提供的使能信号的控制下，向所述第M行环境光子像素电路的所述第三控制端提供所述第三控制信号。
在该实现方式中，通过增设扫描同步电路，将上一行扫描电路提供的扫描信号复用；然后，根据该第一控制信号和放大控制端提供的放大控制信号来共同控制提供给本行环境光子像素电路的第一控制信号，以对本行环境光子像素电路进行重置。
在该实现方式中，还通过增设使能同步电路，从而可以将上下相邻两行使能电路提供的使能信号进行复用，以在上下相邻两行使能电路控制各自对应的OLED子像素电路处于非发光阶段的同时，可以根据该两个使能信号来共同控制提供给本行环境光子像素电路的第三控制信号，以控制本行的环境光子像素电路进行环境光的采集和输出。
在第二方面一种可能的实现方式中，所述子像素包括F种颜色的子像素，所述OLED电路还包括：F个环境光放大电路以及模拟放大电路，F为大于或等于3的整数；
所述第N-M+1行扫描同步电路的扫描同步输出端与所述F个环境光放大电路的第 二控制端分别电连接，所述第N-M+1行扫描同步电路用于向所述F个环境光放大电路的第二控制端提供第二控制信号，所述F个环境光放大电路用于在所述第二控制信号和来自所述放大控制端的放大控制信号的共同控制下进行重置；
同一颜色的子像素中的环境光子像素电路的一级环境光输出端与1个环境光放大电路电连接，所述环境光放大电路用于将多行同一颜色子像素中的环境光子像素电路，一次或多次采集的一级环境光信号进行积分，生成二级环境光信号；
所述F个环境光放大电路的二级环境光输出端与所述模拟放大电路电连接，所述F个环境光放大电路还用于在所述第二控制信号和来自所述放大控制端的放大控制信号的共同控制下，将所述二级环境光信号提供给所述模拟放大电路，所述模拟放大电路用于将所述二级环境光信号进行放大，并转换成环境光数据。
在该实现方式中，通过增设环境光放大电路可以将多行环境光子像素电路产生的电荷进行汇集和整合，然后输出给增设的模拟放大电路转换成环境光数据，由于本申请中环境光的采集不受限于环境光子像素电路的行数，也即不受限于环境光传感器的尺寸，所以，本申请提供的采集环境光的方式可以适应高刷新率。
本申请还将第1行环境光子像素电路对应行的扫描同步电路输出的信号进行复用，也即将第1行环境光子像素电路对应的第一控制信号进行复用，作为第二控制信号提供给环境光放大电路的第二控制端，以实现对环境光放大电路进行重置的目的。由于扫描同步电路输出的信号结合了放大控制端的放大控制信号的状态，所以，不会在环境光放大电路进行输出时，也即不会在模拟放大电路进行工作时，对环境光放大电路进行重置，而仅在环境光放大电路未工作时才对环境光子像素电路进行重置。
在第二方面一种可能的实现方式中，所述第N行使能同步电路包括：第一反相子电路、第二反相子电路、使能同步输出子电路；
所述第一反相子电路与第一使能输入端、所述使能同步输出子电路电连接，所述第一反相子电路用于在来自所述第一使能输入端的第一使能信号的控制下，将与所述第一使能信号反相的第一反相信号提供给所述使能同步输出子电路，所述第一使能信号为所述第N-1行使能电路的使能输出端提供的使能信号；
所述第二反相子电路与第二使能输入端、所述使能同步输出子电路电连接，所述第二反相子电路用于在来自所述第二使能输入端的第二使能信号的控制下，将与所述第二使能信号反相的第二反相信号提供给所述使能同步输出子电路，所述第二使能信号为所述第N+1行使能电路的使能输出端提供的使能信号；
所述使能同步输出子电路还与第一电源电压端、第二电源电压端、使能同步输出端电连接，所述使能同步输出子电路用于在所述第一反相信号和所述第二反相信号的控制下，将所述第一电源电压端提供的所述第一电压或所述第二电源电压端提供的所述第二电压传输给所述使能同步输出端输出。
在该实现方式中，通过使能同步电路中的第一反相子电路和第二反相子电路两个子电路来接收第一使能信号和第二使能信号并将其反相，然后，再利用反相后的两个信号来控制使能同步输出子电路的输出，从而可以实现两个使能信号控制一个输出信号的目的。
在第二方面一种可能的实现方式中，所述第一反相子电路包括第三晶体管和第四 晶体管；
所述第三晶体管的栅极与所述第一使能输入端电连接，所述第三晶体管的第一极与第三电源电压端电连接，所述第三晶体管的第二极与第二节点电连接；
所述第四晶体管的栅极和所述第二极均与第四电源电压端电连接，所述第四晶体管的第一极与所述第二节点电连接。
在第二方面一种可能的实现方式中，所述第二反相子电路包括第五晶体管和第六晶体管；
所述第五晶体管的栅极与所述第二使能输入端电连接，所述第五晶体管的第一极与第三电源电压端电连接，所述第五晶体管的第二极与第三节点电连接；
所述第六晶体管的栅极和所述第二极均与第四电源电压端电连接，所述第六晶体管的第一极与所述第三节点电连接。
在第二方面一种可能的实现方式中，所述使能同步输出子电路包括第七晶体管、第八晶体管和第九晶体管；
所述第七晶体管的栅极与所述第二节点电连接，所述第七晶体管的第一极与所述第八晶体管的第二极电连接，所述第七晶体管的第二极与所述第四电源电压端电连接；
所述第八晶体管的栅极与所述第三节点电连接，所述第八晶体管的第一极与所述使能同步输出端电连接；
所述第九晶体管的栅极与所述第四电源电压端电连接，所述第九晶体管的第一极与所述第三电源电压端电连接，所述第九晶体管的第二极与所述使能同步输出端电连接。
在第二方面一种可能的实现方式中，所述第N行扫描同步电路包括：电连接的扫描同步反相子电路和扫描同步输出子电路；
所述扫描同步反相子电路还与所述放大控制端、第三电源电压端、第四电源电压端电连接，所述扫描同步反相子电路用于在来自所述放大控制端的放大控制信号的控制下，将与所述放大控制信号反相的第三反相信号提供给所述扫描同步输出子电路，所述第三反相信号为所述第三电源电压端提供的第三电压或所述第四电源电压端提供的第四电压；
所述扫描同步输出子电路还与扫描同步输入端、所述第三电源电压端、所述第四电源电压端和扫描同步输出端电连接，所述扫描同步输出子电路用于在所述第三反相信号和来自所述扫描同步输入端的扫描信号的控制下，将所述第三电源电压端提供的第三电压或所述第四电源电压端提供的第四电压传输给所述扫描同步输出端输出。
在该实现方式中，通过扫描同步反相子电路将放大控制端提供的放大控制信号进行反相，然后再利用反相后的电压与扫描同步输入端提供的扫描信号共同控制扫描同步输出子电路的输出，从而可以根据上一行扫描信号和放大控制端提供的放大控制信号来共同控制第一控制信号，以实现在环境光放大电路不工作时，对环境光子像素电路进行重置，在环境光放大电路工作时，不会对环境光子像素电路进行重置的目的。
在第二方面一种可能的实现方式中，所述扫描同步反相子电路包括：第十二晶体管和第十三晶体管；
所述第十三晶体管的栅极与所述放大控制信号端电连接，所述第十三晶体管的第 一极与所述第三电源电压端电连接，所述第十三晶体管的第二极与所述第十二晶体管的第一极电连接；
所述第十二晶体管的栅极和第二极均与所述第四电源电压端电连接。
在第二方面一种可能的实现方式中，所述扫描同步输出子电路包括：第十晶体管、第十一晶体管和第十四晶体管；
所述第十一晶体管的栅极与所述第四电源电压端电连接，所述第十一晶体管的第一极与所述第三电源电压端电连接，所述第十一晶体管的第二极与所述扫描同步输出端电连接；
所述第十晶体管的栅极与所述扫描同步输入端电连接，所述第十晶体管的第一极与所述扫描同步输出端电连接，所述第十晶体管的第二极与所述第十四晶体管的第一极电连接；
所述第十四晶体管的栅极与所述第十三晶体管的第二极电连接，所述第十四晶体管的第二极与所述第四电源电压端电连接。
在第二方面一种可能的实现方式中，所述环境光放大电路包括：放大重置子电路、积分子电路和放大输出子电路；
所述放大重置子电路与所述第二控制端、重置控制端和所述积分子电路电连接，所述放大重置子电路用于在来自所述第二控制端的所述第二控制信号的控制下，将来自所述重置控制端的电压提供给所述积分子电路，对所述积分子电路进行重置；
所述积分子电路还与多行同一颜色子像素中的环境光子像素电路的一级环境光输出端、以及第一电源电压端、所述放大输出子电路电连接，所述积分子电路用于将所述一级环境光输出端输出的一级环境光信号进行积分，生成二级环境光信号；
所述放大输出子电路与所述放大控制端和所述二级环境光输出端电连接，所述放大输出子电路用于在来自所述放大控制端的放大控制信号的控制下，将所述二级环境光信号传输给所述二级环境光输出端输出。
由于每行对应相同颜色的环境光子像素电路连接同一个检测信号线，多行对应相同的环境光子像素电路连接的多条检测信号线与环境光放大电路的一级环境光输出端电连接，由此，在环境光子像素电路逐行进行短积分时，可以依次将每行汇集的信号逐行传输至该环境光放大电路进行累加，这样就相当于对该种颜色的环境光进行了长积分，从而可以提高检测的准确性。
在该实现方式中，通过环境光放大电路中的放大重置子电路在第二控制端的控制下对积分子电路进行重置，然后，通过积分子电路对多行环境光子像素电路的一级环境光输出端提供的信号进行长积分，再通过放大输出子电路在放大控制端的电压的控制下进行输出，从而可以提高检测的准确性。
在第二方面一种可能的实现方式中，所述放大重置子电路包括：第十五晶体管；
所述第十五晶体管的栅极与所述第二控制端电连接，所述第十五晶体管的第一极与所述积分子电路电连接，所述第十五晶体管的第二极与所述重置控制端电连接。
在第二方面一种可能的实现方式中，所述积分子电路包括：第三电容和第十六晶体管；
所述第三电容的第一端与所述第一电源电压端、所述第十六晶体管的第一极电连 接，所述第三电容的第二端与多行同一颜色子像素中的环境光子像素电路的一级环境光输出端电连接，所述第十五晶体管的第一极与所述第十六晶体管的栅极电连接；
所述第十六晶体管的第二极与所述放大输出子电路电连接。
在第二方面一种可能的实现方式中，所述放大输出子电路包括：第十七晶体管；
所述第十七晶体管的栅极与所述放大控制端电连接，所述第十七晶体管的第一极与所述第十六晶体管的第二极电连接，所述第十七晶体管的第二极与所述二级环境光输出端电连接。
第三方面，提供了一种如第一方面或第一方面的任意可能的实现方式中的环境光子像素电路的驱动方法，所述驱动方法包括：
在重置阶段，所述环境光重置子电路在来自所述第一控制端的电压的控制下，将所述重置控制端提供的电压输入所述第一节点；
在输出阶段，所述开关控制子电路在来自所述第三控制端的电压的控制下，由所述一级环境光输出端输出所述光电转换子电路产生的电压。
本申请实施例提供一种环境光子像素电路的驱动方法，在OLED子像素电路的发光阶段，第一控制端控制环境光重置子电路导通，使得重置控制端提供的电压输入至第一节点Q1，消除残余的电压；然后，在OLED子像素电路的非发光阶段，第三控制端则可以控制开关控制子电路导通，使得光电转换子电路对环境光进行采集和转换后的电压可以通过第一节点，经开关控制子电路输出。由此，通过将环境光子像素电路与OLED子像素电路的工作过程相配合，可以避免OLED子像素电路发光阶段产生的光强对环境光子像素电路的影响，使环境光子像素电路仅在OLED子像素电路非发光阶段采集环境光，从而可以提高采集的准确度。
第四方面，提供了一种如第二方面或第二方面的任意可能的实现方式中的OLED电路的驱动方法，所述OLED电路的驱动方法包括：
在第i阶段，所述第N行扫描同步电路向所述第M行环境光子像素电路提供第一控制信号，所述第M行环境光子像素电路在所述第一控制信号的控制下进行重置；
在第i+2阶段，所述第N行使能同步电路向所述第M行环境光子像素电路提供第三控制信号，所述第M行环境光子像素电路在第N-1行OLED子像素电路、第N行OLED子像素电路和第N+1行OLED子像素电路均不发光时，在所述第三控制信号的控制下进行环境光采集，并生成一级环境光信号。
本申请实施例提供了一种OLED电路的驱动方法，通过增设扫描同步电路，来为本行环境光子像素电路提供第一控制信号，以对本行环境光子像素电路进行重置。还通过增设使能同步电路，来为本行环境光子像素电路提供第三控制信号，以控制本行的环境光子像素电路在同行以及相邻两行OLED子像素电路不发光时进行环境光的采集和输出。由此，通过将环境光子像素电路与OLED子像素电路的工作过程相配合，可以避免OLED子像素电路发光阶段产生的光强对环境光子像素电路的影响，使环境光子像素电路仅在同行以及相邻两行OLED子像素电路非发光阶段采集环境光，从而可以提高采集的准确度。此外，该采集过程可以适用高刷新率的显示屏。
在第四方面一种可能的实现方式中，在第i阶段，所述第N行扫描同步电路向所述第M行环境光子像素电路提供第一控制信号，包括：
在第i阶段，第N-1行使能电路的使能输出端向第N-1行OLED子像素电路的使能端提供使能信号，所述第N-1行OLED子像素电路在所述第N-1行使能电路提供的使能信号的控制下不发光；i为大于或等于1的整数；
所述第N-1行扫描电路的扫描输出端向所述第N行扫描同步电路的扫描同步输入端提供扫描信号，所述第N行扫描同步电路在所述第N-1扫描电路提供的扫描信号和所述放大控制端提供的放大控制信号的控制下，向所述第M行环境光子像素电路的所述第一控制端提供所述第一控制信号；
在第i+2阶段，所述第N行使能同步电路向所述第M行环境光子像素电路提供第三控制信号，包括：
在第i+2阶段，所述第N+1行使能电路的使能输出端向所述第N+1行OLED子像素电路的使能端提供使能信号，所述第N+1行OLED子像素电路在所述第N+1行使能电路提供的使能信号的控制下不发光；
所述第N-1行使能电路的使能输出端向所述第N行使能同步电路的第一使能输入端提供使能信号，所述第N+1行使能电路的使能输出端向所述第N行使能同步电路的第二使能输入端提供使能信号，所述第N行使能同步电路在所述第N-1行使能电路提供的使能信号和所述第N+1行是使能电路提供的使能信号的控制下，向所述第M行环境光子像素电路的所述第三控制端提供所述第三控制信号；
所述OLED电路的驱动方法还包括：
在第i+1阶段，所述第N行使能电路的使能输出端向所述第N行OLED子像素电路的使能端提供使能信号，所述第N行OLED子像素电路在所述第N行使能电路提供的使能信号的控制下不发光；
所述第N行扫描电路的扫描输出端向所述第N行OLED子像素电路的扫描端提供扫描信号，所述第N行OLED子像素电路接收数据信号线提供的电压。
应理解，第i+1阶段在第i阶段之后，在第i+2阶段之前。
在该实现方式中，本申请提供的OLED电路的驱动方法通过扫描同步电路将上一行扫描电路提供的扫描信号复用；然后，根据该第一控制信号和放大控制端提供的放大控制信号来共同控制提供给本行环境光子像素电路的第一控制信号，以对本行环境光子像素电路进行重置。
在该实现方式中，本申请提供的OLED电路的驱动方法还通过使能同步电路将上下相邻两行使能电路提供的使能信号进行复用，以在上下相邻两行使能电路控制各自对应的OLED子像素电路处于非发光阶段的同时，可以根据该两个使能信号来共同控制提供给本行环境光子像素电路的第三控制信号，以控制本行的环境光子像素电路进行环境光的采集和输出。
在第四方面一种可能的实现方式中，所述OLED电路的驱动方法还包括：
在第i+3阶段，第N-1行使能电路的使能输出端向第N-1行OLED子像素电路的使能端提供使能信号，所述第N-1行OLED子像素电路在所述第N-1行使能电路提供的使能信号的控制下发光；
所述第N-1行使能电路的使能输出端向所述第N行使能同步电路的第一使能输入端提供使能信号，所述第N+1行使能电路的使能输出端向所述第N行使能同步电路的 第二使能输入端提供使能信号，所述第N行使能同步电路在所述第N-1行使能电路提供的使能信号和所述第N+1行是使能电路提供的使能信号的控制下，向所述第M行环境光子像素电路的所述第三控制端提供所述第三控制信号，所述第M行环境光子像素电路在所述第三控制信号的控制下结束环境光采集。
应理解，第i+3阶段在第i+2阶段之后。
在第四方面一种可能的实现方式中，所述OLED电路的驱动方法还包括：
在第i阶段之前，所述F个环境光放大电路在所述放大控制端提供的所述放大控制信号和所述第N-M+1行扫描同步电路的扫描同步输出端向所述第二控制端提供第二控制信号的控制下，进行重置。
在该实现方式中，本申请还将第1行环境光子像素电路对应行的扫描同步电路输出的信号进行复用，也即将第1行环境光子像素电路对应的第一控制信号进行复用，作为第二控制信号提供给环境光放大电路的第二控制端，以实现对环境光放大电路进行重置的目的。由于扫描同步电路输出的信号结合了放大控制端的放大控制信号的状态，所以，不会在环境光放大电路进行输出时，也即模拟放大电路进行工作时，对环境光放大电路进行重置，而仅在环境光放大电路未工作时才对环境光子像素电路进行重置。
在第四方面一种可能的实现方式中，所述驱动方法还包括：
在第i阶段和第i+1阶段，所述F个环境光放大电路在所述放大控制端提供的所述放大控制信号和所述第N-M+1行扫描同步电路的扫描同步输出端向所述第二控制端提供第二控制信号的控制下，不工作；
在第i+2阶段，所述F个环境光放大电路在所述放大控制端提供的所述放大控制信号和所述第N-M+1行扫描同步电路的扫描同步输出端向所述第二控制端提供第二控制信号的控制下，对所述第M行环境光子像素电路输出的一级环境光信号进行积分；
在第i+3阶段之后，所述F个环境光放大电路在所述放大控制端提供的所述放大控制信号和所述第N-M+1行扫描同步电路的扫描同步输出端向所述第二控制端提供第二控制信号的控制下，将对多行环境光子像素电路一次或多次积分所生成的二级环境光信号提供给所述模拟放大电路。
在该实现方式中，本申请还通过环境光放大电路将多行环境光子像素电路产生的电荷进行汇集和整合，然后输出给增设的模拟放大电路转换成环境光数据，由于本申请中环境光的采集不受限于环境光子像素电路的行数，也即不受限于环境光传感器的尺寸，所以，本申请提供的采集环境光的方式可以适应高刷新率。
第五方面，提供了一种OLED显示面板，所述OLED显示面板包括：衬底基板如以上第一方面或第一方面的任意可能的实现方式中所述的OLED电路。
所述OLED电路中的所述OLED子像素电路包括：发光元件；
所述OLED电路中的所述环境光子像素电路设置在所述衬底基板和所述发光元件之间。
应理解，本申请提供的环境光传感器可以为环境光子像素电路，或者，本申请提供的环境光传感器除了包括环境光子像素电路，还可以包括其他电路或元件，本申请实施例对此不进行任何限制。
本申请提供一种OLED显示面板，由于环境光子像素电路集成于OLED显示面板内，所以，环境光子像素电路在采集外部环境光强度时，将不再受显示屏的光线透过率的影响，由此，可以提高环境光的检测精度。
在第五方面一种可能的实现方式中，所述OLED显示面板中的所述OLED子像素电路还包括：OLED子像素驱动电路，所述OLED子像素驱动电路用于驱动所述发光元件发光；
其中，所述OLED子像素驱动电路和所述环境光子像素电路同层设置。
在该实现方式中，通过同层设置可以减少工艺步骤，提高制备效率。
在第五方面一种可能的实现方式中，所述环境光子像素电路中的所述光电二极管包括：层叠设置的第一电极、光电材料层和第二电极；
其中，所述第一电极位于靠近所述衬底基板的一侧且平行于所述衬底基板。
在第五方面一种可能的实现方式中，所述环境光子像素电路中的所述第二晶体管与所述第一电极电连接，用于传输所述第一电极上的电压。
第六方面，提供了一种显示屏，包括如以上第一方面或第一方面的任意可能的实现方式中所述的OLED显示面板。
第七方面，提供了一种电子设备，其特征在于，包括如第六方面所述的显示屏。
本申请实施例提供一种OLED电路、OLED显示面板、显示屏及电子设备，通过改变环境光传感器设置位置，将环境光传感器集成于显示屏内，使得环境光传感器在采集外部环境光强度时，可以降低显示屏透过率的干扰；此外，本申请提供的环境光传感器包括的环境光子像素电路可以与OLED子像素电路相互配合，通过控制与环境光子像素电路位于同一行或者同一行及相邻多行的OLED子像素电路处于非发光阶段时，环境光子像素电路才进行光电转换，从而可以减少显示屏的像素发光对环境光传感器采集环境光的影响，进而可以达到对外部环境光强度的精确检测，以及适用于高刷新频率的电子设备的目的。
附图说明
图1是本申请实施例提供的一种应用场景的示意图；
图2是本申请实施例提供的一种电子设备的俯视示意图；
图3是本申请实施例提供的第二显示区中子像素的排布示意图；
图4是图3所示的第二显示区沿AA'方向的一种截面示意图；
图5是图3所示的第二显示区沿AA'方向的另一种截面示意图；
图6是本申请实施例提供的第一显示区中子像素的排布示意图；
图7是图6所示的第一显示区沿BB'方向的一种截面示意图；
图8是图6所示的第一显示区沿BB'方向的另一种截面示意图；
图9是本申请实施例提供的一种OLED电路的结构示意图；
图10是本申请实施例提供的一种OLED子像素电路的结构示意图；
图11是本申请实施例提供的一种环境光子像素电路的结构示意图；
图12是本申请实施例提供的另一种环境光子像素电路的结构示意图；
图13是本申请实施例提供的一种环境光子像素电路的驱动时序图；
图14是本申请实施例提供的第一显示区中OLED电路包括的环境光子像素电路和OLED子像素电路的架构示意图；
图15是本申请实施例提供的第一显示区中OLED电路包括的环境光子像素电路、OLED子像素电路以及驱动电路的架构示意图；
图16是本申请实施例提供的一种使能电路的结构示意图；
图17是本申请实施例提供的一种使能同步电路的结构示意图；
图18是本申请实施例提供的另一种使能同步电路的结构示意图；
图19是本申请实施例提供的一种使能电路与使能同步电路的连接结构示意图；
图20是本申请实施例提供的一种扫描电路的结构示意图；
图21是本申请实施例提供的一种环境光放大电路的结构示意图；
图22是本申请实施例提供的另一种环境光放大电路的结构示意图；
图23是本申请实施例提供的一种扫描同步电路的结构示意图；
图24是本申请实施例提供的另一种扫描同步电路的结构示意图；
图25是本申请实施例提供的一种扫描电路与扫描同步电路的连接结构示意图；
图26是图15所示的OLED电路所对应的驱动时序图。
附图标记：
1-显示区；11-第一显示区，12-第二显示区；2-像素；3-子像素；4-第一区；5-第二区；10-衬底基板；20-OLED元件；30-彩色滤光层；31-红色滤光单元；32-绿色滤光单元；33-蓝色滤光单元；60-驱动晶体管；71-阳极；72-有机材料功能层；721-空穴注入层；722-空穴传输层；723-发光材料层；724-电子传输层；725-电子注入层；73-阴极；BM-黑矩阵；80-封装层；90-平坦化层；91-第一平坦化层；92-第二平坦化层；100-电子设备；110-显示屏；111-OLED显示面板；120-环境光传感器；121-光电二极管；1211-第一电极；1212-第二电极；1213-光电材料层；200-OLED电路；210-OLED子像素电路；L-发光元件；220-环境光子像素电路；221-环境光重置子电路；222-光电转换子电路；223-开关控制子电路；230-使能(Emit)电路；240-使能(Emit)同步电路；241-第一反相子电路；242-第二反相子电路；243-使能同步输出子电路；250-扫描(Scan)电路；260-扫描(Scan)同步电路；261-扫描同步反相子电路；262-扫描同步输出子电路；270-环境光放大电路；271-放大重置子电路；272-积分子电路；273-放大输出子电路；280-模拟放大电路；Vdata-数据电压端；VDD-第一电源电压端；VSS-第二电源电压端；VGH-第三电源电压端；VGL-第四电源电压端；S1(N)-第N行第一控制端；S2(N)-第N行第二控制端；S3(N)-第N行第三控制端；E1-放大控制端；Vref-重置控制端；ScanN-第N行扫描端；EmitN-第N行使能端；Out1-一级环境光输出端；D1-光电二极管；Q1-第一节点；Q2-第二节点；Q3-第三节点；In2-二级环境光输入端；Out2-二级环境光输出端；In3-三级环境光输入端；Out3-三级环境光输出端；EmIn1-第一使能输入端；EmIn2-第二使能输入端；EOut-使能输出端；EmOut-使能同步输出端；SOut-扫描输出端；ScIn-扫描同步输入端；ScOut-扫描同步输出端；T21-第一晶体管；T22-第二晶体管；T41-第三晶体管；T42-第四晶体管；T43-第五晶体管；T44-第六晶体管；T45-第七晶体管；T46-第八晶体管；T47-第九晶体管；T61-第十晶体管；T62-第十一 晶体管；T63-第十二晶体管；T64-第十三晶体管；T65-第十四晶体管；T71-第十五晶体管；T72-第十六晶体管；T73-第十七晶体管；C1-第一电容；C2-第二电容；C3-第三电容。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
在本申请实施例的描述中，除非另有说明，“/”表示或的意思，例如，A/B可以表示A或B；本文中的“和/或”仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，在本申请实施例的描述中，“多个”是指两个或多于两个。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
首先，对本申请实施例中的部分用语进行解释说明，以便于本领域技术人员理解。
1、黑矩阵(black matirx，BM)
为保证彩色滤光层的滤光效果，而在彩色滤光层包括的滤光单元之间涂覆不透光的黑色遮光层，以进行遮光，从而避免串色。
2、彩色滤光层(color filter，CF)
彩色滤光层是一种表现颜色的光学滤光片，可以精确选择欲通过的小范围波段光波，而反射其他不希望通过的波段。本申请实施例提供的彩色滤光层用于将白光过滤成不同颜色的光线。
以上是对本申请实施例所涉及的名词的简单介绍，以下不再赘述。
示例性的，图1示出了一种本申请实施例适用的应用场景。
如图1所示，以电子设备为手机为例，在该夜景场景中，路灯发出强烈的光线将附近照射的非常亮，而周围没有灯光的区域则非常黑暗，当用户从黑暗的地方行走至路灯下时，周围环境的光线从弱变强，发生了很大的变化。
在此行走的过程中，用户一直在使用手机打游戏。由于周围环境的光线变化非常强烈，若手机一直保持固定的显示亮度，则有可能在黑暗区域显示的很清楚，用户观看较为舒适；而在路灯下，由于显示亮度相对于路灯亮度差异太大，导致显示的不清楚，影响用户观看体验。
针对上述问题，现有技术中，在电子设备中增设了环境光传感器，以感知周边环境光线的强弱，使得电子设备可根据环境光线的强弱来适应性调节显示屏的亮度。例如，当环境光线较强时可以调高显示亮度，而当环境光线较弱时可以调低显示亮度。如此，可达到满足用户需求的同时降低产品功耗的效果。因此，环境光传感器广泛应用在手机、笔记本、平板电脑等电子设备中。
目前，集成有环境光传感器的电子设备，通常设置一个通孔或是凹槽来放置环境光传感器。随着全面屏的进一步发展，挖孔方案将不再适用，于是，相关技术方案将 环境光传感器放置在显示屏的下方。基于这种屏下设置方式，相应提供的，一种环境光检测方法可以称为“屏下抠图方案”，另一种环境光检测方法可以称为“屏下短积分方案”。
“屏下抠图方案”指的是利用环境光传感器同时检测屏幕外部环境光强度和显示屏中像素发光强度，然后，通过软件算法将显示屏中像素发光强度减去，从而可以得到外部环境光强度。但是，这种方案受限于对显示屏中像素发光强度的检测。当对显示屏中像素发光强度进行的检测不准确时，将会直接影响到外部环境光强度的检测结果。
“屏下短积分方案”指的是显示屏在使能信号的控制下刷新时，显示屏中会有数行像素关闭并滚动刷新，利用该原理，可使环境光传感器在其物理位置的上方所对应的数行像素处于关闭状态时，来对外部环境光强度进行检测。虽然该方案相对于上一种方案，不受限于显示屏中所有像素发光强度的影响，但是，由于为了提高用户的视觉享受，现有显示屏的刷新率越来越高，而在高刷新频率的情况下，环境光传感器上方所对应的显示屏中的数行像素无法全部处于关闭状态，所以，高刷新频率下环境光传感器上方对应的部分还处于发光状态的像素将会对非发光状态的像素产生干扰，进而对检测进行干扰，影响外部环境光强度的检测准确性。也就是说，“屏下短积分方案”也有局限，不适用于具有高刷新频率的电子设备。
示例性的，当环境光传感器对外部环境光强度进行检测时，为了避免环境光传感器上方对应的像素发光所造成的干扰，要求环境光传感器上方对应的像素全部处于关闭状态。例如，环境光传感器的宽度一般为4mm，也就要求环境光传感器上方对应的4mm宽的几行像素处于关闭状态。但在高刷新频率下，不发光的像素宽度远小于4mm，比如可能仅为2mm或3mm，该2mm或3mm范围之外的其他像素还在发光，这样也就无法实现环境光传感器上方对应的像素全部处于关闭状态的目的，进而无法实现对外部环境光强度的准确检测。
由于环境光传感器的灵敏度决定于环境光传感器的感光面积大小，如果为了适应高刷新频率选择使用宽度更小的环境光传感器时，一方面对环境光传感器的器件要求更高，另一方面该环境光传感器采集的信号在传输过程中将会很容易受到干扰，从而影响环境光传感器的灵敏度，进而影响检测的准确性。
总而言之，上述“屏下抠图方案”和“屏下短积分方案”都有各自对应的缺陷，因此，需要一种既能提高检测准确性、又能适用高刷新频率的新的技术方案。
有鉴于此，本申请实施例提供一种OLED电路、OLED显示面板、显示屏及电子设备，通过改变环境光传感器设置位置，将环境光传感器集成于显示屏内，使得环境光传感器在采集外部环境光强度时，可以降低显示屏透过率的干扰；此外，本申请提供的环境光传感器包括的环境光子像素电路可以与OLED子像素电路相互配合，通过控制与环境光子像素电路位于同一行或者同一行及相邻多行的OLED子像素电路处于非发光阶段时，环境光子像素电路才进行光电转换，从而可以减少显示屏的像素发光对环境光传感器采集环境光的影响，进而可以达到对外部环境光强度的精确检测，以及适用于高刷新频率的电子设备的目的。
需要说明的是，本申请提供的环境光传感器可以为环境光子像素电路，或者，本 申请实施例提供的环境光传感器除了包括环境光子像素电路之外，还可以包括其他电路或元件，本申请实施例对此不进行任何限制。
下面先结合附图，对本申请实施例提供的相关设备及电路进行详细介绍。
参考图2，图2示出了本申请实施例适用的电子设备100的俯视示意图。
应理解，本申请实施例对电子设备100的类型不做具体限定，在一些实施例中，本申请实施例中的电子设备100可以是智能手机、可穿戴设备(例如智能手环、智能手表、耳机等)、平板电脑、膝上型计算机(laptop)、手持计算机、笔记本电脑、超级移动个人计算机(ultra-mobile personal computer，UMPC)、蜂窝电话、个人数字助理(personal digital assistant，PDA)、增强现实(Augmented reality，AR)\虚拟现实(virtual reality，VR)设备等IOT(internet of things，物联网)设备，还可以是电视、大屏、打印机、投影仪等设备。
如图2所示的，以电子设备100为手机为例，电子设备100包括显示屏110。
显示屏110可以用于显示图像或视频，显示屏110包括显示面板。显示面板可以采用有机发光二极管(organic light-emitting diode，OLED)、有源矩阵有机发光二极管(active-matrix organic light-emitting diode，AMOLED)、微型OLED(Micro OLED)等。在一些实施例中，电子设备100可以包括1个或N个显示屏110，N为大于1的正整数。下文以电子设备100包括1个显示屏110，且显示屏110包括OLED显示面板111为例进行说明。
其中，OLED显示面板111包括环境光传感器120。环境光传感器120用于感知环境光亮度。电子设备100可以根据感知的环境光亮度自适应调整显示屏110的亮度。环境光传感器120可用于拍照时自动调节白平衡。当电子设备100还包括接近光传感器时，环境光传感器120还可以与接近光传感器配合，检测电子设备100是否在口袋里，以防误触。
应理解，在本申请实施例中，由于环境光传感器120集成于OLED显示面板111内，所以，环境光传感器120在采集外部环境光强度时，将不再受显示屏110的光线透过率的影响，由此，可以提高环境光的检测精度。
如图2所示的，从俯视角度看，环境光传感器120可以设定在OLED显示面板111的显示区1中的局部位置处。其中，显示区1指的是OLED显示面板111用于显示图像或视频的区域。比如，环境光传感器120对应的俯视形状为矩形，该矩形位于OLED显示面板111的显示区1中的局部位置处。当然，环境光传感器120也可以设定在OLED显示面板111的整个显示区1中，也即，环境光传感器120的俯视尺寸与OLED显示面板111的显示区1的尺寸相同。
针对环境光传感器120的俯视形状、尺寸，以及设定位置，均可以根据需要进行设置和修改，只需满足灵敏度的需求即可，本申请实施例对此不进行任何限制。
需要说明的是，若环境光传感器120的尺寸较小，为了避免用户在使用电子设备100时，手部对环境光传感器120造成触碰和遮挡，环境光传感器120可以设定在用户手部不容易触碰和遮挡的位置。以图2为例，可以将环境光传感器120设定在OLED显示面板111偏上的位置处。此处，可以将包括环境光传感器120的显示区1称为第 一显示区11，将其余显示区1称为第二显示区12，第一显示区11和第二显示区12对应的显示面板内部的结构不同。
在上述基础上，电子设备100还可以包括处理器，外部存储器接口，内部存储器，通用串行总线接口，充电管理模块，电源管理模块，电池等。
需要说明的是，上述结构并不构成对电子设备100的具体限定。在本申请另一些实施例中，电子设备100可以包括比上述所示的部件更多或更少的部件，或者，电子设备100可以包括上述所示的部件中某些部件的组合，或者，电子设备100可以包括上述所示的部件中某些部件的子部件。上述所示的部件可以以硬件、软件、或软件和硬件的组合实现。
参考图3至图5，图3为本申请实施例提供的第二显示区12中的子像素3的排布示意图，图4是图3所示的第二显示区12沿AA'方向的一种截面示意图，图5是图3所示的第二显示区12沿AA'方向的另一种截面示意图。
可选地，作为一种可实现的方式，如图3所示的，OLED显示面板111中的每个像素2可以包括三个子像素3，例如，分别为红色子像素R、绿色子像素G和蓝色子像素B。红色子像素R用于发射红光，绿色子像素G用于发射绿光，蓝色子像素B用于发射蓝光。
其中，假设第一方向x为行方向，第二方向y为列方向，第一方向x和第二方向y相互垂直。
OLED显示面板111中的子像素3可以以带状方式进行排列。例如，沿第一方向x，红色子像素R、绿色子像素G和蓝色子像素B按顺序依次排布，而沿第二方向y的子像素3则均为同一颜色。
可选地，作为一种可实现的方式，如图4所示的，沿厚度方向，OLED显示面板111可以包括衬底基板10，以及设置于衬底基板10一侧的OLED元件20，OLED显示面板111还包括设置于OLED元件20出光侧的彩色滤光层30。
其中，每个子像素3对应一个OLED元件20，该多个OLED元件20可用于分别发红光、绿光和蓝光，或者该OLED元件20全部用于发白光，彩色滤光层30用于将白光过滤成不同颜色的光线。
例如，彩色滤光层30包括红色滤光单元31、绿色滤光单元32和蓝色滤光单元33，红色滤光单元31可以将白光过滤成红色，绿色滤光单元32可以将白光过滤成绿色，蓝色滤光单元33可以将白光过滤成蓝色，由此，在不同子像素3中铺设不同颜色的滤光单元，可以形成红色子像素R、绿色子像素G和蓝色子像素B。或者，将发红光的OLED元件20与红色滤光单元31对应，发绿光的OLED元件20与绿色滤光单元32对应，发蓝光的OLED元件20与蓝色滤光单元33对应，以形成红色子像素R、绿色子像素G和蓝色子像素B。
应理解，红色滤光单元31、绿色滤光单元32和蓝色滤光单元33均为带通滤光片。
可选地，作为一种可实现的方式，如图5所示，OLED元件20包括层叠设置的阳极71和阴极73，以及设置在阳极71和阴极73之间的有机材料功能层72。该有机材料功能层72可以包括发光材料层723，该有机材料功能层72还可以包括设置在阳极71和发光材料层723之间的空穴传输层(hole transport layer，HTL)722，以及设置在 阴极73和发光材料层723之间的电子传输层(electron transport layer，ETL)724。
为了能够提高电子和空穴注入发光材料层723的效率，有机材料功能层72还可以包括设置于阳极71和空穴传输层722之间的空穴注入层(hole injection Layer，HIL)721，以及设置于阴极73和电子传输层724之间的电子注入层(electron inject Layer，EIL)725。
其中，阳极71位于阴极73和衬底基板10之间，不同子像素3所包括的阴极73可以整层铺设。
上述OLED元件20的发光原理为：通过阳极71和阴极73连接的电路，向阳极71和阴极73施加电压，利用阳极71注入空穴，阴极73注入电子，所形成的电子和空穴在发光材料层723相遇而产生激子，从而激发发光材料层723发光。
其中，根据OLED元件20的发光类型，阳极71的材料例如可以选自：银(Ag)、氧化铟锡(ITO)或者镍铬合金(Ni：Cr合金)等；发光材料层723的材料可以为三(8-羟基喹啉)铝(Alq3)等，通过三基色多层膜发光组合发出白光。阴极73的材料可以包括：CuPc(钛菁铜)或镁银合金(Mg：Ag合金)等。
如图5所示的，在OLED元件20靠近衬底基板10的一侧，OLED显示面板111还包括OLED子像素驱动电路，该OLED子像素驱动电路可以包括1个或多个驱动晶体管(thin film transistor，TFT)60，驱动晶体管60用于向阳极71提供电压。
可选地，如图5所示的，为了避免子像素3之间串色，在相邻两个滤光单元之间还会制作黑矩阵。此外，在阴极73和彩色滤光层30之间还可以铺设封装层80进行封装，以及，在驱动晶体管60和阳极71之间还可以铺设平坦化层90进行平坦化。
需要说明的是，如图3至图5所示的，OLED显示面板111中的每个像素2包括三个子像素3仅为一种示例，每个像素2也可以包括四个子像素3，例如，分别为红色子像素R、绿色子像素G、蓝色子像素B和白色子像素W。此时，白色子像素W中不包含滤光单元，白色子像素W可直接将OLED元件20生成的白光用于出射。
应理解，OLED显示面板111中的每个像素2包括的子像素3的个数、对应颜色，以及排布方式，具体可以根据需要进行设置，例如，针对排布方式来说，OLED显示面板111中的子像素3也可以以delta方式进行排列，本申请实施例对此不进行任何限制。
在上述基础上，以目前业界的工艺能力所生产的像素中，实际用于发光的面积只占到整个像素的很小一部分(例如5％左右)，其余大部分面积都未利用到，对此，在本申请实施例提供的OLED显示面板111的第一显示区11中，可以将环境光传感器120集成于子像素3未发光的面积中，利用未被阳极71遮挡的区域来检测外部环境光的强度。
参考图6至图8，图6示出了本申请实施例提供的第一显示区11中子像素3的排布示意图，图7示出了图6所示的第一显示区11在BB'方向的一种截面示意图，图8示出了图6所示的第一显示区11在BB'方向的另一种截面示意图。
如图6所示的，相对于第二显示区12来说，第一显示区11中的子像素3仅将有效发光区域(如图6中所示的第一区4)，作为该子像素3对应的实际显示区域，而将子像素3中除有效发光区域之外的区域，如图6中所示的第二区5，作为环境光传 感器120对应的设置区域。图6仅为一种示例，第一区4和第二区5的尺寸可以根据实际结构进行划分，本申请实施例对此不进行任何限制。
需要说明的是，将环境光传感器120集成于OLED显示面板111中时，环境光传感器120与OLED元件20可以共用彩色滤光层30，由此，如图6所示的，当OLED显示面板111中的每个像素2包括红色子像素R、绿色子像素G和蓝色子像素B时，设置在红色子像素R的第二区5中的环境光传感器120在采集环境光时，可以利用红色滤光单元31对应采集红色通道信号，同理，设置在绿色子像素G的第二区5中的环境光传感器120在采集环境光时，可以利用绿色滤光单元32对应采集绿色通道信号，设置在蓝色子像素B的第二区5中的环境光传感器120在采集环境光时，可以利用蓝色滤光单元33对应采集蓝色通道信号。
此外，当OLED显示面板111中的每个像素2包括红色子像素R、绿色子像素G、蓝色子像素B和白色子像素W时，设置在红色子像素R的第二区5中的环境光传感器120在采集环境光时，可以利用红色滤光单元31对应采集红色通道信号，设置在绿色子像素G的第二区5中的环境光传感器120在采集环境光时，可以利用绿色滤光单元32对应采集绿色通道信号，设置在蓝色子像素B的第二区5中的环境光传感器120在采集环境光时，可以利用蓝色滤光单元33对应采集蓝色通道信号，设置在白色子像素W的第二区5中的环境光传感器120将对应采集白色通道信号。换句话说，环境光传感器120采用的通道颜色与OLED显示面板111用于显示的通道颜色相同。
可选地，如图7所示的，沿厚度方向，相对于图4，位于第一显示区11的OLED显示面板111还包括设置于衬底基板10和OLED元件20之间的环境光传感器120。除此之外，其他结构与图4中的描述相同，在此不再赘述。
可选地，如图8所示的，环境光传感器120可以包括光电二极管121和第二晶体管T22。其中，光电二极管121包括平行于衬底基板10且层叠设置的第一电极1211、光电材料层1213和第二电极1212，第一电极1211位于靠近衬底基板10的一侧。第二晶体管T22与第一电极1211电连接，用于传输第一电极1211上的电压。
可选地，如图8所示的，驱动晶体管60和第二晶体管T22同层设置。
上述环境光传感器120的工作原理为：外部环境光对光电二极管121进行照射，光电材料层1213进行光电转换，从而使得第一电极1211和第二电极1212上产生电压，第二晶体管T22以及其他电路再将第一电极1211和第二电极1212的电压传输并采集。
需要说明的是，由于环境光入射到环境光传感器120上时，先入射到第二电极1212上，再入射到第一电极1211上，所以为了不影响入射到第一电极1211上的光强，第二电极应为透明材质，而为了增强对环境光的检测，以及避免光强对第一电极1211下的器件进行影响，第一电极1211需为不透明且高反射率的金属，例如，第一电极1211的材料可以为钼(Mo)。光电材料层1213的材料可以为非晶硅(a-Si)，锑化镉(CdTe)，铜铟镓锡(CIGS)，有机光电材料，或者其它类光电材料。所选光电材料要求在器件形成之后，在某一温度阈值以下温度(例如在250℃以下温度)不会产生太大光电性能衰退。
第二电极1212为金属氧化物透明导电薄膜，例如，第二电极1212的材料可以为氧化铟锡(ITO)或氧化铟锌(IZO)。此外，还可以通过化学气相沉积(chemical vapor  deposition，CVD)或物理气相沉积(physical vapor deposition，PVD)等工艺对光电二极管121进行封装。
如图8所示的，在OLED子像素驱动电路和第一电极1211之间，可以设置第一平坦化层91以进行平坦，和/或，在第二电极1212和OLED元件20之间，可以设置第二平坦化层92以进行平坦。
需要说明的是，图8所示的结构并不构成对环境光传感器120集成于OLED显示面板111中的结构的具体限定。在本申请另一些实施例中，OLED显示面板111可以包括比图8所示的部件更多或更少的部件，或者，电子设备100可以包括图8所示的部件中某些部件的组合，或者，OLED显示面板111可以包括图8所示的部件中某些部件的子部件。
上述图2至图8对集成有环境光传感器120的OLED显示面板111、显示屏110和电子设备100进行了详细介绍，下面对OLED显示面板111中设置的相关电路进行详细介绍。
参考图9，图9是本申请实施例提供的一种OLED电路200的结构示意图。
在OLED显示面板111上，显示区1包括图3所示的未集成环境光传感器120的第二显示区12，还包括图6所示的集成有环境光传感器120的第一显示区11。当然，OLED显示面板111还包括非显示区，非显示区即除显示区1之外的剩余区域，非显示区可用于设置相关电路，驱动位于显示区1的电路，以实现显示和环境光检测。
如图9所示的，第二显示区12包括多个呈阵列排布的子像素3。每个子像素3的第一区4对应设置一个OLED子像素电路210，第二区5对应设置一个环境光子像素电路220。
第二显示区12还包括：多条数据信号线、多条第一电源电压线、多条第二电源电压线、多条扫描信号线、多条使能信号线、多条控制信号线，以及多条检测信号输出线。
同一行子像素3对应的各OLED子像素电路210与同一条扫描信号线、同一条使能信号线电连接，同一行子像素3对应的各环境光子像素电路220与同一条控制信号线电连接，而且，同一行子像素3对应的各环境光子像素电路220可以电连接多条控制信号线。其中，该多条扫描信号线用于分别为每行OLED子像素电路210提供扫描信号，该多条使能信号线用于分别为每行OLED子像素提供使能信号，该多条控制信号线用于分别为每行环境光子像素电路220提供控制信号，而连接同一行环境光子像素电路220的不同控制信号线，用于为该行环境光子像素电路220提供不同的控制信号，以控制环境光子像素电路220处于不同的工作阶段。例如，同一行子像素3对应的各环境光子像素电路220与第一控制信号线电连接，同时各环境光子像素电路220还与第三控制信号线电连接，第一控制信号线用于为该行环境光子像素电路220提供第一控制信号，第三控制信号线用于为该行环境光子像素电路220提供第三控制信号。
此外，同一行中对应同种颜色的环境光子像素电路220与同一条检测信号线电连接，该多条检测信号线用于分别将每行环境光子像素电路220中同种颜色的环境光子像素电路220产生的检测信号进行汇集和传输。
比如，如图9所示的，环境光子像素电路220包括分别对应三基色(红色、绿色和蓝色)的环境光子像素电路220，基于此，可以将同一行所有对应红色的环境光子像素电路220与一条红色检测信号线电连接，所有对应绿色的环境光子像素电路220与一条绿色检测信号线电连接，所有对应蓝色的环境光子像素电路220与一条蓝色检测信号线电连接，红色检测信号线将对应红色的环境光子像素电路220产生的检测信号进行汇集和传输，绿色检测信号线将对应绿色环境光子像素电路220产生的检测信号进行汇集和传输，蓝色检测信号线将对应蓝色环境光子像素电路220产生的检测信号进行汇集和传输。
同一列子像素3对应的各OLED子像素电路210与同一条数据信号线、同一条第一电源电压信号线、同一条第二电源电压信号线电连接。该数据信号线用于为对应列的OLED子像素电路210提供数据信号，该多条第一电源电压信号用于分别为每列OLED子像素电路210提供第一电源电压，该多条第二电源电压信号线用于分别为每列OLED子像素电路210提供第二电源电压。
如图9所示的，在OLED显示面板111的非显示区中，OLED电路200还包括扫描(Scan)电路250、扫描同步电路260、使能(Emit)电路以及使能同步电路240。
其中，扫描电路250用于为扫描信号线提供扫描信号；使能电路230用于为使能信号线提供使能信号；扫描电路250还用于为扫描同步电路260提供扫描信号，扫描同步电路260用于根据扫描电路250提供的扫描信号以及放大控制端E1提供的放大控制信号，为第二显示区12中的环境光子像素电路220的第一控制端S1提供第一控制信号；使能同步电路240例如可以用于在上下两行使能电路230提供的使能信号的控制下，为第二显示区12中的环境光子像素电路220的第三控制端S3提供第三控制信号。
如图9所示的，在OLED显示面板111的非显示区中，OLED电路200还包括环境光放大电路270和模拟放大电路280。其中，环境光放大电路270与多条检测信号线进行连接，用于将检测信号线上汇集的每行环境光子像素电路220产生的检测信号进行放大。
应理解，由于环境光子像素电路220对应的滤光片的颜色不同，因此，可以将每行中对应红色的环境光子像素电路220所连接的红色检测信号线均与环境光放大电路270(F1)电连接，利用环境光放大电路270(F1)将多行对应红色的环境光子像素电路220产生的检测信号进行积分和放大；同理，将每行中对应绿色的环境光子像素电路220所连接的绿色检测信号线均与环境光放大电路270(F2)电连接，利用环境光放大电路270(F2)将多行对应绿色的环境光子像素电路220产生的检测信号进行积分和放大；以及将每行中对应蓝色的环境光子像素电路220所连接的蓝色检测信号线均与环境光放大电路270(F3)电连接，利用环境光放大电路270(F3)将多行对应绿色的环境光子像素电路220产生的检测信号进行积分和放大。
在此基础上，模拟放大电路280用于将环境光放大电路270(F1)、环境光放大电路270(F2)、环境光放大电路270(F3)放大后的电压进一步放大和整合，从而可以转化为环境光数据，实现对环境光的检测。
下面对本申请实施例提供的OLED电路200中包括的各部分电路，以及相应工作过程分别进行介绍。
参考图10，图10为本申请实施例提供的一种OLED子像素电路210的结构示意图。该OLED子像素电路210例如可以为7T1C的子像素电路。
其中，如图10所示的，晶体管T16用于控制重置控制端Vref提供的电压传输至晶体管T13的栅极，晶体管T17用于控制重置控制端Vref提供的电压传输至发光元件L；晶体管T11用于控制第一电源电压端VDD提供的电压传输至晶体管T13的第一端，晶体管T15用于控制数据电压端Vdata提供的电压的传输，晶体管T14用于控制晶体管T13的栅极和第二端的通断，晶体管T13用于确定OLED子像素电路210的驱动电流，晶体管T12用于将来自晶体管T13的驱动电流传输至发光元件L，发光元件L用于响应驱动电流而发光显示。
应理解，该发光元件L即为前述图5和图8中所示的OLED元件20以及其上下连接的阳极71和阴极73。OLED子像素电路210中除了发光元件L之外的局部电路，即可以指示前述所述的OLED子像素驱动电路。
当然，OLED子像素电路210也可以为2T1C、6T1C等其他子像素电路，本申请实施例对此不进行任何限制。
应理解，通常OLED子像素电路210所电连接的第一电源电压端VDD为高电平端，可以输出恒定的高电压；OLED子像素电路210所电连接的第二电源电压端VSS为低电平端，可以输出恒定的低电压。此处的“高”、“低”仅代表输入的电压之间的相对大小关系。当然，第二电源电压端VSS也可接地。
参考图11，图11为本申请实施例提供的一种环境光子像素电路220的结构示意图。图12为本申请实施例提供的另一种环境光子像素电路220的结构示意图。
如图11所示，该环境光子像素电路220可以包括：环境光重置子电路221、光电转换子电路222和开关控制子电路223。环境光重置子电路221、光电转换子电路222和开关控制子电路223均与第一节点Q1电连接。
其中，环境光重置子电路221还与第一控制端S1和重置控制端Vref电连接；环境光重置子电路221用于在来自第一控制端S1的电压的控制下，使重置控制端Vref和第一节点连通，将重置控制端Vref提供的电压输入至第一节点Q1，对第一节点Q1处的电压进行重置。
光电转换子电路222还与接地端GND电连接；光电转换子电路222用于将环境光转换为电压，并提供给第一节点Q1。
开关控制子电路223还与第三控制端S3和一级环境光输出端Out1电连接；开关控制子电路223用于在OLED子像素电路210的非发光阶段，在第三控制端S3的控制下，使第一节点Q1和一级环境光输出端Out1连通，并由一级环境光输出端Out1将第一节点处的电压输出。
需要说明的是，针对位于不同行的环境光子像素电路220来说，第一控制端S1连接的第一控制信号线不同，而不同的第一控制信号线所提供的第一控制信号的时序不同，所以，不同行的环境光子像素电路220对应的第一控制信号的时序不同。
同样的，针对位于不同行的环境光子像素电路220来说，第三控制端S3连接的第 三控制信号线不同，而不同的第三控制信号线所提供的第三控制信号的时序不同，所以，不同行的环境光子像素电路220对应的第三控制信号的时序不同。
若为了避免与环境光子像素电路220属于同一行的OLED子像素电路210的发光干扰，第三控制端S3可以在该环境光子像素电路220对应的同一行OLED子像素电路210的非发光阶段提供第三控制信号。而在此基础上，由于相邻上一行或下一行OLED子像素电路210对本行的环境光子像素电路220也存在发光干扰，因此，本行环境光子像素电路220对应的第三控制端S3也可以在上一行OLED子像素电路210和本行OLED子像素电路210均处于非发光阶段，或者，本行OLED子像素电路210和下一行OLED子像素电路210均处于非发光阶段，或者，在上一行OLED子像素电路210、本行OLED子像素电路210和下一行OLED子像素电路210均处于非发光阶段时提供第三控制信号。
当然，为了避免更多行OLED子像素电路210的发光干扰，还可以根据需要设置相邻多行OLED子像素电路210处于非发光阶段时，第三控制端S3对本行环境光子像素电路220提供第三控制信号，该具体行数可以根据需要进行设置和修改，本申请实施例对此不进行任何限制。
基于上述，本申请实施例提供一种环境光子像素电路，在OLED子像素电路的发光阶段，第一控制端控制环境光重置子电路导通，使得重置控制端提供的电压输入至第一节点Q1，消除残余的电压；然后，在OLED子像素电路的非发光阶段，第三控制端S3则可以控制开关控制子电路导通，使得光电转换子电路对环境光进行采集和转换后的电压可以通过第一节点，经开关控制子电路输出。由此，通过将环境光子像素电路与OLED子像素电路的工作过程相配合，可以避免OLED子像素电路发光阶段产生的光强对环境光子像素电路的影响，使环境光子像素电路仅在同行和/或相邻多行OLED子像素电路非发光阶段时采集环境光，从而可以提高采集的准确度。
可选地，作为一种可实现的方式，如图12所示，环境光重置子电路221可以包括第一晶体管T21；第一晶体管T21的栅极与第一控制端S1电连接，第一晶体管T21的第一极与重置控制端Vref电连接，第一晶体管T21的第二极与第一节点Q1电连接。
此外，环境光重置子电路221还可以包括与第一晶体管T21并联的多个晶体管，上述仅是对环境光重置子电路221的举例说明，其他与环境光重置子电路221功能相同的结构在此不再赘述，但也应当属于本申请的保护范围。
可选地，作为一种可实现的方式，如图12所示，光电转换子电路222可以包括光电二极管D1和第一电容C1，光电二极管D1的第一端与第一节点Q1电连接，光电二极管D1的第二端与接地端GND电连接。第一电容C1的第一端与第一节点Q1电连接，第一电容C1的第二端与接地端GND电连接。
其中，光电二极管D1用于在环境光的光照下产生电荷，形成电流，以在第一节点Q1和接地端GND之间形成电压差，实现光电转换。第一电容C1为光电二极管D1自身产生的电容。
应理解，当光电转换子电路222包括第一电容C1时，环境光重置子电路221在来自第一控制端S1的电压的控制下，从重置控制端Vref输入到第一节点Q1处的电压，可以将第一电容C1第一端的残余电压进行消除，对第一电容C1实现重置。
此外，光电转换子电路222还可以包括与第一电容C1并联的多个电容，上述仅是对光电转换子电路222的举例说明，其他与光电转换子电路222功能相同的结构在此不再赘述，但也应当属于本申请的保护范围。
可选地，作为一种可实现的方式，如图12所示，开关控制子电路223可以包括第二晶体管T22，第二晶体管T22的栅极与第三控制端S3电连接，第二晶体管T22的第一极与第一节点Q1电连接，第二晶体管T22的第二极与一级环境光输出端Out1电连接。
此外，开关控制子电路223还可以包括与第二晶体管T22并联的多个晶体管，上述仅是对开关控制子电路223的举例说明，其他与开关控制子电路223功能相同的结构在此不再赘述，但也应当属于本申请的保护范围。
在一些实施例中，第一晶体管T21和第二晶体管T22的类型相同，均为N型或者P型；或者，第一晶体管T21和第二晶体管T22的类型也可以不同，其中一个晶体管为N型，另一个晶体管为P型，本申请实施例对此不进行任何限制。
在一些实施例中，第一晶体管T21和第二晶体管T22可以第一极是漏极、第二极是源极；或者，第一极是源极、第二极是漏极。根据晶体管导电方式的不同，第一晶体管T21和第二晶体管T22可以是增强型晶体管，也可以是耗尽型晶体管，具体可以根据需要进行选择，本申请实施例对此不进行任何限制。
基于上述对环境光子像素电路220的描述，下面结合图13对环境光子像素电路220的具体工作过程进行说明。示例性的，第一晶体管T21和第二晶体管T22均为P型。
参考图13，图13为本申请实施例提供的环境光子像素电路220的驱动时序图。
如图13所示，在OLED子像素电路210的发光阶段，环境光子像素电路220的工作过程对应为重置阶段P1；在OLED子像素电路210的非发光阶段，环境光子像素电路220的工作过程对应为输出阶段P2。具体为：
应理解，该OLED子像素电路210可以是环境光子像素电路220属于同一行的OLED子像素电路210，也可以相邻行，或者是相邻多行的OLED子像素电路210，具体可以根据需要进行设置，本申请实施例对此不进行任何限制。
重置阶段P1，第一控制端S1输入低电平电压，第三控制端S3输入高电平电压，由此，第一晶体管T21导通，第二晶体管T22截止。由于第一晶体管T21的导通，使得重置控制端Vref提供的电压可以输入至第一节点Q1处，从而对连接第一节点Q1的光电二极管D1的第一端上的电压，连接第一节点Q1的第一电容C1的第一端上的电压进行重置，消除上一次采集时残余的电压的影响。
输出阶段P2，第一控制端S1输入高电平电压，第三控制端S3输入低电平电压，由此，第一晶体管T21截止，第二晶体管T22导通。由于第二晶体管T22的导通，使得一级环境光输出端Out1可以输出光电二极管D1光电转换后产生的电压。
本申请实施例提供一种环境光子像素电路的驱动方法，在OLED子像素电路的发光阶段，第一控制端控制环境光重置子电路导通，使得重置控制端提供的电压输入至第一节点Q1，消除残余的电压；然后，在OLED子像素电路的非发光阶段，第三控制端则可以控制开关控制子电路导通，使得光电转换子电路对环境光进行采集和转换后 的电压可以通过第一节点，经开关控制子电路输出。由此，通过将环境光子像素电路与OLED子像素电路的工作过程相配合，可以避免OLED子像素电路发光阶段产生的光强对环境光子像素电路的影响，使环境光子像素电路仅在OLED子像素电路非发光阶段采集环境光，从而可以提高采集的准确度。
在与环境光子像素电路220属于同一行的OLED子像素电路210处于非发光阶段时，利用环境光子像素电路220对环境光进行采集和转换，虽然可以提升一些检测的准确性，但是，其他行的OLED子像素电路210如果还在发光，相互之间还是会造成一定影响，为了避免这种影响，本申请提出在与环境光子像素电路220属于同一行、以及相邻一行或多行的OLED子像素电路210均处于非发光阶段时，才利用本行环境光子像素电路220进行采集和转换，以此来降低其他行OLED子像素电路210发光光强对本行环境光子像素电路220的干扰。
此处，由于上一行、下一行OLED子像素电路210与本行环境光子像素电路220的距离最近，影响最大，所以为了提高检测环境光的准确度，主要需考虑到要能避免上一行、下一行OLED子像素电路210发光对本行环境光子像素电路220的影响，由此，本申请提供以下一种OLED电路，以降低上下相邻两行OLED子像素电路210的发光对本行环境光子像素电路220采集环境光的影响为例进行说明。
示例性的，以一行使能信号驱动一行OLED子像素电路210为例。OLED显示面板111在显示过程中是逐行进行刷新的，即有数行像素处于非发光阶段(暗态)，并且逐行向下移动。比如在进行刷新的第i阶段中，第6行、第7行、第8行和第9行OLED子像素电路210处于非发光阶段，而第10行、第11行等OLED子像素电路210处于发光阶段；在第i+1阶段中，第7行、第8行、第9行和第10行OLED子像素电路210处于非发光阶段，第11行OLED子像素电路210还是处于发光阶段；在第i+2阶段中，第8行、第9行、第10行和第11行OLED子像素电路210处于非发光阶段；而在第i+3阶段中，第10行、第11行OLED子像素电路210处于非发光阶段，而第9行OLED子像素电路210处于发光阶段。其他阶段依次类推，在此不再赘述。
以第10行OLED子像素电路210属于同一行的环境光子像素电路220为第一显示区11中第2行环境光子像素电路220为例。在上述第i阶段，第10行OLED子像素电路210还处于发光阶段，所以对应的第2行环境光子像素电路220不能用于采集环境光；等到第i+1阶段时，虽然第9行和第10行OLED子像素电路210都已经处于非发光阶段，但是第11行OLED子像素电路210还是在发光阶段，此时，第11行OLED子像素电路210还会对第10行OLED子像素电路210对应的第2行环境光子像素电路220造成影响，所以，第2行环境光子像素电路220还是不能采集环境光。
在第i+2阶段，第9行、第10行和第11行OLED子像素电路210均处于非发光阶段，对第10行OLED子像素电路210对应的第2行环境光子像素电路220的影响最小，因此在该两个阶段，可以打开第2行环境光子像素电路220，进行环境光的采集和转换。而等到第i+3阶段，第9行OLED子像素电路210重新处于发光阶段，对第10行OLED子像素电路210对应的第2行环境光子像素电路220造成影响时，则关闭第2行环境光子像素电路220。
结合上述例子可知，决定第10行OLED子像素电路对应的第2行环境光子像素电路220打开的条件是第11行OLED子像素电路210处于非发光阶段；决定第10行OLED子像素电路210对应的第2行环境光子像素电路220关闭的条件是第9行OLED子像素电路210处于发光阶段。换句话说，当第9行至第11行OLED子像素电路210均处于非发光阶段时，第10行OLED子像素电路对应的第2行环境光子像素电路220才打开，否则关闭。
针对其他行环境光子像素电路来说，为了消除各自上下相邻两行环境光子像素电路220对自身采集环境光的干扰，其他行环境光子像素电路220对应的控制过程与上述类似，在此不再赘述。
下面结合驱动电路图和时序图，对上述例子进行详细说明。
参考图14和图15，图14为本申请实施例提供的第一显示区11中OLED电路200包括的环境光子像素电路220和OLED子像素电路210的架构示意图。图15为本申请实施例提供的第一显示区11中OLED电路200包括的环境光子像素电路220、OLED子像素电路210以及驱动电路的架构示意图。
如图15所示的，在对第10行OLED子像素电路210进行驱动时，需要提供扫描信号和使能信号，由此可以利用第10行扫描电路250(Scan10电路)来对第10行OLED子像素电路210中的扫描端Scan10提供扫描信号，以及利用第10行使能电路230
(Emit10电路)来对第10行OLED子像素电路210中的使能端Emit10提供使能信号。
其中，第10行OLED子像素电路210的具体结构可以如图10所示，在此不再赘述。
如图14和图15所示，在对第10行OLED子像素电路210对应的第2行环境光子像素电路220进行驱动时，还需要配合第9行OLED子像素电路210和第11行OLED子像素电路210的工作状态，当两者均处于非发光阶段时，第2行环境光子像素电路220才进行环境光的采集。由此，可以利用第10行使能同步电路240(Emit10同步电路)来对第9行使能电路230(Emit9电路)和第11行使能电路230(Emit11电路)进行同步。
当第9行使能电路230和第11使能电路230分别提供的使能信号，使第9行OLED子像素电路210和第11行OLED子像素电路210均处于非发光阶段时，第10行使能同步电路240为第2行环境光子像素电路220的第三控制端S3(10)提供第三控制信号，控制第2行环境光子像素电路220进行环境光的采集和输出。其中，第9行OLED子像素电路210和第11行OLED子像素电路210均处于非发光阶段时，第10行OLED子像素电路210也处于非发光阶段。
应理解，第9行使能电路230还用于为第9行OLED子像素电路210的使能端Emit9提供使能信号，第11行使能电路230还用于为第11行OLED子像素电路210的使能端Emit11提供使能信号。
其中，上述第2行环境光子像素电路220的具体结构可以如图11所示，在此不再赘述。
本申请实施例提供了一种OLED电路，通过增设使能同步电路，从而可以将上下相邻两行使能电路提供的使能信号进行复用，以在上下相邻两行使能电路控制各自对 应的OLED子像素电路处于非发光阶段的同时，可以共同控制使能同步电路，进而通过使能同步电路控制本行的环境光子像素电路进行环境光的采集和输出。
参考图16和图17，图16为本申请实施例提供的一种使能电路230的结构示意图，图17为本申请实施例提供的一种使能同步电路240的结构示意图，图18是本申请实施例提供的另一种使能同步电路240的结构示意图，图19是本申请实施例提供的一种使能电路与使能同步电路的连接结构示意图。
在本申请实施例中，以每行使能电路230结构均相同，每行使能同步电路240结构均相同为例进行说明。当然，也可以不相同，本申请实施例对此不进行任何限制。
其中，使能电路230为相关技术中已有结构，在此不再赘述。
下面对使能同步电路240进行详细介绍。
如图17所示的，使能同步电路240包括：第一反相子电路241、第二反相子电路242和使能同步输出子电路243。
第一反相子电路241与第一使能输入端EmIn1、使能同步输出子电路243电连接，第一反相子电路241用于在来自第一使能输入端EmIn1的第一使能信号的控制下，将与第一使能信号反相的第一反相信号提供给使能同步输出子电路243。
第二反相子电路242与第二使能输入端EmIn2、使能同步输出子电路243电连接，第二反相子电路242用于在来自第二使能输入端EmIn2的第二使能信号的控制下，将与第二使能信号反相的第二反相信号提供给使能同步输出子电路243。
使能同步输出子电路243还与第三电源电压端VGH、第四电源电压端VGL、使能同步输出端EmOut电连接，使能同步输出子电路243用于在第一反相信号和第二反相信号的控制下，将第三电源电压端VGH提供的第三电压或第四电源电压端VGL提供的第四电压传输给使能同步输出端EmOut输出。
其中，反相指的是将高电平电压变成低电平电压，或者将低电平电压变成高电平电压。
应理解，通常第三电源电压端VGH提供的第三电压为高电平，第四电源电压端VGL提供的第四电压为低电平，例如，第三电压为8V，第四电压为-7V，电压的大小具体可以根据需要进行设置，本申请实施例对此不进行任何限制。
可选地，作为一种可实现方式，使能同步输出子电路243用于在第一反相信号和第二反相信号均为低电平电压时，将第四电源电压端VGL提供的第四电压传输给使能同步输出端EmOut输出，否则，将第三电源电压端VGH提供的第三电压提供使能同步输出端EmOut输出。
应理解，第一反相信号和第二反相信号均为低电平电压时，说明第一使能信号和第二使能信号均为高电平电压。
如图19所示的，针对第10行OLED子像素电路210对应的第2行环境光子像素电路220，在第9行和第11行OLED子像素电路210均处于非发光阶段时才打开，否则关闭的控制方式，可以将第10行使能同步电路240的第一使能输入端EmIn1与第9行OLED子像素电路210对应的第9行使能电路230的使能输出端EOut电连接，第 10行使能同步电路240的第二使能输入端EmIn2与第11行OLED子像素电路210对应的第10行使能电路230的使能输出端EOut电连接，而第10行使能同步电路240的使能同步输出端EmOut则与第2行环境光子像素电路220的第三控制端S3(10)电连接。
由此，第9行使能电路230的使能信号将作为第一使能信号输入第10行使能同步电路240，第11行使能电路230的使能信号将作为第二使能信号输入第10行使能同步电路240。这样，第9行使能电路230和第11行使能电路230提供的使能信号在控制各自对应行的OLED子像素电路210的同时，可以来共同通过使能同步电路240控制第2行环境光子像素电路220的工作情况，以实现第2行环境光子像素电路220采集环境光时，避免相邻两行OLED子像素电路210发光强度的影响的目的。
基于上述，本申请实施例提供一种使能同步电路，通过第一反相子电路和第二反相子电路两个子电路来接收第一使能信号和第二使能信号并将其反相，然后，再利用反相后的两个信号来控制使能同步输出子电路的输出，从而可以实现两个使能信号控制一个输出信号的目的。
可选地，如图18和图19所示的，第一反相子电路241包括第三晶体管T41和第四晶体管T42。
第三晶体管T41的栅极与第一使能输入端EmIn1电连接，第三晶体管T41的第一极与第三电源电压端VGH电连接，第三晶体管T41的第二极与第二节点Q2电连接；第四晶体管T42的栅极和第二极均与第四电源电压端VGL电连接，第四晶体管T42的第一极与第二节点Q2电连接。
此外，第一反相子电路241还可以包括与第三晶体管T41并联的多个晶体管，和/或，与第四晶体管T42并联的多个晶体管，上述仅是对第一反相子电路241的举例说明，其他与第一反相子电路241功能相同的结构在此不再赘述，但也应当属于本申请的保护范围。
可选地，如图18和图19所示的，第二反相子电路242包括第五晶体管T43和第六晶体管T44。
第五晶体管T43的栅极与第二使能输入端EmIn2电连接，第五晶体管T43的第一极与第三电源电压端VGH电连接，第五晶体管T43的第二极与第三节点电连接；第六晶体管T44的栅极和第二极均与第四电源电压端VGL电连接，第六晶体管T44的第一极与第三节点电连接。
应理解，第四晶体管T42、第六晶体管T44的作用相当于下拉电阻。此处，第三晶体管T41和第五晶体管T43的宽长比可以为第四晶体管T42、第六晶体管T44的宽长的十倍以上。
此外，第二反相子电路242还可以包括与第五晶体管T43并联的多个晶体管，和/或，与第六晶体管T44并联的多个晶体管，上述仅是对第二反相子电路242的举例说明，其他与第二反相子电路242功能相同的结构在此不再赘述，但也应当属于本申请的保护范围。
可选地，如图18和图19所示的，使能同步输出子电路243包括第七晶体管T45、第八晶体管T46和第九晶体管T47。
第七晶体管T45的栅极与第二节点电连接，第七晶体管T45的第一极与第八晶体管T46的第二极电连接，第七晶体管T45的第二极与第四电源电压端VGL电连接；第八晶体管T46的栅极与第三节点电连接，第八晶体管T46的第一极与使能同步输出端EmOut电连接；第九晶体管T47的栅极与第四电源电压端VGL电连接，第九晶体管T47的第一极与第三电源电压端VGH电连接，第九晶体管T47的第二极与使能同步输出端EmOut电连接。
应理解，第九晶体管T47的作用也相当于下拉电阻。
此外，使能同步输出子电路243还可以包括与第七晶体管T45并联的多个晶体管，和/或，与第八晶体管T46并联的多个晶体管，和/或，与第九晶体管T47并联的多个晶体管，上述仅是对使能同步输出子电路243的举例说明，其他与使能同步输出子电路243功能相同的结构在此不再赘述，但也应当属于本申请的保护范围。
在一些实施例中，第三晶体管T41至第九晶体管T47的类型相同，均为N型或者P型；或者，第三晶体管T41至第九晶体管T47的类型也可以不同，其中一个晶体管为N型，另一个晶体管为P型，本申请实施例对此不进行任何限制。例如，当第三晶体管T41至第九晶体管T47均为P型时，为了使得输出的低电平压降更小，可以使得P型晶体管的阈值电压在-0.5V左右。
在一些实施例中，第三晶体管T41至第九晶体管T47可以第一极是漏极、第二极是源极；或者，第一极是源极、第二极是漏极。根据晶体管导电方式的不同，第三晶体管T41至第九晶体管T47可以是增强型晶体管，也可以是耗尽型晶体管，具体可以根据需要进行选择，本申请实施例对此不进行任何限制。
基于上述对使能同步电路240的描述，下面结合图14、图15、图16、图18和图19，对使能电路230和使能同步电路240的具体工作过程进行说明。示例性的，第三晶体管T41至第九晶体管T47均为P型。
参考图26，图26为本申请实施例提供的OLED电路200的驱动时序图。
如图19和图26所示的，在对第10行子像素电路对应的第2行环境光子像素电路220进行驱动时，利用第10行使能同步电路240的第一使能输入端EmIn1接收第9行使能电路230的使能输出端Eout输出的使能信号Emit9、利用第二使能输入端EmIn2接收第11行使能电路230的使能输出端Eout输出使能信号Emit11。
在第i阶段和第i+1阶段中，由于Emit9为高电平电压，Emit11为低电平电压，第9行OLED子像素电路210处于非发光阶段，第11行OLED子像素电路210处于发光阶段。
在此阶段，第三晶体管T41关闭，第四晶体管T42打开，将第四电源电压端VGL提供的低电平电压传输至第七晶体管T45的栅极，由此，第七晶体管T45打开；同时，第五晶体管T43打开，第三电源电压端VGH提供的高电平电压传输至第八晶体管T46的栅极，从而使得第八晶体管T46关闭，那么，由于晶体管47处于常开状态，由此，可将第三电源电压端VGH提供的高电平电压从使能同步输出端EmOut输出，提供给第2行环境光子像素电路220的第三控制端S3(10)，进而使得第2行环境光子像素电路220关闭，不进行环境光采集。
在第i+2阶段中，由于Emit9为高电平电压，Emit11也为高电平电压，第9行OLED 子像素电路210、第11行OLED子像素电路210均处于非发光阶段。
在此阶段，第三晶体管T41关闭，第四晶体管T42打开，将第四电源电压端VGL提供的低电平电压传输至第七晶体管T45的栅极，由此，第七晶体管T45打开；同时，第五晶体管T43关闭，第六晶体管T44打开，将第四电源电压端VGL提供的低电平电压传输至第八晶体管T46的栅极，从而使得第八晶体管T46打开，那么，由于晶体管45和第八晶体管T46都处于打开状态，由此，可将第四电源电压端VGL提供的低电平电压从使能同步输出端EmOut输出，提供给第2行环境光子像素电路220的第三控制端S3(10)，进而使得第2行环境光子像素电路220打开，进行环境光的采集。
在第i+3阶段中，由于Emit9为低电平电压，Emit11为高电平电压，第9行OLED子像素电路210处于发光阶段，第11行OLED子像素电路210处于非发光阶段。
在此阶段，第三晶体管T41打开，将第三电源电压端VGH提供的高电平电压传输至第七晶体管T45的栅极，由此，第七晶体管T45关闭；同时，第五晶体管T43关闭，第六晶体管T44打开，第四电源电压端VGL提供的低电平电压传输至第八晶体管T46的栅极，从而使得第八晶体管T46打开，但是，第七晶体管T45是关闭的，而晶体管47处于常开状态，由此，只能将第三电源电压端VGH提供的高电平电压从使能同步输出端EmOut输出，提供给第2行环境光子像素电路220的第三控制端S3(10)，进而使得第2行环境光子像素电路220关闭，停止环境光的采集。
本申请实施例提供一种使能同步电路的驱动方法，通过第一反相子电路和第二反相子电路两个子电路来接收第一使能信号和第二使能信号并将其反相，然后，再利用反相后的两个信号来控制使能同步输出子电路的输出，从而可以实现两个使能信号控制一个输出信号的目的。
在对第10行OLED子像素电路210对应的第2行环境光子像素电路220进行驱动之前，通常还需要对第2行环境光子像素电路220进行重置，将其残余的电压消除。由此，可以在第9行OLED子像素电路210和第11行OLED子像素电路210均处于非发光阶段之前，也即在第i+2阶段之前，例如第i阶段或第i+1阶段，提供第一控制信号给第2行环境光子像素电路220的第一控制端S1(10)，对第2行环境光子像素电路220中的光电二极管D1和电容进行重置。
由此，如图15所示的，可以将第一控制信号与第9行扫描电路250提供的扫描信号进行同步，在第9行扫描电路250(Scan9电路)对第9行OLED子像素电路210提供扫描信号的同时，将第9行扫描电路250提供的扫描信号作为第一控制信号提供给第10行OLED子像素电路210对应的第2行环境光子像素电路220，控制第2行环境光子像素电路220进行重置。
此外，如图15所示的，在对第10行OLED子像素电路210对应的第2行环境光子像素电路220进行驱动时，同时环境光放大电路270在进行积分和放大时，又不能对第2行环境光子像素电路220进行重置，因此，第1行环境光子像素电路220所需的第一控制信号还需与环境光放大电路270连接的放大控制端E1提供的放大控制信号结合起来进行同步控制。
示例性的，可以在第i阶段，在第9行扫描电路250对第9行OLED子像素电路210提供扫描信号时，并且与第2行环境光子像素电路220电连接的环境光放大电路270未进行积分和放大时，根据第9行扫描信号和放大控制端E1提供的放大控制信号，来共同控制提供给第2行环境光子像素电路220的第一控制端S1(10)的第一控制信号，以对第2行环境光子像素电路220进行重置。
本申请实施例提供一种OLED电路，通过增设扫描同步电路，将上一行扫描电路提供的扫描信号复用，作为第一控制信号提供给本行环境光子像素电路；然后，根据该第一控制信号和放大控制端提供的放大控制信号来共同控制提供给本行环境光子像素电路的第一控制信号，以在使能同步电路提供第三控制信号控制本行环境光子像素电路进行环境光采集之前，对本行环境光子像素电路进行重置。
此外，通过将放大控制端提供的放大控制信号来共同提供第一控制信号，还可以避免干扰环境光放大电路，实现在环境光放大电路未工作时对环境光子像素电路进行重置的目的。
在此基础上，如图15所示的，环境光放大电路270通常也需要进行重置，由此，可以将提供给第1行环境光子像素电路220的第一控制端S1的第一控制信号复用后，提供给环境光放大电路270的第二控制端S2，以在环境光放大电路270未进行积分时对其进行重置。
需要说明的是，由于环境光放大电路270是对多行环境光子像素电路220输出的电荷进行汇集和整合的电路，所以，环境光放大电路270不必在每行环境光子像素220进行工作之前都进行重置，只需在第1行环境光子像素电路220进行工作之前进行重置即可，因此，可以将提供给第1行环境光子像素电路220的第一控制端S1的第一控制信号复用，提供给环境光放大电路270的第二控制端S2。
由此，环境光放大电路270的第二控制端S2应连接第1行环境光子像素电路220对应行的扫描同步电路的扫描输出端SOut，比如，在本申请的示例中，第1行环境光子像素220对应的是第9行扫描同步电路(Scan9同步电路)，因此，环境光放大电路270的第二控制端S2应连接第9行扫描同步电路的扫描同步输出端ScOut，从而可以将第9行扫描同步电路260输出的扫描信号在作为第1行环境光子像素电路220对应的第一控制信号的同时，作为环境光放大电路270的第二控制信号。
还需要说明的是，由于多行环境光子像素电路220产生的电荷会传输给环境光放大电路270进行汇集和整合，然后输出给模拟放大电路280转换成环境光数据，所以在环境光放大电路270进行输出时，也即模拟放大电路280进行工作时，环境光放大电路270不能重置。因此，第9行扫描同步电路提供信号作为第二控制信号触发环境光放大电路270重置时，第9行扫描同步电路还需考虑放大控制端E1提供的放大控制信号的状态来控制。
本申请实施例提供一种OLED电路，通过增设环境光放大电路可以将多行环境光子像素电路产生的电荷进行汇集和整合，然后输出给增设的模拟放大电路转换成环境光数据，由于本申请中环境光的采集不受限于环境光子像素电路的行数，也即不受限于环境光传感器的尺寸，所以，本申请提供的采集环境光的方式可以适应高刷新率。
本申请实施例还将第1行环境光子像素电路对应行的扫描同步电路输出的信号进 行复用，也即将第1行环境光子像素电路对应的第一控制信号进行复用，作为第二控制信号提供给环境光放大电路的第二控制端，以实现对环境光放大电路进行重置的目的。由于扫描同步电路输出的信号结合了放大控制端的放大控制信号的状态，所以，不会在环境光放大电路进行输出时，也即模拟放大电路进行工作时，对环境光放大电路进行重置。
参考图20至图25，图20为本申请实施例提供的一种扫描电路250的结构示意图，图21为本申请实施例提供的一种环境光放大电路270的结构示意图；图22为本申请实施例提供的另一种环境光放大电路270的结构示意图；图23为本申请实施例提供的一种扫描同步电路260的结构示意图；图24为本申请实施例提供的另一种扫描同步电路260的结构示意图；图25为本申请实施例提供的一种扫描电路和扫描同步电路的连接结构示意图。
在本申请实施例中，以每行扫描电路250结构均相同，每行扫描同步电路260结构均相同为例进行说明。当然，也可以不相同，本申请实施例对此不进行任何限制。
其中，如图20所示的，扫描电路250为相关技术中已有结构，在此不再赘述。
由于扫描同步电路260的输出受与环境光放大电路270连接的放大控制端E1提供的放大控制信号影响，下面先对环境光放大电路270进行详细介绍。
如图21和图25所示的，环境光放大电路270包括：放大重置子电路271、积分子电路272和放大输出子电路273。
放大重置子电路271与第二控制端S2、重置控制端Vref和积分子电路272电连接，放大重置子电路271用于在来自第二控制端S2的第二控制信号的控制下，将来自重置控制端Vref的电压提供给积分子电路272，对积分子电路272进行重置。
积分子电路272还与多行同一颜色的子像素中的多个环境光子像素电路220的一级环境光输出端Out1、以及第一电源电压端VDD、放大输出子电路273电连接，积分子电路272用于将该多个一级环境光输出端Out1输出的一级环境光信号进行累加，生成二级环境光信号。
放大输出子电路273与放大控制端E1和二级环境光输出端Out2电连接，放大输出子电路273用于在来自放大控制端E1的放大控制信号的控制下，将积分子电路272提供的二级环境光信号传输给二级环境光输出端Out2输出。
其中，放大控制端E1输入的放大控制信号可以由集成电路(integrated circuit，IC)来提供。
应理解，由于每行对应相同颜色的环境光子像素电路220连接同一个检测信号线，多行对应相同的环境光子像素电路220连接的多条检测信号线与环境光放大电路270的一级环境光输出端电连接，由此，在环境光子像素电路220逐行进行短积分时，可以依次将每行汇集的信号逐行传输至该环境光放大电路270进行累加，这样就相当于对该种颜色的环境光进行了长积分，从而可以提高检测的准确性。
基于上述，本申请实施例提供一种环境光放大电路，通过放大重置子电路在第二控制端的控制下对积分子电路进行重置，然后，通过积分子电路对多行环境光子像素电路的一级环境光输出端提供的信号进行长积分，再通过放大输出子电路在放大控制 端的电压的控制下进行输出，从而可以提高检测的准确性。
可选地，如图22和图25所示，放大重置子电路271包括第十五晶体管T71。
第十五晶体管T71的栅极与第二控制端S2电连接，第十五晶体管T71的第一极与积分子电路272电连接，第十五晶体管T71的第二极与重置控制端Vref电连接。
此外，放大重置子电路271还可以包括与第十五晶体管T71并联的多个晶体管，上述仅是对放大重置子电路271的举例说明，其他与放大重置子电路271功能相同的结构在此不再赘述，但也应当属于本申请的保护范围。
可选地，如图22和图25所示，积分子电路272包括第三电容C3和第十六晶体管T72。
第三电容C3的第一端与第一电源电压端VDD、第十六晶体管T72的第一极电连接，第三电容C3的第二端与多行同一颜色子像素中的环境光子像素电路220的一级环境光输出端Out1电连接，第十五晶体管T71的第一极与第十六晶体管T72的栅极电连接。
第十六晶体管T72的第二极与放大输出子电路电连接。
此外，积分子电路272还可以包括与第三电容C3比并联的多个电容，和/或，与第十五晶体管T71并联的多个晶体管，和/或，与第十六晶体管T72并联的多个晶体管，上述仅是对积分子电路272的举例说明，其他与积分子电路272功能相同的结构在此不再赘述，但也应当属于本申请的保护范围。
应理解，第三电容C3为存储电容，可以存储环境光子像素电路220产生的光电荷。当电流积分一定时间后，第三电容C3的第二端，也即下极板的电位会发生变化(降低)，此时，第十六晶体管T72的Vgs就会发生变化，导致流经T72的电流发生变化。变化的大小和电流积分的时间相关。此时，第十六晶体管T72相当于用于放大光电荷形成的光电流。
可选地，如图22和图25所示，放大输出子电路273包括第十七晶体管T73。
第十七晶体管T73的栅极与放大控制端E1电连接，第十七晶体管T73的第一极与第十六晶体管T72的第二极电连接，第十七晶体管T73的第二极与二级环境光输出端Out2电连接。
此外，放大输出子电路273还可以包括与第十七晶体管T73并联的多个晶体管，上述仅是对放大输出子电路273的举例说明，其他与放大输出子电路273功能相同的结构在此不再赘述，但也应当属于本申请的保护范围。
在一些实施例中，第十五晶体管T71至第十七晶体管T73的类型相同，均为N型或者P型；或者，第十五晶体管T71至第十七晶体管T73的类型也可以不同，其中一个晶体管为N型，另一个晶体管为P型，本申请实施例对此不进行任何限制。
在一些实施例中，第十五晶体管T71至第十七晶体管T73可以第一极是漏极、第二极是源极；或者，第一极是源极、第二极是漏极。根据晶体管导电方式的不同，第十五晶体管T71至第十七晶体管T73可以是增强型晶体管，也可以是耗尽型晶体管，具体可以根据需要进行选择，本申请实施例对此不进行任何限制。
基于上述对环境光放大电路270的描述，下面结合图21和图22，对环境光放大电路270的工作过程进行说明。
示例性的，第十五晶体管T71至第十七晶体管T73均为P型。
如图26所示的，在第i-1阶段，放大控制信号从低电平电压变成高电平电压时，说明环境光放大电路上一次输出结束，此时，在下一次进行环境光采集之前，可以进行一次重置。
于是，可以在第9行扫描同步电路对第1行环境光子像素电路的第一控制端S1提供扫描信号的同时，将该扫描信号复用，提供给环境光放大电路270连接的第二控制端S2，这样，通过第9行扫描同步电路向第二控制端S2提供低电平电压，第十五晶体管T71打开，重置控制端Vref对第三电容C3的第二端进行重置，也即，对环境光放大电路270进行重置。
在第i阶段至第i+1阶段，第9行扫描同步电路继续为第二控制端S2提供高电平电压，第十五晶体管T71关闭，重置结束；放大控制端E1为高电平电压，第十七晶体管T73关闭，不输出。
在第i+2阶段，第10行OLED子像素电路210对应的第2行环境光子像素电路220打开，进行环境光的采集，由此，第三电容C3开始存储光电荷，第十六晶体管T72对光电荷形成的光电流放大。在此阶段，第二控制端S2继续提供高电平电压，第十五晶体管T71关闭，放大控制端E1为高电平电压，第十七晶体管T73关闭，不输出。
在第i+3阶段，第9行OLED子像素电路210重新发光，第2行环境光子像素电路220关闭，此时，第三电容C3充电结束。在此阶段，第9行扫描同步电路为第二控制端S2继续提供高电平电压，第十五晶体管T71关闭，放大控制端E1可以依然为高电平电压，第十七晶体管T73关闭，不输出。
在上述第i+3阶段之后，例如可以在所有行环境光子像素电路220都充电结束后，或者在所有行环境光子像素电路22循环进行多轮充电结束后，放大控制信号E1再提供低电平电压。此时，由于放大控制信号E1提供的是低电平电压，第十七晶体管T73将打开，从而可以将长积分后的二级环境光信号从二级环境光输出端Out2输出。
应理解，长积分指的是所有行环境光子像素电路22累计进行积分，或者，指的是所有行环境光子像素电路220多轮充电后累计进行积分。此时，长积分得到的二级环境光信号指的是所有行环境光子像素电路220累计积分得到的信号，或者，是所有行环境光子像素电路220多轮充电后累计积分得到的信号。
至于所有行环境光子像素电路220充电的轮数，可以根据需要进行设置和修改，本申请对此不进行任何限制。
本申请实施例提供一种环境光放大电路的驱动方法，通过放大重置子电路在第二控制端的控制下对积分子电路进行重置，然后，通过积分子电路对多行环境光子像素电路的一级环境光输出端提供的信号进行累加和放大，再通过放大输出子电路在放大控制端的电压的控制下进行输出，从而可以提高检测的准确性，以及适应高刷新率。
如图23所示的，扫描同步电路260包括：电连接的扫描同步反相子电路261和扫描同步输出子电路262。
扫描同步反相子电路261还与放大控制端E1、第三电源电压端VGH、第四电源电压端VGL电连接，扫描同步反相子电路261用于在来自放大控制端E1的放大控制 信号的控制下，将与放大控制信号反相的第三反相信号提供给扫描同步输出子电路262。
其中，第三反相信号为第三电源电压端VGH提供的第三电压或第四电源电压端VGL提供的第四电压。
扫描同步输出子电路262还与扫描同步输入端ScIn、第三电源电压端VGH、第四电源电压端VGL和扫描同步输出端ScOut电连接；扫描同步输出子电路262用于在第三反相信号和来自扫描同步输入端ScIn的扫描信号的控制下，将第三电源电压端VGH提供的第三电压或第四电源电压端VGL提供的第四电压传输给扫描同步输出端ScOut输出。
可选地，作为一种可实现方式，扫描同步子电路用于在第三反相信号和扫描同步输入端ScIn接收的电压均为低电平电压时，将第四电源电压端VGL提供的第四电压提供给扫描同步输出端ScOut，否则，将第三电源电压端VGH提供的第三电压提供给扫描同步输出端ScOut。
应理解，第三反相信号为低电平电压时，说明放大控制信号为高电平电压。
需要说明的是，针对第10行环境子像素电路对应的第2行环境光子像素电路220，在其未驱动，以及环境光放大电路270未进行积分和放大时，才能对第2行环境光子像素电路220进行重置，由此，可以将第9行扫描电路250的扫描输出端SOut提供的扫描信号，以及环境光放大电路270的放大控制端E1进行复用，利用第9行扫描电路250的提供的扫描信号和放大控制端E1提供的放大控制信号来共同控制第2行环境光子像素电路220是否进行重置。
基于上述，本申请实施例提供一种扫描同步电路，通过扫描同步反相子电路将放大控制端提供的放大控制信号进行反相，然后再利用反相后的电压与扫描同步输入端提供的扫描信号共同控制扫描同步输出子电路的输出，从而可以根据上一行扫描信号和放大控制端提供的放大控制信号来共同控制第一控制信号，以实现在环境光放大电路不工作时，对环境光子像素电路进行重置，而在环境光放大电路工作时，不会对环境光子像素电路进行重置的目的。
可选地，如图24和图25所示，扫描同步反相子电路261包括：第十二晶体管T63和第十三晶体管T64。
第十三晶体管T64的栅极与放大控制信号端E1电连接，第十三晶体管T64的第一极与第三电源电压端VGH电连接，第十三晶体管T64的第二极与第十二晶体管T63的第一极电连接。
第十二晶体管T63的栅极和第二极均与第四电源电压端VGL电连接。
此外，扫描同步反相子电路261还可以包括与第十二晶体管T63，和/或，第十三晶体管T64并联的多个晶体管，上述仅是对扫描同步反相子电路261的举例说明，其他与扫描同步反相子电路261功能相同的结构在此不再赘述，但也应当属于本申请的保护范围。
可选地，如图24和图25所示，扫描同步输出子电路262包括：第十晶体管T61、第十一晶体管T62和第十四晶体管T65。
第十一晶体管T62的栅极与第四电源电压端VGL电连接，第十一晶体管T62的 第一极与第三电源电压端VGH电连接，第十一晶体管T62的第二极与扫描同步输出端ScOut电连接。
第十晶体管T61的栅极与扫描同步输入端ScIn电连接，第十晶体管T61的第一极与扫描同步输出端ScOut电连接，第十晶体管T61的第二极与第十四晶体管T65的第一极电连接。
第十四晶体管T65的栅极与第十三晶体管T64的第二极电连接，第十四晶体管T65的第二极与第四电源电压端VGL电连接。
此外，扫描同步输出子电路262还可以包括与第十晶体管T61并联的多个晶体管，和/或，与第十一晶体管T62并联的多个晶体管，和/或与第十二晶体管T63并联的多个晶体管，上述仅是对扫描同步输出子电路262的举例说明，其他与扫描同步输出子电路262功能相同的结构在此不再赘述，但也应当属于本申请的保护范围。
基于上述扫描同步电路260的描述，下面结合图23至图26，对扫描电路250和扫描同步电路260的具体工作过程进行说明。示例性的，第十晶体管T61至第十四晶体管T65均为P型。
如图26所示的，逐行利用第9行扫描电路250对第9行OLED子像素电路210提供第9行扫描信号，利用第10行扫描电路250对第10行OLED子像素电路210提供第10行扫描信号，利用第11行扫描电路250对第11行OLED子像素电路210提供第11行扫描信号。
第10行扫描同步电路260利用扫描同步输入端ScIn接收第9行扫描电路250输出的第9行扫描信号，同时，利用放大控制端E1接收放大控制信号。
在第i阶段中，由于第9行扫描信号为低电平电压，放大控制信号为高电平电压，第十晶体管T61打开，第十三晶体管T64关闭，第十二晶体管T63打开，从而可以将第四电源电压端VGL提供的第四电压，也即放大控制信号的反相电压传输至第十四晶体管T65的栅极，将第十四晶体管T65打开，由此，可以将第四电压也就是低电平电压从扫描同步电路260输出端输出。
在第i+1阶段至第i+3阶段中，由于第9行扫描信号为高电平电压，所以第十晶体管T61关闭，此时放大控制信号无论是高电平电压还是低电平电压都不会对输出产生影响；而第十一晶体管T62的栅极与第四电源电压端VGL连接，第十一晶体管T62常开，由此，可以将第十一晶体管T62的第一极接收的第三电源电压端VGH的第三电压，也即高电平电压传输给扫描同步电路260输出端输出。
基于上述，本申请实施例提供一种扫描同步电路的驱动方法，通过扫描同步反相子电路将放大控制端提供的放大控制信号进行反相，然后再利用反相后的电压与扫描同步输入端提供的扫描信号共同控制扫描同步输出子电路的输出，从而可以根据上一行扫描信号和放大控制端提供的放大控制信号来共同控制第一控制信号，以实现在环境光放大电路不工作时，对环境光子像素电路进行重置，而在环境光放大电路工作时，不会对环境光子像素电路进行重置的目的。
基于上述对各部分电路的介绍，下面结合图26，对图15所示的OLED电路200的驱动过程进行整体描述。
其中，OLED电路200包括：OLED子像素电路210、环境光子像素电路220、扫描电路250、扫描同步电路260、使能电路230、使能同步电路240、环境光放大电路270和模拟放大电路280。
模拟放大电路280可以包括放大器和模拟数字转换器，该放大器用于将环境光放大电路270输出的二级环境光信号进行积分，并转换为电压值，再提供给模拟数字转换器。该模拟数字转换器再将模拟电压转化为数字量。当然，模拟放大电路280还可以包括其他器件，本申请实施例对此不进行任何限制。下面以模拟放大电路280包括放大器和模拟数字转换器为例进行说明，以下不再赘述。
以第10行OLED子像素电路210与第2行环境光子像素电路220对应为例，在OLED电路200中：
第10行扫描电路250的扫描输出端SOut与第10行OLED子像素电路210的扫描端Scan10电连接；第10行使能电路230的使能输出端Eout与第10行OLED子像素电路210的使能端Emit10电连接。
第9行扫描电路250的扫描输出端SOut与第10行扫描同步电路260的扫描同步输入端ScIn电连接，第10行扫描同步电路260的扫描同步输出端ScOut与第2行环境光子像素电路220的第一控制端S1电连接。第10行扫描同步电路260还与放大控制端E1电连接。
第9行使能电路230的使能输出端Eout与第10行使能同步电路240的第一使能输入端EmIn1电连接，第11行使能电路230的使能输出端Eout与第10行使能同步电路240的第二使能输入端EmIn2电连接，第10行使能同步电路240的使能同步输出端EmOut与第2行环境光子像素电路220的第三控制端S3电连接。
第2行环境光子像素电路220的一级环境光输出端Out1与环境光放大电路270的二级环境光输入端In2电连接，环境光放大电路270还与放大控制端E1电连接，此外，环境光放大电路270的第二控制端S2与第9行扫描同步电路260的扫描同步输出端ScOut电连接。
环境光放大电路270的二级环境光输出端与模拟放大电路280的三级环境光输入端In3电连接，模拟放大电路280还包括三级环境光输出端Out3。
相应的，OLED电路的驱动过程可以包括：
在第i-1阶段，在对第9行OLED子像素电路对应的第1行环境光子像素电路进行重置的同时，第9行扫描同步电路的扫描同步输出端SCout向环境光放大电路270的第二控制端S2提供低电平电压，环境光放大电路270中的第十五晶体管T71打开，重置控制端Vref提供电压将第三电容C3的电压进行重置；此时，放大控制端E1为高电平电压，第十七晶体管T73关闭，二级环境光输出端Out2没有输出，模拟放大电路280不工作。
在第i阶段中，第10行扫描电路250的扫描输出端SOut向第10行OLED子像素电路210的扫描端Scan10提供高电平电压；第10行使能电路230的使能输出端Eout向第10行OLED子像素电路210的使能端Emit10提供低电平电压，同时第9行使能电路230的使能输出端Eout向第9行OLED子像素电路210的使能端Emit9提供高电平电压，第11行使能电路230的使能输出端Eout向第11行OLED子像素电路210 的使能端Emit11提供低电平电压，此时，第9行OLED子像素电路210处于非发光阶段，第10行和第11行OLED子像素电路210处于发光阶段。
第9行扫描电路250的扫描输出端SOut向第10行扫描同步电路260的扫描同步输入端ScIn提供低电平电压，放大控制端E1提供高电平电压，此时，第10行扫描同步电路260中的第十四晶体管T65、第十晶体管T61打开，由此，可以将第四电源电压端VGL提供的低电平电压提供给第2行环境光子像素电路220的第一控制端S1(10)。
第一控制端S1(10)输入低电平电压，第2行环境光子像素电路220中的第一晶体管T21打开，重置控制端Vref提供电压将光电二极管D1和第二电容C2进行重置。
第9行使能电路230的使能输出端Eout向第10行使能同步电路240的第一使能输入端EmIn1提供高电平电压，第11行使能电路230的使能输出端Eout向第10行使能同步电路240的第二使能输入端EmIn2提供低电平电压，此时，第10行使能同步电路240的第七晶体管T45打开，第八晶体管T46关闭，而第九晶体管T47常开，将第三电源电压端VGH提供的高电平电压从使能同步输出端EmOut输出，提供给第2行环境光子像素电路220的第三控制端S3。
第三控制端S3(10)输入高电平电压，第2行环境光子像素电路220中的第二晶体管T22关闭，由此，第2行环境光子像素电路220的一级环境光输出端Out1没有输出。
同时，第9行扫描同步电路的扫描同步输出端SCout向环境光放大电路270的第二控制端S2提供高电平电压，环境光放大电路270中的第十五晶体管T71关闭，不会重置，又因为第2行环境光子像素电路的一级环境光输出端Out1没有输出，所以也没有积分；又因为放大控制端E1为高电平电压，第十七晶体管T73关闭，二级环境光输出端Out2没有输出，模拟放大电路280不工作。
在第i+1阶段中，第10行扫描电路250的扫描输出端SOut向第10行OLED子像素电路210的扫描端Scan10提供低电平电压；第10行使能电路230的使能输出端Eout向第10行OLED子像素电路210的使能端Emit10提供高电平电压，同时第9行使能电路230的使能输出端Eout向第9行OLED子像素电路210的使能端Emit9提供高电平电压，第11行使能电路230的使能输出端Eout向第11行OLED子像素电路210的使能端Emit11提供低电平电压，也即，第9行和第10行OLED子像素电路210处于非发光阶段，第11行OLED子像素电路210处于发光阶段。
第9行扫描电路250的扫描输出端SOut向第10行扫描同步电路260的扫描同步输入端ScIn提供高电平电压，放大控制端E1提供高电平电压，此时，第10行扫描同步电路260中的第十四晶体管T65打开、第十晶体管T61关闭，第十一晶体管T62常开，由此，可以将第三电源电压端VGH提供的高电平电压提供给第2行环境光子像素电路220的第一控制端S1(10)。
第一控制端S1(10)输入高电平电压，第2行环境光子像素电路220中的第一晶体管T21关闭，不会进行重置。
第9行使能电路230的使能输出端Eout向第10行使能同步电路240的第一使能输入端EmIn1提供高电平电压，第11行使能电路230的使能输出端Eout向第10行使能同步电路240的第二使能输入端EmIn2提供低电平电压，此时，第10行使能同步电路240的第七晶体管T45打开，第八晶体管T46关闭，而第九晶体管T47常开，将 第三电源电压端VGH提供的高电平电压从使能同步输出端EmOut输出，提供给第2行环境光子像素电路220的第三控制端S3。
第三控制端S3输入高电平电压，第2行环境光子像素电路220中的第二晶体管T22关闭，由此，第2行环境光子像素电路220的一级环境光输出端Out1没有输出。
同时，第9行扫描同步电路的扫描同步输出端SCout向环境光放大电路270的第二控制端S2提供高电平电压，环境光放大电路270中的第十五晶体管T71关闭，不会重置，又因为第2行环境光子像素电路的一级环境光输出端Out1没有输出，所以也没有积分；又因为放大控制端E1为高电平电压，第十七晶体管T73关闭，二级环境光输出端Out2没有输出，模拟放大电路280不工作。
在第i+2阶段中，第10行扫描电路250的扫描输出端SOut向第10行OLED子像素电路210的扫描端Scan10提供高电平电压；第10行使能电路230的使能输出端Eout向第10行OLED子像素电路210的使能端Emit10提供高电平电压，同时第9行使能电路230的使能输出端Eout向第9行OLED子像素电路210的使能端Emit9提供高电平电压，第11行使能电路230的使能输出端Eout向第11行OLED子像素电路210的使能端Emit11提供高电平电压，也即，第9行、第10行和第11行OLED子像素电路210处于非发光阶段。
第9行扫描电路250的扫描输出端SOut向第10行扫描同步电路260的扫描同步输入端ScIn提供高电平电压，放大控制端E1提供高电平电压，此时，第10行扫描同步电路260中的第十四晶体管T65打开、第十晶体管T61关闭，第十一晶体管T62常开，由此，可以将第三电源电压端VGH提供的高电平电压提供给第2行环境光子像素电路220的第一控制端S1(10)。
第一控制端S1(10)输入高电平电压，第2行环境光子像素电路220中的第一晶体管T21关闭，不会进行重置。
第9行使能电路230的使能输出端Eout向第10行使能同步电路240的第一使能输入端EmIn1提供高电平电压，第11行使能电路230的使能输出端Eout向第10行使能同步电路240的第二使能输入端EmIn2提供高电平电压，此时，第10行使能同步电路240的第七晶体管T45打开，第八晶体管T46打开，将第四电源电压端VGL提供的低电平电压从使能同步输出端EmOut输出，提供给第2行环境光子像素电路220的第三控制端S3。
第三控制端S3输入低电平电压，第2行环境光子像素电路220中的第二晶体管T22打开，由此，第2行环境光子像素电路220进行光电转换，产生的光电荷从一级环境光输出端Out1输出。
同时，第9行扫描同步电路的扫描同步输出端SCout向环境光放大电路270的第二控制端S2提供高电平电压，环境光放大电路270中的第十五晶体管T71关闭，不会重置，又因为第2行环境光子像素电路的一级环境光输出端Out1有输出，所以环境光放大电路270对第2行环境光子像素电路的输出进行积分；又因为放大控制端E1为高电平电压，第十七晶体管T73关闭，二级环境光输出端Out2没有输出，模拟放大电路280不工作。
在第i+3阶段中，第10行扫描电路250的扫描输出端SOut向第10行OLED子像 素电路210的扫描端Scan10提供高电平电压；第10行使能电路230的使能输出端Eout向第10行OLED子像素电路210的使能端Emit10提供高电平电压，同时第9行使能电路230的使能输出端Eout向第9行OLED子像素电路210的使能端Emit9提供低电平电压，第11行使能电路230的使能输出端Eout向第11行OLED子像素电路210的使能端Emit11提供高电平电压，也即，第9行OLED子像素电路210处于发光阶段，第10行和第11行OLED子像素电路210处于非发光阶段。
第9行扫描电路250的扫描输出端SOut向第10行扫描同步电路260的扫描同步输入端ScIn提供高电平电压，放大控制端E1提供低电平电压，此时，第10行扫描同步电路260中的第十四晶体管T65打开、第十晶体管T61关闭，第十一晶体管T62常开，由此，可以将第三电源电压端VGH提供的高电平电压提供给第2行环境光子像素电路220的第一控制端S1(10)。
第一控制端S1(10)输入高电平电压，第2行环境光子像素电路220中的第一晶体管T21关闭，不会进行重置。
第9行使能电路230的使能输出端Eout向第10行使能同步电路240的第一使能输入端EmIn1提供低电平电压，第11行使能电路230的使能输出端Eout向第10行使能同步电路240的第二使能输入端EmIn2提供高电平电压，此时，第10行使能同步电路240的第七晶体管T45关闭，第八晶体管T46打开，第九晶体管T47常开，将第三电源电压端VGH提供的高电平电压从使能同步输出端EmOut输出，提供给第2行环境光子像素电路220的第三控制端S3。
第三控制端S3输入高电平电压，第2行环境光子像素电路220中的第二晶体管T22关闭，由此，第2行环境光子像素电路220进行光电转换结束，一级环境光输出端Out1不再输出。
同时，第9行扫描同步电路的扫描同步输出端SCout向环境光放大电路270的第二控制端S2提供高电平电压，环境光放大电路270中的第十五晶体管T71关闭；又因为放大控制端E1为高电平电压，第十七晶体管T73关闭，二级环境光输出端Out2没有输出，模拟放大电路280不工作。
应理解，上述仅为一行环境光子像素电路进行环境光采集的驱动过程，其他行环境光子像素电路进行环境光采集的驱动过程类似，在此不再赘述。
在上述阶段之后，例如在所有行环境光子像素电路充电结束之后，或者，所有行环境光子像素电路经过多轮充电之后，放大控制端E1再提供低电平电压，这样，第十七晶体管T73打开，晶体光T72将第三电容C3存储的电荷从二级环境光输出端Out2输出，而此时的第二控制端S2继续输入高电平电压，环境光放大电路270中的第十五晶体管T71关闭，不会重置。
最后，模拟放大电路280的三级环境光输入端In3接收放大后的电荷，将其积分成电压，再转化为数据量，生成环境光数据并从三级环境光输出端Out3输出。
本申请实施例提供了一种OLED电路的驱动方法，通过扫描同步电路将上一行扫描电路提供的扫描信号复用；然后，根据该第一控制信号和放大控制端提供的放大控制信号来共同控制提供给本行环境光子像素电路的第一控制信号，以对本行环境光子像素电路进行重置。
还通过使能同步电路将上下相邻两行使能电路提供的使能信号进行复用，以在上下相邻两行使能电路控制各自对应的OLED子像素电路处于非发光阶段的同时，可以根据该两个使能信号来共同控制提供给本行环境光子像素电路的第三控制信号，以控制本行的环境光子像素电路进行环境光的采集和输出。
还通过环境光放大电路将多行环境光子像素电路产生的电荷进行汇集和整合，然后输出给增设的模拟放大电路转换成环境光数据，由于本申请中环境光的采集不受限于环境光子像素电路的行数，也即不受限于环境光传感器的尺寸，所以，本申请提供的采集环境光的方式可以适应高刷新率。
本申请还将第1行环境光子像素电路对应行的扫描同步电路输出的信号进行复用，也即将第1行环境光子像素电路对应的第一控制信号进行复用，作为第二控制信号提供给环境光放大电路的第二控制端，以实现对环境光放大电路进行重置的目的。由于扫描同步电路输出的信号结合了放大控制端的放大控制信号的状态，所以，不会在环境光放大电路进行输出时，也即模拟放大电路进行工作时，对环境光放大电路进行重置，而仅在环境光放大电路未工作时才对环境光子像素电路进行重置。
上面结合附图对本申请实施例提供的OLED电路200的结构及OLED电路200所包括的各部分的子电路的结构，以及OLED电路200的驱动过程进行了详细描述，下面对其他相关设备进行介绍。
本申请实施例还提供一种OLED显示面板，该OLED显示面板包括：衬底基板如上所述的OLED电路。
OLED电路中的OLED子像素电路包括：发光元件；OLED电路中的环境光子像素电路设置在衬底基板和所述发光元件之间。
应理解，由于环境光子像素电路集成于OLED显示面板内，所以，环境光子像素电路在采集外部环境光强度时，将不再受显示屏的光线透过率的影响，由此，可以提高环境光的检测精度。
可选地，作为一种可实现的方式，OLED显示面板中的OLED子像素电路还包括：驱动电路，该驱动电路用于驱动发光元件发光。
其中，驱动电路和环境光子像素电路同层设置。
应理解，通过同层设置可以减少工艺步骤，提高制备效率。
可选地，作为一种可实现的方式，环境光子像素电路中的光电二极管包括：层叠设置的第一电极、光电材料层和第二电极；
其中，第一电极位于靠近衬底基板的一侧且平行于衬底基板。
可选地，作为一种可实现的方式，环境光子像素电路中的第二晶体管与第一电极电连接，用于传输第一电极上的电压。
应理解，所述第一电极的电压即采集到的一级环境光信号。
本申请实施例还提供一种显示屏，包括如上所述的OLED显示面板。
本申请实施例还提供一种电子设备，包括如上所述的显示屏。
上述本申请实施例提供的电子设备、显示屏均用于执行上文所提供的方法，因此，其所能达到的有益效果可参考上文所提供的方法对应的有益效果，在此不再赘述。
结合图1所示的场景，当用户利用本申请实施例提供的手机打游戏时，由于本申请提供的环境光传感器包括的环境光子像素电路可以与OLED子像素电路相互配合，通过控制与环境光子像素电路位于同一行或者同一行及相邻多行的OLED子像素电路处于非发光阶段时，环境光子像素电路才进行光电转换，从而可以减少显示屏的像素发光对环境光传感器采集环境光的影响，进而可以达到对外部环境强度的精确检测，由此，在用户从黑暗区域走到路灯下的光亮区域中时，显示屏中的环境光传感器可以快速、准确地检测出周围环境光的变换，及时对显示屏的亮度进行调整，比如用户越靠近路灯下光线最强的地方，手机的显示屏的亮度也随之增强，保证足够清晰。
此外，本申请的环境光检测方式适用于高刷新率的电子设备，所以即使用户在打游戏，也能准确测量环境光，及时调整显示屏亮度，满足用户的视觉体验。
应理解，上述只是为了帮助本领域技术人员更好地理解本申请实施例，而非要限制本申请实施例的范围。本领域技术人员根据所给出的上述示例，显然可以进行各种等价的修改或变化，例如，上述检测方法的各个实施例中某些步骤可以是不必须的，或者可以新加入某些步骤等。或者上述任意两种或者任意多种实施例的组合。这样的修改、变化或者组合后的方案也落入本申请实施例的范围内。
还应理解，上文对本申请实施例的描述着重于强调各个实施例之间的不同之处，未提到的相同或相似之处可以互相参考，为了简洁，这里不再赘述。
还应理解，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。
还应理解，本申请实施例中，“预先设定”、“预先定义”可以通过在设备(例如，包括电子设备)中预先保存相应的代码、表格或其他可用于指示相关信息的方式来实现，本申请对于其具体的实现方式不做限定。
还应理解，本申请实施例中的方式、情况、类别以及实施例的划分仅是为了描述的方便，不应构成特别的限定，各种方式、类别、情况以及实施例中的特征在不矛盾的情况下可以相结合。
还应理解，在本申请的各个实施例中，如果没有特殊说明以及逻辑冲突，不同的实施例之间的术语和/或描述具有一致性、且可以相互引用，不同的实施例中的技术特征根据其内在的逻辑关系可以组合形成新的实施例。
最后应说明的是：以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何在本申请揭露的技术范围内的变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (22)

  1. 一种有机发光二极管OLED电路，其特征在于，应用于OLED显示面板中，所述OLED显示面板包括呈阵列排布的多个子像素；所述OLED电路包括：多行扫描同步电路和多行使能同步电路；
    所述OLED电路还包括：
    位于每个子像素中的OLED子像素电路，位于部分子像素中的环境光子像素电路，其中，第N行OLED子像素电路与第M行环境光子像素电路位于同一行子像素中，N为大于或等于2的整数，M为大于或等于1的整数；
    第N行扫描同步电路与第M行环境光子像素电路电连接，所述第N行扫描同步电路用于向所述第M行环境光子像素电路提供第一控制信号；
    第N行使能同步电路与所述第M行环境光子像素电路电连接，所述第N行使能同步电路用于向所述第M行环境光子像素电路提供第三控制信号；
    所述第M行环境光子像素电路用于在所述第一控制信号的控制下进行重置，还用于在第N-1行OLED子像素电路、所述第N行OLED子像素电路和第N+1行OLED子像素电路均不发光时，在所述第三控制信号的控制下进行环境光采集，并生成一级环境光信号。
  2. 根据权利要求1所述的OLED电路，其特征在于，所述OLED电路还包括：多行扫描电路、多行使能电路；
    每行扫描电路的扫描输出端与同行的所述OLED子像素电路的扫描端电连接，每行扫描电路用于为同行的所述OLED子像素电路提供扫描信号，所述OLED子像素电路用于在同行的所述扫描电路提供的扫描信号的控制下，接收数据线提供的电压；
    每行使能电路的使能输出端与同行的所述OLED子像素电路的使能端电连接，每行使能电路用于为同行的所述OLED子像素电路提供使能信号，所述OLED子像素电路用于在同行的所述使能电路提供的使能信号的控制下不发光；
    第N-1行扫描电路的扫描输出端与第N行扫描同步电路的扫描同步输入端电连接，所述第N行扫描同步电路的扫描同步输出端与所述第M行环境光子像素电路的第一控制端电连接，所述第N行扫描同步电路还与放大控制端电连接；所述第N行扫描同步电路用于在所述第N-1行扫描电路提供的扫描信号和所述放大控制端提供的放大控制信号的共同控制下，为所述第M行环境光子像素电路的所述第一控制端提供所述第一控制信号；
    第N-1行使能电路的使能输出端与第N行使能同步电路的第一使能输入端电连接，第N+1行使能电路的使能输出端与所述第N行使能同步电路的第二使能输入端电连接，所述第N行使能同步电路的使能同步输出端与所述第M行环境光子像素电路的第三控制端电连接，所述第N行使能同步电路用于在所述第N-1行使能电路提供的使能信号和所述第N+1行使能电路提供的使能信号的控制下，向所述第M行环境光子像素电路的所述第三控制端提供所述第三控制信号。
  3. 根据权利要求2所述的OLED电路，其特征在于，所述子像素包括F种颜色的子像素，所述OLED电路还包括：F个环境光放大电路以及模拟放大电路，F为大于 或等于3的整数；
    所述第N-M+1行扫描同步电路的扫描同步输出端与所述F个环境光放大电路的第二控制端分别电连接，所述第N-M+1行扫描同步电路用于向所述F个环境光放大电路的第二控制端提供第二控制信号，所述F个环境光放大电路用于在所述第二控制信号和来自所述放大控制端的放大控制信号的共同控制下进行重置；
    同一颜色子像素中的所述环境光子像素电路的一级环境光输出端与1个所述环境光放大电路电连接，所述环境光放大电路用于将多行同一颜色子像素中的所述环境光子像素电路，一次或多次采集的一级环境光信号进行积分，生成二级环境光信号；
    所述F个环境光放大电路的二级环境光输出端与所述模拟放大电路电连接，所述F个环境光放大电路还用于在所述第二控制信号和来自所述放大控制端的放大控制信号的共同控制下，将所述二级环境光信号提供给所述模拟放大电路，所述模拟放大电路用于将所述二级环境光信号进行放大，并转换成环境光数据。
  4. 根据权利要求1至3中任一项所述的OLED电路，其特征在于，第M行所述环境光子像素电路包括：环境光重置子电路、光电转换子电路和开关控制子电路，所述环境光重置子电路、所述光电转换子电路和所述开关控制子电路均与第一节点电连接；
    所述环境光重置子电路还与所述第一控制端和重置控制端电连接，所述环境光重置子电路用于在来自所述第一控制端的电压的控制下，将所述重置控制端的电压输入至所述第一节点；
    所述光电转换子电路还与接地端电连接，所述光电转换子电路用于将环境光转换为电压，并提供给所述第一节点；
    所述开关控制子电路还与所述第三控制端和所述一级环境光输出端电连接，所述开关控制子电路用于在所述第N-1行OLED子像素电路、所述第N行OLED子像素电路和所述第N+1行OLED子像素电路均不发光时，在所述第三控制端提供的所述第三控制信号的控制下，由所述一级环境光输出端将所述第一节点处的电压作为所述一级环境光信号输出。
  5. 根据权利要求4所述的OLED电路，其特征在于，所述环境光重置子电路包括第一晶体管；
    所述第一晶体管的栅极与所述第一控制端电连接，所述第一晶体管的第一极与所述重置控制端电连接，所述第一晶体管的第二极与所述第一节点电连接。
  6. 根据权利要求4或5所述的OLED电路，其特征在于，所述光电转换子电路包括光电二极管和第一电容；
    所述光电二极管的第一端与所述第一节点电连接，所述光电二极管的第二端与所述接地端电连接；
    所述第一电容的第一端与所述第一节点电连接，所述第一电容的第二端与所述接地端电连接。
  7. 根据权利要求4至6中任一项所述的OLED电路，其特征在于，所述开关控制子电路包括第二晶体管；
    所述第二晶体管的栅极与所述第三控制端电连接，所述第二晶体管的第一极与所述第一节点电连接，所述第二晶体管的第二极与所述一级环境光输出端电连接。
  8. 根据权利要求2至7中任一项所述的OLED电路，其特征在于，所述第N行使能同步电路包括：第一反相子电路、第二反相子电路、使能同步输出子电路；
    所述第一反相子电路与第一使能输入端、所述使能同步输出子电路电连接，所述第一反相子电路用于在来自所述第一使能输入端的第一使能信号的控制下，将与所述第一使能信号反相的第一反相信号提供给所述使能同步输出子电路，所述第一使能信号为所述第N-1行使能电路的使能输出端提供的使能信号；
    所述第二反相子电路与第二使能输入端、所述使能同步输出子电路电连接，所述第二反相子电路用于在来自所述第二使能输入端的第二使能信号的控制下，将与所述第二使能信号反相的第二反相信号提供给所述使能同步输出子电路，所述第二使能信号为所述第N+1行使能电路的使能输出端提供的使能信号；
    所述使能同步输出子电路还与第一电源电压端、第二电源电压端、使能同步输出端电连接，所述使能同步输出子电路用于在所述第一反相信号和所述第二反相信号的控制下，将所述第一电源电压端提供的所述第一电压或所述第二电源电压端提供的所述第二电压传输给所述使能同步输出端输出。
  9. 根据权利要求8所述的OLED电路，其特征在于，所述第一反相子电路包括第三晶体管和第四晶体管；
    所述第三晶体管的栅极与所述第一使能输入端电连接，所述第三晶体管的第一极与第三电源电压端电连接，所述第三晶体管的第二极与第二节点电连接；
    所述第四晶体管的栅极和所述第二极均与第四电源电压端电连接，所述第四晶体管的第一极与所述第二节点电连接。
  10. 根据权利要求9所述的OLED电路，其特征在于，所述第二反相子电路包括第五晶体管和第六晶体管；
    所述第五晶体管的栅极与所述第二使能输入端电连接，所述第五晶体管的第一极与第三电源电压端电连接，所述第五晶体管的第二极与第三节点电连接；
    所述第六晶体管的栅极和所述第二极均与所述第四电源电压端电连接，所述第六晶体管的第一极与所述第三节点电连接。
  11. 根据权利要求10所述的OLED电路，其特征在于，所述使能同步输出子电路包括第七晶体管、第八晶体管和第九晶体管；
    所述第七晶体管的栅极与所述第二节点电连接，所述第七晶体管的第一极与所述第八晶体管的第二极电连接，所述第七晶体管的第二极与所述第四电源电压端电连接；
    所述第八晶体管的栅极与所述第三节点电连接，所述第八晶体管的第一极与所述使能同步输出端电连接；
    所述第九晶体管的栅极与所述第四电源电压端电连接，所述第九晶体管的第一极与所述第三电源电压端电连接，所述第九晶体管的第二极与所述使能同步输出端电连接。
  12. 根据权利要求2至11中任一项所述的OLED电路，其特征在于，所述第N行扫描同步电路包括：电连接的扫描同步反相子电路和扫描同步输出子电路；
    所述扫描同步反相子电路还与放大控制端、第三电源电压端、第四电源电压端电连接，所述扫描同步反相子电路用于在来自所述放大控制端的放大控制信号的控制下， 将与所述放大控制信号反相的第三反相信号提供给所述扫描同步输出子电路，所述第三反相信号为所述第三电源电压端提供的第三电压或所述第四电源电压端提供的第四电压；
    所述扫描同步输出子电路还与扫描同步输入端、所述第三电源电压端、所述第四电源电压端和扫描同步输出端电连接，所述扫描同步输出子电路用于在所述第三反相信号和来自所述扫描同步输入端的扫描信号的控制下，将所述第三电源电压端提供的第三电压或所述第四电源电压端提供的第四电压传输给所述扫描同步输出端输出。
  13. 根据权利要求12所述的OLED电路，其特征在于，所述扫描同步反相子电路包括：第十二晶体管和第十三晶体管；
    所述第十三晶体管的栅极与所述放大控制信号端电连接，所述第十三晶体管的第一极与所述第三电源电压端电连接，所述第十三晶体管的第二极与所述第十二晶体管的第一极电连接；
    所述第十二晶体管的栅极和第二极均与所述第四电源电压端电连接。
  14. 根据权利要求13所述的OLED电路，其特征在于，所述扫描同步输出子电路包括：第十晶体管、第十一晶体管和第十四晶体管；
    所述第十一晶体管的栅极与所述第四电源电压端电连接，所述第十一晶体管的第一极与所述第三电源电压端电连接，所述第十一晶体管的第二极与所述扫描同步输出端电连接；
    所述第十晶体管的栅极与所述扫描同步输入端电连接，所述第十晶体管的第一极与所述扫描同步输出端电连接，所述第十晶体管的第二极与所述第十四晶体管的第一极电连接；
    所述第十四晶体管的栅极与所述第十三晶体管的第二极电连接，所述第十四晶体管的第二极与所述第四电源电压端电连接。
  15. 根据权利要求3至14中任一项所述的OLED电路，其特征在于，所述环境光放大电路包括：放大重置子电路、积分子电路和放大输出子电路；
    所述放大重置子电路与第二控制端、重置控制端和所述积分子电路电连接，所述放大重置子电路用于在来自所述第二控制端的所述第二控制信号的控制下，将来自所述重置控制端的电压提供给所述积分子电路，对所述积分子电路进行重置；
    所述积分子电路还与多行同一颜色子像素中的环境光子像素电路的一级环境光输出端、以及第一电源电压端、所述放大输出子电路电连接，所述积分子电路用于将所述一级环境光输出端输出的一级环境光信号进行积分，生成二级环境光信号；
    所述放大输出子电路与所述放大控制端和所述二级环境光输出端电连接，所述放大输出子电路用于在来自所述放大控制端的放大控制信号的控制下，将所述二级环境光信号传输给所述二级环境光输出端输出。
  16. 根据权利要求15所述的OLED电路，其特征在于，所述放大重置子电路包括：第十五晶体管；
    所述第十五晶体管的栅极与所述第二控制端电连接，所述第十五晶体管的第一极与所述积分子电路电连接，所述第十五晶体管的第二极与所述重置控制端电连接。
  17. 根据权利要求16所述的OLED电路，其特征在于，所述积分子电路包括：第 三电容和第十六晶体管；
    所述第三电容的第一端与所述第一电源电压端、所述第十六晶体管的第一极电连接，所述第三电容的第二端与多行同一颜色子像素中的所述环境光子像素电路的所述一级环境光输出端电连接，所述第十五晶体管的第一极与所述第十六晶体管的栅极电连接；
    所述第十六晶体管的第二极与所述放大输出子电路电连接。
  18. 根据权利要求17所述的OLED电路，其特征在于，所述放大输出子电路包括：第十七晶体管；
    所述第十七晶体管的栅极与所述放大控制端电连接，所述第十七晶体管的第一极与所述第十六晶体管的第二极电连接，所述第十七晶体管的第二极与所述二级环境光输出端电连接。
  19. 一种OLED显示面板，其特征在于，所述OLED显示面板包括：衬底基板和如权利要求1至18中任一项所述的OLED电路；
    所述OLED电路中的所述OLED子像素电路包括：发光元件；
    所述OLED电路中的所述环境光子像素电路设置在所述衬底基板和所述发光元件之间。
  20. 根据权利要求19所述的OLED显示面板，其特征在于，所述OLED显示面板中的所述OLED子像素电路还包括：OLED子像素驱动电路，所述OLED子像素驱动电路用于驱动所述发光元件发光；
    其中，所述OLED子像素驱动电路和所述环境光子像素电路同层设置。
  21. 一种显示屏，其特征在于，包括如权利要求19或20所述的OLED显示面板。
  22. 一种电子设备，其特征在于，包括如权利要求21所述的显示屏。
PCT/CN2022/143675 2022-04-07 2022-12-30 Oled电路、oled显示面板、显示屏及电子设备 WO2023193489A1 (zh)

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