WO2023185028A1 - 时间码生成电路、时码器及时码器的信号生成方法 - Google Patents

时间码生成电路、时码器及时码器的信号生成方法 Download PDF

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Publication number
WO2023185028A1
WO2023185028A1 PCT/CN2022/134198 CN2022134198W WO2023185028A1 WO 2023185028 A1 WO2023185028 A1 WO 2023185028A1 CN 2022134198 W CN2022134198 W CN 2022134198W WO 2023185028 A1 WO2023185028 A1 WO 2023185028A1
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WIPO (PCT)
Prior art keywords
time code
module
main control
control module
port
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PCT/CN2022/134198
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English (en)
French (fr)
Inventor
李露
谢奕
周向军
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深圳市爱图仕影像器材有限公司
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Application filed by 深圳市爱图仕影像器材有限公司 filed Critical 深圳市爱图仕影像器材有限公司
Publication of WO2023185028A1 publication Critical patent/WO2023185028A1/zh
Priority to US18/396,484 priority Critical patent/US20240129627A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60—Control of cameras or camera modules
    • H04N23/667—Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03B—APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR
    • G03B31/00—Associated working of cameras or projectors with sound-recording or sound-reproducing means
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
    • G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel

Definitions

  • the present invention relates to the technical field of time code synchronization, and in particular to a time code generation circuit, a time coder, and a signal generation method of the time coder.
  • Timecode is a temporal encoding that accurately marks video frames during a shoot, working by counting the exact number of frames from the first to the last video. When counting frames, timecode assigns each frame a unique identifier. Each frame has a label that contains: hours:minutes:seconds:frame values. Generally speaking, the photography process often involves multiple microphones, cameras or video cameras, etc.
  • time code signal can be input to camera equipment, mixing consoles and other equipment to achieve synchronization.
  • the transmission of audio signals is usually involved.
  • the time code device and the audio device are often two independent devices, and the time code signal and the audio signal cannot coexist in the same port at the same time.
  • the value of the time code signal is always fixed. Since the time code signal and audio signal are often close in the circuit, it is difficult to accurately distinguish the two signals. , causing mutual interference, reducing product function accuracy and user efficiency.
  • the technical problem to be solved by the present invention is to provide a time code generation circuit, a time coder and a time coder signal generation method, aiming to solve the technical problem in the prior art that the signals transmitted by the port cannot adapt to different shooting scenes.
  • an embodiment of the present invention provides a time code generation circuit, which includes:
  • timecode switching module is connected to the port
  • An amplitude adjustment module is connected to the time code switching module;
  • Main control module The main control module is connected to the time code switching module and the amplitude adjustment module respectively.
  • the amplitude adjustment module is used to receive the time code signal generated by the main control module and perform amplitude adjustment to generate an amplitude. Different time code signals, the time code switching module is used to receive the time code signal after amplitude adjustment;
  • the main control module is used to receive the first operation input to generate a time code signal and configure the time code signal to be input into the amplitude adjustment module for amplitude adjustment.
  • the amplitude adjusted time code signal Transmitted to the port through the time code switching module.
  • the circuit also includes an audio collection module, the audio collection module is connected to the port and the main control module respectively, the audio collection module collects audio signals, and the The main control module is used to receive a second operation input to control the audio collection module so that the audio signal is transmitted to the port.
  • the main control module is used to receive a third operation input to configure the port to receive an external time code signal, and the external time code signal is input to the main control module by the time code switching module.
  • the audio collection module includes a microphone and a first switch.
  • the microphone is connected to the main control module and the first switch respectively.
  • the first switches are respectively Connected to the port and the main control module, the microphone collects the audio signal, and the main control module controls the first switch to be turned on to transmit the audio signal to the port.
  • the time code switching module is provided with a second switch and a time code constant circuit, and the second switch is connected to the port and the amplitude adjustment module respectively, so
  • the time code constant circuit is electrically connected between the main control module and the second switch.
  • the main control module is used to control the conduction of the second switch to configure the port to input an external time code signal or Output the time code signal after amplitude adjustment.
  • the amplitude of the external time code signal is different from the amplitude of the time code signal after amplitude adjustment.
  • the time code constant circuit is used to receive the external time code signal and output a constant The time code signal is sent to the main control module.
  • the amplitude adjustment module is provided with a potentiometer, and the potentiometer is connected to the time code switching module and the main control module respectively.
  • the main control module controls The potentiometer is used to adjust the amplitude of the time code signal.
  • the amplitude adjustment module is also provided with a buffer, and the buffers are respectively connected to the time code switching module and the main control module.
  • the main control module controls The buffer is used to buffer the time code signal before amplitude adjustment.
  • the amplitude adjustment module is also provided with a follower, the follower is connected to the time code switching module and the main control module respectively, and the main control module controls The follower is used to stably input the amplitude-adjusted time code signal into the time code switching module.
  • the port is any one of a TRRS port, a Typec port, and a USB port.
  • the circuit also includes a working mode switching module, and the first operating input, the second operating input and the third operating input are generated by the working mode switching module (60), and the The working mode switching module is connected to the main control module and is used to drive the main control module to generate a control signal to realize that the port is in a time code signal output mode, or a time code signal and audio signal simultaneous output mode, or a time code signal output mode. Code signal input mode.
  • the working mode switching module is provided with an encoder, the encoder is connected to the main control module, and the main control module uses a switch button on the encoder to The control signal is generated to realize that the port is in a time code signal output mode, a time code signal and an audio signal simultaneous output mode, or a time code signal input mode.
  • an embodiment of the present invention further provides a time coder.
  • the time coder includes a housing and any of the above time code generation circuits.
  • an embodiment of the present invention also provides a signal generation method for a time coder, where the time coder includes the time code generation circuit as described above.
  • the method includes:
  • the main control module After receiving the first operation input, the main control module generates a time code signal according to the first operation input and inputs it into the amplitude adjustment module for amplitude adjustment.
  • the amplitude adjusted time code signal is passed through the The timecode switching module is transmitted to the port;
  • the main control module configures the port to receive an external time code signal according to the third operation input, and the external time code signal is input to the main control module by the time code switching module.
  • Embodiments of the present invention provide a time code generation circuit, a time coder, and a signal generation method for the time coder.
  • a time code generation circuit By setting only one port in the circuit and setting a time code switching module between the main control module and the port, And through the main control module, the time code switching module is controlled to be turned on, so that the external time code signal can be input to the main control module through the port.
  • an amplitude adjustment module is set between the main control module and the time switching module to realize The port can output the time code signal after amplitude adjustment.
  • Figure 1 is a simple schematic diagram of an embodiment of a time code generation circuit provided by an embodiment of the present invention
  • FIG. 2 is a simplified schematic diagram of another embodiment of the time code generation circuit provided by the embodiment of the present invention.
  • Figure 3 is a schematic diagram of an electrical connection port of an audio collection module provided by an embodiment of the present invention.
  • Figure 4 is a schematic diagram of an electrical connection port of a time code switching module provided by an embodiment of the present invention.
  • Figure 5 is a schematic diagram of an amplitude adjustment module provided by an embodiment of the present invention.
  • FIG. 6 is a simplified schematic diagram of another embodiment of the time code generation circuit provided by the embodiment of the present invention.
  • Figure 7 is a schematic diagram of a working mode switching module provided by an embodiment of the present invention.
  • FIG. 8 is a simplified schematic diagram of another embodiment of the time code generation circuit provided by the embodiment of the present invention.
  • FIG. 9 is a schematic diagram of a Bluetooth module provided by an embodiment of the present invention.
  • Figure 10 is a schematic diagram of a radio frequency module provided by an embodiment of the present invention.
  • Figure 11 is a schematic diagram of time code synchronization provided by an embodiment of the present invention.
  • Figure 12 is a schematic diagram of a main control module provided by an embodiment of the present invention.
  • FIG. 13 is a schematic flowchart of an embodiment of a signal generation method for a coder provided by an embodiment of the present invention.
  • Embodiments of the present invention provide a time code generation circuit and time coder. Each is explained in detail below.
  • Time code switching module 20 the time code switching module 20 is connected to the port 10;
  • Amplitude adjustment module 30 the amplitude adjustment module 30 is connected to the time code switching module 20;
  • the main control module 40 is connected to the time code switching module 20 and the amplitude adjustment module 30 respectively.
  • the amplitude adjustment module 30 is used to receive the time code signal generated by the main control module 30 and perform amplitude adjustment to generate Time code signals with different amplitudes can, for example, increase the amplitude to generate a time code signal with a larger amplitude than the original one. Of course, it can also be said to reduce the amplitude of the time code signal.
  • the time code switching The module is used to receive the time code signal after amplitude adjustment.
  • the main control module 40 can be used to control the corresponding work of other modules.
  • the main control module is also used to generate a time code signal.
  • the amplitude adjustment module can be used to receive the time code signal generated from the main control module 40 and adjust its amplitude. , the amplitude of the adjusted time code signal is different from the amplitude of the time code signal directly generated by the main control module 40 , and the amplitude adjustment module 30 can send the adjusted time code signal to the time code switching module.
  • the time code switching module 20 is used to switch the input and/or output of the time code signal. For example, the time code switching module 20 can receive the time code signal adjusted from the amplitude adjustment module and output it to the port 10 .
  • time code switching module 20 is also used to receive external (that is, not generated by the main control module 40 of the time code device) time code signal and send it to the main control module 40 to realize the time of the external time code signal and the main control module 40 Code signal synchronization.
  • the main control module 40 is used to receive a first operation input.
  • the first operation input can be an operation input from a user (such as operating a mechanical physical switch or operating an interactive interface through a touch screen) or automatic machine recognition. Of course, it can also be voice or gesture. , image recognition and other operational inputs. It can be understood that the operation input may include the input/output of time code signals, the output of time code signals and audio signals, or the output of audio signals, etc.
  • the corresponding menu bar of the display screen includes corresponding options.
  • the main control module 40 can obtain different operating inputs from the user so that the port can be in different signal output modes.
  • the first operation input may include a time code signal output mode.
  • the time code signal output mode may be a separate time code signal output or a time code signal and audio signal simultaneous output mode, etc. It can be understood that if the port 10 is in the time code In the signal output mode, or in the simultaneous output mode of time code signal and audio signal, the main control module 40 can generate the time code signal and configure it to be input into the amplitude adjustment module 30 for amplitude adjustment.
  • the time code signal after amplitude adjustment is time-controlled.
  • the code switching module 20 transmits it to the port 10;
  • the main control module 40 can also receive second operation input, third operation input, etc., where each input operation is different, such as different key options or different corresponding menu bars, etc. It can be understood that the main control module 40 The module 40 is used to receive a third operation input to configure the port 10 to receive an external time code signal.
  • the external time code signal is input to the main control module 40 by the time code switching module 20. That is, if the port 10 is in the time code signal In the input mode, the time code signal is transmitted to the time code switching module 20 through the port 10, and then transmitted to the main control module 40 through the time code switching module 20.
  • the time code signal solves the technical problem of the time code signal output at port 10 interfering with the audio signal, greatly improving user efficiency.
  • FIG. 1 is a simplified schematic diagram of a time code generation circuit provided by an embodiment of the present invention.
  • the port 10 can not only be in the time code signal output mode, but also be in the time code signal and audio signal simultaneous output mode, or be in the time code signal input mode, or be in the audio signal output mode.
  • the audio signal can be collected by the audio acquisition module and input to the audio device connected to port 10 through port 10.
  • the time code signal can also be input through port 10 to other devices that can recognize the time code signal.
  • the external time The code signal can also be input to the main control module 40 through the time code switching module 20 through the port 10 .
  • the time code signal when port 10 outputs a time code signal alone, can be an amplitude-adjusted time code; when port 10 outputs a time code signal and an audio signal at the same time, the time code signal can be an amplitude-adjusted time code. signal, thereby reducing the interference of the time code signal on the audio signal.
  • the main control module 40 may be an MCU (central processing unit) chip, and the main control module 40 is electrically connected to other modules through a plurality of pins with different functions. Specifically, one end of the time code switching module 20 is electrically connected to a pin in the main control module 40 , so that the externally generated time code signal is input to the main control module 40 through the time code switching module 20 .
  • MCU central processing unit
  • the main control module 40 can also generate a time code signal and input the time code signal into the amplitude adjustment module 30 for amplitude adjustment; the amplitude adjustment module 30 is electrically connected to multiple pins of the main control module 40 to achieve The main control module 40 transmits the generated time code signal to the amplitude adjustment module 30, and controls the amplitude adjustment module 30 to adjust the amplitude of the time code signal through the main control module 40. The amplitude adjustment module 30 adjusts the amplitude. After the time code signal is input into the time code switching module 20 , the main control module 40 controls the time code switching module 20 to output the amplitude-adjusted time code signal to the port 10 .
  • the time code generation circuit also includes an audio collection module 50.
  • the audio collection module 50 is connected to the port 10 and the main control module 40 respectively. Specifically, one end of the audio collection module 50 is electrically connected to a pin of the main control module 40 .
  • the main control module 40 is used to receive the second operation input to generate a corresponding drive signal and control the audio acquisition module 50 to directly input the audio signal into the port 10 through the pin.
  • the pins of the main control module 40 that are electrically connected to the amplitude adjustment module 30, the time code switching module 20, and the audio collection module 50 are all different.
  • FIG. 3 is a schematic diagram of an electrical connection port of an audio collection module provided by an embodiment of the present invention.
  • the audio collection module 50 includes a microphone MC1 (microphone 1) and a first switch U1.
  • One end of the microphone MC1 (or microphone) is connected to the main control module 40 and the first switch U1 respectively, and the other end of the microphone MC1 (or microphone) is connected to the main control module 40 and the first switch U1 respectively. Grounded; the first switch U1 is connected to the main control module 40 and the port 10 respectively.
  • the microphone MC1 in this embodiment is used to convert the collected sound into audio electronic signals, and the main control module 40 inputs the audio electronic signals into the port 10 by controlling the first switch U1.
  • the microphone MC1 used in the present invention can be a carbon particle type, electromagnetic type, capacitive type, electret capacitive type, piezoelectric crystal type, piezoelectric ceramic type, silicon dioxide type and other types of microphones.
  • the first switch U1 and the second switch U2 used in the present invention can be analog switches or switches controlled by the main control module 40 to achieve conduction.
  • the port 10 can be TRRS (Tip-Ring-Ring-Sleeve). , tip-ring-ring-sleeve) port, Typec (USB-C, Type C Universal Serial Bus) port, USB (Universal Serial Bus, Universal Serial Bus) port, which can be carried out according to the actual situation Selection is not specifically limited in this embodiment.
  • port 10 adopts a TRRS port
  • the first switch U1 is an analog switch.
  • the analog switch may include pin B1, pin VCC (power supply pin), pin SELECT (select pin) and Pin A
  • the audio acquisition module 50 may also include: resistor R1, resistor R2, resistor R3, resistor R4, capacitor C1, capacitor C2, capacitor C3, capacitor C4, capacitor C5, capacitor C6, capacitor C7, capacitor C8.
  • capacitor C5 one end of the parallel connection of capacitor C5, resistor R4 and capacitor C6 is electrically connected to pin B1, and the other end is grounded; one end of microphone MC1 is grounded, and the other end is electrically connected to pin B1 through capacitor C1.
  • the first half of the above circuit The capacitor group can filter the power input to the microphone.
  • the second half of the capacitor group can filter the audio signal collected by the microphone well and reduce signal noise; one end of the parallel connection of capacitor C2, capacitor C3 and capacitor C4 passes through in sequence.
  • the resistor R3 and the capacitor C1 are electrically connected to the pin B1, and the other end is grounded; the resistor R1, the resistor R3 and the capacitor C1 are electrically connected between the pin B1 and a pin of the main control module 40, and the pin B1 is electrically connected in turn.
  • the R terminal is grounded through the bidirectional TVS diode D1, and the R terminal is grounded through the bidirectional TVS diode D2.
  • the main control module 40 When the audio signal passes through the capacitor C1 in the audio acquisition module 50, the main control module 40 enables the pin SELECT at the analog switch, and the pin B1 and the pin A are connected, and the audio signal can pass through the pins B1, Pin A is input to the R end of the TRRS port, and the audio signal is output to other devices through the male header of the TRRS port.
  • FIG. 4 is a schematic diagram of an electrical connection port of a time code switching module provided by an embodiment of the present invention.
  • the time code switching module 20 is provided with a second switch U2.
  • the main control module 40 controls the second switch U2 to be turned on, and the amplitude The adjusted time code signal can be output to port 10 through the second switch U2.
  • the time code switching module 20 also includes a time code constant circuit.
  • the time code constant circuit is electrically connected between the main control module 40 and the second switch U2.
  • the time code constant circuit can receive signals from the port.
  • the external time code signal of 10 the amplitude of the external time code signal and the amplitude of the time code signal after amplitude adjustment can be different, the external time code signal outputs a constant time code signal to the main control module 40 after passing through the time code constant circuit .
  • the time code constant circuit may include R4, R5, R8, C9 and Q1.
  • One end of R4 and R8 is connected to the 3.3v power supply end, R8 and R5 are connected to pin 1 of Q1, and the other end of R5 is connected to Q1.
  • Pin 2, R4 is connected to pin 3 of Q1, C9 is connected between pins 2 and 3 of Q1.
  • the time code constant circuit can also include other peripheral circuits as shown in the figure. It can be understood that when the external time code signal sometimes Too small to be recognized, so setting R4, R5, R8, C9 and Q1 can allow time code signals with specific amplitudes to be recognized. For example, by setting the parameter values of the above components, the amplitude of the external time code signal can be limited to be recognized.
  • the external time code signal when the amplitude of the external time code signal is less than 0.5v, the external time code signal cannot be transmitted to the main control module 40 through the port and is recognized.
  • the amplitude of the external time code signal is greater than 0.5v, such as 2.8v, 3v, 3.3v, 3.5v and other different amplitudes, at this time, a unified and constant output of 3.3v is sent to the main control module 40.
  • the external time code signal can be stably transmitted from the port to the main control module 40 and recognized.
  • R4, R5, R8, C9 and Q1 can also reduce the risk that the external time code signal is directly transmitted to the main control module 40 through the second switch U2, causing the main control module 40 to burn out.
  • port 10 uses a TRRS port
  • the second switch U2 can be an analog switch.
  • the analog switch can include: pin B1, pin B0, pin VCC, pin SELECT, and pin A.
  • the time code switching module 20 may also include a resistor R6, a resistor R7, a resistor R9, a resistor R10, a resistor R11, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C12, a capacitor C13, and an inductor L1.
  • pin B1 is electrically connected to the amplitude adjustment module 30 through resistor R9
  • pin B0 is electrically connected to the base of transistor Q1 through resistor R6, capacitor C10, and through resistor R6, capacitor C10, and resistor R8. , connected to the 3.3V power supply, and connected to the ground through resistor R6, capacitor C10, and R5 in sequence.
  • the collector of transistor Q1 is electrically connected to a pin of the main control module 40.
  • pin A is electrically connected to the L terminal of the TRRS port through the resistor R11, and is also electrically connected to the cathode of the Zener diode DZ1, and the anode of the Zener diode DZ1 is grounded; pin VCC is connected to the 3.3V power supply through the inductor L1.
  • One end of the parallel connection of the capacitor C12 and the capacitor C13 is electrically connected to the pin VCC and the inductor L1 respectively, and the other end is grounded; the pin SELECT is electrically connected to a pin of the main control module 40 , one end of the parallel connection of the resistor R10 and the capacitor C11 is electrically connected to the pin SELECT and a pin of the main control module 40 respectively, and the other end is connected to the ground.
  • the main control module 40 controls the conduction between pin A and pin B0, and the external time code signal passes through the pins in sequence. A.
  • Pin B0 and is input to the main control module 40 through the transistor Q1; when the time code signal generated by the main control module 40 needs to be output to the L end of the TRRS port, the time code signal needs to be output through the main control module 40 It is input to the amplitude adjustment module 30 for amplitude adjustment.
  • the amplitude-adjusted time code signal is output to the pin B1 of the analog switch through the amplitude adjustment module 30.
  • the main control module 40 enables the pin of the analog switch. Pin SELECT, pin B1 and pin A are connected, and the amplitude-adjusted time code signal can be input to the L end of the TRRS port through pin B1 and pin A in sequence.
  • FIG. 5 is a schematic diagram of an amplitude adjustment module provided by an embodiment of the present invention.
  • the amplitude adjustment module 30 is provided with a potentiometer U3.
  • the potentiometer U3 can be electrically connected to the main control module 40 and is used to receive the time code signal from the main control module 40 and adjust the time code.
  • the amplitude of the signal output is preferably a digital potentiometer, but it is not limited to a digital potentiometer.
  • It can also be a wirewound potentiometer, a synthetic carbon film potentiometer, an organic solid core potentiometer, a metallic glass glaze potentiometer, or a conductive potentiometer.
  • Plastic potentiometers, etc. can be selected according to actual conditions, and are not specifically limited in this embodiment.
  • the potentiometer U3 is a digital potentiometer.
  • the digital potentiometer may include: pin SCL (clock input pin), pin SDA (data pin), pin WA (wiper terminal of potentiometer A, The tap of potentiometer A), pin HA (High terminal of potentiometer A, the high end of potentiometer A), pin VDD (Positive power supply pin, positive power supply pin), pin A0, pin A1, pin A2, pin VSS ( Negativepowersupplypin, negative power supply pin), pin LB (Lowterminalof potentiometer B, the low end of the potentiometer B), pin LA (Lowterminalof potentiometer A, the low end of the potentiometer A), pin HB (Highterminalof potentiometer B, the potentiometer The high end of B), pin WB (wiper terminal of potentiometer B, the tap of potentiometer B), among which, pin SCL, pin SDA, and pin HA are each individually
  • the pins A0, A1, A2, and VSS negative power supply pin
  • pin LB low end of potentiometer B
  • pin LA low end of potentiometer A
  • pin HB pin WB
  • the main control module 40 inputs the generated time code signal into the amplitude adjustment module 30
  • the time code signal is input into the digital potentiometer via the pin HA in the amplitude adjustment module 30, and at the same time passes through the pin of the digital potentiometer.
  • SCL and pin SDA control the digital potentiometer to adjust the amplitude of the time code signal.
  • the adjusted time code signal is output to the time code switching module 20 through the pin WA of the digital potentiometer.
  • the main control module 40 controls When the time code switching module 20 is turned on, the amplitude-adjusted time code signal can be output to the port 10 through the time code switching module 20 .
  • the amplitude adjustment module 30 may also include a buffer U4 and a follower U5, where the follower U5 is connected to the potentiometer U3 and the time code respectively.
  • the switching module 20 is connected and arranged between the potentiometer U3 and the time code switching module 20.
  • the buffer U4 is connected to the potentiometer U3 and the main control module 40 respectively.
  • the time code signal generated by the main control module 40 is input to the buffer U4.
  • the adjusted time code is input to the follower U5, and output to the second switch U2 of the time code switching module 20 through the follower U5.
  • the main control module 40 By controlling the second switch U2 to be turned on, the amplitude-adjusted time code signal can be output to port 10 through the second switch U2.
  • the follower U5 can be a voltage follower, which is used as a buffer stage and an isolation stage in the time code generation circuit, and is used to achieve stable input of the amplitude-adjusted time code signal into the time code switching module 20 .
  • the potentiometer U3 is a digital potentiometer
  • the buffer U4 may include pins VCC, pin Y and pin A
  • the follower U5 may include pins 1, 2, and 3. Pin 4 and pin 5.
  • the pin A of the buffer U4 is electrically connected to a pin of the main control module 40.
  • the pin VCC is connected to a 3.3V power supply.
  • pin VCC is grounded through the capacitor C19, and the pin Y is sequentially connected through the resistor R12, Resistor R13 is electrically connected to pin HA of the digital potentiometer; pin 1 of follower U5 is electrically connected to pin WA of the digital potentiometer, pin 2 is connected to ground, and pin 3 is electrically connected to pin 4 through resistor R14.
  • pin 4 is electrically connected to a pin of the second switch U2, pin 4 is grounded through capacitor C16, pin 5 is connected to a 3.3V power supply, and capacitor C14 and capacitor C14 are set between pin 5 and the 3.3V power supply.
  • the main control module 40 can buffer the generated time code signal through the buffer U4, so that the pin HA of the digital potentiometer can receive a stable time code signal. After the time code signal completes the amplitude adjustment in the digital potentiometer, it can be input to the follower U5 through the pin WA of the digital potentiometer, and then input to the second switch U2 through pin 4 of the follower U5. When the main control module 40 controls the second switch U2 to be turned on, the adjusted time code signal can be output to the port 10 through the second switch U2.
  • the time code generation circuit also includes: a working mode switching module 60.
  • the working mode switching module 60 is electrically connected to the main control module 40 to drive the main control module 40 to generate a control signal.
  • the working mode includes: for example, port 10 outputs the amplitude-adjusted time code signal alone; port 10 outputs the audio signal alone; port 10 simultaneously outputs the amplitude-adjusted time code signal and audio signal; port 10 independently inputs time code signal and other modes.
  • the time code signal is input through port 10
  • the time code signal is input into the second switch U2 through the port 10
  • the working mode switching module 60 is provided with an encoder U6, and the encoder U6 is electrically connected to the main control module 40.
  • the main control module 40 only needs to generate a control signal through the pulse signal generated in the encoder U6 to realize that the port 10 is in the time code signal output mode, or the time code signal and audio Simultaneous signal output mode, or time code signal input mode.
  • FIG. 7 is a schematic diagram of a working mode switching module provided by an embodiment of the present invention.
  • encoder U6 includes pin 1, pin 2, pin 3 and pin 4.
  • Pin 1, pin 3 and pin 4 are all connected to a pin of the main control module 40 and The pins are different, pin 2 is connected to ground, pin 1 is connected to the 3.3V power supply through resistor R16, pin 3 is connected to the 3.3V power supply through resistor R17, and pin 4 is connected to the 3.3V power supply through resistor R18.
  • the switch button on the encoder U6 is closed, and the pins 2 and 3 of the encoder U6 change from disconnected to connected, and the main control module 40
  • the control signal is generated through the pulse signals at pin 1 and pin 4 to realize that the port 10 is in the time code signal output mode, or the time code signal and audio signal simultaneous output mode, or the time code signal input mode.
  • the time code generation circuit further includes a display module, and the display module is electrically connected to the main control module 40 .
  • the working mode of the time code generating circuit is displayed in the display module, and the working mode of the time code generating circuit can be switched by operating the encoder U6 in the display module.
  • the display module may further include a first switch tube and a second switch tube. The first switch tube and the second switch tube form a half-bridge driving circuit to drive the display module to work in the display module.
  • the time code generation circuit also includes a wireless module 70 , where the wireless module 70 is connected to the main control module 40 and is used to transmit time code signals to implement communication between devices where the time code generation circuit is located. Synchronization of timecode signals.
  • the wireless module 70 may include a Bluetooth module M1 and a radio frequency module M2.
  • the Bluetooth module M1 and the radio frequency module M2 are both electrically connected to the main control module 40.
  • the Bluetooth module M1 and the radio frequency module M2 can communicate with a terminal device (such as a mobile phone).
  • the terminal device can be installed with an application program and interacted by the user. Operate the application program to determine the master-slave target node between the devices where the time code generation circuit is located, and at the same time transmit or receive time code signals through the radio frequency module M2 to achieve time code synchronization between devices.
  • the Bluetooth module M1 communicates with the terminal device but the radio frequency module M2 does not communicate with the terminal device.
  • the radio frequency module M2 is used to communicate with other devices.
  • RF module on the timecode device to communicate.
  • the Bluetooth module M1 includes: pin RST (reset pin), pin HCI-UART-TX (transmitting pin), pin HCI-UART-RX (receiving pin), pin V -BAT (battery voltage pin), pin VDDIO (chip IO power pin) and pin ANT (antenna pin), pin RST, pin HCI-UART-TX, pin HCI-UART-RX are all connected to the main One pin of the control module 40 is connected and the pins are different.
  • the pin V-BAT After the pin V-BAT is electrically connected to the pin VDDIO, a 3.3V power supply is connected, and one end of the parallel connection between the capacitor C21, the capacitor C22 and the capacitor C23 There is a 3.3V power supply connected, the other end is electrically connected to the pin V-BAT and the pin VDDIO respectively, and the pin ANT is electrically connected to the antenna U7.
  • the pin RST of the Bluetooth module M1 is connected to the main control module 40 to realize the reset of the Bluetooth module M1 through the main control module 40.
  • the pins HCI-UART-TX and HCI-UART-RX of the Bluetooth module M1 are connected to the main control module 40.
  • the main control module 40 is connected to enable the Bluetooth module M1 to communicate with the application program on the terminal device through the main control module 40 .
  • the radio frequency module M2 includes: pin CE (Chip Enable, chip enable), pin CSN (chip select), pin IRQ (Interrupt Request, interrupt request), pin SCK ( Serial peripheral interface clock), pin MISO (Master In Slave Out, host input slave output) and pin MOSI (Master Out Slave In, host output slave input), pin CE, pin CSN, pin IRQ , pin SCK, pin MISO and pin MOSI are all connected to the main control module 40 .
  • the chip selection signal is transmitted through the pin CSN.
  • the pin CE is used to control the working mode of the radio frequency module M2. Its working modes include: receiving mode, sending mode, standby mode, power-down mode, etc.
  • the pin IPQ is used for interrupts. Output low level.
  • the time code generation circuit when multiple devices where the time code generation circuit is located perform synchronization of time code signals, it only needs to communicate with the terminal device (such as a mobile phone) through the Bluetooth module M1 or radio frequency module M2 in device 1.
  • the APP communicates to set device 1 as the device of the target master node from the network system, and sets other time coder devices as devices of the target slave node.
  • Device 1 passes the generated time code signal through its main control module 40 is output to the pin MOSI of the radio frequency module M2, and its main control module 40 also outputs the clock signal to the pin SCK of the radio frequency module M2.
  • the time code signal and the clock signal can pass through the radio frequency module in the device 1 M2 outputs to the radio frequency module M2 of the device where the target slave node is located.
  • the radio frequency module M2 inputs the received time code signal and clock signal to the main control module connected to the radio frequency module M2 through the pin MISO of the radio frequency module M2. 40, and through the main control module 40, the time code signal in the device is synchronized.
  • FIG. 12 is a schematic diagram of a main control module provided by an embodiment of the present invention.
  • the main control module 40 is a single-chip microcomputer MCU.
  • the single-chip microcomputer MCU may include pin PA8 (Pin A8, pin A8), pin PA15 (Pin A15, pin A15), pin PB1 (Pin B1, pin A15).
  • Pin B1 pin PB2 (Pin B2, pin B2), pin PB3 (Pin B3, pin B3), pin PB4 (Pin B4, pin B4), pin PB7 (Pin B7, pin B7 ), pin PB8 (Pin B8, pin B8), pin PB9 (Pin B9, pin B9), pin PC0 (Pin C0, pin C0), pin PC1 (Pin C1, pin C1), Pin PC3 (Pin C3, pin C3), pin PC12 (Pin C12, pin C12), pin PC13 (Pin C13, pin C13), pin PC14-OSC32-IN (pin C14-32 bit Oscillator - input), pin PG9 (Pin G9, pin G9), pin PG10 (Pin G10, pin G10), pin PG13 (Pin G13, pin G13).
  • the pin PB1 is connected to the pin B1 of the analog switch in the audio acquisition module 50 to control the audio acquisition module 50 to output the audio signal in the port 10;
  • the pin PB4 is connected to the pin B0 of the analog switch in the time code switching module 20. are connected to receive the time code signal input by the time code switching module 20;
  • pin PA8 is connected to pin A of the buffer U4 in the amplitude adjustment module 30 to output the time code signal to the amplitude adjustment module 30,
  • the pins PB8 and PB9 are respectively connected to the pins SCL and SDA of the digital potentiometer in the amplitude adjustment module 30 to control the digital potentiometer to adjust the amplitude of the time code signal input in the digital potentiometer.
  • Pin PC3, pin PB3, and pin PA15 are respectively connected to pin 3, pin 4, and pin 1 of encoder U6 in the working mode switching module 60, thereby realizing switching of the working mode of the time code generation circuit;
  • Pin PB2 is connected to the pin RST of the Bluetooth module M1 to reset the Bluetooth module M1.
  • the pins PC0 and pin PC1 are respectively connected to the pins HCI-UART-TX and HCI-UART-RX of the Bluetooth module M1.
  • pins PG13, PC13, PB7, PG9, PG10, and PC12 are respectively connected to the IPQ and pins of the radio frequency module M2.
  • the pin CE, pin CSN, pin SCK, pin MISO and pin MOSI are connected to transmit the time code signal and achieve time code synchronization through the application program.
  • the time code generation circuit may also include a charging module, a charging interface, a voltage conversion module, and a power supply module.
  • the charging module is electrically connected to the charging interface, the voltage conversion module and the main control module 40 respectively
  • the power supply module is electrically connected to the voltage conversion module, the main control module 40, the display module, the radio frequency module M2 and the Bluetooth module M1 respectively.
  • the charging module is provided with a terminal for placing the battery and a charging chip.
  • the voltage conversion module can boost the voltage output by the battery to a preset voltage (for example, 4.4V), and control the main control module 40 and the display module through the power supply module. module, radio frequency module M2 and Bluetooth module M1 for power supply.
  • the charging chip is electrically connected to the charging interface through the socket. At the same time, the charging chip is connected to the terminal to charge the battery in the terminal. At the same time, the charging chip is electrically connected to the main control module 40 to provide power to the time code generation circuit.
  • the charging interface can be the Type-C interface in the USB interface.
  • the power supply module may further include a first power supply module, a second power supply module, and a third power supply module.
  • the first power supply module is electrically connected to the main control module 40 and is used to power the main control module 40
  • the second power supply module is electrically connected to the display module and the Bluetooth module M1, and is used to power the display module and the Bluetooth module M1.
  • the third power supply module is electrically connected to the radio frequency module M2, and is used to power the radio frequency module M2.
  • the timecode generation circuit further includes an upgrade module, which is used to upgrade the interface module.
  • the upgrade module is electrically connected to the main control module 40, and the main control module 40 realizes the upgrade of the interface module by controlling the upgrade module.
  • An embodiment of the present invention also provides a time coder, which includes a housing and any of the above time code generation circuits.
  • the time code generation circuit in the time coder includes:
  • Time code switching module 20 the time code switching module 20 is connected to the port 10;
  • Amplitude adjustment module 30 the amplitude adjustment module 30 is connected to the time code switching module 20;
  • the main control module 40 is connected to the time code switching module 20 and the amplitude adjustment module 30 respectively;
  • the main control module 40 inputs the time code signal into the amplitude adjustment module 30 for amplitude adjustment, and the time after amplitude adjustment
  • the code signal is transmitted to the port 10 through the time code switching module 20;
  • the time code signal is transmitted to the time code switching module 20 through the port 10 and transmitted to the main control module 40 through the time code switching module 20 .
  • the time coder of the embodiment of the present invention only has one port 10 in the circuit, and a time code switching module 20 is set between the main control module 40 and the port, and the time code switching module 20 is controlled by the main control module 40 is turned on, realizing that the external time code signal can be input into the main control module 40 through the port 10, and at the same time, an amplitude adjustment module 30 is set between the main control module 40 and the time code switching module 20, realizing that the port 10 can Outputting the amplitude-adjusted time code signal solves the technical problem of the time code signal output at port 10 interfering with the audio signal, greatly improving user efficiency.
  • the embodiment of the present application also provides a signal generation method for a time coder.
  • the time coder includes the above Time code generation circuit, as shown in Figure 13, the method includes the following steps:
  • the main control module 40 receives the first operation input.
  • the main control module 40 generates a time code signal according to the first operation input and inputs it into the amplitude adjustment module 30 for amplitude adjustment.
  • the amplitude adjusted time code signal is passed through the time code switching module. 20 is transmitted to port 10;
  • the main control module 40 configures the port 10 to receive an external time code signal according to the third operation input.
  • the external time code signal is input to the time code switching module 20.
  • Main control module 40 Main control module 40.
  • first, second and third input operations may correspond to different signal output modes.
  • the specific output modes may be referred to the description of the above embodiments and will not be described again here.
  • the order of the above steps does not limit the order. The user can independently select the corresponding working mode and select the corresponding input operation.
  • each of the above units or structures can be implemented as an independent entity, or can be combined in any way and implemented as the same or several entities.
  • each of the above units or structures please refer to the previous method embodiments. Here No longer.

Abstract

本发明实施例公开了一种时间码生成电路、时码器及时码器的信号生成方法，其电路包括：端口；时间码切换模块，时间码切换模块与端口连接；幅值调节模块，幅值调节模块与时间码切换模块连接；主控模块，主控模块分别与时间码切换模块、幅值调节模块连接，幅值调节模块用于接收主控模块产生的时间码信号并进行幅值调节以生成幅值不同的时间码信号，时间码切换模块用于接收幅值调节后的时间码信号；其中，所述主控模块用于接收第一操作输入以产生时间码信号并配置所述时间码信号输入至所述幅值调节模块中进行幅值调节，幅值调节后的所述时间码信号经所述时间码切换模块传输至所述端口中。

Description

时间码生成电路、时码器及时码器的信号生成方法 技术领域
本发明涉及时间码同步技术领域，尤其涉及一种时间码生成电路、时码器及时码器的信号生成方法。
背景技术
时间码是一种在拍摄中精确标记视频帧的时间编码，其通过计算第一个至最后一个视频确切帧数进行工作。在对帧进行计数时，时间码为每个帧分配一个唯一的标识符。每个帧都有一个标签，其包含：时:分:秒:帧的值。一般来说摄影过程中往往会涉及多台麦克风、相机或摄影机等等。
在上述场景中，例如麦克风或者摄像设备自身往往都不具备时间码功能，所以通过额外的时码器来输出时间码信号，此时间码信号可以输入到摄像设备、混音台等设备中实现对设备间的时间码同步，以便更好地对视频、音频等进行剪辑。然而，随着拍摄场景发生变化时，通常会涉及到音频信号的传输，通常时间码设备和音频设备往往是两个独立的设备，同一端口中无法同时实现时间码信号与音频信号共存。当采用同一条传输线路进行时间码信号与音频信号的传输时，此时间码信号的值始终为固定的，由于时间码信号和音频信号在电路中往往较为接近，导致两种信号较难准确区分，造成相互干扰，降低产品功能准确性以及用户的使用效率。
发明内容
本发明要解决的技术问题是提供一种时间码生成电路、时码器及时码器的信号生成方法，旨在解决现有技术中端口传输的信号无法适应不同拍摄场景的技术问题。
第一方面，本发明实施例提供一种时间码生成电路，其包括：
端口；
时间码切换模块，所述时间码切换模块与所述端口连接；
幅值调节模块，所述幅值调节模块与所述时间码切换模块连接；以及
主控模块，所述主控模块分别与所述时间码切换模块、所述幅值调节模块连接，幅值调节模块用于接收主控模块产生的时间码信号并进行幅值调节以生成幅值不同的时间码信号，时间码切换模块用于接收幅值调节后的时间码信号；
其中，所述主控模块用于接收第一操作输入以产生时间码信号并配置所述时间码信号输入至所述幅值调节模块中进行幅值调节，幅值调节后的所述时间码信号经所述时间码切换模块传输至所述端口中。
其中，在所述的时间码生成电路中，所述电路还包括音频采集模块，所述音频采集模块分别与所述端口、所述主控模块连接，所述音频采集模块采集音频信号，所述主控模块用于接收第二操作输入以控制所述音频采集模块以使得 所述音频信号传输至所述端口中。
其中，所述主控模块用于接收第三操作输入以配置所述端口接收外部时间码信号，所述外部时间码信号由所述时间码切换模块输入至所述主控模块。
其中，在所述的时间码生成电路中，所述音频采集模块包括咪头和第一开关，所述咪头分别与所述主控模块、所述第一开关连接，所述第一开关分别与所述端口、所述主控模块连接，所述咪头采集所述音频信号，所述主控模块控制所述第一开关导通以将所述音频信号传输至所述端口中。
其中，在所述的时间码生成电路中，所述时间码切换模块中设置有第二开关和时间码恒定电路，所述第二开关分别与所述端口以及所述幅值调节模块连接，所述时间码恒定电路电性连接与所述主控模块和所述第二开关之间，所述主控模块用于控制所述第二开关导通，以配置所述端口输入外部时间码信号或输出幅值调节后的所述时间码信号，外部时间码信号的幅值和幅值调节后的所述时间码信号幅值不同，所述时间码恒定电路用于接收外部时间码信号并输出恒定的时间码信号发送给所述主控模块。
其中，在所述的时间码生成电路中，所述幅值调节模块中设置有电位器，所述电位器分别与所述时间码切换模块、所述主控模块连接，所述主控模块控制所述电位器以实现调节所述时间码信号的幅值。
其中，在所述的时间码生成电路中，所述幅值调节模块中还设置有缓冲器，所述缓冲器分别连接所述时间码切换模块、所述主控模块，所述主控模块控制所述缓冲器以实现对幅值调节前的所述时间码信号进行缓冲。
其中，在所述的时间码生成电路中，所述幅值调节模块中还设置有跟随器，所述跟随器分别连接所述时间码切换模块、所述主控模块，所述主控模块控制所述跟随器以实现幅值调节后的所述时间码信号稳定的输入至所述时间码切换模块中。
其中，在所述的时间码生成电路中，所述端口为TRRS端口、Typec端口、USB端口中的任意一种。
其中，在所述的时间码生成电路中，所述电路还包括工作模式切换模块，第一操作输入、第二操作输入以及第三操作输入由所述工作模式切换模块(60)产生，所述工作模式切换模块与所述主控模块连接，并用于驱动所述主控模块产生控制信号，以实现所述端口处于时间码信号输出模式、或时间码信号和音频信号同时输出模式、又或时间码信号输入模式。
其中，在所述的时间码生成电路中，所述工作模式切换模块中设置有编码器，所述编码器与所述主控模块连接，所述主控模块通过所述编码器上的开关按键产生所述控制信号，以实现所述端口处于时间码信号输出模式、或时间码信号和音频信号同时输出模式、又或时间码信号输入模式。
第二方面，本发明实施例还提供一种时码器，时码器包括壳体以及上述任一项所述的时间码生成电路。
第三方面，本发明实施例还提供一种时码器的信号生成方法，所述时码器包括如上所述的时间码生成电路，该方法包括：
开启主控模块的电源开关；
接收第一操作输入，所述主控模块根据所述第一操作输入产生时间码信号并输入至所述幅值调节模块中进行幅值调节，幅值调节后的所述时间码信号经 所述时间码切换模块传输至所述端口中；
接收第二操作输入，所述主控模块根据所述第二操作输入以控制音频采集模块的音频信号传输至所述端口中；
接收第三操作输入，所述主控模块根据所述第三操作输入配置所述端口接收外部时间码信号，所述外部时间码信号由所述时间码切换模块输入至所述主控模块。
本发明实施例提供了一种时间码生成电路、时码器及时码器的信号生成方法，通过在电路中仅设置一个端口，并在主控模块与端口之间设置了一个时间码切换模块，并通过主控模块控制时间码切换模块导通，实现了外部的时间码信号可通过端口输入至主控模块中，同时在主控模块与时间切换模块之间设置一个幅值调节模块，实现了端口处可输出幅值调节后的时间码信号。
附图说明
为了更清楚地说明本发明实施例技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的时间码生成电路一实施例简易示意图；
图2为本发明实施例提供的时间码生成电路另一实施例简易示意图；
图3为本发明实施例提供的音频采集模块电性连接端口的一实施例示意图；
图4为本发明实施例提供的时间码切换模块电性连接端口的一实施例示意图；
图5为本发明实施例提供的幅值调节模块的一实施例示意图；
图6为本发明实施例提供的时间码生成电路另一实施例简易示意图；
图7为本发明实施例提供的工作模式切换模块的一实施例示意图；
图8为本发明实施例提供的时间码生成电路另一实施例简易示意图；
图9为本发明实施例提供的蓝牙模块的一实施例示意图；
图10为本发明实施例提供的射频模块的一实施例示意图；
图11为本发明实施例提供的时间码同步的示意图；
图12为本发明实施例提供的主控模块的一实施例示意图；
图13为本发明实施例提供的码器的信号生成方法的一实施例流程示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
应当理解，当在本说明书和所附权利要求书中使用时，术语“包括”和“包含”指示所描述特征、整体、步骤、操作、元素和/或组件的存在，但并不排除一个或多个其它特征、整体、步骤、操作、元素、组件和/或其集合的存在或添加。
还应当理解，在此本发明说明书中所使用的术语仅仅是出于描述特定实施例的目的而并不意在限制本发明。如在本发明说明书和所附权利要求书中所使 用的那样，除非上下文清楚地指明其它情况，否则单数形式的“一”、“一个”及“该”意在包括复数形式。
还应当进一步理解，在本发明说明书和所附权利要求书中使用的术语“和/或”是指相关联列出的项中的一个或多个的任何组合以及所有可能组合，并且包括这些组合。
本发明实施例提供一种时间码生成电路及时码器。以下分别进行详细说明。
本发明实施例提供的时间码生成电路可以包括：
端口10；
时间码切换模块20，时间码切换模块20与端口10连接；
幅值调节模块30，幅值调节模块30与时间码切换模块20连接；以及
主控模块40，主控模块40分别与时间码切换模块20、幅值调节模块30连接，幅值调节模块30用于接收所述主控模块30产生的时间码信号并进行幅值调节以生成幅值不同的时间码信号，例如可以是将幅值增大从而生成比原先幅值更大的时间码信号，当然也可以说对时间码信号的幅值减小处理等，所述时间码切换模块用于接收幅值调节后的时间码信号。
可以理解，主控模块40可用于控制其它模块对应工作，主控模块还用于产生时间码信号，幅值调节模块可用于接收来自主控模块40产生的时间码信号并对其进行幅值调节，调节后的时间码信号的幅值和主控模块40直接产生的时间码信号的幅值不同，幅值调节模块30可将幅值调节后的时间码信号发送给时间码切换模块。时间码切换模块20用于切换时间码信号的输入和/或输出，例如时间码切换模块20可以接收来自幅值调节模块调节的时间码信号并输出至端口10。当然时间码切换模块20还用于接收外部(即非本时间码设备的主控模块40产生的)时间码信号并发送到主控模块40中，实现外部时间码信号和主控模块40的时间码信号的同步。
其中，主控模块40用于接收第一操作输入，第一操作输入可以是来自用户的操作输入(例如操作机械物理开关或者通过触摸屏操作交互界面)或者机器自动识别，当然也可以说语音、手势、图像识别等操作输入。可以理解，操作输入可以包括时间码信号的输入/输出，时间码信号和音频信号的输出，或者音频信号的输出等等，例如显示屏对应菜单栏包括对应的选项，用户选择确定了对应选项后即可进入对应的工作(信号输入/输出)模式，即主控模块40获取用户不同的操作输入可以使得端口处于不同的信号输出模式。例如第一操作输入可以包括时间码信号输出模式，此时时间码信号输出模式可以是单独的时间码信号输出或者时间码信号和音频信号同时输出模式等等，可以理解，若端口10处于时间码信号输出模式、或时间码信号和音频信号同时输出模式，主控模块40可产生时间码信号并配置其输入至幅值调节模块30中进行幅值调节，幅值调节后的时间码信号经时间码切换模块20传输至端口10中；
在一些实施例中，主控模块40还可以接收第二操作输入、第三操作输入等等，其中各输入操作各不相同，例如按键选项不同或者对应菜单栏不同等等，可以理解，主控模块40用于接收第三操作输入以配置端口10接收外部时间码信号，所述外部时间码信号由所述时间码切换模块20输入至所述主控模块40，即若端口10处于时间码信号输入模式，时间码信号经端口10传输至时间码切换模块20中，并经时间码切换模块20传输至主控模块40中。可以理解，通过 在电路中仅设置一个端口10，并在主控模块40与端口10之间设置了一个时间码切换模块20，并通过主控模块40控制时间码切换模块20导通，实现了外部的时间码信号可通过端口10输入至主控模块40中，同时在主控模块40与时间码切换模块20之间设置一个幅值调节模块30，实现了端口10处可输出幅值调节后的时间码信号，解决了端口10处输出的时间码信号干扰音频信号的技术问题，极大的提高了用户的使用效率。
请参阅图1所示，图1为本发明实施例提供的时间码生成电路一实施例简易示意图。在图1中，端口10不仅可以处于时间码信号输出模式，还可以处于时间码信号和音频信号同时输出模式，又或处于时间码信号输入模式，又或处于音频信号输出模式。其中，音频信号可以由音频采集模块采集，并由端口10输入至与端口10相连接的音频设备中，时间码信号也可通过端口10输入至其他能识别时间码信号的设备中，同时外部时间码信号也可通过端口10，经时间码切换模块20输入至主控模块40中。另外，当端口10单独输出时间码信号时，时间码信号可为幅值调节后的时间码；当端口10同时输出时间码信号和音频信号时，时间码信号可为幅值调节后的时间码信号，从而降低了时间码信号对音频信号的干扰。
其中，主控模块40可为MCU(中央处理)芯片，主控模块40通过多个不同功能的引脚与其他模块进行电性连接。具体的，时间码切换模块20的一端与主控模块40中的一个引脚电性连接，以实现外部产生的时间码信号经时间码切换模块20输入至主控模块40中。同时主控模块40还可产生时间码信号并将时间码信号输入至幅值调节模块30中进行幅值调节；幅值调节模块30与主控模块40的多个引脚电性连接，以实现主控模块40将产生的时间码信号传输至幅值调节模块30中，并通过主控模块40控制幅值调节模块30对时间码信号进行幅值调节，幅值调节模块30将幅值调节后的时间码信号输入至时间码切换模块20中后，主控模块40控制时间码切换模块20，以将幅值调节后的时间码信号输出至端口10中。
在一实施例中，如图2所示，该时间码生成电路中还包括音频采集模块50，音频采集模块50分别与端口10、主控模块40连接。具体的，音频采集模块50的一端与主控模块40的一个引脚电性连接。音频采集模块50采集到音频信号后，主控模块40用于接收第二操作输入以产生相应的驱动信号并通过该引脚控制音频采集模块50将音频信号直接输入至端口10中。其中，本实施例中主控模块40中与幅值调节模块30、时间码切换模块20、音频采集模块50进行电性连接的引脚均不相同。
请参考图3，图3为本发明实施例提供的音频采集模块电性连接端口的一实施例示意图。如图3所示，音频采集模块50包括咪头MC1(microphone1，麦克风1)和第一开关U1，咪头MC1(或麦克风)的一端分别与主控模块40、第一开关U1连接，另一端接地；第一开关U1分别与主控模块40、端口10连接。本实施例中的咪头MC1用于将采集到的声音转换成音频电子信号，主控模块40通过控制第一开关U1将音频电子信号输入至端口10中。
需要说明的是，本发明所采用的咪头MC1可以为炭精粒式、电磁式、电容式、驻极体电容式、压电晶体式、压电陶瓷式、二氧化硅式等类型的咪头，本发明所采用的第一开关U1、第二开关U2可以为模拟开关，还可以为由主控模 块40控制以实现导通的开关，端口10可以为TRRS(Tip-Ring-Ring-Sleeve,尖-环-环-套)端口、Typec(USB-C,C类型通用串行总线)端口、USB(Universal Serial Bus，通用串行总线)端口中的任意一种，其可根据实际情况进行选择，本实施例中不做具体限定。
在图3所示的实施例中，端口10采用TRRS端口，第一开关U1为模拟开关，该模拟开关可包括引脚B1、引脚VCC(供电电源脚)、引脚SELECT(选择脚)和引脚A，音频采集模块50还可包括：电阻R1、电阻R2、电阻R3、电阻R4、电容C1、电容C2、电容C3、电容C4、电容C5、电容C6、电容C7、电容C8。
其中，电容C5、电阻R4以及电容C6并联后的一端与引脚B1电性连接，另一端接地；咪头MC1的一端接地，另一端通过电容C1与引脚B1电性连接，上述电路前半部的电容组可以对输入至咪头的电源进行滤波，后半部电容组可以对咪头采集到的音频信号进行良好滤波，降低信号杂音；电容C2、电容C3、电容C4并联后的一端依次通过电阻R3、电容C1与引脚B1电性连接，另一端接地；引脚B1与主控模块40的一个引脚之间电性连接有电阻R1、电阻R3以及电容C1，同时引脚B1依次电性连接电容C1、电阻R2后，接入3.3V电源；引脚A通过电容C7与TRRS端口的R端电性连接；引脚VCC接入3.3V电源，同时通过电容C8接地；TRRS端口的L端通过双向TVS二极管D1接地，R端通过双向TVS二极管D2接地。当音频信号通过音频采集模块50中的电容C1后，主控模块40使能模拟开关处的引脚SELECT，引脚B1与引脚A之间导通，音频信号便可依次通过引脚B1、引脚A输入至TRRS端口的R端，并通过TRRS端口的公头将音频信号输出至其他设备中。
请参考图4，图4为本发明实施例提供的时间码切换模块电性连接端口的一实施例示意图。如图4所示，时间码切换模块20中设置有第二开关U2，其中，时间码信号经幅值调节模块30进行幅值调节后，主控模块40控制第二开关U2导通，幅值调节后的时间码信号便可经第二开关U2输出至端口10处。当然，时间码切换模块20还包括时间码恒定电路，所述时间码恒定电路电性连接与所述主控模块40和所述第二开关U2之间，所述时间码恒定电路可接收来自端口10的外部时间码信号，外部时间码信号的幅值和幅值调节后的时间码信号幅值可不同，外部时间码信号经过时间码恒定电路后输出恒定的时间码信号到主控模块40中。
可以理解，时间码恒定电路可包括R4、R5、R8、C9以及Q1，R4和R8的一端连接到3.3v供电端，R8和R5连接到Q1的管脚1，R5的另一端连接到Q1的管脚2，R4连接到Q1的管脚3，C9连接在Q1的管脚2和3之间，当然时间码恒定电路还可包如图的其它外围电路，可以理解，当外部时间码信号有时过小，无法被识别，因而设置R4、R5、R8、C9以及Q1等可以让特定幅值的时间码信号能够得到识别，例如通过设置上述元件的参数值可以限定识别外部时间码信号的幅值，例如当外部时间码信号的幅值小于0.5v时，该外部时间码信号无法由端口传输到主控模块40而被识别，当外部时间码信号的幅值大于0.5v时，例如2.8v、3v，3.3v、3.5v等等不同幅值时，此时统一恒定输出3.3v到主控模块40，该外部时间码信号能够稳定地由端口传输到主控模块40而被识别，在一些实施例中，R4、R5、R8、C9以及Q1还可以降低外部时间码信号直接通过第 二开关U2传输至主控模块40内导致主控模块40烧坏的风险。
在图4所示的实施例中，端口10采用TRRS端口，第二开关U2可为模拟开关，该模拟开关可包括：引脚B1、引脚B0、引脚VCC、引脚SELECT和引脚A，时间码切换模块20中还可包括电阻R6、电阻R7、电阻R9、电阻R10、电阻R11、电容C9、电容C10、电容C11、电容C12、电容C13、电感L1。
其中，引脚B1通过电阻R9与幅值调节模块30电性连接，引脚B0依次通过电阻R6、电容C10与三极管Q1的基极电性连接，并依次通过电阻R6、电容C10、电阻R8后，接入3.3V电源，同时依次通过电阻R6、电容C10、R5接地，三极管Q1的集电极与主控模块40的一个引脚电性连接，该引脚通过电阻R4接入3.3V电源，同时通过电容C9接地，三极管Q1的发射极接地；引脚A通过电阻R11与TRRS端口的L端电性连接，同时与稳压二极管DZ1的负极电性连接，稳压二极管DZ1的正极接地；引脚VCC通过电感L1接入3.3V电源，电容C12与电容C13并联后的一端分别与引脚VCC、电感L1电性连接，另一端接地；引脚SELECT与主控模块40的一个引脚电性连接，电阻R10与电容C11并联后的一端分别与引脚SELECT、主控模块40的一个引脚电性连接，另一端接地。当外部的时间码信号通过TRRS端口的L端输入至该模拟开关的引脚A处时，主控模块40控制引脚A与引脚B0之间导通，外部的时间码信号依次经过引脚A、引脚B0，并通过三极管Q1输入至主控模块40中；当需要将主控模块40产生的时间码信号输出至TRRS端口的L端处时，需通过主控模块40将时间码信号输入至幅值调节模块30中进行幅值调节，幅值调节后的时间码信号经幅值调节模块30输出至该模拟开关的引脚B1处，此时主控模块40使能模拟开关的引脚SELECT，引脚B1与引脚A之间导通，幅值调节后的时间码信号便可依次引脚B1、引脚A输入至TRRS端口的L端处。
请参考图5，图5为本发明实施例提供的幅值调节模块的一实施例示意图。如图5所示，幅值调节模块30中设置有电位器U3，电位器U3可与主控模块40的电性连接，并用于接收来自主控模块40的时间码信号且调节所述时间码信号输出的幅值。其中，本发明中的电位器U3优选数字电位器，但不仅仅局限于数字电位器，还可以为线绕电位器、合成碳膜电位器、有机实芯电位器、金属玻璃釉电位器、导电塑料电位器等，其可根据实际情况进行选择，本实施例中不做具体限定。
在图5所示的实施例中，电位器U3为数字电位器，该数字电位器可包括：引脚SCL(时钟输入脚)、引脚SDA(数据脚)、引脚WA(wiperterminalof potentiometer A,电位器A的抽头)、引脚HA(Highterminalof potentiometer A，电位器A的高端)、引脚VDD(Positivepowersupplypin，正极电源引脚)、引脚A0、引脚A1、引脚A2、引脚VSS(Negativepowersupplypin，负极电源引脚)、引脚LB(Lowterminalof potentiometer B，电位器B的低端)、引脚LA(Lowterminalof potentiometer A，电位器A的低端)、引脚HB(Hightterminalof potentiometer B，电位器B的高端)、引脚WB(wiperterminalofpotentiometerB，电位器B的抽头)，其中，引脚SCL、引脚SDA、引脚HA均各自单独电性连接主控模块40中的一个引脚且引脚不同，引脚WA与时间码切换模块20电性连接，引脚VDD通过电感L2接入3.3V电源，同时分别通过电容C17、电容C18接地，引脚A0、引脚A1、引脚A2、引脚VSS(负极电源引脚)、引脚LB (电位计B的低端)、引脚LA(电位计A的低端)、引脚HB、引脚WB均接地。当主控模块40将产生的时间码信号输入至幅值调节模块30中时，时间码信号在幅值调节模块30中经引脚HA输入至数字电位器中，同时通过数字电位器的引脚SCL、引脚SDA以控制数字电位器调节时间码信号的幅值，幅值调节后的时间码信号经数字电位器的引脚WA输出至时间码切换模块20处，此时主控模块40控制时间码切换模块20导通，幅值调节后的时间码信号便可经时间码切换模块20输出至端口10处。
在上述实施例中，幅值调节模块30中除了包括电位器U3之外，幅值调节模块30中还可包括缓冲器U4和跟随器U5，其中，跟随器U5分别与电位器U3、时间码切换模块20连接并设置在电位器U3与时间码切换模块20之间，缓冲器U4分别与电位器U3、主控模块40相连接，主控模块40产生的时间码信号通过缓冲器U4输入至电位器U3中，并进行幅值调节，幅值调节后的时间码输入至跟随器U5中，并通过跟随器U5输出至时间码切换模块20的第二开关U2处，此时主控模块40控制第二开关U2导通，幅值调节后的时间码信号便可经第二开关U2输出至端口10处。
具体的，跟随器U5可为电压跟随器，其在时间码生成电路中用作缓冲级及隔离级，并用于实现幅值调节后的时间码信号稳定输入至时间码切换模块20中。
在图5所示的实施例中，电位器U3为数字电位器，缓冲器U4可包括引脚VCC、引脚Y以及引脚A，跟随器U5可包括引脚1、引脚2、引脚3、引脚4以及引脚5。其中，缓冲器U4的引脚A与主控模块40的一个引脚电性连接，引脚VCC接入有3.3V电源，同时引脚VCC通过电容C19接地，引脚Y依次通过滴电阻R12、电阻R13与数字电位器的引脚HA电性连接；跟随器U5的引脚1与数字电位器的引脚WA电性连接，引脚2接地，引脚3通过电阻R14与引脚4电性连接，引脚4与第二开关U2的一个引脚电性连接，引脚4通过电容C16接地，引脚5接入有3.3V电源，同时引脚5与3.3V电源之间设置电容C14和电容C15，电容C14与电容C15并联后的一端接地，另一端分别与引脚5电性连接并接入3.3V电源。主控模块40可将产生的时间码信号通过缓冲器U4进行缓冲，以实现数字电位器的引脚HA处接受稳定的时间码信号。当时间码信号在数字电位器中完成幅值调节后，便可经数字电位器的引脚WA输入至跟随器U5中，并经跟随器U5的引脚4输入至第二开关U2中，此时主控模块40控制第二开关U2导通，幅值调节后的时间码信号便可通过第二开关U2输出至端口10处。
在另一实施例中，如图6所示，时间码生成电路中还包括：工作模式切换模块60，工作模式切换模块60与主控模块40电性连接，以驱动主控模块40产生控制信号，以实现切换时间码生成电路的工作模式，其工作模式包括：例如，端口10单独输出幅值调节后的时间码信号；端口10单独输出音频信号；端口10同时输出幅值调节后的时间码信号和音频信号；端口10单独输入时间码信号等模式。其中，当时间码信号经端口10输入时，时间码信号经端口10输入至第二开关U2中，并经第二开关U2输入至主控模块40中。
在一些实施例中，工作模式切换模块60中设置有编码器U6，编码器U6与主控模块40电性连接。当需要对时间码生成电路的工作模式进行切换时，主控模块40只需通过编码器U6中生成的脉冲信号产生控制信号，以实现端口10处 于时间码信号输出模式、或时间码信号和音频信号同时输出模式、又或时间码信号输入模式。
请参考图7，图7为本发明实施例提供的工作模式切换模块的一实施例示意图。如图7所示，编码器U6包括引脚1、引脚2、引脚3以及引脚4，引脚1、引脚3以及引脚4均与主控模块40的一个引脚相连接且引脚不相同，引脚2接地，引脚1通过电阻R16接入3.3V电源，引脚3通过电阻R17接入3.3V电源，引脚4通过电阻R18接入3.3V电源。其中，当在编码器U6上选择时间码生成电路的工作模式后，闭合编码器U6上的开关按键，编码器U6的引脚2和引脚3由断开变为导通，主控模块40通过引脚1、引脚4处的脉冲信号产生控制信号，以实现端口10处于时间码信号输出模式、或时间码信号和音频信号同时输出模式、又或时间码信号输入模式。
在其他发明实施例中，时间码生成电路还包括显示模块，显示模块与主控模块40电性连接。时间码生成电路的工作模式在显示模块中进行显示，通过在显示模块中操作编码器U6便可实现时间码生成电路的工作模式的切换。其中，显示模块还可以包括第一开关管和第二开关管，第一开关管和第二开关管组成半桥驱动电路以在显示模块中驱动显示模块工作。
在一些实施例中，如图8所示，时间码生成电路中还包括无线模块70，其中无线模块70与主控模块40连接，并用于传输时间码信号以实现时间码生成电路所在设备之间的时间码信号的同步。
在一些实施例中，无线模块70可包括蓝牙模块M1和射频模块M2。其中，蓝牙模块M1、射频模块M2均与主控模块40电性连接，蓝牙模块M1、射频模块M2均可以与终端设备(例如手机)上进行通信，终端设备可以安装有应用程序，由用户交互操作应用程序以确定时间码生成电路所在设备之间的主从目标节点，同时通过射频模块M2传输或接收时间码信号以实现设备之间的时间码同步。在一些实施例中，为了提升时间码同步的效率，降低时间码同步的冲突或延时，蓝牙模块M1与终端设备进行通信而射频模块M2不与终端设备通信，射频模块M2用于与其它的时间码设备上的射频模块进行通信。
请参考图9，图9为本发明实施例提供的蓝牙模块的一实施例示意图。在图9所示的实施例中，蓝牙模块M1包括：引脚RST(复位脚)、引脚HCI-UART-TX(发射脚)、引脚HCI-UART-RX(接收脚)、引脚V-BAT(电池电压脚)、引脚VDDIO(芯片IO电源引脚)以及引脚ANT(天线脚)，引脚RST、引脚HCI-UART-TX、引脚HCI-UART-RX均分别与主控模块40的一个引脚相连接且引脚不相同，引脚V-BAT与引脚VDDIO电性连接后，接入有3.3V电源，电容C21、电容C22以及电容C23之间并联后的一端接入有3.3V电源，另一端分别与引脚V-BAT、引脚VDDIO电性连接，引脚ANT与天线U7电性连接。其中，蓝牙模块M1的引脚RST与主控模块40相连接以通过主控模块40实现对蓝牙模块M1的复位，蓝牙模块M1的引脚HCI-UART-TX、引脚HCI-UART-RX与主控模块40相连接以通过主控模块40实现蓝牙模块M1与终端设备上的应用程序进行通信。
请参考图10，图10为本发明实施例提供的射频模块的一实施例示意图。在图10所示的实施例中，射频模块M2包括：引脚CE(Chip Enable，芯片使能)、引脚CSN(片选)、引脚IRQ(Interrupt Request，中断请求)、引脚SCK(串行外 围接口时钟)、引脚MISO(Master In Slave Out，主机输入从机输出)以及引脚MOSI(Master Out Slave In，主机输出从机输入)，引脚CE、引脚CSN、引脚IRQ、引脚SCK、引脚MISO以及引脚MOSI均与主控模块40相连接。其中，选片信号通过引脚CSN进行传输，引脚CE用于控制射频模块M2的工作模式，其工作模式包括：接收模式、发送模式、待机模式、掉电模式等，引脚IPQ用于中断输出低电平。
具体的，如图11所示，当时间码生成电路所在的多个设备进行时间码信号的同步时，只需通过设备1中的蓝牙模块M1或射频模块M2与终端设备(例如手机)上的APP进行通信，以从网络系统中将设备1设定为目标主节点的设备，并将其他时码器设备设定为目标从节点的设备，设备1将生成的时间码信号通过其主控模块40输出至射频模块M2的引脚MOSI处，同时其主控模块40还将时钟信号输出至射频模块M2的引脚SCK处，此时时间码信号和时钟信号便可通过设备1中的射频模块M2输出至目标从节点所在设备的射频模块M2中，该射频模块M2将接收到的时间码信号和时钟信号通过该射频模块M2的引脚MISO输入至与该射频模块M2相连接的主控模块40中，并通过该主控模块40实现所在设备中时间码信号的同步。
请参考图12，图12为本发明实施例提供的主控模块的一实施例示意图。如图12所示，主控模块40为单片机MCU，单片机MCU可包括引脚PA8(Pin A8，引脚A8)、引脚PA15(Pin A15，引脚A15)、引脚PB1(Pin B1，引脚B1)、引脚PB2(Pin B2，引脚B2)、引脚PB3(Pin B3，引脚B3)、引脚PB4(Pin B4，引脚B4)、引脚PB7(Pin B7，引脚B7)、引脚PB8(Pin B8，引脚B8)、引脚PB9(Pin B9，引脚B9)、引脚PC0(Pin C0，引脚C0)、引脚PC1(Pin C1，引脚C1)、引脚PC3(Pin C3，引脚C3)、引脚PC12(Pin C12，引脚C12)、引脚PC13(Pin C13，引脚C13)、引脚PC14-OSC32-IN(引脚C14-32位振荡器-输入)、引脚PG9(Pin G9，引脚G9)、引脚PG10(Pin G10，引脚G10)、引脚PG13(Pin G13，引脚G13)。其中，引脚PB1与音频采集模块50中模拟开关的引脚B1相连接以实现控制音频采集模块50在端口10中输出音频信号；引脚PB4与时间码切换模块20中模拟开关的引脚B0相连接以实现接收时间码切换模块20输入的时间码信号；引脚PA8与幅值调节模块30中缓冲器U4的引脚A相连接以实现将时间码信号输出至幅值调节模块30中，引脚PB8、引脚PB9分别与幅值调节模块30中数字电位器的引脚SCL、引脚SDA相连接以实现控制数字电位器对数字电位器中输入的时间码信号的幅值大小的调节；引脚PC3、引脚PB3、引脚PA15分别与工作模式切换模块60中编码器U6的引脚3、引脚4以及引脚1相连接，进而实现时间码生成电路的工作模式的切换；引脚PB2与蓝牙模块M1的引脚RST相连接以实现对蓝牙模块M1的复位，引脚PC0、引脚PC1分别与蓝牙模块M1的引脚HCI-UART-TX、引脚HCI-UART-RX相连接以实现蓝牙模块M1所在设备上的应用程序进行通信；引脚PG13、引脚PC13、引脚PB7、引脚PG9、引脚PG10、引脚PC12分别与射频模块M2的引脚IPQ、引脚CE、引脚CSN、引脚SCK、引脚MISO以及引脚MOSI相连接以实现传输时间码信号，并通过应用程序实现时间码同步。
在其他发明实施例中，时间码生成电路还可包括充电模块、充电接口、电压转换模块、供电模块。其中，充电模块分别与充电接口、电压转换模块以及 主控模块40电性连接，供电模块分别与电压转换模块、主控模块40、显示模块、射频模块M2以及蓝牙模块M1电性连接。
具体的，充电模块中设置有放置电池的端子以及充电芯片，电压转换模块可将电池输出的电压升压至预置的电压(例如4.4V)，并通过供电模块分别对主控模块40、显示模块、射频模块M2以及蓝牙模块M1进行供电。其中，充电芯片通过插座与充电接口电性连接，同时充电芯片与端子连接以实现对端子中的电池进行充电，同时充电芯片与主控模块40电性连接，以实现对时间码生成电路进行供电；充电接口可以为USB接口中的Type-C接口。
在其他发明实施例中，供电模块还可包括第一供电模块、第二供电模块以及第三供电模块。其中，第一供电模块与主控模块40电性连接，并用于对主控模块40进行供电；第二供电模块与显示模块以及蓝牙模块M1电性连接，并用于对显示模块以及蓝牙模块M1进行供电；第三供电模块与射频模块M2电性连接，并用于对射频模块M2进行供电。
在其他发明实施例中，时间码生成电路还包括升级模块，升级模块用于对接口模块进行升级。升级模块与主控模块40电性连接，主控模块40通过控升级模块实现接口模块的升级。
本发明实施例还提供一种时码器，时码器包括壳体以及上述任一项所述的时间码生成电路。
在本发明的一些实施例中，时码器中的时间码生成电路包括：
端口10；
时间码切换模块20，时间码切换模块20与端口10连接；
幅值调节模块30，幅值调节模块30与时间码切换模块20连接；以及
主控模块40，主控模块40分别与时间码切换模块20、幅值调节模块30连接；
其中，若端口10处于时间码信号输出模式、或时间码信号和音频信号同时输出模式，主控模块40将时间码信号输入至幅值调节模块30中进行幅值调节，幅值调节后的时间码信号经时间码切换模块20传输至所述端口10中；
若端口10处于时间码信号输入模式，时间码信号经端口10传输至时间码切换模块20中，并经时间码切换模块20传输至主控模块40中。
本发明实施例的时码器，通过在电路中仅设置一个端口10，并在主控模块40与端口之间设置了一个时间码切换模块20，并通过主控模块40控制时间码切换模块20导通，实现了外部的时间码信号可通过端口10输入至主控模块40中，同时在主控模块40与时间码切换模块20之间设置一个幅值调节模块30，实现了端口10处可输出幅值调节后的时间码信号，解决了端口10处输出的时间码信号干扰音频信号的技术问题，极大的提高了用户的使用效率。
为了更好实施本申请实施例中时间码生成电路，在时间码生成电路基础之上，本申请实施例中还提供一种时码器的信号生成方法，所述时码器包括如上所述的时间码生成电路，如图13所示，该方法包括以下步骤：
S101、开启主控模块40的电源开关；
S102、接收第一操作输入，主控模块40根据所述第一操作输入产生时间码信号并输入至幅值调节模块30中进行幅值调节，幅值调节后的时间码信号经时间码切换模块20传输至端口10中；
S103、接收第二操作输入，所述主控模块40根据所述第二操作输入以控制所述音频采集模块50的音频信号传输至所述端口10中；
S104、接收第三操作输入，所述主控模块40根据所述第三操作输入配置所述端口10接收外部时间码信号，所述外部时间码信号由所述时间码切换模块20输入至所述主控模块40。
可以理解，上书第一、第二以及第三输入操作可以对应不同的信号输出模式，具体输出模式可参加上述实施例描述，在此不再赘述。上述步骤并不限定顺序的先后，可以有用户自主选择对应的工作模式而选择对应的输入操作。
具体实施时，以上各个单元或结构可以作为独立的实体来实现，也可以进行任意组合，作为同一或若干个实体来实现，以上各个单元或结构的具体实施可参见前面的方法实施例，在此不再赘述。
以上对本发明实施例所提供的一种时间码生成电路、时码器及时码器的信号生成方法进行了详细介绍，本文中应用了具体个例对本发明的原理及实施例进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的技术人员，依据本发明的思想，在具体实施例及应用范围上均会有改变之处，综上，本说明书内容不应理解为对本发明的限制。

Claims (20)

  1. 一种时间码生成电路，其中，包括：
    端口(10)；
    时间码切换模块(20)，所述时间码切换模块(20)与所述端口(10)连接；
    幅值调节模块(30)，所述幅值调节模块(30)与所述时间码切换模块(20)连接；以及
    主控模块(40)，所述主控模块(40)分别与所述时间码切换模块(20)、所述幅值调节模块(30)连接，所述幅值调节模块(30)用于接收所述主控模块(30)产生的时间码信号并进行幅值调节以生成幅值不同的时间码信号，所述时间码切换模块用于接收幅值调节后的时间码信号；
    其中，所述主控模块(40)用于接收第一操作输入以产生时间码信号并配置所述时间码信号输入至所述幅值调节模块(30)中进行幅值调节，幅值调节后的所述时间码信号经所述时间码切换模块(20)传输至所述端口(10)中。
  2. 根据权利要求1所述的时间码生成电路，其中，所述电路还包括音频采集模块(50)，所述音频采集模块(50)分别与所述端口(10)、所述主控模块(40)连接，所述音频采集模块(50)采集音频信号，所述主控模块(40)用于接收第二操作输入以控制所述音频采集模块(50)的所述音频信号传输至所述端口(10)中。
  3. 根据权利要求1所述的时间码生成电路，其中，所述主控模块(40)用于接收第三操作输入以配置所述端口(10)接收外部时间码信号，所述外部时间码信号由所述时间码切换模块(20)输入至所述主控模块(40)。
  4. 根据权利要求2所述的时间码生成电路，其特征在于，所述音频采集模块(50)包括咪头(MC1)和第一开关(U1)，所述咪头(MC1)分别与所述主控模块(40)、所述第一开关(U1)连接，所述第一开关(U1)分别与所述端口(10)、所述主控模块(40)连接，所述咪头(MC1)采集所述音频信号，所述主控模块(40)用于控制所述第一开关(U1)导通以将所述音频信号传输至所述端口(10)中。
  5. 根据权利要求1所述的时间码生成电路，其中，所述时间码切换模块(20)中设置有第二开关(U2)和时间码恒定电路，所述第二开关(U2)分别与所述端口(10)以及所述幅值调节模块(30)连接，所述时间码恒定电路电性连接与所述主控模块(40)和所述第二开关(U2)之间，所述主控模块(40)用于控制所述第二开关(U2)导通，以配置所述端口(10)输入外部时间码信号，或配置所述端口(10)输出幅值调节后的所述时间码信号，外部时间码信号的幅值和幅值调节后的所述时间码信号幅值不同，所述时间码恒定电路用于接收外部时间码信号并输出恒定的时间码信号发送给所述主控模块(40)。
  6. 根据权利要求1所述的时间码生成电路，其中，所述幅值调节模块(30)中设置有电位器(U3)，所述电位器(U3)分别连接所述时间码切换模块(20)、所述主控模块(40)，所述主控模块(40)控制所述电位器(U3)以实现调节所述时间码信号的幅值。
  7. 根据权利要求1所述的时间码生成电路，其中，所述幅值调节模块(30)中还设置有缓冲器(U4)，所述缓冲器(U4)分别连接所述时间码切换模块(20)、所述主控模块(40)，所述主控模块(40)控制所述缓冲器(U4)以实现对幅值调节前的所述时间码信号进行缓冲。
  8. 根据权利要求1所述的时间码生成电路，其中，所述幅值调节模块(30)中还设置有跟随器(U5)，所述跟随器(U5)分别连接所述时间码切换模块(20)、所述主控模块(40)，所述主控模块(40)控制所述跟随器(U5)以实现幅值调节后的所述时间码信号稳定的输入至所述时间码切换模块(20)中。
  9. 根据权利要求1所述的时间码生成电路，其中，所述端口(10)为TRRS端口、Typec端口、USB端口中的任意一种。
  10. 根据权利要求1所述的时间码生成电路，其中，所述电路还包括工作模式切换模块(60)，第一操作输入、第二操作输入以及第三操作输入由所述工作模式切换模块(60)产生，所述工作模式切换模块(60)与所述主控模块(40)连接，并用于驱动所述主控模块(40)产生控制信号，以实现所述端口(10)处于时间码信号输出模式、或时间码信号和音频信号同时输出模式、又或时间码信号输入模式。
  11. 根据权利要求10所述的时间码生成电路，其中，所述工作模式切换模块(60)中设置有编码器(U6)，所述编码器(U6)与所述主控模块(40)连接，所述主控模块(40)通过所述编码器(U6)脉冲信号产生所述控制信号，以实现所述端口(10)处于时间码信号输出模式、或时间码信号和音频信号同时输出模式、又或时间码信号输入模式。
  12. 一种时码器，其中，所述时码器包括壳体，以及
    端口(10)；
    时间码切换模块(20)，所述时间码切换模块(20)与所述端口(10)连接；
    幅值调节模块(30)，所述幅值调节模块(30)与所述时间码切换模块(20)连接；以及
    主控模块(40)，所述主控模块(40)分别与所述时间码切换模块(20)、所述幅值调节模块(30)连接，所述幅值调节模块(30)用于接收所述主控模块(30)产生的时间码信号并进行幅值调节以生成幅值不同的时间码信号，所述时间码切换模块用于接收幅值调节后的时间码信号；
    其中，所述主控模块(40)用于接收第一操作输入以产生时间码信号并配置所述时间码信号输入至所述幅值调节模块(30)中进行幅值调节，幅值调节后的所述时间码信号经所述时间码切换模块(20)传输至所述端口(10)中。
  13. 根据权利要求12所述的时码器，其中，所述电路还包括音频采集模块(50)，所述音频采集模块(50)分别与所述端口(10)、所述主控模块(40)连接，所述音频采集模块(50)采集音频信号，所述主控模块(40)用于接收第二操作输入以控制所述音频采集模块(50)的所述音频信号传输至所述端口(10)中。
  14. 根据权利要求12所述的时码器，其中，所述主控模块(40)用于接收第三操作输入以配置所述端口(10)接收外部时间码信号，所述外部时间码信 号由所述时间码切换模块(20)输入至所述主控模块(40)。
  15. 根据权利要求13所述的时码器，其中，所述音频采集模块(50)包括咪头(MC1)和第一开关(U1)，所述咪头(MC1)分别与所述主控模块(40)、所述第一开关(U1)连接，所述第一开关(U1)分别与所述端口(10)、所述主控模块(40)连接，所述咪头(MC1)采集所述音频信号，所述主控模块(40)用于控制所述第一开关(U1)导通以将所述音频信号传输至所述端口(10)中。
  16. 根据权利要求12所述的时码器，其中，所述时间码切换模块(20)中设置有第二开关(U2)和时间码恒定电路，所述第二开关(U2)分别与所述端口(10)以及所述幅值调节模块(30)连接，所述时间码恒定电路电性连接与所述主控模块(40)和所述第二开关(U2)之间，所述主控模块(40)用于控制所述第二开关(U2)导通，以配置所述端口(10)输入外部时间码信号，或配置所述端口(10)输出幅值调节后的所述时间码信号，外部时间码信号的幅值和幅值调节后的所述时间码信号幅值不同，所述时间码恒定电路用于接收外部时间码信号并输出恒定的时间码信号发送给所述主控模块(40)。
  17. 根据权利要求12所述的时码器，其中，所述幅值调节模块(30)中设置有电位器(U3)，所述电位器(U3)分别连接所述时间码切换模块(20)、所述主控模块(40)，所述主控模块(40)控制所述电位器(U3)以实现调节所述时间码信号的幅值；
    其中，所述幅值调节模块(30)中还设置有缓冲器(U4)，所述缓冲器(U4)分别连接所述时间码切换模块(20)、所述主控模块(40)，所述主控模块(40)控制所述缓冲器(U4)以实现对幅值调节前的所述时间码信号进行缓冲。
  18. 根据权利要求12所述的时码器，其中，所述幅值调节模块(30)中还设置有跟随器(U5)，所述跟随器(U5)分别连接所述时间码切换模块(20)、所述主控模块(40)，所述主控模块(40)控制所述跟随器(U5)以实现幅值调节后的所述时间码信号稳定的输入至所述时间码切换模块(20)中；
    其中，所述端口(10)为TRRS端口、Typec端口、USB端口中的任意一种。
  19. 根据权利要求12所述的时码器，其中，所述电路还包括工作模式切换模块(60)，第一操作输入、第二操作输入以及第三操作输入由所述工作模式切换模块(60)产生，所述工作模式切换模块(60)与所述主控模块(40)连接，并用于驱动所述主控模块(40)产生控制信号，以实现所述端口(10)处于时间码信号输出模式、或时间码信号和音频信号同时输出模式、又或时间码信号输入模式；
    其中，所述工作模式切换模块(60)中设置有编码器(U6)，所述编码器(U6)与所述主控模块(40)连接，所述主控模块(40)通过所述编码器(U6)脉冲信号产生所述控制信号，以实现所述端口(10)处于时间码信号输出模式、或时间码信号和音频信号同时输出模式、又或时间码信号输入模式。
  20. 一种时码器的信号生成方法，所述时码器包括：
    端口(10)；
    时间码切换模块(20)，所述时间码切换模块(20)与所述端口(10)连接；
    幅值调节模块(30)，所述幅值调节模块(30)与所述时间码切换模块(20) 连接；以及
    主控模块(40)，所述主控模块(40)分别与所述时间码切换模块(20)、所述幅值调节模块(30)连接，所述幅值调节模块(30)用于接收所述主控模块(30)产生的时间码信号并进行幅值调节以生成幅值不同的时间码信号，所述时间码切换模块用于接收幅值调节后的时间码信号；
    其中，所述主控模块(40)用于接收第一操作输入以产生时间码信号并配置所述时间码信号输入至所述幅值调节模块(30)中进行幅值调节，幅值调节后的所述时间码信号经所述时间码切换模块(20)传输至所述端口(10)中；
    所述方法包括：
    开启主控模块(40)的电源开关；
    接收第一操作输入，所述主控模块(40)根据所述第一操作输入产生时间码信号并输入至所述幅值调节模块(30)中进行幅值调节，幅值调节后的所述时间码信号经所述时间码切换模块(20)传输至所述端口(10)中；
    接收第二操作输入，所述主控模块(40)根据所述第二操作输入以控制音频采集模块(50)的音频信号传输至所述端口(10)中；
    接收第三操作输入，所述主控模块(40)根据所述第三操作输入配置所述端口(10)接收外部时间码信号，所述外部时间码信号由所述时间码切换模块(20)输入至所述主控模块(40)。
PCT/CN2022/134198 2022-03-28 2022-11-24 时间码生成电路、时码器及时码器的信号生成方法 WO2023185028A1 (zh)

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