Classifications

• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
  • G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
  • G01S17/02—Systems using the reflection of electromagnetic waves other than radio waves
  • G01S17/06—Systems determining position data of a target
  • G01S17/08—Systems determining position data of a target for measuring distance only
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
  • H01S5/00—Semiconductor lasers
  • H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
  • H01S5/042—Electrical excitation ; Circuits therefor
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01C—MEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
  • G01C15/00—Surveying instruments or accessories not provided for in groups G01C1/00 - G01C13/00
  • G01C15/002—Active optical surveying means
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
  • G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
  • G01S17/88—Lidar systems specially adapted for specific applications
  • G01S17/89—Lidar systems specially adapted for specific applications for mapping or imaging
  • G01S17/894—Three-dimensional [3D] imaging with simultaneous measurement of time-of-flight at a two-dimensional [2D] array of receiver pixels, e.g. time-of-flight cameras or flash lidar
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
  • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
  • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
  • G01S7/481—Constructional features, e.g. arrangements of optical elements
  • G01S7/4814—Constructional features, e.g. arrangements of optical elements of transmitters alone
  • G01S7/4815—Constructional features, e.g. arrangements of optical elements of transmitters alone using multiple transmitters
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
  • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
  • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
  • G01S7/483—Details of pulse systems
  • G01S7/484—Transmitters
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
  • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
  • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
  • G01S7/491—Details of non-pulse systems
  • G01S7/4911—Transmitters
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
  • H01S5/00—Semiconductor lasers
  • H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
  • H01S5/042—Electrical excitation ; Circuits therefor
  • H01S5/0428—Electrical excitation ; Circuits therefor for applying pulses to the laser
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
  • H01S5/00—Semiconductor lasers
  • H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
  • H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
  • H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
  • H01S5/18305—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] with emission through the substrate, i.e. bottom emission
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
  • H01S5/00—Semiconductor lasers
  • H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
  • H01S5/42—Arrays of surface emitting lasers
  • H01S5/423—Arrays of surface emitting lasers having a vertical cavity

Definitions

• a surface emitting laser such as a VCSEL (Vertical Cavity Surface Emitting Laser) is known as a type of semiconductor laser.
• VCSEL Vertical Cavity Surface Emitting Laser
• a plurality of light emitting elements are provided in a two-dimensional array on the front or back surface of a substrate.
• the present disclosure provides a light emitting device and a distance measuring device that can optimize the structure of wiring for a light emitting element.
• a light emitting device includes a plurality of light emitting elements arranged in a two-dimensional array and each having a first and a second terminal, and first to Nth horizontal wirings (N is (an integer of 2 or more) and first to Nth vertical wirings extending in the vertical direction and electrically connected to the first to Nth horizontal wirings, respectively, and electrically connected to the first terminal of the light emitting element.
• N is (an integer of 2 or more) and first to Nth vertical wirings extending in the vertical direction and electrically connected to the first to Nth horizontal wirings, respectively, and electrically connected to the first terminal of the light emitting element.
• one of the first and second terminals of the light emitting element is an anode
• the other of the first and second terminals of the light emitting element is a cathode
• the first One of the second terminal wires may be an anode wire
• the other of the first and second terminal wires may be a cathode wire.
• the plurality of first terminal wirings include M sets (M is an integer of 2 or more) of the first to Nth horizontal wirings and the first to Nth vertical wirings. Good too. This makes it possible, for example, to arrange these horizontal wirings and vertical wirings in a mesh shape.
• the plurality of selection circuits include first to Nth selection circuits electrically connected to the first to Nth horizontal wirings or the first to Nth vertical wirings, respectively.
• each of the plurality of drive circuits may be electrically connected to one of the second terminal wirings. This makes it possible, for example, to reduce the number of selection circuits.
• two of the light emitting elements may be caused to emit light at the same time. This makes it possible, for example, to cause two or more light emitting elements to emit light at the same time using one drive circuit.
• each of the plurality of selection circuits is electrically connected to one of the second terminal wirings, and the plurality of drive circuits are connected to the first to Nth terminal wirings.
• the first to third drive circuits may be electrically connected to the horizontal wiring or the first to Nth vertical wiring, respectively. This makes it possible, for example, to reduce the number of drive circuits.
• the light emitting device of the first aspect may further include a plurality of capacitors that are electrically connected to the one of the first and second terminal wirings and that accumulate charges to be supplied to the light emitting element. . This makes it possible, for example, to store charge for a light emitting element using a capacitor.
• the plurality of capacitors include first to Nth capacitors electrically connected to the first to Nth horizontal wirings or the first to Nth vertical wirings, respectively. Good too. This makes it possible, for example, to reduce the number of capacitors.
• the plurality of capacitors are arranged in the vicinity of two or more of the four sides of the array of light emitting elements, and the first to It may also include an Nth capacitor. This makes it possible, for example, to set the average distance between each light emitting element and these capacitors to a value close to the average distance between another light emitting element and these capacitors.
• the plurality of capacitors include K sets (K is an integer of 2 or more) of the first to Nth capacitors arranged symmetrically with respect to the center of the array of light emitting elements. You can stay there. This makes it possible, for example, to set the average distance between each light emitting element and these capacitors to a value close to the average distance between another light emitting element and these capacitors.
• each of the plurality of capacitors may be electrically connected to one of the second terminal wirings. This makes it possible, for example, to reduce the number of drive circuits.
• the plurality of capacitors are arranged on a first substrate provided with the light emitting element, on a second substrate provided with at least one of the selection circuit and the drive circuit, or on the second substrate provided with at least one of the selection circuit and the drive circuit.
• the first and second substrates may be placed on a mounting board provided with the first and second boards. This makes it possible, for example, to arrange capacitors at various locations depending on the design of the light emitting device.
• each of the plurality of selection circuits may include a first switch that accumulates charge in the capacitor, and a second switch that discharges charge from the capacitor. This makes it possible, for example, to control the storage and discharge of a capacitor by means of a selection circuit.
• the light emitting device of the first aspect further includes a plurality of voltage detection circuits that detect a voltage indicating the amount of charge accumulated in the plurality of capacitors and control the first switch based on the voltage. You may be prepared. This makes it possible, for example, to suitably control the amount of charge in the capacitor.
• the charge supplied to the light emitting element may be accumulated in a parasitic capacitance of the light emitting element or the drive circuit. This makes it possible, for example, to store charges for a light emitting element without using a capacitor.
• the first substrate provided with the light emitting element may be stacked on the second substrate provided with at least one of the selection circuit and the drive circuit. This makes it possible, for example, to arrange these substrates in a narrow area or to arrange them close to each other.
• the size of one of the plurality of drive circuits may be the same as the size of N of the plurality of light emitting elements. This makes it possible, for example, to arrange N light emitting elements on each drive circuit.
• a distance measuring device includes a light emitting section that generates light and irradiates it to a subject, a light receiving section that receives light reflected from the subject, and a distance measuring device based on the light received by the light receiving section.
• a distance measuring section that measures the distance to the subject
• the light emitting section includes a plurality of light emitting elements arranged in a two-dimensional array, each having a first and a second terminal, and a second light emitting element extending in the horizontal direction.
• the light emitting device includes first to Nth horizontal wirings (N is an integer of 2 or more) and first to Nth vertical wirings extending in the vertical direction and electrically connected to the first to Nth horizontal wirings, respectively.
• a plurality of drive circuits are electrically connected to the other terminal wiring and drive the light emitting elements. This makes it possible to optimize the structure of the wiring for the light emitting element, for example by reducing the impedance of each wiring and reducing the difference in impedance between wirings.
• FIG. 1 is a block diagram showing a configuration example of a distance measuring device 1 according to a first embodiment.
• FIG. 2 is a diagram for explaining the STL (Structured Light) method of the first embodiment.
• FIG. 1 is a cross-sectional view showing the structure of a light emitting device 1a according to a first embodiment.
• FIG. 1 is a circuit diagram showing the structure of a light emitting device 1a according to a first embodiment.
• FIG. 2 is a circuit diagram showing the structure of a light emitting device 1a as a comparative example of the first embodiment. It is a graph for demonstrating the performance of the light emitting device 1a of 1st Embodiment.
• FIG. 1 is a block diagram showing a configuration example of a distance measuring device 1 according to a first embodiment.
• FIG. 2 is a diagram for explaining the STL (Structured Light) method of the first embodiment.
• FIG. 1 is a cross-sectional view showing the structure of a light emit
• FIG. 1 is a cross-sectional view and a plan view showing the structure of a light emitting device 1a according to a first embodiment.
• FIG. 1 is a perspective view schematically showing the structure of a light emitting device 1a according to a first embodiment. It is a circuit diagram showing the structure of light emitting device 1a of the 1st modification of a 1st embodiment. It is a circuit diagram which shows the structure of the light emitting device 1a of the 2nd modification of 1st Embodiment. It is a circuit diagram showing the structure of light emitting device 1a of the 3rd modification of a 1st embodiment. It is a circuit diagram showing the structure of light emitting device 1a of the 4th modification of a 1st embodiment.
• FIG. 7 is a plan view schematically showing the structure of a light emitting device 1a according to a third embodiment.
• FIG. 1 is a block diagram showing an example of the configuration of distance measuring device 1 according to the first embodiment.
• the distance measuring device 1 of this embodiment is mounted on, for example, an automobile.
• the distance measuring device 1 includes a light emitting section 2, a driving section 3, a power supply circuit 4, a light emitting side optical system 5, a light receiving side optical system 6, a light receiving section 7, a signal processing section 8, a control section 9, and a temperature detection section. 10.
• the light emitting unit 2 emits light using a plurality of light sources.
• the light emitting unit 2 of this example has light emitting elements 2a using VCSEL (Vertical Cavity Surface Emitting LASER) as each light source, and these light emitting elements 2a are arranged in a predetermined manner, such as in a matrix. has been configured.
• VCSEL Vertical Cavity Surface Emitting LASER
• the driving section 3 is configured to include a power supply circuit for driving the light emitting section 2.
• the power supply circuit 4 generates a power supply voltage for the drive unit 3 based on an input voltage from, for example, a battery (not shown) provided in the distance measuring device 1.
• the drive section 3 drives the light emitting section 2 based on the power supply voltage.
• the light emitted from the light emitting unit 2 is irradiated onto the subject S as a distance measurement target via the light emitting optical system 5. Then, the reflected light from the subject S of the light irradiated in this way enters the light receiving surface of the light receiving section 7 via the light receiving side optical system 6.
• the light receiving unit 7 is, for example, a light receiving element such as a CCD (Charge Coupled Device) sensor or a CMOS (Complementary Metal Oxide Semiconductor) sensor, and receives reflected light from the subject S that enters through the light receiving side optical system 6 as described above. It receives light, converts it into an electrical signal, and outputs it.
• a light receiving element such as a CCD (Charge Coupled Device) sensor or a CMOS (Complementary Metal Oxide Semiconductor) sensor
• the light receiving unit 7 performs, for example, CDS (Correlated Double Sampling) processing, AGC (Automatic Gain Control) processing, etc. on the electrical signal obtained by photoelectrically converting the received light, and further performs A/D (Analog/Digital) conversion. Perform processing. Then, the signal as digital data is output to the signal processing section 8 at the subsequent stage.
• CDS Correlated Double Sampling
• AGC Automatic Gain Control
• the light receiving section 7 of this example outputs a frame synchronization signal Fs to the driving section 3. This allows the driving section 3 to cause the light emitting element 2a in the light emitting section 2 to emit light at a timing corresponding to the frame period of the light receiving section 7.
• the signal processing unit 8 is configured as a signal processing processor using, for example, a DSP (Digital Signal Processor).
• the signal processing unit 8 performs various signal processing on the digital signal input from the light receiving unit 7.
• the control unit 9 includes, for example, a microcomputer having a CPU (Central Processing Unit), a ROM (Read Only Memory), a RAM (Random Access Memory), etc., or an information processing device such as a DSP, and controls the light emission by the light emitting unit 2. It controls the driving section 3 for controlling the operation and controls the light receiving operation of the light receiving section 7.
• a microcomputer having a CPU (Central Processing Unit), a ROM (Read Only Memory), a RAM (Random Access Memory), etc.
• a DSP digital signal processor
• the control section 9 has a function as a distance measuring section 9a.
• the distance measuring section 9a measures the distance to the subject S based on a signal input via the signal processing section 8 (that is, a signal obtained by receiving reflected light from the subject S).
• the distance measuring section 9a of this example measures distances for each part of the subject S in order to enable specification of the three-dimensional shape of the subject S.
• the temperature detection section 10 detects the temperature of the light emitting section 2.
• the temperature detection section 10 may be configured to detect temperature using, for example, a diode.
• information on the temperature detected by the temperature detection section 10 is supplied to the driving section 3, which enables the driving section 3 to drive the light emitting section 2 based on the temperature information.
• the distance measurement method in the distance measurement device for example, a distance measurement method using the STL (Structured Light) method or the ToF (Time of Flight) method is adopted. be able to.
• STL Structured Light
• ToF Time of Flight
• the STL method is a method for measuring distance based on an image of a subject S irradiated with light having a predetermined bright/dark pattern, such as a dot pattern or a grid pattern.
• FIG. 2 is a diagram for explaining the STL method of the first embodiment.
• the subject S is irradiated with patterned light Lp having a dot pattern as shown in A in FIG. 2, for example.
• the patterned light Lp is divided into a plurality of blocks BL, and each block BL is assigned a different dot pattern (dot patterns are prevented from overlapping between blocks B).
• FIG. 2B is an explanatory diagram of the distance measurement principle of the STL method.
• a wall W and a box BX placed in front of the wall W are the subject S, and the subject S is irradiated with the pattern light Lp.
• BLn in the figure means the light of a certain block BL in the pattern light Lp
• dn means the dot pattern of the block BLn projected on the light reception image by the light receiving unit 7.
• the dot pattern of the block BLn is projected at the position "dn'" in the figure in the received light image. That is, the position where the pattern of the block BLn is projected in the received light image is different depending on whether the box BX exists or the box BX does not exist, and specifically, distortion of the pattern occurs.
• the STL method is a method for determining the shape and depth of the subject S by utilizing the fact that the irradiated pattern is distorted by the object shape of the subject S. Specifically, this method calculates the shape and depth of the subject S from the way the pattern is distorted.
• the light receiving section 7 is, for example, an IR (Infrared) light receiving section using a global shutter method.
• the distance measuring section 9a controls the driving section 3 so that the light emitting section 2 emits pattern light, and detects pattern distortion in the image signal obtained via the signal processing section 8. , calculate the distance based on how the pattern is distorted.
• the ToF method measures the distance to the target object by detecting the flight time (time difference) of the light emitted from the light emitting unit 2 until it is reflected by the target object and reaches the light receiving unit 7. This is a method to do so.
• dToF direct ToF
• SPAD Single Photon Avalanche Diode
• the distance measuring section 9a calculates the time difference between light emission and light reception for the light emitted from the light emitting section 2 and received by the light receiving section 7 based on the signal inputted via the signal processing section 8, and calculates the time difference between light emission and light reception.
• the distance to each part of the subject S is calculated based on the distance and the speed of light.
• the distance to the subject S is calculated by calculating the time from light emission to light reception, so if the light emission pulse width becomes narrower, the time resolution improves and more precise distance measurement becomes possible. Therefore, the dToF method is more suitable for this embodiment, which achieves high power and short pulse of light emission.
• a so-called indirect ToF (iToF) method phase difference method
• a light receiving portion capable of receiving IR light is used as the light receiving portion 7, for example.
• the distance to the object is calculated from the phase difference between the emitted light and the light reflected from the object and received, so it is desirable that the waveform of the LDD output current when emitting light has steep rises and falls.
• This embodiment is also suitable for the iToF method because the waveform characteristics described above are improved by reducing the inductance of the wiring within the light emitting element 2a.
• FIG. 3 is a cross-sectional view showing the structure of the light emitting device 1a of the first embodiment.
• 3A shows a cross section of the light emitting device 1a of this embodiment
• FIG. 3B shows an enlarged cross section of the cross section shown in FIG. 3A.
• the light emitting device 1a of this embodiment may be a part of the distance measuring device 1, or may be the distance measuring device 1 itself.
• the light emitting device 1a in A of FIG. 3 includes an LD (Laser Diode) chip 11 including the above-mentioned light emitting section 2, an LDD (Laser Diode Driver) board 12 including the above-mentioned drive section 3, a mounting board 13, and a heat dissipation board. 14, a correction lens holding section 15, one or more correction lenses 16, and wiring 17.
• the LD chip 11 is also called a VCSEL board.
• the LD chip 11 is an example of a first substrate of the present disclosure
• the LDD substrate 12 is an example of a second substrate of the present disclosure.
• a in FIG. 3 shows X, Y, and Z axes that are perpendicular to each other.
• the +Z direction corresponds to the upward direction
• the -Z direction corresponds to the downward direction. Note that the -Z direction may or may not strictly match the direction of gravity.
• the LD chip 11 is placed on the mounting board 13 via the heat dissipation board 14, and the LDD board 12 is also placed on the mounting board 13.
• the mounting board 13 is, for example, a printed circuit board.
• the mounting board 13 may further include the above-described light receiving section 7 and signal processing section 8.
• the heat dissipation substrate 14 is, for example, a ceramic substrate such as an aluminum oxide substrate or an aluminum nitride substrate.
• the correction lens holding section 15 is arranged on the heat dissipation substrate 14 so as to surround the LD chip 11, and holds one or more correction lenses 16 above the LD chip 11. These correction lenses 16 are included in the above-mentioned light emitting side optical system 5. The light emitted from the light emitting section 2 in the LD chip 11 is corrected by these correction lenses 16 and then irradiated onto the subject S described above.
• a in FIG. 3 shows two correction lenses 16 held by the correction lens holding section 15 as an example.
• the wiring 17 is provided on the front surface, back surface, inside, etc. of the mounting board 13, and electrically connects the LD chip 11 and the LDD board 12.
• the wiring 17 is, for example, a printed wiring provided on the front or back surface of the mounting board 13 or a via wiring that penetrates the mounting board 13.
• the wiring 17 of this embodiment further passes inside or near the heat dissipation board 14.
• the LD chip 11 in FIG. 3B includes a substrate 21, a laminated film 22, and a plurality of light emitting elements 23. These light emitting elements 23 are specific examples of the above-mentioned light emitting element 2a.
• the substrate 21 is, for example, a compound semiconductor substrate such as a GaAs (gallium arsenide) substrate.
• B in FIG. 3 shows the front surface S1 of the substrate 21 facing the ⁇ Z direction and the back surface S2 of the substrate 21 facing the +Z direction.
• the front surface S1 and the back surface S2 shown in FIG. 3B are perpendicular to the Z direction.
• the front surface S1 is the lower surface of the substrate 21, and the back surface S2 is the upper surface of the substrate 21.
• the laminated film 22 includes a plurality of layers laminated on the surface S1 of the substrate 21. Examples of these layers are an n-type semiconductor layer, an active layer, a p-type semiconductor layer, and a light-reflecting layer or an insulating layer with a light exit window.
• the laminated film 22 includes a plurality of post portions P protruding in the ⁇ Z direction. A portion of these post portions P serves as a plurality of light emitting elements 23.
• the light emitting element 23 is provided on the surface S1 of the substrate 21 as part of the laminated film 22.
• the light emitting element 23 of this embodiment has a VCSEL structure and emits light in the +Z direction. As shown in FIG. 3B, the light emitted from the light emitting element 23 passes through the substrate 21 from the front surface S1 to the back surface S2, and enters the correction lens 16 from the substrate 21.
• the LD chip 11 of this embodiment is a back-emission type VCSEL chip.
• the light emitting element 23 is also called a mesa portion.
• Each light emitting element 23 is provided between an anode wiring (anode electrode) and a cathode wiring (cathode electrode), which are not shown. Each light emitting element 23 emits light when a current flows between the anode wiring and the cathode wiring. Further details of the anode wiring and cathode wiring will be described later.
• FIG. 4 is a circuit diagram showing the structure of the light emitting device 1a of the first embodiment.
• FIG. 4 shows a plurality of light emitting elements 23 arranged in a two-dimensional array and a plurality of transistors 24 electrically connected to these light emitting elements 23. These transistors 24 are, for example, N-type MOS transistors.
• FIG. 4 shows, as an example, 9 ⁇ 9 light emitting elements 23 and 9 ⁇ 9 transistors 24. Therefore, the light emitting device 1a shown in FIG. 4 includes a 9ch x 9ch light emitting element array.
• the light emitting device 1a of this embodiment further includes a first anode wiring 31, a second anode wiring 32, a third anode wiring 33, a plurality of first capacitors 34, and a plurality of second It includes a capacitor 35, a plurality of third capacitors 36, a first selection circuit 37, a second selection circuit 38, a third selection circuit 39, a plurality of cathode wirings 41, and a plurality of gate wirings 42.
• the first to third anode wires 31 to 33 are examples of first terminal wires of the present disclosure
• the cathode wire 41 is an example of second terminal wires of the present disclosure.
• first to third capacitors 34 to 36 are examples of the first to Nth capacitors of the present disclosure
• first to third selection circuits 37 to 39 are examples of the first to Nth selection circuits of the present disclosure. This is an example (N is an integer of 2 or more).
• FIG. 4 shows an example where N is 3.
• the first anode wiring 31 includes a plurality of first horizontal wirings 31a extending in the horizontal direction (X direction) and a plurality of first vertical wirings 31b extending in the vertical direction (Y direction).
• the second anode wiring 32 includes a plurality of second horizontal wirings 32a extending in the horizontal direction and a plurality of second vertical wirings 32b extending in the vertical direction.
• the third anode wiring 33 includes a plurality of third horizontal wirings 33a extending in the horizontal direction and a plurality of third vertical wirings 33b extending in the vertical direction.
• FIG. 4 shows, as an example, five first horizontal wirings 31a, five first vertical wirings 31b, five second horizontal wirings 32a, five second vertical wirings 32b, and five A third horizontal wiring 33a and five third vertical wirings 33b are shown.
• M is an integer of 2 or more.
• FIG. 4 shows an example where M is 5.
• the number of light emitting elements 23 shown in FIG. 4, expressed by N and M, is N(M-2) ⁇ N(M-2).
• the first to third anode wirings 31 to 33 may include the first to Nth horizontal wirings of the Ma group and the first to Nth vertical wirings of the Mb group (Ma and Mb are Ma ⁇ An integer greater than or equal to 2 that satisfies Mb).
• the number of light emitting elements 23 of the light emitting device 1a is N(Ma-2) ⁇ N(Mb-2).
• the first selection circuit 37 includes transistors 37a and 37b.
• the second selection circuit 38 includes transistors 38a and 38b.
• the third selection circuit 39 includes transistors 39a and 39b.
• the transistors 37a, 38a, and 39a are, for example, P-type MOS transistors.
• the transistors 37b, 38b, and 39b are, for example, N-type MOS transistors.
• Transistors 37a, 38a, and 39a are examples of first switches of the present disclosure.
• Transistors 37b, 38b, and 39b are examples of second switches of the present disclosure.
• FIG. 4 shows the first anode wiring 31 with a thick solid line, the second anode wiring 32 with a thick broken line, and the third anode wiring 33 with a thin solid line. It is shown in
• the first anode wiring 31 has a structure in which a plurality of first horizontal wirings 31a and a plurality of first vertical wirings 31b are arranged in a mesh shape.
• the first horizontal wiring 31a and the first vertical wiring 31b are electrically connected to each other at a point where the first horizontal wiring 31a and the first vertical wiring 31b intersect.
• the second anode wiring 32 includes a plurality of second horizontal wirings 32a and a plurality of second vertical wirings 32b that are electrically connected to each other
• the third anode wiring 33 includes a plurality of second horizontal wirings 32a and a plurality of second vertical wirings 32b that are electrically connected to each other.
• a third horizontal wiring 33a and a plurality of third vertical wirings 33b are included.
• the first to third anode wirings 31 to 33 are electrically insulated from each other.
• the first to third horizontal wirings 31a to 33a extend in the X direction (horizontal direction) and are adjacent to each other in the Y direction (vertical direction). Although the first to third horizontal wirings 31a to 33a extend linearly in the X direction in FIG. 4, they may extend curvedly in the X direction. That is, the first to third horizontal wirings 31a to 33a may include bent portions.
• first to third vertical wirings 31b to 33b extend in the Y direction and are adjacent to each other in the X direction. Although the first to third vertical wirings 31b to 33b extend linearly in the Y direction in FIG. 4, they may extend curvedly in the Y direction. That is, the first to third vertical wirings 31b to 33b may also include bent portions.
• FIG. 4 shows five sets of first to third horizontal wirings 31a to 33a.
• the first to third horizontal wirings 31a to 33a of the first, second, third, fourth, and fifth sets are arranged in order from top to bottom.
• a first horizontal wiring 31a, a second horizontal wiring 32a, and a third horizontal wiring 33a are arranged in order from top to bottom.
• the first to third horizontal wirings 31a to 33a of the first set and the first to third horizontal wirings 31a to 33a of the fifth set are arranged so as to sandwich 9 ⁇ 9 light emitting elements 23.
• Each of the second to fourth sets of first to third horizontal wirings 31a to 33a is arranged along one row (nine) of light emitting elements 23.
• FIG. 4 further shows five sets of first to third vertical wirings 31b to 33b.
• the first to third vertical wirings 31b to 33b of the first, second, third, fourth, and fifth sets are arranged in order from left to right.
• a first vertical wiring 31b, a second vertical wiring 32b, and a third vertical wiring 33b are arranged in order from left to right.
• the first set of first to third vertical wirings 31b to 33b and the fifth set of first to third vertical wirings 31b to 33b are arranged to sandwich 9 ⁇ 9 light emitting elements 23.
• Each of the second to fourth sets of first to third vertical wirings 31b to 33b is arranged along one row (nine) of light emitting elements 23.
• each light emitting element 23 is electrically connected to one of the first to third vertical wirings 31b to 33b.
• the light emitting elements 23 in the leftmost column are electrically connected to the first vertical wiring 31b in the second set of first to third vertical wirings 31b to 33b.
• the light emitting elements 23 in the rightmost column are electrically connected to the third vertical wiring 33b in the fourth set of first to third vertical wirings 31b to 33b.
• the anode of each light emitting element 23 is electrically connected to one of the first to third horizontal wirings 31a to 33a instead of being electrically connected to any one of the first to third vertical wirings 31b to 33b. May be connected.
• An anode is an example of a first terminal of the present disclosure.
• Each cathode wiring 41 extends in the X direction and is electrically connected to the cathodes of the three light emitting elements 23.
• each cathode wiring 41 includes one light emitting element 23 electrically connected to the first vertical wiring 31b, one light emitting element 23 electrically connected to the second vertical wiring 32b, and one light emitting element 23 electrically connected to the second vertical wiring 32b. It is electrically connected to one light emitting element 23 which is electrically connected to the three vertical wirings 33b.
• FIG. 4 shows 27 cathode wirings 41 for 81 light emitting elements 23.
• the cathode is an example of the second terminal of this disclosure.
• Each light emitting element 23 has a corresponding anode wiring, that is, one of the first to third anode wirings 31 to 33, and a corresponding cathode wiring, that is, one of the plurality of cathode wirings 41. It is placed between the books. Each light emitting element 23 emits light when a current flows between the corresponding anode wiring and the corresponding cathode wiring.
• Each gate wiring 42 extends in the X direction and is electrically connected to the gates of the three transistors 24.
• the sources of these three transistors 24 are electrically connected to a ground wiring (GND), and the drains of these three transistors 24 are electrically connected to the same single cathode wiring 41.
• GND ground wiring
• These three transistors 24 form one drive circuit E.
• FIG. 4 shows 27 gate lines 42 for 81 transistors 24.
• Each drive circuit E is electrically connected to the cathodes of the three light emitting elements 23 via one cathode wiring 41.
• Each drive circuit (output stage) E is used to drive the light emitting element 23 and cause the light emitting element 23 to generate (output) light. For example, when a certain light emitting element 23 generates light, a predetermined signal is applied to the gate wiring 42 of the drive circuit E for this light emitting element 23. As a result, the source and drain of each transistor 24 in this drive circuit E are brought into conduction, allowing current to flow through this light emitting element 23. When current flows through the light emitting element 23, light is generated from the light emitting element 23.
• the light emitting device 1a shown in FIG. 4 includes 27 drive circuits E for 81 light emitting elements 23.
• the first to third selection circuits 37 to 39 are electrically connected to the first to third horizontal wirings 31a to 33a of the first to third anode wirings 31 to 33, respectively.
• the first selection circuit 37 is used to select the light emitting element 23 electrically connected to the first anode wiring 31 as the light emitting element 23 that generates light.
• the second selection circuit 38 is used to select the light emitting element 23 electrically connected to the second anode wiring 32 as the light emitting element 23 that generates light.
• the third selection circuit 39 is used to select the light emitting element 23 electrically connected to the third anode wiring 33 as the light emitting element 23 that generates light.
• the first to third selection circuits 37 to 39 replace the first to third horizontal wirings 31a to 33a of the first to third anode wirings 31 to 33 with the first to third selection circuits 37 to 39, respectively. It may be electrically connected to the first to third vertical wirings 31b to 33b.
• the first selection circuit 37 includes a transistor 37a having a source electrically connected to a power supply wiring (VDD) and a transistor 37b having a source electrically connected to a ground wiring.
• the drain of the transistor 37a and the drain of the transistor 37b are electrically connected to the first anode wiring 31.
• the first selection circuit 37 is electrically connected to each first capacitor 34 via the first anode wiring 31.
• the transistor 37a is used to accumulate charge in each first capacitor 34.
• Transistor 37b is used to discharge charge from each first capacitor 34.
• the first selection circuit 37 selectively stores charges in the first capacitor 34 of the first to third capacitors 34 to 36, so that the first anode wiring 31 is electrically A current can be passed through each light emitting element 23 connected to the light emitting element 23 .
• the structures of the second and third selection circuits 38 and 39 are similar to the structure of the first selection circuit 37, as shown in FIG. Therefore, according to the present embodiment, by accumulating charges in each second capacitor 35 by the second selection circuit 38, current can be caused to flow through each light emitting element 23 electrically connected to the second anode wiring 32. I can do it. Furthermore, according to the present embodiment, the third selection circuit 39 accumulates charge in each of the third capacitors 36, thereby allowing current to flow through each of the light emitting elements 23 electrically connected to the third anode wiring 33. I can do it.
• the first to third capacitors 34 to 36 are electrically connected to the first to third anode wirings 31 to 33, respectively.
• Each first capacitor 34 stores charges to be supplied to the light emitting element 23 electrically connected to the first anode wiring 31 .
• Each second capacitor 35 stores charges to be supplied to the light emitting element 23 electrically connected to the second anode wiring 32 .
• Each third capacitor 36 accumulates charges to be supplied to the light emitting element 23 electrically connected to the third anode wiring 33. According to this embodiment, by supplying charge to each light emitting element 23 from the first to third capacitors 34 to 36, a current can flow through each light emitting element 23.
• Each of the first to third capacitors 34 to 36 has one electrode electrically connected to one of the first to third anode wirings 31 to 33, and the other electrode electrically connected to the ground wiring. It is equipped with
• the light emitting device 1a shown in FIG. 4 includes a light emitting element array including 9 ⁇ 9 light emitting elements 23 arranged in a two-dimensional array. As shown in FIG. 4, the shape of this light emitting element array is approximately square in plan view.
• the light emitting device 1a shown in FIG. 4 includes four sets of first to third capacitors 34 to 36 near the four sides of this square. Specifically, the light emitting device 1a shown in FIG. 4 includes a first set of first to third capacitors 34 to 36 near the top side of the square, and a second set of first to third capacitors near the right side of the square.
• first to third capacitors 34 to 36 are examples of K sets of first to Nth capacitors of the present disclosure (K is an integer of 2 or more).
• FIG. 4 shows an example where K is 4.
• the first to third capacitors 34 to 36 of the first and third sets are electrically connected to the first to third horizontal wirings 31a to 33a of the first to third anode wirings 31 to 33, respectively.
• the first to third capacitors 34 to 36 of the second and fourth sets are electrically connected to the first to third vertical wirings 31b to 33b of the first to third anode wirings 31 to 33, respectively.
• the first to third capacitors 34 to 36 shown in FIG. 4 are electrically connected to the first to third anode wirings 31 to 33, respectively.
• the first to third capacitors 34 to 36 are arranged in clockwise order.
• the first capacitor 34, the second capacitor 35, and the third capacitor 36 of the first set are arranged on the left side, center, and right side, respectively, near the upper side of the square.
• the second set of first capacitor 34, second capacitor 35, and third capacitor 36 are arranged near the right side of the square at the top, center, and bottom, respectively.
• the four sets of first to third capacitors 34 to 36 shown in FIG. 4 are arranged symmetrically with respect to the center of the square.
• the center of the square is approximately located at the position of the light emitting element 23 in the fifth row and fifth column among the 9 ⁇ 9 light emitting elements 23.
• the four sets of first to third capacitors 34 to 36 are arranged in four-fold rotational symmetry (90 degree rotational symmetry).
• the light emitting element 23 at the upper left end is close to the first capacitor 34 on the upper side, but is far from the first capacitor 34 on the lower side.
• the light emitting element 23 at the lower right end is close to the third capacitor 36 on the right side but far from the third capacitor 36 on the left side. Therefore, the average distance between the light emitting element 23 at the upper left end and the four first capacitors 34 is close to the average distance between the light emitting element 23 at the lower right end and the four third capacitors 36.
• the light emitting device 1a of the present embodiment may include the first to third capacitors 34 to 36 only near one, two, or three of the four sides of the square. However, it is desirable that the first to third capacitors 34 to 36 in this case are also arranged symmetrically or nearly symmetrically with respect to the center of the square. Therefore, it is preferable that the light emitting device 1a of this embodiment includes the first to third capacitors 34 to 36 on two or more of the four sides of the square. For example, by arranging two sets of first to third capacitors 34 to 36 near the upper and lower sides of a square, it is possible to realize a two-fold rotationally symmetric (180 degree rotationally symmetric) arrangement.
• FIG. 5 is a circuit diagram showing the structure of a light emitting device 1a as a comparative example of the first embodiment.
• the light emitting device 1a of this comparative example includes a light emitting element array including 9 ⁇ 9 light emitting elements 23 arranged in a two-dimensional array.
• the light emitting device 1a of this comparative example includes a capacitor array including 9 ⁇ 9 capacitors 34 arranged in a two-dimensional array, and the capacitor array is arranged on the right side of the light emitting element array.
• Each light emitting element 23 of this comparative example is electrically connected to a corresponding capacitor 34 via a corresponding anode wiring 31.
• the 9 ⁇ 9 light emitting elements 23 of this comparative example are electrically connected to a common drive circuit E (transistor 24) via a common cathode wiring 41.
• the drive circuit E of this comparative example is arranged on the left side of the light emitting element array.
• problems include the large number of anode wires 31 and the average length of the anode wires 31. Furthermore, there is a problem in that the light emitting device 1a of this comparative example includes both a short anode wiring 31 and a long anode wiring 31. As a result, problems arise in that the impedance of each anode wiring 31 increases and the difference in impedance between the anode wirings 31 increases. Another problem is that the length of the cathode wiring 41 between each light emitting element 23 and the drive circuit E varies greatly depending on the light emitting element 23.
• each anode wiring 31 If the impedance of each anode wiring 31 is large, there is a risk that the intensity of light emitted from each light emitting element 23 will be insufficient, and there is a risk that power consumption for driving each light emitting element 23 will increase. Moreover, if the difference in impedance between the anode wirings 31 becomes large, there is a possibility that the difference in intensity of light emitted from different light emitting elements 23 becomes large. As a result, the performance of the distance measuring device 1 may deteriorate.
• the light emitting device 1a of the present embodiment has first to third anode wirings 31 to 33 arranged in a mesh shape, and electrical connections to the first to third anode wirings 31 to 33 arranged symmetrically. It is provided with first to third capacitors 34 to 36 connected to. Therefore, according to the present embodiment, it is possible to suppress the problem of impedance and impedance difference as described above, and improve the performance of the distance measuring device 1. Further, according to the present embodiment, by arranging the cathode wiring 41 for each of the three light emitting elements 23, problems related to the cathode wiring 41 can also be suppressed.
• FIG. 6 is a graph for explaining the performance of the light emitting device 1a of the first embodiment.
• the vertical axis in FIG. 6 represents the LDD output current (output current from the LDD substrate 12 to each light emitting element 23), and the horizontal axis in FIG. 6 represents time.
• FIG. 6 shows the waveform of the LDD output current.
• FIG. 6 further shows the peak value Ipeak of the LDD output current, the pulse width W of the LDD output current, and the half-value width W' of the LDD output current.
• the light emitting device 1a of this embodiment may have the structure shown in FIG. 7A and B instead of the structure shown in FIG. 3A. 7A and 7B, the light emitting device 1a of this embodiment includes an LD chip 11, an LDD board 12, a mounting board 13, and four sets of first to third capacitors 34 to 36.
• This mounting board 13 includes an insulating substrate 51, an insulating film 52, a wiring layer 53, an insulating film 54, a wiring layer 55, and a plurality of wirings 56.
• the LDD substrate 12 shown in FIG. 7A is provided within an insulating substrate 51.
• the insulating film 52 and the wiring layer 53 are sequentially formed on the upper surface of the insulating substrate 51.
• the insulating film 54 and the wiring layer 55 are sequentially formed on the lower surface of the insulating substrate 51.
• the LD chip 11 shown in FIG. 7A is provided on the wiring layer 53.
• Each wiring 56 is formed within the insulating substrate 51, the insulating film 52, and the wiring layer 53, and electrically connects the LD chip 11 and the LDD substrate 12.
• Each of the first to third capacitors 34 to 36 is arranged on the wiring layer 53 via a plurality of solder balls 57, and is connected to the LD chip 11 and the LDD substrate 12 via the solder balls 57 and the wiring layer 53. electrically connected to.
• the shapes of the LD chip 11 and the LDD substrate 12 are square in plan view.
• the light emitting device 1a shown in FIG. 7B includes four sets of first to third capacitors 34 to 36 near the four sides of a square that is the planar shape of the LD chip 11. These first to third capacitors 34 to 36 are arranged symmetrically with respect to the center of this square. Note that the light emitting device 1a shown in FIG. . However, it is desirable that the first to third capacitors 34 to 36 in this case are also arranged symmetrically or nearly symmetrically with respect to the center of the square. Therefore, it is desirable that the light emitting device 1a shown in FIG. 7B includes the first to third capacitors 34 to 36 on two or more of the four sides of the square.
• the plurality of light emitting elements 23, the plurality of transistors 24, and the first to third selection circuits 37 to 39 are provided within the LD chip 11 or the LDD substrate 12, for example.
• the light emitting element 23 is provided within the LD chip 11, similar to the light emitting element 23 shown in FIG. 3B.
• the transistor 24 and the first to third selection circuits 37 to 39 may be provided within the LD chip 11 or may be provided within the LDD substrate 12.
• the first to third capacitors 34 to 36 may be arranged on the LD chip 11 or the LDD substrate 12.
• FIG. 8 is a perspective view schematically showing the structure of the light emitting device 1a of the first embodiment.
• FIG. 8 schematically shows the shapes of the LD chip 11 and the LDD substrate 12 shown in FIGS. 7A and 7B.
• FIG. 8 further schematically shows the first to third horizontal wirings 31a to 33a and the first to third vertical wirings 31b to 33b of the first to third anode wirings 31 to 33 and a plurality of cathode wirings 41. and partially shown.
• the first to third horizontal wirings 31a to 33a and the first to third vertical wirings 31b to 33b have a mesh-like structure.
• first to third anode wirings 31 to 33 and cathode wiring 41 shown in FIG. 8 are drawn between the LD chip 11 and the LDD substrate 12, they may be placed inside the LD chip 11. However, it may be placed within the LDD substrate 12 or between the LD chip 11 and the LDD substrate 12.
• the light emitting device 1a shown in FIG. 9 has the same structure as the light emitting device 1a shown in FIG. Here, a method of driving the light emitting elements 23 indicated by symbols P1 to P6 will be described.
• the light emitting elements 23 indicated by symbols P2 to P4 are electrically connected to the first anode wiring 31 and to different cathode wirings 41.
• driving only these light emitting elements 23 Simultaneous driving
• only the first selection circuit 37 of the first to third selection circuits 37 to 39 is turned on, and the drive for these cathode wirings 41 is turned on.
• Turn on only circuit E As a result, charge is accumulated only in the first capacitor 34 of the first to third capacitors 34 to 36, and only the nine light emitting elements 23 electrically connected to these cathode wirings 41 are driven. Become.
• the light emitting elements 23 indicated by symbols P5 and P6 are electrically connected to the first and second anode wirings 31 and 32, respectively, and are also electrically connected to the same cathode wiring 41.
• driving only these light emitting elements 23 Simultaneous driving
• only the first and second selection circuits 37 and 38 of the first to third selection circuits 37 to 39 are turned on, and this cathode wiring Only the drive circuit E for 41 is turned on.
• charges are accumulated only in the first and second capacitors 34 and 35 of the first to third capacitors 34 to 36, and only in the three light emitting elements 23 electrically connected to the cathode wiring 41. is the driving target.
• the individual driving of the light emitting elements 23 indicated by the symbol P1 can also be applied to the other 80 light emitting elements 23. This also applies to the simultaneous driving of the light emitting elements 23 indicated by P2 to P6.
• the number of light emitting elements 23 to be simultaneously driven may be any number. Control of these individual drives and simultaneous drives is performed, for example, by the control section 9 shown in FIG.
• FIG. 10 is a circuit diagram showing the structure of a light emitting device 1a according to a second modification of the first embodiment.
• the light emitting device 1a of this modification includes first to third cathode wirings 31' to 33' at the positions of the first to third anode wirings 31 to 33 shown in FIG.
• a plurality of anode wirings 41' are provided, but a plurality of gate wirings 42 are not provided.
• the first to third cathode wirings 31' to 33' are the first to third horizontal wirings 31a' to 33a' and the first to third vertical wirings, similar to the first to third anode wirings 31 to 33, respectively. It includes wirings 31b' to 33b'.
• the first to third cathode wirings 31' to 33' are examples of first terminal wirings of the present disclosure.
• the anode wiring 41' is an example of the second terminal wiring of the present disclosure.
• Each light emitting element 23 of this modification has a cathode electrically connected to one of the first to third cathode wirings 31' to 33' and an electrically connected to any one of the plurality of anode wirings 41'. and an anode.
• the light emitting device 1a of this modification further includes first to third transistors 61 to 63 at the positions of the first to third capacitors 34 to 36 shown in FIG. 4, respectively.
• the first to third transistors 61 to 63 are, for example, N-type MOS transistors.
• the gates of the first to third transistors 61 to 63 are electrically connected to first to third gate wirings 64 to 66, respectively.
• Each of the first to third transistors 61 to 63 has a drain electrically connected to one of the first to third cathode wirings 31' to 33' and a source electrically connected to the ground wiring. have.
• Each of the first to third transistors 61 to 63 forms a drive circuit E.
• Drive circuits E including first to third transistors 61 to 63 are examples of first to Nth drive circuits, respectively.
• the light emitting device 1a of this modification further includes a plurality of capacitors 67 at the positions of the plurality of transistors 24 shown in FIG.
• Each of these capacitors 67 includes one electrode electrically connected to one of the plurality of anode wires 41' and the other electrode electrically connected to the ground wire.
• the light emitting device 1a of this modification further includes a plurality of selection circuits 68 instead of the first to third selection circuits 37 to 39.
• Each selection circuit 68 is electrically connected to one corresponding anode wiring 41'.
• Each selection circuit 68 includes a transistor 68a having a source electrically connected to a power supply wiring, and a transistor 68b having a source electrically connected to a ground wiring.
• the drain of the transistor 68a and the drain of the transistor 68b are electrically connected to the cathode wiring 41.
• Each selection circuit 68 is electrically connected to a corresponding capacitor 67 via an anode wiring 41'.
• the transistor 68a is, for example, a P-type MOS transistor.
• the transistor 68b is, for example, an N-type MOS transistor.
• Transistor 68a is an example of a first switch of the present disclosure.
• Transistor 68b is an example of a second switch of this disclosure.
• capacitor 67, transistor 68a, and transistor 68b are similar to those of first to third capacitors 34 to 36, transistors 37a to 39a, and transistors 37b to 39b, respectively.
• Transistor 68a can store charge in corresponding capacitor 67.
• Transistor 68b can discharge charge from corresponding capacitor 67.
• the capacitor 67 can cause current to flow through the light emitting element 23 by supplying charge to the light emitting element 23 via the anode wiring 41'.
• first to third transistors 61 to 63 and their driving circuit E are similar to those of the transistor 34 and its driving circuit E.
• the first to third transistors 61 to 63 can drive the light emitting elements 24 electrically connected to the first to third cathode wirings 31' to 33', respectively.
• the light emitting device 1a of this modification it is possible to realize the same control as the light emitting device 1a of the first embodiment due to the structure different from that of the light emitting device 1a of the first embodiment.
• FIG. 11 is a circuit diagram showing the structure of a light emitting device 1a according to a third modification of the first embodiment.
• the light emitting device 1a of this modification includes first to third cathode wirings 31' to 33' at the positions of the first to third anode wirings 31 to 33 shown in FIG. , and a plurality of gate wirings 42' at the positions of the plurality of gate wirings 42.
• the first to third cathode wirings 31' to 33' are the first to third horizontal wirings 31a' to 33a' and the first to third vertical wirings, respectively, similarly to the first to third anode wirings 31 to 33. It includes wirings 31b' to 33b'.
• the first to third cathode wirings 31' to 33' are examples of first terminal wirings of the present disclosure.
• the anode wiring 41' is an example of the second terminal wiring of the present disclosure.
• Each light emitting element 23 of this modification has a cathode electrically connected to one of the first to third cathode wirings 31' to 33' and an electrically connected to any one of the plurality of anode wirings 41'. and an anode.
• Each transistor 24 of this modification has a gate electrically connected to one of the plurality of gate wirings 42', a drain electrically connected to one of the plurality of anode wirings 41', and a power supply wiring. and an electrically connected source.
• Each transistor 24 in this modification is, for example, a P-type MOS transistor.
• the first to third capacitors 34 to 36 and the first to third selection circuits 37 to 39 of this modification are electrically connected to the first to third cathode wirings 31' to 33', respectively.
• the light emitting device 1a of this modification it is possible to realize the same control as the light emitting device 1a of the first embodiment due to the structure different from that of the light emitting device 1a of the first embodiment.
• FIG. 12 is a circuit diagram showing the structure of a light emitting device 1a according to a fourth modification of the first embodiment.
• the light emitting device 1a of this modification includes six sets of first to third capacitors 34 to 36 instead of the four sets of first to third capacitors 34 to 36 shown in FIG.
• the first to third capacitors 34 to 36 of this modification are arranged in the LD chip 11 (or in the LDD substrate 12), so they are arranged near the light emitting element 23.
• each first capacitor 34 is electrically connected to any horizontal wiring 31a
• each second capacitor 35 is electrically connected to any horizontal wiring 32a
• each third capacitor 36 is electrically connected to any horizontal wiring 32a. is electrically connected to one of the horizontal wirings 33a.
• the light emitting device 1a of this modification it is possible to realize the same control as the light emitting device 1a of the first embodiment due to the structure different from that of the light emitting device 1a of the first embodiment.
• FIG. 13 is a circuit diagram showing the structure of a light emitting device 1a according to a fifth modification of the first embodiment.
• the light emitting device 1a of this modification does not include the first to third capacitors 34 to 36.
• charges to be supplied to each light emitting element 1a are stored in parasitic capacitances, which will be described later, instead of the first to third capacitors 34 to 36.
• FIG. 14 is another circuit diagram showing the structure of the light emitting device 1a of the fifth modification of the first embodiment.
• the light emitting device 1a of this modification it is possible to realize the same control as the light emitting device 1a of the first embodiment due to the structure different from that of the light emitting device 1a of the first embodiment.
• FIG. 15 is a circuit diagram showing various examples of the structure of the light emitting device 1a of the sixth modification of the first embodiment.
• the light emitting device 1a of this modification has the structure shown in FIG. 4 similarly to the light emitting device 1a of the first embodiment.
• each drive circuit E of the first embodiment has a structure shown in A of FIG. 15
• each drive circuit E of this modification has a structure shown in one of B to D of FIG. It has a structure.
• the drive circuit E shown in FIG. 15B includes three transistors 24 electrically connected to the cathode wiring 41 and three transistors 25 electrically connected to these transistors 24.
• the transistors 24 and 25 shown in FIG. 15B are, for example, N-type MOS transistors.
• the gates of these transistors 24 are electrically connected to a common gate wiring 42
• the gates of these transistors 25 are electrically connected to a common gate wiring 43 .
• Transistors 24 and 25 are examples of first and second transistors, respectively, of the present disclosure.
• Each transistor 24 is used to select a light emitting element 23 that generates light.
• Each transistor 25 is used as a current source. For example, when generating light from a certain light emitting element 23, a predetermined signal is applied to the gate wiring 42 of the drive circuit E for this light emitting element 23, and the gate wiring of the drive circuit E for this light emitting element 23 is applied. A predetermined signal (DC bias voltage) is applied to 43. As a result, the source and drain of each transistor 24 in this drive circuit E are brought into conduction, and the source and drain of each transistor 25 in this drive circuit E are brought into conduction, allowing current to flow through this light emitting element 23. becomes possible. At this time, each transistor 25 functions as a current source.
• the drive circuit E shown in FIG. 15C includes three transistors 24 electrically connected to the cathode wiring 41.
• the transistor 24 shown in FIG. 15C is, for example, an NPN type bipolar transistor. In this case, the wiring 42 becomes a "base wiring” rather than a "gate wiring”.
• the operation of the drive circuit E shown in FIG. 15C is similar to the drive circuit E shown in FIG. 15A.
• the drive circuit E shown in D in FIG. 15 includes three transistors 24 electrically connected to the cathode wiring 41 and three transistors 25 electrically connected to these transistors 24.
• the transistors 24 and 25 shown in FIG. 15D are, for example, NPN bipolar transistors. In this case, the wires 42 and 43 become "base wires" rather than "gate wires.”
• the operation of the drive circuit E shown in FIG. 15D is similar to the drive circuit E shown in FIG. 15B.
• FIG. 16 is a circuit diagram showing the structure of a light emitting device 1a according to a seventh modification of the first embodiment.
• the light emitting device 1a of this modification includes first to third voltage detection circuits 71 to 73 in addition to the components shown in FIG.
• the first voltage detection circuit 71 is electrically connected to the first horizontal wiring 31a of the first anode wiring 31 and the gate of the transistor 37a.
• the second voltage detection circuit 72 is electrically connected to the second horizontal wiring 32a of the second anode wiring 32 and the gate of the transistor 38a.
• the third voltage detection circuit 73 is electrically connected to the third horizontal wiring 33a of the third anode wiring 33 and the gate of the transistor 39a.
• the first voltage detection circuit 71 detects the voltage of the first anode wiring 31 from the first horizontal wiring 31a of the first anode wiring 31. This voltage indicates the amount of charge stored in the four first capacitors 34. Therefore, the first voltage detection circuit 71 controls the gate voltage of the transistor 37a based on the voltage detected from the first anode wiring 31. For example, if the detected voltage is lower than a predetermined voltage, transistor 37a is turned on and charge accumulation begins. On the other hand, if the detected voltage is higher than the predetermined voltage, the transistor 37a is turned off to end the charge accumulation. According to this modification, by changing the value of this predetermined voltage, it is possible to change the output power of the light emitting device 1a. The value of this predetermined voltage is adjusted, for example, by the control section 9 shown in FIG.
• the second voltage detection circuit 72 detects the voltage of the second anode wiring 32, and controls the gate voltage of the transistor 38a based on the detected voltage.
• the third voltage detection circuit 73 detects the voltage of the third anode wiring 33, and controls the gate voltage of the transistor 39a based on the detected voltage.
• Curves A1 and A2 indicate the gate voltages of the anode-side PMOS, that is, the transistors 37a to 39a.
• Curve B shows the gate voltage of the NMOS on the anode side, that is, the transistors 37b to 39b.
• Curve C shows the gate voltage of the NMOS, ie, transistor 24, on the cathode side.
• Curves D1 and D2 indicate the voltages (anode voltages) of the first to third anode wirings 31 to 32.
• Curves E1 and E2 indicate output currents (LDD output currents) from the LDD substrate 12 to each light emitting element 23.
• Curve A2 shows the case where the pulse width of the gate voltage of transistors 37a to 39a is long. In this case, transistors 37a to 39a are turned off with a high anode voltage (curve D2), and high power light emission is obtained (curve E2).
• FIG. 18 is a cross-sectional view and a plan view showing the structure of a light emitting device 1a according to an eighth modification of the first embodiment.
• the light emitting device 1a of this modification has the structure shown in A and B of FIG. 18 instead of the structure shown in A and B of FIG. A in FIG. 18 shows an XZ cross section of the light emitting device 1a of this modification.
• FIG. 18B shows a planar structure of the light emitting device 1a shown in FIG. 18A.
• the LDD board 12 is placed on the wiring layer 53 via a plurality of solder balls 58, and is connected to the first to third capacitors 34 to 36 via the solder balls 58 and the wiring layer 53. electrically connected.
• the LD chip 11 is mounted on the LDD substrate 12 via a plurality of bumps 59, and is electrically connected to the LDD substrate 12 via these bumps 59. These bumps 59 are made of metal such as gold (Au), for example.
• the other structure of the light emitting device 1a of this modification is the same as the structure shown in FIGS. 7A and 7B.
• the light emitting device 1a of this modification it is possible to realize the same control as the light emitting device 1a of the first embodiment due to the structure different from that of the light emitting device 1a of the first embodiment.
• the light emitting device 1a of the present embodiment has the first to third anode wirings 31 to 33 arranged in a mesh shape, and the first to third anode wirings 31 to 33 arranged symmetrically.
• the first to third capacitors 34 to 36 are electrically connected to each other. Therefore, according to this embodiment, it is possible to suppress the problem of impedance and impedance difference as described above, and improve the performance of the distance measuring device 1. Further, according to the present embodiment, by arranging the cathode wiring 41 for each of the three light emitting elements 23, problems related to the cathode wiring 41 can also be suppressed. In this way, according to this embodiment, it is possible to optimize the structure of the wiring for the light emitting element 23.
• FIG. 19 is a circuit diagram showing the structure of a light emitting device 1a of the second embodiment.
• the light emitting device 1a of this embodiment includes a fourth anode wiring 81, a plurality of fourth capacitors 82, and a fourth selection circuit 83 in addition to the components shown in FIG.
• the fourth anode wiring 81 includes a plurality of fourth horizontal wirings 81a and a plurality of fourth vertical wirings 81b.
• the fourth selection circuit 83 includes transistors 83a and 83b.
• the first to fourth selection circuits 37, 38, 39, and 83 are examples of the first to Nth selection circuits of the present disclosure.
• FIG. 19 shows an example where N is 4.
• FIG. 19 shows the first anode wiring 31 with a thick solid line
• the third anode wiring 33 is shown by a thin solid line
• the fourth anode wiring 81 is shown by a thin broken line.
• the light emitting device 1a of this embodiment includes 8 ⁇ 8 light emitting elements 23 arranged in a two-dimensional array. Therefore, the first to fourth anode wirings 31, 32, 33, 81 of this embodiment are the four sets of first to fourth horizontal wirings 31a, 32a, 33a, 81a and the first to fourth vertical wirings 31b, 32b. , 33b, and 81b. These are examples of the first to Nth horizontal wirings and the first to Nth vertical wirings of M sets of the present disclosure.
• FIG. 19 shows an example where M is 4.
• the number of light emitting elements 23 shown in FIG. 19 is N(M-2) ⁇ N(M-2).
• the light emitting device 1a of this embodiment further includes 8 ⁇ 8 transistors 24 electrically connected to these light emitting elements 23.
• the first to fourth capacitors 34, 35, 36, 82 of this embodiment include four sets of first to fourth capacitors 34, 35, 36, 82.
• the first to fourth capacitors 34, 35, 36, and 82 of each set are arranged in order near one side of the square light emitting element array. Therefore, the first to fourth capacitors 34, 35, 36, and 82 of this embodiment are also arranged symmetrically with respect to this square.
• the first to fourth capacitors 34, 35, 36, and 82 are examples of the first to Nth capacitors of K sets of the present disclosure.
• FIG. 19 shows an example where K is 4.
• the structures and functions of the fourth anode wiring 81, the fourth capacitor 82, and the fourth selection circuit 83 of the present embodiment are the first to third anode wirings 31 to 33, the first to third capacitors 34 to 36, and This is similar to the first to third selection circuits 37 to 39. Further, the structures and functions of the cathode wiring 41 and gate wiring 42 of this embodiment are also similar to those of the cathode wiring 41 and gate wiring 42 of the first embodiment, respectively. However, since the value of N in this embodiment is 4 instead of 3, each cathode wiring 41 is electrically connected to four light emitting elements 23, and each gate wiring 42 is electrically connected to four transistors 24. electrically connected.
• N it is desirable to set the value of N to an appropriate value depending on the usage of the light emitting device 1a. For example, reducing the value of N has the advantage that the inductance of the wiring for each light emitting element 23 can be reduced, and the number of capacitors and selection circuits can be reduced. On the other hand, increasing the value of N has the advantage that the number of cathode wirings 41 and gate wirings 42 can be reduced, and the number of common cathode wirings 41 connected to the transistors 24 can be increased, so that the driving ability of the transistors 24 can be increased. There is an advantage.
• FIG. 20 is a plan view schematically showing the structure of a light emitting device 1a of the third embodiment.
• the light emitting device 1a of this embodiment has the structure shown in FIG. 4, similar to the light emitting device 1a of the first embodiment. Furthermore, the light emitting device 1a of this embodiment has the structure shown in A and B of FIG. 20.
• a in FIG. 20 schematically shows the shape of the LD chip 11 in plan view.
• Each region R1 shown in A of FIG. 20 indicates a region occupied by one light emitting element 23.
• the area of each region R1 corresponds to the size of one light emitting element 23.
• a in FIG. 20 shows 9 ⁇ 9 regions R1 corresponding to 9 ⁇ 9 light emitting elements 23.
• the size of one drive circuit E is the same as the size of the three light emitting elements 23. That is, the area of one region R2 is the same as the area of three regions R1, as shown in A and B of FIG. 20. Specifically, the shape of one region R2 is congruent with the shapes of three regions R1.
• Such a structure is suitable, for example, when employing the structure shown in FIG. 18A.
• the LD chip 11 is mounted on the LDD substrate 12.
• each drive circuit E can be placed directly below the corresponding three light emitting elements 23. This makes it possible to further reduce the impedance of the wiring for each light emitting element 23. Note that when each drive circuit E corresponds to N light emitting elements 23, it is desirable that the size of one drive circuit E be the same as the size of N light emitting elements 23.
• the light emitting device 1a of the first to third embodiments is used as a light source of the distance measuring device 1, it may be used in other ways.
• the light emitting device 1a of these embodiments may be used as a light source of an optical device such as a printer, or may be used as a lighting device.
• a light emitting device comprising:
• One of the first and second terminals of the light emitting element is an anode, The other of the first and second terminals of the light emitting element is a cathode, One of the first and second terminal wires is an anode wire, the other of the first and second terminal wiring is a cathode wiring;
• the plurality of selection circuits include first to Nth selection circuits electrically connected to the first to Nth horizontal wirings or the first to Nth vertical wirings, respectively, The light emitting device according to (1), wherein each of the plurality of drive circuits is electrically connected to one of the second terminal wirings. (5) (4) simultaneously causing two or more of the light emitting elements to emit light by turning on one of the first to Nth selection circuits and two or more of the plurality of drive circuits; The light emitting device described in .
• Each of the plurality of selection circuits is electrically connected to one of the second terminal wirings
• the light emitting device (9) The light emitting device according to (8), wherein the plurality of capacitors include first to Nth capacitors electrically connected to the first to Nth horizontal wirings or the first to Nth vertical wirings, respectively. (10) (9) The plurality of capacitors include K groups (K is an integer of 2 or more) of the first to Nth capacitors arranged near two or more of the four sides of the array of light emitting elements.
• K is an integer of 2 or more
• each of the plurality of capacitors is electrically connected to one of the second terminal wirings.
• the plurality of capacitors are arranged on a first substrate on which the light emitting element is provided, on a second substrate on which at least one of the selection circuit and the drive circuit is provided, or on the first and second substrates.
• the light emitting device according to (8) which is placed on a mounting board.
• each of the plurality of selection circuits includes a first switch that stores charge in the capacitor and a second switch that discharges charge from the capacitor.
• the light emitting device further comprising a plurality of voltage detection circuits that detect a voltage indicating the amount of charge stored in the plurality of capacitors and control the first switch based on the voltage.
• each of the plurality of drive circuits includes a first transistor that selects the light emitting element that generates light, and a second transistor that functions as a current source.

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• 2023
  • 2023-01-30 JP JP2024509806A patent/JPWO2023181639A1/ja active Pending
  • 2023-01-30 EP EP23774238.2A patent/EP4503351A4/en active Pending
  • 2023-01-30 CN CN202380019831.0A patent/CN118633217A/zh active Pending
  • 2023-01-30 US US18/846,407 patent/US20250192511A1/en active Pending
  • 2023-01-30 WO PCT/JP2023/002833 patent/WO2023181639A1/ja not_active Ceased
  • 2023-03-17 TW TW112109887A patent/TW202405380A/zh unknown

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