WO2023179379A1 - 一种非线性延迟电路系统的仿真方法、系统及介质 - Google Patents

一种非线性延迟电路系统的仿真方法、系统及介质 Download PDF

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WO2023179379A1
WO2023179379A1 PCT/CN2023/080789 CN2023080789W WO2023179379A1 WO 2023179379 A1 WO2023179379 A1 WO 2023179379A1 CN 2023080789 W CN2023080789 W CN 2023080789W WO 2023179379 A1 WO2023179379 A1 WO 2023179379A1
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delay circuit
output
circuit system
matrix
network model
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PCT/CN2023/080789
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French (fr)
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邱志勇
郭振华
闫瑞栋
赵雅倩
李仁刚
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苏州浪潮智能科技有限公司
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F18/00Pattern recognition
    • G06F18/20Analysing
    • G06F18/21Design or setup of recognition systems or techniques; Extraction of features in feature space; Blind source separation
    • G06F18/213Feature extraction, e.g. by transforming the feature space; Summarisation; Mappings, e.g. subspace methods
    • G06F18/2135Feature extraction, e.g. by transforming the feature space; Summarisation; Mappings, e.g. subspace methods based on approximation criteria, e.g. principal component analysis
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/04Architecture, e.g. interconnection topology
    • G06N3/045Combinations of networks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/08Learning methods

Definitions

  • the present application relates to the field of circuit simulation technology, and in particular to a simulation method, system and medium for a nonlinear delay circuit system.
  • the nonlinear delay circuit system is one of the most complex circuit modules within the integrated circuit.
  • complex mathematical models need to be solved. In the case of large-scale circuits, the solution is more difficult.
  • Most of the current mathematical model processing methods for nonlinear delay circuit systems are numerical methods. Numerical methods are time-consuming in the processing process, and the calculation time is often unacceptable or even impossible to solve.
  • the chip Due to the huge number of on-chip interconnect lines and the gradually increasing chip operating frequency, the chip needs to undergo repeated simulation verification before tape-out manufacturing. This requires accurate modeling of each circuit module inside the chip. In the case of high-speed signals, the signal transmission delay needs to be taken into account. Therefore, the resulting mathematical model is relatively complex and huge in scale, and direct simulation analysis requires calculations. The amount of chips is huge, and the chip needs to go through multiple parameter debugging and simulation analysis during the design stage to meet the design requirements. Directly using the mathematical model of the original interconnection delay system for analysis and simulation has poor timeliness.
  • this application proposes a simulation method, system and medium for a nonlinear delay circuit system to avoid repeatedly solving the mathematical model of a large-scale nonlinear delay circuit system and the amount of calculation required for each simulation calculation. compare Small, greatly reducing the time cost of simulation analysis of integrated circuits, and improving chip development efficiency.
  • a simulation method of a nonlinear delay circuit system including the following steps:
  • a basis function is constructed based on singular value vectors and singular values, and the state variable function is obtained based on the basis function;
  • the signal is input to the trained temporal convolutional network model to output the value of the state variable of the nonlinear delay circuit system.
  • the principal component analysis method is used to calculate the output matrix to obtain the singular value vector and singular value of the output matrix, including:
  • constructing the basis function based on the singular value vector and the singular value includes:
  • the expression of the basis function is:
  • E square is the interpolation matrix
  • ⁇ i is the singular value of E square
  • V i is the singular value vector of E square corresponding to ⁇ i
  • n is the number of singular values of E square ;
  • t r is the r-th time, where r ⁇ 1,2,...,m ⁇ , x(t r ) is the output value of the state variable of the nonlinear delay circuit system at time t r , is the mean vector of E square , is the coefficient, q is the number of singular values of E square selected from n.
  • building a temporal convolutional network model includes:
  • the output matrix includes output values of all state variables of the nonlinear delay circuit system output after simulating the nonlinear delay circuit system.
  • obtaining the training data of the temporal convolutional network model based on the output matrix and the state variable function includes:
  • the expression of the coefficient is derived based on the state variable function
  • the training data set and validation data set of the temporal convolutional network model are obtained based on the values of all coefficients.
  • the nonlinear delay circuit system is simulated to obtain an output matrix of the nonlinear delay circuit system, including:
  • the nonlinear delay circuit system is simulated and the output matrix of the nonlinear delay circuit system is obtained.
  • a simulation system for a nonlinear delay circuit system including:
  • the simulation module is configured to simulate the nonlinear delay circuit system and obtain the output matrix of the nonlinear delay circuit system
  • the calculation module is configured to use the principal component analysis method to calculate the output matrix to obtain the singular value vector and singular value of the output matrix;
  • the calculation module is also configured to construct a basis function based on the singular value vector and the singular value, and obtain the state variable function based on the basis function;
  • the building module is configured to build a temporal convolutional network model, and obtain training data for the temporal convolutional network model based on the output matrix and the state variable function;
  • a training module the training module is configured to train the temporal convolutional network model based on the training data of the temporal convolutional network model;
  • the output module is configured to input signals to the trained temporal convolutional network model to output values of state variables of the nonlinear delay circuit system.
  • non-volatile computer-readable storage medium stores a computer program that implements the above method steps when executed by a processor.
  • the output matrix of the nonlinear delay circuit system is obtained; using the principal component analysis method to calculate the output matrix, the singular value vector and singular value of the output matrix are obtained; based on the singular value vector and singular value construction basis function, and obtain the state variable function based on the basis function; construct a time series convolution network model, and obtain the state variable function based on the output moment
  • the matrix and state variable function are used to obtain the training data of the temporal convolutional network model; the temporal convolutional network model is trained based on the training data of the temporal convolutional network model; the signal is input to the trained temporal convolutional network model to output nonlinear delay
  • the value of the state variable of the circuit system avoids the need to repeatedly solve the mathematical model of the large-scale nonlinear delay circuit system, and the amount of calculation required for each simulation calculation is small, which greatly reduces the time cost of the simulation analysis of the integrated circuit and improves the Improve chip R&D efficiency.
  • Figure 1 is a block diagram of an embodiment of a simulation method for a nonlinear delay circuit system provided by this application;
  • Figure 2 is a schematic diagram of an embodiment of the temporal convolution model provided by this application.
  • FIG. 3 is a schematic diagram of an embodiment of atrous convolution provided by this application.
  • Figure 4 is a schematic diagram of an embodiment of the temporal convolution module provided by this application.
  • Figure 5 is a schematic diagram of the output of state variables at any time based on the trained temporal convolutional network model provided by this application;
  • Figure 6 is a schematic diagram of a nonlinear delay circuit system
  • Figure 7 is a comparison chart of simulation results of simulating the nonlinear delay circuit system of Figure 6;
  • Figure 8 is a schematic diagram of an embodiment of the simulation system of the nonlinear delay circuit system provided by this application.
  • Figure 9 is a schematic structural diagram of an embodiment of a non-volatile computer-readable storage medium provided by this application.
  • FIG. 10 is a schematic structural diagram of an embodiment of the electronic device provided by this application.
  • the first aspect of the embodiments of this application proposes an embodiment of a simulation method for a nonlinear delay circuit system. As shown in Figure 1, it includes the following steps:
  • Step S10 Simulate the nonlinear delay circuit system to obtain the output matrix of the nonlinear delay circuit system
  • Step S20 Use the principal component analysis method to calculate the output matrix to obtain the singular value vector and singular value of the output matrix
  • Step S30 Construct a basis function based on the singular value vector and the singular value, and obtain the state variable function based on the basis function;
  • Step S40 Construct a temporal convolutional network model, and obtain training data for the temporal convolutional network model based on the output matrix and state variable function;
  • Step S50 Train the temporal convolutional network model based on the training data of the temporal convolutional network model
  • Step S60 Input the signal to the trained temporal convolutional network model to output the value of the state variable of the nonlinear delay circuit system.
  • the value of the matrix E ⁇ R n ⁇ n is composed of inductance value and capacitance value.
  • R n ⁇ n represents a real matrix of n rows by n columns.
  • n is a natural number that does not contain 0.
  • the function f(x) is an integrated circuit.
  • Mathematical model of internal nonlinear components B ⁇ R n ⁇ 1 is the input matrix, u(t) is the input, C ⁇ R 1 ⁇ n is the output matrix; the unknown variable x(t) ⁇ R n ⁇ 1 is the The node voltage or branch current, n is the order of the circuit system, and ⁇ is the signal transmission delay.
  • the simulation calculation of this equation will be extremely complex and time-consuming. In the process of simulating and analyzing the performance of integrated circuits such as signal integrity, the above mathematical model needs to be solved multiple times, resulting in a huge amount of calculation.
  • the embodiment of the present application proposes a simulation method of a nonlinear delay circuit system.
  • the process can be as follows:
  • step S10 before simulating the nonlinear delay circuit system, the simulation time interval and the time interval in the time interval are set in advance to obtain the output value of the state variable at a specific time.
  • the output matrix F square contains the output of the values of the state variables at all moments in the time interval.
  • Matrix F square . F square [x(t 1 ),...,x(t j )...,x(t m )];
  • x(t j ) is the output of all state variables x of the nonlinear delay circuit system at time t j , j and m are natural numbers excluding 0, t j represents the j-th time, and the time represented is j ⁇ T, t m represents the m-th moment, and the time represented is m ⁇ T.
  • the square wave signal is only an example of the embodiment of the present application.
  • the input of the nonlinear delay circuit system Signals can also include input signals such as sine waves and triangle waves.
  • step S20 the principal component analysis method is used to extract the main information in F square .
  • Principal component analysis method transform multiple indicators into a small number of comprehensive indicators (i.e. principal components), each of which can reflect most of the information of the original variables, and the information contained does not overlap with each other.
  • the principal component analysis method is used to convert a set of related variables x(t j ) in the matrix F square into another set of uncorrelated variables through linear transformation. These new variables are arranged in the order of decreasing variance.
  • the total variance of the variables is kept constant, so that the first variable has the largest variance, which is called the first principal component, and the second variable has the second largest variance and is not related to the first variable, which is called the second principal component. .
  • the principal components are sorted from large to small; when the cumulative variation percentages of the top principal components reach a certain value (such as 75%, 80%, 85%), the following principal components are The principal components are removed to compress the data and improve the calculation speed of the simulation.
  • Principal component analysis methods include: eigenvalue decomposition, SVD (Singular Value Decomposition, singular value decomposition), NMF (Non-negative Matrix Factorization, non-negative matrix decomposition), etc.
  • the output matrix F square is calculated through the principal component analysis method to obtain the singular value vector and singular value of the output matrix F square .
  • step S30 a basis function is constructed based on the singular value vector and the singular value, and a state variable function is obtained based on the basis function.
  • This step reflects the value of the state variable output by the nonlinear delay circuit system at any time through the state variable function, so that after the input signal is subsequently input to the nonlinear delay circuit system, the state variable output at any time can be directly obtained through the state variable function. The value speeds up the calculation speed of nonlinear delay circuit system simulation.
  • step S40 and step S50 a temporal convolutional network model is constructed, and the training data of the temporal convolutional network model is obtained based on the output matrix and the state variable function; the temporal convolutional network model is performed based on the training data of the temporal convolutional network model. train.
  • the temporal convolutional network model is used to represent the relationship between the input data at the current moment and the input data at the previous k moments.
  • the trained temporal convolutional network model can better predict any nonlinear delay circuit system. The value of the state variable output at all times ensures the accuracy of the simulation of the nonlinear delay circuit system.
  • step S60 by inputting the signal into the trained sequential convolutional network model, the value of the state variable of the nonlinear delay circuit system at any time can be obtained without repeatedly solving the mathematical model of the nonlinear delay circuit system, thereby speeding up the process. It improves the calculation speed of nonlinear delay circuit system simulation and ensures the accuracy of nonlinear delay circuit system simulation.
  • the nonlinear delay circuit system only needs to be simulated and solved once, avoiding the need to repeatedly solve the large problem.
  • the mathematical model of the large-scale nonlinear delay circuit system is solved, and the amount of calculation required for each simulation calculation is small, which greatly reduces the time cost of simulation analysis of integrated circuits and improves the research and development efficiency of chips.
  • the principal component analysis method is used to calculate the output matrix to obtain the singular value vector and singular value of the output matrix, including:
  • constructing the basis function based on the singular value vector and the singular value includes:
  • the expression of the basis function is:
  • E square is the interpolation matrix
  • ⁇ i is the singular value of E square
  • V i is the singular value vector of E square corresponding to ⁇ i
  • n is the number of singular values of E square ;
  • t r is the r-th time, where r ⁇ 1,2,...,m ⁇ , x(t r ) is the output value of the state variable of the nonlinear delay circuit system at time t r , is the mean vector of E square , is the coefficient, q is the number of singular values of E square selected from n.
  • building a temporal convolutional network model includes:
  • the output matrix includes output values of all state variables of the nonlinear delay circuit system output after simulating the nonlinear delay circuit system.
  • obtaining the training data of the temporal convolutional network model based on the output matrix and the state variable function includes:
  • the expression of the coefficient is derived based on the state variable function
  • the training data set and validation data set of the temporal convolutional network model are obtained based on the values of all coefficients.
  • the nonlinear delay circuit system is simulated to obtain an output matrix of the nonlinear delay circuit system, including:
  • the nonlinear delay circuit system is simulated and the output matrix of the nonlinear delay circuit system is obtained.
  • the principal component analysis method obtains the singular values and singular value vectors of the output matrix F square by performing singular value decomposition on the output matrix F square .
  • Step 3 Carry out the following loop:
  • the interpolation selection matrix N is obtained.
  • E square U ⁇ V T
  • U ⁇ R n ⁇ n is the left singular value vector of the matrix E square
  • ⁇ R n ⁇ m is Singular values of matrix E square
  • V T ⁇ R m ⁇ m is the right singular value vector of matrix E square .
  • ⁇ i is the singular value of the interpolation matrix E square
  • n is the number of singular values of the interpolation matrix E square
  • Vi is the singular value vector of the interpolation matrix E square , which corresponds to ⁇ i one-to-one.
  • t r is the r-th time, where r ⁇ 1,2,...,m ⁇ , x(t r ) is the output value of the state variable of the nonlinear delay circuit system at time t r , is the mean vector of E square , is the coefficient, q is the number of singular values of E square selected from n.
  • k is a natural number excluding 0.
  • the temporal convolutional network model includes an input layer, at least one temporal convolution module, a fully connected layer and an output layer, where the input layer is used to input training data The output layer is used to output training results
  • a sequential convolution module is constructed based on atrous convolution and residual connection.
  • k represents the convolution kernel size
  • d represents the dilation parameter, that is, the hole interval size, which is used to expand Receptive horizons of causal networks.
  • Dropout is interpreted as discarding
  • Relu is interpreted as an activation function.
  • the traditional convolutional network model cannot directly handle sequence modeling. When dealing with sequence problems, causal convolution needs to be used. Its function is to abstract the sequence problem. According to to predict The output of each layer of atrous convolution is obtained from the input of the corresponding position of the previous layer and the input of the previous position, and if there are many hidden layers before the output layer and the input layer, Then the more inputs correspond to an output, and the further apart the inputs and outputs are, the earlier input variables need to be considered to participate in the operation, so that timing issues can be dealt with. However, as the number of convolution layers increases, problems such as vanishing gradients, complex training, and poor fitting effects arise.
  • dilated convolution is used to reduce the number of convolution layers and increase the convolution efficiency.
  • Dilated convolution allows the filter (filter) to be applied to an area larger than the length of the filter itself by skipping part of the input.
  • filter filter
  • FIG 3 you can see the pair of neurons in the next layer of the causal neural network.
  • the historical data perception field of primary neurons is greatly expanded, which also improves the modeling ability of causal convolutional networks for time series speculation tasks that require long memory.
  • the temporal convolution module is connected by a hole causal convolution layer, a weight normalization layer, an activation function layer and a dropout layer, and uses a residual structure.
  • the temporal convolutional network model constructed based on the above can model time series tasks well. Will the previous k moments As training data, get the current r time Then based on the state variable function, the output value of the state variable at the current moment is obtained, and the current moment can be freely selected. Thus, the output value of the state variable at any time can be obtained.
  • x(t j ) is the value of the state variable in the output matrix F square of the simulation output of the nonlinear delay circuit system.
  • the coefficients All values of are split into training set and validation set. For example, the coefficient 80% of all values are split as training set and the remaining 20% as validation set.
  • the constructed temporal convolutional network is trained based on the training set and verification set.
  • the optimizer used in the training process is the Adam optimizer, the number of training epochs is 50, the loss function is the mean square error function, and the trained temporal convolutional network model is obtained.
  • the trained model can predict the coefficients well Make a prediction and obtain the value of the state variable x(t j ) at any time.
  • the process is as follows:
  • the amount of calculation can be greatly reduced during the simulation process of the nonlinear delay circuit system, avoiding repeatedly solving the large-scale nonlinear delay circuit system, reducing the calculation time and improving the calculation speed while ensuring accuracy.
  • the nonlinear delay circuit system in Figure 6 is composed of three coupled interconnection lines.
  • the sending end and receiving end are nonlinear circuit devices, forming the entire nonlinear delay circuit system.
  • the mathematical model of the nonlinear delay circuit is
  • the size of the matrix is E ⁇ R 1806 ⁇ 1806
  • the function f(x) is the mathematical model of the nonlinear components in Figure 6
  • B ⁇ R 1806 ⁇ 1 is the input matrix
  • u(t) is the input
  • C ⁇ R 1 ⁇ 1806 is the output matrix.
  • the input function is sin(2*pi*t)
  • the time to directly solve the mathematical model is 1518.31 seconds.
  • the mathematical model constructed using the method proposed in this application uses the same input sin(2*pi*t), and the solution time is 53.22 seconds.
  • the solution time is greatly shortened, but the output results of the mathematical model of the nonlinear delay circuit are relatively close.
  • the output results are shown in Figure 7.
  • embodiments of the present application also provide a simulation system for a nonlinear delay circuit system, including:
  • Simulation module 110 the simulation module 110 is configured to simulate the nonlinear delay circuit system and obtain the output matrix of the nonlinear delay circuit system;
  • the calculation module 120 is configured to use the principal component analysis method to calculate the output matrix to obtain the singular value vector and singular value of the output matrix;
  • the calculation module 120 is also configured to construct a basis function based on the singular value vector and the singular value, and obtain a state variable function based on the basis function;
  • the building module 130 is configured to build a temporal convolutional network model, and obtain training data of the temporal convolutional network model based on the output matrix and the state variable function;
  • Training module 140 the training module 140 is configured to train the temporal convolutional network model based on the training data of the temporal convolutional network model;
  • the output module 150 is configured to input signals to the trained temporal convolutional network model to output values of state variables of the nonlinear delay circuit system.
  • an embodiment of the present application also provides a non-volatile computer-readable storage medium 40.
  • the non-volatile computer-readable storage medium 40 stores a computer program that performs the above method when executed by a processor. 410.
  • the storage medium of the program can be a magnetic disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.
  • ROM read-only memory
  • RAM random access memory
  • Embodiments of the present application may also include an electronic device.
  • the electronic device may include a memory 1001, at least one processor 1002, and a computer program stored on the memory 1001 and executable on the processor 1002.
  • the processor 1002 executes the computer program, any one of the above methods is performed.
  • the memory 1001 as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer executable programs and modules, such as the non-linear delay circuit system in the embodiment of the present application.
  • the program instructions/modules corresponding to the simulation method.
  • the processor 1002 executes various functional applications and data processing of the device by running non-volatile software programs, instructions and modules stored in the memory 1001, that is, implementing the simulation method of the nonlinear delay circuit system of the above method embodiment.
  • the memory 1001 may include a program storage area and a storage data area, where the program storage area may store an operating system and an application program required for at least one function; the storage data area may store data created according to use of the device, etc.
  • the memory 1001 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device.
  • memory 1001 may include memory located remotely relative to processor 1002, and these remote memories may be connected to local modules through a network. Examples of the above-mentioned networks include but are not limited to the Internet, intranets, local area networks, mobile communication networks and combinations thereof.

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Abstract

本申请公开了一种非线性延迟电路系统的仿真方法、系统及介质,方法包括:对非线性延迟电路系统进行仿真,得到非线性延迟电路系统的输出矩阵;使用主成分分析法对输出矩阵进行计算,得到输出矩阵的奇异值向量和奇异值;基于奇异值向量和奇异值构建基函数,并基于基函数得到状态变量函数;构建时序卷积网络模型,并基于输出矩阵和状态变量函数得到时序卷积网络模型的训练数据;基于时序卷积网络模型的训练数据对时序卷积网络模型进行训练;将信号输入到训练后的时序卷积网络模型以输出非线性延迟电路系统的状态变量的值。本申请的方案,避免了反复对非线性延迟电路系统的数学模型进行求解,减少了计算时间,提高了计算速度。

Description

一种非线性延迟电路系统的仿真方法、系统及介质
相关申请的交叉引用
本申请要求于2022年03月24日提交中国专利局,申请号为202210292357.6,申请名称为“一种非线性延迟电路系统的仿真方法、系统及介质”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电路仿真技术领域,尤其涉及一种非线性延迟电路系统的仿真方法、系统及介质。
背景技术
随着集成电路规模与工作频率的持续增加,集成电路内部各功能电路所呈现的工作状态越来越复杂,在集成电路设计阶段,需要对集成电路内部各模块精确建模并进行仿真分析,才能最大程度减少流片失败。对集成电路内部的信号完整性分析以及各模块输出信号的仿真等,都需要经过大量的数值计算。尤其是随着集成电路的工作频率提高,信号的传输延迟也需要考虑在内,这就给集成电路设计带来了巨大挑战。
非线性延迟电路系统是集成电路内部最为复杂的电路模块之一。在对非线性延迟电路系统进行分析仿真时,需要求解复杂的数学模型,在规模较大电路情况下,求解较为困难。当前针对非线性延迟电路系统的数学模型处理方法大多为数值方法,数值方法在处理过程中较为耗时,计算时间常常令人难以接受,甚至是不可能求解出来的。
由于片上互连线数量巨大并且芯片工作频率逐渐增高,芯片在流片制造之前,需要经过反复的仿真验证。这就需要对芯片内部各个电路模块进行精确建模,在高速信号情况下,需要将信号的传输延迟考虑在内,因此所得到的数学模型较为复杂,并且规模巨大,直接对其仿真分析需要计算量巨大,芯片在设计阶段需要经过多次参数调试与仿真分析,才能达到设计需求,直接使用原始互连延迟系统的数学模型进行分析仿真时效性较差。
发明内容
有鉴于此,本申请提出了一种非线性延迟电路系统的仿真方法、系统及介质,避免反复多次对大规模非线性延迟电路系统的数学模型进行求解,并且每次仿真计算所需计算量较 小,大大减少集成电路的仿真分析时间成本,提高了芯片的研发效率。
基于上述目的,一方面,提供了一种非线性延迟电路系统的仿真方法,包括如下步骤:
对非线性延迟电路系统进行仿真,得到非线性延迟电路系统的输出矩阵;
使用主成分分析法对输出矩阵进行计算,得到输出矩阵的奇异值向量和奇异值;
基于奇异值向量和奇异值构建基函数,并基于基函数得到状态变量函数;
构建时序卷积网络模型,并基于输出矩阵和状态变量函数得到时序卷积网络模型的训练数据;
基于时序卷积网络模型的训练数据对时序卷积网络模型进行训练;
将信号输入到训练后的时序卷积网络模型以输出非线性延迟电路系统的状态变量的值。
在一些实施方式中,使用主成分分析法对输出矩阵进行计算,得到输出矩阵的奇异值向量和奇异值,包括:
使用离散经验插值算法对输出矩阵进行插值,得到插值矩阵;
对插值矩阵进行奇异值分解,得到插值矩阵的左奇异值向量、奇异值和右奇异值向量。
在一些实施方式中,基于奇异值向量和奇异值构建基函数包括:
基于右奇异值向量和奇异值构建基函数。
在一些实施方式中,基函数的表达式为:
其中,Esquare为插值矩阵,λi为Esquare的奇异值,Vi为与λi相对应的Esquare的奇异值向量,n为Esquare的奇异值数量;
状态变量函数的表达式为:
其中,tr为第r时刻,其中r∈{1,2,…,m},x(tr)为tr时刻非线性延迟电路系统的状态变量的输出值,为Esquare的均值向量,为系数,q为从n中选取的Esquare的奇异值的个数。
在一些实施方式中,构建时序卷积网络模型,包括:
建立r时刻的系数与前r-k时刻的系数之间的数学模型,数学模型为:
基于时序卷积网络模型来模拟数学模型。
在一些实施方式中,输出矩阵包含对非线性延迟电路系统进行仿真后,输出的非线性延迟电路系统的所有状态变量的输出值。
在一些实施方式中,基于输出矩阵和状态变量函数得到时序卷积网络模型的训练数据包括:
基于状态变量函数推导得到系数的表达式;
将输出矩阵中所有状态变量的输出值代入系数的表达式,得到所有系数的值;
基于所有系数的值得到时序卷积网络模型的训练数据集和验证数据集。
在一些实施方式中,对非线性延迟电路系统进行仿真,得到非线性延迟电路系统的输出矩阵,包括:
以方波信号作为非线性延迟电路系统的输入,对非线性延迟电路系统进行仿真,得到非线性延迟电路系统的输出矩阵。
另一方面,还提供了一种非线性延迟电路系统的仿真系统,包括:
仿真模块,仿真模块配置为对非线性延迟电路系统进行仿真,得到非线性延迟电路系统的输出矩阵;
计算模块,计算模块配置为使用主成分分析法对输出矩阵进行计算,得到输出矩阵的奇异值向量和奇异值;
计算模块还配置为基于奇异值向量和奇异值构建基函数,并基于基函数得到状态变量函数;
构建模块,构建模块配置为构建时序卷积网络模型,并基于输出矩阵和状态变量函数得到时序卷积网络模型的训练数据;
训练模块,训练模块配置为基于时序卷积网络模型的训练数据对时序卷积网络模型进行训练;
输出模块,输出模块配置为将信号输入到训练后的时序卷积网络模型以输出非线性延迟电路系统的状态变量的值。
再一方面,还提供了一种非易失性计算机可读存储介质,非易失性计算机可读存储介质存储有被处理器执行时实现如上方法步骤的计算机程序。
通过对非线性延迟电路系统进行仿真,得到非线性延迟电路系统的输出矩阵;使用主成分分析法对输出矩阵进行计算,得到输出矩阵的奇异值向量和奇异值;基于奇异值向量和奇异值构建基函数,并基于基函数得到状态变量函数;构建时序卷积网络模型,并基于输出矩 阵和状态变量函数得到时序卷积网络模型的训练数据;基于时序卷积网络模型的训练数据对时序卷积网络模型进行训练;将信号输入到训练后的时序卷积网络模型以输出非线性延迟电路系统的状态变量的值,避免了反复多次对大规模非线性延迟电路系统的数学模型进行求解,并且每次仿真计算所需计算量较小,大大减少集成电路的仿真分析时间成本,提高了芯片的研发效率。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的实施例。
图1为本申请提供的非线性延迟电路系统的仿真方法的一实施例的框图;
图2为本申请提供的时序卷积模型的一实施例的示意图;
图3为本申请提供的空洞卷积的一实施例的示意图;
图4为本申请提供的时序卷积模块的一实施例的示意图;
图5为本申请提供的基于训练好的时序卷积网络模型输出任意时刻状态变量的示意图;
图6为一个非线性延迟电路系统的示意图;
图7为对图6的非线性延迟电路系统进行仿真的仿真结果对比图;
图8为本申请提供的非线性延迟电路系统的仿真系统的一实施例的示意图;
图9为本申请提供的非易失性计算机可读存储介质的一实施例的结构示意图;
图10为本申请提供的电子设备的一实施例的结构示意图。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚明白,以下结合具体实施例,并参照附图,对本申请实施例进一步详细说明。
需要说明的是,本申请实施例中所有使用“第一”和“第二”的表述均是为了区分两个相同名称非相同的实体或者非相同的参量,可见“第一”“第二”仅为了表述的方便,不应理解为对本申请实施例的限定,后续实施例对此不再一一说明。
基于上述目的,本申请实施例的第一个方面,提出了一种非线性延迟电路系统的仿真方法的实施例。如图1所示,其包括如下步骤:
步骤S10、对非线性延迟电路系统进行仿真,得到非线性延迟电路系统的输出矩阵;
步骤S20、使用主成分分析法对输出矩阵进行计算,得到输出矩阵的奇异值向量和奇异值;
步骤S30、基于奇异值向量和奇异值构建基函数,并基于基函数得到状态变量函数;
步骤S40、构建时序卷积网络模型,并基于输出矩阵和状态变量函数得到时序卷积网络模型的训练数据;
步骤S50、基于时序卷积网络模型的训练数据对时序卷积网络模型进行训练;
步骤S60、将信号输入到训练后的时序卷积网络模型以输出非线性延迟电路系统的状态变量的值。
非线性互连延迟电路系统的数学模型一般为:
其中,矩阵E∈Rn×n的值为电感值、电容值所组成,Rn×n表示n行乘n列的实数矩阵,n为不包含0的自然数,函数f(x)为集成电路内非线性元器件的数学模型,B∈Rn×1为输入矩阵,u(t)为输入,C∈R1×n为输出矩阵;未知变量x(t)∈Rn×1为电路中的节点电压或者支路电流,n为电路系统的阶数,τ为信号传输延迟。在非线性互连延迟电路系统规模较大情况下,对此方程进行仿真计算将异常复杂且耗时。而在对集成电路的信号完整性等性能的仿真与分析过程中,需要对上述数学模型进行多次的求解,导致有巨大的计算量。
为解决上述问题,本申请实施例提出一种非线性延迟电路系统的仿真方法,过程可以如下:
在步骤S10中,在对非线性延迟电路系统进行仿真前,先提前设定好仿真的时间区间和时间区间中时刻的间隔,以得到具体时刻的状态变量的输出值。
例如使用一个时长为t、幅值为±A、占空比为w的方波信号y=A*square(t,w),作为非线性延迟电路系统的输入,设定仿真的时间区间为[0,2000],间隔点T为0.01,对非线性延迟电路系统进行仿真,得到对应的非线性延迟电路系统输出矩阵Fsquare,输出矩阵Fsquare包含时间区间内所有时刻的状态变量的值的输出矩阵Fsquare
Fsquare=[x(t1),…,x(tj)…,x(tm)];
其中,x(tj)为tj时刻非线性延迟电路系统所有状态变量x的输出,j和m均为不包含0的自然数,tj表示第j时刻,代表的时间为j×T,tm表示第m时刻,代表的时间为m×T。需要说明的是,方波信号仅为对本申请实施例的一个举例,除了方波外,非线性延迟电路系统的输入 信号还可以包括正弦波、三角波等输入信号。通过上述步骤输出了选定时间区间内所有时刻的状态变量。
在步骤S20中,利用主成分分析法提取出Fsquare中的主要信息。
主成分分析法:把多指标转化为少数的综合指标(即主成分),其中每个主成分都能够反映原始变量的大部分信息,且所含信息互不重复。
利用主成分分析法将矩阵Fsquare中的一组相关变量x(tj)通过线性变换转成另一组不相关的变量,这些新的变量按照方差依次递减的顺序排列。在数学变换中保持变量的总方差不变,使第一变量具有最大的方差,称为第一主成分,第二变量的方差次大,并且和第一变量不相关,称为第二主成分。依此类推,变换后有多少个新的变量就有多少个主成分。根据主成分对于变异的贡献量,即变异百分比,从大到小排序;当排序在前的几个主成分的累积变异百分比达到一定值(比如75%、80%、85%)后,将后面的主成分去掉,以压缩数据,提高仿真的计算速度。
主成分分析法包括:特征值分解,SVD(Singular Value Decomposition,奇异值分解),NMF(Non-negative Matrix Factorization,非负矩阵分解)等。
通过主成分分析法对输出矩阵Fsquare进行计算,得到输出矩阵Fsquare的奇异值向量和奇异值。
通过上述步骤,提高了非线性延迟电路系统仿真的计算速度。
在步骤S30中,基于奇异值向量和奇异值构建基函数,并基于基函数得到状态变量函数。该步骤通过状态变量函数反映了非线性延迟电路系统任意时刻输出的状态变量的值,使后续通过输入信号输入到非线性延迟电路系统后,能够通过状态变量函数能够直接得到任意时刻输出的状态变量的值,加快了非线性延迟电路系统仿真的计算速度。
在步骤S40中和步骤S50中,构建时序卷积网络模型,并基于输出矩阵和状态变量函数得到时序卷积网络模型的训练数据;基于时序卷积网络模型的训练数据对时序卷积网络模型进行训练。时序卷积网络模型用于表示当前时刻的输入数据与前k时刻的输入数据之间的关系,基于状态变量函数,训练好的时序卷积网络模型能够较好地预测出非线性延迟电路系统任意时刻输出的状态变量的值,以此保证了非线性延迟电路系统仿真的准确性。
在步骤S60中,将信号输入到训练后的时序卷积网络模型,可以得到任意时刻的非线性延迟电路系统的状态变量的值,无需非线性延迟电路系统的数学模型进行反复求解,以此加快了非线性延迟电路系统仿真的计算速度,保证了非线性延迟电路系统仿真的准确性。
通过上述实施例,只需对非线性延迟电路系统进行一次仿真求解,避免了反复多次对大 规模非线性延迟电路系统的数学模型进行求解,并且每次仿真计算所需计算量较小,大大减少集成电路的仿真分析时间成本,提高了芯片的研发效率。
在一些实施方式中,使用主成分分析法对输出矩阵进行计算,得到输出矩阵的奇异值向量和奇异值,包括:
使用离散经验插值算法对输出矩阵进行插值,得到插值矩阵;
对插值矩阵进行奇异值分解,得到插值矩阵的左奇异值向量、奇异值和右奇异值向量。
在一些实施方式中,基于奇异值向量和奇异值构建基函数包括:
基于右奇异值向量和奇异值构建基函数。
在一些实施方式中,基函数的表达式为:
其中,Esquare为插值矩阵,λi为Esquare的奇异值,Vi为与λi相对应的Esquare的奇异值向量,n为Esquare的奇异值数量;
状态变量函数的表达式为:
其中,tr为第r时刻,其中r∈{1,2,…,m},x(tr)为tr时刻非线性延迟电路系统的状态变量的输出值,为Esquare的均值向量,为系数,q为从n中选取的Esquare的奇异值的个数。
在一些实施方式中,构建时序卷积网络模型,包括:
建立r时刻的系数与前r-k时刻的系数之间的数学模型,数学模型为:
基于时序卷积网络模型来模拟数学模型。
在一些实施方式中,输出矩阵包含对非线性延迟电路系统进行仿真后,输出的非线性延迟电路系统的所有状态变量的输出值。
在一些实施方式中,基于输出矩阵和状态变量函数得到时序卷积网络模型的训练数据包括:
基于状态变量函数推导得到系数的表达式;
将输出矩阵中所有状态变量的输出值代入系数的表达式,得到所有系数的值;
基于所有系数的值得到时序卷积网络模型的训练数据集和验证数据集。
在一些实施方式中,对非线性延迟电路系统进行仿真,得到非线性延迟电路系统的输出矩阵,包括:
以方波信号作为非线性延迟电路系统的输入,对非线性延迟电路系统进行仿真,得到非线性延迟电路系统的输出矩阵。
下面通过又一实施例对本申请的具体实施方式进行说明。
主成分分析法通过对输出矩阵Fsquare进行奇异值分解得到输出矩阵Fsquare的奇异值和奇异值向量。
更进一步的,由于输出矩阵Fsquare中包含的数据量非常大,为了能够提高对输出矩阵进行奇异值分解的速度,首先使用离散经验插值算法对输出矩阵Fsquare进行插值,得到基于输出矩阵的插值矩阵Esquare,Esquare=DEIM(Fsquare),矩阵Esquare∈Rn×m
插值过如下:
输入矩阵:Fsquare=[x(t1),…,x(tj)…,x(tm)];
输出矩阵:Esquare
步骤一:寻找第一列向量x(t1)的最大值及其最大值位置[γ,z1]=max{|x(t1)|},其中γ为向量x(t1)的最大值,z1为最大值在向量x(t1)中所处位置。
步骤二:取矩阵U=[x(t1)],插值选择矩阵 为在z1位置为1,其他位置为0的单位向量。
步骤三:进行如下循环:
a)从p=2到p=m,m对应于输入矩阵中m时刻;
b)求解矩阵方程,得到向量c:
NUc=Nx(tp)。
c)求解向量r:
r=x(tp)-Nc;
d)求出向量r中的最大值及其位置:
p,zp]=max{|r|}。
d)
循环结束,得到插值选择矩阵N。
求解插值矩阵Esquare=NFsquare
得到输出矩阵的插值矩阵后,对插值矩阵Esquare进行奇异值分解,得到Esquare=UΣVT,其中,U∈Rn×n为矩阵Esquare的左奇异值向量,Σ∈Rn×m为矩阵Esquare的奇异值,VT∈Rm×m为矩阵Esquare的右奇异值向量。
接下来,利用奇异值向量与奇异值构建基函数:
其中,λi为插值矩阵Esquare的奇异值,λi∈Σ,n为插值矩阵Esquare的奇异值的数量,Vi为插值矩阵Esquare的奇异值向量,与λi一一对应。
结合公式(1)可以得到任意时刻的状态变量函数x(tr):
其中,tr为第r时刻,其中r∈{1,2,…,m},x(tr)为tr时刻非线性延迟电路系统的状态变量的输出值,为Esquare的均值向量,为系数,q为从n中选取的Esquare的奇异值的个数。
分析非线性延迟电路系统的原理,可知非线性延迟电路系统的当前时刻的输出与前k时刻的输入有关,基于此可以为状态变量函x(tr)中的未知变量(系数)建立数学模型,数学模型为:
其中k为不包括0的自然数。
构建时序卷积网络模型。如图2所示,为构建的时序卷积网络模型,图2中,M表示时序卷积模块的个数。
时序卷积网络模型包括输入层、至少一个时序卷积模块、全连接层和输出层,其中输入层用于输入训练数据输出层用于输出训练结果
结合图3和图4,基于空洞卷积和残差连接构建时序卷积模块,图3中,k表示卷积核大小,d表示为空洞参数(dilation parameter),即空洞间隔大小,用来扩大因果网络的感受视野。图4中,Dropout解释为丢弃,Relu解释为一种激活函数。
传统的卷积网络模型是无法直接处理序列建模(sequence modeling)的,处理序列问题时,需使用因果卷积,其作用就是对于序列问题进行抽象化,根据去预测空洞卷积的每一层的输出都是由前一层对应位置的输入及其前一个位置的输入共同得到,并且如果输出层和输入层之前有很多的隐藏层, 那么一个输出对应的所有输入就越多,并且输入和输出离得越远,就需要考虑越早之前的输入变量参与运算,这样就能处理时序问题。然而随着卷积层数的增加就带来:梯度消失,训练复杂,拟合效果不好的问题,为了解决这个问题,使用扩展卷积(dilated)来减少卷积层数,增加卷积的感受视野。扩展卷积(dilated convolution)是通过跳过部分输入来使filter(过滤器)可以应用于大于filter本身长度的区域,如图3所示,可以看到因果神经网络中下一层神经元对上一次神经元的历史数据感受视野大大扩展,这也提升了因果卷积网络对需要较长记忆的时间序列推测任务的建模能力。
时序卷积模块由空洞因果卷积层、权重归一化层、激活函数层以及Dropout层连接而成,并使用残差结构。
基于上述构建的时序卷积网络模型能够很好地对时间序列任务进行建模。将前k时刻的作为训练数据,得到当前r时刻的进而基于状态变量函数,得到当前时刻的状态变量的输出值,当前时刻可以自由选择。由此,可以得到任意时刻的状态变量的输出值。
下面对构建训练数据的过程进行说明。
由公式(2)得到系数的值:
其中,x(tj)为对非线性延迟电路系统进行仿真输出的输出矩阵Fsquare中的状态变量的值。
得到所有的系数的所有的值后,将系数的所有的值拆分为训练集和验证集。例如将系数的所有的值的80%拆分为训练集,剩下20%作为验证集。
基于训练集和验证集对所构建的时序卷积网络进行训练。训练过程中所使用的优化器为Adam优化器,训练epoch数目为50,损失函数为均方误差函数,得到训练好的时序卷积网络模型。
训练好的模型可以很好地对系数进行预测,进而得到任意时刻的状态变量x(tj)的值,流程如下:
将与当前时刻r+1的输出有关的前k时刻的输入的系数输入到训练好的时序卷积网络模型,得到第r+1时刻的系数,将第r+1时刻的系数代入状态变量函数得到第r+1时刻状态变量的值,基于此,可以得到任意时刻状态变量的输出值。若r+1≤k,说明此时信号刚开始输入到非线性延迟电路系统,等待r+1>k后,将前k时刻的输入的系数输入到训练好的时序卷积网络模型开始对系统进行预测。
图5为k=5时对系数进行预测,进而当前时刻的状态变量x(tj)的值的流程图,说明当前时刻r+1的系数与其之前的5个系数相关,将其之前的5个系数输入到训练好的时序卷积网络模型得到当前时刻r+1的系数。
通过上述实施例,在对非线性延迟电路系统的仿真过程中能大大减少计算量,避免反复求解大规模非线性延迟电路系统,在保证准确性的情况下减少了计算时间,提高了计算速度。
图6中非线性延迟电路系统是由三条耦合的互连线所组成的,其发送端与接收端为非线性电路器件,构成了整个非线性延迟电路系统。非线性延迟电路的数学模型为
矩阵的大小为E∈R1806×1806,函数f(x)为图6中非线性元器件的数学模型,B∈R1806×1为输入矩阵,u(t)为输入,C∈R1×1806为输出矩阵。输入函数为sin(2*pi*t),直接求解该数学模型时间为1518.31秒。使用本申请所提出方法所构建的数学模型,使用相同的输入sin(2*pi*t),求解时间为53.22秒。求解时间大大缩短,但对非线性延迟电路的数学模型的输出结果比较接近,输出结果如图7所示。
如图8所示,本申请的实施例还提供了一种非线性延迟电路系统的仿真系统,包括:
仿真模块110,仿真模块110配置为对非线性延迟电路系统进行仿真,得到非线性延迟电路系统的输出矩阵;
计算模块120,计算模块120配置为使用主成分分析法对输出矩阵进行计算,得到输出矩阵的奇异值向量和奇异值;
计算模块120还配置为基于奇异值向量和奇异值构建基函数,并基于基函数得到状态变量函数;
构建模块130,构建模块130配置为构建时序卷积网络模型,并基于输出矩阵和状态变量函数得到时序卷积网络模型的训练数据;
训练模块140,训练模块140配置为基于时序卷积网络模型的训练数据对时序卷积网络模型进行训练;
输出模块150,输出模块150配置为将信号输入到训练后的时序卷积网络模型以输出非线性延迟电路系统的状态变量的值。
如图9所示,本申请的实施例还提供了一种非易失性计算机可读存储介质40,非易失性计算机可读存储介质40存储有被处理器执行时执行如上方法的计算机程序410。
其中,程序的存储介质可为磁碟、光盘、只读存储记忆体(ROM)或随机存储记忆体(RAM)等。上述计算机程序的实施例,可以达到与之对应的前述任意方法实施例相同或者相类似的效果。
本申请实施例还可以包括一种电子设备。如图10所示,电子设备可以包括存储器1001、至少一个处理器1002以及存储在存储器1001上并可在处理器上1002运行的计算机程序,处理器1002执行计算机程序时执行上述任意一种方法。
其中,存储器1001作为一种非易失性计算机可读存储介质,可用于存储非易失性软件程序、非易失性计算机可执行程序以及模块,如本申请实施例中的非线性延迟电路系统的仿真方法对应的程序指令/模块。处理器1002通过运行存储在存储器1001中的非易失性软件程序、指令以及模块,从而执行装置的各种功能应用以及数据处理,即实现上述方法实施例的非线性延迟电路系统的仿真方法。
存储器1001可以包括存储程序区和存储数据区,其中,存储程序区可存储操作系统、至少一个功能所需要的应用程序;存储数据区可存储根据装置的使用所创建的数据等。此外,存储器1001可以包括高速随机存取存储器,还可以包括非易失性存储器,例如至少一个磁盘存储器件、闪存器件、或其他非易失性固态存储器件。在一些实施例中,存储器1001可以包括相对于处理器1002远程设置的存储器,这些远程存储器可以通过网络连接至本地模块。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
本领域技术人员还将明白的是,结合这里的公开所描述的各种示例性逻辑块、模块、电路和算法步骤可以被实现为电子硬件、计算机软件或两者的组合。为了清楚地说明硬件和软件的这种可互换性,已经就各种示意性组件、方块、模块、电路和步骤的功能对其进行了一般性的描述。这种功能是被实现为软件还是被实现为硬件取决于具体应用以及施加给整个系统的设计约束。本领域技术人员可以针对每种具体应用以各种方式来实现的功能,但是这种实现决定不应被解释为导致脱离本申请实施例公开的范围。
以上是本申请公开的示例性实施例,但是应当注意,在不背离权利要求限定的本申请实施例公开的范围的前提下,可以进行多种改变和修改。根据这里描述的公开实施例的方法权利要求的功能、步骤和/或动作不需以任何特定顺序执行。上述本申请实施例公开实施例序号仅仅为了描述,不代表实施例的优劣。此外,尽管本申请实施例公开的元素可以以个体形式描述或要求,但除非明确限制为单数,也可以理解为多个。
应当理解的是,在本文中使用的,除非上下文清楚地支持例外情况,单数形式“一个”旨在也包括复数形式。还应当理解的是,在本文中使用的“和/或”是指包括一个或者一个 以上相关联地列出的项目的任意和所有可能组合。
所属领域的普通技术人员应当理解:以上任何实施例的讨论仅为示例性的,并非旨在暗示本申请实施例公开的范围(包括权利要求)被限于这些例子;在本申请实施例的思路下,以上实施例或者不同实施例中的技术特征之间也可以进行组合,并存在如上的本申请实施例的不同方面的许多其它变化,为了简明它们没有在细节中提供。因此,凡在本申请实施例的精神和原则之内,所做的任何省略、修改、等同替换、改进等,均应包含在本申请实施例的保护范围之内。

Claims (23)

  1. 一种非线性延迟电路系统的仿真方法,其特征在于,包括:
    对非线性延迟电路系统进行仿真,得到所述非线性延迟电路系统的输出矩阵;
    使用主成分分析法对所述输出矩阵进行计算,得到所述输出矩阵的奇异值向量和奇异值;
    基于所述奇异值向量和所述奇异值构建基函数,并基于所述基函数得到状态变量函数;
    构建时序卷积网络模型,并基于所述输出矩阵和所述状态变量函数得到所述时序卷积网络模型的训练数据;
    基于所述时序卷积网络模型的训练数据对所述时序卷积网络模型进行训练;
    将信号输入到训练后的时序卷积网络模型以输出非线性延迟电路系统的状态变量的值。
  2. 根据权利要求1所述的方法,其特征在于,使用主成分分析法对所述输出矩阵进行计算,得到所述输出矩阵的奇异值向量和奇异值,包括:
    使用离散经验插值算法对所述输出矩阵进行插值,得到插值矩阵;
    对所述插值矩阵进行奇异值分解,得到所述插值矩阵的左奇异值向量、奇异值和右奇异值向量。
  3. 根据权利要求2所述的方法,其特征在于,所述输出矩阵为Fsquare,输出矩阵Fsquare=[x(t1),…, x(tj)…, x(tm)],X(tj)为tj时刻非线性延迟电路系统所有状态变量x的输出,j和m均为不包含0的自然数,tj表示第j时刻,代表的时间为j×T,tm表示第m时刻,代表的时间为m×T;
    所述使用离散经验插值算法对所述输出矩阵进行插值,得到插值矩阵,包括:
    寻找第一列向量x(t1)的最大值及其最大值位置[γ,z1]=max{|x(t1)|},其中γ为向量x(t1)的最大值,z1为最大值在向量x(t1)中所处位置;
    取矩阵U=[x(t1)],插值选择矩阵为在z1位置为1,其他位置为0的单位向量;
    进行如下循环:
    a)从p=2到p=m,m对应于所述输出矩阵Fsquare中的m时刻;
    b)求解矩阵方程,得到向量c:
    NUc=Nx(tp);
    c)求解向量r:
    r=x(tp)-Nc;
    d)求出向量r中的最大值及其位置:
    p,zp]=max{|r|};
    d)
    循环结束,得到插值选择矩阵N;
    求解基于所述输出矩阵Fsquare的插值矩阵Esquare;其中,Esquare=NFsquare
  4. 根据权利要求2所述的方法,其特征在于,基于所述奇异值向量和所述奇异值构建基函数包括:
    基于所述右奇异值向量和所述奇异值构建基函数。
  5. 根据权利要求4所述的方法,其特征在于,所述基函数的表达式为:
    其中,Esquare为插值矩阵,λi为Esquare的奇异值,Vi为与所述λi相对应的Esquare的奇异值向量,n为Esquare的奇异值数量;
    所述状态变量函数的表达式为:
    其中,tr为第r时刻,其中r∈{1,2,…,m},x(tr)为tr时刻非线性延迟电路系统的状态变量的输出值,为Esquare的均值向量,为系数,q为从n中选取的Esquare的奇异值的个数。
  6. 根据权利要求5所述的方法,其特征在于,
    其中,x(tj)为对非线性延迟电路系统进行仿真输出的输出矩阵中的状态变量的值。
  7. 根据权利要求5所述的方法,其特征在于,在得到所有的系数的所有的值后,所述方法还包括:
    将系数的所有的值拆分为训练集和验证集;
    所述基于所述时序卷积网络模型的训练数据对所述时序卷积网络模型进行训练,包括:
    基于所述训练集和所述验证集对所构建的时序卷积网络进行训练;其中,训练过程 中所使用的优化器为Adam优化器,训练epoch数目为50,损失函数为均方误差函数。
  8. 根据权利要求5所述的方法,其特征在于,构建时序卷积网络模型,包括:
    建立r时刻的系数与前r-k时刻的系数之间的数学模型,所述数学模型为:
    基于时序卷积网络模型来模拟所述数学模型。
  9. 根据权利要求8所述的方法,其特征在于,
    所述时序卷积网络模型包括输入层、至少一个时序卷积模块、全连接层和输出层,其中输入层用于输入训练数据输出层用于输出训练结果
  10. 根据权利要求9所述的方法,其特征在于,时序卷积模块由空洞卷积和残差连接构建。
  11. 根据权利要求10所述的方法,其特征在于,空洞卷积的每一层的输出是由前一层对应位置的输入及其前一个位置的输入共同得到。
  12. 根据权利要求9所述的方法,其特征在于,
    所述时序卷积模块由空洞因果卷积层、权重归一化层、激活函数层以及Dropout层连接而成,并使用残差结构。
  13. 根据权利要求5所述的方法,其特征在于,所述输出矩阵包含对所述非线性延迟电路系统进行仿真后,输出的所述非线性延迟电路系统的所有状态变量的输出值。
  14. 根据权利要求5所述的方法,其特征在于,基于所述输出矩阵和所述状态变量函数得到所述时序卷积网络模型的训练数据包括:
    基于所述状态变量函数推导得到所述系数的表达式;
    将所述输出矩阵中所有状态变量的输出值代入所述系数的表达式,得到所有系数的值;
    基于所有系数的值得到所述时序卷积网络模型的训练数据集和验证数据集。
  15. 根据权利要求1所述的方法,其特征在于,对非线性延迟电路系统进行仿真,得到所述非线性延迟电路系统的输出矩阵,包括:
    以方波信号作为非线性延迟电路系统的输入,对所述非线性延迟电路系统进行仿真,得到所述非线性延迟电路系统的输出矩阵。
  16. 根据权利要求15所述的方法,其特征在于,
    所述非线性延迟电路系统的输入信号还包括正弦波、三角波。
  17. 根据权利要求1所述的方法,其特征在于,在对非线性延迟电路系统进行仿真前,所述方法还包括:
    提前设定仿真的时间区间和时间区间中时刻的间隔。
  18. 根据权利要求17所述的方法,其特征在于,所述输出矩阵包含时间区间内所有时刻的状态变量的值的输出矩阵Fsquare
    其中,Fsquare=[x(t1),…, x(tj)…, x(tm)];
    X(tj)为tj时刻非线性延迟电路系统所有状态变量x的输出,j和m均为不包含0的自然数,tj表示第j时刻,代表的时间为j×T,tm表示第m时刻,代表的时间为m×T。
  19. 根据权利要求1所述的方法,其特征在于,所述将信号输入到训练后的时序卷积网络模型以输出非线性延迟电路系统的状态变量的值,包括:
    将与当前时刻r+1的输出有关的前k时刻的输入的系数输入到训练好的时序卷积网络模型,得到第r+1时刻的系数,将第r+1时刻的系数代入状态变量函数得到第r+1时刻状态变量的值。
  20. 根据权利要求1所述的方法,其特征在于,
    所述非线性延迟电路系统是由三条耦合的互连线所组成的,三条耦合的互连线的发送端与接收端为非线性电路器件。
  21. 一种非线性延迟电路系统的仿真系统,其特征在于,包括:
    仿真模块,所述仿真模块配置为对非线性延迟电路系统进行仿真,得到所述非线性延迟电路系统的输出矩阵;
    计算模块,所述计算模块配置为使用主成分分析法对所述输出矩阵进行计算,得到所述输出矩阵的奇异值向量和奇异值;
    所述计算模块还配置为基于所述奇异值向量和所述奇异值构建基函数,并基于所述基函数得到状态变量函数;
    构建模块,所述构建模块配置为构建时序卷积网络模型,并基于所述输出矩阵和所述状态变量函数得到所述时序卷积网络模型的训练数据;
    训练模块,所述训练模块配置为基于所述时序卷积网络模型的训练数据对所述时序卷积网络模型进行训练;
    输出模块,所述输出模块配置为将信号输入到训练后的时序卷积网络模型以输出非线性延迟电路系统的状态变量的值。
  22. 一种非易失性计算机可读存储介质,所述非易失性计算机可读存储介质存储有 计算机程序,其特征在于,所述计算机程序被处理器执行时执行如权利要求1至20任一项所述的方法的步骤。
  23. 一种电子设备,其特征在于,包括:
    存储器,用于存储计算机程序;
    处理器,用于执行所述计算机程序时实现如权利要求1至20任一项所述的方法的步骤。
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