WO2023173862A1 - 基于光敏复合材料的三维硅基转接结构加工方法及装置 - Google Patents

基于光敏复合材料的三维硅基转接结构加工方法及装置 Download PDF

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WO2023173862A1
WO2023173862A1 PCT/CN2022/139915 CN2022139915W WO2023173862A1 WO 2023173862 A1 WO2023173862 A1 WO 2023173862A1 CN 2022139915 W CN2022139915 W CN 2022139915W WO 2023173862 A1 WO2023173862 A1 WO 2023173862A1
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silicon
layer
etching
processing method
photosensitive composite
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French (fr)
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张子琦
周亮
张成瑞
毛军发
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上海交通大学
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4803Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/147Semiconductor insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries

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  • the present invention relates to the technical field of wafer-level three-dimensional heterogeneous integrated packaging technology. Specifically, it relates to a three-dimensional silicon-based transfer structure processing method and device based on photosensitive composite materials.
  • the wafer-level three-dimensional heterogeneous integrated packaging process integrates the chip and various passive devices into a system directly on the silicon-based wafer, and rewires the chip surface to achieve the fan-out effect.
  • chips By directly using micro-nano process equipment during the process, hundreds or even more chips can be integrated into large-volume systems at one time and interconnected with passive components such as filters, antennas, and baluns. It greatly improves packaging efficiency, reduces costs, and improves overall system performance. It is an important way to achieve system-level packaging.
  • TSV blind trench plating is the core process in three-dimensional heterogeneous integration. It electroplates and grows metal on the blind trench portion of the silicon-based surface.
  • This vertical interconnection solution can reduce the system interconnection length and transmission delay. , and improve the capacitance and inductance effects, achieving miniaturization and high-density integration of devices.
  • the present invention provides a three-dimensional silicon-based transfer structure processing method and device based on photosensitive composite materials.
  • a three-dimensional silicon-based transfer structure processing method and device based on photosensitive composite materials are provided.
  • the solution is as follows:
  • a three-dimensional silicon-based transfer structure processing method based on photosensitive composite materials includes:
  • Step S1 Make a front protective film and a back protective film on the silicon-based substrate
  • Step S2 Make the waveguide metal sidewall on the back side of the silicon-based substrate to form a TSV blind trench
  • Step S3 Make the back cavity structure of the transfer structure on the front side of the silicon-based substrate and fill it with the photosensitive composite material;
  • Step S4 Prepare a dielectric mask layer above the back cavity structure, and make a top metal pattern above the top dielectric layer;
  • Step S5 Use photolithography mask and dry etching to perform bulk silicon etching and scribing to obtain a complete transfer structure.
  • step S2 includes:
  • Step S2.1 Spin-coat photoresist on the back protective film and develop it to prepare a mask
  • Step S2.2 Use a photolithography mask to etch the back protective film
  • Step S2.3 Use dry etching to complete the bulk silicon etching and remove the photoresist
  • Step S2.4 Sputter a metal seed layer on the back of the silicon-based substrate
  • Step S2.5 Electroplating and plating the deep groove formed after bulk silicon etching
  • step S2.3 the blind trench body silicon is etched to 421 microns
  • step S2.4 a layer of metallic chromium is first sputtered
  • step S2.5 a surface metal atom activity inhibitor is added to the electroplating solution
  • step S3 includes:
  • Step S3.1 Spin-coat photoresist on the front protective film and prepare the back cavity pattern
  • Step S3.2 Dry-etch the front protective film and silicon base to form a back cavity structure, remove and clean;
  • Step S3.3 Sputter a layer of formation seed layer on the front side of the silicon-based substrate
  • Step S3.6 Use ion beam to etch away the formation seed layer to form a complete formation structure
  • Step S3.7 Spin-coat and fill the photosensitive medium BCB multiple times, and after solidification, the back cavity can be fully filled;
  • Step S3.8 Mechanically smooth the top BCB dielectric layer.
  • step S3.2 the silicon-based back cavity structure is dry etched to 79 microns
  • step S3.5 use thermal conductive tape to stick the exposed metal on the back during the electroplating process of the front structure.
  • step S4 includes:
  • Step S4.1 Spin-coat a dielectric layer on the BCB dielectric layer that has been mechanically polished on the front side of the silicon-based substrate as the back cavity mask layer;
  • Step S4.2 Use dielectric etching to etch clean the photosensitive medium BCB outside the back cavity mask layer;
  • Step S4.3 Spin-coat the surface dielectric layer on the back cavity mask layer on the front side of the silicon-based substrate and pattern it;
  • Step S4.4 Sputter the top metal layer above the surface dielectric layer on the front side of the silicon-based substrate;
  • Step S4.5 Spin-coat photoresist on the top metal layer and pattern it;
  • Step S4.6 Electroplating the top metal layer and removing residual glue
  • Step S4.7 Ion beam etching removes the top metal layer that has not been electroplated.
  • step S4.1 the size of the dielectric mask layer is expanded by 200 microns compared to the surrounding area of the back cavity structure
  • step 4.2 a height of 8 microns of the top dielectric mask layer is retained after dielectric etching.
  • step S5 includes:
  • Step S5.1 Spin-coat photoresist on the back of the silicon-based substrate and develop it to prepare a mask
  • Step S5.2 Use dry etching to complete the bulk silicon etching and remove the residual glue
  • Step S5.3 Divide the silicon-based substrate to complete the production of the transfer structure.
  • front protective film and the back protective film are both Si 3 N 4 films;
  • the dry etching is all inductively coupled plasma dry etching.
  • a device which is prepared by the three-dimensional silicon-based transfer structure processing method based on photosensitive composite materials.
  • Figure 1 is a cross-sectional view of the three-dimensional transfer structure
  • Figure 2 is a basic flow chart of the method of the present invention.
  • Embodiments of the present invention address the problem that the photosensitive composite material BCB cannot achieve a large thickness when acting as a medium; the difference in thermal expansion coefficient between BCB and different materials leads to edge cracking during the processing process, thereby causing the top metal of the medium to The problem of traces breaking at cracks; in order to solve the solution problems that arise when improving the traditional planar interconnection structure and integrating metal rectangular waveguides in silicon-based substrates to achieve a three-dimensional integrated architecture, a three-dimensional silicon based photosensitive composite material is provided.
  • the base transfer structure processing method is shown in Figure 1. The method specifically includes:
  • Step S1 Make a front protective film and a back protective film (ie, a double-sided protective film) on a silicon-based substrate.
  • Step S2 Use dry etching to make the waveguide metal sidewall on the back side of the silicon-based substrate to form a TSV blind trench.
  • step S2 specifically includes the following steps:
  • Step S2.1 Spin-coat photoresist on the back protective film and develop it to prepare a mask.
  • Step S2.2 Use a photolithography mask to etch the back protective film.
  • Step S2.3 Use dry etching to complete the bulk silicon etching and remove the photoresist.
  • the blind trench bulk silicon etching is 421 microns.
  • Step S2.4 Sputter a layer of metal seed layer on the back of the silicon-based substrate. During the sputtering process of this step, a layer of metal chromium is first sputtered to help increase the adhesion of metal copper.
  • Step S2.5 TSV blind tank electroplating, that is, electroplating and plating the deep tank formed after bulk silicon etching; in this step, surface metal atom activity inhibitors are added to the plating solution to ensure that the plating inside and outside the tank is oriented in all directions. opposite sex.
  • Step S2.6 On the back side of the silicon-based substrate, mechanically smooth the protruding metal copper after electroplating. This step uses the 600-BLD04 model grinding wheel for mechanical grinding of the metal.
  • Step S3 Make the back cavity structure of the transfer structure on the front side of the silicon-based substrate and fill it with the photosensitive composite material.
  • step S3 this step specifically includes:
  • Step S3.1 Spin-coat photoresist on the front protective film and prepare the back cavity pattern.
  • Step S3.2 Dry-etch the front protective film and the silicon base to form a back cavity structure, and remove and clean the silicon base back cavity structure.
  • the dry etching silicon-based back cavity structure is 79 microns.
  • Step S3.3 Sputter a layer of formation seed layer on the front side of the silicon-based substrate
  • Step S3.4 Spin-coat photoresist on the formation seed layer.
  • Step S3.5 Perform electroplating of the ground seed layer and remove glue and clean it.
  • thermal conductive tape is used to stick the exposed metal on the back.
  • Step S3.6 Use ion beam to etch away the formation seed layer to form a complete formation structure.
  • Step S3.7 Spin-coat and fill the photosensitive medium BCB multiple times. After solidification, the back cavity can be fully filled.
  • Step S3.8 Mechanically smooth the top BCB dielectric layer.
  • Step S4 Prepare a dielectric mask layer above the back cavity structure, and make a top metal pattern above the top dielectric layer.
  • step S4 specific steps include:
  • Step S4.1 Spin-coat a dielectric layer on the BCB dielectric layer that has been mechanically polished on the front side of the silicon-based substrate as the back cavity mask layer. In this step, the size of the dielectric mask layer is compared with that around the back cavity structure. External expansion 200 microns.
  • Step S4.2 Use dielectric etching to etch clean the photosensitive medium BCB outside the back cavity mask layer. In this step, the height of the top dielectric mask layer is retained at 8 microns after dielectric etching.
  • Step S4.3 Spin-coat the surface dielectric layer on the back cavity mask layer on the front side of the silicon-based substrate and pattern it.
  • Step S4.4 Sputter the top metal layer above the surface dielectric layer on the front side of the silicon-based substrate;
  • Step S4.5 Spin-coat photoresist on the top metal layer and pattern it.
  • Step S4.6 Electroplating the top metal layer and removing residual glue.
  • Step S4.7 Ion beam etching removes the top metal layer that has not been electroplated.
  • Step S5 Use photolithography mask and dry etching to perform bulk silicon etching and scribing to obtain a complete transfer structure.
  • step S5 it specifically includes:
  • Step S5.1 Spin-coat photoresist on the back of the silicon-based substrate and develop it to prepare a mask.
  • Step S5.2 Use dry etching to complete the bulk silicon etching and remove the residual glue.
  • Step S5.3 Divide the silicon-based substrate to complete the production of the transfer structure.
  • the front protective film and the back protective film (ie double-sided protective film) in the embodiment of the present invention are both Si 3 N 4 thin films 102, and all dry etching involved in the process flow is inductively coupled plasma dry etching. eclipse. Specifically, the dry etching used is reactive coupled plasma etching, and the silicon-based substrate is anisotropically etched with the help of plasma generated after gas glow discharge. During the etching process, etching and protection are alternately performed. Fluorine-based active radicals are used to etch the silicon base, and then fluorine-based gas is used to passivate the side walls.
  • An embodiment of the present invention also provides a device, which is prepared by the above-mentioned three-dimensional silicon-based transfer structure processing method based on photosensitive composite materials.
  • Embodiments of the present invention provide a three-dimensional silicon-based transfer structure processing method based on photosensitive composite materials. First, a TSV blind trench is etched on the back of the silicon-based substrate, and a seed layer is sputtered on the back for blind trench plating.
  • the metal is plated in the groove, it is mechanically ground and polished; a rectangular groove with columns is dry-etched on the front side of the silicon-based wafer, the metal layer is sputtered, photolithographically patterned, and the target pattern is electroplated; solidified by multiple spin coatings
  • the method is to fill the BCB into the trench, and make a BCB mask on the silicon base dome layer to cover the edge of the trench; then complete the top dielectric layer 107 and metal patterning, and etching the rectangular waveguide on the back.
  • a mixed liquid of active inhibitor, accelerator and leveling agent is added to the electroplating solution to achieve a bottom-up electroplating effect during the electroplating process, and finally achieve a basically solid plating in the tank and a suppressed surface.
  • the inhibitor with strong adsorption capacity inhibits the growth of metal on the substrate surface on the surface of copper atoms.
  • the accelerator gathers at the bottom of the tank to increase the metal plating speed in the blind tank with different aspect ratios.
  • the leveling agent inhibits the current flow on the substrate surface. Metal bumps produced unevenly.
  • the embodiment of the present invention provides a three-dimensional silicon-based transfer structure processing method and device based on a photosensitive composite material, which solves the thickness limitation of the photosensitive composite material BCB when acting as a medium, and increases the thickness of the BCB by using multiple spin coating and solidification methods.
  • the system and its various devices, modules, and units provided by the present invention can be completely implemented by logically programming the method steps. , modules, and units implement the same functions in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers. Therefore, the system and its various devices, modules and units provided by the present invention can be regarded as a kind of hardware component, and the devices, modules and units included in it for realizing various functions can also be regarded as hardware components.
  • the structure; the devices, modules, and units used to implement various functions can also be regarded as either software modules for implementing methods or structures within hardware components.
  • the present invention has the following beneficial effects:
  • the present invention solves the thickness limitation of the photosensitive composite material BCB when acting as a medium, and increases the medium thickness of BCB by using multiple spin coating and solidification methods;
  • the present invention also solves the edge cracking phenomenon caused by the difference in thermal expansion coefficient between BCB and different materials, thereby preventing the risk of breakage of top metal traces; and proposes a method for preparing metal waveguides on silicon-based substrates.
  • the solution combines the production of TSV blind trenches with dry etching to achieve the purpose of integrating metal waveguides into silicon-based substrates, reducing interconnection losses and improving the diversity of wafer-level heterogeneous integrated packaging processes. and reliability;
  • the present invention is based on the problem of chip radio frequency fan-out interconnection in the silicon-based system-level integration process. It forms a three-dimensional interconnection structure by introducing a metal rectangular waveguide on the silicon-based substrate, replacing the traditional planar fan-out interconnection scheme and extremely efficient. It greatly reduces the overall size of the radio frequency system and provides a waveguide output interface while achieving miniaturization.

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Abstract

本发明提供一种基于光敏复合材料的三维硅基转接结构加工方法及装置,涉及晶圆级三维异质集成封装工艺技术领域,包括:步骤S1:在硅基衬底上制作正面保护膜和背面保护膜;步骤S2:在硅基衬底的背面制作波导金属侧壁,形成TSV盲槽;步骤S3:在硅基衬底的正面制作转接结构的背腔结构,并填充光敏复合材料;步骤S4:在背腔结构上方制备介质掩膜层,并在顶层介质层上方制作顶层金属图案;步骤S5:利用光刻掩膜与干法刻蚀进行体硅刻蚀并划片,得到完整转接结构。

Description

基于光敏复合材料的三维硅基转接结构加工方法及装置 技术领域
本发明涉及晶圆级三维异质集成封装工艺技术领域,具体地,涉及一种基于光敏复合材料的三维硅基转接结构加工方法及装置。
背景技术
晶圆级三维异质集成封装工艺是直接在硅基晶圆上将芯片与各种无源器件集成进一个系统中,并对芯片表面进行再布线实现扇出效果。在工艺进行过程中直接利用微纳工艺设备,可将上百个甚至更多的芯片一次性的集成在大批量系统当中,并与滤波器、天线、巴伦等无源器件进行互连,大幅度提高了封装效率、降低了成本、提升系统整机性能,是实现系统级封装的重要方式。
TSV盲槽电镀是三维异质集成环节中的核心工艺,它针对于硅基表面的盲槽部分进行电镀生长金属,利用这种垂直互连的方案可以减小系统互连长度、减小传输延迟、并且改善电容电感效应,实现了器件的小型化与高密度集成化。
随着信息时代的飞速发展,雷达通信系统正在向小型化、高性能化与高集成度方向不断迭代更新,传统的摩尔定律已经无法适用于现阶段的二维平面内的高密度迭代过程,因此三维异质集成技术被广泛的发展起来。目前毫米波频段内的雷达通信系统向着小型化与高性能化发展,面临的首要问题就是互连方案的解决。传统的互连方案以平面过度为主,并且从芯片以微带线扇出,这样在同等厚度的基底上制作出来的系统尺寸大、扇出接口不易与波导等接口集成。缩小系统的整体尺寸,将平面转接结构改变成立体结构实现三维集成效果便成了一大研究热点。同时,将金属波导集成在硅基衬底中与芯片进行互连时,由芯片扇出微带线到矩形波导的转接结构的加工是一项极具挑战的难点。
发明内容
针对现有技术中的缺陷,本发明提供一种基于光敏复合材料的三维硅基转接结构加工方法及装置。
根据本发明的实施例提供的一种基于光敏复合材料的三维硅基转接结构加工方法及装置,所述方案如下:
第一方面,提供了一种基于光敏复合材料的三维硅基转接结构加工方法,所述方法包括:
步骤S1:在硅基衬底上制作正面保护膜和背面保护膜;
步骤S2:在硅基衬底的背面制作波导金属侧壁,形成TSV盲槽;
步骤S3:在硅基衬底的正面制作转接结构的背腔结构,并填充光敏复合材料;
步骤S4:在背腔结构上方制备介质掩膜层,并在顶层介质层上方制作顶层金属图案;
步骤S5:利用光刻掩膜与干法刻蚀进行体硅刻蚀并划片,得到完整转接结构。
进一步地,所述步骤S2包括:
步骤S2.1:在背面保护膜上旋涂光刻胶并显影制备掩膜;
步骤S2.2:利用光刻掩膜刻蚀背面保护膜;
步骤S2.3:利用干法刻蚀完成体硅刻蚀并除掉光刻胶;
步骤S2.4:在硅基衬底背面溅射一层金属种子层;
步骤S2.5:对体硅刻蚀后形成的深槽进行电镀并镀实;
步骤S2.6:在硅基衬底的背面,对电镀结束凸出的金属铜进行机械磨平。
进一步地,所述步骤S2.3中,进行盲槽体硅刻蚀为421微米;
步骤S2.4的溅射过程中,先溅射一层金属铬;
步骤S2.5中,电镀液内添加表面金属原子活性抑制剂;
步骤S2.6中,采用600-BLD04型号磨轮进行金属机械磨平。
进一步地,所述步骤S3包括:
步骤S3.1:在正面保护膜上旋涂光刻胶并制备背腔图案;
步骤S3.2:干法刻蚀正面保护膜与硅基形成背腔结构,去胶清洗;
步骤S3.3:在硅基衬底的正面溅射一层地层种子层;
步骤S3.4:在地层种子层上旋涂光刻胶;
步骤S3.5:进行地层种子层的电镀并去胶清洗;
步骤S3.6:利用离子束刻蚀掉地层种子层,形成完整地层结构;
步骤S3.7:多次旋涂填充光敏介质BCB,固化后达到充分填充背腔效果;
步骤S3.8:机械磨平顶层BCB介质层。
进一步地,所述步骤S3.2中,干法刻蚀硅基背腔结构为79微米;
步骤S3.5中,电镀正面结构过程中使用导热胶带将背面裸露金属粘住。
进一步地,所述步骤S4包括:
步骤S4.1:在硅基衬底正面已经被机械磨平的BCB介质层上旋涂一层介质层作为背腔掩膜层;
步骤S4.2:利用介质刻蚀将背腔掩膜层外的光敏介质BCB刻蚀干净;
步骤S4.3:在硅基衬底正面的背腔掩膜层上方旋涂表层介质层并图案化;
步骤S4.4:在硅基衬底正面的表层介质层上方溅射顶层金属层;
步骤S4.5:在顶层金属层上旋涂光刻胶并图案化;
步骤S4.6:电镀顶层金属层并去除残胶;
步骤S4.7:离子束刻蚀去除未被电镀上的顶层金属层。
进一步地,所述步骤S4.1中,介质掩膜层尺寸相较于背腔结构四周外扩200微米;
步骤4.2中,介质刻蚀后保留顶层介质掩膜层8微米的高度。
进一步地,所述步骤S5包括:
步骤S5.1:在硅基衬底背面旋涂光刻胶并显影制备掩膜;
步骤S5.2:利用干法刻蚀完成体硅刻蚀并去除残胶;
步骤S5.3:对硅基衬底进行划片,完成转接结构制作。
进一步地,所述正面保护膜和背面保护膜均为Si 3N 4薄膜;
所述干法刻蚀均为电感耦合等离子体干法刻蚀。
第二方面,提供了一种装置,所述装置由所述基于光敏复合材料的三维硅基转接结构加工方法制备而成。
附图说明
通过阅读参照以下附图对非限制性实施例所作的详细描述,本发明的其它特征、目的和优点将会变得更明显:
图1是三维转接结构剖面图;
图2是采用本发明方法的基本流程图。
附图标记:
101 四英寸高阻圆硅片      102 Si 3N 4薄膜
103 矩形波导金属侧壁      104 基片集成波导背腔结构
105 金属地层        106 耦合窗口
107 顶层介质层      108 顶层金属层
109 空气腔体
具体实施方式
下面结合具体实施例对本发明进行详细说明。以下实施例将有助于本领域的技术人员进一步理解本发明,但不以任何形式限制本发明。应当指出的是,对本领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干变化和改进。这些都属于本发明的保护范围。
本发明实施例针对光敏复合材料BCB在充当介质时无法做到大厚度的问题;针对BCB与不同的材料在热膨胀系数上的差异导致在加工过程中出现边缘开裂的现象,从而导致介质顶层金属的走线在开裂处断裂的问题;针对改进传统的平面互连结构,将金属矩形波导集成在硅基衬底中实现三维集成架构时出现的方案问题,提供了一种基于光敏复合材料的三维硅基转接结构加工方法,参照图1所示,该方法具体包括:
步骤S1:在硅基衬底上制作正面保护膜和背面保护膜(即双面保护膜)。
步骤S2:利用干法刻蚀,在硅基衬底的背面制作波导金属侧壁,形成TSV盲槽。
其中,步骤S2具体包括如下步骤:
步骤S2.1:在背面保护膜上旋涂光刻胶并显影制备掩膜。
步骤S2.2:利用光刻掩膜刻蚀背面保护膜。
步骤S2.3:利用干法刻蚀完成体硅刻蚀并除掉光刻胶,其中,进行盲槽体硅刻蚀为421微米。
步骤S2.4:在硅基衬底背面溅射一层金属种子层,该步骤的溅射过程中,先溅射一层金属铬,有助于增加金属铜的粘附性。
步骤S2.5:TSV盲槽电镀,即对体硅刻蚀后形成的深槽进行电镀并镀实;该步骤中的电镀液内添加表面金属原子活性抑制剂,保证槽内槽外电镀各向异性。
步骤S2.6:在硅基衬底的背面,对电镀结束凸出的金属铜进行机械磨平。该步骤采用600-BLD04型号磨轮进行金属机械磨平。
步骤S3:在硅基衬底的正面制作转接结构的背腔结构,并填充光敏复合材料。
在步骤S3中,该步骤具体包括:
步骤S3.1:在正面保护膜上旋涂光刻胶并制备背腔图案。
步骤S3.2:干法刻蚀正面保护膜与硅基形成背腔结构,去胶清洗,该步骤中的干法刻蚀硅基背腔结构为79微米。
步骤S3.3:在硅基衬底的正面溅射一层地层种子层;
步骤S3.4:在地层种子层上旋涂光刻胶。
步骤S3.5:进行地层种子层的电镀并去胶清洗,该步骤中的电镀正面结构过程中使用导热胶带将背面裸露金属粘住。
步骤S3.6:利用离子束刻蚀掉地层种子层,形成完整地层结构。
步骤S3.7:多次旋涂填充光敏介质BCB,固化后达到充分填充背腔效果。
步骤S3.8:机械磨平顶层BCB介质层。
步骤S4:在背腔结构上方制备介质掩膜层,并在顶层介质层上方制作顶层金属图案。
在步骤S4中,具体步骤包括:
步骤S4.1:在硅基衬底正面已经被机械磨平的BCB介质层上旋涂一层介质层作为背腔掩膜层,该步骤中,介质掩膜层尺寸相较于背腔结构四周外扩200微米。
步骤S4.2:利用介质刻蚀将背腔掩膜层外的光敏介质BCB刻蚀干净,该步骤中,介质刻蚀后保留顶层介质掩膜层8微米的高度。
步骤S4.3:在硅基衬底正面的背腔掩膜层上方旋涂表层介质层并图案化。
步骤S4.4:在硅基衬底正面的表层介质层上方溅射顶层金属层;
步骤S4.5:在顶层金属层上旋涂光刻胶并图案化。
步骤S4.6:电镀顶层金属层并去除残胶。
步骤S4.7:离子束刻蚀去除未被电镀上的顶层金属层。
步骤S5:利用光刻掩膜与干法刻蚀进行体硅刻蚀并划片,得到完整转接结构。
在步骤S5中,具体包括:
步骤S5.1:在硅基衬底背面旋涂光刻胶并显影制备掩膜。
步骤S5.2:利用干法刻蚀完成体硅刻蚀并去除残胶。
步骤S5.3:对硅基衬底进行划片,完成转接结构制作。
本发明实施例中的正面保护膜和背面保护膜(即双面保护膜)均为Si 3N 4薄膜102,所有的工艺流程中涉及到的干法刻蚀均为电感耦合等离子体干法刻蚀。具体地,所用到的干法刻蚀均为反应耦合等离子体刻蚀,借助于气体辉光放电后产生的等离子体对硅基衬底进行各向异性的刻蚀。刻蚀过程中采用刻蚀与保护交替进行的环节,采用氟基活性 自由基对硅基进行刻蚀,紧接着采用氟基气体对侧壁进行钝化。在各向同性刻蚀后,由于纵向方向的基底侧壁有气体轰击产生的钝化膜,在下一次的刻蚀周期时侧壁的钝化层不会被刻蚀掉,氟基活性自由基气体仅对刻蚀槽底部进行刻蚀。刻蚀与钝化如此反复下来,提升干法刻蚀各向异性效果,最终结构的倾斜角近90°,并且可以制作出高深宽比的结构,保证了后续如TSV盲槽的干法刻蚀制备。
本发明的实施例还提供了一种装置,该装置由上述的基于光敏复合材料的三维硅基转接结构加工方法制备而成。
接下来,对本发明进行更为具体的说明。
本发明的实施例提供了一种基于光敏复合材料的三维硅基转接结构加工方法,先在硅基衬底背部刻蚀出TSV盲槽,并在背面溅射上种子层进行盲槽电镀,待槽内镀实金属后进行机械磨平;在硅基晶圆正面干法刻蚀一个带柱矩形槽,溅射金属层后光刻图案化,电镀出目标图形;通过多次旋涂固化的方法将BCB填充进槽内,并在硅基晶圆顶层做一层BCB掩膜盖住槽边缘;随后完成顶层介质层107和金属图形化,以及背面矩形波导的刻蚀。通过该方案的确定与实施,克服了将矩形金属波导集成在硅基晶圆中的困难,并实现了从接地共面波导线到金属波导的转换,为三维异质集成提供了一个高效可靠的转接方案。在工艺流程中,通过改进介质旋涂工艺参数与掩膜方案,达到了制作大厚度介质层并无开裂的效果。
具体工艺步骤为:
(1)在硅片上正反面上制备保护膜;
(2)在硅基背面旋涂光刻胶、烘烤光刻显影后刻蚀保护膜与硅基;
(3)去除光刻胶,溅射金属种子层后进行盲槽电镀,随后机械磨平;
(4)在硅基正面旋涂光刻胶、烘烤光刻显影后刻蚀保护膜与硅基达到指定深度;
(5)去除光刻胶,溅射金属种子层并利用光刻胶图案化表面,实施金属电镀;
(6)去除光刻胶与种子层,形成完整底层结构;
(7)多次填充光敏介质BCB,充分固化后将顶层磨平;
(8)旋涂新一层光敏介质BCB充当背腔掩膜层,对整体结构进行介质刻蚀;
(9)旋涂顶层光敏介质BCB层,并溅射金属种子层;
(10)完成顶层金属层图案化,去除金属种子层;
(11)在硅基背面旋涂光刻胶,完成金属盲槽中间硅基的刻蚀,形成金属矩形波导;
(12)对硅基晶圆进行划片,得到完整的转接结构单元。
参照图1和图2所示,本发明中的方法,如下操作:
(a)以双面抛光的厚度为500um的四英寸高阻圆硅片101作为硅基衬底,在清洁后使用,如图2(a)所示。
(b)通过LPCVD工艺,在高阻圆硅片双面沉积Si 3N 4薄膜102,如图2(b)所示。
(c)在硅片背面旋涂光刻胶,显影出矩形波导侧壁图形,如图2(c)所示。
(d)以光刻胶为掩膜,对保护膜Si 3N 4进行介质刻蚀,裸露出保护膜下面的硅基表面,如图2(d)所示。
(e)继续以光刻胶为掩膜,利用干法刻蚀对裸露出的硅基进行深硅刻蚀,刻蚀出盲槽,如图2(e)所示。
(f)用丙酮去胶,溅射上Cr/Cu种子层,直接进行TSV盲槽电镀,形成矩形波导金属侧壁103,如图2(f)所示。
(g)采用型号为DISCO-BG810减薄机以及600-BLD04型号磨轮,对硅片背面的金属进行机械磨平并抛光,如图2(g)所示。
(h)在硅片正面旋涂光刻胶,显影出基片集成波导背腔图形,如图2(h)所示。
(i)以光刻胶为掩膜,对保护膜Si 3N 4进行介质刻蚀,裸露出保护膜下面的硅基表面,如图2(i)所示。
(j)继续以光刻胶为掩膜,利用干法刻蚀对裸露出的硅基进行深硅刻蚀,刻蚀出基片集成波导背腔结构104,如图2(j)所示。
(k)利用丙酮将光刻胶洗掉,并利用超声波进行二次清洗,达到彻底清除残胶的效果,如图2(k)所示。
(l)在硅片正面溅射上Cr/Cu种子层,如图2(l)所示。
(m)在硅片正面旋涂光刻胶,并在基片集成波导背腔内光刻显影出金属地层图案,如图2(m)所示。
(n)以槽内的光刻胶为掩膜,电镀金属地层105,利用丙酮洗去光刻胶,利用离子束刻蚀将被光刻胶遮盖住的金属种子层刻蚀干净,露出耦合窗口106,如图2(n)所示。
(o)旋涂多次BCB,经过曝光、显影与固化后完全填充基片集成波导背腔结构104,如图2(o)所示。
(p)利用型号为DISCO-BG810减薄机对硅片正面凹凸不平的BCB层进行打磨,保证顶层BCB处于同一平面内,如图2(p)所示。
(q)在硅片正面旋涂一层BCB用于充当背腔介质填充的掩膜,并对正面整体结构进行介质刻蚀,保证最终掩膜部分比硅基表面高,如图2(q)所示。
(r)旋涂一层BCB作为顶层介质层107,经过前烘、曝光、显影与硬固化后,刻蚀顶层至相应的厚度,如图2(r)所示。
(s)在顶层介质层107上面溅射上Cr/Cu种子层,如图2(s)所示。
(t)在种子层上方旋涂光刻胶,光刻显影后得到顶层金属图案,如图2(t)所示。
(u)以种子层上方的光刻胶为掩膜,电镀顶层金属层108,利用丙酮洗去光刻胶,利用离子束刻蚀将被光刻胶遮盖住的金属种子层刻蚀干净,如图2(u)所示。
(v)在硅片背面旋涂光刻胶,显影出矩形波导腔体内图形,如图2(v)所示。
(w)以光刻胶为掩膜,对裸露出的硅基进行干法刻蚀,即将金属矩形波导腔体内的所有硅基刻蚀干净,形成空气腔体109,如图2(w)所示。
(x)用丙酮清洗残胶,并使用型号为DISCO-DAD3650划片机对硅片进行划片,得到每一个转接结构单元,如图2(x)所示。
本发明的实施例中采用在电镀液中添加活性抑制剂、加速剂与整平剂的混合液体,达到了电镀过程中自底向上的电镀效果,最终得到了槽内基本镀实,表面被抑制的结构。拥有强吸附能力的抑制剂在铜原子表面抑制衬底表面金属的生长、加速剂在槽底汇聚增加了不同深宽比的盲槽内的金属电镀速度、整平剂抑制了衬底表面由于电流不均产生的金属凸块。
本发明实施例提供了一种基于光敏复合材料的三维硅基转接结构加工方法及装置,解决了光敏复合材料BCB在充当介质时的厚度限制,利用多次旋涂固化的方法增加了BCB的介质厚度;同时解决了BCB与不同的材料在热膨胀系数上的差异导致的边缘开裂现象,从而防止顶层金属走线出现断裂的风险;并且提出了一种在硅基衬底上制备金属波导的方案,通过制作TSV盲槽与干法刻蚀相结合的方法实现了金属波导集成在硅基衬底中的目的,减小了互连损耗,提升了晶圆级异质集成封装工艺的多样性与可靠性。本发明立足于硅基系统级集成过程中芯片射频扇出互连问题,通过在硅基衬底上引入金属矩形波导形成三维互连结构,取代了传统平面扇出的互连方案,极大缩减了射频系统的整体尺寸,在实现小型化的同时提供了波导输出接口,提升了互连自由度与灵活度。
本领域技术人员知道,除了以纯计算机可读程序代码方式实现本发明提供的系统及其各个装置、模块、单元以外,完全可以通过将方法步骤进行逻辑编程来使得本发明提 供的系统及其各个装置、模块、单元以逻辑门、开关、专用集成电路、可编程逻辑控制器以及嵌入式微控制器等的形式来实现相同功能。所以,本发明提供的系统及其各项装置、模块、单元可以被认为是一种硬件部件,而对其内包括的用于实现各种功能的装置、模块、单元也可以视为硬件部件内的结构;也可以将用于实现各种功能的装置、模块、单元视为既可以是实现方法的软件模块又可以是硬件部件内的结构。
与现有技术相比,本发明具有如下的有益效果:
1、本发明解决了光敏复合材料BCB在充当介质时的厚度限制,利用多次旋涂固化的方法增加了BCB的介质厚度;
2、本发明同时解决了BCB与不同的材料在热膨胀系数上的差异导致的边缘开裂现象,从而防止顶层金属走线出现断裂的风险;并且提出了一种在硅基衬底上制备金属波导的方案,通过制作TSV盲槽与干法刻蚀相结合的方法实现了金属波导集成在硅基衬底中的目的,减小了互连损耗,提升了晶圆级异质集成封装工艺的多样性与可靠性;
3、本发明立足于硅基系统级集成过程中芯片射频扇出互连问题,通过在硅基衬底上引入金属矩形波导形成三维互连结构,取代了传统平面扇出的互连方案,极大缩减了射频系统的整体尺寸,在实现小型化的同时提供了波导输出接口。
以上对本发明的具体实施例进行了描述。需要理解的是,本发明并不局限于上述特定实施方式,本领域技术人员可以在权利要求的范围内做出各种变化或修改,这并不影响本发明的实质内容。在不冲突的情况下,本申请的实施例和实施例中的特征可以任意相互组合。

Claims (10)

  1. 一种基于光敏复合材料的三维硅基转接结构加工方法,其特征在于,包括:
    步骤S1:在硅基衬底上制作正面保护膜和背面保护膜;
    步骤S2:在硅基衬底的背面制作波导金属侧壁,形成TSV盲槽;
    步骤S3:在硅基衬底的正面制作转接结构的背腔结构,并填充光敏复合材料;
    步骤S4:在背腔结构上方制备介质掩膜层,并在顶层介质层上方制作顶层金属图案;
    步骤S5:利用光刻掩膜与干法刻蚀进行体硅刻蚀并划片,得到完整转接结构。
  2. 根据权利要求1所述的基于光敏复合材料的三维硅基转接结构加工方法,其特征在于,所述步骤S2包括:
    步骤S2.1:在背面保护膜上旋涂光刻胶并显影制备掩膜;
    步骤S2.2:利用光刻掩膜刻蚀背面保护膜;
    步骤S2.3:利用干法刻蚀完成体硅刻蚀并除掉光刻胶;
    步骤S2.4:在硅基衬底背面溅射一层金属种子层;
    步骤S2.5:对体硅刻蚀后形成的深槽进行电镀并镀实;
    步骤S2.6:在硅基衬底的背面,对电镀结束凸出的金属铜进行机械磨平。
  3. 根据权利要求2所述的基于光敏复合材料的三维硅基转接结构加工方法,其特征在于,所述步骤S2.3中,进行盲槽体硅刻蚀为421微米;
    步骤S2.4的溅射过程中,先溅射一层金属铬;
    步骤S2.5中,电镀液内添加表面金属原子活性抑制剂;
    步骤S2.6中,采用600-BLD04型号磨轮进行金属机械磨平。
  4. 根据权利要求1所述的基于光敏复合材料的三维硅基转接结构加工方法,其特征在于,所述步骤S3包括:
    步骤S3.1:在正面保护膜上旋涂光刻胶并制备背腔图案;
    步骤S3.2:干法刻蚀正面保护膜与硅基形成背腔结构,去胶清洗;
    步骤S3.3:在硅基衬底的正面溅射一层地层种子层;
    步骤S3.4:在地层种子层上旋涂光刻胶;
    步骤S3.5:进行地层种子层的电镀并去胶清洗;
    步骤S3.6:利用离子束刻蚀掉地层种子层,形成完整地层结构;
    步骤S3.7:多次旋涂填充光敏介质BCB,固化后达到充分填充背腔效果;
    步骤S3.8:机械磨平顶层BCB介质层。
  5. 根据权利要求4所述的基于光敏复合材料的三维硅基转接结构加工方法,其特征在于,所述步骤S3.2中,干法刻蚀硅基背腔结构为79微米;
    步骤S3.5中,电镀正面结构过程中使用导热胶带将背面裸露金属粘住。
  6. 根据权利要求1所述的基于光敏复合材料的三维硅基转接结构加工方法,其特征在于,所述步骤S4包括:
    步骤S4.1:在硅基衬底正面已经被机械磨平的BCB介质层上旋涂一层介质层作为背腔掩膜层;
    步骤S4.2:利用介质刻蚀将背腔掩膜层外的光敏介质BCB刻蚀干净;
    步骤S4.3:在硅基衬底正面的背腔掩膜层上方旋涂表层介质层并图案化;
    步骤S4.4:在硅基衬底正面的表层介质层上方溅射顶层金属层;
    步骤S4.5:在顶层金属层上旋涂光刻胶并图案化;
    步骤S4.6:电镀顶层金属层并去除残胶;
    步骤S4.7:离子束刻蚀去除未被电镀上的顶层金属层。
  7. 根据权利要求6所述的基于光敏复合材料的三维硅基转接结构加工方法,其特征在于,所述步骤S4.1中,介质掩膜层尺寸相较于背腔结构四周外扩200微米;
    步骤4.2中,介质刻蚀后保留顶层介质掩膜层8微米的高度。
  8. 根据权利要求1所述的基于光敏复合材料的三维硅基转接结构加工方法,其特征在于,所述步骤S5包括:
    步骤S5.1:在硅基衬底背面旋涂光刻胶并显影制备掩膜;
    步骤S5.2:利用干法刻蚀完成体硅刻蚀并去除残胶;
    步骤S5.3:对硅基衬底进行划片,完成转接结构制作。
  9. 根据权利要求1所述的基于光敏复合材料的三维硅基转接结构加工方法,其特征在于,所述正面保护膜和背面保护膜均为Si 3N 4薄膜;
    所述干法刻蚀均为电感耦合等离子体干法刻蚀。
  10. 一种装置,其特征在于,所述装置由权利要求1至9任意一项权利要求所述的基于光敏复合材料的三维硅基转接结构加工方法制备而成。
PCT/CN2022/139915 2022-03-14 2022-12-19 基于光敏复合材料的三维硅基转接结构加工方法及装置 WO2023173862A1 (zh)

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