WO2023130267A1

WO2023130267A1 - Wakeup detection circuit, battery management system and battery pack

Info

Publication number: WO2023130267A1
Application number: PCT/CN2022/070354
Authority: WO
Inventors: 雷雨
Original assignee: 东莞新能安科技有限公司
Priority date: 2022-01-05
Filing date: 2022-01-05
Publication date: 2023-07-13

Abstract

Provided in the embodiments of the present application are a wakeup detection circuit, a battery management system and a battery pack. The wakeup detection circuit comprises a first module and a second module. The first module is electrically connected to an access impedance and a control unit, and generates a first signal in response to the access impedance being less than an upper threshold value of the access impedance, such that the control unit enters a wakeup state. The access impedance is configured to be electrically connected between an output end of a battery pack and the first module. The second module is electrically connected to the first module and the control unit. In response to the control unit entering a non-wakeup state or the control unit being in a non-wakeup state, the second module receives a fourth signal sent by the control unit. The fourth signal is used for reducing the upper limit threshold value of the access impedance. By means of the embodiments of the present application, the possibility of a control unit being woken up by a large access impedance by mistake is reduced.

Description

Wake-up detection circuit, battery management system and battery pack

technical field

The embodiments of the present application relate to the field of electrical technology, and in particular to a wake-up detection circuit, a battery management system and a battery pack.

Background technique

With the vigorous development of the electrification industry such as the energy storage industry, batteries such as lithium batteries, as an energy storage device, can not only ensure the reliable and stable operation of various electrical equipment, but also efficiently save electric energy in the form of DC charging. .

As a monitoring system, the battery management system (Battery Management System, BMS) can effectively manage the battery, improve the working efficiency and reliability of the battery, for example, better realize the energy storage function of the battery. Generally speaking, a wake-up detection circuit is set in the battery management system, which enables the battery management system to provide reliable battery management in the wake-up state, and save the power consumption of the battery management system in the non-wake-up state such as the sleep state .

However, the performance reliability of the existing wake-up detection circuit is poor, and the battery management system may be accidentally woken up.

Contents of the invention

In view of this, the embodiments of the present application provide a wake-up detection circuit, a battery management system and a battery pack, which can improve the above problems.

According to the first aspect of the embodiments of the present application, a wake-up detection circuit is provided. The wake-up detection circuit includes a first module and a second module. The first module is electrically connected to the access impedance and the control unit, and generates a first signal to make the control unit enter a wake-up state in response to the access impedance being less than the upper threshold of the access impedance. The access impedance is configured to be electrically connected between the output terminal of the battery pack and the first module. The second module is electrically connected to the first module and the control unit. The second module receives a fourth signal sent by the control unit in response to the control unit entering the non-awake state or the control unit being in the non-awake state. The fourth signal is used to reduce the upper threshold of the access impedance.

In some other embodiments of the present application, the second module receives a second signal sent by the control unit in response to the control unit entering the wake-up state or the control unit is in the wake-up state, and the second signal is used to increase the upper threshold of the access impedance.

In some other embodiments of the present application, the wake-up module generates a third signal to make the control unit enter the non-wake-up state in response to the access impedance being higher than an upper threshold of the access impedance.

In some other embodiments of the present application, the first module includes an input terminal of a power supply voltage and a voltage dividing circuit. The voltage dividing circuit includes voltage dividing resistors.

In some other embodiments of the present application, the voltage dividing resistor and the upper threshold of the access impedance form a voltage dividing ratio. The voltage division ratio is determined based on the power supply voltage and a wake-up voltage threshold.

In some other embodiments of the present application, the fourth signal reduces the upper limit threshold by reducing the voltage dividing resistance.

In some other embodiments of the present application, the second module includes a switching device. When the switching device is turned on, the voltage dividing resistor includes a first resistor and a second resistor, and the first resistor and the second resistor are connected in parallel. When the switching device is turned off, the voltage dividing resistor includes a first resistor.

In some other embodiments of the present application, the switching device includes a PMOS transistor. The gate of the PMOS transistor is connected to the control unit for receiving the fourth signal. The fourth signal turns on the PMOS transistor.

In other embodiments of the present application, the source of the PMOS transistor and one end of the first resistor are connected to the input terminal of the supply voltage, and the drain of the PMOS transistor is connected to the second resistor. one end.

In some other embodiments of the present application, the other ends of the first resistor and the second resistor are connected between the access impedance and the control unit.

In some other embodiments of the present application, the second module includes a third resistor, and the third resistor is connected between the gate and the source of the PMOS transistor.

In other embodiments of the present application, the second module further includes a fourth resistor. The fourth resistor is connected between the control unit and the gate of the PMOS transistor. The control unit sends a fourth signal via the fourth resistor.

In some other embodiments of the present application, the wake-up detection circuit further includes a fifth resistor and a first capacitor. The fifth resistor is connected between the first module and the control unit. One end of the first capacitor is connected between the fifth resistor and the control unit, and the other end of the first capacitor is grounded.

In some other embodiments of the present application, the wake-up detection circuit further includes a second capacitor. One end of the second capacitor is connected to the first module, and the other end of the second capacitor is grounded.

In some other embodiments of the present application, the wake-up detection circuit further includes a transient diode. One end of the transient diode is connected to the first module, and the other end of the transient diode is grounded.

In some other embodiments of the present application, the first module further includes an anti-reverse connection diode. The anode of the anti-reverse connection diode is connected to the first module, and the cathode of the anti-reverse connection diode is connected to the input terminal of the first module.

According to a second aspect of the embodiments of the present application, a wake-up detection circuit is provided. The wake-up circuit includes a voltage dividing circuit and a switch device. The voltage dividing circuit is electrically connected to the access impedance and the control unit, and the access impedance is configured to be electrically connected between the output terminal of the battery pack and the voltage dividing circuit. The switching device is electrically connected to the voltage dividing circuit and the control unit, and performs on-off operation in response to a control signal of the control unit. The voltage dividing circuit has a first resistance value when the switching device is turned on in response to a control signal of the control. The voltage divider circuit has a second resistance value when the switching device is turned off in response to a control signal of the control. The first resistance value is smaller than the second resistance value.

In other embodiments of the present application, the voltage dividing circuit includes a first resistor and a second resistor. The first resistor is connected in parallel with the second resistor, and the second resistor is also connected in series with the switching device.

In some other embodiments of the present application, the wake-up detection circuit further includes a power supply voltage input terminal. The switching device includes a PMOS, the source of the PMOS and the first end of the first resistor are both electrically connected to the supply voltage input end, and the drain of the PMOS is electrically connected to the first end of the second resistor. At one end, the gate of the PMOS is electrically connected to the control unit. The second end of the first resistor and the second end of the second resistor are electrically connected to the control unit.

In other embodiments of the present application, when the switching device is turned on, the voltage dividing circuit includes the first resistor and the second resistor, and the first resistor and the second resistor are connected in parallel.

In some other embodiments of the present application, when the switching device is turned off, the voltage dividing circuit includes the first resistor.

In some other embodiments of the present application, the wake-up detection circuit further includes a third resistor. The third resistor is connected between the gate and the source of the PMOS transistor.

In some other embodiments of the present application, the wake-up detection circuit further includes a fourth resistor. The fourth resistor is electrically connected between the control unit and the gate of the PMOS transistor.

In some other embodiments of the present application, the wake-up detection circuit further includes a fifth resistor and a first capacitor. The fifth resistor is electrically connected between the voltage dividing circuit and the control unit. One end of the first capacitor is electrically connected between the fifth resistor and the control unit, and the other end of the first capacitor is grounded.

In some other embodiments of the present application, the wake-up detection circuit further includes a second capacitor. One end of the second capacitor is electrically connected to the voltage dividing circuit, and the other end of the second capacitor is grounded.

In some other embodiments of the present application, the wake-up detection circuit further includes a transient diode. One end of the transient diode is electrically connected to the voltage dividing circuit, and the other end of the transient diode is grounded.

In some other embodiments of the present application, the wake-up detection circuit further includes an anti-reverse connection diode. The anode of the anti-reverse connection diode is connected to the voltage divider circuit, and the cathode of the anti-reverse connection diode is connected to the input terminal of the wake-up detection circuit.

According to a third aspect of the embodiments of the present application, a battery management system is provided. The battery management system includes the wake-up detection circuit according to the first aspect or the second aspect.

According to a fourth aspect of the embodiments of the present application, a battery pack is provided. The battery pack includes a battery module and the battery management system according to the third aspect. The cell module includes at least one cell. The battery management system is electrically connected to the battery module.

In the embodiment of the present application, the upper limit threshold of the access impedance is reduced in the non-awake state, so that the control unit can enter the wake-up state only when the access impedance is smaller than the upper limit threshold, thus reducing the control unit being greatly connected Possibility of impedance false wake-up.

Description of drawings

Hereinafter, some specific embodiments of the embodiments of the present application will be described in detail with reference to the accompanying drawings in an exemplary rather than restrictive manner. The same reference numerals in the drawings designate the same or similar parts or parts. Those skilled in the art will appreciate that these figures are not necessarily drawn to scale. In the attached picture:

FIG. 1A is a schematic diagram of an example battery pack;

FIG. 1B is a schematic diagram of an exemplary wake-up detection circuit;

FIG. 2 is a schematic diagram of a wake-up detection circuit according to an embodiment of the present application;

3 is a schematic diagram of a wake-up detection circuit according to another embodiment of the present application;

FIG. 4 is a schematic diagram of a wake-up detection circuit according to another embodiment of the present application.

Detailed ways

In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and detailedly described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described The embodiments are only some of the embodiments of the present application, but not all of them. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments in this application shall fall within the protection scope of this application.

The specific implementation of the embodiment of the present application will be further described below in conjunction with the accompanying drawings of the embodiment of the present application.

With the development of battery technology, lithium-ion batteries such as lithium iron phosphate batteries, lithium manganate batteries, and lead-acid batteries can be used as energy storage batteries. Energy storage batteries have been widely used in various scenarios, and can be used as power batteries in electrical equipment involving electric tools, electric bicycles, electric motorcycles, and energy storage systems.

The energy storage battery can provide electric energy for the electrical equipment in the form of a battery pack. The battery management system (Battery Management System, BMS) can monitor the battery pack in different application scenarios, manage the charging and discharging of the battery pack, and improve the battery life. Package efficiency and service life. Specifically, the battery management system can perform control management such as battery status monitoring, battery status analysis, battery safety protection, energy control management, and battery information management.

FIG. 1A is a schematic diagram of an example battery pack. The battery pack 100 in FIG. 1A includes a cell module 110 , a battery management system 120 and a connector 160 . The battery management system 120 includes a DC transformer circuit 130, a wake-up detection circuit 140 and a control unit 150 such as a Microcontroller Unit (MCU). The DC transformer circuit 130 steps down the DC voltage of the B+ side of the cell module 110 to supply power to the battery management system 120 . The connector 160 is used to connect the battery pack 100 with the electrical equipment. The connector 160 includes a terminal ON connected to the wake-up detection circuit 140 . When the battery pack 100 is installed on the electric device through the connector 160 to use the battery pack 100, the electric device short-circuits the terminal ON and the negative output terminal P- of the battery pack 100, and the wake-up detection circuit 140 can detect the short circuit. In the connected state, a wake-up signal is sent to the control unit 150 to wake up the control unit 150, and then the battery management system 120 enters the wake-up state.

The working principle of the wake-up detection circuit 140 in FIG. 1A is described below in conjunction with a specific example in FIG. 1B . As shown in FIG. 1B , U11 and U12 are respectively the power supply voltage of the wake-up detection circuit 140 and the power supply voltage of the MCU of the battery management system 120 . D10 is an anti-reverse connection diode, which prevents the overcurrent from the connector 160 from flowing into the wake-up detection circuit 140 . An access impedance is formed between the terminal ON and the negative output terminal P-, and the access impedance is equivalent to the equivalent resistance connected between the terminal ON and the negative output terminal P-, for example, between the terminal ON and the negative output terminal P- When it is short-circuited, the access impedance is small, and when it is not short-circuited between the terminal ON and the negative output terminal P-, the access impedance is relatively large. The wake-up detection circuit 140 can detect the change of the access impedance, and accordingly control the MCU to perform falling-edge wake-up, that is, when the wake-up voltage input to the MCU is lower than the wake-up voltage threshold, the MCU is woken up. Correspondingly, when the access impedance is less than the upper limit threshold, the wake-up detection circuit 140 outputs the wake-up signal MCU-ON1, where the upper limit threshold of the access impedance (hereinafter referred to as: impedance upper limit threshold) means that the wake-up detection circuit 140 can be triggered to output The maximum resistance of the wake-up signal MCU-ON1. For the circuit of FIG. 1B, the wake-up signal MCU-ON1 can be considered to be connected between R11 in series and the access impedance. Therefore, the voltage of the wake-up signal MCU-ON1 is related to the power supply voltage U11 of the wake-up detection circuit 140, and R11 is related to the access impedance. The voltage division ratio between the impedances is related. When the access impedance is much larger than R11, the voltage of the wake-up signal MCU-ON1 is approximately the power supply voltage U11. When the access impedance is less than the impedance upper threshold, the voltage of the wake-up signal MCU-ON1 is correspondingly less than a certain voltage threshold, thereby waking up the MCU.

More specifically, for example, the power supply voltage of the wake-up detection circuit is 3.3V, the current when the wake-up detection circuit is in a low power consumption state is approximately 3uA (microampere), and the wake-up voltage of the wake-up MCU (the voltage of the wake-up signal MCU-ON1) is 0.99V. Therefore, in order to satisfy the power consumption of the above-mentioned wake-up detection circuit, the resistance between the input terminal of the power supply voltage and the ground terminal is required to be approximately 1.1 MΩ, that is, the sum of the access impedance and R11 is approximately 1.1 MΩ. When the ratio of the access impedance to the resistance value of R11 is 0.99/(3.3-0.99), that is, when the access impedance is 330KΩ, the MCU is woken up. In order to ensure the low power consumption of the wake-up detection circuit, the current passing through R11 is small, and the resistance of R11 needs to be large, so that in the case of a given wake-up voltage and power supply voltage, a larger access impedance can also wake up The MCU, for example, can also be woken up in the event of water ingress or hand touch between the terminal ON and the negative output terminal P-. That is, there is a high possibility that the MCU is awakened by mistake.

FIG. 2 is a schematic diagram of a wake-up detection circuit according to an embodiment of the present application. Referring to FIG. 2 and FIG. 3 , the control unit 150 is connected to a terminal of the connector through a wake-up line. An access impedance is formed between the output terminal of the battery pack and the wake-up line. The output end of the battery pack can be the positive output end or the negative output end of the battery pack.

The wake-up detection circuit 200 in FIG. 2 includes a first module 210 and a second module 220 . The first module 210 is used to perform wake-up detection, and the second module 220 is used to perform threshold adjustment.

Specifically, the first module 210 is electrically connected to the access impedance and the control unit 150, for example, to obtain the access impedance through a wake-up line.

When the access impedance is lower than the upper impedance threshold, the first module 210 outputs a first signal to the control unit 150, so that the control unit 150 enters a wake-up state. When the access impedance is higher than the upper impedance threshold, the first module 210 outputs a third signal to the control unit 150, so that the control unit 150 enters a non-awake state.

The awake state of the control unit indicates the normal working state of the battery management system, and the non-awake state of the control unit indicates the low power consumption state of the battery management system. The non-awake state includes but is not limited to sleep state, standby state, and shutdown state. Specifically, in the low power consumption state of the battery management system, the functions of some circuits are not used. Correspondingly, the control unit responds to being in a non-wake-up state, disconnects the power supply of some circuits, and realizes the low power consumption of the battery management system. .

In addition, the control unit may be configured as a chip including pins, and may receive the first signal or the third signal through a pin.

In addition, the control unit may be electrically connected to the indicator light. In one example, the indicator light is on when the control unit is in the wake-up state, and the indicator light is off when the control unit is in the non-awake state. In another example, when the control unit is in the awake state, the indicator light is off, and when the control unit is in the non-awake state, the indicator light is on.

The second module 220 is electrically connected to the first module 210 and the control unit, and can adjust the impedance upper limit threshold according to the working state of the battery management system 120 .

For example, when the control unit 150 is in the wake-up state, the control unit 150 sends a second signal to the first module 210 through the second module 220, and the second signal is used to increase the impedance upper threshold. For another example, when the control unit 150 is in the non-awake state or indicates to enter the non-awake state, the control unit 150 inputs a fourth signal to the first module 210 through the second module 220, and the fourth signal is used to reduce the impedance upper threshold.

The control unit can send the second signal or the fourth signal through the two pins.

Specifically, the first module 210 may include a voltage divider circuit. The voltage divider circuit may have a voltage divider ratio formed between the access impedance and the voltage divider resistance. Divide the voltage and output a control signal to the control unit 150, the control signal may be the first signal or the third signal. In addition, the voltage-dividing ratio threshold of the voltage-dividing circuit corresponds to the ratio of the impedance upper limit threshold to the voltage-dividing resistance.

In some examples, when the voltage of the control signal is lower than the wake-up voltage threshold of the control unit 150 , the control signal is the first signal, and when the voltage of the control signal is greater than the wake-up voltage threshold, the control signal is the third signal. The ratio of the wake-up voltage threshold to the supply voltage is positively related to the voltage divider threshold. For a given supply voltage and wake-up voltage threshold, the divider ratio threshold is determined. Correspondingly, the second signal can increase the impedance upper limit threshold by increasing the voltage dividing resistor; the fourth signal can decrease the impedance upper limit threshold by adjusting the voltage dividing resistor small.

When the control unit 150 is in the non-awake state, for a given voltage division ratio threshold, the smaller the voltage division resistance, the smaller the upper impedance threshold. In other words, the second module 220 can reduce the voltage divider resistance and reduce the impedance upper limit threshold. Therefore, only when the access impedance is less than the upper impedance threshold, the voltage of the control signal can be less than the wake-up voltage threshold, thereby reducing the possibility of false wake-up of the control unit 150 by a relatively large access impedance.

When the control unit 150 is in the wake-up state, for a given access impedance, the larger the voltage dividing resistor is, the smaller the current passing through the voltage dividing resistor is, and the smaller the power consumption of the wake-up detection circuit 200 is. In other words, the second module 220 can increase the voltage dividing resistance and increase the impedance upper limit threshold. Since the upper impedance threshold is adjusted larger, the access impedance is still smaller than the upper impedance threshold, which will not affect the wake-up state of the control unit 150 . In addition, the voltage dividing resistor is adjusted larger, which reduces the power consumption of the wake-up detection circuit 200 .

In some examples, the above-mentioned voltage dividing resistor may be a variable resistance device, and the variable resistance device may receive the control of the second signal or the fourth signal to increase or decrease the resistance value accordingly.

In some other examples, the voltage dividing circuit may include a first resistor, a second resistor and a switching device, the switching device is connected in series with the second resistor, and the second resistor and the switching device are connected in parallel with the first resistor to form a voltage dividing resistor. When the switching device is turned off, the voltage dividing circuit has a first impedance upper limit threshold; when the switching device is turned on, the voltage dividing circuit has a second impedance upper limit threshold, and the second impedance upper limit threshold is smaller than the first impedance upper limit threshold.

In some other examples, the switching device includes, but is not limited to, a current mode controllable transistor and a voltage mode controllable transistor. The current mode controllable transistor may be a switch triode, and the voltage mode controllable transistor may be a switch field effect transistor.

The working process of the embodiment of the present application will be described in detail below with reference to FIG. 3 and FIG. 4 . 3 and 4 are schematic diagrams of wake-up detection circuits in different embodiments.

In the wake-up detection circuit 300 of FIG. 3 , the resistors R31 and R32 are examples of the first resistor and the second resistor respectively, R35 is an example of the third resistor, the P-type MOS transistor Q1 is an example of a switching device, and the resistors R31 and R32 form a The voltage dividing circuit of the first module 210 is used, and a micro control unit (Microcontroller Unit, MCU) is used as an example of the control unit 150. U31 is an example of the power supply voltage of the wake-up detection circuit 200, and U32 is an example of the power supply voltage of the MCU. P- is an example of the negative output terminal of the battery pack, and in this embodiment, P- is grounded.

Specifically, the wake-up detection circuit 300 wakes up the MCU with a falling edge, and there is a positive correlation between the wake-up voltage threshold and the impedance upper threshold Rth of the access impedance Ron, so when the access impedance Ron is smaller than the impedance upper threshold Rth, the MCU is awakened.

The terminal ON and the negative output terminal P- will be short-circuited by an access impedance Ron of a certain resistance. When the access impedance Ron is smaller than the upper impedance threshold Rth, the MCU receives the first signal MCU_ON3 and enters the wake-up state accordingly. When the access impedance Ron is greater than the impedance upper limit threshold Rth, the MCU is controlled by the third signal MCU_OFF3, and correspondingly enters a non-awake state, for example, a sleep state.

When the access impedance Ron is significantly greater than the upper impedance threshold Rth, the terminal ON and the negative output terminal P- are not short-circuited, and the MCU will receive a signal roughly indicating that the voltage is U31.

In one example, there is a ratio Uth/U31 between the wake-up voltage threshold Uth and U31, the voltage division ratio threshold has a ratio Rth/R _// , Rth is the impedance upper threshold, and R _// is the voltage division resistor. Specifically, Rth/(Rth+R _// )=Uth/U31. The corresponding R _// can be obtained by matching the appropriate resistance value of R31 and R32. In FIG. 3, when the MCU is in the wake-up state, Q1 is turned off, and the resistance of the voltage dividing resistor R _// is the resistance of R31. When the MCU enters the non-awake state from the wake-up state, the MCU sends a fourth signal to Q1, for example, the MCU outputs a low level MCU_ON_CTL3 through the pin, and turns on Q1 through the connection line between the pin and the gate of Q1. After Q1 is turned on, it is equivalent to using the parallel connection of R32 and R31 as a voltage dividing resistor R _// , so that the resistance value of the voltage dividing resistor R _// decreases. When the access impedance Ron is less than the impedance upper limit threshold Rth, the MCU recognizes that the voltage value of the MCU_ON3 signal is less than the wake-up voltage threshold Uth, and the MCU is woken up.

Correspondingly, after the MCU enters the wake-up state, the MCU outputs a second signal to Q1, specifically, the MCU outputs a high level MCU_OFF_CTL3 through the pin, and disconnects Q1 through the connection line between the pin and the gate of Q1. After Q1 is disconnected, the voltage dividing resistor R _// becomes larger. For a given voltage division ratio threshold, the impedance upper threshold Rth becomes larger correspondingly, but the access impedance Ron is still smaller than the impedance upper threshold Rth, and the MCU is still reliably kept in the wake-up state.

When the terminal ON and the negative output terminal P- are not short-circuited (for example, when the connector 160 is not installed on the electrical equipment), the access impedance Ron is still greater than the increased impedance upper limit threshold Rth, so the wake-up detection The circuit 300 generates a high-level third signal MCU_OFF3 to control the MCU to enter a non-wake-up state.

In addition, the above-mentioned Q1 is turned on or off through the driving signal MCU_ON_CTL3 or MCU_OFF_CTL3, and R35 is connected between the gate and source of Q1, which is conducive to generating a stable driving signal MCU_ON_CTL3 or MCU_OFF_CTL3.

In addition, the diode D1 can be used as an anti-reverse diode, for example, a Schottky diode, so as to prevent the large current of the wake-up line from flowing to the wake-up detection circuit.

More specifically, compared to the example in FIG. 1B , the power supply voltage of the wake-up detection circuit is 3.3V, and the voltage that triggers the wake-up of the MCU is 0.99V. Since the connection of Q1 makes the resistance of the voltage dividing resistor R _// smaller than R31, when the access impedance is 330KΩ, the voltage of the control signal is still greater than the wake-up voltage threshold, and the MCU will not be woken up. In other words, only when the resistance of the access impedance is less than 330KΩ and less than the corresponding impedance threshold Rth, so that the voltage of the control signal is less than the wake-up voltage threshold, the MCU will be woken up. After the MCU is woken up, Q1 is turned off, the resistance of the voltage dividing resistor R _// is adjusted back to the resistance value of R31, and the current passing through the wake-up detection circuit is reduced, which ensures the low power of the wake-up detection circuit after the MCU wakes up. consumption.

FIG. 4 is a schematic diagram of a wake-up detection circuit according to another embodiment of the present application. Resistors R41, R42, and R45 in the wake-up detection circuit 400 of FIG. 4 are examples of first resistors, second resistors, and third resistors, respectively, corresponding to resistors R31, R32, and R35 in the wake-up detection circuit 300 of FIG. 3 ; The control signals MCU_ON4 and MCU_OFF4 may respectively correspond to the control signals MCU_ON3 and MCU_OFF3 of the wake-up detection circuit 300; the control signals MCU_ON_CTL4 and MCU_OFF_CTL4 may respectively correspond to the control signals MCU_ON_CTL3 and MCU_OFF_CTL3 of the wake-up detection circuit 300; Q2 and D2 may respectively correspond to the wake-up detection circuit Q1 and D1; U41 and U42 of 300 may correspond to U31 and U32 of the wake-up detection circuit 300 respectively. For the relevant description and description of each part, refer to FIG. 3 , which will not be repeated here.

In an example, the wake-up detection circuit 400 may also be provided with a capacitor C1, which is an example of the second capacitor. One end of C1 is connected to the wake-up detection circuit, and the other end is grounded, which can bypass the AC component in the wake-up circuit, making the DC voltage of the control signals MCU_ON3 and MCU_OFF3 used to control the MCU more stable.

In another example, the wake-up detection circuit 400 can also be provided with a transient diode TVS1, one end of TVS1 is connected to the wake-up line, and the other end is connected to the ground, in other words, when C1 is provided, TVS1 and CI are in parallel state. The transient diode set in this way can prevent surge current from forming in the wake-up circuit, and protect the wake-up detection circuit and the MCU.

In another example, a filter circuit may also be provided between the output terminal of the wake-up detection circuit 400 and the input terminals of MCU_ON4 and MCU_OFF4 receiving the control signals of the MCU, so that the DC voltages of the control signals MCU_ON4 and MCU_OFF4 used to control the MCU are more stable. . For example, the filter circuit may include a capacitor C2 and a resistor R43, the capacitor C2 is an example of a first capacitor, and the resistor R43 is an example of a fifth resistor. One end of the capacitor C2 is connected to one end of the resistor R43, and both ends are connected to the input end of the MCU; the other end of the capacitor C2 is grounded, and the other end of the R43 is connected to the output end of the wake-up detection circuit 400 . The capacitor C2 and the resistor R43 set in this way form a low-pass filter circuit, which can filter the low-frequency AC component in the wake-up detection circuit, so as to make the DC voltage of the control signals MCU_ON_CTL4 and MCU_OFF_CTL4 more stable.

In another example, the wake-up detection circuit 400 can also be provided with a resistor R44. R44 is an example of a fourth resistor. One end of R44 is connected to the gate of Q2, and the other end is connected to the MCU for outputting the driving signals MCU_ON_CTL4 and MCU_OFF_CTL4. Pin, the resistance of R44 and the resistance of R45 are properly configured to further provide the turn-on voltage required for Q2 to be turned on, and R45 can increase the stable potential difference between the gate and the source to improve the turn-on/turn-off of Q2 Stability of the driving signal. In addition, R44 can increase the input impedance of the drive signals MCU_ON_CTL4 and MCU_OFF_CTL4 from the pins of the MCU chip, and reduce the influence of the surge current on the stability of the drive signal.

So far, specific embodiments of the subject matter have been described. Other implementations are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In certain implementations, multitasking and parallel processing may be advantageous.

It should also be noted that the term "comprises", "comprises" or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article, or apparatus comprising a set of elements includes not only those elements, but also includes Other elements not expressly listed, or elements inherent in the process, method, commodity, or apparatus are also included. Without further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article or apparatus comprising said element.

Each embodiment in this specification is described in a progressive manner, the same and similar parts of each embodiment can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and for relevant parts, refer to part of the description of the method embodiment.

The above descriptions are only examples of the present application, and are not intended to limit the present application. For those skilled in the art, various modifications and changes may occur in this application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the scope of the claims of the present application.

Claims

A wake-up detection circuit, comprising:

The first module is electrically connected to the access impedance and the control unit, and generates a first signal in response to the access impedance being less than the upper threshold of the access impedance, so that the control unit enters a wake-up state, wherein the access impedance The input impedance is configured to be electrically connected between the output terminal of the battery pack and the first module;

The second module is electrically connected to the first module and the control unit, and the second module receives the information sent by the control unit in response to the control unit entering the non-awake state or the control unit being in the non-awake state A fourth signal, the fourth signal is used to reduce the upper threshold of the access impedance.
The wake-up detection circuit according to claim 1, wherein the second module receives a second signal sent by the control unit in response to the control unit entering the wake-up state or the control unit being in the wake-up state, the first The second signal is used to increase the upper threshold of the access impedance.
The wake-up detection circuit according to claim 1 or 2, wherein the wake-up module generates a third signal in response to the access impedance being higher than the upper threshold of the access impedance, so that the control unit enters the non-awake state.
The wake-up detection circuit according to claim 1 or 2, wherein the first module includes a supply voltage input terminal and a voltage dividing circuit, and the voltage dividing circuit includes a voltage dividing resistor.
The wake-up detection circuit according to claim 4, wherein the voltage dividing resistor and the upper threshold of the access impedance form a voltage dividing ratio, and the voltage dividing ratio is determined based on the power supply voltage and the wake-up voltage threshold.
The wake-up detection circuit according to claim 4, wherein the fourth signal reduces the upper limit threshold by reducing the voltage dividing resistance.
The wake-up detection circuit according to any one of claims 4-6, wherein the second module includes a switching device,

Wherein, when the switching device is turned on, the voltage dividing resistor includes a first resistor and a second resistor, and the first resistor and the second resistor are connected in parallel,

Wherein, when the switching device is turned off, the voltage dividing resistor includes the first resistor.
The wake-up detection circuit according to claim 7, wherein the switch device includes a PMOS transistor, the gate of the PMOS transistor is connected to the control unit for receiving the fourth signal, and the fourth signal enables The PMOS transistor is turned on.
The wake-up detection circuit according to claim 8, wherein the source of the PMOS transistor and one end of the first resistor are connected to the supply voltage input terminal, and the drain of the PMOS transistor is connected to the second one end of the resistor.
The wake-up detection circuit according to claim 9, wherein the other ends of the first resistor and the second resistor are electrically connected between the access impedance and the control unit.
The wake-up detection circuit according to claim 9 or 10, wherein the second module includes a third resistor connected between the gate and the source of the PMOS transistor.
The wake-up detection circuit according to claim 11, wherein the second module further includes a fourth resistor, the fourth resistor is electrically connected between the control unit and the gate of the PMOS transistor, and the control A unit sends the fourth signal via the fourth resistor.
The wake-up detection circuit according to claim 1, further comprising: a fifth resistor and a first capacitor,

Wherein, the fifth resistor is electrically connected between the first module and the control unit, one end of the first capacitor is electrically connected between the fifth resistor and the control unit, and the first The other end of the capacitor is grounded.
The wake-up detection circuit according to claim 1, further comprising: a second capacitor, one end of the second capacitor is electrically connected to the first module, and the other end of the second capacitor is grounded.
The wake-up detection circuit according to claim 1, further comprising: a transient diode, one end of the transient diode is electrically connected to the first module, and the other end of the transient diode is grounded.
According to the wake-up detection circuit according to claim 1, the first module further includes an anti-reverse connection diode, the anode of the anti-reverse connection diode is connected to the first module, and the cathode of the anti-reverse connection diode is connected to the The input terminal of the wake-up detection circuit described above.
A wake-up detection circuit, comprising:

A voltage divider circuit, electrically connected to the access impedance and the control unit, the access impedance is configured to be electrically connected between the output terminal of the battery pack and the voltage divider circuit;

a switch device, electrically connected to the voltage dividing circuit and the control unit, and performs an on-off operation in response to a control signal of the control unit;

Wherein, when the switching device is turned on in response to the control signal of the control, the voltage divider circuit has a first resistance value, and when the switch device is turned off in response to the control signal of the control, the voltage divider circuit It has a second resistance value, and the first resistance value is smaller than the second resistance value.
The wake-up detection circuit according to claim 17, the voltage divider circuit includes a first resistor and a second resistor, the first resistor and the second resistor are connected in parallel, and the second resistor is also connected in series with the switching device .
The wake-up detection circuit according to claim 18, further comprising:

a power supply voltage input terminal, the switching device includes a PMOS;

The source of the PMOS and the first end of the first resistor are both electrically connected to the supply voltage input end, the drain of the PMOS is electrically connected to the first end of the second resistor, and the PMOS The gate is electrically connected to the control unit, and the second end of the first resistor and the second end of the second resistor are electrically connected to the control unit.
The wake-up detection circuit according to claim 18 or 19, wherein, when the switching device is turned on, the voltage dividing circuit includes the first resistor and the second resistor, and the first resistor and the second resistor The two resistors are connected in parallel.
The wake-up detection circuit according to claim 18 or 19, wherein when the switching device is turned off, the voltage dividing circuit includes the first resistor.
The wake-up detection circuit according to claim 19, further comprising:

A third resistor, the third resistor is connected between the gate and the source of the PMOS transistor.
The wake-up detection circuit according to claim 22, further comprising:

A fourth resistor, the fourth resistor is electrically connected between the control unit and the gate of the PMOS transistor.
The wake-up detection circuit according to claim 17, further comprising:

a fifth resistor and a first capacitor;

Wherein the fifth resistor is electrically connected between the voltage divider circuit and the control unit, one end of the first capacitor is electrically connected between the fifth resistor and the control unit, and the first capacitor The other end of the ground.
The wake-up detection circuit according to claim 17, further comprising:

A second capacitor, one end of the second capacitor is electrically connected to the voltage dividing circuit, and the other end of the second capacitor is grounded.
The wake-up detection circuit according to claim 17, further comprising:

A transient diode, one end of the transient diode is electrically connected to the voltage dividing circuit, and the other end of the transient diode is grounded.
The wake-up detection circuit according to claim 17, further comprising:

An anti-reverse connection diode, the anode of the anti-reverse connection diode is connected to the voltage dividing circuit, and the cathode of the anti-reverse connection diode is connected to the input terminal of the wake-up detection circuit.
A battery management system comprising:

The wake-up detection circuit according to any one of claims 1-27.
A battery pack comprising:

A cell module, including at least one cell;

The battery management system of claim 28,

Wherein, the battery management system is electrically connected to the battery module.