WO2023109314A1 - Recognition circuit, battery management system, battery pack, and electronic device - Google Patents

Abstract

Embodiments of the present application provide a recognition circuit, a battery management system, a battery pack, and an electronic device. The recognition circuit is configured to be connected to a load circuit, and further comprises a voltage division module and a signal generation module; the voltage division module is configured to divide a voltage input to the voltage division module; the signal generation module is connected to the voltage division module; and the signal generation module is configured to receive the voltage output by the voltage division module and generate an on-off signal for indicating on or off of a load circuit. According to the solution, a circuit structure of battery management can be simpler.

Description

Identification circuits, battery management systems, battery packs and electronic devices

This application claims the priority of a Chinese invention patent application with an application date of December 14, 2021, an application number of "202111524709.8", and a patent title of "identification circuit, battery management system, battery pack and electronic device". This is incorporated by reference.

technical field

The embodiments of the present application relate to the technical field of electrical engineering, and in particular to an identification circuit, a battery management system, a battery pack, and an electronic device.

Background technique

The battery management system (Battery Management System, BMS) can monitor the state of the battery, and then intelligently manage and maintain each battery unit, prevent the battery from overcharging and overdischarging, and prolong the service life of the battery. During the working process of the battery management system, it is necessary to identify the conduction and disconnection of the load circuit, and then manage the battery according to the conduction or disconnection of the load circuit.

At present, the battery management system is connected to an external load circuit. When the load circuit is turned on or off, the load circuit will send a corresponding electrical signal to the battery management system, and then the battery management system can determine the load circuit according to the received electrical signal. on or off.

However, when multiple load circuits are included, each load circuit is connected to an identification circuit in the battery management system, and the identification circuit detects the electrical signal of the connected load circuit, since the battery management system includes a large number of identification circuits , leading to a more complex circuit structure of the battery management system.

Contents of the invention

In view of this, embodiments of the present application provide an identification circuit, a battery management system, a battery pack, and an electronic device to at least partly solve the above problems.

According to the first aspect of the embodiments of the present application, there is provided an identification circuit configured to be connected to a load circuit, and further comprising: a voltage dividing module and a signal generating module; the voltage dividing module is configured to The voltage input to the voltage dividing module is divided; the signal generating module is connected to the voltage dividing module, the signal generating module is configured to receive the voltage output by the voltage dividing module, and generate a signal for indicating the load An on-off signal that turns a circuit on or off.

In a first possible implementation manner, in combination with the first aspect above, the signal generation module includes N NMOS transistors, the N NMOS transistors are coupled in series, and N is a natural number greater than 2; the N NMOS transistors When at least one of the following conditions is met, the signal generation module generates an on-off signal for indicating that the load circuit is turned on or off: (i) the combinations of the voltage values of the source outputs of the N NMOS transistors are different; (ii) The conduction states of the N NMOS transistors have different combinations.

In a second possible implementation manner, in combination with the first possible implementation manner above, the signal generation module further includes a first power supply and a first resistor, and the drain of the first NMOS transistor among the N NMOS transistors The pole is connected to the output end of the voltage divider module, the gate of the first NMOS transistor is connected to the first end of the first resistor, and the second end of the first resistor is connected to the first end of the first resistor. The source of the i-th NMOS transistor in the N NMOS transistors is connected to the grid of the i+1th NMOS transistor, and the drain of the i-th NMOS transistor is connected to the drain of the i+1th NMOS transistor. The poles are connected, where i is a positive integer less than N.

In a third possible implementation manner, in combination with the first aspect above, the voltage dividing module is configured to be connected to at least two load circuits through one pin of an electrical connector.

In the fourth possible implementation manner, in combination with the first possible implementation manner above, when the combinations of the voltage values output by the sources of the N NMOS transistors are different, the signal generating module generates An on-off signal for on or off, wherein the signal generation module is further configured to: in response to the N NMOS transistors being in an off state, the signal generation module generates a signal for indicating that the load circuit is disconnected.

In a fifth possible implementation manner, in combination with the first possible implementation manner above, the voltage value output by the source of at least one of the NMOS transistors is located in at least two value ranges where there is no intersection, which is used to indicate different The load circuit is turned on.

In a sixth possible implementation, in combination with the second possible implementation above, the signal generating module further includes: N matching modules, each of which includes a resistor or at least two resistors connected in series ; The source of each NMOS transistor in the N NMOS transistors is connected to the first end of one of the matching modules; the second ends of the N matching modules are used to connect with the negative pole of the battery module connect.

According to the second aspect of the embodiments of the present application, there is provided a battery management system, including: an electrical connector, a control module, and the identification circuit provided by the above-mentioned first aspect or any possible implementation of the first aspect, the identification A circuit is connected to the electrical connector, the electrical connector is configured to be connected to a load circuit, the control module is connected to the identification circuit, and the control module is configured to The on-off signal determines whether the load circuit is turned on or off.

In a first possible implementation manner, in combination with the second aspect above, the control module is configured to combine the voltage values output by the sources of the N NMOS transistors in the identification circuit, and/or, according to the identification The combination of the conduction states of N NMOS transistors in the circuit determines whether the load circuit is turned on or off.

In the second possible implementation manner, in combination with the first possible implementation manner above, the control module is respectively connected to the sources of the N NMOS transistors, and the control module is used to The combination of the source output voltage values of the tubes determines whether the load circuit is turned on or off.

According to a third aspect of the embodiments of the present application, a battery pack is provided, including: a battery module and the battery management system provided in the second aspect above or any possible implementation of the second aspect above, the battery The module is connected with the battery management system and supplies power to the battery management system.

According to a fourth aspect of the embodiments of the present application, an electronic device is provided, including: a load circuit and the battery pack provided in the third aspect above; the load circuit is connected to the battery pack, and the battery pack is used to supply The load circuit supplies power.

In a first possible implementation manner, in combination with the fourth aspect above, the load circuit includes at least two load circuits, and each of the load circuits has a different resistance value.

In a second possible implementation manner, in combination with the fourth aspect above, the positive pole of the battery module is used to connect to the load circuit, and the load circuit is connected to the branch through a pin of the electrical connector. The pressure module is connected.

According to the on-off identification scheme of the load circuit provided in the embodiment of the present application, the identification circuit is configured to be connected to the load circuit, the identification circuit includes a voltage dividing module and a signal generating module, and the voltage dividing module is configured to monitor the voltage input to the voltage dividing module For voltage division, the signal generating module is connected with the voltage dividing module, and the signal generating module is configured to receive the voltage output by the voltage dividing module, and generate an on-off signal for instructing the load circuit to be turned on or off. When different load circuits are turned on, the voltage divider module will input different voltages to the signal generation module, so that the signal generation module can generate an on-off signal indicating that the load circuit is turned on or off based on the voltage output by the voltage divider module, and then can be based on the on-off signal. The on-off signal determines whether the load circuit is turned on or off, so the on-off state of multiple load circuits can be identified through one identification circuit, and the number of identification circuits in the battery management system is reduced, so that the battery management system can The circuit structure is simpler.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only These are some embodiments described in the embodiments of this application, and those skilled in the art can also obtain other drawings based on these drawings.

Fig. 1 is a schematic block diagram of a load circuit on-off identification system according to an embodiment of the present application;

Fig. 2 is a schematic block diagram of an identification circuit of an embodiment of the present application;

Fig. 3 is a schematic diagram of an identification circuit of an embodiment of the present application;

FIG. 4 is a schematic diagram of an identification circuit according to another embodiment of the present application;

Fig. 5 is a schematic block diagram of a battery management system according to an embodiment of the present application;

Fig. 6 is a schematic block diagram of a battery pack according to an embodiment of the present application;

Fig. 7 is a schematic block diagram of an electronic device according to an embodiment of the present application.

Detailed ways

In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and detailedly described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described The embodiments are only some of the embodiments of the present application, but not all of them. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments in the embodiments of the present application shall fall within the protection scope of the embodiments of the present application.

The specific implementation of the embodiments of the present application will be further described below in conjunction with the accompanying drawings.

With the development of battery technology, lithium iron phosphate batteries, lithium manganese oxide batteries, lead-acid batteries, etc. can be used as energy storage batteries. Energy storage batteries have been widely used in various scenarios, and can be used as power batteries in electrical equipment involving electric tools, electric bicycles, electric motorcycles, and energy storage systems.

Energy storage batteries can supply power to electrical equipment in the form of battery packs. The battery management system can monitor the battery packs in different application scenarios, manage the charging and discharging of the battery packs, and improve the efficiency and service life of the battery packs. Specifically, the battery management system can perform control management such as battery status monitoring, battery status analysis, battery safety protection, and battery information management.

In an application scenario of the battery management system, the battery module is connected to multiple load circuits to supply power to each load circuit, each load circuit is connected to the battery management system, and the battery management system detects the on-off of each load circuit State, and then control and manage the battery module according to the on-off state of each load circuit. Each load circuit includes a switch for controlling on-off of the load circuit. When the switch is closed, the load circuit is turned on, and when the switch is turned off, the load circuit is disconnected.

Fig. 1 shows a schematic block diagram of a load circuit on-off identification system. As shown in FIG. 1 , the input terminals of multiple load circuits 110 are respectively connected to the output terminals of the cell module 120, and the output terminals of each load circuit 110 are connected to the input terminals of the battery management system 130, and the battery management system 130 The output end of the battery cell module 120 is connected to the input end. The battery management system 130 includes an electrical connector 131 and multiple identification circuits 132, the output end of each load circuit 110 is connected to a pin in the electrical connector 131, and different load circuits 110 are connected to different pins, Each pin connected to the load circuit 110 is connected to one identification circuit 132 , and different identification circuits 132 are connected to different pins. Each load circuit 110 is simplified as a switch S and an equivalent resistance R connected in series. When the switch S is closed, the load circuit 110 is turned on, and the resistance value of the equivalent resistance R is equal to the distance between the input end and the output end when the load circuit 110 is turned on. resistance.

Since each load circuit 110 is connected to an identification circuit 132 through a pin in the electrical connector 131, when the switch S in a load circuit 110 is closed and the load circuit 110 is turned on, it is connected to the load circuit 110 The identification circuit 132 of the identification circuit will receive the electrical signal, and then according to the electrical signal received by the identification circuit 132, it can be determined that the load circuit 110 connected to the identification circuit 132 has been turned on, that is, the load circuit connected to the identification circuit 132 The switch S in 110 is closed.

Limited by the size of the printed circuit board (PCB) and the number of control chip pins, the pins of the electrical connector 131 in the battery management system 130 are precious resources, and currently each load circuit 110 needs to pass through the electrical connector. One pin in 131 is connected to the battery management system 130 , and multiple pins in the electrical connector 131 need to be occupied when there are multiple load circuits 110 . In addition, each identification circuit 132 is connected to one load circuit 110. When there are multiple load circuits 110, the battery management system 130 includes a plurality of identification circuits 132, resulting in a complicated circuit structure of the battery management system 130, which in turn leads to battery management problems. The cost of system 130 is relatively high. Therefore, there is an urgent need for a related technical solution of the battery management system, which can identify the conduction or disconnection of the load circuit through the battery management system with a simpler circuit structure, and can reduce the number of pins occupied by the connector.

Identification circuit

Fig. 2 is a schematic block diagram of an identification circuit according to an embodiment of the present application. As shown in FIG. 2, the battery management system 210 includes an electrical connector 211, which is used to connect the load circuit 220. When the load circuit 220 is turned on by at least one switch S, the output voltage of the load circuit 220 is input to the battery management system. In the system 210, different load circuits 220 have different resistance values when they are turned on. The identification circuit 212 in the battery management system 210 includes: a voltage dividing module 2121 and a signal generating module 2122;

The voltage dividing module 2121 is connected to the load circuit 220 through the electrical connector 211, and the voltage dividing module 2121 is configured to divide the voltage input to the voltage dividing module 2121;

The signal generating module 2122 is connected to the voltage dividing module 2121, and the signal generating module 2122 is configured to receive the voltage output by the voltage dividing module 2121, and generate an on-off signal for instructing the load circuit 220 to be turned on or off.

The output terminals of the cell module 230 are respectively connected to the input terminals of each load circuit 220 , and the output terminals of each load circuit 220 are connected to the electrical connector 211 . When the switch in a load circuit 220 is closed, the load circuit 220 is turned on, the load circuit 220, the battery module 230 and the battery management system 210 form a loop, the battery module 230 supplies power to the load circuit 220, the The load circuit 220 outputs a voltage to the battery management system 210 . Since different load circuits 220 may have different resistance values when they are turned on, different voltages will be input to the battery management system 210 after different load circuits 220 are turned on, and then the battery management system 210 may determine the voltage based on the voltage input by the load circuit 220. The turned-on load circuits 220 determine whether each load circuit 220 is turned on or off.

The load circuit 220 includes a switch S and various components. In the embodiment of the present application, the load circuit 220 can have a voltage dividing function, so the load circuit 220 can be simplified as a switch S and a resistor R connected in series. The resistor R in a load circuit 220 The resistance value is equal to the resistance value between the input terminal and the output terminal of the load circuit 220 when the load circuit 220 is turned on.

The voltage divider module 2121 and the turned-on load circuit 220 divide the output voltage of the cell module 230. The voltage divider module 2121 can be a resistor, multiple resistors connected in series or multiple resistors connected in parallel. The voltage divider module The resistance value of 2121 is determined according to the output voltage of the cell module 230, the equivalent resistance of each load circuit 220, etc., to ensure that when different load circuits are turned on, the combination of the voltage value output by the source of each NMOS transistor is different, or each The combinations of the conduction states of the NMOS transistors are different.

In the embodiment of the present application, the identification circuit is configured to be connected to the load circuit, the identification circuit includes a voltage division module and a signal generation module, the voltage division module is configured to divide the voltage input to the voltage division module, and the signal generation module Connected with the voltage dividing module, the signal generating module is configured to receive the voltage output by the voltage dividing module, and generate an on-off signal for instructing the load circuit to be turned on or off. When different load circuits are turned on, the voltage divider module will input different voltages to the signal generation module, so that the signal generation module can generate an on-off signal indicating that the load circuit is turned on or off based on the voltage output by the voltage divider module, and then can be based on the on-off signal. The on-off signal determines whether the load circuit is turned on or off, so the on-off state of multiple load circuits can be identified through one identification circuit, and the number of identification circuits in the battery management system is reduced, so that the battery management system can The circuit structure is simpler.

In a possible implementation manner, the signal generation module includes N NMOS transistors, the N NMOS transistors are coupled in series, and N is a natural number greater than 2. When the N NMOS transistors meet at least one of the following conditions, the signal generation module generates an on-off signal for indicating that the load circuit is turned on or off:

(i) The combinations of voltage values output by the sources of the N NMOS transistors are different;

(ii) The conduction states of the N NMOS transistors have different combinations.

When different load circuits are turned on, the combination of the source output voltage values of N NMOS transistors is different, which means that when any two load circuits are turned on respectively, there is at least one NMOS transistor among the N NMOS transistors, and the NMOS transistor The voltage values output by the source of the tube are different when the two load circuits are turned on respectively. When different load circuits are turned on, the combination of the conduction states of the N NMOS transistors is different, which means that when any two load circuits are respectively turned on, there is at least one NMOS transistor among the N NMOS transistors. The conduction states of the two load circuits are different when they are respectively turned on, and the conduction state of the NMOS transistor includes working in a saturation region, a variable resistance region or a cut-off region.

The signal generation module can use the combination of the voltage values output by the sources of N NMOS transistors as the on-off signal, or can use the combination of the conduction states of the N NMOS transistors as the on-off signal, or it can also use the N NMOS transistors at the same time The combination of the voltage value output by the source of the transistor and the combination of the conduction states of the N NMOS transistors is used as the on-off signal.

In the embodiment of the present application, the signal generation module adjusts the voltage output by the voltage divider module through N NMOS transistors. When different load circuits are turned on, the combinations of the voltage values output by the sources of the N NMOS transistors are different, or The combination of the conduction states of the N NMOS transistors is different, so that the combination of the voltage values output by the sources of the N NMOS transistors or the combination of the conduction states of the N NMOS transistors can be used as the on-off signal, and then according to the N NMOS transistors The source output voltage value of the tube or the conduction state of the N NMOS transistors determine the conduction or disconnection of each load circuit, so that the identification of the on-off state of multiple load circuits is realized through one identification circuit.

Fig. 3 is a schematic diagram of an identification circuit provided by another embodiment of the present application. As shown in FIG. 3 , the signal generating module 2122 includes a first power supply E1 , a first resistor R1 and N NMOS transistors, the N NMOS transistors are connected in series, and N is a natural number greater than 2. For ease of description, the voltage divider module including one resistor, multiple resistors connected in series or multiple resistors connected in parallel is equivalent to a voltage divider resistor R2, and the turned-on load circuit is equivalent to a resistor R3, different The resistors R3 corresponding to the load circuits have different resistance values, and the non-conductive load circuits are omitted in FIG. 3 . Among the N NMOS transistors, the drain of the first NMOS transistor _M1 is connected to the output end of the voltage dividing resistor R2, the gate of the first NMOS transistor _M1 is connected to the first end of the first resistor R1, and the first The second end of the resistor R1 is connected to the first power supply E1. The source of the i-th NMOS transistor M _i is connected to the gate of the i+1-th NMOS transistor M _i+1 , and the drain of the i-th NMOS transistor M _i is connected to the drain of the i+1-th NMOS transistor M _i+1 , wherein i is a positive integer less than N. When different load circuits are turned on, the combinations of the voltage values output by the sources of the N NMOS transistors are different or the combinations of the conduction states of the N NMOS transistors are different, so that the voltage values output by the sources of the N NMOS transistors are different. A combination or a combination of the conduction states of N NMOS transistors is used as an on-off signal.

In the embodiment of the present application, the signal generation module 2122 includes N NMOS transistors, the gate of the first NMOS transistor _M1 is connected to the first power supply E1 through the first resistor R1, and the voltage output by the voltage dividing resistor R2 is input to the first The drain of the NMOS transistor M ₁ , the source of the i-th NMOS transistor _Mi is connected to the gate of the i+1 NMOS transistor _Mi+1 , the drain of the i-th NMOS transistor _Mi is connected to the i+1th NMOS transistor _Mi The drain of ₊₁ is connected. Since each NMOS transistor can be in the saturation region, the variable resistance region or the cut-off region, it is guaranteed that when different load circuits are turned on and the voltage dividing resistor R2 outputs different voltages, the combination of the voltage value output by the source of each NMOS transistor is different. Or the combination of the conduction state of each NMOS transistor is different, and then the load circuit to be turned on can be determined according to the voltage value output by the source of each NMOS transistor or the conduction state of each NMOS transistor, so as to ensure the identification of the on-off state of the load circuit accuracy.

Since the output voltage of the battery module E2 will gradually decrease during the working process, the voltage output by the voltage dividing resistor R2 is adjusted through N NMOS tubes coupled in series to ensure that when the battery module E2 outputs different voltages, After different load circuits are turned on, the voltage value output by the source of each NMOS transistor still has a different combination or the conduction state of each NMOS transistor still maintains the original combination. If the signal generation module 2122 is not used, the split The voltage at both ends of the piezoresistor R2 determines the load circuit that is turned on, and when the output voltage of the cell module E2 changes, there are different load circuits that are turned on and the voltages at both ends of the voltage dividing resistor R2 are roughly close to each other, so it is impossible to accurately identify which A condition in which a load circuit is turned on. Therefore, the voltage output by the voltage dividing resistor R2 is adjusted by N NMOS transistors coupled in series, and each load circuit is determined according to the combination of the voltage value output by the source of each NMOS transistor or the combination of the conduction state of each NMOS transistor. The conduction or disconnection of the load circuit ensures the accuracy of the on-off identification of the load circuit.

In a possible implementation manner, as shown in FIG. 3 , when different load circuits are turned on, the combinations of the conduction states of the N series-coupled NMOS transistors are different.

The voltage difference between the gate G of the NMOS transistor and the source S is V _gs , the voltage difference between the drain D of the NMOS transistor and the source S is V _ds , and the turn-on voltage of the NMOS transistor is V _th , when V _gs >V _th and V _ds >V _gs -V _th , the NMOS transistor is in the saturation region, when V _gs >V _th and V _ds <V _gs -V _th , the NMOS transistor is in the variable resistance region, when V _gs <V _th , the NMOS tube is in the cut-off region. When the NMOS transistor is in different conduction states, the voltage value of the source output of the NMOS transistor is different, that is, the voltage value of the source output of the NMOS transistor is different when it is in the saturation region, the variable resistance region and the cut-off region. When different load circuits are turned on, the combination of the conduction states of the N NMOS transistors is different, and the voltage output from the source is different when the NMOS transistors are in different conduction states, so according to the source output voltage value of each NMOS transistor The combination of or the combination of the conduction states of each NMOS transistor can accurately determine the conduction load circuit.

In addition, for any load circuit, when the load circuit is turned on and the output voltage of the cell module changes within a predetermined range, the combination of the conduction states of each NMOS transistor remains unchanged. For example, the signal generation module includes two NMOS transistors. When the output voltage of the cell module is Vmin, the two NMOS transistors are in the saturation region after the first load circuit is turned on. Then when the output voltage of the cell module is Vmax , the two NMOS transistors are still in the saturation region after the first load circuit is turned on. When the output voltage of the battery module changes within a predetermined range, the combination of the conduction states of each NMOS transistor after the same load circuit is turned on remains unchanged, ensuring that the result of identifying the on-off state of the load circuit is not affected by the battery module. The influence of the group output voltage can improve the timeliness of identifying the on-off state of the load circuit.

In a possible implementation manner, as shown in FIG. 2 and FIG. 3 , the voltage dividing module 2121 is configured to be connected to each load circuit 220 through a pin of the electrical connector 211 .

Since different load circuits 220 have different resistance values when they are turned on, when different load circuits 220 are turned on, the voltage value delivered by the voltage divider module 2121 to the signal generation module 2122 is different, so that the source outputs of the N NMOS transistors are The combination of voltage values or the combination of conduction states of N NMOS transistors is different, and then according to the combination of voltage values output by the source of N NMOS transistors or the combination of conduction states of N NMOS transistors, the load that is turned on is determined circuit 220, so the voltage divider module 2121 can be connected to each load circuit 220 through a pin of the electrical connector 211, thereby reducing the number of pins used in the electrical connector 211.

In a possible implementation manner, as shown in FIG. 3 , when the identification circuit includes N NMOS transistors coupled in series, the number of load circuits is less than or equal to 3 ^N −1 .

In order to ensure that the on-off state of each load circuit can be accurately identified, when different load circuits are turned on, the combinations of the conduction states of the N series-coupled NMOS transistors are different, and the conduction states of the N series-coupled NMOS transistors are different. There are 3 ^N combinations, one of which corresponds to the case where each load circuit is disconnected. For example, N NMOS tubes connected in series are all in the cut-off region, corresponding to the case where each load circuit is disconnected, so the number of load circuits Less than or equal to 3 ^N -1, so that when different load circuits are turned on, they can correspond to different combinations of the conduction states of each NMOS transistor, so that when different load circuits are turned on, the combinations of the source output voltage values of each NMOS transistor are different. It is ensured that the on-off load circuit can be accurately determined according to the voltage value output by the source of each NMOS transistor, thereby ensuring the accuracy of identifying the on-off of the load circuit.

In a possible implementation manner, when all load circuits are disconnected, all N NMOS transistors are in a cut-off state.

When each load circuit is in the disconnected state, the electronic equipment is usually in a non-conducting state. At this time, the N NMOS transistors included in the identification circuit are all in a cut-off state, so that the identification circuit has a small energy consumption, thereby reducing the power consumption of the electronic equipment. Energy consumption in a non-conducting state, prolonging the standby time of electronic equipment.

In a possible implementation, when the NMOS transistor is in the variable resistance region, the channel of the NMOS transistor is equivalent to a conductor with a fixed resistance value, and the voltage difference between the drain D and the source S of the NMOS transistor V _ds As the voltage difference V _gs between the gate G and the source S varies linearly, the NMOS transistor in the variable resistance region can output different voltage values from the source. Therefore, when different load circuits are turned on, the combination of the conduction states of the N NMOS transistors can be the same or different. When the combination of the conduction states of the N NMOS transistors is the same, it can further pass the The value ranges of the source output voltage values of the NMOS transistors are different when different load circuits are turned on, so that the turned-on load circuit can be determined according to the value ranges of the source output voltages of each NMOS transistor.

For example, when the first load circuit or the second load circuit is turned on, the first NMOS transistor and the second NMOS transistor included in the identification circuit are respectively in the saturation region and the variable resistance region, and the source of the first NMOS transistor in the saturation region The output voltage value is a fixed value, but when the first load circuit is turned on, the voltage value output by the source of the second NMOS transistor in the variable resistance area is within the first value range, and when the second load circuit is turned on When it is turned on, the voltage value output by the source of the second NMOS transistor in the variable resistance region is within the second value range, and the first value range does not overlap with the second value range, so that the first NMOS transistor can be judged On the basis of the conduction states of the first NMOS transistor and the second NMOS transistor, the load circuit that is turned on is further determined according to the value range of the source output voltage values of the first NMOS transistor and the second NMOS transistor. It can be understood that this example is only used for illustrative description and understanding of the embodiment of the present application, but not as a limitation to the embodiment of the present application.

In the embodiment of the present application, when different load circuits are turned on, the voltage value of the source output of at least one NMOS transistor is located in at least two value ranges where there is no intersection, so that when different load circuits are turned on, each NMOS The tubes can be in the same combination of conduction states, and the voltage value output from the source when different load circuits are turned on through the NMOS tube can be further located in the two value ranges where there is no intersection. At this time, it can be judged that each NMOS On the basis of the conduction state of each NMOS transistor, the load circuit that is turned on is further determined according to the value range of the source output voltage value of each NMOS transistor. Since the combination of the conduction states of each NMOS transistor is the same, the load circuit that is turned on can be determined according to the value range of the source output voltage value of the NMOS transistor in the variable resistance area, so the number of load circuits can be is greater than 3 ^N -1 , so that the on or off of more load circuits can be identified through the identification circuit including fewer NMOS transistors, so the cost of the battery management system can be reduced.

In a possible implementation manner, the signal generating module further includes N matching modules, and each matching module includes a resistor or at least two resistors connected in series. The source of each NMOS transistor is connected to the first end of a matching module, the sources of different NMOS transistors are connected to different matching modules, and the second end of each matching module is used to connect with the negative electrode of the cell module The positive electrode of the cell module is connected to the first end of each load circuit, and the second end of each load circuit is connected to the electrical connector. As shown in FIG. 3 , in order to describe and show the internal structure of the signal generating module 2122 , the matching module is simplified as a matching resistor R4, and the matching resistors R4 connected to the sources of different NMOS transistors have the same or different resistance values.

The source of each NMOS transistor is connected to the first end of a matching resistor R4, and the second end of the matching resistor R4 is connected to the negative electrode of the cell module E2. When an NMOS transistor is in the saturation region or variable resistance region , the current output from the source of the NMOS transistor returns to the negative pole of the cell module E2 through the connected matching resistor R4, forming a complete loop. The switching conditions of each NMOS transistor's conduction state can be adjusted by matching resistor R4, so that each NMOS transistor can work according to a predetermined combination of conduction states when different load circuits are turned on, thereby ensuring the voltage value output by the source of each NMOS transistor , can accurately identify the conduction or disconnection of each load circuit.

It should be noted that, in the identification circuit shown in FIG. 3 , the N series-coupled NMOS transistors may be NMOS transistors of the same type, or NMOS transistors of different types. In addition, the voltage regulating circuit can also be realized by a plurality of PMOS transistors, or can be realized by a combination of NMOS transistors and PMOS transistors.

The identification circuit provided by the embodiment of the present application will be described in detail below by taking the signal generation module including two NMOS transistors and identifying the on-off of three load circuits as an example.

Fig. 4 is a schematic diagram of an identification circuit provided by another embodiment of the present application. As shown in Figure 4, the signal generating module 2122 includes a first power supply E1, a first resistor R1, an NMOS transistor _M1 , an NMOS transistor _M2 , a first matching resistor R41 and a second matching resistor R42, and the voltage dividing module includes a voltage dividing resistor R2, the load circuit that conducts is equivalent to resistance R3.

The positive electrode of the cell module E2 is connected to the input terminal of the resistor R3, the output terminal of the resistor R3 is connected to the input terminal of the voltage dividing resistor R2 through a pin of the electrical connector, and the output terminal of the voltage dividing resistor R2 is connected to the NMOS tube The drain of _M1 is connected, the source of NMOS transistor _M1 is connected to the input end of the first matching resistor R41, and the output end of the first matching resistor R41 is connected to the negative electrode of the cell module E2. The gate of the NMOS transistor _M2 is connected to the source of the NMOS transistor _M1 , the drain of the NMOS transistor _M2 is connected to the drain of the NMOS transistor _M1 , and the source of the NMOS transistor _M2 is connected to the second matching resistor R42 The input ends are connected, and the output end of the second matching resistor R42 is connected to the negative electrode of the cell module E2. The negative pole of the first power supply E1 is grounded, the positive pole of the first power supply E1 is connected to the input terminal of the first resistor R1, and the output terminal of the first resistor R1 is connected to the gate of the NMOS transistor _M1 .

In a specific embodiment of the present application, the resistance value of the resistor R3 is 10KΩ when the load circuit 1 is turned on, the resistance value of the resistor R3 is 200KΩ when the load circuit 2 is turned on, and the resistance value of the resistor R3 is 200KΩ when the load circuit 3 is turned on is 2MΩ. The resistance value of the voltage dividing resistor R2 is 120KΩ. The output voltage range of the cell module E2 is 18V-25.2V. The output voltage of the first power supply E1 is 3.3V, and the resistance value of the first resistor R1 is 100KΩ. Both the turn-on voltage V _th of the NMOS transistor M ₁ and the NMOS transistor M ₂ are 1.3V. The resistance value of the first matching resistor R41 is 51KΩ, and the resistance value of the second matching resistor R42 is 15KΩ.

(1) When load circuit 1 is on and load circuit 2 and load circuit 3 are disconnected

When the output voltage of the cell module E2 is 18V, the voltage difference between the gate and the source of the NMOS transistor _M1 is V _gs = 1.4V, and the voltage difference between the drain and the source of the NMOS transistor _M1 is V _ds = 5V , V _gs >V _th and V _ds >V _gs −V _th are satisfied, so the NMOS transistor M ₁ is in the saturation region, and the voltage value ADC1=2V output by the source of the NMOS transistor M ₁ . V _gs = 1.4V, V _ds = 6.4V on the NMOS transistor M ₂ , satisfying V _gs > V _th and V _ds > V _gs -V _th , so the NMOS transistor M ₂ is in the saturation region, and the source output of the NMOS transistor M ₂ The voltage value ADC2=0.68V.

When the output voltage of the cell module E2 is 25.2V, V _gs = 1.4V and V _ds = 12V on the NMOS transistor M ₁ , satisfying V _gs >V _th and V _ds >V _gs -V _th , so the NMOS transistor M ₁ In the saturation region, the voltage value ADC1=2V output by the source of the NMOS transistor _M1 . V _gs = 1.4V, V _ds = 13.4V on the NMOS transistor M ₂ , satisfying V _gs > V _th and V _ds > V _gs -V _th , so the NMOS transistor M ₂ is in the saturation region, and the source output of the NMOS transistor M ₂ The voltage value ADC2=0.68V.

(2) When load circuit 2 is on and load circuit 1 and load circuit 3 are disconnected

When the output voltage of the cell module E2 is 18V, V _gs = 1.7V, V _ds = 0V on the NMOS transistor M ₁ , satisfying V _gs > V _th and V _ds < V _gs -V _th , so the NMOS transistor M ₁ is in In the variable resistance area, the voltage value ADC1=1.6V output by the source of the NMOS transistor _M1 . V _gs = 1.4V, V _ds = 1.3V on the NMOS transistor M ₂ , satisfying V _gs > V _th and V _ds > V _gs -V _th , so the NMOS transistor M ₂ is in the saturation region, and the source output of the NMOS transistor M ₂ The voltage value ADC2=0.3V.

When the output voltage of the cell module E2 is 25.2V, V _gs = 1.45V, V _ds = 0V on the NMOS transistor M ₁ , satisfying V _gs > V _th and V _ds < V _gs -V _th , so the NMOS transistor M ₁ In the variable resistance region, the voltage value ADC1=1.85V output by the source of the NMOS transistor _M1 . V _gs = 1.4V, V _ds = 1.3V on the NMOS transistor M ₂ , satisfying V _gs > V _th and V _ds > V _gs -V _th , so the NMOS transistor M ₂ is in the saturation region, and the source output of the NMOS transistor M ₂ The voltage value ADC2=0.55V.

(3) When the load circuit 3 is turned on, and the load circuit 1 and the load circuit 2 are disconnected

When the output voltage of the cell module E2 is 18V, V _gs = 2.85V and V _ds = 0V on the NMOS transistor M ₁ , satisfying V _gs > V _th and V _ds < V _gs -V _th , so the NMOS transistor M ₁ is at In the variable resistance area, the voltage value ADC1=0.43V output by the source of the NMOS transistor _M1 . V _gs =0.45V and V _ds =0.45V on the NMOS transistor M ₂ , satisfying V _gs <V _th , so the NMOS transistor M ₂ is in the cut-off region, and the voltage value ADC2=0V output by the source of the NMOS transistor M ₂ .

When the output voltage of the cell module E2 is 25.2V, V _gs = 2.7V, V _ds = 0V on the NMOS transistor M ₁ , satisfying V _gs > V _th and V _ds < V _gs -V _th , so the NMOS transistor M ₁ In the variable resistance area, the voltage value ADC1=0.6V output by the source of the NMOS transistor _M1 . V _gs =0.6V and V _ds =0.6V on the NMOS transistor M ₂ , satisfying V _gs <V _th , so the NMOS transistor M ₂ is in the cut-off region, and the voltage value ADC2=0V output by the source of the NMOS transistor M ₂ .

It can be seen from the above data that under the premise that the output voltage of the cell module E2 fluctuates between 18V and 25.2V, when the load circuit 1 is turned on, the NMOS transistor M ₁ and the NMOS transistor M ₂ are both in the saturation region, and when the load circuit 2 is turned on, the NMOS transistor M 2 is in the saturation region. The tube _M1 is in the variable resistance area, and the NMOS tube _M2 is in the saturation area. When the load circuit 3 is turned on, the NMOS tube _M1 is in the variable resistance area, and the NMOS tube _M2 is in the cut-off area, that is, different load circuits conduct The combination of the conduction state of each NMOS transistor is different when it is turned on, and the conduction state of each NMOS transistor is not affected when the battery module fluctuates within a predetermined range.

Since the output voltage range of the battery module E2 is 18V-25.2V, considering the full voltage range of the battery module E2, the identification basis for the conduction of the three load circuits is as follows:

The identification basis for the conduction of the load circuit 1 is: ADC1 = 2V and ADC2 = 0.68V.

The identification basis for the conduction of the load circuit 2 is: 1.6V≤ADC1≤1.85V and 0.3V≤ADC2≤0.55V.

The identification basis for the conduction of the load circuit 3 is: 0.43V≤ADC1≤0.6V and ADC2=0V.

It can be seen from the identification basis of the conduction of the above three load circuits that when different load circuits are conducted, the combinations of the voltage values output by the sources of the NMOS transistors are different. Moreover, when the same NMOS transistor is turned on in two different load circuits, the voltage value output by the source is within two value ranges where there is no intersection.

It can be understood that, in the above specific implementation manner, the voltage difference V _gs between the gate and the source on the NMOS transistor, the voltage difference V _ds between the drain and the source on the NMOS transistor, and the voltage value ADC1 output by the source of the NMOS transistor and ADC2 can be obtained by simulation.

battery management system

Fig. 5 is a schematic block diagram of a battery management system according to an embodiment of the present application. As shown in FIG. 5 , the battery management system 500 includes an electrical connector 510 , a control module 520 and an identification circuit 530 in any of the above-mentioned embodiments. The identification circuit 530 is connected to the load circuit through the electrical connector 510. When the load circuit is turned on by at least one switch, the output voltage of the load circuit is input to the identification circuit 530. Different load circuits have different resistance values when they are turned on. The control module 520 is connected with the identification circuit 530 , and the control module 520 is used for determining whether the load circuit is on or off according to the on-off signal generated by the identification circuit 530 .

In the embodiment of the present application, after the identification circuit 530 generates an on-off signal for indicating that the load circuit is on or off, the generated on-off signal is input to the control module 520, and the control module 520 determines based on the received on-off signal On or off of the load circuit. The control module 520 may be a control chip, a single-chip microcomputer and other devices with logic judgment functions in the battery management system 500 .

In a possible implementation, when the circuit structure of the identification circuit 530 is as shown in FIG. The conduction state combination of each NMOS transistor determines the conduction or disconnection of each load circuit according to the combination of the voltage value output by the source of each NMOS transistor and/or the combination of the conduction state of each NMOS transistor. In a specific embodiment of the present application, the value range of the voltage value output by the source of each NMOS transistor is predetermined when each load circuit is turned on, and after obtaining the voltage value of the source output of each NMOS transistor, the Comparing the obtained voltage value with the above range of values can quickly determine the on-off load circuit to ensure the efficiency of on-off identification of the load circuit.

In another possible implementation, when the circuit structure of the identification circuit 530 is as shown in FIG. The conduction state combination of NMOS transistors, and obtain the output voltage of the battery module, and obtain the standard voltage value of the source output of each NMOS transistor when each load circuit is turned on according to the output voltage of the battery module, and then according to each NMOS The combination of the voltage value of the source output of the transistor and the standard voltage value of the source output of each NMOS transistor, and/or the conduction state of the N series-coupled NMOS transistors determines whether each load circuit is turned on or off.

After the control module 520 obtains the voltage value output by the battery module, it inputs the output power of the battery module into a pre-built function, or queries the corresponding table created in advance to obtain the voltage value output by the battery module. The standard voltage value output by the source of each NMOS transistor when the load circuit is turned on. Then the control module 520 compares the voltage value output by the source of each NMOS transistor with the standard voltage value, and determines a set of standard voltage values matching the voltage value output by the source of each NMOS transistor. The corresponding load circuit is the turned-on load circuit. The voltage value of the source output of the NMOS transistor matches the standard voltage value, which means that the voltage value of the source output is the same as the standard voltage value or the difference between the two is less than a preset deviation threshold.

Based on the output voltage of the battery module and the voltage value of the source output of each NMOS tube, determine the load circuit that is turned on, and then turn on and off each load circuit, because the output voltage of the battery module is added. The reference data can more accurately identify the on-off of the load circuit.

In a possible implementation manner, the control module is respectively connected to the source of each NMOS transistor, and the control module is used to determine the conduction state according to the output voltage value of the source of each NMOS transistor or the conduction state of each NMOS transistor. The load circuit, that is, the control module determines whether each load circuit is turned on or off according to the on-off signal. Wherein, the control module may be a device with logic processing capability such as a processing chip and a single-chip microcomputer included in the battery management system.

When different load circuits are turned on, the combination of the voltage value output by the source of each NMOS transistor is different or the combination of the conduction state of each NMOS transistor is different, the source of each NMOS transistor is connected to the control module respectively, so that the control module The voltage value output by the source of each NMOS transistor can be obtained or the conduction state of each NMOS transistor can be determined, and then the control module can determine the conduction state of each load circuit according to the voltage value output by the source of each NMOS transistor or the conduction state of each NMOS transistor. off state. Through the control module in the battery management system, the on-off state of each load circuit is determined based on the voltage value output by the source of each NMOS tube or the conduction state of each NMOS tube, so that the battery management system has a relatively simple circuit structure, and then can Make the pool management system have a lower cost.

It should be understood that the switches included in each load circuit have been pre-stored in the storage space readable by the control module, and the control module determines a load based on the voltage value output by the source of each NMOS transistor or the conduction state of each NMOS transistor. When the circuit is turned on, it is determined that the other load circuits are in the disconnected state, and then according to the switch information included in the load circuits stored in the storage space, it can be determined that the switches in the turned-on load circuit are in the closed state, and Each switch in the disconnected load circuit is in the open state.

In a possible implementation manner, as shown in FIG. 3 , the first power source E1 may be a voltage output port on the control module. The control module in the battery management system is coupled to the battery module E2, the battery module E2 supplies power to the control module, the voltage output port on the control module is connected to the first end of the first resistor R1, and is controlled by the The voltage output port provides the driving voltage for the gate of the first NMOS transistor M1 through the first resistor _R1 , and there is no need to separately set the first power supply in the identification circuit, which ensures that the identification circuit has a relatively simple circuit structure.

battery pack

Fig. 6 is a schematic block diagram of a battery pack according to an embodiment of the present application. As shown in FIG. 6 , a battery pack 600 includes a cell module 610 and a battery management system 620 in any of the above-mentioned embodiments. The battery module 610 is connected to the battery management system 620 and supplies power to the battery management system 620 .

electronic device

Fig. 7 is a schematic block diagram of an electronic device according to an embodiment of the present application. As shown in FIG. 7 , an electronic device 700 includes a load circuit 710 and a battery pack 720 in any of the above-mentioned embodiments. The load circuit 710 is connected to a battery pack 720 , and the battery pack 720 is used to supply power to the load circuit 710 .

In a possible implementation manner, the load circuit 710 includes at least two load circuits 710 , and the resistance value of each load circuit 710 is different.

In a possible implementation manner, the positive electrode of the cell module in the battery pack 702 is used to connect to the load circuit 710, and the load circuit 710 is connected to the voltage dividing module through a pin of the electrical connector.

In a possible implementation, the electronic device 700 is a vacuum cleaner, and the vacuum cleaner includes three load circuits, the first load circuit includes a power switch of the vacuum cleaner, and the second load circuit includes a working switch for adjusting the working mode of the vacuum cleaner, The third load circuit includes a position switch for adjusting the position of the vacuum cleaner. The battery pack is respectively connected to each load circuit, and each load circuit is controlled on and off by a corresponding switch, and each load circuit can have different resistance values.

It should be noted that the connection relationship between the battery pack and the load circuit in the electronic device, as well as the principle and process of detecting the conduction state of the load circuit, have been described in detail in the above identification circuit embodiment and battery management system embodiment. For details, please refer to The descriptions in the above identification circuit embodiment and the battery management system embodiment are not repeated here.

The commercial value of the embodiment of this application

When the embodiment of the present application solves the technical problem that the battery management system has a complex circuit structure due to multiple identification circuits, the identification circuit includes a voltage divider module and a signal generation module. When different load circuits are turned on, the voltage divider module will send The signal generation module inputs different voltages, so that the signal generation module can generate an on-off signal for indicating the on or off of the load circuit based on the voltage input by the voltage divider module, so multiple load circuits can be identified through one identification circuit To identify the on-off state of the battery management system, because the number of identification circuits in the battery management system is reduced, the circuit structure of the battery management system can be simplified. In addition, different load circuits have different resistance values when they are turned on, so that the voltage values input to the identification circuit are different. On or off of each load circuit is determined based on the on-off signal. Therefore, it is only necessary to connect each load circuit with the identification circuit through one pin of the electrical connector, and introduce the output voltage of the load circuit into the identification circuit to determine whether each load circuit is on or off, thereby saving the identification load. The number of pins used when the circuit is on or off.

It should be understood that each embodiment in this specification is described in a progressive manner, the same or similar parts of each embodiment can be referred to each other, and each embodiment focuses on the difference from other embodiments . In particular, for the method embodiments, since they are basically similar to the methods described in the device and system embodiments, the description is relatively simple, and for relevant parts, please refer to some descriptions of other embodiments.

It should be understood that the foregoing describes specific embodiments of the present specification. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims can be performed in an order different from that in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. Multitasking and parallel processing are also possible or may be advantageous in certain embodiments.

It should be understood that describing an element herein in the singular or showing only one in a drawing does not mean limiting the number of that element to one. Furthermore, modules or elements described or illustrated herein as separate may be combined into a single module or element, and modules or elements described or illustrated herein as a single may be split into a plurality of modules or elements.

It should also be understood that the terms and expressions used herein are for description only, and one or more embodiments of this specification should not be limited to these terms and expressions. The use of these terms and expressions does not mean to exclude any equivalent features shown and described (or parts thereof), and it should be recognized that various modifications may also be included within the scope of the claims. Other modifications, changes and substitutions are also possible. Accordingly, the claims should be read to cover all such equivalents.

Claims (14)

1. An identification circuit, characterized in that the identification circuit is configured to be connected to a load circuit, and further includes: a voltage dividing module and a signal generating module;

   The voltage dividing module is configured to divide the voltage input to the voltage dividing module;

   The signal generating module is connected to the voltage dividing module, and the signal generating module is configured to receive the voltage output by the voltage dividing module, and generate an on-off signal for instructing the load circuit to be turned on or off.
2. The identification circuit according to claim 1, wherein the signal generation module includes N NMOS transistors, the N NMOS transistors are coupled in series, and N is a natural number greater than or equal to 2;

   When the N NMOS transistors meet at least one of the following conditions, the signal generation module generates an on-off signal for indicating that the load circuit is turned on or off:

   (i) The combinations of voltage values output by the source electrodes of the N NMOS transistors are different;

   (ii) The conduction states of the N NMOS transistors have different combinations.
3. The identification circuit according to claim 2, wherein the signal generation module further comprises: a first power supply and a first resistor;

   The drain of the first NMOS transistor among the N NMOS transistors is connected to the output terminal of the voltage divider module, and the gate of the first NMOS transistor is connected to the first end of the first resistor, so The second end of the first resistor is connected to the first power supply;

   The source of the i-th NMOS transistor among the N NMOS transistors is connected to the gate of the i+1-th NMOS transistor, and the drain of the i-th NMOS transistor is connected to the drain of the i+1-th NMOS transistor , where i is a positive integer less than N.
4. The identification circuit according to claim 1, wherein the voltage dividing module is configured to be connected to at least two load circuits through one pin of an electrical connector.
5. The identification circuit according to claim 2, wherein when the combinations of the voltage values output by the sources of the N NMOS transistors are different, the signal generating module generates an on-off signal for indicating that the load circuit is turned on or off. An off signal, wherein the signal generating module is further configured to: in response to the N NMOS transistors being in an off state, the signal generating module generates a signal for indicating that the load circuit is disconnected.
6. The identification circuit according to claim 2, wherein the voltage value output by the source of at least one NMOS transistor is located in at least two value ranges where there is no intersection, and is used to indicate that different load circuits are turned on.
7. The identification circuit according to claim 3, wherein the signal generation module further comprises: N matching modules, each of which includes a resistor or at least two resistors connected in series;

   The source of each NMOS transistor in the N NMOS transistors is connected to the first end of one matching module;

   The second ends of the N matching modules are all used to connect with the negative pole of the cell module.
8. A battery management system, characterized by comprising: an electrical connector, a control module, and the identification circuit according to any one of claims 1-7;

   The identification circuit is connected to the electrical connector configured to be connected to a load circuit;

   The control module is connected with the identification circuit, and the control module is configured to determine whether the load circuit is on or off according to the on-off signal generated by the identification circuit.
9. The battery management system according to claim 8, characterized in that,

   The control module is configured to determine the load according to the combination of voltage values output by the sources of the N NMOS transistors in the identification circuit, and/or, according to the combination of the conduction states of the N NMOS transistors in the identification circuit making or breaking a circuit.
10. The battery management system according to claim 9, wherein the control module is respectively connected to the sources of the N NMOS transistors, and the control module is configured to output a voltage value according to the sources of the N NMOS transistors The combination of determines the conduction or disconnection of the load circuit.
11. A battery pack, characterized by comprising: a cell module and the battery management system according to any one of claims 8-10, the cell module is connected to the battery management system and provides The battery management system supplies power.
12. An electronic device, characterized by comprising: a load circuit and the battery pack according to claim 11;

    The load circuit is connected to the battery pack, and the battery pack is used to supply power to the load circuit.
13. The electronic device according to claim 12, wherein the load circuit comprises at least two, and each load circuit has a different resistance value.
14. The electronic device according to claim 12 or 13, characterized in that, the positive pole of the cell module is used to connect with the load circuit, and the load circuit is connected to the branch circuit through a pin of an electrical connector. The pressure module is connected.

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