CN114243830A - Identification circuit, battery management system, battery pack and electronic device - Google Patents

Identification circuit, battery management system, battery pack and electronic device Download PDF

Info

Publication number
CN114243830A
CN114243830A CN202111524709.8A CN202111524709A CN114243830A CN 114243830 A CN114243830 A CN 114243830A CN 202111524709 A CN202111524709 A CN 202111524709A CN 114243830 A CN114243830 A CN 114243830A
Authority
CN
China
Prior art keywords
module
load circuit
voltage
nmos
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111524709.8A
Other languages
Chinese (zh)
Inventor
孙斌
许伟群
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dongguan Poweramp Technology Ltd
Original Assignee
Dongguan Poweramp Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dongguan Poweramp Technology Ltd filed Critical Dongguan Poweramp Technology Ltd
Priority to CN202111524709.8A priority Critical patent/CN114243830A/en
Publication of CN114243830A publication Critical patent/CN114243830A/en
Priority to PCT/CN2022/126926 priority patent/WO2023109314A1/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
    • H02J7/0036—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits using connection detecting circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Secondary Cells (AREA)

Abstract

The embodiment of the application provides an identification circuit, a battery management system, a battery pack and an electronic device, wherein the identification circuit is connected with a load circuit, and the identification circuit further comprises: the voltage division module and the signal generation module; the voltage dividing module is configured to divide a voltage input to the voltage dividing module; the signal generation module is connected with the voltage division module and is configured to receive the voltage output by the voltage division module and generate an on-off signal for indicating the on-off of the load circuit. The scheme can make the circuit structure of battery management simpler.

Description

Identification circuit, battery management system, battery pack and electronic device
Technical Field
The embodiment of the application relates to the technical field of electrical engineering, in particular to an identification circuit, a battery management system, a battery pack and an electronic device.
Background
A Battery Management System (BMS) can monitor the state of the Battery, thereby intelligently managing and maintaining each Battery cell, preventing the Battery from being overcharged and overdischarged, and extending the service life of the Battery. In the working process of the battery management system, the on-off of the load circuit needs to be identified, and then the battery is managed according to the on-off of the load circuit.
At present, a battery management system is connected with an external load circuit, and when the load circuit is turned on or off, the load circuit sends a corresponding electrical signal to the battery management system, so that the battery management system can determine the turning on or off of the load circuit according to the received electrical signal.
However, when a plurality of load circuits are included, each of the load circuits is connected to one identification circuit in the battery management system, and the electrical signals of the connected load circuits are detected by the identification circuits, the circuit configuration of the battery management system is complicated because the battery management system includes a greater number of identification circuits.
Disclosure of Invention
Embodiments of the present disclosure provide an identification circuit, a battery management system, a battery pack and an electronic device to at least partially solve the above problems.
According to a first aspect of embodiments of the present application, there is provided an identification circuit configured to be connected to a load circuit, further comprising: the voltage division module and the signal generation module; the voltage dividing module is configured to divide a voltage input to the voltage dividing module; the signal generation module is connected with the voltage division module and is configured to receive the voltage output by the voltage division module and generate an on-off signal for indicating the on-off of the load circuit.
In a first possible implementation manner, with reference to the first aspect, the signal generation module includes N NMOS transistors, where the N NMOS transistors are coupled in series, and N is a natural number greater than 2; when the N NMOS tubes meet at least one of the following conditions, the signal generation module generates a switching-on/off signal for indicating the on/off of the load circuit: (i) the combination of the voltage values output by the source electrodes of the N NMOS tubes is different; (ii) and the combination of the conduction states of the N NMOS tubes is different.
In a second possible implementation manner, in combination with the first possible implementation manner, the signal generation module further includes a first power supply and a first resistor, a drain of a first NMOS transistor of the N NMOS transistors is connected to an output terminal of the voltage division module, a gate of the first NMOS transistor is connected to a first end of the first resistor, a second end of the first resistor is connected to the first power supply, a source of an i NMOS transistor of the N NMOS transistors is connected to a gate of an i +1NMOS transistor, and a drain of the i NMOS transistor is connected to a drain of the i +1NMOS transistor, where i is a positive integer smaller than N.
In a third possible implementation manner, in combination with the first aspect, the voltage dividing module is configured to be connected with at least two load circuits through one pin of the electrical connector.
In a fourth possible implementation manner, with reference to the first possible implementation manner, when the combinations of the voltage values output by the sources of the N NMOS transistors are different, the signal generation module generates an on-off signal for indicating that the load circuit is turned on or off, wherein the signal generation module is further configured to: in response to the N NMOS transistors being in the cut-off state, the signal generation module generates a signal for indicating that the load circuit is open.
In a fifth possible implementation manner, with reference to the first possible implementation manner, the voltage value output by the source of at least one NMOS transistor is within at least two value ranges where there is no intersection, and is used to indicate that different load circuits are turned on.
In a sixth possible implementation manner, with reference to the second possible implementation manner, the signal generating module further includes: the matching modules comprise N matching modules, and each matching module comprises a resistor or at least two resistors connected in series; the source electrode of each NMOS tube in the N NMOS tubes is connected with the first end of one matching module; and the second ends of the N matching modules are connected with the negative electrode of the battery cell module.
According to a second aspect of embodiments of the present application, there is provided a battery management system including: the identification circuit is connected with the electrical connector, the electrical connector is configured to be connected with a load circuit, the control module is connected with the identification circuit, and the control module is configured to determine on or off of the load circuit according to an on-off signal generated by the identification circuit.
In a first possible implementation manner, with reference to the second aspect, the control module is configured to determine turning on or off of the load circuit according to a combination of voltage values output by the sources of the N NMOS transistors in the identification circuit and/or according to a combination of on states of the N NMOS transistors in the identification circuit.
In a second possible implementation manner, with reference to the first possible implementation manner, the control modules are respectively connected to the source electrodes of the N NMOS transistors, and the control modules are configured to determine the on or off of the load circuit according to a combination of output voltage values of the source electrodes of the N NMOS transistors.
According to a third aspect of embodiments of the present application, there is provided a battery pack including: the battery management system comprises a battery cell module and the battery management system provided by the second aspect or any possible implementation manner of the second aspect, wherein the battery cell module is connected with the battery management system and supplies power to the battery management system.
According to a fourth aspect of embodiments of the present application, there is provided an electronic apparatus, including: a load circuit and the battery pack provided in the third aspect; the load circuit is connected with the battery pack, and the battery pack is used for supplying power to the load circuit.
In a first possible implementation manner, with reference to the fourth aspect, the load circuits include at least two load circuits, and a resistance value of each of the load circuits is different.
In a second possible implementation manner, with reference to the fourth aspect, the positive electrode of the battery cell module is used to be connected to the load circuit, and the load circuit is connected to the voltage dividing module through one pin of the electrical connector.
According to the load circuit on-off identification scheme provided by the embodiment of the application, the identification circuit is connected with the load circuit and comprises a voltage division module and a signal generation module, the voltage division module is used for dividing the voltage input to the voltage division module, the signal generation module is connected with the voltage division module, and the signal generation module is used for receiving the voltage output by the voltage division module and generating an on-off signal for indicating the on-off of the load circuit. The voltage division module can input different voltages to the signal generation module when different load circuits are switched on, so that the signal generation module can generate on-off signals for indicating the on-off of the load circuits based on the voltages output by the voltage division module, and further can determine the on-off of the load circuits based on the on-off signals, and therefore the on-off states of the load circuits can be identified through one identification circuit.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the embodiments of the present application, and other drawings can be obtained by those skilled in the art according to the drawings.
FIG. 1 is a schematic block diagram of a load circuit on-off identification system of one embodiment of the present application;
FIG. 2 is a schematic block diagram of an identification circuit of one embodiment of the present application;
FIG. 3 is a schematic diagram of an identification circuit according to one embodiment of the present application;
FIG. 4 is a schematic diagram of an identification circuit of another embodiment of the present application;
FIG. 5 is a schematic block diagram of a battery management system of one embodiment of the present application;
FIG. 6 is a schematic block diagram of a battery pack of one embodiment of the present application;
FIG. 7 is a schematic block diagram of an electronic device of one embodiment of the present application.
Detailed Description
In order to make those skilled in the art better understand the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be described in detail below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, but not all embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application shall fall within the scope of the protection of the embodiments in the present application.
Specific implementations of embodiments of the present application are further described below with reference to the accompanying drawings.
With the development of battery technology, batteries such as lithium iron phosphate batteries, lithium manganate batteries, lead-acid batteries, and the like can be used as energy storage batteries. The energy storage battery is widely applied in various scenes, and can be used as a power battery in electric equipment such as electric tools, electric bicycles, electric motorcycles, energy storage systems and the like.
The energy storage battery can be supplied power for the electric equipment in the form of a battery pack, and the battery management system can monitor the battery pack in different application scenes, manage the charging and discharging of the battery pack, and improve the service efficiency and the service life of the battery pack. Specifically, the battery management system may perform control management such as battery state monitoring, battery state analysis, battery safety protection, and battery information management.
In an application scene of the battery management system, the battery core module is connected with the plurality of load circuits to supply power to the load circuits, the load circuits are connected with the battery management system, the battery management system detects the on-off state of the load circuits, and then the battery core module is controlled and managed according to the on-off state of the load circuits. Each load circuit comprises a switch for controlling the on-off of the load circuit, the load circuit is conducted when the switch is closed, and the load circuit is disconnected when the switch is disconnected.
Fig. 1 shows a schematic block diagram of a load circuit on-off identification system. As shown in fig. 1, the input ends of the load circuits 110 are respectively connected to the output ends of the cell modules 120, the output end of each load circuit 110 is connected to the input end of the battery management system 130, and the output end of the battery management system 130 is connected to the input end of the cell module 120. The battery management system 130 includes an electrical connector 131 and a plurality of identification circuits 132, the output of each load circuit 110 is connected to one pin of the electrical connector 131, different load circuits 110 are connected to different pins, each pin connected to a load circuit 110 is connected to one identification circuit 132, and different identification circuits 132 are connected to different pins. Each load circuit 110 is simplified into a switch S and an equivalent resistor R which are connected in series, the load circuit 110 is turned on when the switch S is closed, and the resistance value of the equivalent resistor R is equal to the resistance value between the input end and the output end when the load circuit 110 is turned on.
Since each load circuit 110 is connected to an identification circuit 132 through one pin of the electrical connector 131, when the switch S in one load circuit 110 is closed to turn on the load circuit 110, the identification circuit 132 connected to the load circuit 110 receives an electrical signal, and then according to the electrical signal received by the identification circuit 132, it can be determined that the load circuit 110 connected to the identification circuit 132 is turned on, i.e., the switch S in the load circuit 110 connected to the identification circuit 132 is in a closed state.
Due to the limitation of the size of the Printed Circuit Board (PCB) and the number of pins of the control chip, the pins of the electrical connector 131 in the battery management system 130 are precious resources, and currently, each load Circuit 110 needs to be connected to the battery management system 130 through one pin of the electrical connector 131, and when there are a plurality of load circuits 110, a plurality of pins of the electrical connector 131 need to be occupied. In addition, each identification circuit 132 is connected to one load circuit 110, and when there are a plurality of load circuits 110, the battery management system 130 includes a plurality of identification circuits 132, which results in a complicated circuit structure of the battery management system 130, and further results in a high cost of the battery management system 130. Therefore, there is a need for a related art solution of a battery management system, which can recognize the connection or disconnection of a load circuit through the battery management system with a simpler circuit structure, and can reduce the number of pins in a connector.
Identification circuit
FIG. 2 is a schematic block diagram of an identification circuit of one embodiment of the present application. As shown in fig. 2, the battery management system 210 includes an electrical connector 211, the electrical connector 211 is used for connecting the load circuits 220, when the load circuits 220 are turned on by at least one switch S, the output voltage of the load circuits 220 is input to the battery management system 210, and different load circuits 220 have different resistance values when turned on. The identification circuit 212 in the battery management system 210 includes: a voltage dividing module 2121 and a signal generating module 2122;
the voltage dividing module 2121 is connected to the load circuit 220 via the electrical connector 211, and the voltage dividing module 2121 is configured to divide the voltage input to the voltage dividing module 2121;
the signal generating module 2122 is connected to the voltage dividing module 2121, and the signal generating module 2122 is configured to receive the voltage output by the voltage dividing module 2121 and generate a switching signal for instructing the load circuit 220 to switch on or off.
The output end of the battery cell module 230 is connected to the input end of each load circuit 220, and the output end of each load circuit 220 is connected to the electrical connector 211. When a switch in a load circuit 220 is closed, the load circuit 220 is turned on, the load circuit 220, the cell module 230 and the battery management system 210 form a loop, the cell module 230 supplies power to the load circuit 220, and the load circuit 220 outputs voltage to the battery management system 210. Since different load circuits 220 may have different resistance values when being turned on, different voltages may be input to the battery management system 210 after the different load circuits 220 are turned on, and the battery management system 210 may determine the turned-on load circuits 220 based on the voltages input by the load circuits 220, that is, determine the turning-on or turning-off of each load circuit 220.
The load circuit 220 includes a switch S and various components, and in the embodiment of the present application, the load circuit 220 may have a voltage dividing function, so that the load circuit 220 may be simplified into the switch S and the resistor R connected in series, and a resistance value of the resistor R in one load circuit 220 is equal to a resistance value between an input terminal and an output terminal of the load circuit 220 when the load circuit 220 is turned on.
The voltage dividing module 2121 divides the output voltage of the cell module 230 by the turned-on load circuit 220, the voltage dividing module 2121 may be a resistor, a plurality of resistors connected in series, or a plurality of resistors connected in parallel, the resistance value of the voltage dividing module 2121 is determined according to the output voltage of the cell module 230, the equivalent resistance of each load circuit 220, and other factors, so as to ensure that when different load circuits are turned on, the combinations of the voltage values output by the source electrodes of the NMOS transistors are different, or the combinations of the conduction states of the NMOS transistors are different.
In an embodiment of the application, the identification circuit is configured to be connected to a load circuit, the identification circuit includes a voltage dividing module and a signal generating module, the voltage dividing module is configured to divide a voltage input to the voltage dividing module, the signal generating module is connected to the voltage dividing module, and the signal generating module is configured to receive the voltage output by the voltage dividing module and generate an on-off signal for indicating the on-off of the load circuit. The voltage division module can input different voltages to the signal generation module when different load circuits are switched on, so that the signal generation module can generate on-off signals for indicating the on-off of the load circuits based on the voltages output by the voltage division module, and further can determine the on-off of the load circuits based on the on-off signals, and therefore the on-off states of the load circuits can be identified through one identification circuit.
In one possible implementation manner, the signal generation module includes N NMOS transistors, the N NMOS transistors are coupled in series, and N is a natural number greater than 2. When the N NMOS tubes meet at least one of the following conditions, the signal generation module generates a switching-on/off signal for indicating the on/off of the load circuit:
(i) the combination of voltage values output by the source electrodes of the N NMOS tubes is different;
(ii) the combination of the conducting states of the N NMOS tubes is different.
When different load circuits are conducted, the combinations of the voltage values output by the source electrodes of the N NMOS tubes are different, namely that when any two load circuits are conducted respectively, at least one NMOS tube exists in the N NMOS tubes, and the voltage values output by the source electrodes of the NMOS tubes are different when the two load circuits are conducted respectively. When different load circuits are conducted, the combination of the conduction states of the N NMOS tubes is different, namely that when any two load circuits are conducted respectively, at least one NMOS tube exists in the N NMOS tubes, the conduction states of the NMOS tubes when the two load circuits are conducted respectively are different, and the conduction states of the NMOS tubes comprise a saturation region, a variable resistance region or a cut-off region.
The signal generation module may use a combination of voltage values output by the source electrodes of the N NMOS transistors as the on-off signal, or may use a combination of on-states of the N NMOS transistors as the on-off signal, or may simultaneously use a combination of voltage values output by the source electrodes of the N NMOS transistors and a combination of on-states of the N NMOS transistors as the on-off signal.
In the embodiment of the application, the signal generation module adjusts the voltage output by the voltage division module through the N NMOS transistors, when different load circuits are switched on, the combinations of the voltage values output by the source electrodes of the N NMOS transistors are different, or the combinations of the conduction states of the N NMOS transistors are different, so that the combinations of the voltage values output by the source electrodes of the N NMOS transistors or the combinations of the conduction states of the N NMOS transistors can be used as on-off signals, and then the on-off of each load circuit can be determined according to the source electrode output voltage values of the N NMOS transistors or the conduction states of the N NMOS transistors, thereby realizing the identification of the on-off states of a plurality of load circuits through one identification circuit.
Fig. 3 is a schematic diagram of an identification circuit according to another embodiment of the present application. As shown in fig. 3, the signal generating module 2122 includes a first power source E1, a first resistor R1, and N NMOS transistors, where the N NMOS transistors are coupled in series, and N is a natural number greater than 2. For convenience of description, a voltage dividing module including a resistor, a plurality of resistors connected in series, or a plurality of resistors connected in parallel is equivalent to a voltage dividing resistor R2, a conducting load circuit is equivalent to a resistor R3, resistors R3 corresponding to different load circuits have different resistance values, and a non-conducting load circuit is omitted in fig. 3. Among the N NMOS transistors, the first NMOS transistor M1The drain electrode of the first NMOS tube M is connected with the output end of the voltage dividing resistor R21Is connected to a first terminal of a first resistor R1, and a second terminal of the first resistor R1 is connected to a first power source E1. iNMOS transistor MiSource electrode of (1) th NMOS tube Mi+1Is connected with the gate of the iNMOS transistor MiDrain electrode of (1) and (i + 1) th NMOS tube Mi+1Is connected, wherein i is a positive integer less than N. When different load circuits are conducted, the combination of the voltage values output by the source electrodes of the N NMOS tubes is notThe combination of the voltage values output by the source electrodes of the N NMOS tubes or the combination of the conduction states of the N NMOS tubes is used as an on-off signal.
In the embodiment of the present application, the signal generating module 2122 includes N NMOS transistors, and the first NMOS transistor M1The grid of the first NMOS transistor is connected with a first power supply E1 through a first resistor R1, and the voltage output by a voltage dividing resistor R2 is input into a first NMOS transistor M1The iNMOS transistor MiSource electrode of (1) th NMOS tube Mi+1Is connected with the gate of the iNMOS transistor MiDrain electrode of (1) and (i + 1) th NMOS tube Mi+1Is connected to the drain of the transistor. Because each NMOS tube can be in a saturation region, a variable resistance region or a cut-off region, when different load circuits are switched on to enable the divider resistor R2 to output different voltages, the combinations of the voltage values output by the source electrodes of the NMOS tubes are different or the combinations of the conduction states of the NMOS tubes are different, and then the switched-on load circuit can be determined according to the voltage values output by the source electrodes of the NMOS tubes or the conduction states of the NMOS tubes, so that the accuracy of identifying the on-off states of the load circuit is ensured.
Because the output voltage of the cell module E2 will gradually decrease during operation, the voltage output by the voltage dividing resistor R2 is adjusted by N NMOS transistors coupled in series, so as to ensure that when the cell module E2 outputs different voltages, and after different load circuits are turned on, the voltage value output by the source of each NMOS transistor still has different combinations or the turned-on state of each NMOS transistor still maintains the original combination, if the signal generating module 2122 is not adopted, and the voltages at the two ends of the voltage dividing resistor R2 are directly used to determine the turned-on load circuit, under the condition that the output voltage of the cell module E2 changes, different load circuits are turned on, and the voltages at the two ends of the voltage dividing resistor R2 are approximately close, so that the condition that which load circuit is in the turned-on state cannot be accurately identified. Therefore, the voltage output by the voltage dividing resistor R2 is adjusted through the N NMOS tubes which are coupled in series, the on or off of each load circuit is determined according to the combination of the voltage values output by the source electrodes of the NMOS tubes or the combination of the on states of the NMOS tubes, and the accuracy of on-off identification of the load circuit is ensured.
In one possible implementation, as shown in fig. 3, when different load circuits are turned on, the combination of the on-states of the N series-coupled NMOS transistors is different.
The difference between the voltages of the grid G and the source S of the NMOS tube is VgsThe difference between the voltages of the drain D and the source S of the NMOS tube is VdsThe turn-on voltage of the NMOS tube is VthWhen V isgs＞VthAnd V isds＞Vgs-VthWhen the NMOS transistor is in the saturation region, when V isgs＞VthAnd V isds＜Vgs-VthWhen the NMOS transistor is in the variable resistance region, when V isgs＜VthWhen the NMOS transistor is in a cut-off region. When the NMOS tube is in different conduction states, the voltage values output by the source electrode of the NMOS tube are different, namely the voltage values output by the source electrode are different when the NMOS tube is in a saturation region, a variable resistance region and a cut-off region. When different load circuits are conducted, the combination of the conduction states of the N NMOS tubes is different, and the voltage values output from the source electrodes of the NMOS tubes in different conduction states are different, so that the conducted load circuits can be accurately determined according to the combination of the source electrode output voltage values of the NMOS tubes or the combination of the conduction states of the NMOS tubes.
In addition, for any one load circuit, when the load circuit is switched on, and the output voltage of the battery cell module is changed within a preset range, the combination of the conduction states of the NMOS tubes is kept unchanged. For example, the signal generation module includes 2 NMOS transistors, and when the output voltage of the cell module is Vmin, the two NMOS transistors are both in the saturation region after the first load circuit is turned on, and then when the output voltage of the cell module is Vmax, the two NMOS transistors are still both in the saturation region after the first load circuit is turned on. When the output voltage of the battery cell module changes within a preset range, the combination of the conduction states of the NMOS tubes after the same load circuit is conducted keeps unchanged, the result of identifying the on-off state of the load circuit is not affected by the output voltage of the battery cell module, and therefore the timeliness of identifying the on-off state of the load circuit can be improved.
In one possible implementation, as shown in fig. 2 and 3, the voltage dividing module 2121 is configured to be connected to each load circuit 220 through one pin of the electrical connector 211.
Since different load circuits 220 have different resistance values when being turned on, when different load circuits 220 are turned on, the voltage values transmitted by the voltage dividing module 2121 to the signal generating module 2122 are different, so that the combinations of the voltage values output by the sources of the N NMOS transistors are different or the combinations of the conduction states of the N NMOS transistors are different, and further, the turned-on load circuit 220 is determined according to the combinations of the voltage values output by the sources of the N NMOS transistors or the combinations of the conduction states of the N NMOS transistors, so that the voltage dividing module 2121 can be respectively connected with each load circuit 220 through one pin of the electrical connector 211, thereby reducing the number of pins used in the electrical connector 211.
In one possible implementation, as shown in fig. 3, when the identification circuit includes N NMOS transistors coupled in series, the number of load circuits is less than or equal to 3N-1。
In order to ensure that the on-off state of each load circuit can be accurately identified, when different load circuits are conducted, the combination of the conducting states of N NMOS tubes which are connected in series is different, and the combination of the conducting states of the N NMOS tubes which are connected in series has 3NOne of the combinations corresponds to the situation that each load circuit is disconnected, for example, the situation that N serially coupled NMOS transistors are in a cut-off region corresponds to the situation that each load circuit is disconnected, so that the number of the load circuits is less than or equal to 3NAnd 1, different load circuits are enabled to correspond to different combinations of conduction states of the NMOS tubes when being conducted, so that the combinations of voltage values output by the source electrodes of the NMOS tubes when different load circuits are conducted are different, the conducted load circuits can be accurately determined according to the voltage values output by the source electrodes of the NMOS tubes, and the accuracy of identifying the on-off of the load circuits is further ensured.
In one possible implementation, when each load circuit is disconnected, the N NMOS transistors are all in the off state.
When each load circuit is in a disconnected state, the electronic equipment is usually in a non-conducting state, and at the moment, the N NMOS tubes included in the identification circuit are all in a cut-off state, so that the identification circuit has low energy consumption, the energy consumption of the electronic equipment in the non-conducting state can be reduced, and the standby time of the electronic equipment is prolonged.
In one possible implementation, when the NMOS transistor is in the variable resistance region, the channel of the NMOS transistor is equivalent to a conductor with a fixed resistance value, and the voltage difference V between the drain D and the source S of the NMOS transistordsAccording to the difference V between the voltages of the gate G and the source SgsThe voltage of the NMOS transistor in the variable resistance region is changed linearly, so that the NMOS transistor in the variable resistance region can output different voltage values from the source electrode. Therefore, when different load circuits are switched on, the combination of the conduction states of the N NMOS tubes can be the same or different, and when the combination of the conduction states of the N NMOS tubes is the same, the value ranges of the voltage values output by the source electrodes of the NMOS tubes in the variable resistance area when different load circuits are switched on can be further different, so that the switched-on load circuits can be determined according to the value ranges of the source electrode output voltages of the NMOS tubes.
For example, when the first load circuit or the second load circuit is turned on, the first NMOS transistor and the second NMOS transistor included in the identification circuit are respectively located in the saturation region and the variable resistance region, the voltage value output by the source electrode of the first NMOS transistor located in the saturation region is a fixed value, but when the first load circuit is turned on, the voltage value output by the source electrode of the second NMOS transistor located in the variable resistance region is located in a first value range, and when the second load circuit is turned on, the voltage value output by the source electrode of the second NMOS transistor located in the variable resistance region is located in a second value range, and the first value range and the second value range do not intersect with each other, so that the turned-on load circuit can be determined further according to the value ranges of the source electrode output voltage values of the first NMOS transistor and the second NMOS transistor on the basis of determining the turned-on states of the first load circuit and the second load circuit. It is to be understood that this example is provided merely for the purpose of illustrative description and understanding of the embodiments of the present application and is not intended to limit the embodiments of the present application.
In this embodiment of the application, when different load circuits are turned on, the voltage value output by the source of at least one NMOS transistor is within at least two value ranges where no intersection exists, so that each NMOS transistor may be in the same combination of on states when different load circuits are turned on, and further, the NMOS transistor may be in the same combination of on states through the NMOS transistorWhen different load circuits are conducted, the voltage values output from the source electrodes are located in two value ranges without intersection, and at the moment, the conducted load circuits can be further determined according to the value ranges of the source electrode output voltage values of the NMOS tubes on the basis of judging the conduction states of the NMOS tubes. Because the combination of the conducting states of the NMOS tubes is the same, the conducting load circuits can be determined according to the value range of the source output voltage value of the NMOS tube in the variable resistance area, so that the number of the load circuits can be more than 3N1, so that the on or off of more load circuits can be recognized by the recognition circuit including less NMOS transistors, so that the cost of the battery management system can be reduced.
In a possible implementation, the signal generating module further includes N matching modules, and each matching module includes one resistor or at least two resistors connected in series. The source electrode of each NMOS tube is connected with the first end of one matching module, the source electrodes of different NMOS tubes are connected with different matching modules, the second end of each matching module is used for being connected with the negative electrode of the battery cell module, the positive electrode of the battery cell module is connected with the first end of each load circuit, and the second end of each load circuit is connected with the electric connector. As shown in fig. 3, for convenience of describing and showing the internal structure of the signal generating module 2122, the matching module is simplified as a matching resistor R4, and the matching resistors R4 connected to the sources of different NMOS transistors have the same or different resistance values.
When one NMOS tube is in a saturation region or a variable resistance region, the current output from the source of the NMOS tube returns to the negative electrode of the cell module E2 through the connected matching resistor R4, and a complete loop is formed. The switching condition of the conduction state of each NMOS tube can be adjusted through the matching resistor R4, so that each NMOS tube can work according to a preset conduction state combination when different load circuits are conducted, and the conduction or disconnection of each load circuit can be accurately identified according to the voltage value output by the source electrode of each NMOS tube.
It should be noted that, in the identification circuit shown in fig. 3, the N NMOS transistors coupled in series may be NMOS transistors of the same type, or NMOS transistors of different types. In addition, the voltage regulating circuit can be realized by a plurality of PMOS tubes, or can be realized by the combination of NMOS tubes and PMOS tubes.
The identification circuit provided by the embodiment of the present application is described in detail below by taking an example in which the signal generation module includes two NMOS transistors and identifies the on/off of three load circuits.
Fig. 4 is a schematic diagram of an identification circuit provided in another embodiment of the present application. As shown in fig. 4, the signal generating module 2122 comprises a first power source E1, a first resistor R1, and an NMOS transistor M1NMOS transistor M2The voltage dividing module comprises a voltage dividing resistor R2, and a load circuit to be conducted is equivalent to a resistor R3.
The positive pole of battery cell module E2 is connected with the input of resistance R3, and the output of resistance R3 is connected with divider resistance R2's input through an electric connector's a pin, and divider resistance R2's output and NMOS pipe M1Is connected with the drain electrode of the NMOS tube M1The source of the first matching resistor R41 is connected to the input terminal of the first matching resistor R41, and the output terminal of the first matching resistor R41 is connected to the negative terminal of the cell module E2. NMOS tube M2Grid and NMOS tube M1Is connected with the source electrode of the NMOS tube M2Drain electrode of and NMOS tube M1Is connected with the drain electrode of the NMOS tube M2The source of (2) is connected with the input end of the second matching resistor R42, and the output end of the second matching resistor R42 is connected with the negative electrode of the battery cell module E2. The negative electrode of the first power supply E1 is grounded, the positive electrode of the first power supply E1 is connected with the input end of a first resistor R1, and the output end of the first resistor R1 is connected with an NMOS transistor M1Are connected.
In one embodiment of the present application, the resistance value of the resistor R3 is 10K Ω when the load circuit 1 is turned on, the resistance value of the resistor R3 is 200K Ω when the load circuit 2 is turned on, and the resistance value of the resistor R3 is 2M Ω when the load circuit 3 is turned on. The resistance value of the voltage dividing resistor R2 is 120K Ω. The range of the output voltage of the battery cell module E2 is 18V-25.2V. The output voltage of the first power supply E1 is 3.3V, and that of the first resistor R1The resistance value is 100K omega. NMOS tube M1And NMOS transistor M2Turn-on voltage V ofthAll at 1.3V. The resistance value of the first matching resistor R41 is 51K Ω, and the resistance value of the second matching resistor R42 is 15K Ω.
(1) Case where the load circuit 1 is on and the load circuits 2 and 3 are off
When the output voltage of the battery cell module E2 is 18V, the NMOS tube M1Difference V between voltages of upper gate and sourcegs1.4V, NMOS transistor M1Difference V between voltages of upper drain and sourceds5V, satisfies Vgs＞VthAnd V isds＞Vgs-VthTherefore NMOS transistor M1In saturation region, NMOS transistor M1The voltage value ADC1 of the source output is 2V. NMOS tube M2Upper Vgs＝1.4V，Vds6.4V, satisfies Vgs＞VthAnd V isds＞Vgs-VthTherefore NMOS transistor M2In saturation region, NMOS transistor M2The voltage value ADC2 of the source output is 0.68V.
When the output voltage of the battery cell module E2 is 25.2V, the NMOS tube M1Upper Vgs＝1.4V，Vds12V, satisfies Vgs＞VthAnd V isds＞Vgs-VthTherefore NMOS transistor M1In saturation region, NMOS transistor M1The voltage value ADC1 of the source output is 2V. NMOS tube M2Upper Vgs＝1.4V，Vds13.4V, satisfies Vgs＞VthAnd V isds＞Vgs-VthTherefore NMOS transistor M2In saturation region, NMOS transistor M2The voltage value ADC2 of the source output is 0.68V.
(2) Case where the load circuit 2 is on and the load circuit 1 and the load circuit 3 are off
When the output voltage of the battery cell module E2 is 18V, the NMOS tube M1Upper Vgs＝1.7V，Vds0V, satisfies Vgs＞VthAnd V isds＜Vgs-VthTherefore NMOS transistor M1In the variable resistance region, NMOS transistor M1Voltage value ADC1 of source output 1.6V. NMOS tube M2Upper Vgs＝1.4V，Vds1.3V, satisfies Vgs＞VthAnd V isds＞Vgs-VthTherefore NMOS transistor M2In saturation region, NMOS transistor M2The voltage value ADC2 of the source output is 0.3V.
When the output voltage of the battery cell module E2 is 25.2V, the NMOS tube M1Upper Vgs＝1.45V，Vds0V, satisfies Vgs＞VthAnd V isds＜Vgs-VthTherefore NMOS transistor M1In the variable resistance region, NMOS transistor M1The voltage value ADC1 of the source output is 1.85V. NMOS tube M2Upper Vgs＝1.4V，Vds1.3V, satisfies Vgs＞VthAnd V isds＞Vgs-VthTherefore NMOS transistor M2In saturation region, NMOS transistor M2The voltage value ADC2 of the source output is 0.55V.
(3) Case where the load circuit 3 is on and the load circuit 1 and the load circuit 2 are off
When the output voltage of the battery cell module E2 is 18V, the NMOS tube M1Upper Vgs＝2.85V，Vds0V, satisfies Vgs＞VthAnd V isds＜Vgs-VthTherefore NMOS transistor M1In the variable resistance region, NMOS transistor M1The voltage value ADC1 of the source output is 0.43V. NMOS tube M2Upper Vgs＝0.45V，Vds0.45V, satisfies Vgs＜VthTherefore NMOS transistor M2In the cut-off region, NMOS transistor M2The voltage value ADC2 of the source output is 0V.
When the output voltage of the battery cell module E2 is 25.2V, the NMOS tube M1Upper Vgs＝2.7V，Vds0V, satisfies Vgs＞VthAnd V isds＜Vgs-VthTherefore NMOS transistor M1In the variable resistance region, NMOS transistor M1The voltage value ADC1 of the source output is 0.6V. NMOS tube M2Upper Vgs＝0.6V，Vds0.6V, satisfies Vgs＜VthTherefore NMOS transistor M2At the sectionStop zone, NMOS tube M2The voltage value ADC2 of the source output is 0V.
As can be seen from the above data, on the premise that the output voltage of the battery cell module E2 fluctuates between 18V and 25.2V, when the load circuit 1 is turned on, the NMOS transistor M is turned on1And NMOS transistor M2Are all in the saturation region, and the NMOS tube M is conducted when the load circuit 2 is conducted1In the variable resistance region, and NMOS transistor M2Are all in the saturation region, and the NMOS tube M is connected when the load circuit 3 is conducted1In the variable resistance region, and NMOS transistor M2All be in the district of cutting off, the combination of the on-state of each NMOS pipe is different when different load circuit switches on promptly, and the on-state of each NMOS pipe is not influenced when the electric core module fluctuates in the predetermined range.
Because the scope of electric core module E2 output voltage is 18V-25.2V, considers the full voltage scope of electric core module E2, the discernment basis that three load circuit switched on is:
the identification of the conduction of the load circuit 1 is based on: ADC1 ═ 2V and ADC2 ═ 0.68V.
The identification of the conduction of the load circuit 2 is based on: ADC1 is more than or equal to 1.6V and less than or equal to 1.85V, and ADC2 is more than or equal to 0.3V and less than or equal to 0.55V.
The identification of the conduction of the load circuit 3 is based on: 0.43V ≦ ADC1 ≦ 0.6V and ADC2 ≦ 0V.
According to the identification basis of the conduction of the three load circuits, when different load circuits are conducted, the combination of the voltage values output by the source electrodes of the NMOS tubes is different. And when the same NMOS tube is conducted in two different load circuits, the voltage value output by the source electrode is within two value ranges without intersection.
It is understood that the difference V between the gate and source voltages of the NMOS transistor in the above embodimentsgsThe difference V between the voltages of the drain and the source of the NMOS transistordsAnd the voltage values ADC1 and ADC2 output by the source electrode of the NMOS tube can be obtained in a simulation mode.
Battery management system
Fig. 5 is a schematic block diagram of a battery management system according to an embodiment of the present application. As shown in fig. 5, the battery management system 500 includes an electrical connector 510, a control module 520, and an identification circuit 530 in any of the embodiments described above. The identification circuit 530 is connected to the load circuit through the electrical connector 510, when the load circuit is turned on by at least one switch, the output voltage of the load circuit is inputted to the identification circuit 530, and different load circuits have different resistance values when turned on. The control module 520 is connected to the identification circuit 530, and the control module 520 is configured to determine the on/off of the load circuit according to the on/off signal generated by the identification circuit 530.
In the embodiment of the present application, after the identification circuit 530 generates the on-off signal for indicating the on-off of the load circuit, the generated on-off signal is input to the control module 520, and the control module 520 determines the on-off of the load circuit based on the received on-off signal. The control module 520 may be a device having a logic determination function, such as a control chip and a single chip in the battery management system 500.
In a possible implementation manner, when the circuit structure of the identification circuit 530 is as shown in fig. 3, the control module 520 obtains a combination of voltage values output by the sources of N NMOS transistors in the identification circuit 530 and/or a combination of on states of the N NMOS transistors, and determines whether to turn on or off each load circuit according to the combination of voltage values output by the sources of the NMOS transistors and/or the combination of on states of the NMOS transistors. In a specific embodiment of the application, a value range of a voltage value output by a source electrode of each NMOS transistor when each load circuit is turned on is predetermined, and after the voltage value output by the source electrode of each NMOS transistor is obtained, the obtained voltage value is compared with the value range, so that the turned-on load circuit can be quickly determined, and the efficiency of on-off recognition of the load circuit is ensured.
In another possible implementation manner, when the circuit structure of the identification circuit 530 is as shown in fig. 3, the control module 520 obtains a combination of voltage values output by the source electrodes of N NMOS transistors in the identification circuit 530 and/or a combination of conduction states of the N NMOS transistors, obtains an output voltage of the cell module, obtains a standard voltage value output by the source electrode of each NMOS transistor when each load circuit is turned on according to the output voltage of the cell module, and determines whether each load circuit is turned on or off according to the voltage value output by the source electrode of each NMOS transistor, the standard voltage value output by the source electrode of each NMOS transistor, and/or the combination of conduction states of N series-coupled NMOS transistors.
After obtaining the voltage value output by the cell module, the control module 520 inputs the output power of the cell module into a pre-constructed function, or queries a pre-created corresponding table, to obtain a standard voltage value output by the source of each NMOS transistor when different load circuits are switched on when the cell module outputs the voltage value. Then, the control module 520 compares the voltage value output by the source of each NMOS transistor with the standard voltage value to determine a set of standard voltage values matching the voltage value output by the source of each NMOS transistor, and the load circuit corresponding to the set of standard voltage values is the turned-on load circuit. The voltage value output by the source electrode of the NMOS tube is matched with the standard voltage value, and means that the voltage value output by the source electrode is the same as the standard voltage value or the difference value of the voltage value output by the source electrode and the standard voltage value is smaller than a preset deviation threshold value.
The switched-on load circuit is determined based on the output voltage of the battery cell module and the voltage value output by the source electrode of each NMOS tube, and then the on-off of each load circuit is determined.
In a possible implementation manner, the control module is connected to the source of each NMOS transistor, and the control module is configured to determine a turned-on load circuit according to an output voltage value of the source of each NMOS transistor or a turn-on state of each NMOS transistor, that is, the control module determines turn-on or turn-off of each load circuit according to the turn-on/off signal. The control module can be a processing chip, a single chip microcomputer and other devices with logic processing capability included in the battery management system.
When different load circuits are switched on, the combination of the voltage values output by the source electrodes of the NMOS tubes is different or the combination of the conduction states of the NMOS tubes is different, and the source electrodes of the NMOS tubes are respectively connected with the control module, so that the control module can acquire the voltage values output by the source electrodes of the NMOS tubes or determine the conduction states of the NMOS tubes, and then the control module determines the on-off state of each load circuit according to the voltage values output by the source electrodes of the NMOS tubes or the conduction states of the NMOS tubes. The on-off state of each load circuit is determined based on the voltage value output by the source electrode of each NMOS tube or the on-state of each NMOS tube through a control module in the battery management system, so that the battery management system has a simpler circuit structure, and the battery management system has lower cost.
It should be understood that the switches included in each load circuit are stored in the storage space readable by the control module in advance, when the control module determines that one load circuit is turned on based on the voltage value output by the source of each NMOS transistor or the on-state of each NMOS transistor, it determines that other load circuits are in the off-state, and further, according to the switch information included in each load circuit stored in the storage space, it may be determined that each switch in the on-state load circuit is in the on-state, and each switch in the off-state load circuit is in the off-state.
In one possible implementation, as shown in fig. 3, the first power supply E1 may be a voltage output port on the control module. A control module in the battery management system is coupled with a battery cell module E2, the battery cell module E2 supplies power to the control module, a voltage output port on the control module is connected with a first end of a first resistor R1, and a first NMOS (N-channel metal oxide semiconductor) tube M is connected with the voltage output port on the control module through a first resistor R11The grid electrode provides driving voltage, a first power supply does not need to be arranged in the identification circuit independently, and the identification circuit is ensured to have a simpler circuit structure.
Battery pack
Fig. 6 is a schematic block diagram of a battery pack according to an embodiment of the present application. As shown in fig. 6, the battery pack 600 includes a cell module 610 and a battery management system 620 in any of the embodiments described above. The battery cell module 610 is connected to the battery management system 620 and supplies 6 power to the battery management system 620.
Electronic device
FIG. 7 is a schematic block diagram of an electronic device of one embodiment of the present application. As shown in fig. 7, the electronic device 700 includes a load circuit 710 and a battery pack 720 in any of the embodiments described above. The load circuit 710 is coupled to a battery pack 720, and the battery pack 720 is configured to supply power to the load circuit 710.
In one possible implementation, the load circuits 710 include at least two, and the resistance value of each load circuit 710 is different.
In one possible implementation manner, the positive electrode of the battery cell module in the battery pack 702 is used to be connected to the load circuit 710, and the load circuit 710 is connected to the voltage dividing module through one pin of the electrical connector.
In one possible implementation, the electronic device 700 is a vacuum cleaner including three load circuits, a first load circuit includes a power switch of the vacuum cleaner, a second load circuit includes a working switch for adjusting a working mode of the vacuum cleaner, and a third load circuit includes a shift switch for adjusting a shift position of the vacuum cleaner. The battery pack is respectively connected with each load circuit, the on-off of each load circuit is controlled by a corresponding switch, and each load circuit can have different resistance values.
It should be noted that, the connection relationship between the battery pack and the load circuit in the electronic device, and the principle and process of detecting the on state of the load circuit are described in detail in the above identification circuit embodiment and battery management system embodiment, and specific reference may be made to the description in the above identification circuit embodiment and battery management system embodiment, which is not described herein again.
Commercial value of embodiments of the present application
The embodiment of the application solves the technical problem that a battery management system comprises a plurality of identification circuits and the circuit structure is complex, each identification circuit comprises a voltage division module and a signal generation module, when different load circuits are switched on, the voltage division modules can input different voltages to the signal generation modules, the signal generation modules can generate on-off signals used for indicating the switching on or off of the load circuits based on the voltages input by the voltage division modules, therefore, the on-off states of the load circuits can be identified through one identification circuit, and the number of the identification circuits in the battery management system is reduced, so that the circuit structure of the battery management system is simpler. In addition, different load circuits have different resistance values when being switched on, so that voltage values input into the identification circuit are different, the identification circuit generates a switching signal for indicating the switching-on or switching-off of the load circuit based on the input voltage value, and the switching-on or switching-off of each load circuit can be further determined based on the switching-on or switching-off signal. Therefore, the load circuits are connected with the identification circuit through one pin of the electric connector, and the voltage output by the load circuits is introduced into the identification circuit, so that the on or off of the load circuits can be determined, and the number of pins used for identifying the on-off state of the load circuits can be saved.
It should be understood that the embodiments in this specification are described in a progressive manner, and that the same or similar parts in the various embodiments may be referred to one another, with each embodiment being described with emphasis instead of the other embodiments. In particular, as for the method embodiments, since they are substantially similar to the methods described in the apparatus and system embodiments, the description is simple, and the relevant points can be referred to the partial description of the other embodiments.
It should be understood that the above description describes particular embodiments of the present specification. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.
It should be understood that an element described herein in the singular or shown in the figures only represents that the element is limited in number to one. Furthermore, modules or elements described or illustrated herein as separate may be combined into a single module or element, and modules or elements described or illustrated herein as single may be split into multiple modules or elements.
It is also to be understood that the terms and expressions employed herein are used as terms of description and not of limitation, and that the embodiment or embodiments of the specification are not limited to those terms and expressions. The use of such terms and expressions is not intended to exclude any equivalents of the features shown and described (or portions thereof), and it is recognized that various modifications may be made within the scope of the claims. Other modifications, variations, and alternatives are also possible. Accordingly, the claims should be looked to in order to cover all such equivalents.

Claims (14)

1. An identification circuit configured to be coupled to a load circuit, comprising: the voltage division module and the signal generation module;
the voltage dividing module is configured to divide a voltage input to the voltage dividing module;
the signal generation module is connected with the voltage division module and is configured to receive the voltage output by the voltage division module and generate an on-off signal for indicating the on-off of the load circuit.
2. The identification circuit of claim 1, wherein the signal generation module comprises N NMOS transistors coupled in series, N being a natural number greater than or equal to 2;
when the N NMOS tubes meet at least one of the following conditions, the signal generation module generates a switching-on/off signal for indicating the on/off of the load circuit:
(i) the combination of the voltage values output by the source electrodes of the N NMOS tubes is different;
(ii) and the combination of the conduction states of the N NMOS tubes is different.
3. The identification circuit of claim 2, wherein the signal generation module further comprises: a first power supply and a first resistor;
the drain electrode of a first NMOS tube in the N NMOS tubes is connected with the output end of the voltage division module, the grid electrode of the first NMOS tube is connected with the first end of the first resistor, and the second end of the first resistor is connected with the first power supply;
and the source electrode of an iNMOS transistor in the N NMOS transistors is connected with the grid electrode of an i +1NMOS transistor, the drain electrode of the iNMOS transistor is connected with the drain electrode of the i +1NMOS transistor, and i is a positive integer smaller than N.
4. The identification circuit of claim 1, wherein the voltage divider module is configured to be connected to at least two load circuits through one pin of an electrical connector.
5. The identification circuit of claim 2, wherein when the combination of the voltage values output by the sources of the N NMOS transistors is different, the signal generation module generates an on-off signal for indicating whether the load circuit is turned on or off, wherein the signal generation module is further configured to: in response to the N NMOS transistors being in the cut-off state, the signal generation module generates a signal for indicating that the load circuit is open.
6. The identification circuit of claim 2, wherein the voltage value output by the source of at least one of the NMOS transistors is within at least two ranges where there is no intersection, and is used to indicate that different load circuits are turned on.
7. The identification circuit of claim 3, wherein the signal generation module further comprises: the matching modules comprise N matching modules, and each matching module comprises a resistor or at least two resistors connected in series;
the source electrode of each NMOS tube in the N NMOS tubes is connected with the first end of one matching module;
and the second ends of the N matching modules are connected with the negative electrode of the battery cell module.
8. A battery management system, comprising: an electrical connector, a control module and an identification circuit as claimed in any of claims 1 to 7;
the identification circuit is connected with the electrical connector, the electrical connector being configured to be connected with a load circuit;
the control module is connected with the identification circuit and is configured to determine the on or off of the load circuit according to the on-off signal generated by the identification circuit.
9. The battery management system of claim 8,
the control module is used for determining the on or off of the load circuit according to the combination of the voltage values output by the source electrodes of the N NMOS tubes in the identification circuit and/or the combination of the on states of the N NMOS tubes in the identification circuit.
10. The battery management system according to claim 9, wherein the control module is connected to the sources of the N NMOS transistors, respectively, and the control module is configured to determine the on or off of the load circuit according to a combination of the source output voltage values of the N NMOS transistors.
11. A battery pack, comprising: a cell module and the battery management system of any of claims 8-10, the cell module being connected to and supplying power to the battery management system.
12. An electronic device, comprising: a load circuit and the battery pack of claim 11;
the load circuit is connected with the battery pack, and the battery pack is used for supplying power to the load circuit.
13. The electronic device according to claim 12, wherein the load circuits include at least two, and a resistance value of each of the load circuits is different.
14. The electronic device of claim 12 or 13, wherein the positive electrode of the cell module is configured to be connected to the load circuit, and the load circuit is connected to the voltage dividing module through one pin of an electrical connector.
CN202111524709.8A 2021-12-14 2021-12-14 Identification circuit, battery management system, battery pack and electronic device Pending CN114243830A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN202111524709.8A CN114243830A (en) 2021-12-14 2021-12-14 Identification circuit, battery management system, battery pack and electronic device
PCT/CN2022/126926 WO2023109314A1 (en) 2021-12-14 2022-10-24 Recognition circuit, battery management system, battery pack, and electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111524709.8A CN114243830A (en) 2021-12-14 2021-12-14 Identification circuit, battery management system, battery pack and electronic device

Publications (1)

Publication Number Publication Date
CN114243830A true CN114243830A (en) 2022-03-25

Family

ID=80755845

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111524709.8A Pending CN114243830A (en) 2021-12-14 2021-12-14 Identification circuit, battery management system, battery pack and electronic device

Country Status (2)

Country Link
CN (1) CN114243830A (en)
WO (1) WO2023109314A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023109314A1 (en) * 2021-12-14 2023-06-22 东莞新能安科技有限公司 Recognition circuit, battery management system, battery pack, and electronic device

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1396389A1 (en) * 2002-09-09 2004-03-10 Eurolites S.p.A. Electric power distribution system to a number of loads, particularly for motorvehicles
US20100261086A1 (en) * 2009-04-08 2010-10-14 Young Green Energy Co. Fuel Cell System and Power Management Method thereof
CN102882244A (en) * 2012-06-20 2013-01-16 深圳桑达国际电子器件有限公司 Battery managing system
CN103025018A (en) * 2012-12-14 2013-04-03 西安吉成光电有限公司 Light emitting diode (LED) drive circuit controlled by parallel connection high voltage metal oxide semiconductor (MOS) tube
CN203278205U (en) * 2013-05-11 2013-11-06 无锡中星微电子有限公司 Cascading battery protection circuit and system
CN103809467A (en) * 2012-11-05 2014-05-21 泰科电子(上海)有限公司 Intelligent connector
CN108733189A (en) * 2018-05-07 2018-11-02 曙光信息产业股份有限公司 A kind of voltage regulating device and method
CN111157877A (en) * 2019-12-31 2020-05-15 西安翔腾微电子科技有限公司 Off-state load open circuit detection circuit
CN112491106A (en) * 2020-10-16 2021-03-12 武汉蔚来能源有限公司 Load detection circuit, battery management system and vehicle
CN212749184U (en) * 2020-06-30 2021-03-19 宁德时代新能源科技股份有限公司 Current detection device and current detection system of battery pack
US20210176849A1 (en) * 2019-12-04 2021-06-10 Consumer Lighting (U.S.), Llc Device And Circuit For Protecting Controlled Loads, And Apparatus For Switching Between Loads
WO2023109314A1 (en) * 2021-12-14 2023-06-22 东莞新能安科技有限公司 Recognition circuit, battery management system, battery pack, and electronic device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH063376A (en) * 1992-06-24 1994-01-11 Matsushita Electric Works Ltd Loaded condition discrimination circuit
CN106501716B (en) * 2016-12-19 2020-08-18 宁波三星医疗电气股份有限公司 Single-phase electric meter open signal detection circuit and method based on resistance end sampling
CN107797047B (en) * 2017-09-27 2020-07-17 深圳和而泰智能控制股份有限公司 Load state detection method and device and electronic equipment
CN111897252B (en) * 2020-06-28 2022-05-17 杭州涂鸦信息技术有限公司 Load detection method, system and equipment

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1396389A1 (en) * 2002-09-09 2004-03-10 Eurolites S.p.A. Electric power distribution system to a number of loads, particularly for motorvehicles
US20100261086A1 (en) * 2009-04-08 2010-10-14 Young Green Energy Co. Fuel Cell System and Power Management Method thereof
CN102882244A (en) * 2012-06-20 2013-01-16 深圳桑达国际电子器件有限公司 Battery managing system
CN103809467A (en) * 2012-11-05 2014-05-21 泰科电子(上海)有限公司 Intelligent connector
CN103025018A (en) * 2012-12-14 2013-04-03 西安吉成光电有限公司 Light emitting diode (LED) drive circuit controlled by parallel connection high voltage metal oxide semiconductor (MOS) tube
CN203278205U (en) * 2013-05-11 2013-11-06 无锡中星微电子有限公司 Cascading battery protection circuit and system
CN108733189A (en) * 2018-05-07 2018-11-02 曙光信息产业股份有限公司 A kind of voltage regulating device and method
US20210176849A1 (en) * 2019-12-04 2021-06-10 Consumer Lighting (U.S.), Llc Device And Circuit For Protecting Controlled Loads, And Apparatus For Switching Between Loads
CN111157877A (en) * 2019-12-31 2020-05-15 西安翔腾微电子科技有限公司 Off-state load open circuit detection circuit
CN212749184U (en) * 2020-06-30 2021-03-19 宁德时代新能源科技股份有限公司 Current detection device and current detection system of battery pack
CN112491106A (en) * 2020-10-16 2021-03-12 武汉蔚来能源有限公司 Load detection circuit, battery management system and vehicle
WO2023109314A1 (en) * 2021-12-14 2023-06-22 东莞新能安科技有限公司 Recognition circuit, battery management system, battery pack, and electronic device

Non-Patent Citations (6)

* Cited by examiner, † Cited by third party
Title
ANANDA-RAO, K.等: "A Potential Controller for Smart Electrical Energy Management System", JOURNAL OF PHYSICS: CONFERENCE SERIES, vol. 1878, 2 July 2021 (2021-07-02) *
SUN BIN等: "Application of wireless monitoring technology on comprehensive management of solar lighting", COMPUTER MEASUREMENT & CONTROL, vol. 18, no. 9, 27 June 2011 (2011-06-27) *
刘海湾: "电动汽车充电电源的设计与研究", 中国优秀硕士学位论文全文数据库 (工程科技Ⅱ辑), vol. 2019, no. 2, 15 February 2019 (2019-02-15) *
张天兴;夏春华;刘艺平;邱选兵;曹龙山;: "基于单片机控制的矿用大电流高稳定数字本安电源", 煤矿安全, no. 09, 19 September 2018 (2018-09-19) *
李跃鹏;雷霖;高山山;万瑞罡;: "基于负载识别的降压直流开关电源设计", 成都大学学报(自然科学版), no. 01, 30 March 2018 (2018-03-30) *
郭昊坤;应展烽;: "高压输电线路上监测装置电源的研究与设计", 电工电气, no. 06, 15 June 2017 (2017-06-15) *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023109314A1 (en) * 2021-12-14 2023-06-22 东莞新能安科技有限公司 Recognition circuit, battery management system, battery pack, and electronic device

Also Published As

Publication number Publication date
WO2023109314A1 (en) 2023-06-22

Similar Documents

Publication Publication Date Title
US6828757B2 (en) Circuit for adjusting charging rate of cells in combination
KR20030089456A (en) Charging apparatus and charging method
CN104852439A (en) Electronic equipment and double-battery charging and discharging switching method
CN102005787A (en) Charging and discharging control circuit and charging type power supply device
US20230163604A1 (en) Series-parallel battery system
US20120032513A1 (en) Battery management circuit, battery module and battery management method
CN114243830A (en) Identification circuit, battery management system, battery pack and electronic device
CN111313374A (en) Battery system under-voltage protection circuit and method applied to electric bicycle BMS
CN108964215B (en) Charger
CN114024355A (en) Battery management circuit, battery management system, electric vehicle and battery management method
CN113419617A (en) Wearable device charging reset circuit and control method
CN105958576B (en) Battery charging management circuit and system
KR20180101756A (en) Appratus and method for wake-up sleep mode mcu
CN216904676U (en) Power supply switching circuit and electronic equipment
CN112147517B (en) Battery pack detection device and system
CN105990894A (en) Semiconductor device, power source unit, and electrical device
CN114008885B (en) Device to be charged and charging method
CN207926260U (en) A kind of multiple-way supply automatic switch-over circuit and supply unit
KR20210047750A (en) Battery management system and balancing method
CN113241815A (en) Battery charging management circuit and charging device
CN111463853A (en) Power supply circuit and robot apparatus
CN101436783A (en) Charging circuit and device
KR20210060208A (en) Cell balancing apparatus, battery apparatus including the same, and cell balancing method
JP2003079058A (en) Battery pack
US11929740B2 (en) Relay control apparatus

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination