WO2023124341A1 - 信号速率处理方法、装置及存储介质 - Google Patents

信号速率处理方法、装置及存储介质 Download PDF

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Publication number
WO2023124341A1
WO2023124341A1 PCT/CN2022/123247 CN2022123247W WO2023124341A1 WO 2023124341 A1 WO2023124341 A1 WO 2023124341A1 CN 2022123247 W CN2022123247 W CN 2022123247W WO 2023124341 A1 WO2023124341 A1 WO 2023124341A1
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payload
signal
rate
overhead
signal unit
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PCT/CN2022/123247
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English (en)
French (fr)
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苑岩
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中兴通讯股份有限公司
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0006—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
    • H04L1/0007—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format by modifying the frame length
    • H04L1/0008—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format by modifying the frame length by supplementing frame payload, e.g. with padding bits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W28/00—Network traffic management; Network resource management
    • H04W28/16—Central resource management; Negotiation of resources or communication parameters, e.g. negotiating bandwidth or QoS [Quality of Service]
    • H04W28/18—Negotiating wireless communication parameters
    • H04W28/22—Negotiating communication rate

Definitions

  • Embodiments of the present disclosure relate to the communication field, and in particular, relate to a signal rate processing method, device, and storage medium.
  • Synchronous Digital Hierarchy Synchronous Digital Hierarchy, referred to as Synchronous Transport Module-N (Synchronous Transport Module-N, referred to as STM-N) of SDH
  • Synchronous Transport Module-N Synchronous Transport Module-N
  • OTUk Optical Transport Unit-k
  • OTUcn Optical Transport Unit-on
  • Slicing Packet Network Slicing Packet Network, referred to as SPN for short
  • Flexible Ethernet Group Flexible Ethernet Group (Flexible Ethernet Group, referred to as flexe group).
  • the payload of a time slot-based fixed-rate signal is generally equipped with multiple low-speed other signals, such as multiple virtual container-4 (Virtual Container-4, VC-4) signals, OTUk and OTUCn installed in STM-N Multiple Optical Channel Data Unit-i (Optical Data Unit-i, referred to as ODUi) (i ⁇ k) signals are installed in the flexe group, and multiple flexible Ethernet client (flexe client) signals are installed in the flexe group.
  • Multiple other signals in typically need to be transmitted across multiple nodes.
  • fixed-rate signals based on time slots must be dismantled into multiple low-speed signals at each node and then repackaged into new signals, which makes the processing more complicated and has a larger processing delay.
  • Another processing method is to use the rate recovery technology to transparently transmit the signal. At this time, it is not necessary to know the internal structure of the payload, but the implementation of the rate recovery technology is more complicated, especially for multiple low-speed signals extracted from fixed-rate signals based on time slots. After low-speed signal cross-scheduling processing, the implementation difficulty of the rate recovery technology after low-speed signal cross-scheduling will be greatly improved, resulting in high hardware implementation costs.
  • Embodiments of the present disclosure provide a signal rate processing method, device, and storage medium to at least solve the problem in the related art that the signal needs to be dismantled and then repackaged or complex rate recovery techniques need to be used when the signal passes through an intermediate point, resulting in complicated processing. .
  • a signal rate processing method including: receiving a fixed rate signal with a first rate; generating a fixed rate signal with a second rate based on the fixed rate signal with the first rate;
  • the fixed rate signal includes overhead and payload
  • the payload includes padding payload and non-filling payload
  • the non-filling payload is divided into n time slots, and the n time slots are used for Carrying m sub-signals, m and n are positive integers, and m is less than or equal to n
  • the fixed rate signal with the first rate includes the first overhead, the first filling payload and the first non-filling payload
  • the having The fixed rate signal of the second rate includes a second overhead, a second stuff payload and said first non-stuff payload.
  • a signal rate processing device including: a receiving module configured to receive a fixed rate signal with a first rate; a rate processing module configured to receive a fixed rate signal based on the first rate The signal generates a fixed-rate signal with a second rate; wherein, the fixed-rate signal includes an overhead and a payload, and the payload includes a padding payload and a non-filling payload, and the non-filling payload is divided into n times Slots, the n time slots are used to carry m sub-signals, m and n are positive integers, and m is less than or equal to n; the fixed-rate signal with the first rate includes the first overhead, the first filling payload and a first non-stuffing payload; the fixed-rate signal having a second rate includes a second overhead, a second stuffing payload, and the first non-stuffing payload.
  • a computer-readable storage medium is provided, and a computer program is stored in the computer-readable storage medium, wherein the computer program is configured to execute any one of the above method embodiments when running in the steps.
  • an electronic device including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to perform any one of the above method implementations steps in the example.
  • Fig. 1 is the schematic diagram of a kind of load dividing time slot mode of the fixed rate signal based on time slot;
  • FIG. 2 is a hardware structural block diagram of a communication device of a signal rate processing method according to an embodiment of the present disclosure
  • Fig. 3 is a flowchart of a signal rate processing method according to an embodiment of the present disclosure
  • Fig. 4 is a structural block diagram of a signal rate processing device according to an embodiment of the present disclosure.
  • FIG. 5 is a flowchart of another signal rate processing method according to an embodiment of the present disclosure.
  • Fig. 6 is a structural block diagram of another signal rate processing device according to an embodiment of the present disclosure.
  • FIG. 7 is a schematic diagram of a way of dividing the payload of a time slot-based fixed-rate signal into time slots according to an embodiment of the present disclosure
  • FIG. 8 is a detailed flowchart of a time slot-based fixed-rate signal rate processing method according to an embodiment of the present disclosure
  • FIG. 9 is a schematic diagram of a signal format of a time slot-based fixed-rate signal according to Embodiment 1 of the present disclosure.
  • FIG. 10 is a schematic diagram of a signal format of a time slot-based fixed-rate signal according to Embodiment 2 of the present disclosure.
  • Fig. 11 is a schematic diagram of a signal format of a time slot-based fixed-rate signal according to Embodiment 3 of the present disclosure.
  • a fixed-rate signal based on a time slot refers to a signal whose rate is a fixed value.
  • the rate of a fixed-rate signal is defined by a standard organization.
  • the standard organization will give a theoretical value of the rate of the fixed-rate signal, but the fixed-rate information generated and processed by the hardware
  • the rate is generally generated by the local clock, and the rate of the local clock has a certain deviation from its nominal value, resulting in a certain deviation between the actual rate and the theoretical rate of the fixed rate signal.
  • the standard organization will define the rate and theoretical rate of the fixed rate signal at the same time
  • the maximum deviation range, such as plus or minus 100ppm, 1ppm is equal to one millionth, that is, the rate of the fixed rate signal can be 100ppm faster or slower than the standard rate.
  • a fixed-rate signal based on a time slot includes two parts, overhead and payload.
  • Figure 1 is a schematic diagram of a method of dividing the load into time slots for a fixed-rate signal based on a time slot. As shown in Figure 1, the payload is divided into n time slots, and n is a positive integer.
  • the time slots here can be divided into n equal parts of the payload, and 1 portion corresponds to 1 time slot (of course, it can also correspond to multiple time slots), so n equal divisions correspond to n time slots.
  • the time-slot-based fixed-rate signal is composed of signal units, which can be k bytes, where k is an integer greater than or equal to 1, or a 64/66b encoding block, or u similar to a 64/66b encoding block /vb coding block, where u and v are integers greater than 1, u/vb may be 256/257b coding block, 512/513b coding block, etc. All signal units are functionally divided into overhead and payload, and the payload part is divided There are n time slots, and n time slots can be used to install one or more low-speed signals.
  • the fixed rate signal based on time slot is used in the optical transmission equipment, and the signals used for transmission in the optical fiber in various optical transmission equipment are fixed rate information based on the time slot, such as STM-N of SDH, OTUk of OTN, OTUcn , the flexe group of SPN.
  • Multiple other low-speed signals are generally installed in the payload of a fixed-rate signal based on time slots. For example, multiple VC-4 signals are installed in STM-N, and multiple ODUi (i ⁇ k) are installed in OTUk and OTUCn.
  • Signal, multiple flexe client signals are installed in the flexe group.
  • the payload rate will also change, so that the time slot from the low-speed signal to the payload needs to be re-adapted, so multiple low-speed signals must first be extracted from the fixed-rate signal based on the time slot signal, and then repack multiple low-speed signals into the changed-rate, slot-based, fixed-rate signal.
  • Multiple other signals in the payload generally need to be transmitted across multiple nodes.
  • fixed-rate signals based on time slots must be removed and regenerated at each node, but there are exceptions.
  • OTUk can support ODUk transparent transmission at intermediate nodes.
  • ODUk and OTUk share the same payload, and OTUk only has some more overhead than ODUk, so OTUk and ODUk can be considered as the same signal. If all other low-speed signals in the payload of a time-slot-based fixed-rate signal go to the same place through an intermediate point, for flexe group and STM-N, it must generally be disassembled to obtain multiple internal low-speed signals and then repackaged For the new flexe group and STM-N signals, the processing is complicated, because first of all, it is necessary to know the internal structure of the payload, that is, the corresponding relationship between n time slots in the payload and multiple low-speed signals, in order to solve multiple low-speed signals.
  • the processing of signals is complicated and the processing delay is relatively large.
  • the rate recovery technology can also be used to transparently transmit flexe group and STM-N signals, so that the internal structure of the payload is not known, the rate recovery technology is also complicated to implement.
  • OTUk can remove multiple low-speed ODUi and then reload them into a new OTUk, or it can be processed in the OTUk-ODUk-OTUk manner. Recover the ODUk rate, and then generate a new OTUk clock based on the recovered ODUk clock, that is, the rate of the new OTUk is the same as that of the old OTUk, and the rate recovery technology is also required.
  • the embodiment of the present disclosure makes some changes to the payload of the time slot-based fixed-rate signal, and divides the payload of the time-slot-based fixed-rate signal into padding payload (there must be a padding payload at a certain interval in the payload) and non-filling payload.
  • the non-filling payload is divided into n equal parts, so that when changing the rate of the fixed-rate signal based on the time slot, it is only necessary to increase or decrease the number of filling payloads in the payload, and the non-filling payload remains transparently transmitted , which can ensure the transparent transmission of multiple low-speed services in the payload, and does not need to know the corresponding relationship between the time slots in the payload and the low-speed services.
  • the local clock can be used to modify its rate, without using complex clock recovery techniques, and at the same time without knowing the structure in the payload. There is no need to dismantle the low-speed signal inside its payload and then reload it.
  • FIG. 2 is a block diagram of a hardware structure of a communication device according to a signal rate processing method according to an embodiment of the present disclosure.
  • the communication device may include one or more (only one is shown in FIG.
  • processor 202 may include but not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA, etc.
  • a memory 204 for storing data and a chip or FPGA 210 wherein the above-mentioned communication device may also include a transmission device 206 and an input/output device 208 for communication functions.
  • FIG. 2 is only a schematic diagram, and does not limit the structure of the above-mentioned communication device.
  • the communication device may also include more or fewer components than shown in FIG. 2, or have a different configuration than that shown in FIG.
  • the memory 204 can be used to store computer programs, for example, software programs and modules of application software, such as the computer programs used to configure the chip or FPGA 210 to realize the signal rate processing method in the embodiment of the present disclosure.
  • the computer program in memory 204 thus executes the disposition to chip or FPGA 210, to realize above-mentioned signal rate processing method.
  • the memory 204 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory.
  • the memory 204 may further include memory located remotely relative to the processor 202, and these remote memories may be connected to communication devices through a network. Examples of the aforementioned networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.
  • the transmission device 206 is used to receive or transmit data via a network.
  • the specific example of the above-mentioned network may include a wireless network provided by a communication provider of the communication device.
  • the transmission device 206 includes a network interface controller (NIC for short), which can be connected to other network devices through a base station so as to communicate with the Internet.
  • the transmission device 206 can communicate with the Internet in a wired or wireless manner.
  • FIG. 3 is a flowchart of a signal rate processing method according to an embodiment of the present disclosure. As shown in FIG. 3 , the process includes the following steps :
  • Step S302 receiving a fixed rate signal with a first rate, wherein the fixed rate signal includes an overhead and a payload, the payload includes a padding payload and a non-filling payload, and the non-filling payload is divided into n time slots, the n time slots are used to carry m sub-signals, m and n are positive integers, and m is less than or equal to n; the fixed-rate signal with the first rate includes a first overhead, a first filling payload and the first non-padding payload.
  • the deviation of the first rate from an ideal value of the rate of the fixed rate signal is within a predetermined speed regulation range.
  • Step S304 generating a fixed-rate signal with a second rate based on the fixed-rate signal with the first rate, wherein the fixed-rate signal includes an overhead and a payload, and the payload includes a stuffing payload and a non-filling payload , the non-filling payload is divided into n time slots, and the n time slots are used to carry m sub-signals, m and n are positive integers, and m is less than or equal to n; the second rate
  • the fixed rate signal includes a second overhead, a second stuff payload and said first non-stuff payload.
  • the second rate is generated by a local clock, and the deviation between the second rate and the ideal value of the rate of the fixed rate signal is within a predetermined speed regulation range.
  • the non-stuffing payload may be divided into n time slots in the following manner: every n ⁇ a consecutive non-stuffing payload signal units in the fixed rate signal are divided is n time slots, wherein each a said non-filling payload signal unit corresponds to one time slot, and each time slot in the n time slots corresponds to a serial number, and a is a positive integer.
  • the fixed-rate signal includes at least one stuffing payload within a predetermined time interval, that is, there must be a stuffing payload in the payload of the fixed-rate signal every predetermined time interval.
  • the overhead may include a time slot number indication overhead, which is used to indicate the number of the time slot corresponding to at least one of the non-stuffing payloads in the payload.
  • said slot number indicates that overhead is reset based on said second padding payload and said first non-filling payload.
  • the overhead may include padding payload indication overhead for indicating the location of the padding payload, or the padding payload may indicate that it is a padding payload in some way payload, thus enabling the communication device to know where the padding payload is located within the fixed-rate signal.
  • said padding payload indicates overhead needs to be reset based on said second padding payload and said first non-padding payload.
  • the overhead and payload included are logical concepts, but in physical implementation, the fixed-rate signal can often include signal units, for example, the fixed-rate signal can often be composed of, but not limited to, signal units , the actual overhead and payload are the specific functional division of the signal unit.
  • the signal unit can be divided into an overhead signal unit and a payload signal unit according to different functions, and the payload signal unit can be divided into a filling payload signal unit and a non-filling payload signal unit, wherein the overhead signal unit corresponds to the The overhead of the fixed-rate signal, and the payload signal unit corresponds to the payload of the fixed-rate signal, the padding payload signal unit corresponds to the padding payload, and the non-filling payload signal unit corresponds to the Non-padding payload.
  • each signal unit may be composed of k bytes, 64/66b coding blocks, or u/vb coding blocks.
  • the fixed-rate signal in the embodiment of the present disclosure may have multiple implementation manners, and correspondingly, there may also be multiple implementation manners for the time slot number indication overhead and the padding payload indication overhead, which will be described in detail below.
  • the fixed-rate signal has a frame structure, that is, the overhead signal unit and the payload signal unit form a frame, wherein the overhead signal unit includes frame header overhead to indicate the frame
  • Each frame consists of s overhead signal units and t payload signal units.
  • R consecutive frames can form a multiframe, and the s overhead signal units of different frames in the multiframe can be defined as the same overhead, or can be defined as different overheads when necessary, so as to expand the types of overheads that can be carried.
  • at most one padding payload is included in each multiframe.
  • each signal unit may consist of k bytes, 64/66b coded blocks, or u/vb coded blocks, where k is a positive integer, and the 64/66b
  • the encoding block or the u/vb encoding block is divided into a data encoding block and a control encoding block, and u and v are integers greater than 1.
  • the above frame may be a fixed-length frame.
  • s, t, and r are all positive integers, and the values of s, t corresponding to different frames remain unchanged.
  • the above-mentioned frame may also be an indefinite-length frame, or a variable-length frame.
  • s, t, and r are all positive integers, and the values of s, t corresponding to different frames are variable.
  • the overhead signal unit may include padding payload indication overhead, which is used to indicate whether there is any The filling payload signal unit and the position of the filling payload signal unit in the multiframe.
  • said padding payload indicates that overhead is reset based on said second padding payload and said first non-padding payload.
  • the padding payload signal unit is composed of a specific
  • the control coding block of the pattern is composed of w data coding blocks with a specific pattern, where w is an integer greater than or equal to 0.
  • padding may be 1 control code, or 1 control code followed by an integer number of data codes, for example, 1 control code plus 3 data codes.
  • control coding blocks can indicate the position of the Ethernet frame header, frame tail position, inter-frame filling information, local error, and remote error. These are all control coding blocks with different code types. Expressed.
  • the padding payload signal unit is composed of a specific pattern control coding block and w data coding blocks with a specific pattern, and the padding payload signal unit can be distinguished from other control coding blocks, Therefore, the communication device can identify the filling payload signal unit, and know the position of the filling payload signal unit in the fixed-rate signal.
  • the overhead signal unit may include a time slot number indicating overhead, which is used to indicate the number of the time slot corresponding to the non-filling payload signal unit at a specific position, wherein the specific Locations can include one of the following:
  • said slot number indicates the first of said non-stuffing payload signal units after overhead
  • said slot number indicates a first of said non-fill payload signal units preceding overhead
  • the first non-stuffing payload signal unit after the overhead signal unit at a specified position in the multiframe;
  • the first non-stuffing payload signal unit before the overhead signal unit at a specified position in the multiframe is the first non-stuffing payload signal unit before the overhead signal unit at a specified position in the multiframe.
  • said slot number indicates that overhead is reset based on said second stuffing payload and said first non-filling payload.
  • the fixed-rate signal does not have a frame structure, that is, there is no frame in the fixed-rate signal, and the overhead signal unit is arranged in the payload signal unit according to a predetermined rule or irregularly.
  • each signal unit may be composed of a 64/66b coded block or a u/vb coded block, wherein the 64/66b coded block or the u/vb coded block It is divided into a data coding block and a control coding block, and u and v are integers greater than 1.
  • each signal unit is composed of the 64/66b coded block or the u/vb coded block
  • the padding payload signal unit is composed of a control coded block of a specific pattern and w
  • a data encoding block with a specific code pattern is formed, wherein, w is an integer greater than or equal to 0.
  • padding may be 1 control code, or 1 control code followed by an integer number of data codes, for example, 1 control code plus 3 data codes.
  • control coding blocks can indicate the position of the Ethernet frame header, frame tail position, inter-frame filling information, local error, and remote error. These are all control coding blocks with different code types. Expressed.
  • the padding payload signal unit is composed of a specific pattern control coding block and w data coding blocks with a specific pattern, and the padding payload signal unit can be distinguished from other control coding blocks, Therefore, the communication device can identify the filling payload signal unit, and know the position of the filling payload signal unit in the fixed-rate signal.
  • the overhead signal unit may include a time slot number indicating overhead, which is used to indicate the number of the time slot corresponding to the non-filling payload signal unit at a specific position, wherein the specific Locations include one of the following:
  • said slot number indicates the first of said non-stuffing payload signal units after overhead
  • said slot number indicates a first of said non-fill payload signal units preceding overhead
  • the first non-stuffing payload signal unit before the overhead signal unit at a specified position is the first non-stuffing payload signal unit before the overhead signal unit at a specified position.
  • said slot number indicates that overhead is reset based on said second stuffing payload and said first non-filling payload.
  • the communication device can implement step S304 in a variety of ways, but it is worth noting that any processing method, as long as it can satisfy the fixed rate signal with the first rate and the fixed rate signal with the second rate described in the above step S302 and step S304
  • the relationship between rate signals should be considered to be within the scope of the present disclosure. Only two exemplary implementations are mentioned below, but it should not be understood that only these two ways can be used to implement.
  • the second non-fill payload can be obtained by adding and subtracting the first non-fill payload to change the rate to obtain the signal with the second rate. Fixed rate signal.
  • a fixed-rate signal with a first rate may be parsed first, the first overhead is processed, the first padding payload is deleted, and a second fixed-rate signal is generated according to a second rate, wherein
  • the second overhead may include at least one of the following: part of the first overhead; a regenerated third overhead; the payload in the second fixed-rate signal includes all of the first non-stuffing payload and a second padding payload, the second padding payload is padding regenerated from the signal rate of the payload of the fixed-rate signal with the second rate and the signal rate of the first non-filling payload Payload.
  • the payload since overhead and payload are provided in the fixed-rate signal, and the payload includes non-stuffed payload and stuffed payload divided into time slots, when changing the rate of the fixed-rate signal based on the time slot, By changing the filling payload according to the rate change, the rate of the non-filling payload can be guaranteed to be unchanged. Therefore, it can solve the problem that the signal needs to be dismantled and repackaged after the signal passes through the intermediate point in the related technology, or the complex rate restoration technology needs to be used, resulting in To deal with complex problems, change the rate of a slot-based fixed-rate signal without affecting the content in the slot, thereby reducing the cost of hardware processing at intermediate points and reducing the delay introduced by processing.
  • the method according to the above embodiments can be implemented by means of software plus a necessary general-purpose hardware platform, and of course also by hardware, but in many cases the former is better implementation.
  • the technical solution of the present disclosure can be embodied in the form of a software product in essence or the part that contributes to the prior art, and the computer software product is stored in a storage medium (such as ROM/RAM, disk, CD) contains several instructions to make a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) execute the methods described in various embodiments of the present disclosure.
  • a signal rate processing device is also provided, and the device is used to implement the above embodiments and preferred implementation modes, and what has been explained will not be repeated here.
  • the term "module” may be a combination of software and/or hardware that realizes a predetermined function.
  • the devices described in the following embodiments are preferably implemented in software, implementations in hardware, or a combination of software and hardware are also possible and contemplated.
  • Fig. 4 is a structural block diagram of a signal rate processing device according to an embodiment of the present disclosure. As shown in Fig. 4, the device includes:
  • the receiving module 42 is configured to receive a fixed-rate signal having a first rate; wherein the fixed-rate signal includes an overhead and a payload, and the payload includes a stuffing payload and a non-filling payload, and the non-filling payload is Divided into n time slots, the n time slots are used to carry m sub-signals, m and n are positive integers, and m is less than or equal to n; the fixed-rate signal with the first rate includes a first overhead, a first stuffing payload and a first non-filling payload;
  • the rate processing module 44 is configured to generate a fixed rate signal with a second rate based on the fixed rate signal with the first rate; wherein, the fixed rate signal includes overhead and payload, and the payload includes padding payload and Non-filling payload, the non-filling payload is divided into n time slots, and the n time slots are used to carry m sub-signals, m and n are positive integers, and m is less than or equal to n; the having The fixed rate signal of the second rate includes a second overhead, a second stuff payload and said first non-stuff payload.
  • the above-mentioned modules can be realized by software or hardware. For the latter, it can be realized by the following methods, but not limited to this: the above-mentioned modules are all located in the same processor; or, the above-mentioned modules can be combined in any combination The forms of are located in different processors.
  • FIG. 5 is a flow chart of another signal rate processing method according to an embodiment of the present disclosure. As shown in FIG. 5 , the process includes the following steps :
  • Step S502 generating a fixed-rate signal with a first rate, wherein the fixed-rate signal includes an overhead and a payload, the payload includes a padding payload and a non-filling payload, and the non-filling payload is divided into n time slots, the n time slots are used to carry m sub-signals, m and n are positive integers, and m is less than or equal to n; the fixed-rate signal with the first rate includes a first overhead, a first filling payload and the first non-padding payload.
  • Step S504 sending the fixed rate signal with the first rate.
  • the composition and exemplary implementation of the fixed-rate signal with the first rate, as well as the overhead content carried therein can be It is implemented with reference to the foregoing method embodiments, and the description will not be repeated here.
  • a signal rate processing device is also provided, and the device is used to implement the above embodiments and preferred implementation modes, and what has been explained will not be repeated here.
  • the term "module” may be a combination of software and/or hardware that realizes a predetermined function.
  • the devices described in the following embodiments are preferably implemented in software, implementations in hardware, or a combination of software and hardware are also possible and contemplated.
  • Fig. 6 is a structural block diagram of another signal rate processing device according to an embodiment of the present disclosure. As shown in Fig. 6, the device includes:
  • the generating module 62 is configured to generate a fixed-rate signal having a first rate, wherein the fixed-rate signal includes an overhead and a payload, and the payload includes a stuffing payload and a non-filling payload, and the non-filling payload is Divided into n time slots, the n time slots are used to carry m sub-signals, m and n are positive integers, and m is less than or equal to n; the fixed-rate signal with the first rate includes a first overhead, a first stuffing payload and a first non-filling payload;
  • the sending module 64 is configured to send the fixed rate signal with the first rate.
  • the above-mentioned modules can be realized by software or hardware. For the latter, it can be realized by the following methods, but not limited to this: the above-mentioned modules are all located in the same processor; or, the above-mentioned modules can be combined in any combination The forms of are located in different processors.
  • Embodiments of the present disclosure also provide a computer-readable storage medium, in which a computer program is stored, wherein the computer program is set to execute the steps in any one of the above method embodiments when running.
  • the above-mentioned computer-readable storage medium may include but not limited to: U disk, read-only memory (Read-Only Memory, referred to as ROM), random access memory (Random Access Memory, referred to as RAM) , mobile hard disk, magnetic disk or optical disk and other media that can store computer programs.
  • ROM read-only memory
  • RAM random access memory
  • mobile hard disk magnetic disk or optical disk and other media that can store computer programs.
  • Embodiments of the present disclosure also provide an electronic device, including a memory and a processor, where a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.
  • the electronic device may further include a transmission device and an input and output device, wherein the transmission device is connected to the processor, and the input and output device is connected to the processor.
  • the following is a detailed description of the rate processing method of a time slot-based fixed-rate signal through an exemplary embodiment.
  • the scheme does not need to know the The low-speed service is unloaded and reloaded, thereby reducing the implementation difficulty when the fixed-rate signal based on the time slot passes through the intermediate node transparently.
  • the time slot-based fixed-rate signal is composed of signal units, and the signal units are divided into overhead and payload according to functions, and the payload signal unit includes two types of stuffing payload signal unit and non-filling payload signal unit , to ensure that at least one stuffing payload signal unit will appear in the payload within a certain period of time, and divide the non-filling payload signal unit into n time slots according to a certain rule.
  • the time slot number is defined in the overhead to indicate the time slot number corresponding to a certain signal unit in the overhead, when changing the time slot-based fixed-rate signal
  • the padding payload is added or deleted according to the rate change to ensure that the rate of the non-filling payload remains unchanged, that is, by adjusting the padding payload signal unit, while keeping the rate of the non-filling payload signal unit constant
  • the content of the time slot number indication overhead is modified so that it can still indicate the time slot number corresponding to a certain signal unit.
  • time slot-based fixed-rate signal rate processing method The specific implementation of the time slot-based fixed-rate signal rate processing method will be described in detail below.
  • Fig. 8 is a detailed flowchart of a time slot-based fixed rate signal rate processing method according to an embodiment of the present disclosure. As shown in Fig. 8, the method includes the following steps:
  • the time slot-based fixed-rate signal is composed of signal units, which may be k bytes, or 64/66b codes, or similar u/vb codes, where u and v are integers greater than 1, u/v may be 256/257b, 512/513b, etc.
  • the time slot-based fixed-rate signal is divided into overhead and payload.
  • the signal unit is divided into overhead signal unit and payload signal unit.
  • the overhead signal unit corresponds to The overhead of the fixed-rate signal
  • the payload signal unit corresponds to the payload of the fixed-rate signal
  • the payload signal unit is divided into a filling payload signal unit and a non-filling payload signal unit, wherein the non-filling payload signal unit is divided into n Time slot, n is an integer greater than or equal to 1, m low-speed signals can be loaded into n time slots, m is an integer greater than or equal to 1 and m is less than or equal to n.
  • the overhead of the fixed-rate signal includes a time slot number indication overhead, which indicates a time slot number corresponding to a certain non-filled payload signal unit in the payload.
  • the overhead and payload of a time slot-based fixed-rate signal may be uniformly distributed, that is, the signal format is a fixed-length frame, and a frame consists of overhead of s signal units and payload of t signal units, and the signal unit is 64/66b coding block, or similar u/vb coding block, 64/66b coding block or u/vb coding block can be divided into control coding block and data coding block according to the code type, and there are many kinds of control coding blocks, one of which is One kind of control coding block is frame header control coding block, one kind of control coding block is padding payload coding block, the s information units corresponding to the overhead in one frame may be special control coding blocks or data coding blocks, and the payload corresponding to t A signal unit may be a special control coding block or data coding block.
  • the frame header control coding block only exists in the overhead, and the padding payload coding block only exists in the payload.
  • the padding payload coding block
  • Continuous r fixed-length frames can form a multiframe, r is a positive integer greater than or equal to 1, and the s overhead signal units of each frame of the multiframe are defined as different overheads, where the frame header controls the encoding block in a certain A certain overhead position of a fixed frame appears, and the frame header control coding block is used to determine the frame header position of each frame and the number of frames in the multiframe corresponding to each frame.
  • the signal unit corresponding to the payload in the fixed-length frame can be divided into a padding payload coding block and a non-filling payload coding block according to the coding block type, wherein the non-filling payload coding block is divided into n time slots, and the consecutive n
  • the non-fill payload encoding blocks are divided into n time slots, each encoding block corresponds to a time slot, each time slot has a time slot number, and the n time slots can be used to hold m low-speed signals.
  • the overhead of the fixed-length frame includes the time slot number indication overhead.
  • the time slot number indication overhead contains the first frame in the multiframe The time slot number corresponding to the first non-filling payload coding block in ;
  • another method is that the time slot number indicates that the content of the overhead includes the time slot number corresponding to the first non-filling payload coding block after the overhead;
  • another The method is that the time slot number indicates that the content of the overhead includes the time slot number corresponding to the first non-fill payload coding block before the overhead;
  • another method is that the time slot number indicates that the content of the overhead includes a specified The first non-filling payload signal unit after the overhead signal unit at the position;
  • another method is that the time slot number indicates that the content of the overhead includes the first one before the overhead signal unit at a specified position in the multiframe The non-fill payload signal unit.
  • the overhead and payload of a time slot-based fixed-rate signal may be evenly distributed, that is, the signal format is a fixed-length frame, and a frame is composed of s signal unit overhead and t signal unit payload, and the signal unit is K bytes, t signal units corresponding to the payload may have a padding payload signal unit, the position of the padding payload signal unit is indicated by the overhead, and the signal units in the payload except the padding payload signal unit are non-filling payloads signal unit.
  • Continuous r fixed-length frames can form a multiframe, r is a positive integer greater than or equal to 1, and the s overhead signal units of each frame of a multiframe are defined as different overheads.
  • the overhead includes frame header overhead, and the content of the frame header overhead is Fixed value, the fixed position of one or more fixed frames in the multiframe is defined as frame header overhead, which is used to determine the frame header position of each frame and the number of each frame in the multiframe frame.
  • the non-filling payload signal unit is divided into n time slots, and n consecutive non-filling payload signal units are divided into n time slots, and each non-filling payload signal unit corresponds to 1 time slot, each time slot has a time slot number, n time slots can be used to hold m low-speed signals.
  • the overhead of the fixed-length frame includes the time slot number indication overhead.
  • the time slot number indication overhead contains the first frame in the multiframe The time slot number corresponding to the first non-filling payload signal unit in ;
  • another method is that the time slot number indicates that the content of the overhead includes the time slot number corresponding to the first non-filling payload signal unit after the overhead;
  • another The method is that the time slot number indicates that the content of the overhead includes the time slot number corresponding to the first non-filled payload signal unit before the overhead;
  • the time slot number indicates that the content of the overhead includes a specified The first non-filling payload signal unit after the overhead signal unit at the position;
  • another method is that the time slot number indicates that the content of the overhead includes the first one before the overhead signal unit at a specified position in the multiframe The non-fill payload signal unit.
  • the overhead of the fixed-length frame includes the padding payload signal unit indication overhead, indicating whether the current multiframe has a padding payload signal unit, and the position of the padding payload signal unit in the multiframe. There can only be one at most in a multiframe Fill the payload signal unit.
  • the overhead and payload of a time slot-based fixed-rate signal may be non-uniformly distributed, that is, the signal format is a non-fixed-length frame or no frame structure, the signal is composed of signal units, and the signal units are 64/66b coded blocks, or Similar u/vb encoding blocks, 64/66b encoding blocks or u/vb encoding blocks can be divided into control encoding blocks and data encoding blocks according to the code type, among which there are many kinds of control encoding blocks, one of which is an overhead indicator Control coding block, a kind of control coding block is a filling payload coding block, and the coding blocks that make up the signal can be divided into overhead coding blocks and payload coding blocks according to their uses.
  • the overhead coding blocks appear in the signal coding blocks according to certain rules.
  • the overhead encoding block is realized by adding 0 or more data encoding blocks to the overhead indication encoding block.
  • the encoding blocks other than the overhead encoding block are payload encoding blocks.
  • the payload encoding block may include specific control encoding blocks and data encoding blocks. and padded payload encoding block
  • the payload encoding block can be divided into a padding payload encoding block and a non-filling payload encoding block according to the encoding block type, wherein the non-filling payload encoding block is divided into n time slots, and the The n consecutive non-filled payload encoding blocks are divided into n time slots, each encoding block corresponds to a time slot, each time slot has a time slot number, and the n time slots can be used to hold m low-speed signals.
  • the overhead includes a time slot number indication overhead
  • the content of the time slot number indication overhead includes the time slot number corresponding to the first non-filling payload encoding block following the overhead.
  • Step S804 when changing the rate of the time slot-based fixed-rate signal, modify the rate of the payload part by increasing or decreasing the non-filling payload signal unit, so as to ensure that the rate of the non-filling payload signal unit in the payload remains unchanged.
  • the rate change range is within a fixed limit range, and the payload signal unit must appear in the payload within a certain time interval.
  • Embodiment 1 Several application examples of the time slot-based fixed-rate signal rate processing method are given below through Embodiment 1 to Embodiment 3.
  • a fixed-rate signal based on a time slot includes overhead and payload.
  • the overhead and payload are evenly distributed.
  • the signal format is a fixed-length frame.
  • a frame has s signal unit overhead and t signal unit payload.
  • the signal unit is 64/66b coding block, or u/vb coding block similar to 64/66b coding block, where u and v are integers greater than 1, u/vb may be 256/257b coding block, 512/513b coding block, etc., u/
  • the vb coding block is divided into a control coding block and a data coding block. There are many types of control coding blocks.
  • a multiframe is composed of r consecutive fixed-length frames, r is a positive integer greater than or equal to 1, and s overheads for each frame of a multiframe
  • the signal unit is defined as different overheads, in which the special control coding block as the frame header appears in s overhead signal units of a fixed frame in the multiframe, and a special control coding block is defined as the padding payload coding block, and the padding
  • the payload coding block only exists in the payload, and all signal units in the non-filled payload coding block in the payload are divided into n time slots, and the time slots are divided into n consecutive signal units, and each signal unit corresponds to a time slot , each slot has a slot number.
  • the signal unit is divided into 4 time slots, and the time slots are divided into four consecutive signal units. Each signal unit corresponds to a time slot, and each time slot has a time slot number.
  • FIG. 9 is based on A schematic diagram of a signal format of a fixed-rate signal of a time slot is shown in FIG. 9 , and one rectangular block corresponds to one 64/66b coded block. Note that when dividing the non-filled payload encoding block in the payload into n time slots, continuous x*n signal units can also be divided into n time slots, where x is an integer greater than or equal to 1, that is, every Consecutive x signal units correspond to 1 time slot.
  • a certain overhead in the multiframe is named as the slot number indication overhead, which indicates the slot number of the first non-fill payload signal unit in the multiframe payload, or the slot number indication overhead indicates the first non-fill payload signal unit after this overhead.
  • the time slot number corresponding to the payload signal unit, and the time slot number indicates that the overhead needs to be reset when the payload code block is added or deleted in the payload.
  • a fixed-rate signal based on a time slot includes overhead and payload.
  • the overhead and payload are evenly distributed.
  • the signal format is a fixed-length frame.
  • a frame has s signal unit overhead and t signal unit payload.
  • the signal unit is w bytes, w is an integer greater than or equal to 1, and r consecutive fixed-length frames form a multiframe, r is a positive integer greater than or equal to 1, and the s overhead signal units of each frame in the multiframe are defined as different overheads , there is frame header overhead in s overhead signal units of a fixed frame in a multiframe.
  • the signal unit is a filling payload signal unit. All signal units in the payload that are not filling payload signal units are divided into n time slots.
  • the time slots are divided into n consecutive signal units.
  • An overhead in a multiframe is named a time slot The number indicates the overhead, indicates the slot number of the first non-filling payload signal unit in the multiframe, or indicates the slot number corresponding to the first non-filling payload signal unit after the overhead.
  • a padding payload position indicator overhead is defined in the multiframe overhead, indicating whether the current multiframe has a padding payload signal unit, and the location of the padding payload signal unit in the multiframe.
  • the time slot number indication overhead and the stuffing payload position indication overhead need to be reset when adding or deleting stuffing payload signal units in the payload.
  • FIG. 10 is a schematic diagram of the signal format of a time slot-based fixed-rate signal according to Embodiment 2 of the present disclosure. As shown in FIG. 10 , one rectangular block corresponds to eight byte.
  • the time slot-based fixed-rate signal includes overhead and payload.
  • the overhead and payload are unevenly distributed.
  • the signal format is a frameless structure.
  • the overhead is s signal units. s is an integer greater than or equal to 1, and s is not a fixed integer.
  • the signal unit other than the overhead is the payload, and the signal unit is 64/66b encoding, or similar u/vb encoding, where u/v may be 256/257b, 512/513b, etc., and the u/vb encoding block is divided into Control encoding block and data encoding block, wherein a special control encoding block is defined in the control encoding block as an overhead mark, followed by multiple data encoding blocks, and the payload is a data encoding block or a control encoding block, in which there are special control
  • the coding block is defined as a padding payload coding block.
  • the non-filling payload coding block in the signal payload is divided into n time slots, and the time slots are divided into n consecutive signal units.
  • a certain overhead is named as the slot number to indicate the overhead. Indicates the time slot number of the first non-filled payload signal unit following this overhead, and the time slot number indicates that the overhead needs to be reset when adding or deleting stuffing payload information in the payload.
  • the signal unit is 64/66b
  • the overhead may be 1 overhead indication plus 1 data encoding block, or 1 overhead indication plus 2 data encoding blocks
  • the special field in the overhead indication determines the following data
  • Fig. 11 is a schematic diagram of a signal format of a time slot-based fixed-rate signal according to Embodiment 3 of the present disclosure. As shown in Fig. 11 , one rectangular block corresponds to one 64/66b coding block.
  • the embodiments of the present disclosure provide a brand-new rate processing scheme for a time slot-based fixed-rate signal.
  • a time slot-based fixed-rate signal When changing the rate of a time-slot-based fixed-rate signal, it is not necessary to know the The low-speed services in the slots are unloaded and reloaded, thereby reducing the implementation difficulty when the fixed-rate signals based on time slots pass through the intermediate nodes transparently.
  • This solution has obvious technical advantages in intermediate point processing.
  • This new time slot-based fixed-rate signal rate processing method can be used in the new flex0 solution, and may also be used Other new interface signal schemes of OTN, or new interface signal schemes in the SPN standard, or used in the improved version of flexe.
  • each module or each step of the above-mentioned disclosure can be realized by a general-purpose computing device, and they can be concentrated on a single computing device, or distributed in a network composed of multiple computing devices In fact, they can be implemented in program code executable by a computing device, and thus, they can be stored in a storage device to be executed by a computing device, and in some cases, can be executed in an order different from that shown here. Or described steps, or they are fabricated into individual integrated circuit modules, or multiple modules or steps among them are fabricated into a single integrated circuit module for implementation. As such, the present disclosure is not limited to any specific combination of hardware and software.

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Abstract

本公开提供了一种信号速率处理方法、装置及存储介质。该方法包括：接收具有第一速率的固定速率信号；基于所述具有第一速率的固定速率信号生成具有第二速率的固定速率信号；其中，所述固定速率信号包括开销和净荷，所述净荷包括填充净荷和非填充净荷，所述非填充净荷被划分为n个时隙，所述n个时隙中用于承载m个子信号，m和n为正整数，且m小于或等于n；所述具有第一速率的固定速率信号包括第一开销、第一填充净荷和第一非填充净荷；所述具有第二速率的固定速率信号包括第二开销、第二填充净荷和所述第一非填充净荷。针对基于时隙的固定速率信号在不影响时隙中的内容的同时改变其速率，从而降低中间点硬件处理成本，减少处理引入的延迟。

Description

信号速率处理方法、装置及存储介质
相关申请的交叉引用
本公开基于2021年12月31日提交的发明名称为“信号速率处理方法、装置及存储介质”的中国专利申请CN202111679913.7，并且要求该专利申请的优先权，通过引用将其所公开的内容全部并入本公开。
技术领域
本公开实施例涉及通信领域，具体而言，涉及一种信号速率处理方法、装置及存储介质。
背景技术
基于时隙的固定速率信号在光传输设备中很常见，各种光传输设备中用于在光纤中传输的信号都是基于时隙的固定速率信息，例如同步数字体系(Synchronous Digital Hierarchy，简称为SDH)的同步传送模块-N(Synchronous Transport Module-N，简称为STM-N)，光传送网(Optical Transport Network，OTN)的光通道传送单元-k(Optical Transport Unit-k，简称为OTUk)、光通道传送单元-on(Optical Transport Unit-cn，简称为OTUcn)，切片分组网络(Slicing Packet Network，简称为SPN)的灵活以太网组(Flexible Ethernet Group，简称为flexe group)。
基于时隙的固定速率信号的净荷中一般都装了多个低速的其他信号，例如STM-N中装了多个虚拟容器-4(Virtual Container-4，VC-4)信号，OTUk和OTUCn中装了多个光通道数据单元-i(Optical Data Unit-i，简称为ODUi)(i＜k)信号，flexe group中装了多个灵活以太网客户端(flexe client)信号，其净荷中的多个其他信号一般需要跨过多个节点传输。一般基于时隙的固定速率信号在每个节点都要被拆散成多个低速信号后重新封装到新的信号中，这样处理比较复杂而且处理延迟较大。另一种处理方式是用速率恢复技术透传信号，此时不用知道净荷内部的结构，但速率恢复技术实现却比较复杂，尤其是基于时隙的固定速率信号拆出的多个低速信号需要经过低速信号交叉调度处理时，经过低速信号交叉调度后速率恢复技术的实现难度会有非常大的提升，导致硬件实现代价很高。
对于信号经过中间点时需要将信号拆散后重新封装或需要使用复杂的速率恢复技术，导致处理复杂的问题，目前尚无较好的解决方案。
发明内容
本公开实施例提供了一种信号速率处理方法、装置及存储介质，以至少解决相关技术中信号经过中间点时需要将信号拆散后重新封装或需要使用复杂的速率恢复技术，导致处理复杂的问题。
根据本公开的一些实施例，提供了一种信号速率处理方法，包括：接收具有第一速率的固定速率信号；基于所述具有第一速率的固定速率信号生成具有第二速率的固定速率信号；其中，所述固定速率信号包括开销和净荷，所述净荷包括填充净荷和非填充净荷，所述非填 充净荷被划分为n个时隙，所述n个时隙中用于承载m个子信号，m和n为正整数，且m小于或等于n；所述具有第一速率的固定速率信号包括第一开销、第一填充净荷和第一非填充净荷；所述具有第二速率的固定速率信号包括第二开销、第二填充净荷和所述第一非填充净荷。
根据本公开的一些实施例，提供了一种信号速率处理装置，包括：接收模块，设置为接收具有第一速率的固定速率信号；速率处理模块，设置为基于所述具有第一速率的固定速率信号生成具有第二速率的固定速率信号；其中，所述固定速率信号包括开销和净荷，所述净荷包括填充净荷和非填充净荷，所述非填充净荷被划分为n个时隙，所述n个时隙中用于承载m个子信号，m和n为正整数，且m小于或等于n；所述具有第一速率的固定速率信号包括第一开销、第一填充净荷和第一非填充净荷；所述具有第二速率的固定速率信号包括第二开销、第二填充净荷和所述第一非填充净荷。
根据本公开的一些实施例，提供了一种计算机可读存储介质，所述计算机可读存储介质中存储有计算机程序，其中，所述计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
根据本公开的一些实施例，提供了一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行上述任一项方法实施例中的步骤。
附图说明
图1是基于时隙的固定速率信号的一种净荷划分时隙方式的示意图；
图2是本公开实施例的一种信号速率处理方法的通讯设备的硬件结构框图；
图3是根据本公开实施例的一种信号速率处理方法的流程图；
图4是根据本公开实施例的一种信号速率处理装置的结构框图；
图5是根据本公开实施例的另一信号速率处理方法的流程图；
图6是根据本公开实施例的另一信号速率处理装置的结构框图；
图7是根据本公开实施例的基于时隙的固定速率信号的净荷划分时隙方式的示意图；
图8是根据本公开实施例的基于时隙的固定速率信号速率处理方法的详细流程图；
图9是根据本公开实施例1的基于时隙的固定速率信号的信号格式的示意图；
图10是根据本公开实施例2的基于时隙的固定速率信号的信号格式的示意图；
图11是根据本公开实施例3的基于时隙的固定速率信号的信号格式的示意图。
具体实施方式
基于时隙的固定速率信号指一个速率为固定值的信号，固定速率信号的速率由标准组织定义，标准组织会给出固定速率信号的速率的理论值，但硬件产生和处理的固定速率信息的速率一般由本地时钟产生，而本地时钟的速率和其标称值有一定的偏差，导致固定速率信号的实际速率和理论速率有一定的偏差，标准组织会同时定义固定速率信号的速率和理论速率的最大偏差范围，例如正负100ppm，1ppm等于一百万分之一，即固定速率信号的速率可以比标准速率快或慢100ppm。
基于时隙的固定速率信号包括开销和净荷两部分，图1是基于时隙的固定速率信号的一 种净荷划分时隙方式的示意图。如图1所示，净荷中被划分为n个时隙，n为正整数，这里的时隙可以是将净荷n等分，1份对应1个时隙(当然，也可以对应多个时隙)，这样n等分后对应n个时隙。在图1中基于时隙的固定速率信号由信号单元组成，信号单元可以是k个字节，k为大于等于1的整数，或者是64/66b编码块，或者类似64/66b编码块的u/vb编码块，其中u和v为大于1的整数，u/vb可能为256/257b编码块，512/513b编码块等，所有信号单元在功能上分为开销和净荷，净荷部分划分为n个时隙，n个时隙可以用来装一个或多个低速信号。
在光传输设备中使用基于时隙的固定速率信号，各种光传输设备中用于在光纤中传输的信号都是基于时隙的固定速率信息，例如SDH的STM-N，OTN的OTUk，OTUcn，SPN的flexe group。基于时隙的固定速率信号的净荷中一般都装了多个低速的其他信号，例如STM-N中装了多个VC-4信号，OTUk和OTUCn中装了多个ODUi(i＜k)信号，flexe group中装了多个flexe client信号。
如果改变基于时隙的固定速率信号的速率，则净荷速率也会改变，这样低速信号到净荷的时隙就要重新适配，所以必须先从基于时隙的固定速率信号取出多个低速信号，然后重新将多个低速信号装入改变了速率的基于时隙的固定速率信号中。净荷中的多个其他信号一般需要跨过多个节点传输，一般基于时隙的固定速率信号在每个节点都要拆掉后再生，但也有例外，OTUk可以支持ODUk在中间节点透传，ODUk和OTUk共用同样的净荷，OTUk仅仅比ODUk多了一些开销，所以OTUk和ODUk可以认为是同一个信号。如果基于时隙的固定速率信号的净荷中的所有其他低速信号都要经过中间点去同样的地方，对于flexe group和STM-N，一般必须将其拆散得到内部的多个低速信号后重新封装到新的flexe group和STM-N信号中，这样处理复杂，因为首先必须知道净荷内部的结构，即净荷中的n个时隙和多个低速信号的对应关系，才能解出多个低速信号，另外这样处理复杂而且处理延迟较大，虽然也能直接用速率恢复技术透传flexe group和STM-N信号，这样不用知道净荷内部的结构，但速率恢复技术同样实现复杂。对于OTUk也是类似，OTUk可以拆出多个低速ODUi后再重新装入新的OTUk中，也可以按照OTUk-ODUk-OTUk方式处理，此时不用知道OTUk内部的净荷，但仍旧需要从OTUk中恢复出ODUk的速率，然后根据恢复出的ODUk时钟产生新的OTUk的时钟，即新的OTUk和老的OTUk速率是一样的，同样需要速率恢复技术。
本公开实施例对基于时隙的固定速率信号的净荷做部分改动，将基于时隙的固定速率信号的净荷分成填充净荷(净荷中间隔一定时长一定有填充净荷)和非填充净荷两种，对非填充净荷做n等分，这样当改变基于时隙的固定速率信号的速率时，只需增加或减少净荷中填充净荷的数量，非填充净荷保持透传，即可保证净荷中的多个低速业务透传，且不用知道净荷内时隙和低速业务的对应关系。通过本公开实施例提供的方案，信号经过中间点且净荷内的所有低速信号需要透传时可以使用本地时钟修改其速率，不用使用复杂的时钟恢复技术，同时不用知道净荷中的结构，不用拆出其净荷内部的低速信号后再重新装入。
下文中将参考附图并结合实施例来详细说明本公开的实施例。
需要说明的是，本公开的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
本公开实施例中所提供的方法实施例可以在包括现场可编程门阵列(FPGA)、芯片或者类似的运算装置的通讯设备中执行。芯片或FPGA一般用在通讯设备的板卡上，通讯设备上一 般还有中央处理器(CPU)，其上可以运行有软件，CPU上运行软件可以与芯片或FPGA配合，用来修改或读取FPGA或芯片中的配置信息。以运行在一个普通的通讯设备上为例，图2是本公开实施例的一种信号速率处理方法的通讯设备的硬件结构框图。如图2所示，通讯设备可以包括一个或多个(图2中仅示出一个)处理器202(处理器202可以包括但不限于微处理器MCU或可编程逻辑器件FPGA等的处理装置)、用于存储数据的存储器204以及芯片或FPGA210，其中，上述通讯设备还可以包括用于通信功能的传输设备206以及输入输出设备208。本领域普通技术人员可以理解，图2所示的结构仅为示意，其并不对上述通讯设备的结构造成限定。例如，通讯设备还可包括比图2中所示更多或者更少的组件，或者具有与图2所示不同的配置。
存储器204可用于存储计算机程序，例如，应用软件的软件程序以及模块，如用于配置芯片或FPGA 210以实现本公开实施例中的信号速率处理方法对应的计算机程序，处理器202通过运行存储在存储器204内的计算机程序，从而执行对芯片或FPGA 210的配置，以实现上述的信号速率处理方法。存储器204可包括高速随机存储器，还可包括非易失性存储器，如一个或者多个磁性存储装置、闪存、或者其他非易失性固态存储器。在一些实例中，存储器204可进一步包括相对于处理器202远程设置的存储器，这些远程存储器可以通过网络连接至通讯设备。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
传输装置206用于经由一个网络接收或者发送数据。上述的网络具体实例可包括通讯设备的通信供应商提供的无线网络。在一个实例中，传输装置206包括一个网络适配器(Network Interface Controller，简称为NIC)，其可通过基站与其他网络设备相连从而可与互联网进行通讯。在一个实例中，传输装置206可以通过有线或无线的方式与互联网进行通讯。
在本实施例中提供了一种运行于通讯设备上的信号速率处理方法，图3是根据本公开实施例的一种信号速率处理方法的流程图，如图3所示，该流程包括如下步骤：
步骤S302，接收具有第一速率的固定速率信号，其中，所述固定速率信号包括开销和净荷，所述净荷包括填充净荷和非填充净荷，所述非填充净荷被划分为n个时隙，所述n个时隙中用于承载m个子信号，m和n为正整数，且m小于或等于n；所述具有第一速率的固定速率信号包括第一开销、第一填充净荷和第一非填充净荷。在至少一个示例性实施例中，所述第一速率和所述固定速率信号的速率的理想值的偏差在预定调速范围内。
步骤S304，基于所述具有第一速率的固定速率信号生成具有第二速率的固定速率信号，其中，所述固定速率信号包括开销和净荷，所述净荷包括填充净荷和非填充净荷，所述非填充净荷被划分为n个时隙，所述n个时隙中用于承载m个子信号，m和n为正整数，且m小于或等于n；所述具有第二速率的固定速率信号包括第二开销、第二填充净荷和所述第一非填充净荷。在至少一个示例性实施例中，所述第二速率由本地时钟产生，所述第二速率和所述固定速率信号的速率的理想值的偏差在预定调速范围内。
在至少一个示例性实施例中，所述非填充净荷可以通过以下方式被划分为n个时隙：所述固定速率信号中连续的每n×a个所述非填充净荷信号单元被划分为n个时隙，其中，每a个所述非填充净荷信号单元对应1个时隙，所述n个时隙中每个时隙对应一个编号，a为正整数。
在至少一个示例性实施例中，所述固定速率信号在预定时间间隔内包括至少一个所述填 充净荷，也就是说，所述固定速率信号的净荷中间隔预定时间间隔就一定有填充净荷，这样当改变基于时隙的固定速率信号的速率时，只需增加或减少净荷中填充净荷的数量，非填充净荷保持透传，即可保证净荷中的多个低速业务透传，且不用知道净荷内时隙和低速业务的对应关系。
在至少一个示例性实施例中，所述开销可以包括时隙编号指示开销，用于指示所述净荷中的至少一个所述非填充净荷对应的所述时隙的编号。在所述具有第二速率的固定速率信号中，所述时隙编号指示开销基于所述第二填充净荷和所述第一非填充净荷重新设置。
在至少一个示例性实施例中，所述开销可以包括填充净荷指示开销，用于指示所述填充净荷的位置，或者，所述填充净荷可以通过某些方式来指示其自身是一个填充净荷，这样，就可以使得通信设备能够获知填充净荷在固定速率信号中的位置。在所述具有第二速率的固定速率信号中，所述填充净荷指示开销需要基于所述第二填充净荷和所述第一非填充净荷重新设置。
在本公开实施例的固定速率信号中，包括的开销和净荷是逻辑概念，而在物理实现上，固定速率信号往往可以包括信号单元，例如，固定速率信号往往可以但不限于由信号单元构成，实际开销和净荷是信号单元具体功能划分。所述信号单元按照功能不同可以分为开销信号单元和净荷信号单元，所述净荷信号单元可以分为填充净荷信号单元和非填充净荷信号单元，其中，所述开销信号单元对应所述固定速率信号的开销，而所述净荷信号单元则对应所述固定速率信号的净荷，所述填充净荷信号单元对应所述填充净荷，所述非填充净荷信号单元对应所述非填充净荷。本公开实施例中，可以每个信号单元由k个字节、64/66b编码块、或u/vb编码块构成。
本公开实施例的固定速率信号可以有多种实施方式，相应地，时隙编号指示开销和填充净荷指示开销也有多种实施方式，以下详细进行说明。
(1)所述固定速率信号具有帧结构，也就是说，所述开销信号单元和所述净荷信号单元组成帧，其中，所述开销信号单元中包括帧头开销，用于指示所述帧的起始位置，每个帧由s个开销信号单元和t个净荷信号单元组成。连续r个帧可以组成一个复帧，复帧中不同帧的s个开销信号单元可以定义为相同的开销，也可以在需要时定义为不同的开销，以扩展所能携带的开销种类。在一些示例性实施例中，每个复帧中至多包含一个填充净荷。
在所述固定速率信号具有帧结构的情况下，每个信号单元可以由k个字节、64/66b编码块、或u/vb编码块构成，其中，k为正整数，所述64/66b编码块或所述u/vb编码块分为数据编码块和控制编码块，u、v为大于1的整数。
上述的帧可以为定长帧，此时，s、t、r均为正整数，不同帧对应的s、t的取值不变。
或者，上述的帧也可以为不定长帧，或称变长帧，此时，s、t、r均为正整数，不同帧对应的s、t的取值可变。
对于包括定长帧和变长帧的固定速率信号，在每个信号单元由k个字节构成的情况下，需要指示填充净荷的位置。因此，在至少一个示例性实施例中，在每个信号单元由k个字节构成的情况下，所述开销信号单元可以包括填充净荷指示开销，用于指示所述复帧中是否存在所述填充净荷信号单元、以及所述填充净荷信号单元在所述复帧中的位置。在至少一个示例性实施例中，在所述具有第二速率的固定速率信号中，所述填充净荷指示开销基于所述第二填充净荷和所述第一非填充净荷重新设置。
对于包括定长帧和变长帧的固定速率信号，在每个信号单元由所述64/66b编码块或所述u/vb编码块构成的情况下，所述填充净荷信号单元由一个特定码型的控制编码块和w个具有特定码型的数据编码块构成，其中，w为大于或等于0的整数。这里，填充可能是1个控制码，也可能是1个控制码后面跟着整数个数据码，例如1个控制码加3个数据码。控制编码块根据码型有很多种，例如控制编码块可以表示以太网帧头位置，帧尾位置，帧间填充信息，本地错误，远端错误，以上这些都是用不同码型的控制编码块表示的。在当前示例性实施例中，由一个特定码型的控制编码块和w个具有特定码型的数据编码块构成填充净荷信号单元，可以将填充净荷信号单元和其他控制编码块区别来，从而使得通信设备能够识别出填充净荷信号单元，获知填充净荷信号单元在固定速率信号中的位置。
在至少一个示例性实施例中，所述开销信号单元可以包括时隙编号指示开销，用于指示特定位置的所述非填充净荷信号单元对应的所述时隙的编号，其中，所述特定位置可以包括以下之一：
所述复帧中的第一个帧中的第一个所述非填充净荷信号单元；
所述时隙编号指示开销之后的第一个所述非填充净荷信号单元；
所述时隙编号指示开销之前的第一个所述非填充净荷信号单元；
所述复帧中的一指定位置的开销信号单元之后的第一个所述非填充净荷信号单元；
所述复帧中的一指定位置的开销信号单元之前的第一个所述非填充净荷信号单元。
在至少一个示例性实施例中，在所述具有第二速率的固定速率信号中，所述时隙编号指示开销基于所述第二填充净荷和所述第一非填充净荷重新设置。
(2)所述固定速率信号不具有帧结构，也就是说，所述固定速率信号中无帧，所述开销信号单元按照预定规律或无规律地设置在所述净荷信号单元中。
在所述固定速率信号不具有帧结构的情况下，每个信号单元可以由64/66b编码块或u/vb编码块构成，其中，所述64/66b编码块或所述u/vb编码块分为数据编码块和控制编码块，u、v为大于1的整数。
对于无帧结构的固定速率信号，每个信号单元由所述64/66b编码块或所述u/vb编码块构成，所述填充净荷信号单元由一个特定码型的控制编码块和w个具有特定码型的数据编码块构成，其中，w为大于或等于0的整数。这里，填充可能是1个控制码，也可能是1个控制码后面跟着整数个数据码，例如1个控制码加3个数据码。控制编码块根据码型有很多种，例如控制编码块可以表示以太网帧头位置，帧尾位置，帧间填充信息，本地错误，远端错误，以上这些都是用不同码型的控制编码块表示的。在当前示例性实施例中，由一个特定码型的控制编码块和w个具有特定码型的数据编码块构成填充净荷信号单元，可以将填充净荷信号单元和其他控制编码块区别来，从而使得通信设备能够识别出填充净荷信号单元，获知填充净荷信号单元在固定速率信号中的位置。
在至少一个示例性实施例中，所述开销信号单元可以包括时隙编号指示开销，用于指示特定位置的所述非填充净荷信号单元对应的所述时隙的编号，其中，所述特定位置包括以下之一：
所述时隙编号指示开销之后的第一个所述非填充净荷信号单元；
所述时隙编号指示开销之前的第一个所述非填充净荷信号单元；
一指定位置的开销信号单元之后的第一个所述非填充净荷信号单元；
一指定位置的开销信号单元之前的第一个所述非填充净荷信号单元。
在至少一个示例性实施例中，在所述具有第二速率的固定速率信号中，所述时隙编号指示开销基于所述第二填充净荷和所述第一非填充净荷重新设置。
通信设备可以通过多种方式来实现步骤S304，但是值得注意的是，任何处理方式，只要能够满足上述步骤S302和步骤S304中所描述的具有第一速率的固定速率信号和具有第二速率的固定速率信号之间的关系，即应当认为是涵盖在本公开所要求的范围之内。以下仅仅举出两种示例性的实施方式，但是其不应当被理解为仅可以采用这两种方式来实现。作为一种实例性的实施方式，可以直接在具有第一速率的固定速率信号的基础上，通过加减第一非填充净荷得到第二非填充净荷从而改变速率，得到具有第二速率的固定速率信号。作为另一种示例性的实施方式，可以先解析具有第一速率的固定速率信号，处理所述第一开销，删除所述第一填充净荷，按照第二速率产生第二固定速率信号，其中所述第二开销可以包括以下至少之一：所述第一开销中的部分；重新生成的第三开销；所述第二固定速率信号中的净荷中包括所有所述第一非填充净荷和第二填充净荷，所述第二填充净荷是根据所述具有第二速率的固定速率信号的所述净荷的信号速率和所述第一非填充净荷的信号速率重新生成的填充净荷。
通过上述步骤，由于在固定速率信号中设置有开销和净荷，而净荷中包括非填充净荷以及被划分成时隙的填充净荷，当改变基于时隙的固定速率信号的速率时，根据速率变化通过改变填充净荷，即可保证非填充净荷的速率不变，因此，可以解决相关技术中信号经过中间点时需要将信号拆散后重新封装或需要使用复杂的速率恢复技术，导致处理复杂的问题，针对基于时隙的固定速率信号在不影响时隙中的内容的同时改变其速率，从而降低中间点硬件处理成本，减少处理引入的延迟。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到根据上述实施例的方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本公开的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端设备(可以是手机，计算机，服务器，或者网络设备等)执行本公开各个实施例所述的方法。
在本实施例中还提供了一种信号速率处理装置，该装置用于实现上述实施例及优选实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置较佳地以软件来实现，但是硬件，或者软件和硬件的组合的实现也是可能并被构想的。
图4是根据本公开实施例的一种信号速率处理装置的结构框图，如图4所示，该装置包括：
接收模块42，设置为接收具有第一速率的固定速率信号；其中，所述固定速率信号包括开销和净荷，所述净荷包括填充净荷和非填充净荷，所述非填充净荷被划分为n个时隙，所述n个时隙中用于承载m个子信号，m和n为正整数，且m小于或等于n；所述具有第一速率的固定速率信号包括第一开销、第一填充净荷和第一非填充净荷；
速率处理模块44，设置为基于所述具有第一速率的固定速率信号生成具有第二速率的固定速率信号；其中，所述固定速率信号包括开销和净荷，所述净荷包括填充净荷和非填充净 荷，所述非填充净荷被划分为n个时隙，所述n个时隙中用于承载m个子信号，m和n为正整数，且m小于或等于n；所述具有第二速率的固定速率信号包括第二开销、第二填充净荷和所述第一非填充净荷。
需要说明的是，上述各个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述各个模块以任意组合的形式分别位于不同的处理器中。
本实施例中的具体示例可以参考上述实施例及示例性实施方式中所描述的示例，本实施例在此不再赘述。
在本实施例中提供了一种运行于通讯设备上的信号速率处理方法，图5是根据本公开实施例的另一信号速率处理方法的流程图，如图5所示，该流程包括如下步骤：
步骤S502，生成具有第一速率的固定速率信号，其中，所述固定速率信号包括开销和净荷，所述净荷包括填充净荷和非填充净荷，所述非填充净荷被划分为n个时隙，所述n个时隙中用于承载m个子信号，m和n为正整数，且m小于或等于n；所述具有第一速率的固定速率信号包括第一开销、第一填充净荷和第一非填充净荷。
步骤S504，发送所述具有第一速率的固定速率信号。
该实施例中，涉及具有第一速率的固定速率信号的发送端的通讯设备所执行的步骤，关于具有第一速率的固定速率信号的构成和示例性实施方式，以及其中携带的开销内容，均可以参照前述方法实施例来实现，在此不再重复描述。
在本实施例中还提供了一种信号速率处理装置，该装置用于实现上述实施例及优选实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置较佳地以软件来实现，但是硬件，或者软件和硬件的组合的实现也是可能并被构想的。
图6是根据本公开实施例的另一信号速率处理装置的结构框图，如图6所示，该装置包括：
生成模块62，设置为生成具有第一速率的固定速率信号，其中，所述固定速率信号包括开销和净荷，所述净荷包括填充净荷和非填充净荷，所述非填充净荷被划分为n个时隙，所述n个时隙中用于承载m个子信号，m和n为正整数，且m小于或等于n；所述具有第一速率的固定速率信号包括第一开销、第一填充净荷和第一非填充净荷；
发送模块64，设置为发送所述具有第一速率的固定速率信号。
需要说明的是，上述各个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述各个模块以任意组合的形式分别位于不同的处理器中。
本实施例中的具体示例可以参考上述实施例及示例性实施方式中所描述的示例，本实施例在此不再赘述。
本公开的实施例还提供了一种计算机可读存储介质，该计算机可读存储介质中存储有计算机程序，其中，该计算机程序被设置为运行时执行上述任一项方法实施例中的步骤。
在一个示例性实施例中，上述计算机可读存储介质可以包括但不限于：U盘、只读存储器(Read-Only Memory，简称为ROM)、随机存取存储器(Random Access Memory，简称为RAM)、移动硬盘、磁碟或者光盘等各种可以存储计算机程序的介质。
本公开的实施例还提供了一种电子装置，包括存储器和处理器，该存储器中存储有计算机程序，该处理器被设置为运行计算机程序以执行上述任一项方法实施例中的步骤。
在一个示例性实施例中，上述电子装置还可以包括传输设备以及输入输出设备，其中，该传输设备和上述处理器连接，该输入输出设备和上述处理器连接。
本实施例中的具体示例可以参考上述实施例及示例性实施方式中所描述的示例，本实施例在此不再赘述。
以下通过一示例性实施例，详细描述基于时隙的固定速率信号的速率处理方法，该方案在改变基于时隙的固定速率信号的速率时可以不用知道时隙结构，不用先将时隙内的低速业务解出再装入，从而降低了基于时隙的固定速率信号透明经过中间节点时的实现难度。
在当前示例性实施例中，基于时隙的固定速率信号由信号单元组成，信号单元按照功能分为开销和净荷，净荷信号单元包括填充净荷信号单元和非填充净荷信号单元两种，保证净荷中在一定时间内一定会出现至少1个填充净荷信号单元，将非填充净荷信号单元按照一定的规律划分为n个时隙，图7是根据本公开实施例的基于时隙的固定速率信号的净荷划分时隙方式的示意图，如图7所示，开销中定义时隙编号指示开销指示某个信号单元对应的时隙编号，当改变基于时隙的固定速率信号的速率时，根据速率变化填加或删除填充净荷，保证非填充净荷的速率不变，也就是说，通过调整填充净荷信号单元，在保持非填充净荷信号单元的速率不变的情况下修改所述固定速率信号的速率。同时，修改时隙编号指示开销的内容，使得其仍旧能指示某个信号单元对应的时隙编号。
以下对该基于时隙的固定速率信号速率处理方法的具体实施方式进行详细的描述。
图8是根据本公开实施例的基于时隙的固定速率信号速率处理方法的详细流程图，如图8所示，该方法包括以下步骤：
步骤S802，基于时隙的固定速率信号由信号单元组成，信号单元可能为k个字节，也可能为64/66b编码，或类似的u/vb编码，其中u和v为大于1的整数，u/v可能为256/257b，512/513b等，基于时隙的固定速率信号分为开销和净荷两部分，信号单元分为开销信号单元和净荷信号单元两种，开销信号单元对应于固定速率信号的开销，净荷信号单元对应于固定速率信号的净荷，净荷信号单元分为填充净荷信号单元和非填充净荷信号单元，其中非填充净荷信号单元被划分为n个时隙，n为大于等于1的整数，m个低速信号可以装入n个时隙中，m为大于等于1的整数且m小于等于n。
固定速率信号的开销包括时隙编号指示开销，指示净荷中某个非填充净荷信号单元对应的时隙编号。
以下给出几种固定速率信号的构成的具体实施方式，应当理解的是，这些实施方式仅仅是示例性的，并不应理解为对方案的限定，另外，这些实施方式仅仅是所有实施方式的一部分，而不应理解为是对所有实施方式的穷举。
(1)基于时隙的固定速率信号的开销和净荷可能为均匀分布，即信号格式为定长帧，一个帧由s个信号单元的开销和t个信号单元的净荷组成，信号单元为64/66b编码块，或类似的u/vb编码块，64/66b编码块或u/vb编码块根据码型可分为控制编码块和数据编码块，其中控制编码块有多种，其中一种控制编码块为帧头控制编码块，一种控制编码块为填充净荷编码块，1帧中开销对应的s个信息单元可能为特殊的控制编码块或数据编码块，净荷对应的t个信号单元可能为特殊的控制编码块或数据编码块，帧头控制编码块只存在于开销中， 填充净荷编码块只存在于净荷中，填充净荷编码块对应权1所述的净荷中的填充净荷信号单元
连续r个定长帧可以组成一个复帧，r为大于等于1的正整数，复帧每个帧的s个开销信号单元定义为不同的开销，其中帧头控制编码块在复帧中某个固定帧的某个开销位置出现，帧头控制编码块用于确定每一个帧的帧头位置以及每个帧对应复帧中的第几个帧。
定长帧中的净荷对应的信号单元根据编码块类型可分为填充净荷编码块和非填充净荷编码块，其中非填充净荷编码块被划分为n个时隙，将连续的n个非填充净荷编码块划分为n个时隙，每个编码块对应一个时隙，每个时隙有一个时隙编号，n个时隙可以用来装m个低速信号。
定长帧的开销中包括时隙编号指示开销，有多种方法通过时隙编号指示开销指示时隙编号，例如，一种方法为时隙编号指示开销的内容包含复帧中的第一个帧中第一个非填充净荷编码块对应的时隙编号；另一种方法为时隙编号指示开销的内容包含此开销后面第一个非填充净荷编码块对应的时隙编号；再一种方法为时隙编号指示开销的内容包含此开销之前的第一个非填充净荷编码块对应的时隙编号；再一种方法为时隙编号指示开销的内容包含所述复帧中的一指定位置的开销信号单元之后的第一个所述非填充净荷信号单元；又一种方法为时隙编号指示开销的内容包含所述复帧中的一指定位置的开销信号单元之前的第一个所述非填充净荷信号单元。
(2)基于时隙的固定速率信号的开销和净荷可能为均匀分布，即信号格式为定长帧，一个帧由s个信号单元的开销和t个信号单元的净荷组成，信号单元为k个字节，净荷对应的t个信号单元可能存在填充净荷信号单元，填充净荷信号单元的位置由开销指示，净荷中除了填充净荷信号单元以外的信号单元为非填充净荷信号单元。
连续r个定长帧可以组成一个复帧，r为大于等于1的正整数，复帧每个帧的s个开销信号单元定义为不同的开销，开销中包括帧头开销，帧头开销内容为固定值，在复帧中某1个或多个固定帧的固定位置被定义为帧头开销，帧头开销用于确定每一个帧的帧头位置以及每个帧对应复帧中的第几个帧。
定长帧中的净荷中，非填充净荷信号单元被划分为n个时隙，将连续的n个非填充净荷信号单元划分为n个时隙，每个非填充净荷信号单元对应1个时隙，每个时隙有一个时隙编号，n个时隙可以用来装m个低速信号。
定长帧的开销中包括时隙编号指示开销，有多种方法通过时隙编号指示开销指示时隙编号，例如，一种方法为时隙编号指示开销的内容包含复帧中的第一个帧中第一个非填充净荷信号单元对应的时隙编号；另一种方法为时隙编号指示开销的内容包含此开销后面第一个非填充净荷信号单元对应的时隙编号；再一种方法为时隙编号指示开销的内容包含此开销之前的第一个非填充净荷信号单元对应的时隙编号；再一种方法为时隙编号指示开销的内容包含所述复帧中的一指定位置的开销信号单元之后的第一个所述非填充净荷信号单元；又一种方法为时隙编号指示开销的内容包含所述复帧中的一指定位置的开销信号单元之前的第一个所述非填充净荷信号单元。
定长帧的开销中包括填充净荷信号单元指示开销，指示当前复帧是否有填充净荷信号单元，以及填充净荷信号单元在复帧中的位置，一个复帧中最多只能有1个填充净荷信号单元。
(3)基于时隙的固定速率信号的开销和净荷可能为非均匀分布，即信号格式为非定长帧 或无帧结构，信号由信号单元组成，信号单元为64/66b编码块，或类似的u/vb编码块，64/66b编码块或u/vb编码块根据码型可分为控制编码块和数据编码块，其中控制编码块有多种，其中一种控制编码块为开销指示控制编码块，一种控制编码块为填充净荷编码块，组成信号的编码块根据用途可分为开销编码块和净荷编码块，开销编码块按照某些特定规律出现在信号编码块中，开销编码块由开销指示编码块加0个或多个数据编码块实现，除过开销编码块以外的编码块为净荷编码块，净荷编码块中可能包括特定的控制编码块，数据编码块和填充净荷编码块
非定长帧或无帧结构中，净荷编码块根据编码块类型可分为填充净荷编码块和非填充净荷编码块，其中非填充净荷编码块被划分为n个时隙，将连续的n个非填充净荷编码块划分为n个时隙，每个编码块对应一个时隙，每个时隙有一个时隙编号，n个时隙可以用来装m个低速信号。
非定长帧或无帧结构中，开销中包括时隙编号指示开销，时隙编号指示开销的内容包含此开销后面第一个非填充净荷编码块对应的时隙编号。
需要说明的是，对于非定长帧，也可以采用实施方式(1)和(2)中对于定长帧的处理方式。
步骤S804，当改变基于时隙的固定速率信号的速率时，通过增加或减少非填充净荷信号单元修改净荷部分的速率，从而保证净荷中的非填充净荷信号单元速率不变。改变基于时隙的固定速率信号的速率时，速率改变幅度在固定的限制范围内，且在一定的时间间隔内净荷中一定会出现填充净荷信号单元。
以下通过实施例1至实施例3给出该基于时隙的固定速率信号速率处理方法的几个应用实例。
实施例1：
基于时隙的固定速率信号包括开销和净荷两部分，开销和净荷均匀分布，信号格式为定长帧，一个帧有s个信号单元的开销和t个信号单元的净荷，信号单元为64/66b编码块，或者类似64/66b编码块的u/vb编码块，其中u和v为大于1的整数，u/vb可能为256/257b编码块，512/513b编码块等，u/vb编码块分为控制编码块和数据编码块，其中控制编码块有多种，连续r个定长帧组成一个复帧，r为大于等于1的正整数，复帧每个帧的s个开销信号单元定义为不同的开销，其中作为帧头的特殊控制编码块在复帧中某个固定帧的s个开销信号单元中出现，定义一种特殊的控制编码块作为填充净荷编码块，填充净荷编码块只存在于净荷中，净荷中非填充净荷编码块的所有信号单元划分为n个时隙，时隙按照连续的n个信号单元划分，每个信号单元对应一个时隙，每个时隙有一个时隙编号。针对以上定义举例如下：例如信号单元为64/66b编码，r＝8，即连续的8帧作为一个复帧，s＝2，1帧中有2个开销信号单元，t＝9，1帧有9个信号单元的净荷，其中第1个复帧的第1个开销信号单元为帧头控制编码块，从而得到一个定长帧，n＝4，净荷中非填充净荷编码块的所有信号单元划分为4个时隙，时隙按照连续的4个信号单元划分，每个信号单元对应一个时隙，每个时隙有一个时隙编号，图9是根据本公开实施例1的基于时隙的固定速率信号的信号格式的示意图，如图9所示，1个矩形块对应1个64/66b编码块。注意，在将净荷中的非填充净荷编码块划分为n个时隙时，也可将连续x*n个信号单元划分为n个时隙，其中x为大于等于1的整数，即每连续的x个信号单元对应1个时隙。复帧中某个开销命名为时隙编号指示开销，指示复 帧净荷中第一个非填充净荷信号单元的时隙编号，或者时隙编号指示开销指示此开销后面第一个非填充净荷信号单元对应的时隙编号，时隙编号指示开销在净荷中增删填充净荷编码块时需要重新设置。
实施例2：
基于时隙的固定速率信号包括开销和净荷两部分，开销和净荷均匀分布，信号格式为定长帧，一个帧有s个信号单元的开销和t个信号单元的净荷，信号单元为w个字节，w为大于等于1的整数，连续r个定长帧组成一个复帧，r为大于等于1的正整数，复帧中每个帧的s个开销信号单元定义为不同的开销，复帧中某个固定帧的s个开销信号单元中有帧头开销，帧头开销的内容为特定值，每个复帧有r乘以t个信号单元的净荷，其中最多有1个信号单元为填充净荷信号单元，净荷中非填充净荷信号单元的所有信号单元划分为n个时隙，时隙按照连续的n个信号单元划分，复帧中某个开销命名为时隙编号指示开销，指示复帧中第一个非填充净荷信号单元的时隙编号，或者指示此开销后面第一个非填充净荷信号单元对应的时隙编号。另外在复帧开销中定义一个填充净荷位置指示开销，指示当前复帧是否有填充净荷信号单元，以及填充净荷信号单元在复帧中的位置。时隙编号指示开销和填充净荷位置指示开销在净荷中增删填充净荷信号单元时需要重新设置。针对以上定义举例如下，例如w＝8，s＝2，t＝9，r＝8，n＝4，即连续8个字节为一个信号单元，1帧中有2*8＝16字节的开销，连续的8帧作为一个复帧，复帧的第1帧的第1个8字节开销的前4字节定义为帧头开销，内容为0xf6f62828(0x表示16进制数字的开头)。每个复帧有8*9*8＝576个字节的净荷，其中最多有1个8字节为填充净荷信号单元，净荷中非填充净荷信号单元的所有信号单元划分为4个时隙，时隙按照连续的4个信号单元划分，图10是根据本公开实施例2的基于时隙的固定速率信号的信号格式的示意图，如图10所示，一个矩形块对应8个字节。
实施例3：
基于时隙的固定速率信号包括开销和净荷两部分，开销和净荷非均匀分布，信号格式为无帧结构，开销为s个信号单元，s为大于等于1个整数，s不是固定整数，除过开销之外的信号单元为净荷，信号单元为64/66b编码，或类似的u/vb编码，其中u/v可能为256/257b，512/513b等，u/vb编码块分为控制编码块和数据编码块，其中控制编码块中定义一种特殊的控制编码块作为开销标示，后面可跟多个数据编码块，净荷为数据编码块或控制编码块，其中有特殊的控制编码块被定义为填充净荷编码块，信号净荷中非填充净荷编码块划分为n个时隙，时隙按照连续的n个信号单元划分，某个开销命名为时隙编号指示开销，指示此开销后面的第一个非填充净荷信号单元的时隙编号，时隙编号指示开销在净荷中增删填充净荷信息时需要重新设置。举例如下：信号单元为64/66b，无帧结构，开销可能为1个开销指示加1个数据编码块，或1个开销指示加2个数据编码块，开销指示中的特殊字段决定后面的数据编码块数量以及数据编码块和开销指示编码块中部分字段的定义，n＝4，净荷中除过填充净荷编码块以外的所有编码块按照连续4个编码块为单位划分为4个时隙，图11是根据本公开实施例3的基于时隙的固定速率信号的信号格式的示意图，如图11所示，一个矩形块对应1个64/66b编码块。
综上所述，本公开实施例提供了一种全新的基于时隙的固定速率信号的速率处理方案，在改变基于时隙的固定速率信号的速率时可以不用知道时隙结构，不用先将时隙内的低速业务解出再装入，从而降低了基于时隙的固定速率信号透明经过中间节点时的实现难度。该方 案与现在的OTN和SPN的MTN相比，在中间点处理时具有明显的技术优势，该全新的基于时隙的固定速率信号的速率处理方法可用于新的flex0方案中，还可能用到OTN的其他新接口信号方案，或SPN标准中新接口信号的方案，或者用到flexe的改进版本中。
显然，本领域的技术人员应该明白，上述的本公开的各模块或各步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，它们可以用计算装置可执行的程序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成各个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样，本公开不限制于任何特定的硬件和软件结合。
以上所述仅为本公开的优选实施例而已，并不用于限制本公开，对于本领域的技术人员来说，本公开可以有各种更改和变化。凡在本公开的原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (18)

  1. 一种信号速率处理方法，包括：
    接收具有第一速率的固定速率信号；
    基于所述具有第一速率的固定速率信号生成具有第二速率的固定速率信号；
    其中，
    所述固定速率信号包括开销和净荷，所述净荷包括填充净荷和非填充净荷，所述非填充净荷被划分为n个时隙，所述n个时隙中用于承载m个子信号，m和n为正整数，且m小于或等于n；
    所述具有第一速率的固定速率信号包括第一开销、第一填充净荷和第一非填充净荷；
    所述具有第二速率的固定速率信号包括第二开销、第二填充净荷和所述第一非填充净荷。
  2. 根据权利要求1所述的方法，所述固定速率信号包括信号单元，所述信号单元按照功能不同分为开销信号单元和净荷信号单元，所述净荷信号单元分为填充净荷信号单元和非填充净荷信号单元，其中，所述开销信号单元对应所述固定速率信号的开销，所述净荷信号单元对应所述固定速率信号的净荷，所述填充净荷信号单元对应所述填充净荷，所述非填充净荷信号单元对应所述非填充净荷。
  3. 根据权利要求2所述的方法，其中，每个信号单元由k个字节、64/66b编码块、或u/vb编码块构成，其中，k为正整数，所述64/66b编码块或所述u/vb编码块分为数据编码块和控制编码块，u、v为大于1的整数；
    所述开销信号单元和所述净荷信号单元组成帧，其中，所述开销信号单元中包括帧头开销，用于指示所述帧的起始位置，每个帧由s个开销信号单元和t个净荷信号单元组成，连续r个帧组成一个复帧，其中，s、t、r均为正整数，不同帧对应的s、t的取值不变；
    或者，
    所述开销信号单元和所述净荷信号单元组成帧，其中，所述开销信号单元中包括帧头开销，用于指示所述帧的起始位置，每个帧由s个开销信号单元和t个净荷信号单元组成，连续r个帧组成一个复帧，其中，s、t、r均为正整数，不同帧对应的s、t的取值可变。
  4. 根据权利要求2所述的方法，其中，每个信号单元由64/66b编码块或u/vb编码块构成，其中，所述64/66b编码块或所述u/vb编码块分为数据编码块和控制编码块，u、v为大于1的整数；
    所述固定速率信号中无帧，所述开销信号单元按照预定规律或无规律地设置在所述净荷信号单元中。
  5. 根据权利要求3所述的方法，其中，
    在每个信号单元由k个字节构成的情况下，所述开销信号单元包括：填充净荷指示开销，指示所述复帧中是否存在所述填充净荷信号单元、以及所述填充净荷信号单元在所述复帧中的位置。
  6. 根据权利要求3或4所述的方法，其中，
    在每个信号单元由所述64/66b编码块或所述u/vb编码块构成的情况下，所述填充净荷 信号单元由一个特定码型的控制编码块和w个具有特定码型的数据编码块构成，其中，w为大于或等于0的整数。
  7. 根据权利要求3所述的方法，其中，所述开销信号单元包括：时隙编号指示开销，用于指示特定位置的所述非填充净荷信号单元对应的所述时隙的编号，其中，所述特定位置包括以下之一：
    所述复帧中的第一个帧中的第一个所述非填充净荷信号单元；
    所述时隙编号指示开销之后的第一个所述非填充净荷信号单元；
    所述时隙编号指示开销之前的第一个所述非填充净荷信号单元；
    所述复帧中的一指定位置的开销信号单元之后的第一个所述非填充净荷信号单元；
    所述复帧中的一指定位置的开销信号单元之前的第一个所述非填充净荷信号单元。
  8. 根据权利要求4所述的方法，其中，所述开销信号单元包括：时隙编号指示开销，用于指示特定位置的所述非填充净荷信号单元对应的所述时隙的编号，其中，所述特定位置包括以下之一：
    所述时隙编号指示开销之后的第一个所述非填充净荷信号单元；
    所述时隙编号指示开销之前的第一个所述非填充净荷信号单元；
    一指定位置的开销信号单元之后的第一个所述非填充净荷信号单元；
    一指定位置的开销信号单元之前的第一个所述非填充净荷信号单元。
  9. 根据权利要求7或8所述的方法，其中，在所述具有第二速率的固定速率信号中，所述时隙编号指示开销基于所述第二填充净荷和所述第一非填充净荷重新设置。
  10. 根据权利要求5所述的方法，其中，在所述具有第二速率的固定速率信号中，所述填充净荷指示开销基于所述第二填充净荷和所述第一非填充净荷重新设置。
  11. 根据权利要求1所述的方法，其中，所述第二填充净荷是根据所述具有第二速率的固定速率信号的所述净荷的信号速率和所述第一非填充净荷的信号速率重新生成的填充净荷。
  12. 根据权利要求1所述的方法，其中，所述第二开销包括以下至少之一：
    所述第一开销中的部分；
    重新生成的第三开销。
  13. 根据权利要求2-10中任一项所述的方法，其中，所述非填充净荷被划分为n个时隙包括：
    所述固定速率信号中连续的每n×a个所述非填充净荷信号单元被划分为n个时隙，其中，每a个所述非填充净荷信号单元对应1个时隙，所述n个时隙中每个时隙对应一个编号，a为正整数。
  14. 根据权利要求1-12中任一项所述的方法，其中，所述固定速率信号在预定时间间隔内包括至少一个所述填充净荷。
  15. 根据权利要求1-12中任一项所述的方法，其中，所述第二速率由本地时钟产生，所述第二速率和所述固定速率信号的速率的理想值的偏差在预定调速范围内。
  16. 根据权利要求1-12中任一项所述的方法，其中，所述第一速率和所述固定速率信号的速率的理想值的偏差在预定调速范围内。
  17. 一种信号速率处理装置，包括：
    接收模块，设置为接收具有第一速率的固定速率信号；
    速率处理模块，设置为基于所述具有第一速率的固定速率信号生成具有第二速率的固定速率信号；
    其中，
    所述固定速率信号包括开销和净荷，所述净荷包括填充净荷和非填充净荷，所述非填充净荷被划分为n个时隙，所述n个时隙中用于承载m个子信号，m和n为正整数，且m小于或等于n；
    所述具有第一速率的固定速率信号包括第一开销、第一填充净荷和第一非填充净荷；
    所述具有第二速率的固定速率信号包括第二开销、第二填充净荷和所述第一非填充净荷。
  18. 一种计算机可读存储介质，所述计算机可读存储介质中存储有计算机程序，其中，所述计算机程序被处理器执行时实现所述权利要求1至16任一项中所述的方法的步骤。
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