WO2023120086A1 - Circuit haute fréquence, circuit de suivi et circuit d'amplification de puissance électrique - Google Patents

Circuit haute fréquence, circuit de suivi et circuit d'amplification de puissance électrique Download PDF

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Publication number
WO2023120086A1
WO2023120086A1 PCT/JP2022/044295 JP2022044295W WO2023120086A1 WO 2023120086 A1 WO2023120086 A1 WO 2023120086A1 JP 2022044295 W JP2022044295 W JP 2022044295W WO 2023120086 A1 WO2023120086 A1 WO 2023120086A1
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Prior art keywords
power
power amplifier
circuit
supply voltage
power supply
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PCT/JP2022/044295
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English (en)
Japanese (ja)
Inventor
聡 田中
伸也 人見
弘嗣 森
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株式会社村田製作所
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Publication of WO2023120086A1 publication Critical patent/WO2023120086A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • the present invention relates to high frequency circuits, tracking circuits and power amplifier circuits.
  • 3GPP registered trademark (3rd Generation Partnership Project) is discussing power classes that allow higher maximum output power (for example, power class 1, 1.5, etc.) in mobile communication systems.
  • power class 1, 1.5, etc. the power consumption increases, so it is desired to improve efficiency in power amplification.
  • the power-added efficiency (PAE) is improved by applying the envelope tracking mode to the power amplifier circuit.
  • the present invention provides a high-frequency circuit, a tracking circuit, and a power amplifier circuit capable of improving PAE in a power amplifier circuit corresponding to a power class that allows a higher maximum output power than before.
  • a high-frequency circuit includes a power amplifier circuit and a tracking circuit connected to the power amplifier circuit, the tracking circuit indicating a first power class defined by a maximum power equal to or higher than a predetermined maximum power.
  • a power amplifier circuit is supplied with a power supply voltage in an average power tracking mode when a first control signal is received, and a second control signal is received indicating a second power class defined by a maximum power less than a predetermined maximum power. supply voltage to the power amplifier circuit in envelope tracking mode.
  • a tracking circuit supplies a power supply voltage to a power amplifier circuit in an average power tracking mode when a first control signal indicating a first power class defined by a maximum power equal to or higher than a predetermined maximum power is received. and supplying the power supply voltage in envelope tracking mode to the power amplifier circuit when a second control signal is received indicating a second power class defined by a maximum power less than the predetermined maximum power.
  • a power amplifier circuit corresponds to a first power class defined by a maximum power equal to or higher than a predetermined maximum power, and to which an average power tracking mode is applied and an envelope tracking mode is not applied; a second power amplifier that corresponds to a second power class defined by a maximum power that is less than a predetermined maximum power, to which an envelope tracking mode is applied and to which an average power tracking mode is not applied.
  • a high-frequency circuit includes a power amplifier circuit and a tracking circuit connected to the power amplifier circuit, wherein the tracking circuit performs first control indicating that output power exceeds threshold power for a predetermined period of time. supplying a power supply voltage in an average power tracking mode to a power amplifier circuit when a signal is received, and power amplifying when a second control signal is received indicating that the output power does not exceed the threshold power for a predetermined period of time; Supply the supply voltage to the circuit in envelope tracking mode.
  • PAE can be improved in a power amplifier circuit corresponding to a power class that allows a higher maximum output power than before.
  • FIG. 1A is a graph showing an example of transition of power supply voltage in average power tracking mode.
  • FIG. 1B is a graph showing an example of transition of power supply voltage in analog envelope tracking mode.
  • FIG. 1C is a graph showing an example of transition of power supply voltage in digital envelope tracking mode.
  • FIG. 2 is a circuit configuration diagram of the communication device according to the first embodiment.
  • FIG. 3 is a diagram showing a transmission state of high-frequency signals of the first power class in the communication device according to the first embodiment.
  • FIG. 4 is a diagram showing a transmission state of high-frequency signals of the second power class in the communication device according to the first embodiment.
  • FIG. 5 is a circuit configuration diagram of a communication device according to the second embodiment.
  • FIG. 6 is a circuit configuration diagram of a communication device according to the third embodiment.
  • FIG. 7 is a circuit configuration diagram of a communication device according to a fourth embodiment.
  • FIG. 8 is a circuit configuration diagram of a communication device according to a fifth embodiment.
  • FIG. 9 is a diagram showing a transmission state of high-frequency signals of the first power class in the communication device according to the fifth embodiment.
  • FIG. 10 is a diagram showing a transmission state of high-frequency signals of the second power class in the communication device according to the fifth embodiment.
  • FIG. 11 is a circuit configuration diagram of a communication device according to a sixth embodiment.
  • FIG. 12 is a diagram showing a transmission state of high-frequency signals of the first power class in the communication device according to the sixth embodiment.
  • FIG. 13 is a diagram showing a transmission state of high frequency signals of the second power class in the communication device according to the sixth embodiment.
  • FIG. 14 is a diagram showing a state of simultaneous transmission of a transmission signal of the second power class of band A and a transmission signal of band B in the communication apparatus according to the sixth embodiment.
  • FIG. 15
  • each drawing is a schematic diagram that has been appropriately emphasized, omitted, or adjusted in proportion to show the present invention, and is not necessarily strictly illustrated, and the actual shape, positional relationship, and ratio may differ.
  • substantially the same configurations are denoted by the same reference numerals, and redundant description may be omitted or simplified.
  • connection includes not only direct connection with connection terminals and/or wiring conductors, but also electrical connection via other circuit elements.
  • Connected between A and B means connected to both A and B between A and B, and means connected in series to a path connecting A and B.
  • the tracking mode is a mode for dynamically adjusting the power supply voltage applied to the power amplifier circuit.
  • the tracking mode is a mode for dynamically adjusting the power supply voltage applied to the power amplifier circuit.
  • APT average power tracking
  • ET envelope tracking
  • the tracking mode is not limited to these.
  • APT mode analog ET mode and digital ET mode will be explained with reference to FIGS. 1A to 1C.
  • the horizontal axis represents time and the vertical axis represents voltage.
  • a thick solid line represents the power supply voltage, and a thin solid line (waveform) represents the modulated wave.
  • FIG. 1A is a graph showing an example of transition of power supply voltage in APT mode.
  • APT mode the power supply voltage is varied to a plurality of discrete voltage levels on a frame-by-frame basis. As a result, the power supply voltage signal forms a square wave.
  • APT mode the voltage level of the power supply voltage is determined based on the average output power. Note that in the APT mode, the voltage level may change in units smaller than one frame (for example, subframes).
  • a frame means a unit that constitutes a high-frequency signal (modulated wave).
  • a frame contains 10 subframes, each subframe contains multiple slots, and each slot consists of multiple symbols.
  • the subframe length is 1 ms and the frame length is 10 ms.
  • FIG. 1B is a graph showing an example of changes in power supply voltage in the analog ET mode.
  • Analog ET mode is an example of ET mode.
  • the envelope of the modulated wave is tracked by continuously varying the supply voltage.
  • the power supply voltage is determined based on the envelope signal.
  • An envelope signal is a signal that indicates the envelope of a modulated wave.
  • the envelope value is represented by the square root of (I2+Q2), for example.
  • (I, Q) represent constellation points.
  • a constellation point is a point representing a signal modulated by digital modulation on a constellation diagram.
  • (I, Q) is determined by the BBIC 4, for example, based on transmission information.
  • FIG. 1C is a graph showing an example of transition of the power supply voltage in the digital ET mode.
  • Digital ET mode is an example of ET mode.
  • the envelope of the modulated wave is tracked by varying the power supply voltage to multiple discrete voltage levels within one frame.
  • the power supply voltage signal forms a square wave.
  • the power supply voltage level is selected or set from a plurality of discrete voltage levels based on the envelope signal.
  • FIG. 2 is a circuit configuration diagram of the communication device 5 according to this embodiment.
  • the communication device 5 includes a high frequency circuit 1, an antenna 2, an RFIC (Radio Frequency Integrated Circuit) 3, and a BBIC (Baseband Integrated Circuit) 4.
  • RFIC Radio Frequency Integrated Circuit
  • BBIC Baseband Integrated Circuit
  • the high-frequency circuit 1 transmits high-frequency signals between the antenna 2 and the RFIC 3.
  • the internal configuration of the high frequency circuit 1 will be described later.
  • the antenna 2 is connected to the high frequency circuit 1.
  • the antenna 2 receives a high frequency signal from the high frequency circuit 1 and outputs it to the outside.
  • the RFIC 3 is an example of a signal processing circuit that processes high frequency signals. Specifically, the RFIC 3 performs signal processing such as up-conversion on the transmission signal input from the BBIC 4 , and outputs the high-frequency transmission signal generated by the signal processing to the transmission path of the high-frequency circuit 1 .
  • the RFIC 3 also has a control section that controls the high frequency circuit 1 . Some or all of the functions of the RFIC 3 as a control unit may be implemented outside the RFIC 3, for example, in the BBIC 4 or the high frequency circuit 1.
  • control unit of RFIC 3 transmits at least control signal CTL1 or CTL2 to high-frequency circuit 1 .
  • the control signal CTL1 is an example of a first control signal and indicates a first power class defined by maximum power equal to or higher than a predetermined maximum power.
  • the control signal CTL2 is an example of a second control signal and indicates a second power class defined by a maximum power equal to or higher than a predetermined maximum power.
  • a power class is a classification of terminal output power defined by maximum output power, etc.
  • a smaller power class value indicates a higher output power.
  • the maximum output power for power class 1 is 31 dBm
  • the maximum output power for power class 1.5 is 29 dBm
  • the maximum output power for power class 2 is 26 dBm
  • the maximum output power for power class 3 is 23 dBm. .
  • the terminal's maximum output power is defined as the output power at the terminal's antenna end. Measurement of the maximum output power of the terminal is performed, for example, by a method defined by 3GPP or the like. For example, in FIG. 2 the maximum output power is measured by measuring the radiated power at antenna 2 . Instead of measuring the radiated power, it is also possible to measure the output power of the antenna 2 by providing a terminal near the antenna 2 and connecting a measuring instrument (such as a spectrum analyzer) to the terminal.
  • a measuring instrument such as a spectrum analyzer
  • the predetermined maximum power is empirically and/or experimentally predetermined according to the required performance of the communication device 5, the performance of the power amplifier circuit 10 and the tracking circuit 50, and the like.
  • 29 dBm is used as the predetermined maximum power. That is, in the present embodiment, power class 1 or 1.5 can be used as the first power class, and power class 2 or 3 can be used as the second power class.
  • the predetermined maximum power is not limited to 29 dBm, and may be 26 dBm or 31 dBm.
  • control signals CTL1 and CTL2 are not limited to control signals that directly indicate the first power class and the second power class, respectively. That is, the control signals CTL1 and CTL2 may be control signals that indirectly indicate the first power class and the second power class, respectively. For example, the control signals CTL1 and CTL2 may be control signals for different switches corresponding to the first power class and the second power class, respectively. Also, the control signals CTL1 and CTL2 may be flag signals indicating 0 or 1, for example. In this case, the flag signal indicating one of 0 and 1 corresponds to the control signal CTL1, and the flag signal indicating the other of 0 and 1 corresponds to the control signal CTL2.
  • the BBIC 4 is a baseband signal processing circuit that performs signal processing using an intermediate frequency band that is lower in frequency than the high frequency signal transmitted by the high frequency circuit 1 .
  • Signals processed by the BBIC 4 include, for example, image signals for displaying images and/or audio signals for calling through speakers.
  • circuit configuration of the communication device 5 shown in FIG. 2 is an example, and is not limited to this.
  • communication device 5 may not include antenna 2 and/or BBIC 4 .
  • the high frequency circuit 1 includes a power amplifier circuit 10 and a tracking circuit 50 .
  • the power amplifier circuit 10 is connected to the tracking circuit 50 and can receive power supply voltage from the tracking circuit 50 .
  • a detailed circuit configuration of the power amplifier circuit 10 will be described later.
  • the tracking circuit 50 can supply the power supply voltage VAPT in the APT mode to the power amplifier circuit 10 when the control signal CTL1 is received. On the other hand, when the control signal CTL2 is received, the tracking circuit 50 can supply the power supply voltage VET to the power amplifier circuit 10 in the ET mode. A detailed circuit configuration of the tracking circuit 50 will be described later.
  • power amplifier circuit 10 includes power amplifier 11 , filter 21 , input terminal 101 , power supply voltage terminal 102 , and output terminal 103 .
  • the input terminal 101 is a terminal for receiving a high frequency transmission signal from the outside of the high frequency circuit 1 .
  • the input terminal 101 is connected to the RFIC 3 outside the high frequency circuit 1 .
  • a power supply voltage terminal 102 is a terminal for receiving a power supply voltage from the tracking circuit 50 .
  • the power supply voltage terminal 102 is connected to the output terminal 502 of the tracking circuit 50 outside the power amplifier circuit 10 .
  • the output terminal 103 is a terminal for supplying a high frequency transmission signal to the outside of the high frequency circuit 1 .
  • the output terminal 103 is connected to the antenna 2 outside the high frequency circuit 1 .
  • the power amplifier 11 is connected between the input terminal 101 and the filter 21 and is also connected to the power supply voltage terminal 102 . Specifically, the input terminal of the power amplifier 11 is connected to the input terminal 101 , and the output terminal of the power amplifier 11 is connected to the filter 21 and the power supply voltage terminal 102 .
  • the power amplifier 11 corresponds to the first power class and the second power class. That is, the power amplifier 11 can be used for amplifying high frequency signals in both the first power class and the second power class.
  • the power class that the power amplifier supports can be identified by the maximum output power of the power amplifier.
  • the maximum output power of a power amplifier corresponding to power class 1 is greater than 31 dBm.
  • the higher the maximum output power the larger the size of the power amplifier. Therefore, by comparing the sizes of two power amplifiers, it may be possible to make a relative comparison of the power classes supported by the two power amplifiers.
  • the filter 21 is connected between the power amplifier 11 and the output terminal 103 . Specifically, one end of the filter 21 is connected to the output end of the power amplifier 11 and the other end of the filter 21 is connected to the output terminal 103 .
  • the filter 21 has a passband including band A and has a power handling capability corresponding to the first power class.
  • the filter 21 may be configured using any of a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, an LC resonance filter, and a dielectric resonance filter, and further , but not limited to these.
  • Band A is a frequency band for communication systems built using radio access technology (RAT).
  • Band A is defined in advance by standardization organizations (eg, 3GPP, Institute of Electrical and Electronics Engineers (IEEE), etc.).
  • Examples of communication systems include a 5GNR system, an LTE system, and a WLAN (Wireless Local Area Network) system.
  • n77, n78, or n79 for 5GNR can be used, and licensed bands and unlicensed bands included in the range of 5 GHz to 7.125 GHz can also be used.
  • power amplifier circuit 10 may comprise an impedance matching circuit connected between any two circuit elements (eg, power amplifier 11 and filter 21, etc.).
  • the impedance matching circuit can be composed of inductors and/or capacitors, for example.
  • the power amplifier circuit 10 may not include the filter 21 .
  • the tracking circuit 50 includes an average power tracker (APT) 51, an envelope tracker (ET) 52, a switch 53, a control terminal 501, an output terminal 502, Prepare.
  • APT average power tracker
  • ET envelope tracker
  • a control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high-frequency circuit 1 .
  • the control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1 .
  • the output terminal 502 is a terminal for supplying power supply voltage to the power amplifier circuit 10 .
  • the output terminal 502 is connected to the power supply voltage terminal 102 of the power amplifier circuit 10 outside the tracking circuit 50 .
  • APT 51 can supply power supply voltage VAPT in APT mode.
  • the ET 52 can supply the supply voltage V ET in ET mode. Either the analog ET mode or the digital ET mode may be used as the ET mode. That is, the ET52 can be either an analog envelope tracker or a digital envelope tracker.
  • a switch 53 is connected between the APT 51 and ET 52 and the power amplifier 11 .
  • the switch 53 has a terminal 531 connected to the APT 51 , a terminal 532 connected to the ET 52 , and a terminal 533 connected to the output terminal 502 .
  • the switch 53 is configured by, for example, an SPDT (Single-Pole Double-Throw) type switch circuit.
  • the switch 53 can connect the terminals 531 and 532 to the terminal 533 based on the control signal from the RFIC3. Specifically, when control signal CTL1 is received, switch 53 can connect APT51 to output terminal 502 without connecting ET52 to output terminal 502 . On the other hand, the switch 53 can connect the ET52 to the output terminal 502 without connecting the APT51 to the output terminal 502 when the control signal CTL2 is received.
  • circuit configuration of the tracking circuit 50 shown in FIG. 2 is an example, and is not limited to this.
  • switch 53 may not be included in tracking circuit 50 and may be included in power amplifier circuit 10 .
  • FIG. 3 is a diagram showing the state of transmission of high-frequency signals of the first power class in communication device 5 according to the present embodiment.
  • FIG. 4 is a diagram showing a transmission state of a high-frequency signal of the second power class in communication device 5 according to the present embodiment.
  • the power class high-frequency signal means a high-frequency signal transmitted from the communication device 5 in a state in which transmission of a high-frequency signal having the maximum output power of the power class is permitted. Therefore, high-frequency signals of a power class include not only high-frequency signals having an output power equal to the maximum output power of the power class, but also high-frequency signals having an output power less than the maximum output power of the power class.
  • the control signal CTL1 is transmitted from the RFIC 3 to the tracking circuit 50 as shown in FIG.
  • switch 53 of tracking circuit 50 connects APT 51 to output terminal 502 .
  • the power supply voltage VAPT is supplied from the tracking circuit 50 to the power amplifier circuit 10 in the APT mode.
  • the power amplifier circuit 10 receives a high frequency signal of band A from the RFIC 3 via the input terminal 101 .
  • the received high frequency signal is amplified by the power amplifier 11 using the power supply voltage VAPT and transmitted to the antenna 2 via the filter 21 and the output terminal 103 .
  • the radio frequency signal RF AH of the first power class is transmitted from the communication device 5 .
  • the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50 as shown in FIG.
  • switch 53 of tracking circuit 50 connects ET 52 to output terminal 502 .
  • the power supply voltage V ET is supplied from the tracking circuit 50 to the power amplifier circuit 10 in the ET mode.
  • the power amplifier circuit 10 receives a high frequency signal of band A from the RFIC 3 via the input terminal 101 .
  • the received high frequency signal is amplified by the power amplifier 11 using the power supply voltage V ET and transmitted to the antenna 2 via the filter 21 and the output terminal 103 .
  • the radio frequency signal RF AL of the second power class is transmitted from the communication device 5 .
  • the high-frequency circuit 1 includes the power amplifier circuit 10 and the tracking circuit 50 connected to the power amplifier circuit 10.
  • the tracking circuit 50 has a maximum power equal to or higher than a predetermined maximum power.
  • the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown is received, the power amplifier circuit 10 is supplied with the power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10 includes power amplifiers 11 corresponding to the first power class and the second power class, and the tracking circuit 50 has an output terminal 502 connected to the power amplifiers 11 and a power supply voltage V ET in the ET mode.
  • APT51 capable of supplying a power supply voltage V APT in APT mode; and a switch 53 connected between the ET52 and APT51 and the output terminal 502, the switch 53 receiving the control signal CTL1.
  • APT 51 is connected to output terminal 502 when received, and ET 52 is connected to output terminal 502 when control signal CTL2 is received.
  • the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode. Therefore, in the first power class, it is possible to avoid the use of the ET mode in which it is difficult to cope with the supply of a higher power supply voltage, and to improve the PAE in the APT mode.
  • the power supply voltage V ET is supplied in ET mode. Therefore, PAE can be improved more than when the power supply voltage V APT is supplied in the APT mode.
  • BPSK Binary Phase-Shift Keying
  • BPSK Binary Phase-Shift Keying
  • the tracking circuit 50 supplies the power amplifier circuit 10 with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10 in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10 includes power amplifiers 11 corresponding to the first power class and the second power class, and the tracking circuit 50 has an output terminal 502 connected to the power amplifiers 11 and a power supply voltage V ET in the ET mode.
  • APT51 capable of supplying a power supply voltage V APT in APT mode; and a switch 53 connected between the ET52 and APT51 and the output terminal 502, the switch 53 receiving the control signal CTL1.
  • APT 51 is connected to output terminal 502 when received, and ET 52 is connected to output terminal 502 when control signal CTL2 is received.
  • the tracking circuit 50 can achieve the same effect as the high-frequency circuit 1 described above.
  • Embodiment 2 Next, Embodiment 2 will be described.
  • This embodiment mainly differs from the first embodiment in that one multimode tracker (MT: Multimode Tracker) is used instead of two trackers (APT and ET).
  • MT Multimode Tracker
  • APT and ET two trackers
  • the communication device 5A according to the present embodiment is the same as the communication device 5 according to the first embodiment except that the high frequency circuit 1A is provided instead of the high frequency circuit 1. Furthermore, the high frequency circuit 1A according to the present embodiment is the same as the high frequency circuit 1 according to the first embodiment except that a tracking circuit 50A is provided instead of the tracking circuit 50. FIG. Therefore, the tracking circuit 50A will be described below, and descriptions of other circuits and the like will be omitted.
  • the tracking circuit 50A can supply the power supply voltage VAPT in the APT mode to the power amplifier circuit 10 when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10 can be supplied with the power supply voltage V ET in ET mode.
  • the circuit configuration of the tracking circuit 50A will be described with reference to FIG.
  • FIG. 5 is a circuit configuration diagram of a communication device 5A according to this embodiment.
  • a tracking circuit 50A included in the communication device 5A includes an MT54, a control terminal 501, and an output terminal 502.
  • FIG. 5 is a circuit configuration diagram of a communication device 5A according to this embodiment.
  • a tracking circuit 50A included in the communication device 5A includes an MT54, a control terminal 501, and an output terminal 502.
  • FIG. 5 is a circuit configuration diagram of a communication device 5A according to this embodiment.
  • a tracking circuit 50A included in the communication device 5A includes an MT54, a control terminal 501, and an output terminal 502.
  • FIG. 5 is a circuit configuration diagram of a communication device 5A according to this embodiment.
  • a tracking circuit 50A included in the communication device 5A includes an MT54, a control terminal 501, and an output terminal 502.
  • the control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high frequency circuit 1A.
  • the control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1A.
  • the output terminal 502 is a terminal for supplying power supply voltage to the power amplifier circuit 10 .
  • the output terminal 502 is connected to the power supply voltage terminal 102 of the power amplifier circuit 10 outside the tracking circuit 50A.
  • the MT54 can selectively supply the ET mode power supply voltage V_ET and the APT mode power supply voltage V_APT . Specifically, the MT 54 supplies the power amplifier 11 with the power supply voltage V APT in the APT mode when the control signal CTL1 is received, and supplies the power amplifier 11 with the ET mode when the control signal CTL2 is received.
  • a power supply voltage V ET can be provided.
  • the internal configuration of the MT54 is not particularly limited, but includes, for example, a DC (Direct Current)-DC converter (not shown) shared by the APT mode and the ET mode and a modulator (not shown) used in the ET mode.
  • the MT54 can convert the input voltage to the power supply voltage V APT using a DC-DC converter in APT mode.
  • the MT54 can convert the input voltage into a reference voltage using a DC-DC converter and modulate the reference voltage using a modulator to generate the power supply voltage V ET .
  • the high-frequency circuit 1A includes the power amplifier circuit 10 and the tracking circuit 50A connected to the power amplifier circuit 10.
  • the tracking circuit 50A can When the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown is received, the power amplifier circuit 10 is supplied with the power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10 includes a power amplifier 11 corresponding to the first power class and the second power class, and the tracking circuit 50A can supply the power supply voltage in the ET mode and can supply the power supply voltage in the APT mode.
  • the MT54 supplies the power amplifier 11 with the power supply voltage V APT in the APT mode when the control signal CTL1 is received, and supplies the power amplifier 11 with the power supply voltage V APT in the ET mode when the control signal CTL2 is received. Provides voltage V ET .
  • the power amplifier circuit 10 in the first power class defined with a higher maximum output power, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Furthermore, the use of the MT54 can simplify the circuit configuration of the tracking circuit 50A.
  • the tracking circuit 50A supplies the power amplifier circuit 10 with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10 in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10 includes a power amplifier 11 corresponding to the first power class and the second power class, and the tracking circuit 50A can supply the power supply voltage in the ET mode and can supply the power supply voltage in the APT mode.
  • the MT54 supplies the power amplifier 11 with the power supply voltage V APT in the APT mode when the control signal CTL1 is received, and supplies the power amplifier 11 with the power supply voltage V APT in the ET mode when the control signal CTL2 is received. Provides voltage V ET .
  • the tracking circuit 50A can achieve the same effects as the high-frequency circuit 1A.
  • Embodiment 3 differs from the first embodiment mainly in that the power amplifier circuit includes two power amplifiers respectively corresponding to the first power class and the second power class.
  • the present embodiment will be described below with reference to FIG. 6, focusing on the differences from the first embodiment.
  • the communication device 5B according to the present embodiment includes a high-frequency circuit 1B instead of the high-frequency circuit 1, and two antennas 2a and 2b instead of the antenna 2. It is similar to the communication device 5 .
  • the high-frequency circuit 1B according to the present embodiment is similar to the high-frequency circuit 1 according to the first embodiment, except that a power amplifier circuit 10B and a tracking circuit 50B are provided instead of the power amplifier circuit 10 and the tracking circuit 50. It is the same. Therefore, the power amplifier circuit 10B and the tracking circuit 50B will be described below, and descriptions of other circuits and the like will be omitted.
  • the power amplifier circuit 10B is connected to the tracking circuit 50B and can receive power supply voltage from the tracking circuit 50B.
  • the circuit configuration of the power amplifier circuit 10B will be described with reference to FIG.
  • FIG. 6 is a circuit configuration diagram of communication device 5B according to the present embodiment.
  • a power amplifier circuit 10B included in the communication device 5B includes power amplifiers 11B and 12B, filters 21B and 22B, input terminals 101a and 101b, power supply voltage terminals 102a and 102b, and output terminals 103a and 103b.
  • the input terminal 101a is a terminal for receiving a first power class high frequency transmission signal from the outside of the high frequency circuit 1B.
  • the input terminal 101b is a terminal for receiving a high frequency transmission signal of the second power class from the outside of the high frequency circuit 1B.
  • Each of the input terminals 101a and 101b is connected to the RFIC 3 outside the high frequency circuit 1B.
  • the power supply voltage terminal 102a is a terminal for receiving the power supply voltage VAPT from the tracking circuit 50B.
  • the power supply voltage terminal 102a is connected to the output terminal 502a of the tracking circuit 50B outside the power amplifier circuit 10B.
  • the power supply voltage terminal 102b is a terminal for receiving the power supply voltage VET from the tracking circuit 50B.
  • the power supply voltage terminal 102b is connected to the output terminal 502b of the tracking circuit 50B outside the power amplifier circuit 10B.
  • the output terminal 103a is a terminal for supplying a high frequency transmission signal of the first power class to the outside of the high frequency circuit 1B.
  • the output terminal 103b is a terminal for supplying a high frequency transmission signal of the second power class to the outside of the high frequency circuit 1B.
  • Output terminals 103a and 103b are connected to antennas 2a and 2b, respectively, outside the high-frequency circuit 1B.
  • the power amplifier 11B is an example of a first power amplifier, is connected between the input terminal 101a and the filter 21B, and is connected to the power supply voltage terminal 102a. Specifically, the input terminal of the power amplifier 11B is connected to the input terminal 101a, and the output terminal of the power amplifier 11B is connected to the filter 21B and the power supply voltage terminal 102a.
  • the power amplifier 11B corresponds to the first power class. That is, the power amplifier 11B can amplify the high-frequency signal to the power that satisfies the maximum output power of the first power class. In this embodiment, the power amplifier 11B is used for amplifying high frequency signals only in the first power class out of the first power class and the second power class. Also, the APT mode is applied to the power amplifier 11B, and the ET mode is not applied.
  • the power amplifier 12B is an example of a second power amplifier, connected between the input terminal 101b and the filter 22B, and connected to the power supply voltage terminal 102b. Specifically, the input terminal of the power amplifier 12B is connected to the input terminal 101b, and the output terminal of the power amplifier 12B is connected to the filter 22B and the power supply voltage terminal 102b.
  • the power amplifier 12B corresponds to the second power class. In other words, the power amplifier 12B can amplify the high frequency signal to the power that satisfies the maximum output power of the second power class.
  • the power amplifier 12B is used for amplifying high frequency signals only in the second power class out of the first power class and the second power class. Also, the ET mode is applied to the power amplifier 12B, and the APT mode is not applied.
  • the filter 21B is connected between the power amplifier 11B and the output terminal 103a. Specifically, one end of the filter 21B is connected to the output end of the power amplifier 11B, and the other end of the filter 21B is connected to the output terminal 103a.
  • the filter 21B has a passband including band A and has a power handling capability corresponding to the first power class.
  • the filter 21B may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
  • the filter 22B is connected between the power amplifier 12B and the output terminal 103b. Specifically, one end of the filter 22B is connected to the output end of the power amplifier 12B, and the other end of the filter 22B is connected to the output terminal 103b.
  • the filter 22B has a passband including band A and has a power handling capability corresponding to the second power class.
  • the filter 22B may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
  • the circuit configuration of the power amplifier circuit 10B shown in FIG. 6 is an example, and is not limited to this.
  • the power amplifier circuit 10B may have only one of the output terminals 103a and 103b. That is, the communication device 5B may have only one of the antennas 2a and 2b.
  • the power amplifier circuit 10B may include a switch connected between the output terminal of the power amplifier 11B and the output terminal of the power amplifier 12B and one of the output terminals 103a and 103b.
  • the power amplifier circuit 10B may include an impedance matching circuit connected between any two circuit elements (for example, the power amplifier 11B and the filter 21B, etc.).
  • the power amplifier circuit 10B may not include the filters 21B and/or 22B.
  • the tracking circuit 50B can supply the power supply voltage VAPT in the APT mode to the power amplifier circuit 10B when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10B can be supplied with the power supply voltage V ET in the ET mode.
  • the circuit configuration of the tracking circuit 50B will be described with reference to FIG.
  • a tracking circuit 50B includes an MT 54, a switch 55, a control terminal 501, and output terminals 502a and 502b.
  • the control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high frequency circuit 1B.
  • the control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1B.
  • the output terminal 502a is an example of a first output terminal, and is a terminal for supplying the power supply voltage VAPT to the power amplifier circuit 10B.
  • the output terminal 502a is connected to the power supply voltage terminal 102a of the power amplifier circuit 10B outside the tracking circuit 50B.
  • the output terminal 502b is an example of a second output terminal, and is a terminal for supplying the power supply voltage VET to the power amplifier circuit 10B.
  • the output terminal 502b is connected to the power supply voltage terminal 102b of the power amplifier circuit 10B outside the tracking circuit 50B.
  • the MT 54 can selectively supply the ET mode power supply voltage V_ET and the APT mode power supply voltage VAPT as in the second embodiment.
  • the switch 55 is connected between the MT54 and the output terminals 502a and 502b. Specifically, the switch 55 has a terminal 551 connected to the MT54, a terminal 552 connected to the output terminal 502a, and a terminal 553 connected to the output terminal 502b.
  • the switch 55 is composed of, for example, an SPDT type switch circuit.
  • the switch 55 can connect the terminal 551 to the terminals 552 and 553 based on the control signal from the RFIC3. Specifically, when the control signal CTL1 is received, the switch 55 can connect the MT 54 to the output terminal 502a without connecting it to the output terminal 502b. On the other hand, when the control signal CTL2 is received, the switch 55 can connect the MT54 to the output terminal 502b without connecting it to the output terminal 502a.
  • the MT 54 can supply the power supply voltage VAPT in the APT mode to the power amplifier 11B via the switch 55 when the control signal CTL1 is received. Further, the MT 54 can supply the power supply voltage V ET to the power amplifier 12B in the ET mode via the switch 55 when the control signal CTL2 is received.
  • circuit configuration of the tracking circuit 50B shown in FIG. 6 is an example, and is not limited to this.
  • switch 55 may not be included in tracking circuit 50B and may be included in power amplifier circuit 10B.
  • the high-frequency circuit 1B includes the power amplifier circuit 10B and the tracking circuit 50B connected to the power amplifier circuit 10B.
  • the control signal CTL1 indicating the first power class defined by is received
  • the power amplifier circuit 10B is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown is received, the power amplifier circuit 10B is supplied with the power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class, and the tracking circuit 50B has an output terminal 502a connected to the power amplifier 11B. , an output terminal 502b connected to the power amplifier 12B, an MT54 capable of supplying power supply voltage in the ET mode and capable of supplying power supply voltage in the APT mode, and connected between the MT54 and the output terminals 502a and 502b a switch 55, the MT54 supplies the power amplifier 11B with the power supply voltage V APT in the APT mode via the switch 55 when the control signal CTL1 is received, and when the control signal CTL2 is received, Power amplifier 12B is supplied via switch 55 with power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10 in the first power class defined with a higher maximum output power, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained.
  • the tracking circuit 50B supplies the power amplifier circuit 10B with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10B in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class, and the tracking circuit 50B has an output terminal 502a connected to the power amplifier 11B.
  • the tracking circuit 50B can achieve the same effects as the high-frequency circuit 1B.
  • the power amplifier circuit 10B corresponds to the first power class defined by the maximum power equal to or higher than the predetermined maximum power, and the power amplifier 11B to which the APT mode is applied and the power amplifier 11B to which the maximum power is less than the predetermined maximum power. and a power amplifier 12B that corresponds to the second power class defined in and to which the ET mode is applied.
  • the power amplifier circuit 10B can achieve the same effects as the high-frequency circuit 1B.
  • Embodiment 4 differs from the above-described third embodiment mainly in that the tracking circuit includes APT 51 and ET 52 instead of MT 54 and switch 55 .
  • the present embodiment will be described below with reference to FIG. 7, focusing on the differences from the third embodiment.
  • the communication device 5C according to the present embodiment is the same as the communication device 5B according to the third embodiment except that the high frequency circuit 1C is provided instead of the high frequency circuit 1B.
  • a high frequency circuit 1C according to the present embodiment is similar to the high frequency circuit 1B according to the third embodiment except that a tracking circuit 50C is provided instead of the tracking circuit 50B. Therefore, the tracking circuit 50C will be described below, and descriptions of other circuits and the like will be omitted.
  • the tracking circuit 50C can supply the power amplifier circuit 10B with the power supply voltage VAPT in the APT mode when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10B can be supplied with the power supply voltage V ET in the ET mode.
  • the circuit configuration of the tracking circuit 50C will be described with reference to FIG.
  • FIG. 7 is a circuit configuration diagram of a communication device 5C according to this embodiment.
  • a tracking circuit 50C included in the communication device 5C includes an APT 51, an ET 52, a control terminal 501, and output terminals 502a and 502b.
  • the output terminal 502a is a terminal for supplying the power supply voltage VAPT in the APT mode to the power amplifier 11B of the power amplifier circuit 10B.
  • the output terminal 502a is connected to the power supply voltage terminal 102a of the power amplifier circuit 10B outside the tracking circuit 50C.
  • the output terminal 502b is a terminal for supplying the power supply voltage V ET in the ET mode to the power amplifier 12B of the power amplifier circuit 10B.
  • the output terminal 502b is connected to the power supply voltage terminal 102b of the power amplifier circuit 10B outside the tracking circuit 50C.
  • APT 51 is connected to output terminal 502a.
  • the APT 51 can supply the power supply voltage VAPT in the APT mode to the power amplifier 11B via the output terminal 502a and the power supply voltage terminal 102a when the control signal CTL1 is received.
  • ET52 is connected to output terminal 502b. ET 52 can supply power supply voltage V ET in ET mode to power amplifier 12B via output terminal 502b and power supply voltage terminal 102b when control signal CTL2 is received.
  • the high-frequency circuit 1C includes the power amplifier circuit 10B and the tracking circuit 50C connected to the power amplifier circuit 10B.
  • the power amplifier circuit 10B When the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10B is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown When the control signal CTL2 shown is received, the power amplifier circuit 10B is supplied with the power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class. It comprises an APT 51 capable of supplying a voltage VAPT , and an ET 52 connected to the power amplifier 12B and capable of supplying a power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10 in the first power class defined with a higher maximum output power, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Furthermore, since the APT 51 is connected to the power amplifier 11B and the ET 52 is connected to the power amplifier 12B, switching by a switch or the like becomes unnecessary, and the circuit configuration of the tracking circuit 50C can be simplified.
  • the tracking circuit 50C supplies the power amplifier circuit 10B with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10B in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class. It comprises an APT 51 capable of supplying a voltage VAPT , and an ET 52 connected to the power amplifier 12B and capable of supplying a power supply voltage V ET in the ET mode.
  • the tracking circuit 50C can achieve the same effects as the high-frequency circuit 1C.
  • Embodiment 5 Next, Embodiment 5 will be described.
  • the present embodiment is different from the first embodiment mainly in that a high frequency signal of the first power class can be output by using two power amplifiers.
  • the present embodiment will be described below with reference to FIGS. 8 to 10, focusing on the differences from the first embodiment.
  • a communication device 5D according to the present embodiment is the same as the communication device 5 according to the first embodiment except that a high frequency circuit 1D is provided instead of the high frequency circuit 1. Further, the high-frequency circuit 1D according to the present embodiment is similar to the high-frequency circuit 1 according to the first embodiment, except that a power amplifier circuit 10D and a tracking circuit 50D are provided instead of the power amplifier circuit 10 and the tracking circuit 50. It is the same. Therefore, the power amplifier circuit 10D and the tracking circuit 50D will be described below, and descriptions of other circuits and the like will be omitted.
  • the power amplifier circuit 10D is connected to the tracking circuit 50D and can receive power supply voltage from the tracking circuit 50D. A circuit configuration of the power amplifier circuit 10D will be described with reference to FIG.
  • FIG. 8 is a circuit configuration diagram of a communication device 5D according to this embodiment.
  • a power amplifier circuit 10D included in the communication device 5D includes power amplifiers 11D and 12D, a combiner 14, a filter 21, input terminals 101a and 101b, power supply voltage terminals 102a and 102b, and an output terminal 103. .
  • Each of the input terminals 101a and 101b is a terminal for receiving a high frequency transmission signal of band A from the outside of the high frequency circuit 1D.
  • Each of the input terminals 101a and 101b is connected to the RFIC 3 outside the high frequency circuit 1D.
  • the power supply voltage terminal 102a is a terminal for receiving the power supply voltage V APT /V ET from the tracking circuit 50D.
  • the power supply voltage terminal 102a is connected to the output terminal 502a of the tracking circuit 50D outside the power amplifier circuit 10D.
  • the power supply voltage terminal 102b is a terminal for receiving the power supply voltage VAPT from the tracking circuit 50D.
  • the power supply voltage terminal 102b is connected to the output terminal 502b of the tracking circuit 50D outside the power amplifier circuit 10D.
  • the output terminal 103 is a terminal for supplying a high frequency transmission signal to the outside of the high frequency circuit 1D.
  • the output terminal 103 is connected to the antenna 2 outside the high frequency circuit 1D.
  • the power amplifier 11D is an example of a first power amplifier, is connected between the input terminal 101a and the combiner 14, and is connected to the power supply voltage terminal 102a. Specifically, the input terminal of the power amplifier 11D is connected to the input terminal 101a, and the output terminal of the power amplifier 11D is connected to the combiner 14 and the power supply voltage terminal 102a.
  • the power amplifier 11D corresponds to the second power class. In other words, the power amplifier 11D can amplify the high frequency signal to the power that satisfies the maximum output power of the second power class.
  • the power amplifier 12D is an example of a second power amplifier, connected between the input terminal 101b and the combiner 14, and connected to the power supply voltage terminal 102b. Specifically, the input terminal of the power amplifier 12D is connected to the input terminal 101b, and the output terminal of the power amplifier 12D is connected to the combiner 14 and the power supply voltage terminal 102b.
  • the power amplifier 12D corresponds to the second power class. In other words, the power amplifier 12D can amplify the high frequency signal to the power that satisfies the maximum output power of the second power class.
  • the combiner 14 is connected between the power amplifiers 11D and 12D and the filter 21. Specifically, the combiner 14 has an input terminal 141 connected to the output terminal of the power amplifier 11D, an input terminal 142 connected to the output terminal of the power amplifier 12D, and an output terminal 143 connected to the filter 21. , provided. Note that the synthesizer 14 is configured by, for example, a transformer, but is not limited to this.
  • the synthesizer 14 can synthesize two high frequency signals input via the input terminals 141 and 142 into one high frequency signal and output it via the output terminal 143 .
  • the filter 21 is connected between the synthesizer 14 and the output terminal 103 . Specifically, one end of the filter 21 is connected to the output terminal 143 of the combiner 14 and the other end of the filter 21 is connected to the output terminal 103 .
  • the filter 21 has a passband including band A and has a power handling capability corresponding to the first power class.
  • the filter 21 may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
  • the power amplifier circuit 10D can output a high-frequency signal of the first power class using the two power amplifiers 11D and 12D corresponding to the second power class. Also, in the power amplifier circuit 10D, only one of the two power amplifiers 11D and 12D corresponding to the second power class can be used to output a high frequency signal of the second power class.
  • the circuit configuration of the power amplifier circuit 10D shown in FIG. 8 is an example, and is not limited to this.
  • the power amplifier circuit 10D may include two filters corresponding to the second power class instead of the filter 21.
  • one of the two filters should be connected between power amplifier 11D and combiner 14, and the other of the two filters should be connected between power amplifier 12D and combiner .
  • the power amplifier circuit 10D may further include a distributor.
  • the distributor may be connected between one of the input terminals 101a and 101b and the power amplifiers 11D and 12D.
  • the power amplifier circuit 10D may include an impedance matching circuit connected between any two circuit elements (for example, the combiner 14 and the filter 21, etc.). Further, for example, the power amplifier circuit 10D does not have to include the filter 21 .
  • the tracking circuit 50D can supply the power amplifier circuit 10D with the power supply voltage VAPT in the APT mode when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10D can be supplied with the power supply voltage VET in the ET mode.
  • the circuit configuration of the tracking circuit 50D will be described with reference to FIG.
  • the tracking circuit 50D includes APTs 51 and 56, an ET 52, a switch 53, a control terminal 501, and output terminals 502a and 502b.
  • the output terminal 502a is a terminal for supplying the power supply voltage V APT /V ET to the power amplifier 11D of the power amplifier circuit 10D.
  • the output terminal 502a is connected to the power supply voltage terminal 102a of the power amplifier circuit 10D outside the tracking circuit 50D.
  • the output terminal 502b is a terminal for supplying the power supply voltage VAPT in the APT mode to the power amplifier 12D of the power amplifier circuit 10D.
  • the output terminal 502b is connected to the power supply voltage terminal 102b of the power amplifier circuit 10D outside the tracking circuit 50D.
  • APT 51, ET 52 and switch 53 are the same as those in the first embodiment, so their description is omitted.
  • APT 56 is connected to output terminal 502b.
  • APT 56 can supply power supply voltage VAPT in APT mode to power amplifier 12D via output terminal 502b and power supply voltage terminal 102b when control signal CTL1 is received.
  • the tracking circuit 50D can supply the power supply voltage VAPT in the APT mode from both the output terminals 502a and 502b when the control signal CTL1 is received, and when the control signal CTL2 is received.
  • the power supply voltage V ET can be supplied from the output terminal 502a in the ET mode.
  • the circuit configuration of the tracking circuit 50D shown in FIG. 8 is an example, and is not limited to this.
  • APT51, ET52 and switch 53 may be replaced with MT54.
  • the switch 53 may not be included in the tracking circuit 50D, and may be included in the power amplifier circuit 10D.
  • FIG. 9 is a diagram showing a transmission state of a high-frequency signal of the first power class in communication device 5D according to the present embodiment.
  • FIG. 10 is a diagram showing a transmission state of a high-frequency signal of the second power class in communication device 5D according to the present embodiment.
  • the control signal CTL1 is transmitted from the RFIC 3 to the tracking circuit 50D.
  • the switch 53 of the tracking circuit 50D connects the APT 51 to the output terminal 502a.
  • the power supply voltage VAPT is supplied from the APT 51 to the power amplifier 11D in the APT mode.
  • the power supply voltage VAPT is supplied from the APT 56 to the power amplifier 12D in the APT mode.
  • the power amplifier circuit 10D receives two band A high frequency signals from the RFIC 3 via the input terminals 101a and 101b.
  • the two received high-frequency signals are amplified by power amplifiers 11D and 12D using power supply voltage VAPT , and combined by combiner .
  • the synthesized high frequency signal is transmitted to the antenna 2 via the filter 21 and the output terminal 103 .
  • the radio frequency signal RF AH of the first power class is transmitted from the communication device 5D.
  • the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50D.
  • switch 53 of tracking circuit 50D connects ET 52 to output terminal 502a.
  • the power supply voltage V ET is supplied from the tracking circuit 50D to the power amplifier 11D in the ET mode.
  • the power amplifier circuit 10D receives the high frequency signal of band A from the RFIC 3 via the input terminal 101a.
  • the received high-frequency signal is amplified by the power amplifier 11D using the power supply voltage VET and transmitted to the antenna 2 via the synthesizer 14, the filter 21 and the output terminal 103.
  • the radio frequency signal RF AL of the second power class is transmitted from the communication device 5D.
  • the high-frequency circuit 1D includes the power amplifier circuit 10D and the tracking circuit 50D connected to the power amplifier circuit 10D.
  • the control signal CTL1 indicating the first power class defined by is received
  • the power amplifier circuit 10D is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown is received, the power amplifier circuit 10D is supplied with the power supply voltage VET in the ET mode.
  • the power amplifier circuit 10D includes a power amplifier 11D corresponding to the second power class, a power amplifier 12D corresponding to the second power class, and a combiner connected to the output terminal of the power amplifier 11D and the output terminal of the power amplifier 12D.
  • the tracking circuit 50D supplies the power supply voltage VAPT in the APT mode to each of the power amplifiers 11D and 12D when the control signal CTL1 is received, and when the control signal CTL2 is received. In the ET mode, only one of the power amplifiers 11D and 12D is supplied with the supply voltage V ET .
  • the power amplifier circuit 10D in the first power class defined with a higher maximum output power, the power amplifier circuit 10D is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Further, high-frequency signals of the first power class are transmitted using two power amplifiers 11D and 12D corresponding to the second power class. Therefore, a power amplifier corresponding to the first power class becomes unnecessary, and the mounting cost of the high frequency circuit 1D can be reduced.
  • the tracking circuit 50D supplies the power amplifier circuit 10D with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10D in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10D includes a power amplifier 11D corresponding to the second power class, a power amplifier 12D corresponding to the second power class, and a combiner connected to the output terminal of the power amplifier 11D and the output terminal of the power amplifier 12D.
  • the tracking circuit 50D supplies the power supply voltage VAPT in the APT mode to each of the power amplifiers 11D and 12D when the control signal CTL1 is received, and when the control signal CTL2 is received.
  • the ET mode only one of the power amplifiers 11D and 12D is supplied with the supply voltage V ET .
  • the tracking circuit 50D can achieve the same effects as the high-frequency circuit 1D.
  • Embodiment 6 Next, Embodiment 6 will be described.
  • the present embodiment is different from the first embodiment mainly in that the high-frequency circuit supports two bands capable of simultaneous transmission.
  • the present embodiment will be described below with reference to FIGS. 11 to 14, focusing on the differences from the first embodiment.
  • a communication device 5E according to the present embodiment is the same as the communication device 5 according to the first embodiment, except that a high frequency circuit 1E is provided instead of the high frequency circuit 1. Further, the high-frequency circuit 1E according to the present embodiment is similar to the high-frequency circuit 1 according to the first embodiment except that a power amplifier circuit 10E and a tracking circuit 50E are provided instead of the power amplifier circuit 10 and the tracking circuit 50. It is the same. Therefore, the power amplifier circuit 10E and the tracking circuit 50E will be described below, and descriptions of other circuits and the like will be omitted.
  • the power amplifier circuit 10E is connected to the tracking circuit 50E and can receive power supply voltage from the tracking circuit 50E. A circuit configuration of the power amplifier circuit 10E will be described with reference to FIG.
  • FIG. 6 is a circuit configuration diagram of communication device 5E according to the present embodiment.
  • a power amplifier circuit 10E included in the communication device 5E includes power amplifiers 11 and 13, filters 21 and 23, input terminals 101a and 101b, a power supply voltage terminal 102, and output terminals 103a and 103b.
  • the input terminal 101a is a terminal for receiving a high frequency transmission signal of band A from the outside of the high frequency circuit 1E.
  • the input terminal 101b is a terminal for receiving a high frequency transmission signal of band B from the outside of the high frequency circuit 1E.
  • Each of the input terminals 101a and 101b is connected to the RFIC 3 outside the high frequency circuit 1E.
  • the power supply voltage terminal 102 is a terminal for receiving the power supply voltage from the tracking circuit 50E.
  • the power supply voltage terminal 102 is connected to the output terminal 502 of the tracking circuit 50E outside the power amplifier circuit 10E.
  • the output terminal 103a is a terminal for supplying a high-frequency transmission signal of band A to the outside of the high-frequency circuit 1E.
  • the output terminal 103b is a terminal for supplying a high frequency transmission signal of band B to the outside of the high frequency circuit 1E.
  • Output terminals 103a and 103b are connected to antennas 2a and 2b, respectively, outside the high-frequency circuit 1E.
  • the power amplifier 11 is an example of a first power amplifier, is connected between the input terminal 101a and the filter 21, and is connected to the power supply voltage terminal 102. Specifically, the input terminal of the power amplifier 11 is connected to the input terminal 101 a , and the output terminal of the power amplifier 11 is connected to the filter 21 and the power supply voltage terminal 102 .
  • the power amplifier 11 supports the first power class and the second power class, and can amplify the transmission signal of band A.
  • the power amplifier 13 is an example of a second power amplifier and is connected between the input terminal 101b and the filter 23. Specifically, the input terminal of the power amplifier 13 is connected to the input terminal 101 b and the output terminal of the power amplifier 13 is connected to the filter 23 .
  • the power amplifier 13 can amplify the band B transmission signal.
  • the power supply voltage supplied to the power amplifier 13 is not particularly limited, and may be, for example, the power supply voltage based on the ET mode or any power supply voltage. Therefore, in FIG. 11, the illustration of the supply path of the power supply voltage to the power amplifier 13 is omitted.
  • Band B is a frequency band for communication systems built using RAT.
  • Bands A and B are a combination of bands that can be transmitted simultaneously.
  • bands A and B are a combination of bands for CA (Carrier Aggregation).
  • bands A and B may be a combination of bands for EN-DC (E-UTRAN New Radio-Dual Connectivity) or NR-DC (New Radio-New Radio Dual Connectivity).
  • band B a conventional band corresponding only to the second power class can be used, for example, Band 1, Band 2, Band 3, Band 4, Band 13, Band 20, Band 26, Band 28, Band 66 or Band 71 for LTE can be used.
  • Band B is not limited to this, and various bands defined by 3GPP or the like can be used.
  • the filter 21 is an example of a first filter and is connected between the power amplifier 11 and the output terminal 103a. Specifically, one end of the filter 21 is connected to the output end of the power amplifier 11, and the other end of the filter 21 is connected to the output terminal 103a.
  • the filter 21 has a passband including band A and has a power handling capability corresponding to the first power class.
  • the filter 21 may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
  • the filter 23 is an example of a second filter and is connected between the power amplifier 13 and the output terminal 103b. Specifically, one end of the filter 23 is connected to the output end of the power amplifier 13, and the other end of the filter 23 is connected to the output terminal 103b.
  • Filter 23 has a passband that includes band B.
  • FIG. The filter 23 may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
  • the circuit configuration of the power amplifier circuit 10E shown in FIG. 11 is an example, and is not limited to this.
  • the power amplifier circuit 10E may have only one of the output terminals 103a and 103b. That is, the communication device 5E may have only one of the antennas 2a and 2b.
  • the power amplifier circuit 10E may comprise a switch connected between the filters 21 and 23 and one of the output terminals 103a and 103b.
  • the power amplifier circuit 10E may include an impedance matching circuit connected between any two circuit elements (for example, the power amplifier 11 and the filter 21, etc.).
  • the tracking circuit 50E includes an APT 51, an ET 57, a switch 53, a control terminal 501, and an output terminal 502.
  • the control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high frequency circuit 1E.
  • the control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1E.
  • the output terminal 502 is a terminal for supplying power supply voltage to the power amplifier circuit 10E.
  • the output terminal 502 is connected to the power supply voltage terminal 102 of the power amplifier circuit 10E outside the tracking circuit 50E.
  • the ET 57 can supply the power supply voltage V ET1 in the first ET mode, and can also supply the power supply voltage V ET2 in the second ET mode. Specifically, when the control signal CTL2 is received, the band A signal is transmitted, and the band B signal is not transmitted, the ET 57 supplies the power amplifier 11 with the power supply voltage V ET1 in the first ET mode. can supply. The ET 57 can also supply the power amplifier 11 with the supply voltage V ET2 in the second ET mode when the control signal CTL2 is received and the band A signal and the band B signal are simultaneously transmitted.
  • the power supply voltage V ET2 supplied in the second ET mode is higher than the power supply voltage V ET1 supplied in the first ET mode. That is, the power supply voltage V ET2 is higher than the power supply voltage V ET1 for the envelope signals showing the same value. In other words, in the second ET mode, a higher power supply voltage is supplied so that gain compression is smaller than in the first ET mode.
  • the power supply voltage V ET1 is supplied so as to obtain, for example, 2 dB compressed output power with respect to the input power corresponding to the envelope signal.
  • a power supply voltage V ET2 is supplied so as to obtain an output power compressed by, for example, 0.5 to 1 dB with respect to the input power.
  • a switch 53 is connected between the APT 51 and ET 57 and the power amplifier 11 .
  • the switch 53 has a terminal 531 connected to the APT 51 , a terminal 532 connected to the ET 57 , and a terminal 533 connected to the output terminal 502 .
  • the switch 53 is composed of, for example, an SPDT type switch circuit.
  • the switch 53 can connect the terminals 531 and 532 to the terminal 533 based on the control signal from the RFIC3. Specifically, switch 53 can connect APT 51 to output terminal 502 without connecting ET 57 to output terminal 502 when control signal CTL 1 is received. On the other hand, switch 53 can connect ET 57 to output terminal 502 without connecting APT 51 to output terminal 502 when control signal CTL 2 is received.
  • the circuit configuration of the tracking circuit 50E shown in FIG. 11 is an example, and is not limited to this.
  • the switch 53 may not be included in the tracking circuit 50E and may be included in the power amplifier circuit 10E.
  • FIG. 12 is a diagram showing a transmission state of a first power class high-frequency signal in communication apparatus 5E according to the present embodiment.
  • FIGS. 13 and 14 is a diagram showing the transmission state of the high-frequency signal of the second power class in communication device 5E according to the present embodiment.
  • the control signal CTL1 is transmitted from the RFIC 3 to the tracking circuit 50E.
  • switch 53 of tracking circuit 50 E connects APT 51 to output terminal 502 .
  • the power supply voltage VAPT is supplied from the tracking circuit 50E to the power amplifier circuit 10E in the APT mode.
  • the power amplifier circuit 10E receives the high frequency signal of band A from the RFIC 3 via the input terminal 101a.
  • the received high-frequency signal is amplified by the power amplifier 11 using the power supply voltage VAPT , and transmitted to the antenna 2a via the filter 21 and the output terminal 103a.
  • the radio frequency signal RF AH of band A of the first power class is transmitted from the communication device 5E.
  • the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50E.
  • switch 53 of tracking circuit 50 E connects ET 57 to output terminal 502 .
  • the ET57 generates the first ET mode power supply voltage VET1 .
  • the power supply voltage V ET1 is supplied from the tracking circuit 50E to the power amplifier circuit 10E in the first ET mode.
  • the power amplifier circuit 10E receives the high frequency signal of band A from the RFIC 3 via the input terminal 101a.
  • the received high-frequency signal is amplified by the power amplifier 11 using the power supply voltage VET1 , and transmitted to the antenna 2a via the filter 21 and the output terminal 103a.
  • the radio frequency signal RF AL of band A of the second power class is transmitted from the communication device 5E.
  • the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50E.
  • switch 53 of tracking circuit 50 E connects ET 57 to output terminal 502 .
  • ET57 generates the power supply voltage V ET2 for the second ET mode.
  • the power supply voltage V ET2 is supplied from the tracking circuit 50E to the power amplifier circuit 10E in the second ET mode.
  • the power amplifier circuit 10E receives a high frequency signal of band A from RFIC 3 via input terminal 101a, and receives a high frequency signal of band B from RFIC 3 via input terminal 101b.
  • the received high-frequency signal of band A is amplified by the power amplifier 11 using the power supply voltage VET2 , and transmitted to the antenna 2a via the filter 21 and the output terminal 103a.
  • the received high-frequency signal of band B is amplified by the power amplifier 13 and transmitted to the antenna 2b via the filter 23 and the output terminal 103b.
  • the radio frequency signal RF AL of band A of the second power class and the radio frequency signal RF B of band B of the second power class are simultaneously transmitted from the communication device 5E.
  • the high-frequency circuit 1E includes the power amplifier circuit 10E and the tracking circuit 50E connected to the power amplifier circuit 10E.
  • the control signal CTL1 indicating the first power class defined by is received
  • the power amplifier circuit 10E is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown is received, the power supply voltage is supplied to the power amplifier circuit 10E in the ET mode.
  • the power amplifier circuit 10E includes a power amplifier 11 corresponding to the second power class, a filter 21 connected to the power amplifier 11 and having a passband including band A, a power amplifier 13 corresponding to the second power class, a filter 23 connected to the power amplifier 13 and having a passband including band B, wherein bands A and B are a combination of bands that can be transmitted simultaneously, the tracking circuit 50E receiving the control signal CTL2, When the signal of band A is transmitted and the signal of band B is not transmitted, the power amplifier 11 is supplied with the power supply voltage V ET1 in the first ET mode, the control signal CTL2 is received, and the signal of band A is not transmitted.
  • the power amplifier 11 When the signal and the signal of band B are simultaneously transmitted, the power amplifier 11 is supplied with the power supply voltage V ET2 in the second ET mode, and the power supply voltage V ET2 supplied in the second ET mode is supplied in the first ET mode. higher than the power supply voltage VET1 .
  • the power amplifier circuit 10E is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the A power supply voltage is supplied in the 1ET mode or the 2nd ET mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Furthermore, since the power supply voltage V ET2 is higher than the power supply voltage V ET1 , it is possible to improve the linearity of the power amplifier 11 against interference (wraparound) by the signal of the band B when simultaneously transmitting the signals of the bands A and B. .
  • tracking circuit 50E supplies power amplifier circuit 10E with power supply voltage V in the APT mode when control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage is supplied to the power amplifier circuit 10E in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10E includes a power amplifier 11 corresponding to the second power class, a filter 21 connected to the power amplifier 11 and having a passband including band A, a power amplifier 13 corresponding to the second power class, a filter 23 connected to the power amplifier 13 and having a passband including band B, wherein bands A and B are a combination of bands that can be transmitted simultaneously, the tracking circuit 50E receiving the control signal CTL2, When the signal of band A is transmitted and the signal of band B is not transmitted, the power amplifier 11 is supplied with the power supply voltage V ET1 in the first ET mode, the control signal CTL2 is received, and the signal of band A is not transmitted.
  • the power amplifier 11 When the signal and the signal of band B are simultaneously transmitted, the power amplifier 11 is supplied with the power supply voltage V ET2 in the second ET mode, and the power supply voltage V ET2 supplied in the second ET mode is supplied in the first ET mode. higher than the power supply voltage VET1 .
  • the tracking circuit 50E can achieve the same effects as the high-frequency circuit 1E.
  • Embodiment 7 will be described.
  • This embodiment differs from the above embodiments mainly in that the tracking mode is switched according to the output power instead of the power class.
  • the present embodiment will be described, focusing on the differences from the first embodiment.
  • the communication device according to the present embodiment is the same as the communication device according to each of the above-described embodiments, so illustration and description are omitted.
  • the tracking mode is switched according to the output power by using control signals CTL1 and CTL2 having contents different from those in the above embodiments.
  • the control signal CTL1 according to the present embodiment indicates that the output power exceeds the threshold power in a predetermined period.
  • the control signal CTL2 according to the present embodiment indicates that the output power does not exceed the threshold power in a predetermined period.
  • the length of the predetermined period the length of the period suitable for switching the tracking mode is used.
  • a unit for changing the power supply voltage in the APT mode for example, one frame unit
  • An output power suitable for switching the tracking mode is used as the threshold power.
  • 29 dBm can be used as the threshold power, but it is not limited to this.
  • the high-frequency circuit 1 is connected to the power amplifier circuit 10 and the power amplifier circuit 10.
  • a tracking circuit 50 wherein the tracking circuit 50 supplies the power supply voltage VAPT in the APT mode to the power amplifier circuit 10 when the control signal CTL1 indicating that the output power exceeds the threshold power for a predetermined period of time is received. Then, when the control signal CTL2 indicating that the output power does not exceed the threshold power for a predetermined period is received, the power amplifier circuit 10 is supplied with the power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10 when the output power exceeds the threshold power for a predetermined period, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode. Therefore, in the period when higher output power is required, the use of the ET mode, in which it is difficult to supply a higher power supply voltage, can be avoided, and the PAE can be improved in the APT mode.
  • the power supply voltage V ET is supplied in the ET mode. Therefore, PAE can be improved more than when the power supply voltage V APT is supplied in the APT mode. Even if a first power class defined with a higher maximum output power is used, that maximum output power is not necessarily required for a predetermined period of time. Therefore, by switching between the APT mode and the ET mode according to the output power, it is possible to increase the use of the ET mode and further improve the PAE.
  • control signals CTL1 and CTL2 according to the present embodiment can be applied to any of the second to sixth embodiments.
  • the high-frequency circuit and communication device according to the present invention have been described above based on the embodiments, the high-frequency circuit and communication device according to the present invention are not limited to the above-described embodiments. Another embodiment realized by combining arbitrary constituent elements in the above embodiment, and a modification obtained by applying various modifications that a person skilled in the art can think of without departing from the scope of the present invention to the above embodiment, the present invention also includes various devices incorporating the above-described high-frequency circuit.
  • a coupler may be inserted between the filter and the output terminal.
  • the high-frequency circuit 1E may further include a switch 30 connected between the antennas 2a and 2b and the filters 21 and 23.
  • the switch 30 has a terminal 301 connected to the antenna 2a, a terminal 302 connected to the antenna 2b, a terminal 303 connected to the output terminal 103a of the power amplifier circuit 10E, and a power and a terminal 304 connected to the output terminal 103b of the amplifier circuit 10E.
  • switch 30 can exclusively connect terminal 301 to terminals 303 and 304 and exclusively connect terminal 302 to terminals 303 and 304 based on a control signal from RFIC 3, for example. can do. That is, switch 30 can connect terminal 301 to one of terminals 303 and 304 and connect terminal 302 to the other of terminals 303 and 304 .
  • the communication device was a transmission device, but may be a transmission/reception device.
  • the high frequency circuit may comprise a low noise amplifier circuit.
  • the present invention can be widely used in communication equipment such as mobile phones as a high-frequency circuit arranged in the front end section.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)

Abstract

La présente divulgation concerne un circuit haute fréquence (1) qui comprend un circuit d'amplification de puissance électrique (10), et un circuit de suivi (50) connecté au circuit d'amplification de puissance électrique (10). Lors de la réception d'un signal de commande (CTL1) indiquant une première classe de puissance définie à l'aide d'une puissance électrique la plus élevée égale ou supérieure à une puissance électrique la plus élevée prescrite, le circuit de suivi (50) fournit une tension d'alimentation électrique (VAPT) dans un mode APT au circuit d'amplification de puissance électrique (10). Lors de la réception d'un signal de commande (CTL2) indiquant une deuxième classe de puissance définie à l'aide d'une puissance électrique la plus élevée inférieure à la puissance électrique la plus élevée prescrite, le circuit de suivi (50) fournit une tension d'alimentation électrique (VET) dans un mode ET au circuit d'amplification de puissance électrique (10).
PCT/JP2022/044295 2021-12-21 2022-11-30 Circuit haute fréquence, circuit de suivi et circuit d'amplification de puissance électrique WO2023120086A1 (fr)

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JP2021206767 2021-12-21

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009060652A1 (fr) * 2007-11-05 2009-05-14 Nec Corporation Amplificateur de puissance et émetteur radio équipé de celui-ci
JP2019536307A (ja) * 2016-09-30 2019-12-12 テレフオンアクチーボラゲット エルエム エリクソン（パブル） 無線通信ネットワークにおけるセル選択のための方法およびノード
JP2020145613A (ja) * 2019-03-07 2020-09-10 株式会社村田製作所 高周波回路および通信装置
JP2021129223A (ja) * 2020-02-14 2021-09-02 株式会社村田製作所 高周波回路、高周波モジュール及び通信装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009060652A1 (fr) * 2007-11-05 2009-05-14 Nec Corporation Amplificateur de puissance et émetteur radio équipé de celui-ci
JP2019536307A (ja) * 2016-09-30 2019-12-12 テレフオンアクチーボラゲット エルエム エリクソン（パブル） 無線通信ネットワークにおけるセル選択のための方法およびノード
JP2020145613A (ja) * 2019-03-07 2020-09-10 株式会社村田製作所 高周波回路および通信装置
JP2021129223A (ja) * 2020-02-14 2021-09-02 株式会社村田製作所 高周波回路、高周波モジュール及び通信装置

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