WO2023120086A1 - High-frequency circuit, tracking circuit, and electric power amplification circuit - Google Patents

High-frequency circuit, tracking circuit, and electric power amplification circuit Download PDF

Info

Publication number
WO2023120086A1
WO2023120086A1 PCT/JP2022/044295 JP2022044295W WO2023120086A1 WO 2023120086 A1 WO2023120086 A1 WO 2023120086A1 JP 2022044295 W JP2022044295 W JP 2022044295W WO 2023120086 A1 WO2023120086 A1 WO 2023120086A1
Authority
WO
WIPO (PCT)
Prior art keywords
power
power amplifier
circuit
supply voltage
power supply
Prior art date
Application number
PCT/JP2022/044295
Other languages
French (fr)
Japanese (ja)
Inventor
聡 田中
伸也 人見
弘嗣 森
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Publication of WO2023120086A1 publication Critical patent/WO2023120086A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • the present invention relates to high frequency circuits, tracking circuits and power amplifier circuits.
  • 3GPP registered trademark (3rd Generation Partnership Project) is discussing power classes that allow higher maximum output power (for example, power class 1, 1.5, etc.) in mobile communication systems.
  • power class 1, 1.5, etc. the power consumption increases, so it is desired to improve efficiency in power amplification.
  • the power-added efficiency (PAE) is improved by applying the envelope tracking mode to the power amplifier circuit.
  • the present invention provides a high-frequency circuit, a tracking circuit, and a power amplifier circuit capable of improving PAE in a power amplifier circuit corresponding to a power class that allows a higher maximum output power than before.
  • a high-frequency circuit includes a power amplifier circuit and a tracking circuit connected to the power amplifier circuit, the tracking circuit indicating a first power class defined by a maximum power equal to or higher than a predetermined maximum power.
  • a power amplifier circuit is supplied with a power supply voltage in an average power tracking mode when a first control signal is received, and a second control signal is received indicating a second power class defined by a maximum power less than a predetermined maximum power. supply voltage to the power amplifier circuit in envelope tracking mode.
  • a tracking circuit supplies a power supply voltage to a power amplifier circuit in an average power tracking mode when a first control signal indicating a first power class defined by a maximum power equal to or higher than a predetermined maximum power is received. and supplying the power supply voltage in envelope tracking mode to the power amplifier circuit when a second control signal is received indicating a second power class defined by a maximum power less than the predetermined maximum power.
  • a power amplifier circuit corresponds to a first power class defined by a maximum power equal to or higher than a predetermined maximum power, and to which an average power tracking mode is applied and an envelope tracking mode is not applied; a second power amplifier that corresponds to a second power class defined by a maximum power that is less than a predetermined maximum power, to which an envelope tracking mode is applied and to which an average power tracking mode is not applied.
  • a high-frequency circuit includes a power amplifier circuit and a tracking circuit connected to the power amplifier circuit, wherein the tracking circuit performs first control indicating that output power exceeds threshold power for a predetermined period of time. supplying a power supply voltage in an average power tracking mode to a power amplifier circuit when a signal is received, and power amplifying when a second control signal is received indicating that the output power does not exceed the threshold power for a predetermined period of time; Supply the supply voltage to the circuit in envelope tracking mode.
  • PAE can be improved in a power amplifier circuit corresponding to a power class that allows a higher maximum output power than before.
  • FIG. 1A is a graph showing an example of transition of power supply voltage in average power tracking mode.
  • FIG. 1B is a graph showing an example of transition of power supply voltage in analog envelope tracking mode.
  • FIG. 1C is a graph showing an example of transition of power supply voltage in digital envelope tracking mode.
  • FIG. 2 is a circuit configuration diagram of the communication device according to the first embodiment.
  • FIG. 3 is a diagram showing a transmission state of high-frequency signals of the first power class in the communication device according to the first embodiment.
  • FIG. 4 is a diagram showing a transmission state of high-frequency signals of the second power class in the communication device according to the first embodiment.
  • FIG. 5 is a circuit configuration diagram of a communication device according to the second embodiment.
  • FIG. 6 is a circuit configuration diagram of a communication device according to the third embodiment.
  • FIG. 7 is a circuit configuration diagram of a communication device according to a fourth embodiment.
  • FIG. 8 is a circuit configuration diagram of a communication device according to a fifth embodiment.
  • FIG. 9 is a diagram showing a transmission state of high-frequency signals of the first power class in the communication device according to the fifth embodiment.
  • FIG. 10 is a diagram showing a transmission state of high-frequency signals of the second power class in the communication device according to the fifth embodiment.
  • FIG. 11 is a circuit configuration diagram of a communication device according to a sixth embodiment.
  • FIG. 12 is a diagram showing a transmission state of high-frequency signals of the first power class in the communication device according to the sixth embodiment.
  • FIG. 13 is a diagram showing a transmission state of high frequency signals of the second power class in the communication device according to the sixth embodiment.
  • FIG. 14 is a diagram showing a state of simultaneous transmission of a transmission signal of the second power class of band A and a transmission signal of band B in the communication apparatus according to the sixth embodiment.
  • FIG. 15
  • each drawing is a schematic diagram that has been appropriately emphasized, omitted, or adjusted in proportion to show the present invention, and is not necessarily strictly illustrated, and the actual shape, positional relationship, and ratio may differ.
  • substantially the same configurations are denoted by the same reference numerals, and redundant description may be omitted or simplified.
  • connection includes not only direct connection with connection terminals and/or wiring conductors, but also electrical connection via other circuit elements.
  • Connected between A and B means connected to both A and B between A and B, and means connected in series to a path connecting A and B.
  • the tracking mode is a mode for dynamically adjusting the power supply voltage applied to the power amplifier circuit.
  • the tracking mode is a mode for dynamically adjusting the power supply voltage applied to the power amplifier circuit.
  • APT average power tracking
  • ET envelope tracking
  • the tracking mode is not limited to these.
  • APT mode analog ET mode and digital ET mode will be explained with reference to FIGS. 1A to 1C.
  • the horizontal axis represents time and the vertical axis represents voltage.
  • a thick solid line represents the power supply voltage, and a thin solid line (waveform) represents the modulated wave.
  • FIG. 1A is a graph showing an example of transition of power supply voltage in APT mode.
  • APT mode the power supply voltage is varied to a plurality of discrete voltage levels on a frame-by-frame basis. As a result, the power supply voltage signal forms a square wave.
  • APT mode the voltage level of the power supply voltage is determined based on the average output power. Note that in the APT mode, the voltage level may change in units smaller than one frame (for example, subframes).
  • a frame means a unit that constitutes a high-frequency signal (modulated wave).
  • a frame contains 10 subframes, each subframe contains multiple slots, and each slot consists of multiple symbols.
  • the subframe length is 1 ms and the frame length is 10 ms.
  • FIG. 1B is a graph showing an example of changes in power supply voltage in the analog ET mode.
  • Analog ET mode is an example of ET mode.
  • the envelope of the modulated wave is tracked by continuously varying the supply voltage.
  • the power supply voltage is determined based on the envelope signal.
  • An envelope signal is a signal that indicates the envelope of a modulated wave.
  • the envelope value is represented by the square root of (I2+Q2), for example.
  • (I, Q) represent constellation points.
  • a constellation point is a point representing a signal modulated by digital modulation on a constellation diagram.
  • (I, Q) is determined by the BBIC 4, for example, based on transmission information.
  • FIG. 1C is a graph showing an example of transition of the power supply voltage in the digital ET mode.
  • Digital ET mode is an example of ET mode.
  • the envelope of the modulated wave is tracked by varying the power supply voltage to multiple discrete voltage levels within one frame.
  • the power supply voltage signal forms a square wave.
  • the power supply voltage level is selected or set from a plurality of discrete voltage levels based on the envelope signal.
  • FIG. 2 is a circuit configuration diagram of the communication device 5 according to this embodiment.
  • the communication device 5 includes a high frequency circuit 1, an antenna 2, an RFIC (Radio Frequency Integrated Circuit) 3, and a BBIC (Baseband Integrated Circuit) 4.
  • RFIC Radio Frequency Integrated Circuit
  • BBIC Baseband Integrated Circuit
  • the high-frequency circuit 1 transmits high-frequency signals between the antenna 2 and the RFIC 3.
  • the internal configuration of the high frequency circuit 1 will be described later.
  • the antenna 2 is connected to the high frequency circuit 1.
  • the antenna 2 receives a high frequency signal from the high frequency circuit 1 and outputs it to the outside.
  • the RFIC 3 is an example of a signal processing circuit that processes high frequency signals. Specifically, the RFIC 3 performs signal processing such as up-conversion on the transmission signal input from the BBIC 4 , and outputs the high-frequency transmission signal generated by the signal processing to the transmission path of the high-frequency circuit 1 .
  • the RFIC 3 also has a control section that controls the high frequency circuit 1 . Some or all of the functions of the RFIC 3 as a control unit may be implemented outside the RFIC 3, for example, in the BBIC 4 or the high frequency circuit 1.
  • control unit of RFIC 3 transmits at least control signal CTL1 or CTL2 to high-frequency circuit 1 .
  • the control signal CTL1 is an example of a first control signal and indicates a first power class defined by maximum power equal to or higher than a predetermined maximum power.
  • the control signal CTL2 is an example of a second control signal and indicates a second power class defined by a maximum power equal to or higher than a predetermined maximum power.
  • a power class is a classification of terminal output power defined by maximum output power, etc.
  • a smaller power class value indicates a higher output power.
  • the maximum output power for power class 1 is 31 dBm
  • the maximum output power for power class 1.5 is 29 dBm
  • the maximum output power for power class 2 is 26 dBm
  • the maximum output power for power class 3 is 23 dBm. .
  • the terminal's maximum output power is defined as the output power at the terminal's antenna end. Measurement of the maximum output power of the terminal is performed, for example, by a method defined by 3GPP or the like. For example, in FIG. 2 the maximum output power is measured by measuring the radiated power at antenna 2 . Instead of measuring the radiated power, it is also possible to measure the output power of the antenna 2 by providing a terminal near the antenna 2 and connecting a measuring instrument (such as a spectrum analyzer) to the terminal.
  • a measuring instrument such as a spectrum analyzer
  • the predetermined maximum power is empirically and/or experimentally predetermined according to the required performance of the communication device 5, the performance of the power amplifier circuit 10 and the tracking circuit 50, and the like.
  • 29 dBm is used as the predetermined maximum power. That is, in the present embodiment, power class 1 or 1.5 can be used as the first power class, and power class 2 or 3 can be used as the second power class.
  • the predetermined maximum power is not limited to 29 dBm, and may be 26 dBm or 31 dBm.
  • control signals CTL1 and CTL2 are not limited to control signals that directly indicate the first power class and the second power class, respectively. That is, the control signals CTL1 and CTL2 may be control signals that indirectly indicate the first power class and the second power class, respectively. For example, the control signals CTL1 and CTL2 may be control signals for different switches corresponding to the first power class and the second power class, respectively. Also, the control signals CTL1 and CTL2 may be flag signals indicating 0 or 1, for example. In this case, the flag signal indicating one of 0 and 1 corresponds to the control signal CTL1, and the flag signal indicating the other of 0 and 1 corresponds to the control signal CTL2.
  • the BBIC 4 is a baseband signal processing circuit that performs signal processing using an intermediate frequency band that is lower in frequency than the high frequency signal transmitted by the high frequency circuit 1 .
  • Signals processed by the BBIC 4 include, for example, image signals for displaying images and/or audio signals for calling through speakers.
  • circuit configuration of the communication device 5 shown in FIG. 2 is an example, and is not limited to this.
  • communication device 5 may not include antenna 2 and/or BBIC 4 .
  • the high frequency circuit 1 includes a power amplifier circuit 10 and a tracking circuit 50 .
  • the power amplifier circuit 10 is connected to the tracking circuit 50 and can receive power supply voltage from the tracking circuit 50 .
  • a detailed circuit configuration of the power amplifier circuit 10 will be described later.
  • the tracking circuit 50 can supply the power supply voltage VAPT in the APT mode to the power amplifier circuit 10 when the control signal CTL1 is received. On the other hand, when the control signal CTL2 is received, the tracking circuit 50 can supply the power supply voltage VET to the power amplifier circuit 10 in the ET mode. A detailed circuit configuration of the tracking circuit 50 will be described later.
  • power amplifier circuit 10 includes power amplifier 11 , filter 21 , input terminal 101 , power supply voltage terminal 102 , and output terminal 103 .
  • the input terminal 101 is a terminal for receiving a high frequency transmission signal from the outside of the high frequency circuit 1 .
  • the input terminal 101 is connected to the RFIC 3 outside the high frequency circuit 1 .
  • a power supply voltage terminal 102 is a terminal for receiving a power supply voltage from the tracking circuit 50 .
  • the power supply voltage terminal 102 is connected to the output terminal 502 of the tracking circuit 50 outside the power amplifier circuit 10 .
  • the output terminal 103 is a terminal for supplying a high frequency transmission signal to the outside of the high frequency circuit 1 .
  • the output terminal 103 is connected to the antenna 2 outside the high frequency circuit 1 .
  • the power amplifier 11 is connected between the input terminal 101 and the filter 21 and is also connected to the power supply voltage terminal 102 . Specifically, the input terminal of the power amplifier 11 is connected to the input terminal 101 , and the output terminal of the power amplifier 11 is connected to the filter 21 and the power supply voltage terminal 102 .
  • the power amplifier 11 corresponds to the first power class and the second power class. That is, the power amplifier 11 can be used for amplifying high frequency signals in both the first power class and the second power class.
  • the power class that the power amplifier supports can be identified by the maximum output power of the power amplifier.
  • the maximum output power of a power amplifier corresponding to power class 1 is greater than 31 dBm.
  • the higher the maximum output power the larger the size of the power amplifier. Therefore, by comparing the sizes of two power amplifiers, it may be possible to make a relative comparison of the power classes supported by the two power amplifiers.
  • the filter 21 is connected between the power amplifier 11 and the output terminal 103 . Specifically, one end of the filter 21 is connected to the output end of the power amplifier 11 and the other end of the filter 21 is connected to the output terminal 103 .
  • the filter 21 has a passband including band A and has a power handling capability corresponding to the first power class.
  • the filter 21 may be configured using any of a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, an LC resonance filter, and a dielectric resonance filter, and further , but not limited to these.
  • Band A is a frequency band for communication systems built using radio access technology (RAT).
  • Band A is defined in advance by standardization organizations (eg, 3GPP, Institute of Electrical and Electronics Engineers (IEEE), etc.).
  • Examples of communication systems include a 5GNR system, an LTE system, and a WLAN (Wireless Local Area Network) system.
  • n77, n78, or n79 for 5GNR can be used, and licensed bands and unlicensed bands included in the range of 5 GHz to 7.125 GHz can also be used.
  • power amplifier circuit 10 may comprise an impedance matching circuit connected between any two circuit elements (eg, power amplifier 11 and filter 21, etc.).
  • the impedance matching circuit can be composed of inductors and/or capacitors, for example.
  • the power amplifier circuit 10 may not include the filter 21 .
  • the tracking circuit 50 includes an average power tracker (APT) 51, an envelope tracker (ET) 52, a switch 53, a control terminal 501, an output terminal 502, Prepare.
  • APT average power tracker
  • ET envelope tracker
  • a control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high-frequency circuit 1 .
  • the control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1 .
  • the output terminal 502 is a terminal for supplying power supply voltage to the power amplifier circuit 10 .
  • the output terminal 502 is connected to the power supply voltage terminal 102 of the power amplifier circuit 10 outside the tracking circuit 50 .
  • APT 51 can supply power supply voltage VAPT in APT mode.
  • the ET 52 can supply the supply voltage V ET in ET mode. Either the analog ET mode or the digital ET mode may be used as the ET mode. That is, the ET52 can be either an analog envelope tracker or a digital envelope tracker.
  • a switch 53 is connected between the APT 51 and ET 52 and the power amplifier 11 .
  • the switch 53 has a terminal 531 connected to the APT 51 , a terminal 532 connected to the ET 52 , and a terminal 533 connected to the output terminal 502 .
  • the switch 53 is configured by, for example, an SPDT (Single-Pole Double-Throw) type switch circuit.
  • the switch 53 can connect the terminals 531 and 532 to the terminal 533 based on the control signal from the RFIC3. Specifically, when control signal CTL1 is received, switch 53 can connect APT51 to output terminal 502 without connecting ET52 to output terminal 502 . On the other hand, the switch 53 can connect the ET52 to the output terminal 502 without connecting the APT51 to the output terminal 502 when the control signal CTL2 is received.
  • circuit configuration of the tracking circuit 50 shown in FIG. 2 is an example, and is not limited to this.
  • switch 53 may not be included in tracking circuit 50 and may be included in power amplifier circuit 10 .
  • FIG. 3 is a diagram showing the state of transmission of high-frequency signals of the first power class in communication device 5 according to the present embodiment.
  • FIG. 4 is a diagram showing a transmission state of a high-frequency signal of the second power class in communication device 5 according to the present embodiment.
  • the power class high-frequency signal means a high-frequency signal transmitted from the communication device 5 in a state in which transmission of a high-frequency signal having the maximum output power of the power class is permitted. Therefore, high-frequency signals of a power class include not only high-frequency signals having an output power equal to the maximum output power of the power class, but also high-frequency signals having an output power less than the maximum output power of the power class.
  • the control signal CTL1 is transmitted from the RFIC 3 to the tracking circuit 50 as shown in FIG.
  • switch 53 of tracking circuit 50 connects APT 51 to output terminal 502 .
  • the power supply voltage VAPT is supplied from the tracking circuit 50 to the power amplifier circuit 10 in the APT mode.
  • the power amplifier circuit 10 receives a high frequency signal of band A from the RFIC 3 via the input terminal 101 .
  • the received high frequency signal is amplified by the power amplifier 11 using the power supply voltage VAPT and transmitted to the antenna 2 via the filter 21 and the output terminal 103 .
  • the radio frequency signal RF AH of the first power class is transmitted from the communication device 5 .
  • the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50 as shown in FIG.
  • switch 53 of tracking circuit 50 connects ET 52 to output terminal 502 .
  • the power supply voltage V ET is supplied from the tracking circuit 50 to the power amplifier circuit 10 in the ET mode.
  • the power amplifier circuit 10 receives a high frequency signal of band A from the RFIC 3 via the input terminal 101 .
  • the received high frequency signal is amplified by the power amplifier 11 using the power supply voltage V ET and transmitted to the antenna 2 via the filter 21 and the output terminal 103 .
  • the radio frequency signal RF AL of the second power class is transmitted from the communication device 5 .
  • the high-frequency circuit 1 includes the power amplifier circuit 10 and the tracking circuit 50 connected to the power amplifier circuit 10.
  • the tracking circuit 50 has a maximum power equal to or higher than a predetermined maximum power.
  • the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown is received, the power amplifier circuit 10 is supplied with the power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10 includes power amplifiers 11 corresponding to the first power class and the second power class, and the tracking circuit 50 has an output terminal 502 connected to the power amplifiers 11 and a power supply voltage V ET in the ET mode.
  • APT51 capable of supplying a power supply voltage V APT in APT mode; and a switch 53 connected between the ET52 and APT51 and the output terminal 502, the switch 53 receiving the control signal CTL1.
  • APT 51 is connected to output terminal 502 when received, and ET 52 is connected to output terminal 502 when control signal CTL2 is received.
  • the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode. Therefore, in the first power class, it is possible to avoid the use of the ET mode in which it is difficult to cope with the supply of a higher power supply voltage, and to improve the PAE in the APT mode.
  • the power supply voltage V ET is supplied in ET mode. Therefore, PAE can be improved more than when the power supply voltage V APT is supplied in the APT mode.
  • BPSK Binary Phase-Shift Keying
  • BPSK Binary Phase-Shift Keying
  • the tracking circuit 50 supplies the power amplifier circuit 10 with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10 in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10 includes power amplifiers 11 corresponding to the first power class and the second power class, and the tracking circuit 50 has an output terminal 502 connected to the power amplifiers 11 and a power supply voltage V ET in the ET mode.
  • APT51 capable of supplying a power supply voltage V APT in APT mode; and a switch 53 connected between the ET52 and APT51 and the output terminal 502, the switch 53 receiving the control signal CTL1.
  • APT 51 is connected to output terminal 502 when received, and ET 52 is connected to output terminal 502 when control signal CTL2 is received.
  • the tracking circuit 50 can achieve the same effect as the high-frequency circuit 1 described above.
  • Embodiment 2 Next, Embodiment 2 will be described.
  • This embodiment mainly differs from the first embodiment in that one multimode tracker (MT: Multimode Tracker) is used instead of two trackers (APT and ET).
  • MT Multimode Tracker
  • APT and ET two trackers
  • the communication device 5A according to the present embodiment is the same as the communication device 5 according to the first embodiment except that the high frequency circuit 1A is provided instead of the high frequency circuit 1. Furthermore, the high frequency circuit 1A according to the present embodiment is the same as the high frequency circuit 1 according to the first embodiment except that a tracking circuit 50A is provided instead of the tracking circuit 50. FIG. Therefore, the tracking circuit 50A will be described below, and descriptions of other circuits and the like will be omitted.
  • the tracking circuit 50A can supply the power supply voltage VAPT in the APT mode to the power amplifier circuit 10 when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10 can be supplied with the power supply voltage V ET in ET mode.
  • the circuit configuration of the tracking circuit 50A will be described with reference to FIG.
  • FIG. 5 is a circuit configuration diagram of a communication device 5A according to this embodiment.
  • a tracking circuit 50A included in the communication device 5A includes an MT54, a control terminal 501, and an output terminal 502.
  • FIG. 5 is a circuit configuration diagram of a communication device 5A according to this embodiment.
  • a tracking circuit 50A included in the communication device 5A includes an MT54, a control terminal 501, and an output terminal 502.
  • FIG. 5 is a circuit configuration diagram of a communication device 5A according to this embodiment.
  • a tracking circuit 50A included in the communication device 5A includes an MT54, a control terminal 501, and an output terminal 502.
  • FIG. 5 is a circuit configuration diagram of a communication device 5A according to this embodiment.
  • a tracking circuit 50A included in the communication device 5A includes an MT54, a control terminal 501, and an output terminal 502.
  • the control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high frequency circuit 1A.
  • the control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1A.
  • the output terminal 502 is a terminal for supplying power supply voltage to the power amplifier circuit 10 .
  • the output terminal 502 is connected to the power supply voltage terminal 102 of the power amplifier circuit 10 outside the tracking circuit 50A.
  • the MT54 can selectively supply the ET mode power supply voltage V_ET and the APT mode power supply voltage V_APT . Specifically, the MT 54 supplies the power amplifier 11 with the power supply voltage V APT in the APT mode when the control signal CTL1 is received, and supplies the power amplifier 11 with the ET mode when the control signal CTL2 is received.
  • a power supply voltage V ET can be provided.
  • the internal configuration of the MT54 is not particularly limited, but includes, for example, a DC (Direct Current)-DC converter (not shown) shared by the APT mode and the ET mode and a modulator (not shown) used in the ET mode.
  • the MT54 can convert the input voltage to the power supply voltage V APT using a DC-DC converter in APT mode.
  • the MT54 can convert the input voltage into a reference voltage using a DC-DC converter and modulate the reference voltage using a modulator to generate the power supply voltage V ET .
  • the high-frequency circuit 1A includes the power amplifier circuit 10 and the tracking circuit 50A connected to the power amplifier circuit 10.
  • the tracking circuit 50A can When the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown is received, the power amplifier circuit 10 is supplied with the power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10 includes a power amplifier 11 corresponding to the first power class and the second power class, and the tracking circuit 50A can supply the power supply voltage in the ET mode and can supply the power supply voltage in the APT mode.
  • the MT54 supplies the power amplifier 11 with the power supply voltage V APT in the APT mode when the control signal CTL1 is received, and supplies the power amplifier 11 with the power supply voltage V APT in the ET mode when the control signal CTL2 is received. Provides voltage V ET .
  • the power amplifier circuit 10 in the first power class defined with a higher maximum output power, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Furthermore, the use of the MT54 can simplify the circuit configuration of the tracking circuit 50A.
  • the tracking circuit 50A supplies the power amplifier circuit 10 with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10 in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10 includes a power amplifier 11 corresponding to the first power class and the second power class, and the tracking circuit 50A can supply the power supply voltage in the ET mode and can supply the power supply voltage in the APT mode.
  • the MT54 supplies the power amplifier 11 with the power supply voltage V APT in the APT mode when the control signal CTL1 is received, and supplies the power amplifier 11 with the power supply voltage V APT in the ET mode when the control signal CTL2 is received. Provides voltage V ET .
  • the tracking circuit 50A can achieve the same effects as the high-frequency circuit 1A.
  • Embodiment 3 differs from the first embodiment mainly in that the power amplifier circuit includes two power amplifiers respectively corresponding to the first power class and the second power class.
  • the present embodiment will be described below with reference to FIG. 6, focusing on the differences from the first embodiment.
  • the communication device 5B according to the present embodiment includes a high-frequency circuit 1B instead of the high-frequency circuit 1, and two antennas 2a and 2b instead of the antenna 2. It is similar to the communication device 5 .
  • the high-frequency circuit 1B according to the present embodiment is similar to the high-frequency circuit 1 according to the first embodiment, except that a power amplifier circuit 10B and a tracking circuit 50B are provided instead of the power amplifier circuit 10 and the tracking circuit 50. It is the same. Therefore, the power amplifier circuit 10B and the tracking circuit 50B will be described below, and descriptions of other circuits and the like will be omitted.
  • the power amplifier circuit 10B is connected to the tracking circuit 50B and can receive power supply voltage from the tracking circuit 50B.
  • the circuit configuration of the power amplifier circuit 10B will be described with reference to FIG.
  • FIG. 6 is a circuit configuration diagram of communication device 5B according to the present embodiment.
  • a power amplifier circuit 10B included in the communication device 5B includes power amplifiers 11B and 12B, filters 21B and 22B, input terminals 101a and 101b, power supply voltage terminals 102a and 102b, and output terminals 103a and 103b.
  • the input terminal 101a is a terminal for receiving a first power class high frequency transmission signal from the outside of the high frequency circuit 1B.
  • the input terminal 101b is a terminal for receiving a high frequency transmission signal of the second power class from the outside of the high frequency circuit 1B.
  • Each of the input terminals 101a and 101b is connected to the RFIC 3 outside the high frequency circuit 1B.
  • the power supply voltage terminal 102a is a terminal for receiving the power supply voltage VAPT from the tracking circuit 50B.
  • the power supply voltage terminal 102a is connected to the output terminal 502a of the tracking circuit 50B outside the power amplifier circuit 10B.
  • the power supply voltage terminal 102b is a terminal for receiving the power supply voltage VET from the tracking circuit 50B.
  • the power supply voltage terminal 102b is connected to the output terminal 502b of the tracking circuit 50B outside the power amplifier circuit 10B.
  • the output terminal 103a is a terminal for supplying a high frequency transmission signal of the first power class to the outside of the high frequency circuit 1B.
  • the output terminal 103b is a terminal for supplying a high frequency transmission signal of the second power class to the outside of the high frequency circuit 1B.
  • Output terminals 103a and 103b are connected to antennas 2a and 2b, respectively, outside the high-frequency circuit 1B.
  • the power amplifier 11B is an example of a first power amplifier, is connected between the input terminal 101a and the filter 21B, and is connected to the power supply voltage terminal 102a. Specifically, the input terminal of the power amplifier 11B is connected to the input terminal 101a, and the output terminal of the power amplifier 11B is connected to the filter 21B and the power supply voltage terminal 102a.
  • the power amplifier 11B corresponds to the first power class. That is, the power amplifier 11B can amplify the high-frequency signal to the power that satisfies the maximum output power of the first power class. In this embodiment, the power amplifier 11B is used for amplifying high frequency signals only in the first power class out of the first power class and the second power class. Also, the APT mode is applied to the power amplifier 11B, and the ET mode is not applied.
  • the power amplifier 12B is an example of a second power amplifier, connected between the input terminal 101b and the filter 22B, and connected to the power supply voltage terminal 102b. Specifically, the input terminal of the power amplifier 12B is connected to the input terminal 101b, and the output terminal of the power amplifier 12B is connected to the filter 22B and the power supply voltage terminal 102b.
  • the power amplifier 12B corresponds to the second power class. In other words, the power amplifier 12B can amplify the high frequency signal to the power that satisfies the maximum output power of the second power class.
  • the power amplifier 12B is used for amplifying high frequency signals only in the second power class out of the first power class and the second power class. Also, the ET mode is applied to the power amplifier 12B, and the APT mode is not applied.
  • the filter 21B is connected between the power amplifier 11B and the output terminal 103a. Specifically, one end of the filter 21B is connected to the output end of the power amplifier 11B, and the other end of the filter 21B is connected to the output terminal 103a.
  • the filter 21B has a passband including band A and has a power handling capability corresponding to the first power class.
  • the filter 21B may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
  • the filter 22B is connected between the power amplifier 12B and the output terminal 103b. Specifically, one end of the filter 22B is connected to the output end of the power amplifier 12B, and the other end of the filter 22B is connected to the output terminal 103b.
  • the filter 22B has a passband including band A and has a power handling capability corresponding to the second power class.
  • the filter 22B may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
  • the circuit configuration of the power amplifier circuit 10B shown in FIG. 6 is an example, and is not limited to this.
  • the power amplifier circuit 10B may have only one of the output terminals 103a and 103b. That is, the communication device 5B may have only one of the antennas 2a and 2b.
  • the power amplifier circuit 10B may include a switch connected between the output terminal of the power amplifier 11B and the output terminal of the power amplifier 12B and one of the output terminals 103a and 103b.
  • the power amplifier circuit 10B may include an impedance matching circuit connected between any two circuit elements (for example, the power amplifier 11B and the filter 21B, etc.).
  • the power amplifier circuit 10B may not include the filters 21B and/or 22B.
  • the tracking circuit 50B can supply the power supply voltage VAPT in the APT mode to the power amplifier circuit 10B when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10B can be supplied with the power supply voltage V ET in the ET mode.
  • the circuit configuration of the tracking circuit 50B will be described with reference to FIG.
  • a tracking circuit 50B includes an MT 54, a switch 55, a control terminal 501, and output terminals 502a and 502b.
  • the control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high frequency circuit 1B.
  • the control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1B.
  • the output terminal 502a is an example of a first output terminal, and is a terminal for supplying the power supply voltage VAPT to the power amplifier circuit 10B.
  • the output terminal 502a is connected to the power supply voltage terminal 102a of the power amplifier circuit 10B outside the tracking circuit 50B.
  • the output terminal 502b is an example of a second output terminal, and is a terminal for supplying the power supply voltage VET to the power amplifier circuit 10B.
  • the output terminal 502b is connected to the power supply voltage terminal 102b of the power amplifier circuit 10B outside the tracking circuit 50B.
  • the MT 54 can selectively supply the ET mode power supply voltage V_ET and the APT mode power supply voltage VAPT as in the second embodiment.
  • the switch 55 is connected between the MT54 and the output terminals 502a and 502b. Specifically, the switch 55 has a terminal 551 connected to the MT54, a terminal 552 connected to the output terminal 502a, and a terminal 553 connected to the output terminal 502b.
  • the switch 55 is composed of, for example, an SPDT type switch circuit.
  • the switch 55 can connect the terminal 551 to the terminals 552 and 553 based on the control signal from the RFIC3. Specifically, when the control signal CTL1 is received, the switch 55 can connect the MT 54 to the output terminal 502a without connecting it to the output terminal 502b. On the other hand, when the control signal CTL2 is received, the switch 55 can connect the MT54 to the output terminal 502b without connecting it to the output terminal 502a.
  • the MT 54 can supply the power supply voltage VAPT in the APT mode to the power amplifier 11B via the switch 55 when the control signal CTL1 is received. Further, the MT 54 can supply the power supply voltage V ET to the power amplifier 12B in the ET mode via the switch 55 when the control signal CTL2 is received.
  • circuit configuration of the tracking circuit 50B shown in FIG. 6 is an example, and is not limited to this.
  • switch 55 may not be included in tracking circuit 50B and may be included in power amplifier circuit 10B.
  • the high-frequency circuit 1B includes the power amplifier circuit 10B and the tracking circuit 50B connected to the power amplifier circuit 10B.
  • the control signal CTL1 indicating the first power class defined by is received
  • the power amplifier circuit 10B is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown is received, the power amplifier circuit 10B is supplied with the power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class, and the tracking circuit 50B has an output terminal 502a connected to the power amplifier 11B. , an output terminal 502b connected to the power amplifier 12B, an MT54 capable of supplying power supply voltage in the ET mode and capable of supplying power supply voltage in the APT mode, and connected between the MT54 and the output terminals 502a and 502b a switch 55, the MT54 supplies the power amplifier 11B with the power supply voltage V APT in the APT mode via the switch 55 when the control signal CTL1 is received, and when the control signal CTL2 is received, Power amplifier 12B is supplied via switch 55 with power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10 in the first power class defined with a higher maximum output power, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained.
  • the tracking circuit 50B supplies the power amplifier circuit 10B with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10B in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class, and the tracking circuit 50B has an output terminal 502a connected to the power amplifier 11B.
  • the tracking circuit 50B can achieve the same effects as the high-frequency circuit 1B.
  • the power amplifier circuit 10B corresponds to the first power class defined by the maximum power equal to or higher than the predetermined maximum power, and the power amplifier 11B to which the APT mode is applied and the power amplifier 11B to which the maximum power is less than the predetermined maximum power. and a power amplifier 12B that corresponds to the second power class defined in and to which the ET mode is applied.
  • the power amplifier circuit 10B can achieve the same effects as the high-frequency circuit 1B.
  • Embodiment 4 differs from the above-described third embodiment mainly in that the tracking circuit includes APT 51 and ET 52 instead of MT 54 and switch 55 .
  • the present embodiment will be described below with reference to FIG. 7, focusing on the differences from the third embodiment.
  • the communication device 5C according to the present embodiment is the same as the communication device 5B according to the third embodiment except that the high frequency circuit 1C is provided instead of the high frequency circuit 1B.
  • a high frequency circuit 1C according to the present embodiment is similar to the high frequency circuit 1B according to the third embodiment except that a tracking circuit 50C is provided instead of the tracking circuit 50B. Therefore, the tracking circuit 50C will be described below, and descriptions of other circuits and the like will be omitted.
  • the tracking circuit 50C can supply the power amplifier circuit 10B with the power supply voltage VAPT in the APT mode when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10B can be supplied with the power supply voltage V ET in the ET mode.
  • the circuit configuration of the tracking circuit 50C will be described with reference to FIG.
  • FIG. 7 is a circuit configuration diagram of a communication device 5C according to this embodiment.
  • a tracking circuit 50C included in the communication device 5C includes an APT 51, an ET 52, a control terminal 501, and output terminals 502a and 502b.
  • the output terminal 502a is a terminal for supplying the power supply voltage VAPT in the APT mode to the power amplifier 11B of the power amplifier circuit 10B.
  • the output terminal 502a is connected to the power supply voltage terminal 102a of the power amplifier circuit 10B outside the tracking circuit 50C.
  • the output terminal 502b is a terminal for supplying the power supply voltage V ET in the ET mode to the power amplifier 12B of the power amplifier circuit 10B.
  • the output terminal 502b is connected to the power supply voltage terminal 102b of the power amplifier circuit 10B outside the tracking circuit 50C.
  • APT 51 is connected to output terminal 502a.
  • the APT 51 can supply the power supply voltage VAPT in the APT mode to the power amplifier 11B via the output terminal 502a and the power supply voltage terminal 102a when the control signal CTL1 is received.
  • ET52 is connected to output terminal 502b. ET 52 can supply power supply voltage V ET in ET mode to power amplifier 12B via output terminal 502b and power supply voltage terminal 102b when control signal CTL2 is received.
  • the high-frequency circuit 1C includes the power amplifier circuit 10B and the tracking circuit 50C connected to the power amplifier circuit 10B.
  • the power amplifier circuit 10B When the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10B is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown When the control signal CTL2 shown is received, the power amplifier circuit 10B is supplied with the power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class. It comprises an APT 51 capable of supplying a voltage VAPT , and an ET 52 connected to the power amplifier 12B and capable of supplying a power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10 in the first power class defined with a higher maximum output power, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Furthermore, since the APT 51 is connected to the power amplifier 11B and the ET 52 is connected to the power amplifier 12B, switching by a switch or the like becomes unnecessary, and the circuit configuration of the tracking circuit 50C can be simplified.
  • the tracking circuit 50C supplies the power amplifier circuit 10B with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10B in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class. It comprises an APT 51 capable of supplying a voltage VAPT , and an ET 52 connected to the power amplifier 12B and capable of supplying a power supply voltage V ET in the ET mode.
  • the tracking circuit 50C can achieve the same effects as the high-frequency circuit 1C.
  • Embodiment 5 Next, Embodiment 5 will be described.
  • the present embodiment is different from the first embodiment mainly in that a high frequency signal of the first power class can be output by using two power amplifiers.
  • the present embodiment will be described below with reference to FIGS. 8 to 10, focusing on the differences from the first embodiment.
  • a communication device 5D according to the present embodiment is the same as the communication device 5 according to the first embodiment except that a high frequency circuit 1D is provided instead of the high frequency circuit 1. Further, the high-frequency circuit 1D according to the present embodiment is similar to the high-frequency circuit 1 according to the first embodiment, except that a power amplifier circuit 10D and a tracking circuit 50D are provided instead of the power amplifier circuit 10 and the tracking circuit 50. It is the same. Therefore, the power amplifier circuit 10D and the tracking circuit 50D will be described below, and descriptions of other circuits and the like will be omitted.
  • the power amplifier circuit 10D is connected to the tracking circuit 50D and can receive power supply voltage from the tracking circuit 50D. A circuit configuration of the power amplifier circuit 10D will be described with reference to FIG.
  • FIG. 8 is a circuit configuration diagram of a communication device 5D according to this embodiment.
  • a power amplifier circuit 10D included in the communication device 5D includes power amplifiers 11D and 12D, a combiner 14, a filter 21, input terminals 101a and 101b, power supply voltage terminals 102a and 102b, and an output terminal 103. .
  • Each of the input terminals 101a and 101b is a terminal for receiving a high frequency transmission signal of band A from the outside of the high frequency circuit 1D.
  • Each of the input terminals 101a and 101b is connected to the RFIC 3 outside the high frequency circuit 1D.
  • the power supply voltage terminal 102a is a terminal for receiving the power supply voltage V APT /V ET from the tracking circuit 50D.
  • the power supply voltage terminal 102a is connected to the output terminal 502a of the tracking circuit 50D outside the power amplifier circuit 10D.
  • the power supply voltage terminal 102b is a terminal for receiving the power supply voltage VAPT from the tracking circuit 50D.
  • the power supply voltage terminal 102b is connected to the output terminal 502b of the tracking circuit 50D outside the power amplifier circuit 10D.
  • the output terminal 103 is a terminal for supplying a high frequency transmission signal to the outside of the high frequency circuit 1D.
  • the output terminal 103 is connected to the antenna 2 outside the high frequency circuit 1D.
  • the power amplifier 11D is an example of a first power amplifier, is connected between the input terminal 101a and the combiner 14, and is connected to the power supply voltage terminal 102a. Specifically, the input terminal of the power amplifier 11D is connected to the input terminal 101a, and the output terminal of the power amplifier 11D is connected to the combiner 14 and the power supply voltage terminal 102a.
  • the power amplifier 11D corresponds to the second power class. In other words, the power amplifier 11D can amplify the high frequency signal to the power that satisfies the maximum output power of the second power class.
  • the power amplifier 12D is an example of a second power amplifier, connected between the input terminal 101b and the combiner 14, and connected to the power supply voltage terminal 102b. Specifically, the input terminal of the power amplifier 12D is connected to the input terminal 101b, and the output terminal of the power amplifier 12D is connected to the combiner 14 and the power supply voltage terminal 102b.
  • the power amplifier 12D corresponds to the second power class. In other words, the power amplifier 12D can amplify the high frequency signal to the power that satisfies the maximum output power of the second power class.
  • the combiner 14 is connected between the power amplifiers 11D and 12D and the filter 21. Specifically, the combiner 14 has an input terminal 141 connected to the output terminal of the power amplifier 11D, an input terminal 142 connected to the output terminal of the power amplifier 12D, and an output terminal 143 connected to the filter 21. , provided. Note that the synthesizer 14 is configured by, for example, a transformer, but is not limited to this.
  • the synthesizer 14 can synthesize two high frequency signals input via the input terminals 141 and 142 into one high frequency signal and output it via the output terminal 143 .
  • the filter 21 is connected between the synthesizer 14 and the output terminal 103 . Specifically, one end of the filter 21 is connected to the output terminal 143 of the combiner 14 and the other end of the filter 21 is connected to the output terminal 103 .
  • the filter 21 has a passband including band A and has a power handling capability corresponding to the first power class.
  • the filter 21 may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
  • the power amplifier circuit 10D can output a high-frequency signal of the first power class using the two power amplifiers 11D and 12D corresponding to the second power class. Also, in the power amplifier circuit 10D, only one of the two power amplifiers 11D and 12D corresponding to the second power class can be used to output a high frequency signal of the second power class.
  • the circuit configuration of the power amplifier circuit 10D shown in FIG. 8 is an example, and is not limited to this.
  • the power amplifier circuit 10D may include two filters corresponding to the second power class instead of the filter 21.
  • one of the two filters should be connected between power amplifier 11D and combiner 14, and the other of the two filters should be connected between power amplifier 12D and combiner .
  • the power amplifier circuit 10D may further include a distributor.
  • the distributor may be connected between one of the input terminals 101a and 101b and the power amplifiers 11D and 12D.
  • the power amplifier circuit 10D may include an impedance matching circuit connected between any two circuit elements (for example, the combiner 14 and the filter 21, etc.). Further, for example, the power amplifier circuit 10D does not have to include the filter 21 .
  • the tracking circuit 50D can supply the power amplifier circuit 10D with the power supply voltage VAPT in the APT mode when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10D can be supplied with the power supply voltage VET in the ET mode.
  • the circuit configuration of the tracking circuit 50D will be described with reference to FIG.
  • the tracking circuit 50D includes APTs 51 and 56, an ET 52, a switch 53, a control terminal 501, and output terminals 502a and 502b.
  • the output terminal 502a is a terminal for supplying the power supply voltage V APT /V ET to the power amplifier 11D of the power amplifier circuit 10D.
  • the output terminal 502a is connected to the power supply voltage terminal 102a of the power amplifier circuit 10D outside the tracking circuit 50D.
  • the output terminal 502b is a terminal for supplying the power supply voltage VAPT in the APT mode to the power amplifier 12D of the power amplifier circuit 10D.
  • the output terminal 502b is connected to the power supply voltage terminal 102b of the power amplifier circuit 10D outside the tracking circuit 50D.
  • APT 51, ET 52 and switch 53 are the same as those in the first embodiment, so their description is omitted.
  • APT 56 is connected to output terminal 502b.
  • APT 56 can supply power supply voltage VAPT in APT mode to power amplifier 12D via output terminal 502b and power supply voltage terminal 102b when control signal CTL1 is received.
  • the tracking circuit 50D can supply the power supply voltage VAPT in the APT mode from both the output terminals 502a and 502b when the control signal CTL1 is received, and when the control signal CTL2 is received.
  • the power supply voltage V ET can be supplied from the output terminal 502a in the ET mode.
  • the circuit configuration of the tracking circuit 50D shown in FIG. 8 is an example, and is not limited to this.
  • APT51, ET52 and switch 53 may be replaced with MT54.
  • the switch 53 may not be included in the tracking circuit 50D, and may be included in the power amplifier circuit 10D.
  • FIG. 9 is a diagram showing a transmission state of a high-frequency signal of the first power class in communication device 5D according to the present embodiment.
  • FIG. 10 is a diagram showing a transmission state of a high-frequency signal of the second power class in communication device 5D according to the present embodiment.
  • the control signal CTL1 is transmitted from the RFIC 3 to the tracking circuit 50D.
  • the switch 53 of the tracking circuit 50D connects the APT 51 to the output terminal 502a.
  • the power supply voltage VAPT is supplied from the APT 51 to the power amplifier 11D in the APT mode.
  • the power supply voltage VAPT is supplied from the APT 56 to the power amplifier 12D in the APT mode.
  • the power amplifier circuit 10D receives two band A high frequency signals from the RFIC 3 via the input terminals 101a and 101b.
  • the two received high-frequency signals are amplified by power amplifiers 11D and 12D using power supply voltage VAPT , and combined by combiner .
  • the synthesized high frequency signal is transmitted to the antenna 2 via the filter 21 and the output terminal 103 .
  • the radio frequency signal RF AH of the first power class is transmitted from the communication device 5D.
  • the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50D.
  • switch 53 of tracking circuit 50D connects ET 52 to output terminal 502a.
  • the power supply voltage V ET is supplied from the tracking circuit 50D to the power amplifier 11D in the ET mode.
  • the power amplifier circuit 10D receives the high frequency signal of band A from the RFIC 3 via the input terminal 101a.
  • the received high-frequency signal is amplified by the power amplifier 11D using the power supply voltage VET and transmitted to the antenna 2 via the synthesizer 14, the filter 21 and the output terminal 103.
  • the radio frequency signal RF AL of the second power class is transmitted from the communication device 5D.
  • the high-frequency circuit 1D includes the power amplifier circuit 10D and the tracking circuit 50D connected to the power amplifier circuit 10D.
  • the control signal CTL1 indicating the first power class defined by is received
  • the power amplifier circuit 10D is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown is received, the power amplifier circuit 10D is supplied with the power supply voltage VET in the ET mode.
  • the power amplifier circuit 10D includes a power amplifier 11D corresponding to the second power class, a power amplifier 12D corresponding to the second power class, and a combiner connected to the output terminal of the power amplifier 11D and the output terminal of the power amplifier 12D.
  • the tracking circuit 50D supplies the power supply voltage VAPT in the APT mode to each of the power amplifiers 11D and 12D when the control signal CTL1 is received, and when the control signal CTL2 is received. In the ET mode, only one of the power amplifiers 11D and 12D is supplied with the supply voltage V ET .
  • the power amplifier circuit 10D in the first power class defined with a higher maximum output power, the power amplifier circuit 10D is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Further, high-frequency signals of the first power class are transmitted using two power amplifiers 11D and 12D corresponding to the second power class. Therefore, a power amplifier corresponding to the first power class becomes unnecessary, and the mounting cost of the high frequency circuit 1D can be reduced.
  • the tracking circuit 50D supplies the power amplifier circuit 10D with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10D in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10D includes a power amplifier 11D corresponding to the second power class, a power amplifier 12D corresponding to the second power class, and a combiner connected to the output terminal of the power amplifier 11D and the output terminal of the power amplifier 12D.
  • the tracking circuit 50D supplies the power supply voltage VAPT in the APT mode to each of the power amplifiers 11D and 12D when the control signal CTL1 is received, and when the control signal CTL2 is received.
  • the ET mode only one of the power amplifiers 11D and 12D is supplied with the supply voltage V ET .
  • the tracking circuit 50D can achieve the same effects as the high-frequency circuit 1D.
  • Embodiment 6 Next, Embodiment 6 will be described.
  • the present embodiment is different from the first embodiment mainly in that the high-frequency circuit supports two bands capable of simultaneous transmission.
  • the present embodiment will be described below with reference to FIGS. 11 to 14, focusing on the differences from the first embodiment.
  • a communication device 5E according to the present embodiment is the same as the communication device 5 according to the first embodiment, except that a high frequency circuit 1E is provided instead of the high frequency circuit 1. Further, the high-frequency circuit 1E according to the present embodiment is similar to the high-frequency circuit 1 according to the first embodiment except that a power amplifier circuit 10E and a tracking circuit 50E are provided instead of the power amplifier circuit 10 and the tracking circuit 50. It is the same. Therefore, the power amplifier circuit 10E and the tracking circuit 50E will be described below, and descriptions of other circuits and the like will be omitted.
  • the power amplifier circuit 10E is connected to the tracking circuit 50E and can receive power supply voltage from the tracking circuit 50E. A circuit configuration of the power amplifier circuit 10E will be described with reference to FIG.
  • FIG. 6 is a circuit configuration diagram of communication device 5E according to the present embodiment.
  • a power amplifier circuit 10E included in the communication device 5E includes power amplifiers 11 and 13, filters 21 and 23, input terminals 101a and 101b, a power supply voltage terminal 102, and output terminals 103a and 103b.
  • the input terminal 101a is a terminal for receiving a high frequency transmission signal of band A from the outside of the high frequency circuit 1E.
  • the input terminal 101b is a terminal for receiving a high frequency transmission signal of band B from the outside of the high frequency circuit 1E.
  • Each of the input terminals 101a and 101b is connected to the RFIC 3 outside the high frequency circuit 1E.
  • the power supply voltage terminal 102 is a terminal for receiving the power supply voltage from the tracking circuit 50E.
  • the power supply voltage terminal 102 is connected to the output terminal 502 of the tracking circuit 50E outside the power amplifier circuit 10E.
  • the output terminal 103a is a terminal for supplying a high-frequency transmission signal of band A to the outside of the high-frequency circuit 1E.
  • the output terminal 103b is a terminal for supplying a high frequency transmission signal of band B to the outside of the high frequency circuit 1E.
  • Output terminals 103a and 103b are connected to antennas 2a and 2b, respectively, outside the high-frequency circuit 1E.
  • the power amplifier 11 is an example of a first power amplifier, is connected between the input terminal 101a and the filter 21, and is connected to the power supply voltage terminal 102. Specifically, the input terminal of the power amplifier 11 is connected to the input terminal 101 a , and the output terminal of the power amplifier 11 is connected to the filter 21 and the power supply voltage terminal 102 .
  • the power amplifier 11 supports the first power class and the second power class, and can amplify the transmission signal of band A.
  • the power amplifier 13 is an example of a second power amplifier and is connected between the input terminal 101b and the filter 23. Specifically, the input terminal of the power amplifier 13 is connected to the input terminal 101 b and the output terminal of the power amplifier 13 is connected to the filter 23 .
  • the power amplifier 13 can amplify the band B transmission signal.
  • the power supply voltage supplied to the power amplifier 13 is not particularly limited, and may be, for example, the power supply voltage based on the ET mode or any power supply voltage. Therefore, in FIG. 11, the illustration of the supply path of the power supply voltage to the power amplifier 13 is omitted.
  • Band B is a frequency band for communication systems built using RAT.
  • Bands A and B are a combination of bands that can be transmitted simultaneously.
  • bands A and B are a combination of bands for CA (Carrier Aggregation).
  • bands A and B may be a combination of bands for EN-DC (E-UTRAN New Radio-Dual Connectivity) or NR-DC (New Radio-New Radio Dual Connectivity).
  • band B a conventional band corresponding only to the second power class can be used, for example, Band 1, Band 2, Band 3, Band 4, Band 13, Band 20, Band 26, Band 28, Band 66 or Band 71 for LTE can be used.
  • Band B is not limited to this, and various bands defined by 3GPP or the like can be used.
  • the filter 21 is an example of a first filter and is connected between the power amplifier 11 and the output terminal 103a. Specifically, one end of the filter 21 is connected to the output end of the power amplifier 11, and the other end of the filter 21 is connected to the output terminal 103a.
  • the filter 21 has a passband including band A and has a power handling capability corresponding to the first power class.
  • the filter 21 may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
  • the filter 23 is an example of a second filter and is connected between the power amplifier 13 and the output terminal 103b. Specifically, one end of the filter 23 is connected to the output end of the power amplifier 13, and the other end of the filter 23 is connected to the output terminal 103b.
  • Filter 23 has a passband that includes band B.
  • FIG. The filter 23 may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
  • the circuit configuration of the power amplifier circuit 10E shown in FIG. 11 is an example, and is not limited to this.
  • the power amplifier circuit 10E may have only one of the output terminals 103a and 103b. That is, the communication device 5E may have only one of the antennas 2a and 2b.
  • the power amplifier circuit 10E may comprise a switch connected between the filters 21 and 23 and one of the output terminals 103a and 103b.
  • the power amplifier circuit 10E may include an impedance matching circuit connected between any two circuit elements (for example, the power amplifier 11 and the filter 21, etc.).
  • the tracking circuit 50E includes an APT 51, an ET 57, a switch 53, a control terminal 501, and an output terminal 502.
  • the control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high frequency circuit 1E.
  • the control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1E.
  • the output terminal 502 is a terminal for supplying power supply voltage to the power amplifier circuit 10E.
  • the output terminal 502 is connected to the power supply voltage terminal 102 of the power amplifier circuit 10E outside the tracking circuit 50E.
  • the ET 57 can supply the power supply voltage V ET1 in the first ET mode, and can also supply the power supply voltage V ET2 in the second ET mode. Specifically, when the control signal CTL2 is received, the band A signal is transmitted, and the band B signal is not transmitted, the ET 57 supplies the power amplifier 11 with the power supply voltage V ET1 in the first ET mode. can supply. The ET 57 can also supply the power amplifier 11 with the supply voltage V ET2 in the second ET mode when the control signal CTL2 is received and the band A signal and the band B signal are simultaneously transmitted.
  • the power supply voltage V ET2 supplied in the second ET mode is higher than the power supply voltage V ET1 supplied in the first ET mode. That is, the power supply voltage V ET2 is higher than the power supply voltage V ET1 for the envelope signals showing the same value. In other words, in the second ET mode, a higher power supply voltage is supplied so that gain compression is smaller than in the first ET mode.
  • the power supply voltage V ET1 is supplied so as to obtain, for example, 2 dB compressed output power with respect to the input power corresponding to the envelope signal.
  • a power supply voltage V ET2 is supplied so as to obtain an output power compressed by, for example, 0.5 to 1 dB with respect to the input power.
  • a switch 53 is connected between the APT 51 and ET 57 and the power amplifier 11 .
  • the switch 53 has a terminal 531 connected to the APT 51 , a terminal 532 connected to the ET 57 , and a terminal 533 connected to the output terminal 502 .
  • the switch 53 is composed of, for example, an SPDT type switch circuit.
  • the switch 53 can connect the terminals 531 and 532 to the terminal 533 based on the control signal from the RFIC3. Specifically, switch 53 can connect APT 51 to output terminal 502 without connecting ET 57 to output terminal 502 when control signal CTL 1 is received. On the other hand, switch 53 can connect ET 57 to output terminal 502 without connecting APT 51 to output terminal 502 when control signal CTL 2 is received.
  • the circuit configuration of the tracking circuit 50E shown in FIG. 11 is an example, and is not limited to this.
  • the switch 53 may not be included in the tracking circuit 50E and may be included in the power amplifier circuit 10E.
  • FIG. 12 is a diagram showing a transmission state of a first power class high-frequency signal in communication apparatus 5E according to the present embodiment.
  • FIGS. 13 and 14 is a diagram showing the transmission state of the high-frequency signal of the second power class in communication device 5E according to the present embodiment.
  • the control signal CTL1 is transmitted from the RFIC 3 to the tracking circuit 50E.
  • switch 53 of tracking circuit 50 E connects APT 51 to output terminal 502 .
  • the power supply voltage VAPT is supplied from the tracking circuit 50E to the power amplifier circuit 10E in the APT mode.
  • the power amplifier circuit 10E receives the high frequency signal of band A from the RFIC 3 via the input terminal 101a.
  • the received high-frequency signal is amplified by the power amplifier 11 using the power supply voltage VAPT , and transmitted to the antenna 2a via the filter 21 and the output terminal 103a.
  • the radio frequency signal RF AH of band A of the first power class is transmitted from the communication device 5E.
  • the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50E.
  • switch 53 of tracking circuit 50 E connects ET 57 to output terminal 502 .
  • the ET57 generates the first ET mode power supply voltage VET1 .
  • the power supply voltage V ET1 is supplied from the tracking circuit 50E to the power amplifier circuit 10E in the first ET mode.
  • the power amplifier circuit 10E receives the high frequency signal of band A from the RFIC 3 via the input terminal 101a.
  • the received high-frequency signal is amplified by the power amplifier 11 using the power supply voltage VET1 , and transmitted to the antenna 2a via the filter 21 and the output terminal 103a.
  • the radio frequency signal RF AL of band A of the second power class is transmitted from the communication device 5E.
  • the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50E.
  • switch 53 of tracking circuit 50 E connects ET 57 to output terminal 502 .
  • ET57 generates the power supply voltage V ET2 for the second ET mode.
  • the power supply voltage V ET2 is supplied from the tracking circuit 50E to the power amplifier circuit 10E in the second ET mode.
  • the power amplifier circuit 10E receives a high frequency signal of band A from RFIC 3 via input terminal 101a, and receives a high frequency signal of band B from RFIC 3 via input terminal 101b.
  • the received high-frequency signal of band A is amplified by the power amplifier 11 using the power supply voltage VET2 , and transmitted to the antenna 2a via the filter 21 and the output terminal 103a.
  • the received high-frequency signal of band B is amplified by the power amplifier 13 and transmitted to the antenna 2b via the filter 23 and the output terminal 103b.
  • the radio frequency signal RF AL of band A of the second power class and the radio frequency signal RF B of band B of the second power class are simultaneously transmitted from the communication device 5E.
  • the high-frequency circuit 1E includes the power amplifier circuit 10E and the tracking circuit 50E connected to the power amplifier circuit 10E.
  • the control signal CTL1 indicating the first power class defined by is received
  • the power amplifier circuit 10E is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected.
  • the control signal CTL2 shown is received, the power supply voltage is supplied to the power amplifier circuit 10E in the ET mode.
  • the power amplifier circuit 10E includes a power amplifier 11 corresponding to the second power class, a filter 21 connected to the power amplifier 11 and having a passband including band A, a power amplifier 13 corresponding to the second power class, a filter 23 connected to the power amplifier 13 and having a passband including band B, wherein bands A and B are a combination of bands that can be transmitted simultaneously, the tracking circuit 50E receiving the control signal CTL2, When the signal of band A is transmitted and the signal of band B is not transmitted, the power amplifier 11 is supplied with the power supply voltage V ET1 in the first ET mode, the control signal CTL2 is received, and the signal of band A is not transmitted.
  • the power amplifier 11 When the signal and the signal of band B are simultaneously transmitted, the power amplifier 11 is supplied with the power supply voltage V ET2 in the second ET mode, and the power supply voltage V ET2 supplied in the second ET mode is supplied in the first ET mode. higher than the power supply voltage VET1 .
  • the power amplifier circuit 10E is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the A power supply voltage is supplied in the 1ET mode or the 2nd ET mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Furthermore, since the power supply voltage V ET2 is higher than the power supply voltage V ET1 , it is possible to improve the linearity of the power amplifier 11 against interference (wraparound) by the signal of the band B when simultaneously transmitting the signals of the bands A and B. .
  • tracking circuit 50E supplies power amplifier circuit 10E with power supply voltage V in the APT mode when control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received.
  • APT is supplied, and the power supply voltage is supplied to the power amplifier circuit 10E in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received.
  • the power amplifier circuit 10E includes a power amplifier 11 corresponding to the second power class, a filter 21 connected to the power amplifier 11 and having a passband including band A, a power amplifier 13 corresponding to the second power class, a filter 23 connected to the power amplifier 13 and having a passband including band B, wherein bands A and B are a combination of bands that can be transmitted simultaneously, the tracking circuit 50E receiving the control signal CTL2, When the signal of band A is transmitted and the signal of band B is not transmitted, the power amplifier 11 is supplied with the power supply voltage V ET1 in the first ET mode, the control signal CTL2 is received, and the signal of band A is not transmitted.
  • the power amplifier 11 When the signal and the signal of band B are simultaneously transmitted, the power amplifier 11 is supplied with the power supply voltage V ET2 in the second ET mode, and the power supply voltage V ET2 supplied in the second ET mode is supplied in the first ET mode. higher than the power supply voltage VET1 .
  • the tracking circuit 50E can achieve the same effects as the high-frequency circuit 1E.
  • Embodiment 7 will be described.
  • This embodiment differs from the above embodiments mainly in that the tracking mode is switched according to the output power instead of the power class.
  • the present embodiment will be described, focusing on the differences from the first embodiment.
  • the communication device according to the present embodiment is the same as the communication device according to each of the above-described embodiments, so illustration and description are omitted.
  • the tracking mode is switched according to the output power by using control signals CTL1 and CTL2 having contents different from those in the above embodiments.
  • the control signal CTL1 according to the present embodiment indicates that the output power exceeds the threshold power in a predetermined period.
  • the control signal CTL2 according to the present embodiment indicates that the output power does not exceed the threshold power in a predetermined period.
  • the length of the predetermined period the length of the period suitable for switching the tracking mode is used.
  • a unit for changing the power supply voltage in the APT mode for example, one frame unit
  • An output power suitable for switching the tracking mode is used as the threshold power.
  • 29 dBm can be used as the threshold power, but it is not limited to this.
  • the high-frequency circuit 1 is connected to the power amplifier circuit 10 and the power amplifier circuit 10.
  • a tracking circuit 50 wherein the tracking circuit 50 supplies the power supply voltage VAPT in the APT mode to the power amplifier circuit 10 when the control signal CTL1 indicating that the output power exceeds the threshold power for a predetermined period of time is received. Then, when the control signal CTL2 indicating that the output power does not exceed the threshold power for a predetermined period is received, the power amplifier circuit 10 is supplied with the power supply voltage V ET in the ET mode.
  • the power amplifier circuit 10 when the output power exceeds the threshold power for a predetermined period, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode. Therefore, in the period when higher output power is required, the use of the ET mode, in which it is difficult to supply a higher power supply voltage, can be avoided, and the PAE can be improved in the APT mode.
  • the power supply voltage V ET is supplied in the ET mode. Therefore, PAE can be improved more than when the power supply voltage V APT is supplied in the APT mode. Even if a first power class defined with a higher maximum output power is used, that maximum output power is not necessarily required for a predetermined period of time. Therefore, by switching between the APT mode and the ET mode according to the output power, it is possible to increase the use of the ET mode and further improve the PAE.
  • control signals CTL1 and CTL2 according to the present embodiment can be applied to any of the second to sixth embodiments.
  • the high-frequency circuit and communication device according to the present invention have been described above based on the embodiments, the high-frequency circuit and communication device according to the present invention are not limited to the above-described embodiments. Another embodiment realized by combining arbitrary constituent elements in the above embodiment, and a modification obtained by applying various modifications that a person skilled in the art can think of without departing from the scope of the present invention to the above embodiment, the present invention also includes various devices incorporating the above-described high-frequency circuit.
  • a coupler may be inserted between the filter and the output terminal.
  • the high-frequency circuit 1E may further include a switch 30 connected between the antennas 2a and 2b and the filters 21 and 23.
  • the switch 30 has a terminal 301 connected to the antenna 2a, a terminal 302 connected to the antenna 2b, a terminal 303 connected to the output terminal 103a of the power amplifier circuit 10E, and a power and a terminal 304 connected to the output terminal 103b of the amplifier circuit 10E.
  • switch 30 can exclusively connect terminal 301 to terminals 303 and 304 and exclusively connect terminal 302 to terminals 303 and 304 based on a control signal from RFIC 3, for example. can do. That is, switch 30 can connect terminal 301 to one of terminals 303 and 304 and connect terminal 302 to the other of terminals 303 and 304 .
  • the communication device was a transmission device, but may be a transmission/reception device.
  • the high frequency circuit may comprise a low noise amplifier circuit.
  • the present invention can be widely used in communication equipment such as mobile phones as a high-frequency circuit arranged in the front end section.

Abstract

This high-frequency circuit (1) comprises an electric power amplification circuit (10), and a tracking circuit (50) connected to the electric power amplification circuit (10). Upon receipt of a control signal (CTL1) indicating a first power class defined using a highest electric power equal to or greater than a prescribed highest electric power, the tracking circuit (50) supplies a power supply voltage (VAPT) in an APT mode to the electric power amplification circuit (10). Upon receipt of a control signal (CTL2) indicating a second power class defined using a highest electric power less than the prescribed highest electric power, the tracking circuit (50) supplies a power supply voltage (VET) in an ET mode to the electric power amplification circuit (10).

Description

高周波回路、トラッキング回路及び電力増幅回路High frequency circuit, tracking circuit and power amplifier circuit
　本発明は、高周波回路、トラッキング回路及び電力増幅回路に関する。 The present invention relates to high frequency circuits, tracking circuits and power amplifier circuits.
　３ＧＰＰ（登録商標）（3rd Generation Partnership Project）では、移動通信システムにおいて、従来よりも高い最大出力電力を許容するパワークラス（例えば、パワークラス１、１．５等）に関する議論が行われている。このようなパワークラスでは、消費電力が増加するため、電力増幅において効率の向上が望まれる。 　3GPP (registered trademark) (3rd Generation Partnership Project) is discussing power classes that allow higher maximum output power (for example, power class 1, 1.5, etc.) in mobile communication systems. In such a power class, the power consumption increases, so it is desired to improve efficiency in power amplification.
　特許文献１では、電力増幅回路にエンベロープトラッキングモードを適用することで、電力付加効率（ＰＡＥ：Power-Added Efficiency）の改善が図られている。 In Patent Document 1, the power-added efficiency (PAE) is improved by applying the envelope tracking mode to the power amplifier circuit.
米国特許出願公開第２０２０／００７６３７５号明細書U.S. Patent Application Publication No. 2020/0076375
　しかしながら、従来よりも高い最大出力電力を許容するパワークラスでは、従来よりも高い最大出力電力に対応するためにより高い電源電圧が要求される。特許文献１に開示されたトラッキング回路では、そのような高い電源電圧を供給することが難しい。そのため、従来よりも高い最大出力電力を許容するパワークラスに対応する電力増幅回路においてＰＡＥを改善することが難しい。 However, in the power class that allows higher maximum output power than before, a higher power supply voltage is required to support the higher maximum output power than before. It is difficult for the tracking circuit disclosed in Patent Document 1 to supply such a high power supply voltage. Therefore, it is difficult to improve the PAE in a power amplifier circuit corresponding to a power class that allows a higher maximum output power than before.
　そこで、本発明は、従来よりも高い最大出力電力を許容するパワークラスに対応する電力増幅回路においてＰＡＥを改善することができる高周波回路、トラッキング回路及び電力増幅回路を提供する。 Therefore, the present invention provides a high-frequency circuit, a tracking circuit, and a power amplifier circuit capable of improving PAE in a power amplifier circuit corresponding to a power class that allows a higher maximum output power than before.
　本発明の一態様に係る高周波回路は、電力増幅回路と、電力増幅回路に接続されたトラッキング回路と、を備え、トラッキング回路は、所定最大電力以上の最大電力で規定される第１パワークラスを示す第１制御信号が受信された場合に、電力増幅回路に平均電力トラッキングモードで電源電圧を供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す第２制御信号が受信された場合に、電力増幅回路にエンベロープトラッキングモードで電源電圧を供給する。 A high-frequency circuit according to an aspect of the present invention includes a power amplifier circuit and a tracking circuit connected to the power amplifier circuit, the tracking circuit indicating a first power class defined by a maximum power equal to or higher than a predetermined maximum power. A power amplifier circuit is supplied with a power supply voltage in an average power tracking mode when a first control signal is received, and a second control signal is received indicating a second power class defined by a maximum power less than a predetermined maximum power. supply voltage to the power amplifier circuit in envelope tracking mode.
　本発明の一態様に係るトラッキング回路は、所定最大電力以上の最大電力で規定される第１パワークラスを示す第１制御信号が受信された場合に、電力増幅回路に平均電力トラッキングモードで電源電圧を供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す第２制御信号が受信された場合に、電力増幅回路にエンベロープトラッキングモードで電源電圧を供給する。 A tracking circuit according to an aspect of the present invention supplies a power supply voltage to a power amplifier circuit in an average power tracking mode when a first control signal indicating a first power class defined by a maximum power equal to or higher than a predetermined maximum power is received. and supplying the power supply voltage in envelope tracking mode to the power amplifier circuit when a second control signal is received indicating a second power class defined by a maximum power less than the predetermined maximum power.
　本発明の一態様に係る電力増幅回路は、所定最大電力以上の最大電力で規定される第１パワークラスに対応し、平均電力トラッキングモードが適用され、エンベロープトラッキングモードが適用されない第１電力増幅器と、所定最大電力未満の最大電力で規定される第２パワークラスに対応し、エンベロープトラッキングモードが適用され、平均電力トラッキングモードが適用されない第２電力増幅器と、を備える。 A power amplifier circuit according to an aspect of the present invention corresponds to a first power class defined by a maximum power equal to or higher than a predetermined maximum power, and to which an average power tracking mode is applied and an envelope tracking mode is not applied; a second power amplifier that corresponds to a second power class defined by a maximum power that is less than a predetermined maximum power, to which an envelope tracking mode is applied and to which an average power tracking mode is not applied.
　本発明の一態様に係る高周波回路は、電力増幅回路と、電力増幅回路に接続されたトラッキング回路と、を備え、トラッキング回路は、所定期間において出力電力が閾値電力を超えることを示す第１制御信号が受信された場合に、電力増幅回路に平均電力トラッキングモードで電源電圧を供給し、所定期間において出力電力が閾値電力を超えないことを示す第２制御信号が受信された場合に、電力増幅回路にエンベロープトラッキングモードで電源電圧を供給する。 A high-frequency circuit according to an aspect of the present invention includes a power amplifier circuit and a tracking circuit connected to the power amplifier circuit, wherein the tracking circuit performs first control indicating that output power exceeds threshold power for a predetermined period of time. supplying a power supply voltage in an average power tracking mode to a power amplifier circuit when a signal is received, and power amplifying when a second control signal is received indicating that the output power does not exceed the threshold power for a predetermined period of time; Supply the supply voltage to the circuit in envelope tracking mode.
　本発明によれば、従来よりも高い最大出力電力を許容するパワークラスに対応する電力増幅回路においてＰＡＥを改善することができる。 According to the present invention, PAE can be improved in a power amplifier circuit corresponding to a power class that allows a higher maximum output power than before.
図１Ａは、平均電力トラッキングモードにおける電源電圧の推移の一例を示すグラフである。FIG. 1A is a graph showing an example of transition of power supply voltage in average power tracking mode. 図１Ｂは、アナログエンベロープトラッキングモードにおける電源電圧の推移の一例を示すグラフである。FIG. 1B is a graph showing an example of transition of power supply voltage in analog envelope tracking mode. 図１Ｃは、デジタルエンベロープトラッキングモードにおける電源電圧の推移の一例を示すグラフである。FIG. 1C is a graph showing an example of transition of power supply voltage in digital envelope tracking mode. 図２は、実施の形態１に係る通信装置の回路構成図である。FIG. 2 is a circuit configuration diagram of the communication device according to the first embodiment. 図３は、実施の形態１に係る通信装置において第１パワークラスの高周波信号の伝送状態を示す図である。FIG. 3 is a diagram showing a transmission state of high-frequency signals of the first power class in the communication device according to the first embodiment. 図４は、実施の形態１に係る通信装置において第２パワークラスの高周波信号の伝送状態を示す図である。FIG. 4 is a diagram showing a transmission state of high-frequency signals of the second power class in the communication device according to the first embodiment. 図５は、実施の形態２に係る通信装置の回路構成図である。FIG. 5 is a circuit configuration diagram of a communication device according to the second embodiment. 図６は、実施の形態３に係る通信装置の回路構成図である。FIG. 6 is a circuit configuration diagram of a communication device according to the third embodiment. 図７は、実施の形態４に係る通信装置の回路構成図である。FIG. 7 is a circuit configuration diagram of a communication device according to a fourth embodiment. 図８は、実施の形態５に係る通信装置の回路構成図である。FIG. 8 is a circuit configuration diagram of a communication device according to a fifth embodiment. 図９は、実施の形態５に係る通信装置において第１パワークラスの高周波信号の伝送状態を示す図である。FIG. 9 is a diagram showing a transmission state of high-frequency signals of the first power class in the communication device according to the fifth embodiment. 図１０は、実施の形態５に係る通信装置において第２パワークラスの高周波信号の伝送状態を示す図である。FIG. 10 is a diagram showing a transmission state of high-frequency signals of the second power class in the communication device according to the fifth embodiment. 図１１は、実施の形態６に係る通信装置の回路構成図である。FIG. 11 is a circuit configuration diagram of a communication device according to a sixth embodiment. 図１２は、実施の形態６に係る通信装置において第１パワークラスの高周波信号の伝送状態を示す図である。FIG. 12 is a diagram showing a transmission state of high-frequency signals of the first power class in the communication device according to the sixth embodiment. 図１３は、実施の形態６に係る通信装置において第２パワークラスの高周波信号の伝送状態を示す図である。FIG. 13 is a diagram showing a transmission state of high frequency signals of the second power class in the communication device according to the sixth embodiment. 図１４は、実施の形態６に係る通信装置においてバンドＡの第２パワークラスの送信信号とバンドＢの送信信号との同時伝送状態を示す図である。FIG. 14 is a diagram showing a state of simultaneous transmission of a transmission signal of the second power class of band A and a transmission signal of band B in the communication apparatus according to the sixth embodiment. 図１５は、他の実施の形態に係る通信装置の回路構成図である。FIG. 15 is a circuit configuration diagram of a communication device according to another embodiment.
　以下、本発明の実施の形態について、図面を用いて詳細に説明する。なお、以下で説明する実施の形態は、いずれも包括的又は具体的な例を示すものである。以下の実施の形態で示される数値、形状、材料、構成要素、構成要素の配置及び接続形態などは、一例であり、本発明を限定する主旨ではない。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. It should be noted that the embodiments described below are all comprehensive or specific examples. Numerical values, shapes, materials, components, arrangement of components, connection forms, and the like shown in the following embodiments are examples, and are not intended to limit the present invention.
　なお、各図は、本発明を示すために適宜強調、省略、又は比率の調整を行った模式図であり、必ずしも厳密に図示されたものではなく、実際の形状、位置関係、及び比率とは異なる場合がある。各図において、実質的に同一の構成に対しては同一の符号を付しており、重複する説明は省略又は簡素化される場合がある。 In addition, each drawing is a schematic diagram that has been appropriately emphasized, omitted, or adjusted in proportion to show the present invention, and is not necessarily strictly illustrated, and the actual shape, positional relationship, and ratio may differ. In each figure, substantially the same configurations are denoted by the same reference numerals, and redundant description may be omitted or simplified.
　本発明の回路構成において、「接続される」とは、接続端子及び／又は配線導体で直接接続される場合だけでなく、他の回路素子を介して電気的に接続される場合も含む。「Ａ及びＢの間に接続される」とは、Ａ及びＢの間でＡ及びＢの両方に接続されることを意味し、Ａ及びＢを結ぶ経路に直列接続されることを意味する。 In the circuit configuration of the present invention, "connected" includes not only direct connection with connection terminals and/or wiring conductors, but also electrical connection via other circuit elements. "Connected between A and B" means connected to both A and B between A and B, and means connected in series to a path connecting A and B.
　まず、以下で説明する実施の形態において電力増幅回路に適用されるトラッキングモードについて説明する。トラッキングモードとは、電力増幅回路に印加される電源電圧を動的に調整するモードである。トラッキングモードにはいくつかの種類があるが、以下の実施の形態では、平均電力トラッキング（ＡＰＴ：Average Power Tracking）モード及びエンベロープトラッキング（ＥＴ：Envelope Tracking）モード（アナログＥＴモード及びデジタルＥＴモードを含む）が用いられる。なお、トラッキングモードは、これらに限定されない。 First, the tracking mode applied to the power amplifier circuit in the embodiments described below will be described. The tracking mode is a mode for dynamically adjusting the power supply voltage applied to the power amplifier circuit. There are several types of tracking modes, but in the following embodiments, average power tracking (APT) mode and envelope tracking (ET) mode (including analog ET mode and digital ET mode) are used. ) is used. Note that the tracking mode is not limited to these.
　ＡＰＴモード、アナログＥＴモード及びデジタルＥＴモードについて、図１Ａ～図１Ｃを参照しながら説明する。図１Ａ～図１Ｃにおいて、横軸は時間を表し、縦軸は電圧を表す。また、太い実線は、電源電圧を表し、細い実線（波形）は、変調波を表す。 The APT mode, analog ET mode and digital ET mode will be explained with reference to FIGS. 1A to 1C. 1A to 1C, the horizontal axis represents time and the vertical axis represents voltage. A thick solid line represents the power supply voltage, and a thin solid line (waveform) represents the modulated wave.
　図１Ａは、ＡＰＴモードにおける電源電圧の推移の一例を示すグラフである。ＡＰＴモードでは、１フレーム単位で複数の離散的な電圧レベルに電源電圧を変動させる。その結果、電源電圧信号は矩形波を形成する。ＡＰＴモードでは、平均出力電力に基づいて、電源電圧の電圧レベルが決定される。なお、ＡＰＴモードでは、１フレームよりも小さな単位（例えばサブフレーム）で電圧レベルが変化してもよい。 FIG. 1A is a graph showing an example of transition of power supply voltage in APT mode. In APT mode, the power supply voltage is varied to a plurality of discrete voltage levels on a frame-by-frame basis. As a result, the power supply voltage signal forms a square wave. In APT mode, the voltage level of the power supply voltage is determined based on the average output power. Note that in the APT mode, the voltage level may change in units smaller than one frame (for example, subframes).
　フレームとは、高周波信号（変調波）を構成する単位を意味する。例えば５ＧＮＲ（5th Generation New Radio）及びＬＴＥ（Long Term Evolution）では、フレームは、１０個のサブフレームを含み、各サブフレームは、複数のスロットを含み、各スロットは、複数のシンボルで構成される。サブフレーム長は１ｍｓであり、フレーム長は１０ｍｓである。 A frame means a unit that constitutes a high-frequency signal (modulated wave). For example, in 5GNR (5th Generation New Radio) and LTE (Long Term Evolution), a frame contains 10 subframes, each subframe contains multiple slots, and each slot consists of multiple symbols. . The subframe length is 1 ms and the frame length is 10 ms.
　図１Ｂは、アナログＥＴモードにおける電源電圧の推移の一例を示すグラフである。アナログＥＴモードは、ＥＴモードの一例である。図１Ｂに示すように、アナログＥＴモードでは、電源電圧を連続的に変動させることで変調波の包絡線を追跡する。アナログＥＴモードでは、エンベロープ信号に基づいて、電源電圧が決定される。 FIG. 1B is a graph showing an example of changes in power supply voltage in the analog ET mode. Analog ET mode is an example of ET mode. As shown in FIG. 1B, in analog ET mode, the envelope of the modulated wave is tracked by continuously varying the supply voltage. In analog ET mode, the power supply voltage is determined based on the envelope signal.
　エンベロープ信号とは、変調波の包絡線を示す信号である。エンベロープ値は、例えば（Ｉ２＋Ｑ２）の平方根で表される。ここで、（Ｉ，Ｑ）は、コンスタレーションポイントを表す。コンスタレーションポイントとは、デジタル変調によって変調された信号をコンスタレーションダイヤグラム上で表す点である。（Ｉ，Ｑ）は、例えば送信情報に基づいてＢＢＩＣ４で決定される。 An envelope signal is a signal that indicates the envelope of a modulated wave. The envelope value is represented by the square root of (I2+Q2), for example. where (I, Q) represent constellation points. A constellation point is a point representing a signal modulated by digital modulation on a constellation diagram. (I, Q) is determined by the BBIC 4, for example, based on transmission information.
　図１Ｃは、デジタルＥＴモードにおける電源電圧の推移の一例を示すグラフである。デジタルＥＴモードは、ＥＴモードの一例である。図１Ｃに示すように、デジタルＥＴモードでは、１フレーム内で複数の離散的な電圧レベルに電源電圧を変動させることで変調波の包絡線を追跡する。その結果、電源電圧信号は矩形波を形成する。デジタルＥＴモードでは、エンベロープ信号に基づいて、複数の離散的な電圧レベルの中から電源電圧レベルが選択又は設定される。 FIG. 1C is a graph showing an example of transition of the power supply voltage in the digital ET mode. Digital ET mode is an example of ET mode. As shown in FIG. 1C, in digital ET mode, the envelope of the modulated wave is tracked by varying the power supply voltage to multiple discrete voltage levels within one frame. As a result, the power supply voltage signal forms a square wave. In the digital ET mode, the power supply voltage level is selected or set from a plurality of discrete voltage levels based on the envelope signal.
　（実施の形態１）
　実施の形態１について説明する。 (Embodiment 1)
Embodiment 1 will be described.
　［１．１　回路構成］
　実施の形態１に係る通信装置５、高周波回路１、電力増幅回路１０及びトラッキング回路５０の回路構成について、図２を参照しながら説明する。図２は、本実施の形態に係る通信装置５の回路構成図である。 [1.1 Circuit configuration]
Circuit configurations of the communication device 5, the high frequency circuit 1, the power amplifier circuit 10 and the tracking circuit 50 according to the first embodiment will be described with reference to FIG. FIG. 2 is a circuit configuration diagram of the communication device 5 according to this embodiment.
　［１．１．１　通信装置５の回路構成］
　通信装置５の回路構成について説明する。図２に示すように、本実施の形態に係る通信装置５は、高周波回路１と、アンテナ２と、ＲＦＩＣ（Radio Frequency Integrated Circuit）３と、ＢＢＩＣ（Baseband Integrated Circuit）４と、を備える。 [1.1.1 Circuit Configuration of Communication Device 5]
A circuit configuration of the communication device 5 will be described. As shown in FIG. 2, the communication device 5 according to the present embodiment includes a high frequency circuit 1, an antenna 2, an RFIC (Radio Frequency Integrated Circuit) 3, and a BBIC (Baseband Integrated Circuit) 4.
　高周波回路１は、アンテナ２及びＲＦＩＣ３の間で高周波信号を伝送する。高周波回路１の内部構成については後述する。 The high-frequency circuit 1 transmits high-frequency signals between the antenna 2 and the RFIC 3. The internal configuration of the high frequency circuit 1 will be described later.
　アンテナ２は、高周波回路１に接続されている。アンテナ２は、高周波回路１から高周波信号を受信して外部に出力する。 The antenna 2 is connected to the high frequency circuit 1. The antenna 2 receives a high frequency signal from the high frequency circuit 1 and outputs it to the outside.
　ＲＦＩＣ３は、高周波信号を処理する信号処理回路の一例である。具体的には、ＲＦＩＣ３は、ＢＢＩＣ４から入力された送信信号をアップコンバート等により信号処理し、当該信号処理して生成された高周波送信信号を、高周波回路１の送信経路に出力する。また、ＲＦＩＣ３は、高周波回路１を制御する制御部を有する。なお、ＲＦＩＣ３の制御部としての機能の一部又は全部は、ＲＦＩＣ３の外部に実装されてもよく、例えば、ＢＢＩＣ４又は高周波回路１に実装されてもよい。 The RFIC 3 is an example of a signal processing circuit that processes high frequency signals. Specifically, the RFIC 3 performs signal processing such as up-conversion on the transmission signal input from the BBIC 4 , and outputs the high-frequency transmission signal generated by the signal processing to the transmission path of the high-frequency circuit 1 . The RFIC 3 also has a control section that controls the high frequency circuit 1 . Some or all of the functions of the RFIC 3 as a control unit may be implemented outside the RFIC 3, for example, in the BBIC 4 or the high frequency circuit 1. FIG.
　本実施の形態では、ＲＦＩＣ３の制御部は、少なくとも制御信号ＣＴＬ１又はＣＴＬ２を高周波回路１に送信する。制御信号ＣＴＬ１は、第１制御信号の一例であり、所定最大電力以上の最大電力で規定される第１パワークラスを示す。また、制御信号ＣＴＬ２は、第２制御信号の一例であり、所定最大電力以上の最大電力で規定される第２パワークラスを示す。 In this embodiment, the control unit of RFIC 3 transmits at least control signal CTL1 or CTL2 to high-frequency circuit 1 . The control signal CTL1 is an example of a first control signal and indicates a first power class defined by maximum power equal to or higher than a predetermined maximum power. Also, the control signal CTL2 is an example of a second control signal and indicates a second power class defined by a maximum power equal to or higher than a predetermined maximum power.
　パワークラスとは、最大出力電力などで規定される端末の出力電力の分類であり、パワークラスの値が小さいほど高い出力電力に対応することを示す。例えば、３ＧＰＰでは、パワークラス１の最大出力電力は３１ｄＢｍであり、パワークラス１．５の最大出力電力は２９ｄＢｍであり、パワークラス２の最大出力電力は２６ｄＢｍであり、パワークラス３の最大出力電力は２３ｄＢｍである。 A power class is a classification of terminal output power defined by maximum output power, etc. A smaller power class value indicates a higher output power. For example, in 3GPP, the maximum output power for power class 1 is 31 dBm, the maximum output power for power class 1.5 is 29 dBm, the maximum output power for power class 2 is 26 dBm, and the maximum output power for power class 3 is 23 dBm. .
　端末の最大出力電力は、端末のアンテナ端における出力電力で定義される。端末の最大出力電力の測定は、例えば、３ＧＰＰ等によって定義された方法で行われる。例えば、図２において、アンテナ２における放射電力を測定することで最大出力電力が測定される。なお、放射電力の測定の代わりに、アンテナ２の近傍に端子を設けて、その端子に計測器（例えばスペクトルアナライザなど）を接続することで、アンテナ２の出力電力を測定することもできる。 The terminal's maximum output power is defined as the output power at the terminal's antenna end. Measurement of the maximum output power of the terminal is performed, for example, by a method defined by 3GPP or the like. For example, in FIG. 2 the maximum output power is measured by measuring the radiated power at antenna 2 . Instead of measuring the radiated power, it is also possible to measure the output power of the antenna 2 by providing a terminal near the antenna 2 and connecting a measuring instrument (such as a spectrum analyzer) to the terminal.
　所定最大電力は、通信装置５の要求性能、並びに、電力増幅回路１０及びトラッキング回路５０の性能などに応じて経験的及び／又は実験的に予め定められる。本実施の形態では、所定最大電力として２９ｄＢｍが用いられる。つまり、本実施の形態では、第１パワークラスとして、パワークラス１又は１．５を用いることができ、第２パワークラスとして、パワークラス２又は３を用いることができる。なお、所定最大電力は、２９ｄＢｍに限定されず、２６ｄＢｍ又は３１ｄＢｍであってもよい。 The predetermined maximum power is empirically and/or experimentally predetermined according to the required performance of the communication device 5, the performance of the power amplifier circuit 10 and the tracking circuit 50, and the like. In this embodiment, 29 dBm is used as the predetermined maximum power. That is, in the present embodiment, power class 1 or 1.5 can be used as the first power class, and power class 2 or 3 can be used as the second power class. Note that the predetermined maximum power is not limited to 29 dBm, and may be 26 dBm or 31 dBm.
　なお、制御信号ＣＴＬ１及びＣＴＬ２は、それぞれ、第１パワークラス及び第２パワークラスを直接的に示す制御信号に限定されない。つまり、制御信号ＣＴＬ１及びＣＴＬ２は、それぞれ、第１パワークラス及び第２パワークラスを間接的に示す制御信号であってもよい。例えば、制御信号ＣＴＬ１及びＣＴＬ２は、第１パワークラス及び第２パワークラスにそれぞれ対応する互いに異なるスイッチの制御信号であってもよい。また、制御信号ＣＴＬ１及びＣＴＬ２は、例えば、０又は１を示すフラグ信号であってもよい。この場合、０及び１の一方を示すフラグ信号が制御信号ＣＴＬ１に相当し、０及び１の他方を示すフラグ信号が制御信号ＣＴＬ２に相当する。 Note that the control signals CTL1 and CTL2 are not limited to control signals that directly indicate the first power class and the second power class, respectively. That is, the control signals CTL1 and CTL2 may be control signals that indirectly indicate the first power class and the second power class, respectively. For example, the control signals CTL1 and CTL2 may be control signals for different switches corresponding to the first power class and the second power class, respectively. Also, the control signals CTL1 and CTL2 may be flag signals indicating 0 or 1, for example. In this case, the flag signal indicating one of 0 and 1 corresponds to the control signal CTL1, and the flag signal indicating the other of 0 and 1 corresponds to the control signal CTL2.
　ＢＢＩＣ４は、高周波回路１が伝送する高周波信号よりも低周波の中間周波数帯域を用いて信号処理するベースバンド信号処理回路である。ＢＢＩＣ４で処理される信号としては、例えば、画像表示のための画像信号、及び／又は、スピーカを介した通話のために音声信号が挙げられる。 The BBIC 4 is a baseband signal processing circuit that performs signal processing using an intermediate frequency band that is lower in frequency than the high frequency signal transmitted by the high frequency circuit 1 . Signals processed by the BBIC 4 include, for example, image signals for displaying images and/or audio signals for calling through speakers.
　なお、図２に表された通信装置５の回路構成は、例示であり、これに限定されない。例えば、通信装置５は、アンテナ２及び／又はＢＢＩＣ４を備えなくてもよい。 Note that the circuit configuration of the communication device 5 shown in FIG. 2 is an example, and is not limited to this. For example, communication device 5 may not include antenna 2 and/or BBIC 4 .
　［１．１．２　高周波回路１の回路構成］
　次に、高周波回路１の回路構成について説明する。図２に示すように、高周波回路１は、電力増幅回路１０と、トラッキング回路５０と、を備える。 [1.1.2 Circuit configuration of high-frequency circuit 1]
Next, the circuit configuration of the high frequency circuit 1 will be described. As shown in FIG. 2 , the high frequency circuit 1 includes a power amplifier circuit 10 and a tracking circuit 50 .
　電力増幅回路１０は、トラッキング回路５０に接続され、トラッキング回路５０から電源電圧の供給を受けることができる。電力増幅回路１０の詳細な回路構成については後述する。 The power amplifier circuit 10 is connected to the tracking circuit 50 and can receive power supply voltage from the tracking circuit 50 . A detailed circuit configuration of the power amplifier circuit 10 will be described later.
　トラッキング回路５０は、制御信号ＣＴＬ１が受信された場合に電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴを供給することができる。一方、制御信号ＣＴＬ２が受信された場合には、トラッキング回路５０は、電力増幅回路１０にＥＴモードで電源電圧ＶＥＴを供給することができる。トラッキング回路５０の詳細な回路構成については後述する。 The tracking circuit 50 can supply the power supply voltage VAPT in the APT mode to the power amplifier circuit 10 when the control signal CTL1 is received. On the other hand, when the control signal CTL2 is received, the tracking circuit 50 can supply the power supply voltage VET to the power amplifier circuit 10 in the ET mode. A detailed circuit configuration of the tracking circuit 50 will be described later.
　［１．１．３　電力増幅回路１０の回路構成］
　次に、電力増幅回路１０の回路構成について説明する。図２に示すように、電力増幅回路１０は、電力増幅器１１と、フィルタ２１と、入力端子１０１と、電源電圧端子１０２と、出力端子１０３と、を備える。 [1.1.3 Circuit Configuration of Power Amplifier Circuit 10]
Next, the circuit configuration of the power amplifier circuit 10 will be described. As shown in FIG. 2 , power amplifier circuit 10 includes power amplifier 11 , filter 21 , input terminal 101 , power supply voltage terminal 102 , and output terminal 103 .
　入力端子１０１は、高周波回路１の外部から高周波送信信号を受けるための端子である。入力端子１０１は、高周波回路１の外部でＲＦＩＣ３に接続される。 The input terminal 101 is a terminal for receiving a high frequency transmission signal from the outside of the high frequency circuit 1 . The input terminal 101 is connected to the RFIC 3 outside the high frequency circuit 1 .
　電源電圧端子１０２は、トラッキング回路５０から電源電圧を受けるための端子である。電源電圧端子１０２は、電力増幅回路１０の外部でトラッキング回路５０の出力端子５０２に接続される。 A power supply voltage terminal 102 is a terminal for receiving a power supply voltage from the tracking circuit 50 . The power supply voltage terminal 102 is connected to the output terminal 502 of the tracking circuit 50 outside the power amplifier circuit 10 .
　出力端子１０３は、高周波回路１の外部に高周波送信信号を供給するための端子である。出力端子１０３は、高周波回路１の外部でアンテナ２に接続される。 The output terminal 103 is a terminal for supplying a high frequency transmission signal to the outside of the high frequency circuit 1 . The output terminal 103 is connected to the antenna 2 outside the high frequency circuit 1 .
　電力増幅器１１は、入力端子１０１とフィルタ２１との間に接続され、かつ、電源電圧端子１０２に接続される。具体的には、電力増幅器１１の入力端は入力端子１０１に接続され、電力増幅器１１の出力端はフィルタ２１及び電源電圧端子１０２に接続される。電力増幅器１１は、第１パワークラス及び第２パワークラスに対応している。つまり、電力増幅器１１は、第１パワークラス及び第２パワークラスの両方で高周波信号の増幅に用いることができる。 The power amplifier 11 is connected between the input terminal 101 and the filter 21 and is also connected to the power supply voltage terminal 102 . Specifically, the input terminal of the power amplifier 11 is connected to the input terminal 101 , and the output terminal of the power amplifier 11 is connected to the filter 21 and the power supply voltage terminal 102 . The power amplifier 11 corresponds to the first power class and the second power class. That is, the power amplifier 11 can be used for amplifying high frequency signals in both the first power class and the second power class.
　なお、電力増幅器が対応するパワークラスは、電力増幅器の最大出力電力により特定することができる。例えば、パワークラス１に対応する電力増幅器の最大出力電力は３１ｄＢｍよりも大きい。一般的に、最大出力電力が高いほど電力増幅器のサイズが増大する。したがって、２つの電力増幅器のサイズを比較することで、２つの電力増幅器が対応するパワークラスの相対的な比較を行うことができる場合もある。 It should be noted that the power class that the power amplifier supports can be identified by the maximum output power of the power amplifier. For example, the maximum output power of a power amplifier corresponding to power class 1 is greater than 31 dBm. Generally, the higher the maximum output power, the larger the size of the power amplifier. Therefore, by comparing the sizes of two power amplifiers, it may be possible to make a relative comparison of the power classes supported by the two power amplifiers.
　フィルタ２１は、電力増幅器１１と出力端子１０３との間に接続される。具体的には、フィルタ２１の一端は電力増幅器１１の出力端に接続され、フィルタ２１の他端は出力端子１０３に接続される。フィルタ２１は、バンドＡを含む通過帯域を有し、第１パワークラスに対応する耐電力性を有する。フィルタ２１は、弾性表面波（ＳＡＷ：Surface Acoustic Wave）フィルタ、バルク弾性波（ＢＡＷ：Bulk Acoustic Wave）フィルタ、ＬＣ共振フィルタ、及び誘電体共振フィルタのいずれを用いて構成されてもよく、さらには、これらには限定されない。 The filter 21 is connected between the power amplifier 11 and the output terminal 103 . Specifically, one end of the filter 21 is connected to the output end of the power amplifier 11 and the other end of the filter 21 is connected to the output terminal 103 . The filter 21 has a passband including band A and has a power handling capability corresponding to the first power class. The filter 21 may be configured using any of a surface acoustic wave (SAW) filter, a bulk acoustic wave (BAW) filter, an LC resonance filter, and a dielectric resonance filter, and further , but not limited to these.
　バンドＡは、無線アクセス技術（ＲＡＴ：Radio Access Technology）を用いて構築される通信システムのための周波数バンドである。バンドＡは、標準化団体など（例えば３ＧＰＰ及びＩＥＥＥ（Institute of Electrical and Electronics Engineers）等）によって予め定義される。通信システムの例としては、５ＧＮＲシステム、ＬＴＥシステム及びＷＬＡＮ（Wireless Local Area Network）システム等を挙げることができる。 Band A is a frequency band for communication systems built using radio access technology (RAT). Band A is defined in advance by standardization organizations (eg, 3GPP, Institute of Electrical and Electronics Engineers (IEEE), etc.). Examples of communication systems include a 5GNR system, an LTE system, and a WLAN (Wireless Local Area Network) system.
　バンドＡとしては、５ＧＮＲのためのｎ７７、ｎ７８又はｎ７９を用いることができ、さらに、５ＧＨｚ～７．１２５ＧＨｚの範囲に含まれるライセンスバンド及びアンライセンスバンドを用いることもできる。 As band A, n77, n78, or n79 for 5GNR can be used, and licensed bands and unlicensed bands included in the range of 5 GHz to 7.125 GHz can also be used.
　なお、図２に示す電力増幅回路１０の回路構成は、例示であり、これに限定されない。例えば、電力増幅回路１０は、任意の２つの回路素子（例えば電力増幅器１１及びフィルタ２１など）の間に接続されたインピーダンス整合回路を備えてもよい。インピーダンス整合回路は、例えば、インダクタ及び／又はキャパシタで構成することができる。また例えば、電力増幅回路１０は、フィルタ２１を備えなくてもよい。 Note that the circuit configuration of the power amplifier circuit 10 shown in FIG. 2 is an example, and is not limited to this. For example, power amplifier circuit 10 may comprise an impedance matching circuit connected between any two circuit elements (eg, power amplifier 11 and filter 21, etc.). The impedance matching circuit can be composed of inductors and/or capacitors, for example. Also, for example, the power amplifier circuit 10 may not include the filter 21 .
　［１．１．４　トラッキング回路５０の回路構成］
　次に、トラッキング回路５０の回路構成について説明する。図２に示すように、トラッキング回路５０は、平均電力トラッカ（ＡＰＴ：Average Power Tracker）５１と、エンベロープトラッカ（ＥＴ：Envelope Tracker）５２と、スイッチ５３と、制御端子５０１と、出力端子５０２と、を備える。 [1.1.4 Circuit Configuration of Tracking Circuit 50]
Next, the circuit configuration of the tracking circuit 50 will be described. As shown in FIG. 2, the tracking circuit 50 includes an average power tracker (APT) 51, an envelope tracker (ET) 52, a switch 53, a control terminal 501, an output terminal 502, Prepare.
　制御端子５０１は、高周波回路１の外部から制御信号（制御信号ＣＴＬ１及びＣＴＬ２を含む）を受けるための端子である。制御端子５０１は、高周波回路１の外部でＲＦＩＣ３に接続される。 A control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high-frequency circuit 1 . The control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1 .
　出力端子５０２は、電力増幅回路１０に電源電圧を供給するための端子である。出力端子５０２は、トラッキング回路５０の外部で電力増幅回路１０の電源電圧端子１０２に接続される。 The output terminal 502 is a terminal for supplying power supply voltage to the power amplifier circuit 10 . The output terminal 502 is connected to the power supply voltage terminal 102 of the power amplifier circuit 10 outside the tracking circuit 50 .
　ＡＰＴ５１は、ＡＰＴモードで電源電圧ＶＡＰＴを供給することができる。ＥＴ５２は、ＥＴモードで電源電圧ＶＥＴを供給することができる。ＥＴモードとしては、アナログＥＴモード及びデジタルＥＴモードのどちらが用いられてもよい。つまり、ＥＴ５２は、アナログエンベロープトラッカ及びデジタルエンベロープトラッカのどちらであってもよい。 APT 51 can supply power supply voltage VAPT in APT mode. The ET 52 can supply the supply voltage V ET in ET mode. Either the analog ET mode or the digital ET mode may be used as the ET mode. That is, the ET52 can be either an analog envelope tracker or a digital envelope tracker.
　スイッチ５３は、ＡＰＴ５１及びＥＴ５２と電力増幅器１１との間に接続される。具体的には、スイッチ５３は、ＡＰＴ５１に接続された端子５３１と、ＥＴ５２に接続された端子５３２と、出力端子５０２に接続された端子５３３と、を備える。スイッチ５３は、例えばＳＰＤＴ（Single-Pole Double-Throw）型のスイッチ回路で構成される。 A switch 53 is connected between the APT 51 and ET 52 and the power amplifier 11 . Specifically, the switch 53 has a terminal 531 connected to the APT 51 , a terminal 532 connected to the ET 52 , and a terminal 533 connected to the output terminal 502 . The switch 53 is configured by, for example, an SPDT (Single-Pole Double-Throw) type switch circuit.
　この接続構成において、スイッチ５３は、ＲＦＩＣ３からの制御信号に基づいて、端子５３１及び５３２を端子５３３に接続することができる。具体的には、制御信号ＣＴＬ１が受信された場合に、スイッチ５３は、ＥＴ５２を出力端子５０２に接続せずに、ＡＰＴ５１を出力端子５０２に接続することができる。一方、制御信号ＣＴＬ２が受信された場合に、スイッチ５３は、ＡＰＴ５１を出力端子５０２に接続せずに、ＥＴ５２を出力端子５０２に接続することができる。 In this connection configuration, the switch 53 can connect the terminals 531 and 532 to the terminal 533 based on the control signal from the RFIC3. Specifically, when control signal CTL1 is received, switch 53 can connect APT51 to output terminal 502 without connecting ET52 to output terminal 502 . On the other hand, the switch 53 can connect the ET52 to the output terminal 502 without connecting the APT51 to the output terminal 502 when the control signal CTL2 is received.
　なお、図２に示すトラッキング回路５０の回路構成は、例示であり、これに限定されない。例えば、スイッチ５３は、トラッキング回路５０に含まれなくてもよく、電力増幅回路１０に含まれてもよい。 Note that the circuit configuration of the tracking circuit 50 shown in FIG. 2 is an example, and is not limited to this. For example, switch 53 may not be included in tracking circuit 50 and may be included in power amplifier circuit 10 .
　［１．２　各パワークラスの高周波信号の伝送状態］
　次に、本実施の形態に係る通信装置５の各パワークラスの高周波信号の伝送状態について図３及び図４を参照しながら説明する。図３は、本実施の形態に係る通信装置５において第１パワークラスの高周波信号の伝送状態を示す図である。図４は、本実施の形態に係る通信装置５において第２パワークラスの高周波信号の伝送状態を示す図である。 [1.2 Transmission state of high-frequency signals in each power class]
Next, the transmission state of the high-frequency signal of each power class of the communication device 5 according to the present embodiment will be described with reference to FIGS. 3 and 4. FIG. FIG. 3 is a diagram showing the state of transmission of high-frequency signals of the first power class in communication device 5 according to the present embodiment. FIG. 4 is a diagram showing a transmission state of a high-frequency signal of the second power class in communication device 5 according to the present embodiment.
　なお、パワークラスの高周波信号とは、当該パワークラスの最大出力電力を有する高周波信号の送信が許容される状態において通信装置５から送信される高周波信号を意味する。したがって、パワークラスの高周波信号は、当該パワークラスの最大出力電力と等しい出力電力を有する高周波信号だけでなく、当該パワークラスの最大出力電力より小さい出力電力を有する高周波信号を含む。 The power class high-frequency signal means a high-frequency signal transmitted from the communication device 5 in a state in which transmission of a high-frequency signal having the maximum output power of the power class is permitted. Therefore, high-frequency signals of a power class include not only high-frequency signals having an output power equal to the maximum output power of the power class, but also high-frequency signals having an output power less than the maximum output power of the power class.
　第１パワークラス（例えばパワークラス１．５）の高周波信号ＲＦＡＨが送信される場合、図３に示すように、ＲＦＩＣ３からトラッキング回路５０に制御信号ＣＴＬ１が送信される。その結果、トラッキング回路５０のスイッチ５３は、ＡＰＴ５１を出力端子５０２に接続する。これにより、トラッキング回路５０から電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴが供給される。このとき、電力増幅回路１０は、入力端子１０１を介してＲＦＩＣ３から、バンドＡの高周波信号を受信する。受信された高周波信号は、電源電圧ＶＡＰＴを用いて電力増幅器１１で増幅され、フィルタ２１及び出力端子１０３を介してアンテナ２に伝送される。これにより、第１パワークラスの高周波信号ＲＦＡＨが通信装置５から送信される。 When the radio frequency signal RF AH of the first power class (for example, power class 1.5) is transmitted, the control signal CTL1 is transmitted from the RFIC 3 to the tracking circuit 50 as shown in FIG. As a result, switch 53 of tracking circuit 50 connects APT 51 to output terminal 502 . As a result, the power supply voltage VAPT is supplied from the tracking circuit 50 to the power amplifier circuit 10 in the APT mode. At this time, the power amplifier circuit 10 receives a high frequency signal of band A from the RFIC 3 via the input terminal 101 . The received high frequency signal is amplified by the power amplifier 11 using the power supply voltage VAPT and transmitted to the antenna 2 via the filter 21 and the output terminal 103 . Thereby, the radio frequency signal RF AH of the first power class is transmitted from the communication device 5 .
　第２パワークラス（例えばパワークラス２）の高周波信号ＲＦＡＬが送信される場合、図４に示すように、ＲＦＩＣ３からトラッキング回路５０に制御信号ＣＴＬ２が送信される。その結果、トラッキング回路５０のスイッチ５３は、ＥＴ５２を出力端子５０２に接続する。これにより、トラッキング回路５０から電力増幅回路１０にＥＴモードで電源電圧ＶＥＴが供給される。このとき、電力増幅回路１０は、入力端子１０１を介してＲＦＩＣ３から、バンドＡの高周波信号を受信する。受信された高周波信号は、電源電圧ＶＥＴを用いて電力増幅器１１で増幅され、フィルタ２１及び出力端子１０３を介してアンテナ２に伝送される。これにより、第２パワークラスの高周波信号ＲＦＡＬが通信装置５から送信される。 When the high-frequency signal RF AL of the second power class (for example, power class 2) is transmitted, the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50 as shown in FIG. As a result, switch 53 of tracking circuit 50 connects ET 52 to output terminal 502 . As a result, the power supply voltage V ET is supplied from the tracking circuit 50 to the power amplifier circuit 10 in the ET mode. At this time, the power amplifier circuit 10 receives a high frequency signal of band A from the RFIC 3 via the input terminal 101 . The received high frequency signal is amplified by the power amplifier 11 using the power supply voltage V ET and transmitted to the antenna 2 via the filter 21 and the output terminal 103 . As a result, the radio frequency signal RF AL of the second power class is transmitted from the communication device 5 .
　［１．３　効果など］
　以上のように、本実施の形態に係る高周波回路１は、電力増幅回路１０と、電力増幅回路１０に接続されたトラッキング回路５０と、を備え、トラッキング回路５０は、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０にＥＴモードで電源電圧ＶＥＴを供給する。ここで、電力増幅回路１０は、第１パワークラス及び第２パワークラスに対応する電力増幅器１１を備え、トラッキング回路５０は、電力増幅器１１に接続される出力端子５０２と、ＥＴモードで電源電圧ＶＥＴを供給可能なＥＴ５２と、ＡＰＴモードで電源電圧ＶＡＰＴを供給可能なＡＰＴ５１と、ＥＴ５２及びＡＰＴ５１と出力端子５０２との間に接続されたスイッチ５３と、を備え、スイッチ５３は、制御信号ＣＴＬ１が受信された場合に、ＡＰＴ５１を出力端子５０２に接続し、制御信号ＣＴＬ２が受信された場合に、ＥＴ５２を出力端子５０２に接続する。 [1.3 Effects, etc.]
As described above, the high-frequency circuit 1 according to the present embodiment includes the power amplifier circuit 10 and the tracking circuit 50 connected to the power amplifier circuit 10. The tracking circuit 50 has a maximum power equal to or higher than a predetermined maximum power. When the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected. When the control signal CTL2 shown is received, the power amplifier circuit 10 is supplied with the power supply voltage V ET in the ET mode. Here, the power amplifier circuit 10 includes power amplifiers 11 corresponding to the first power class and the second power class, and the tracking circuit 50 has an output terminal 502 connected to the power amplifiers 11 and a power supply voltage V ET in the ET mode. APT51 capable of supplying a power supply voltage V APT in APT mode; and a switch 53 connected between the ET52 and APT51 and the output terminal 502, the switch 53 receiving the control signal CTL1. APT 51 is connected to output terminal 502 when received, and ET 52 is connected to output terminal 502 when control signal CTL2 is received.
　これによれば、より高い最大出力電力で規定される第１パワークラスでは、電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴが供給される。したがって、第１パワークラスでは、より高い電源電圧の供給に対応することが難しいＥＴモードの使用が避けられ、ＡＰＴモードでＰＡＥの改善を図ることができる。一方、より低い最大出力電力で規定される第２パワークラスでは、ＥＴモードで電源電圧ＶＥＴが供給される。したがって、ＡＰＴモードで電源電圧ＶＡＰＴが供給される場合よりもＰＡＥを改善することができる。なお、パワークラス１では、変調方式としてＢＰＳＫ（Binary Phase-Shift Keying）が採用される場合がある。したがって、第１パワークラスがパワークラス１である場合には、振幅が変調されない場合があるためＥＴモードに対するＰＡＥの低下も抑制される。 According to this, in the first power class defined with a higher maximum output power, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode. Therefore, in the first power class, it is possible to avoid the use of the ET mode in which it is difficult to cope with the supply of a higher power supply voltage, and to improve the PAE in the APT mode. On the other hand, in the second power class defined with a lower maximum output power, the power supply voltage V ET is supplied in ET mode. Therefore, PAE can be improved more than when the power supply voltage V APT is supplied in the APT mode. In addition, in power class 1, BPSK (Binary Phase-Shift Keying) may be adopted as a modulation method. Therefore, when the first power class is power class 1, since the amplitude may not be modulated, the decrease in PAE with respect to the ET mode is also suppressed.
　また、本実施の形態に係るトラッキング回路５０は、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０にＥＴモードで電源電圧ＶＥＴを供給する。ここで、電力増幅回路１０は、第１パワークラス及び第２パワークラスに対応する電力増幅器１１を備え、トラッキング回路５０は、電力増幅器１１に接続される出力端子５０２と、ＥＴモードで電源電圧ＶＥＴを供給可能なＥＴ５２と、ＡＰＴモードで電源電圧ＶＡＰＴを供給可能なＡＰＴ５１と、ＥＴ５２及びＡＰＴ５１と出力端子５０２との間に接続されたスイッチ５３と、を備え、スイッチ５３は、制御信号ＣＴＬ１が受信された場合に、ＡＰＴ５１を出力端子５０２に接続し、制御信号ＣＴＬ２が受信された場合に、ＥＴ５２を出力端子５０２に接続する。 Further, the tracking circuit 50 according to the present embodiment supplies the power amplifier circuit 10 with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received. APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10 in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received. Here, the power amplifier circuit 10 includes power amplifiers 11 corresponding to the first power class and the second power class, and the tracking circuit 50 has an output terminal 502 connected to the power amplifiers 11 and a power supply voltage V ET in the ET mode. APT51 capable of supplying a power supply voltage V APT in APT mode; and a switch 53 connected between the ET52 and APT51 and the output terminal 502, the switch 53 receiving the control signal CTL1. APT 51 is connected to output terminal 502 when received, and ET 52 is connected to output terminal 502 when control signal CTL2 is received.
　これによれば、トラッキング回路５０は、上記高周波回路１と同様の効果を実現することができる。 According to this, the tracking circuit 50 can achieve the same effect as the high-frequency circuit 1 described above.
　（実施の形態２）
　次に、実施の形態２について説明する。本実施の形態では、２つのトラッカ（ＡＰＴ及びＥＴ）の代わりに１つのマルチモードトラッカ（ＭＴ：Multimode Tracker）が用いられる点が、上記実施の形態１と主として異なる。以下に、本実施の形態について上記実施の形態１と異なる点を中心に図５を参照しながら説明する。 (Embodiment 2)
Next, Embodiment 2 will be described. This embodiment mainly differs from the first embodiment in that one multimode tracker (MT: Multimode Tracker) is used instead of two trackers (APT and ET). The present embodiment will be described below with reference to FIG. 5, focusing on the differences from the first embodiment.
　なお、本実施の形態に係る通信装置５Ａは、高周波回路１の代わりに高周波回路１Ａを備える点を除いて、上記実施の形態１に係る通信装置５と同様である。さらに、本実施の形態に係る高周波回路１Ａは、トラッキング回路５０の代わりにトラッキング回路５０Ａを備える点を除いて、上記実施の形態１に係る高周波回路１と同様である。したがって、以下では、トラッキング回路５０Ａについて説明し、他の回路等については説明を省略する。 Note that the communication device 5A according to the present embodiment is the same as the communication device 5 according to the first embodiment except that the high frequency circuit 1A is provided instead of the high frequency circuit 1. Furthermore, the high frequency circuit 1A according to the present embodiment is the same as the high frequency circuit 1 according to the first embodiment except that a tracking circuit 50A is provided instead of the tracking circuit 50. FIG. Therefore, the tracking circuit 50A will be described below, and descriptions of other circuits and the like will be omitted.
　［２．１　トラッキング回路５０Ａの回路構成］
　トラッキング回路５０Ａは、トラッキング回路５０と同様に、制御信号ＣＴＬ１が受信された場合に電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴを供給することができ、制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０にＥＴモードで電源電圧ＶＥＴを供給することができる。トラッキング回路５０Ａの回路構成について図５を参照しながら説明する。 [2.1 Circuit Configuration of Tracking Circuit 50A]
Similarly to the tracking circuit 50, the tracking circuit 50A can supply the power supply voltage VAPT in the APT mode to the power amplifier circuit 10 when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10 can be supplied with the power supply voltage V ET in ET mode. The circuit configuration of the tracking circuit 50A will be described with reference to FIG.
　図５は、本実施の形態に係る通信装置５Ａの回路構成図である。通信装置５Ａに含まれるトラッキング回路５０Ａは、ＭＴ５４と、制御端子５０１と、出力端子５０２と、を備える。 FIG. 5 is a circuit configuration diagram of a communication device 5A according to this embodiment. A tracking circuit 50A included in the communication device 5A includes an MT54, a control terminal 501, and an output terminal 502. FIG.
　制御端子５０１は、高周波回路１Ａの外部から制御信号（制御信号ＣＴＬ１及びＣＴＬ２を含む）を受けるための端子である。制御端子５０１は、高周波回路１Ａの外部でＲＦＩＣ３に接続される。 The control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high frequency circuit 1A. The control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1A.
　出力端子５０２は、電力増幅回路１０に電源電圧を供給するための端子である。出力端子５０２は、トラッキング回路５０Ａの外部で電力増幅回路１０の電源電圧端子１０２に接続される。 The output terminal 502 is a terminal for supplying power supply voltage to the power amplifier circuit 10 . The output terminal 502 is connected to the power supply voltage terminal 102 of the power amplifier circuit 10 outside the tracking circuit 50A.
　ＭＴ５４は、ＥＴモードの電源電圧ＶＥＴとＡＰＴモードの電源電圧ＶＡＰＴとを選択的に供給することができる。具体的には、ＭＴ５４は、制御信号ＣＴＬ１が受信された場合に、電力増幅器１１にＡＰＴモードで電源電圧ＶＡＰＴを供給し、制御信号ＣＴＬ２が受信された場合に、電力増幅器１１にＥＴモードで電源電圧ＶＥＴを供給することができる。 The MT54 can selectively supply the ET mode power supply voltage V_ET and the APT mode power supply voltage V_APT . Specifically, the MT 54 supplies the power amplifier 11 with the power supply voltage V APT in the APT mode when the control signal CTL1 is received, and supplies the power amplifier 11 with the ET mode when the control signal CTL2 is received. A power supply voltage V ET can be provided.
　ＭＴ５４の内部構成は、特に限定されないが、例えばＡＰＴモード及びＥＴモードで共用されるＤＣ（Direct Current）－ＤＣコンバータ（図示せず）とＥＴモードで用いられる変調器（図示せず）とを備える。この場合、ＭＴ５４は、ＡＰＴモードにおいて、ＤＣ－ＤＣコンバータを用いて入力電圧を電源電圧ＶＡＰＴに変換することができる。また、ＭＴ５４は、ＥＴモードにおいて、ＤＣ－ＤＣコンバータを用いて入力電圧を基準電圧に変換し、変調器を用いて当該基準電圧を変調して電源電圧ＶＥＴを生成することができる。 The internal configuration of the MT54 is not particularly limited, but includes, for example, a DC (Direct Current)-DC converter (not shown) shared by the APT mode and the ET mode and a modulator (not shown) used in the ET mode. . In this case, the MT54 can convert the input voltage to the power supply voltage V APT using a DC-DC converter in APT mode. Further, in the ET mode, the MT54 can convert the input voltage into a reference voltage using a DC-DC converter and modulate the reference voltage using a modulator to generate the power supply voltage V ET .
　［２．２　効果など］
　以上のように、本実施の形態に係る高周波回路１Ａは、電力増幅回路１０と、電力増幅回路１０に接続されたトラッキング回路５０Ａと、を備え、トラッキング回路５０Ａは、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０にＥＴモードで電源電圧ＶＥＴを供給する。ここで、電力増幅回路１０は、第１パワークラス及び第２パワークラスに対応する電力増幅器１１を備え、トラッキング回路５０Ａは、ＥＴモードで電源電圧を供給可能、かつ、ＡＰＴモードで電源電圧を供給可能なＭＴ５４を備え、ＭＴ５４は、制御信号ＣＴＬ１が受信された場合に、電力増幅器１１にＡＰＴモードで電源電圧ＶＡＰＴを供給し、制御信号ＣＴＬ２が受信された場合に、電力増幅器１１にＥＴモードで電源電圧ＶＥＴを供給する。 [2.2 Effects, etc.]
As described above, the high-frequency circuit 1A according to the present embodiment includes the power amplifier circuit 10 and the tracking circuit 50A connected to the power amplifier circuit 10. The tracking circuit 50A can When the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected. When the control signal CTL2 shown is received, the power amplifier circuit 10 is supplied with the power supply voltage V ET in the ET mode. Here, the power amplifier circuit 10 includes a power amplifier 11 corresponding to the first power class and the second power class, and the tracking circuit 50A can supply the power supply voltage in the ET mode and can supply the power supply voltage in the APT mode. The MT54 supplies the power amplifier 11 with the power supply voltage V APT in the APT mode when the control signal CTL1 is received, and supplies the power amplifier 11 with the power supply voltage V APT in the ET mode when the control signal CTL2 is received. Provides voltage V ET .
　これによれば、より高い最大出力電力で規定される第１パワークラスでは、電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴが供給され、より低い最大出力電力で規定される第２パワークラスでは、ＥＴモードで電源電圧ＶＥＴが供給される。したがって、実施の形態１に係る高周波回路１と同様の効果を奏することができる。さらに、ＭＴ５４が用いられることで、トラッキング回路５０Ａの回路構成を簡略化することができる。 According to this, in the first power class defined with a higher maximum output power, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Furthermore, the use of the MT54 can simplify the circuit configuration of the tracking circuit 50A.
　また、本実施の形態に係るトラッキング回路５０Ａは、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０にＥＴモードで電源電圧ＶＥＴを供給する。ここで、電力増幅回路１０は、第１パワークラス及び第２パワークラスに対応する電力増幅器１１を備え、トラッキング回路５０Ａは、ＥＴモードで電源電圧を供給可能、かつ、ＡＰＴモードで電源電圧を供給可能なＭＴ５４を備え、ＭＴ５４は、制御信号ＣＴＬ１が受信された場合に、電力増幅器１１にＡＰＴモードで電源電圧ＶＡＰＴを供給し、制御信号ＣＴＬ２が受信された場合に、電力増幅器１１にＥＴモードで電源電圧ＶＥＴを供給する。 Further, the tracking circuit 50A according to the present embodiment supplies the power amplifier circuit 10 with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received. APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10 in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received. Here, the power amplifier circuit 10 includes a power amplifier 11 corresponding to the first power class and the second power class, and the tracking circuit 50A can supply the power supply voltage in the ET mode and can supply the power supply voltage in the APT mode. The MT54 supplies the power amplifier 11 with the power supply voltage V APT in the APT mode when the control signal CTL1 is received, and supplies the power amplifier 11 with the power supply voltage V APT in the ET mode when the control signal CTL2 is received. Provides voltage V ET .
　これによれば、トラッキング回路５０Ａは、上記高周波回路１Ａと同様の効果を実現することができる。 According to this, the tracking circuit 50A can achieve the same effects as the high-frequency circuit 1A.
　（実施の形態３）
　次に、実施の形態３について説明する。本実施の形態では、電力増幅回路に第１パワークラス及び第２パワークラスにそれぞれ対応する２つの電力増幅器が含まれる点が、上記実施の形態１と主として異なる。以下に、本実施の形態について上記実施の形態１と異なる点を中心に図６を参照しながら説明する。 (Embodiment 3)
Next, Embodiment 3 will be described. The present embodiment differs from the first embodiment mainly in that the power amplifier circuit includes two power amplifiers respectively corresponding to the first power class and the second power class. The present embodiment will be described below with reference to FIG. 6, focusing on the differences from the first embodiment.
　なお、本実施の形態に係る通信装置５Ｂは、高周波回路１の代わりに高周波回路１Ｂを備え、アンテナ２の代わりに２つのアンテナ２ａ及び２ｂを備える点を除いて、上記実施の形態１に係る通信装置５と同様である。さらに、本実施の形態に係る高周波回路１Ｂは、電力増幅回路１０及びトラッキング回路５０の代わりに電力増幅回路１０Ｂ及びトラッキング回路５０Ｂを備える点を除いて、上記実施の形態１に係る高周波回路１と同様である。したがって、以下では、電力増幅回路１０Ｂ及びトラッキング回路５０Ｂについて説明し、他の回路等については説明を省略する。 Note that the communication device 5B according to the present embodiment includes a high-frequency circuit 1B instead of the high-frequency circuit 1, and two antennas 2a and 2b instead of the antenna 2. It is similar to the communication device 5 . Further, the high-frequency circuit 1B according to the present embodiment is similar to the high-frequency circuit 1 according to the first embodiment, except that a power amplifier circuit 10B and a tracking circuit 50B are provided instead of the power amplifier circuit 10 and the tracking circuit 50. It is the same. Therefore, the power amplifier circuit 10B and the tracking circuit 50B will be described below, and descriptions of other circuits and the like will be omitted.
　［３．１　回路構成］
　［３．１．１　電力増幅回路１０Ｂの回路構成］
　電力増幅回路１０Ｂは、トラッキング回路５０Ｂに接続され、トラッキング回路５０Ｂから電源電圧の供給を受けることができる。電力増幅回路１０Ｂの回路構成について図６を参照しながら説明する。 [3.1 Circuit configuration]
[3.1.1 Circuit Configuration of Power Amplifier Circuit 10B]
The power amplifier circuit 10B is connected to the tracking circuit 50B and can receive power supply voltage from the tracking circuit 50B. The circuit configuration of the power amplifier circuit 10B will be described with reference to FIG.
　図６は、本実施の形態に係る通信装置５Ｂの回路構成図である。通信装置５Ｂに含まれる電力増幅回路１０Ｂは、電力増幅器１１Ｂ及び１２Ｂと、フィルタ２１Ｂ及び２２Ｂと、入力端子１０１ａ及び１０１ｂと、電源電圧端子１０２ａ及び１０２ｂと、出力端子１０３ａ及び１０３ｂと、を備える。 FIG. 6 is a circuit configuration diagram of communication device 5B according to the present embodiment. A power amplifier circuit 10B included in the communication device 5B includes power amplifiers 11B and 12B, filters 21B and 22B, input terminals 101a and 101b, power supply voltage terminals 102a and 102b, and output terminals 103a and 103b.
　入力端子１０１ａは、高周波回路１Ｂの外部から第１パワークラスの高周波送信信号を受けるための端子である。入力端子１０１ｂは、高周波回路１Ｂの外部から第２パワークラスの高周波送信信号を受けるための端子である。入力端子１０１ａ及び１０１ｂの各々は、高周波回路１Ｂの外部でＲＦＩＣ３に接続される。 The input terminal 101a is a terminal for receiving a first power class high frequency transmission signal from the outside of the high frequency circuit 1B. The input terminal 101b is a terminal for receiving a high frequency transmission signal of the second power class from the outside of the high frequency circuit 1B. Each of the input terminals 101a and 101b is connected to the RFIC 3 outside the high frequency circuit 1B.
　電源電圧端子１０２ａは、トラッキング回路５０Ｂから電源電圧ＶＡＰＴを受けるための端子である。電源電圧端子１０２ａは、電力増幅回路１０Ｂの外部でトラッキング回路５０Ｂの出力端子５０２ａに接続される。 The power supply voltage terminal 102a is a terminal for receiving the power supply voltage VAPT from the tracking circuit 50B. The power supply voltage terminal 102a is connected to the output terminal 502a of the tracking circuit 50B outside the power amplifier circuit 10B.
　電源電圧端子１０２ｂは、トラッキング回路５０Ｂから電源電圧ＶＥＴを受けるための端子である。電源電圧端子１０２ｂは、電力増幅回路１０Ｂの外部でトラッキング回路５０Ｂの出力端子５０２ｂに接続される。 The power supply voltage terminal 102b is a terminal for receiving the power supply voltage VET from the tracking circuit 50B. The power supply voltage terminal 102b is connected to the output terminal 502b of the tracking circuit 50B outside the power amplifier circuit 10B.
　出力端子１０３ａは、高周波回路１Ｂの外部に第１パワークラスの高周波送信信号を供給するための端子である。出力端子１０３ｂは、高周波回路１Ｂの外部に第２パワークラスの高周波送信信号を供給するための端子である。出力端子１０３ａ及び１０３ｂは、高周波回路１Ｂの外部でアンテナ２ａ及び２ｂにそれぞれ接続される。 The output terminal 103a is a terminal for supplying a high frequency transmission signal of the first power class to the outside of the high frequency circuit 1B. The output terminal 103b is a terminal for supplying a high frequency transmission signal of the second power class to the outside of the high frequency circuit 1B. Output terminals 103a and 103b are connected to antennas 2a and 2b, respectively, outside the high-frequency circuit 1B.
　電力増幅器１１Ｂは、第１電力増幅器の一例であり、入力端子１０１ａとフィルタ２１Ｂとの間に接続され、かつ、電源電圧端子１０２ａに接続される。具体的には、電力増幅器１１Ｂの入力端は入力端子１０１ａに接続され、電力増幅器１１Ｂの出力端はフィルタ２１Ｂ及び電源電圧端子１０２ａに接続される。電力増幅器１１Ｂは、第１パワークラスに対応している。つまり、電力増幅器１１Ｂは、第１パワークラスの最大出力電力を満たす電力まで高周波信号を増幅することができる。本実施の形態では、電力増幅器１１Ｂは、第１パワークラス及び第２パワークラスのうち第１パワークラスのみで高周波信号の増幅に用いられる。また、電力増幅器１１Ｂには、ＡＰＴモードが適用され、ＥＴモードが適用されない。 The power amplifier 11B is an example of a first power amplifier, is connected between the input terminal 101a and the filter 21B, and is connected to the power supply voltage terminal 102a. Specifically, the input terminal of the power amplifier 11B is connected to the input terminal 101a, and the output terminal of the power amplifier 11B is connected to the filter 21B and the power supply voltage terminal 102a. The power amplifier 11B corresponds to the first power class. That is, the power amplifier 11B can amplify the high-frequency signal to the power that satisfies the maximum output power of the first power class. In this embodiment, the power amplifier 11B is used for amplifying high frequency signals only in the first power class out of the first power class and the second power class. Also, the APT mode is applied to the power amplifier 11B, and the ET mode is not applied.
　電力増幅器１２Ｂは、第２電力増幅器の一例であり、入力端子１０１ｂとフィルタ２２Ｂとの間に接続され、かつ、電源電圧端子１０２ｂに接続される。具体的には、電力増幅器１２Ｂの入力端は入力端子１０１ｂに接続され、電力増幅器１２Ｂの出力端はフィルタ２２Ｂ及び電源電圧端子１０２ｂに接続される。電力増幅器１２Ｂは、第２パワークラスに対応している。つまり、電力増幅器１２Ｂは、第２パワークラスの最大出力電力を満たす電力まで高周波信号を増幅することができる。本実施の形態では、電力増幅器１２Ｂは、第１パワークラス及び第２パワークラスのうち第２パワークラスのみで高周波信号の増幅に用いられる。また、電力増幅器１２Ｂには、ＥＴモードが適用され、ＡＰＴモードが適用されない。 The power amplifier 12B is an example of a second power amplifier, connected between the input terminal 101b and the filter 22B, and connected to the power supply voltage terminal 102b. Specifically, the input terminal of the power amplifier 12B is connected to the input terminal 101b, and the output terminal of the power amplifier 12B is connected to the filter 22B and the power supply voltage terminal 102b. The power amplifier 12B corresponds to the second power class. In other words, the power amplifier 12B can amplify the high frequency signal to the power that satisfies the maximum output power of the second power class. In the present embodiment, the power amplifier 12B is used for amplifying high frequency signals only in the second power class out of the first power class and the second power class. Also, the ET mode is applied to the power amplifier 12B, and the APT mode is not applied.
　フィルタ２１Ｂは、電力増幅器１１Ｂと出力端子１０３ａとの間に接続される。具体的には、フィルタ２１Ｂの一端は電力増幅器１１Ｂの出力端に接続され、フィルタ２１Ｂの他端は出力端子１０３ａに接続される。フィルタ２１Ｂは、バンドＡを含む通過帯域を有し、第１パワークラスに対応する耐電力性を有する。フィルタ２１Ｂは、ＳＡＷフィルタ、ＢＡＷフィルタ、ＬＣ共振フィルタ、及び誘電体共振フィルタのいずれを用いて構成されてもよく、さらには、これらには限定されない。 The filter 21B is connected between the power amplifier 11B and the output terminal 103a. Specifically, one end of the filter 21B is connected to the output end of the power amplifier 11B, and the other end of the filter 21B is connected to the output terminal 103a. The filter 21B has a passband including band A and has a power handling capability corresponding to the first power class. The filter 21B may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
　フィルタ２２Ｂは、電力増幅器１２Ｂと出力端子１０３ｂとの間に接続される。具体的には、フィルタ２２Ｂの一端は電力増幅器１２Ｂの出力端に接続され、フィルタ２２Ｂの他端は出力端子１０３ｂに接続される。フィルタ２２Ｂは、バンドＡを含む通過帯域を有し、第２パワークラスに対応する耐電力性を有する。フィルタ２２Ｂは、ＳＡＷフィルタ、ＢＡＷフィルタ、ＬＣ共振フィルタ、及び誘電体共振フィルタのいずれを用いて構成されてもよく、さらには、これらには限定されない。 The filter 22B is connected between the power amplifier 12B and the output terminal 103b. Specifically, one end of the filter 22B is connected to the output end of the power amplifier 12B, and the other end of the filter 22B is connected to the output terminal 103b. The filter 22B has a passband including band A and has a power handling capability corresponding to the second power class. The filter 22B may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
　なお、図６に示す電力増幅回路１０Ｂの回路構成は、例示であり、これに限定されない。例えば、電力増幅回路１０Ｂは、出力端子１０３ａ及び１０３ｂの一方のみを備えてもよい。つまり、通信装置５Ｂは、アンテナ２ａ及び２ｂの一方のみを備えてもよい。この場合、電力増幅回路１０Ｂは、電力増幅器１１Ｂの出力端及び電力増幅器１２Ｂの出力端と、出力端子１０３ａ及び１０３ｂの一方との間に接続されたスイッチを備えてもよい。また例えば、電力増幅回路１０Ｂは、任意の２つの回路素子（例えば電力増幅器１１Ｂ及びフィルタ２１Ｂなど）の間に接続されたインピーダンス整合回路を備えてもよい。また例えば、電力増幅回路１０Ｂは、フィルタ２１Ｂ及び／又は２２Ｂを備えなくてもよい。 Note that the circuit configuration of the power amplifier circuit 10B shown in FIG. 6 is an example, and is not limited to this. For example, the power amplifier circuit 10B may have only one of the output terminals 103a and 103b. That is, the communication device 5B may have only one of the antennas 2a and 2b. In this case, the power amplifier circuit 10B may include a switch connected between the output terminal of the power amplifier 11B and the output terminal of the power amplifier 12B and one of the output terminals 103a and 103b. Also, for example, the power amplifier circuit 10B may include an impedance matching circuit connected between any two circuit elements (for example, the power amplifier 11B and the filter 21B, etc.). Also, for example, the power amplifier circuit 10B may not include the filters 21B and/or 22B.
　［３．１．２　トラッキング回路５０Ｂの回路構成］
　トラッキング回路５０Ｂは、トラッキング回路５０と同様に、制御信号ＣＴＬ１が受信された場合に電力増幅回路１０ＢにＡＰＴモードで電源電圧ＶＡＰＴを供給することができ、制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０ＢにＥＴモードで電源電圧ＶＥＴを供給することができる。トラッキング回路５０Ｂの回路構成について図６を参照しながら説明する。 [3.1.2 Circuit Configuration of Tracking Circuit 50B]
Similarly to the tracking circuit 50, the tracking circuit 50B can supply the power supply voltage VAPT in the APT mode to the power amplifier circuit 10B when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10B can be supplied with the power supply voltage V ET in the ET mode. The circuit configuration of the tracking circuit 50B will be described with reference to FIG.
　本実施の形態に係るトラッキング回路５０Ｂは、ＭＴ５４と、スイッチ５５と、制御端子５０１と、出力端子５０２ａ及び５０２ｂと、を備える。 A tracking circuit 50B according to the present embodiment includes an MT 54, a switch 55, a control terminal 501, and output terminals 502a and 502b.
　制御端子５０１は、高周波回路１Ｂの外部から制御信号（制御信号ＣＴＬ１及びＣＴＬ２を含む）を受けるための端子である。制御端子５０１は、高周波回路１Ｂの外部でＲＦＩＣ３に接続される。 The control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high frequency circuit 1B. The control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1B.
　出力端子５０２ａは、第１出力端子の一例であり、電力増幅回路１０Ｂに電源電圧ＶＡＰＴを供給するための端子である。出力端子５０２ａは、トラッキング回路５０Ｂの外部で電力増幅回路１０Ｂの電源電圧端子１０２ａに接続される。 The output terminal 502a is an example of a first output terminal, and is a terminal for supplying the power supply voltage VAPT to the power amplifier circuit 10B. The output terminal 502a is connected to the power supply voltage terminal 102a of the power amplifier circuit 10B outside the tracking circuit 50B.
　出力端子５０２ｂは、第２出力端子の一例であり、電力増幅回路１０Ｂに電源電圧ＶＥＴを供給するための端子である。出力端子５０２ｂは、トラッキング回路５０Ｂの外部で電力増幅回路１０Ｂの電源電圧端子１０２ｂに接続される。 The output terminal 502b is an example of a second output terminal, and is a terminal for supplying the power supply voltage VET to the power amplifier circuit 10B. The output terminal 502b is connected to the power supply voltage terminal 102b of the power amplifier circuit 10B outside the tracking circuit 50B.
　ＭＴ５４は、実施の形態２と同様に、ＥＴモードの電源電圧ＶＥＴとＡＰＴモードの電源電圧ＶＡＰＴとを選択的に供給することができる。 The MT 54 can selectively supply the ET mode power supply voltage V_ET and the APT mode power supply voltage VAPT as in the second embodiment.
　スイッチ５５は、ＭＴ５４と出力端子５０２ａ及び５０２ｂの間に接続される。具体的には、スイッチ５５は、ＭＴ５４に接続された端子５５１と、出力端子５０２ａに接続された端子５５２と、出力端子５０２ｂに接続された端子５５３と、を備える。スイッチ５５は、例えばＳＰＤＴ型のスイッチ回路で構成される。 The switch 55 is connected between the MT54 and the output terminals 502a and 502b. Specifically, the switch 55 has a terminal 551 connected to the MT54, a terminal 552 connected to the output terminal 502a, and a terminal 553 connected to the output terminal 502b. The switch 55 is composed of, for example, an SPDT type switch circuit.
　この接続構成において、スイッチ５５は、ＲＦＩＣ３からの制御信号に基づいて、端子５５１を端子５５２及び５５３に接続することができる。具体的には、制御信号ＣＴＬ１が受信された場合に、スイッチ５５は、ＭＴ５４を出力端子５０２ｂに接続せずに出力端子５０２ａに接続することができる。一方、制御信号ＣＴＬ２が受信された場合に、スイッチ５５は、ＭＴ５４を出力端子５０２ａに接続せずに出力端子５０２ｂに接続することができる。 In this connection configuration, the switch 55 can connect the terminal 551 to the terminals 552 and 553 based on the control signal from the RFIC3. Specifically, when the control signal CTL1 is received, the switch 55 can connect the MT 54 to the output terminal 502a without connecting it to the output terminal 502b. On the other hand, when the control signal CTL2 is received, the switch 55 can connect the MT54 to the output terminal 502b without connecting it to the output terminal 502a.
　これにより、ＭＴ５４は、制御信号ＣＴＬ１が受信された場合に、スイッチ５５を介して、電力増幅器１１ＢにＡＰＴモードで電源電圧ＶＡＰＴを供給することができる。また、ＭＴ５４は、制御信号ＣＴＬ２が受信された場合に、スイッチ５５を介して、電力増幅器１２ＢにＥＴモードで電源電圧ＶＥＴを供給することができる。 This allows the MT 54 to supply the power supply voltage VAPT in the APT mode to the power amplifier 11B via the switch 55 when the control signal CTL1 is received. Further, the MT 54 can supply the power supply voltage V ET to the power amplifier 12B in the ET mode via the switch 55 when the control signal CTL2 is received.
　なお、図６に示すトラッキング回路５０Ｂの回路構成は、例示であり、これに限定されない。例えば、スイッチ５５は、トラッキング回路５０Ｂに含まれなくてもよく、電力増幅回路１０Ｂに含まれてもよい。 Note that the circuit configuration of the tracking circuit 50B shown in FIG. 6 is an example, and is not limited to this. For example, switch 55 may not be included in tracking circuit 50B and may be included in power amplifier circuit 10B.
　［３．２　効果など］
　以上のように、本実施の形態に係る高周波回路１Ｂは、電力増幅回路１０Ｂと、電力増幅回路１０Ｂに接続されたトラッキング回路５０Ｂと、を備え、トラッキング回路５０Ｂは、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０ＢにＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０ＢにＥＴモードで電源電圧ＶＥＴを供給する。ここで、電力増幅回路１０Ｂは、第１パワークラスに対応する電力増幅器１１Ｂと、第２パワークラスに対応する電力増幅器１２Ｂと、を備え、トラッキング回路５０Ｂは、電力増幅器１１Ｂに接続される出力端子５０２ａと、電力増幅器１２Ｂに接続される出力端子５０２ｂと、ＥＴモードで電源電圧を供給可能、かつ、ＡＰＴモードで電源電圧を供給可能なＭＴ５４と、ＭＴ５４と出力端子５０２ａ及び５０２ｂとの間に接続されたスイッチ５５と、を備え、ＭＴ５４は、制御信号ＣＴＬ１が受信された場合に、スイッチ５５を介して電力増幅器１１ＢにＡＰＴモードで電源電圧ＶＡＰＴを供給し、制御信号ＣＴＬ２が受信された場合に、スイッチ５５を介して電力増幅器１２ＢにＥＴモードで電源電圧ＶＥＴを供給する。 [3.2 Effects, etc.]
As described above, the high-frequency circuit 1B according to the present embodiment includes the power amplifier circuit 10B and the tracking circuit 50B connected to the power amplifier circuit 10B. When the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10B is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected. When the control signal CTL2 shown is received, the power amplifier circuit 10B is supplied with the power supply voltage V ET in the ET mode. Here, the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class, and the tracking circuit 50B has an output terminal 502a connected to the power amplifier 11B. , an output terminal 502b connected to the power amplifier 12B, an MT54 capable of supplying power supply voltage in the ET mode and capable of supplying power supply voltage in the APT mode, and connected between the MT54 and the output terminals 502a and 502b a switch 55, the MT54 supplies the power amplifier 11B with the power supply voltage V APT in the APT mode via the switch 55 when the control signal CTL1 is received, and when the control signal CTL2 is received, Power amplifier 12B is supplied via switch 55 with power supply voltage V ET in the ET mode.
　これによれば、より高い最大出力電力で規定される第１パワークラスでは、電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴが供給され、より低い最大出力電力で規定される第２パワークラスでは、ＥＴモードで電源電圧ＶＥＴが供給される。したがって、実施の形態１に係る高周波回路１と同様の効果を奏することができる。 According to this, in the first power class defined with a higher maximum output power, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained.
　また、本実施の形態に係るトラッキング回路５０Ｂは、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０ＢにＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０ＢにＥＴモードで電源電圧ＶＥＴを供給する。ここで、電力増幅回路１０Ｂは、第１パワークラスに対応する電力増幅器１１Ｂと、第２パワークラスに対応する電力増幅器１２Ｂと、を備え、トラッキング回路５０Ｂは、電力増幅器１１Ｂに接続される出力端子５０２ａと、電力増幅器１２Ｂに接続される出力端子５０２ｂと、ＥＴモードで電源電圧を供給可能、かつ、ＡＰＴモードで電源電圧を供給可能なＭＴ５４と、ＭＴ５４と出力端子５０２ａ及び５０２ｂとの間に接続されたスイッチ５５と、を備え、ＭＴ５４は、制御信号ＣＴＬ１が受信された場合に、スイッチ５５を介して電力増幅器１１ＢにＡＰＴモードで電源電圧ＶＡＰＴを供給し、制御信号ＣＴＬ２が受信された場合に、スイッチ５５を介して電力増幅器１２ＢにＥＴモードで電源電圧ＶＥＴを供給する。 Further, the tracking circuit 50B according to the present embodiment supplies the power amplifier circuit 10B with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received. APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10B in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received. Here, the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class, and the tracking circuit 50B has an output terminal 502a connected to the power amplifier 11B. , an output terminal 502b connected to the power amplifier 12B, an MT54 capable of supplying power supply voltage in the ET mode and capable of supplying power supply voltage in the APT mode, and connected between the MT54 and the output terminals 502a and 502b a switch 55, the MT54 supplies the power amplifier 11B with the power supply voltage V APT in the APT mode via the switch 55 when the control signal CTL1 is received, and when the control signal CTL2 is received, Power amplifier 12B is supplied via switch 55 with power supply voltage V ET in the ET mode.
　これによれば、トラッキング回路５０Ｂは、上記高周波回路１Ｂと同様の効果を実現することができる。 According to this, the tracking circuit 50B can achieve the same effects as the high-frequency circuit 1B.
　また、本実施の形態に係る電力増幅回路１０Ｂは、所定最大電力以上の最大電力で規定される第１パワークラスに対応し、ＡＰＴモードが適用される電力増幅器１１Ｂと、所定最大電力未満の最大電力で規定される第２パワークラスに対応し、ＥＴモードが適用される電力増幅器１２Ｂと、を備える。 Further, the power amplifier circuit 10B according to the present embodiment corresponds to the first power class defined by the maximum power equal to or higher than the predetermined maximum power, and the power amplifier 11B to which the APT mode is applied and the power amplifier 11B to which the maximum power is less than the predetermined maximum power. and a power amplifier 12B that corresponds to the second power class defined in and to which the ET mode is applied.
　これによれば、電力増幅回路１０Ｂは、上記高周波回路１Ｂと同様の効果を実現することができる。 According to this, the power amplifier circuit 10B can achieve the same effects as the high-frequency circuit 1B.
　（実施の形態４）
　次に、実施の形態４について説明する。本実施の形態では、トラッキング回路が、ＭＴ５４及びスイッチ５５の代わりに、ＡＰＴ５１及びＥＴ５２を備える点が、上記実施の形態３と主として異なる。以下に、本実施の形態について上記実施の形態３と異なる点を中心に図７を参照しながら説明する。 (Embodiment 4)
Next, Embodiment 4 will be described. This embodiment differs from the above-described third embodiment mainly in that the tracking circuit includes APT 51 and ET 52 instead of MT 54 and switch 55 . The present embodiment will be described below with reference to FIG. 7, focusing on the differences from the third embodiment.
　なお、本実施の形態に係る通信装置５Ｃは、高周波回路１Ｂの代わりに高周波回路１Ｃを備える点を除いて、上記実施の形態３に係る通信装置５Ｂと同様である。さらに、本実施の形態に係る高周波回路１Ｃは、トラッキング回路５０Ｂの代わりにトラッキング回路５０Ｃを備える点を除いて、上記実施の形態３に係る高周波回路１Ｂと同様である。したがって、以下では、トラッキング回路５０Ｃについて説明し、他の回路等については説明を省略する。 Note that the communication device 5C according to the present embodiment is the same as the communication device 5B according to the third embodiment except that the high frequency circuit 1C is provided instead of the high frequency circuit 1B. Further, a high frequency circuit 1C according to the present embodiment is similar to the high frequency circuit 1B according to the third embodiment except that a tracking circuit 50C is provided instead of the tracking circuit 50B. Therefore, the tracking circuit 50C will be described below, and descriptions of other circuits and the like will be omitted.
　［４．１　トラッキング回路５０Ｃの回路構成］
　トラッキング回路５０Ｃは、トラッキング回路５０Ｂと同様に、制御信号ＣＴＬ１が受信された場合に電力増幅回路１０ＢにＡＰＴモードで電源電圧ＶＡＰＴを供給することができ、制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０ＢにＥＴモードで電源電圧ＶＥＴを供給することができる。トラッキング回路５０Ｃの回路構成について図７を参照しながら説明する。 [4.1 Circuit Configuration of Tracking Circuit 50C]
Similarly to the tracking circuit 50B, the tracking circuit 50C can supply the power amplifier circuit 10B with the power supply voltage VAPT in the APT mode when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10B can be supplied with the power supply voltage V ET in the ET mode. The circuit configuration of the tracking circuit 50C will be described with reference to FIG.
　図７は、本実施の形態に係る通信装置５Ｃの回路構成図である。通信装置５Ｃに含まれるトラッキング回路５０Ｃは、ＡＰＴ５１と、ＥＴ５２と、制御端子５０１と、出力端子５０２ａ及び５０２ｂと、を備える。 FIG. 7 is a circuit configuration diagram of a communication device 5C according to this embodiment. A tracking circuit 50C included in the communication device 5C includes an APT 51, an ET 52, a control terminal 501, and output terminals 502a and 502b.
　出力端子５０２ａは、電力増幅回路１０Ｂの電力増幅器１１ＢにＡＰＴモードで電源電圧ＶＡＰＴを供給するための端子である。出力端子５０２ａは、トラッキング回路５０Ｃの外部で電力増幅回路１０Ｂの電源電圧端子１０２ａに接続される。 The output terminal 502a is a terminal for supplying the power supply voltage VAPT in the APT mode to the power amplifier 11B of the power amplifier circuit 10B. The output terminal 502a is connected to the power supply voltage terminal 102a of the power amplifier circuit 10B outside the tracking circuit 50C.
　出力端子５０２ｂは、電力増幅回路１０Ｂの電力増幅器１２ＢにＥＴモードで電源電圧ＶＥＴを供給するための端子である。出力端子５０２ｂは、トラッキング回路５０Ｃの外部で電力増幅回路１０Ｂの電源電圧端子１０２ｂに接続される。 The output terminal 502b is a terminal for supplying the power supply voltage V ET in the ET mode to the power amplifier 12B of the power amplifier circuit 10B. The output terminal 502b is connected to the power supply voltage terminal 102b of the power amplifier circuit 10B outside the tracking circuit 50C.
　ＡＰＴ５１は、出力端子５０２ａに接続される。ＡＰＴ５１は、制御信号ＣＴＬ１が受信された場合に、出力端子５０２ａ及び電源電圧端子１０２ａを介して電力増幅器１１ＢにＡＰＴモードで電源電圧ＶＡＰＴを供給することができる。 APT 51 is connected to output terminal 502a. The APT 51 can supply the power supply voltage VAPT in the APT mode to the power amplifier 11B via the output terminal 502a and the power supply voltage terminal 102a when the control signal CTL1 is received.
　ＥＴ５２は、出力端子５０２ｂに接続される。ＥＴ５２は、制御信号ＣＴＬ２が受信された場合に、出力端子５０２ｂ及び電源電圧端子１０２ｂを介して電力増幅器１２ＢにＥＴモードで電源電圧ＶＥＴを供給することができる。 ET52 is connected to output terminal 502b. ET 52 can supply power supply voltage V ET in ET mode to power amplifier 12B via output terminal 502b and power supply voltage terminal 102b when control signal CTL2 is received.
　［４．２　効果など］
　以上のように、本実施の形態に係る高周波回路１Ｃは、電力増幅回路１０Ｂと、電力増幅回路１０Ｂに接続されたトラッキング回路５０Ｃと、を備え、トラッキング回路５０Ｃは、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０ＢにＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０ＢにＥＴモードで電源電圧ＶＥＴを供給する。ここで、電力増幅回路１０Ｂは、第１パワークラスに対応する電力増幅器１１Ｂと、第２パワークラスに対応する電力増幅器１２Ｂと、を備え、トラッキング回路５０Ｃは、電力増幅器１１Ｂに接続され、ＡＰＴモードで電源電圧ＶＡＰＴを供給可能なＡＰＴ５１と、電力増幅器１２Ｂに接続され、ＥＴモードで電源電圧ＶＥＴを供給可能なＥＴ５２と、を備える。 [4.2 Effects, etc.]
As described above, the high-frequency circuit 1C according to the present embodiment includes the power amplifier circuit 10B and the tracking circuit 50C connected to the power amplifier circuit 10B. When the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10B is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected. When the control signal CTL2 shown is received, the power amplifier circuit 10B is supplied with the power supply voltage V ET in the ET mode. Here, the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class. It comprises an APT 51 capable of supplying a voltage VAPT , and an ET 52 connected to the power amplifier 12B and capable of supplying a power supply voltage V ET in the ET mode.
　これによれば、より高い最大出力電力で規定される第１パワークラスでは、電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴが供給され、より低い最大出力電力で規定される第２パワークラスでは、ＥＴモードで電源電圧ＶＥＴが供給される。したがって、実施の形態１に係る高周波回路１と同様の効果を奏することができる。さらに、ＡＰＴ５１が電力増幅器１１Ｂに接続され、ＥＴ５２が電力増幅器１２Ｂに接続されるので、スイッチ等による切り替えが不要となり、トラッキング回路５０Ｃの回路構成を簡略化することができる。 According to this, in the first power class defined with a higher maximum output power, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Furthermore, since the APT 51 is connected to the power amplifier 11B and the ET 52 is connected to the power amplifier 12B, switching by a switch or the like becomes unnecessary, and the circuit configuration of the tracking circuit 50C can be simplified.
　また、本実施の形態に係るトラッキング回路５０Ｃは、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０ＢにＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０ＢにＥＴモードで電源電圧ＶＥＴを供給する。ここで、電力増幅回路１０Ｂは、第１パワークラスに対応する電力増幅器１１Ｂと、第２パワークラスに対応する電力増幅器１２Ｂと、を備え、トラッキング回路５０Ｃは、電力増幅器１１Ｂに接続され、ＡＰＴモードで電源電圧ＶＡＰＴを供給可能なＡＰＴ５１と、電力増幅器１２Ｂに接続され、ＥＴモードで電源電圧ＶＥＴを供給可能なＥＴ５２と、を備える。 Further, the tracking circuit 50C according to the present embodiment supplies the power amplifier circuit 10B with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received. APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10B in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received. Here, the power amplifier circuit 10B includes a power amplifier 11B corresponding to the first power class and a power amplifier 12B corresponding to the second power class. It comprises an APT 51 capable of supplying a voltage VAPT , and an ET 52 connected to the power amplifier 12B and capable of supplying a power supply voltage V ET in the ET mode.
　これによれば、トラッキング回路５０Ｃは、上記高周波回路１Ｃと同様の効果を実現することができる。 According to this, the tracking circuit 50C can achieve the same effects as the high-frequency circuit 1C.
　（実施の形態５）
　次に、実施の形態５について説明する。本実施の形態では、２つの電力増幅器を用いることで第１パワークラスの高周波信号を出力可能な点が、上記実施の形態１と主として異なる。以下に、本実施の形態について上記実施の形態１と異なる点を中心に図８～図１０を参照しながら説明する。 (Embodiment 5)
Next, Embodiment 5 will be described. The present embodiment is different from the first embodiment mainly in that a high frequency signal of the first power class can be output by using two power amplifiers. The present embodiment will be described below with reference to FIGS. 8 to 10, focusing on the differences from the first embodiment.
　なお、本実施の形態に係る通信装置５Ｄは、高周波回路１の代わりに高周波回路１Ｄを備える点を除いて、上記実施の形態１に係る通信装置５と同様である。さらに、本実施の形態に係る高周波回路１Ｄは、電力増幅回路１０及びトラッキング回路５０の代わりに電力増幅回路１０Ｄ及びトラッキング回路５０Ｄを備える点を除いて、上記実施の形態１に係る高周波回路１と同様である。したがって、以下では、電力増幅回路１０Ｄ及びトラッキング回路５０Ｄについて説明し、他の回路等については説明を省略する。 A communication device 5D according to the present embodiment is the same as the communication device 5 according to the first embodiment except that a high frequency circuit 1D is provided instead of the high frequency circuit 1. Further, the high-frequency circuit 1D according to the present embodiment is similar to the high-frequency circuit 1 according to the first embodiment, except that a power amplifier circuit 10D and a tracking circuit 50D are provided instead of the power amplifier circuit 10 and the tracking circuit 50. It is the same. Therefore, the power amplifier circuit 10D and the tracking circuit 50D will be described below, and descriptions of other circuits and the like will be omitted.
　［５．１　回路構成］
　［５．１．１　電力増幅回路１０Ｄの回路構成］
　電力増幅回路１０Ｄは、トラッキング回路５０Ｄに接続され、トラッキング回路５０Ｄから電源電圧の供給を受けることができる。電力増幅回路１０Ｄの回路構成について図８を参照しながら説明する。 [5.1 Circuit configuration]
[5.1.1 Circuit Configuration of Power Amplifier Circuit 10D]
The power amplifier circuit 10D is connected to the tracking circuit 50D and can receive power supply voltage from the tracking circuit 50D. A circuit configuration of the power amplifier circuit 10D will be described with reference to FIG.
　図８は、本実施の形態に係る通信装置５Ｄの回路構成図である。通信装置５Ｄに含まれる電力増幅回路１０Ｄは、電力増幅器１１Ｄ及び１２Ｄと、合成器１４と、フィルタ２１と、入力端子１０１ａ及び１０１ｂと、電源電圧端子１０２ａ及び１０２ｂと、出力端子１０３と、を備える。 FIG. 8 is a circuit configuration diagram of a communication device 5D according to this embodiment. A power amplifier circuit 10D included in the communication device 5D includes power amplifiers 11D and 12D, a combiner 14, a filter 21, input terminals 101a and 101b, power supply voltage terminals 102a and 102b, and an output terminal 103. .
　入力端子１０１ａ及び１０１ｂの各々は、高周波回路１Ｄの外部からバンドＡの高周波送信信号を受けるための端子である。入力端子１０１ａ及び１０１ｂの各々は、高周波回路１Ｄの外部でＲＦＩＣ３に接続される。 Each of the input terminals 101a and 101b is a terminal for receiving a high frequency transmission signal of band A from the outside of the high frequency circuit 1D. Each of the input terminals 101a and 101b is connected to the RFIC 3 outside the high frequency circuit 1D.
　電源電圧端子１０２ａは、トラッキング回路５０Ｄから電源電圧ＶＡＰＴ／ＶＥＴを受けるための端子である。電源電圧端子１０２ａは、電力増幅回路１０Ｄの外部でトラッキング回路５０Ｄの出力端子５０２ａに接続される。 The power supply voltage terminal 102a is a terminal for receiving the power supply voltage V APT /V ET from the tracking circuit 50D. The power supply voltage terminal 102a is connected to the output terminal 502a of the tracking circuit 50D outside the power amplifier circuit 10D.
　電源電圧端子１０２ｂは、トラッキング回路５０Ｄから電源電圧ＶＡＰＴを受けるための端子である。電源電圧端子１０２ｂは、電力増幅回路１０Ｄの外部でトラッキング回路５０Ｄの出力端子５０２ｂに接続される。 The power supply voltage terminal 102b is a terminal for receiving the power supply voltage VAPT from the tracking circuit 50D. The power supply voltage terminal 102b is connected to the output terminal 502b of the tracking circuit 50D outside the power amplifier circuit 10D.
　出力端子１０３は、高周波回路１Ｄの外部に高周波送信信号を供給するための端子である。出力端子１０３は、高周波回路１Ｄの外部でアンテナ２に接続される。 The output terminal 103 is a terminal for supplying a high frequency transmission signal to the outside of the high frequency circuit 1D. The output terminal 103 is connected to the antenna 2 outside the high frequency circuit 1D.
　電力増幅器１１Ｄは、第１電力増幅器の一例であり、入力端子１０１ａと合成器１４との間に接続され、かつ、電源電圧端子１０２ａに接続される。具体的には、電力増幅器１１Ｄの入力端は入力端子１０１ａに接続され、電力増幅器１１Ｄの出力端は合成器１４及び電源電圧端子１０２ａに接続される。電力増幅器１１Ｄは、第２パワークラスに対応している。つまり、電力増幅器１１Ｄは、第２パワークラスの最大出力電力を満たす電力まで高周波信号を増幅することができる。 The power amplifier 11D is an example of a first power amplifier, is connected between the input terminal 101a and the combiner 14, and is connected to the power supply voltage terminal 102a. Specifically, the input terminal of the power amplifier 11D is connected to the input terminal 101a, and the output terminal of the power amplifier 11D is connected to the combiner 14 and the power supply voltage terminal 102a. The power amplifier 11D corresponds to the second power class. In other words, the power amplifier 11D can amplify the high frequency signal to the power that satisfies the maximum output power of the second power class.
　電力増幅器１２Ｄは、第２電力増幅器の一例であり、入力端子１０１ｂと合成器１４との間に接続され、かつ、電源電圧端子１０２ｂに接続される。具体的には、電力増幅器１２Ｄの入力端は入力端子１０１ｂに接続され、電力増幅器１２Ｄの出力端は合成器１４及び電源電圧端子１０２ｂに接続される。電力増幅器１２Ｄは、第２パワークラスに対応している。つまり、電力増幅器１２Ｄは、第２パワークラスの最大出力電力を満たす電力まで高周波信号を増幅することができる。 The power amplifier 12D is an example of a second power amplifier, connected between the input terminal 101b and the combiner 14, and connected to the power supply voltage terminal 102b. Specifically, the input terminal of the power amplifier 12D is connected to the input terminal 101b, and the output terminal of the power amplifier 12D is connected to the combiner 14 and the power supply voltage terminal 102b. The power amplifier 12D corresponds to the second power class. In other words, the power amplifier 12D can amplify the high frequency signal to the power that satisfies the maximum output power of the second power class.
　合成器１４は、電力増幅器１１Ｄ及び１２Ｄとフィルタ２１との間に接続される。具体的には、合成器１４は、電力増幅器１１Ｄの出力端に接続された入力端子１４１と、電力増幅器１２Ｄの出力端に接続された入力端子１４２と、フィルタ２１に接続された出力端子１４３と、を備える。なお、合成器１４は、例えば、トランスフォーマで構成されるが、これに限定されない。 The combiner 14 is connected between the power amplifiers 11D and 12D and the filter 21. Specifically, the combiner 14 has an input terminal 141 connected to the output terminal of the power amplifier 11D, an input terminal 142 connected to the output terminal of the power amplifier 12D, and an output terminal 143 connected to the filter 21. , provided. Note that the synthesizer 14 is configured by, for example, a transformer, but is not limited to this.
　この接続構成において、合成器１４は、入力端子１４１及び１４２を介して入力された２つの高周波信号を１つの高周波信号に合成し、出力端子１４３を介して出力することができる。 In this connection configuration, the synthesizer 14 can synthesize two high frequency signals input via the input terminals 141 and 142 into one high frequency signal and output it via the output terminal 143 .
　フィルタ２１は、合成器１４と出力端子１０３との間に接続される。具体的には、フィルタ２１の一端は合成器１４の出力端子１４３に接続され、フィルタ２１の他端は出力端子１０３に接続される。フィルタ２１は、バンドＡを含む通過帯域を有し、第１パワークラスに対応する耐電力性を有する。フィルタ２１は、ＳＡＷフィルタ、ＢＡＷフィルタ、ＬＣ共振フィルタ、及び誘電体共振フィルタのいずれを用いて構成されてもよく、さらには、これらには限定されない。 The filter 21 is connected between the synthesizer 14 and the output terminal 103 . Specifically, one end of the filter 21 is connected to the output terminal 143 of the combiner 14 and the other end of the filter 21 is connected to the output terminal 103 . The filter 21 has a passband including band A and has a power handling capability corresponding to the first power class. The filter 21 may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
　以上の構成により、電力増幅回路１０Ｄでは、２つの第２パワークラスに対応する電力増幅器１１Ｄ及び１２Ｄを用いて、第１パワークラスの高周波信号を出力することができる。また、電力増幅回路１０Ｄでは、２つの第２パワークラスに対応する電力増幅器１１Ｄ及び１２Ｄの一方のみを用いて、第２パワークラスの高周波信号を出力することができる。 With the above configuration, the power amplifier circuit 10D can output a high-frequency signal of the first power class using the two power amplifiers 11D and 12D corresponding to the second power class. Also, in the power amplifier circuit 10D, only one of the two power amplifiers 11D and 12D corresponding to the second power class can be used to output a high frequency signal of the second power class.
　なお、図８に示す電力増幅回路１０Ｄの回路構成は、例示であり、これに限定されない。例えば、電力増幅回路１０Ｄは、フィルタ２１の代わりに、第２パワークラスに対応する２つのフィルタを備えてもよい。この場合、２つのフィルタの一方は電力増幅器１１Ｄと合成器１４との間に接続され、２つのフィルタの他方は電力増幅器１２Ｄと合成器１４との間に接続されればよい。また例えば、電力増幅回路１０Ｄは、さらに、分配器を備えてもよい。この場合、分配器は、入力端子１０１ａ及び１０１ｂの一方と電力増幅器１１Ｄ及び１２Ｄとの間に接続されればよい。また例えば、電力増幅回路１０Ｄは、任意の２つの回路素子（例えば合成器１４及びフィルタ２１など）の間に接続されたインピーダンス整合回路を備えてもよい。また例えば、電力増幅回路１０Ｄは、フィルタ２１を備えなくてもよい。 Note that the circuit configuration of the power amplifier circuit 10D shown in FIG. 8 is an example, and is not limited to this. For example, the power amplifier circuit 10D may include two filters corresponding to the second power class instead of the filter 21. FIG. In this case, one of the two filters should be connected between power amplifier 11D and combiner 14, and the other of the two filters should be connected between power amplifier 12D and combiner . Further, for example, the power amplifier circuit 10D may further include a distributor. In this case, the distributor may be connected between one of the input terminals 101a and 101b and the power amplifiers 11D and 12D. Also, for example, the power amplifier circuit 10D may include an impedance matching circuit connected between any two circuit elements (for example, the combiner 14 and the filter 21, etc.). Further, for example, the power amplifier circuit 10D does not have to include the filter 21 .
　［５．１．２　トラッキング回路５０Ｄの回路構成］
　トラッキング回路５０Ｄは、トラッキング回路５０と同様に、制御信号ＣＴＬ１が受信された場合に電力増幅回路１０ＤにＡＰＴモードで電源電圧ＶＡＰＴを供給することができ、制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０ＤにＥＴモードで電源電圧ＶＥＴを供給することができる。トラッキング回路５０Ｄの回路構成について図８を参照しながら説明する。 [5.1.2 Circuit Configuration of Tracking Circuit 50D]
Similarly to the tracking circuit 50, the tracking circuit 50D can supply the power amplifier circuit 10D with the power supply voltage VAPT in the APT mode when the control signal CTL1 is received, and when the control signal CTL2 is received, The power amplifier circuit 10D can be supplied with the power supply voltage VET in the ET mode. The circuit configuration of the tracking circuit 50D will be described with reference to FIG.
　図８に示すように、トラッキング回路５０Ｄは、ＡＰＴ５１及び５６と、ＥＴ５２と、スイッチ５３と、制御端子５０１と、出力端子５０２ａ及び５０２ｂと、を備える。 As shown in FIG. 8, the tracking circuit 50D includes APTs 51 and 56, an ET 52, a switch 53, a control terminal 501, and output terminals 502a and 502b.
　出力端子５０２ａは、電力増幅回路１０Ｄの電力増幅器１１Ｄに電源電圧ＶＡＰＴ／ＶＥＴを供給するための端子である。出力端子５０２ａは、トラッキング回路５０Ｄの外部で電力増幅回路１０Ｄの電源電圧端子１０２ａに接続される。 The output terminal 502a is a terminal for supplying the power supply voltage V APT /V ET to the power amplifier 11D of the power amplifier circuit 10D. The output terminal 502a is connected to the power supply voltage terminal 102a of the power amplifier circuit 10D outside the tracking circuit 50D.
　出力端子５０２ｂは、電力増幅回路１０Ｄの電力増幅器１２ＤにＡＰＴモードで電源電圧ＶＡＰＴを供給するための端子である。出力端子５０２ｂは、トラッキング回路５０Ｄの外部で電力増幅回路１０Ｄの電源電圧端子１０２ｂに接続される。 The output terminal 502b is a terminal for supplying the power supply voltage VAPT in the APT mode to the power amplifier 12D of the power amplifier circuit 10D. The output terminal 502b is connected to the power supply voltage terminal 102b of the power amplifier circuit 10D outside the tracking circuit 50D.
　ＡＰＴ５１、ＥＴ５２及びスイッチ５３は、実施の形態１と同様であるので、説明を省略する。ＡＰＴ５６は、出力端子５０２ｂに接続される。ＡＰＴ５６は、制御信号ＣＴＬ１が受信された場合に、出力端子５０２ｂ及び電源電圧端子１０２ｂを介して電力増幅器１２ＤにＡＰＴモードで電源電圧ＶＡＰＴを供給することができる。 The APT 51, ET 52 and switch 53 are the same as those in the first embodiment, so their description is omitted. APT 56 is connected to output terminal 502b. APT 56 can supply power supply voltage VAPT in APT mode to power amplifier 12D via output terminal 502b and power supply voltage terminal 102b when control signal CTL1 is received.
　以上の構成により、トラッキング回路５０Ｄは、制御信号ＣＴＬ１が受信された場合に出力端子５０２ａ及び５０２ｂの両方からＡＰＴモードで電源電圧ＶＡＰＴを供給することができ、制御信号ＣＴＬ２が受信された場合に出力端子５０２ａからＥＴモードで電源電圧ＶＥＴを供給することができる。 With the above configuration, the tracking circuit 50D can supply the power supply voltage VAPT in the APT mode from both the output terminals 502a and 502b when the control signal CTL1 is received, and when the control signal CTL2 is received. The power supply voltage V ET can be supplied from the output terminal 502a in the ET mode.
　なお、図８に示すトラッキング回路５０Ｄの回路構成は、例示であり、これに限定されない。例えば、ＡＰＴ５１、ＥＴ５２及びスイッチ５３は、ＭＴ５４に置き換えられてもよい。また、スイッチ５３は、トラッキング回路５０Ｄに含まれなくてもよく、電力増幅回路１０Ｄに含まれてもよい。 Note that the circuit configuration of the tracking circuit 50D shown in FIG. 8 is an example, and is not limited to this. For example, APT51, ET52 and switch 53 may be replaced with MT54. Moreover, the switch 53 may not be included in the tracking circuit 50D, and may be included in the power amplifier circuit 10D.
　［５．２　各パワークラスの高周波信号の伝送状態］
　次に、本実施の形態に係る通信装置５Ｄの各パワークラスの高周波信号の伝送状態の具体例について図９及び図１０を参照しながら説明する。図９は、本実施の形態に係る通信装置５Ｄにおいて第１パワークラスの高周波信号の伝送状態を示す図である。図１０は、本実施の形態に係る通信装置５Ｄにおいて第２パワークラスの高周波信号の伝送状態を示す図である。 [5.2 Transmission state of high-frequency signals in each power class]
Next, a specific example of the transmission state of high-frequency signals in each power class of the communication device 5D according to the present embodiment will be described with reference to FIGS. 9 and 10. FIG. FIG. 9 is a diagram showing a transmission state of a high-frequency signal of the first power class in communication device 5D according to the present embodiment. FIG. 10 is a diagram showing a transmission state of a high-frequency signal of the second power class in communication device 5D according to the present embodiment.
　第１パワークラスの高周波信号ＲＦＡＨが送信される場合、図９に示すように、ＲＦＩＣ３からトラッキング回路５０Ｄに制御信号ＣＴＬ１が送信される。その結果、トラッキング回路５０Ｄのスイッチ５３は、ＡＰＴ５１を出力端子５０２ａに接続する。これにより、ＡＰＴ５１から電力増幅器１１ＤにＡＰＴモードで電源電圧ＶＡＰＴが供給される。さらに、ＡＰＴ５６から電力増幅器１２ＤにＡＰＴモードで電源電圧ＶＡＰＴが供給される。このとき、電力増幅回路１０Ｄは、ＲＦＩＣ３から入力端子１０１ａ及び１０１ｂを介して２つのバンドＡの高周波信号を受信する。受信された２つの高周波信号は、電源電圧ＶＡＰＴを用いて電力増幅器１１Ｄ及び１２Ｄでそれぞれ増幅され、合成器１４で合成される。合成された高周波信号は、フィルタ２１及び出力端子１０３を介してアンテナ２に伝送される。これにより、第１パワークラスの高周波信号ＲＦＡＨが通信装置５Ｄから送信される。 When the high frequency signal RF AH of the first power class is transmitted, as shown in FIG. 9, the control signal CTL1 is transmitted from the RFIC 3 to the tracking circuit 50D. As a result, the switch 53 of the tracking circuit 50D connects the APT 51 to the output terminal 502a. As a result, the power supply voltage VAPT is supplied from the APT 51 to the power amplifier 11D in the APT mode. Further, the power supply voltage VAPT is supplied from the APT 56 to the power amplifier 12D in the APT mode. At this time, the power amplifier circuit 10D receives two band A high frequency signals from the RFIC 3 via the input terminals 101a and 101b. The two received high-frequency signals are amplified by power amplifiers 11D and 12D using power supply voltage VAPT , and combined by combiner . The synthesized high frequency signal is transmitted to the antenna 2 via the filter 21 and the output terminal 103 . As a result, the radio frequency signal RF AH of the first power class is transmitted from the communication device 5D.
　第２パワークラスの高周波信号ＲＦＡＬが送信される場合、図１０に示すように、ＲＦＩＣ３からトラッキング回路５０Ｄに制御信号ＣＴＬ２が送信される。その結果、トラッキング回路５０Ｄのスイッチ５３は、ＥＴ５２を出力端子５０２ａに接続する。これにより、トラッキング回路５０Ｄから電力増幅器１１ＤにＥＴモードで電源電圧ＶＥＴが供給される。このとき、電力増幅回路１０Ｄは、入力端子１０１ａを介してＲＦＩＣ３からバンドＡの高周波信号を受信する。受信された高周波信号は、電源電圧ＶＥＴを用いて電力増幅器１１Ｄで増幅され、合成器１４、フィルタ２１及び出力端子１０３を介してアンテナ２に伝送される。これにより、第２パワークラスの高周波信号ＲＦＡＬが通信装置５Ｄから送信される。 When the high frequency signal RF AL of the second power class is transmitted, as shown in FIG. 10, the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50D. As a result, switch 53 of tracking circuit 50D connects ET 52 to output terminal 502a. As a result, the power supply voltage V ET is supplied from the tracking circuit 50D to the power amplifier 11D in the ET mode. At this time, the power amplifier circuit 10D receives the high frequency signal of band A from the RFIC 3 via the input terminal 101a. The received high-frequency signal is amplified by the power amplifier 11D using the power supply voltage VET and transmitted to the antenna 2 via the synthesizer 14, the filter 21 and the output terminal 103. FIG. Thereby, the radio frequency signal RF AL of the second power class is transmitted from the communication device 5D.
　［５．３　効果など］
　以上のように、本実施の形態に係る高周波回路１Ｄは、電力増幅回路１０Ｄと、電力増幅回路１０Ｄに接続されたトラッキング回路５０Ｄと、を備え、トラッキング回路５０Ｄは、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０ＤにＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０ＤにＥＴモードで電源電圧ＶＥＴを供給する。ここで、電力増幅回路１０Ｄは、第２パワークラスに対応する電力増幅器１１Ｄと、第２パワークラスに対応する電力増幅器１２Ｄと、電力増幅器１１Ｄの出力端及び電力増幅器１２Ｄの出力端に接続された合成器１４と、を備え、トラッキング回路５０Ｄは、制御信号ＣＴＬ１が受信された場合に、電力増幅器１１Ｄ及び電力増幅器１２Ｄの各々にＡＰＴモードで電源電圧ＶＡＰＴを供給し、制御信号ＣＴＬ２が受信された場合に、電力増幅器１１Ｄ及び１２Ｄのうちの一方のみにＥＴモードで電源電圧ＶＥＴを供給する。 [5.3 Effects, etc.]
As described above, the high-frequency circuit 1D according to the present embodiment includes the power amplifier circuit 10D and the tracking circuit 50D connected to the power amplifier circuit 10D. When the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10D is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected. When the control signal CTL2 shown is received, the power amplifier circuit 10D is supplied with the power supply voltage VET in the ET mode. Here, the power amplifier circuit 10D includes a power amplifier 11D corresponding to the second power class, a power amplifier 12D corresponding to the second power class, and a combiner connected to the output terminal of the power amplifier 11D and the output terminal of the power amplifier 12D. 14, the tracking circuit 50D supplies the power supply voltage VAPT in the APT mode to each of the power amplifiers 11D and 12D when the control signal CTL1 is received, and when the control signal CTL2 is received. In the ET mode, only one of the power amplifiers 11D and 12D is supplied with the supply voltage V ET .
　これによれば、より高い最大出力電力で規定される第１パワークラスでは、電力増幅回路１０ＤにＡＰＴモードで電源電圧ＶＡＰＴが供給され、より低い最大出力電力で規定される第２パワークラスでは、ＥＴモードで電源電圧ＶＥＴが供給される。したがって、実施の形態１に係る高周波回路１と同様の効果を奏することができる。さらに、２つの第２パワークラスに対応する電力増幅器１１Ｄ及び１２Ｄを用いて、第１パワークラスの高周波信号が送信される。したがって、第１パワークラスに対応する電力増幅器が不要となり、高周波回路１Ｄの実装コストの削減を図ることができる。 According to this, in the first power class defined with a higher maximum output power, the power amplifier circuit 10D is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the ET A power supply voltage V ET is supplied in mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Further, high-frequency signals of the first power class are transmitted using two power amplifiers 11D and 12D corresponding to the second power class. Therefore, a power amplifier corresponding to the first power class becomes unnecessary, and the mounting cost of the high frequency circuit 1D can be reduced.
　また、本実施の形態に係るトラッキング回路５０Ｄは、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０ＤにＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０ＤにＥＴモードで電源電圧ＶＥＴを供給する。ここで、電力増幅回路１０Ｄは、第２パワークラスに対応する電力増幅器１１Ｄと、第２パワークラスに対応する電力増幅器１２Ｄと、電力増幅器１１Ｄの出力端及び電力増幅器１２Ｄの出力端に接続された合成器１４と、を備え、トラッキング回路５０Ｄは、制御信号ＣＴＬ１が受信された場合に、電力増幅器１１Ｄ及び電力増幅器１２Ｄの各々にＡＰＴモードで電源電圧ＶＡＰＴを供給し、制御信号ＣＴＬ２が受信された場合に、電力増幅器１１Ｄ及び１２Ｄのうちの一方のみにＥＴモードで電源電圧ＶＥＴを供給する。 Further, the tracking circuit 50D according to the present embodiment supplies the power amplifier circuit 10D with the power supply voltage V in the APT mode when the control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received. APT is supplied, and the power supply voltage V ET is supplied to the power amplifier circuit 10D in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received. Here, the power amplifier circuit 10D includes a power amplifier 11D corresponding to the second power class, a power amplifier 12D corresponding to the second power class, and a combiner connected to the output terminal of the power amplifier 11D and the output terminal of the power amplifier 12D. 14, the tracking circuit 50D supplies the power supply voltage VAPT in the APT mode to each of the power amplifiers 11D and 12D when the control signal CTL1 is received, and when the control signal CTL2 is received. In the ET mode, only one of the power amplifiers 11D and 12D is supplied with the supply voltage V ET .
　これによれば、トラッキング回路５０Ｄは、上記高周波回路１Ｄと同様の効果を実現することができる。 According to this, the tracking circuit 50D can achieve the same effects as the high-frequency circuit 1D.
　（実施の形態６）
　次に、実施の形態６について説明する。本実施の形態では、高周波回路が同時送信可能な２つのバンドに対応している点が、上記実施の形態１と主として異なる。以下に、本実施の形態について上記実施の形態１と異なる点を中心に図１１～図１４を参照しながら説明する。 (Embodiment 6)
Next, Embodiment 6 will be described. The present embodiment is different from the first embodiment mainly in that the high-frequency circuit supports two bands capable of simultaneous transmission. The present embodiment will be described below with reference to FIGS. 11 to 14, focusing on the differences from the first embodiment.
　なお、本実施の形態に係る通信装置５Ｅは、高周波回路１の代わりに高周波回路１Ｅを備える点を除いて、上記実施の形態１に係る通信装置５と同様である。さらに、本実施の形態に係る高周波回路１Ｅは、電力増幅回路１０及びトラッキング回路５０の代わりに電力増幅回路１０Ｅ及びトラッキング回路５０Ｅを備える点を除いて、上記実施の形態１に係る高周波回路１と同様である。したがって、以下では、電力増幅回路１０Ｅ及びトラッキング回路５０Ｅについて説明し、他の回路等については説明を省略する。 A communication device 5E according to the present embodiment is the same as the communication device 5 according to the first embodiment, except that a high frequency circuit 1E is provided instead of the high frequency circuit 1. Further, the high-frequency circuit 1E according to the present embodiment is similar to the high-frequency circuit 1 according to the first embodiment except that a power amplifier circuit 10E and a tracking circuit 50E are provided instead of the power amplifier circuit 10 and the tracking circuit 50. It is the same. Therefore, the power amplifier circuit 10E and the tracking circuit 50E will be described below, and descriptions of other circuits and the like will be omitted.
　［６．１　回路構成］
　［６．１．１　電力増幅回路１０Ｅの回路構成］
　電力増幅回路１０Ｅは、トラッキング回路５０Ｅに接続され、トラッキング回路５０Ｅから電源電圧の供給を受けることができる。電力増幅回路１０Ｅの回路構成について図６を参照しながら説明する。 [6.1 Circuit configuration]
[6.1.1 Circuit Configuration of Power Amplifier Circuit 10E]
The power amplifier circuit 10E is connected to the tracking circuit 50E and can receive power supply voltage from the tracking circuit 50E. A circuit configuration of the power amplifier circuit 10E will be described with reference to FIG.
　図６は、本実施の形態に係る通信装置５Ｅの回路構成図である。通信装置５Ｅに含まれる電力増幅回路１０Ｅは、電力増幅器１１及び１３と、フィルタ２１及び２３と、入力端子１０１ａ及び１０１ｂと、電源電圧端子１０２と、出力端子１０３ａ及び１０３ｂと、を備える。 FIG. 6 is a circuit configuration diagram of communication device 5E according to the present embodiment. A power amplifier circuit 10E included in the communication device 5E includes power amplifiers 11 and 13, filters 21 and 23, input terminals 101a and 101b, a power supply voltage terminal 102, and output terminals 103a and 103b.
　入力端子１０１ａは、高周波回路１Ｅの外部からバンドＡの高周波送信信号を受けるための端子である。入力端子１０１ｂは、高周波回路１Ｅの外部からバンドＢの高周波送信信号を受けるための端子である。入力端子１０１ａ及び１０１ｂの各々は、高周波回路１Ｅの外部でＲＦＩＣ３に接続される。 The input terminal 101a is a terminal for receiving a high frequency transmission signal of band A from the outside of the high frequency circuit 1E. The input terminal 101b is a terminal for receiving a high frequency transmission signal of band B from the outside of the high frequency circuit 1E. Each of the input terminals 101a and 101b is connected to the RFIC 3 outside the high frequency circuit 1E.
　電源電圧端子１０２は、トラッキング回路５０Ｅから電源電圧を受けるための端子である。電源電圧端子１０２は、電力増幅回路１０Ｅの外部でトラッキング回路５０Ｅの出力端子５０２に接続される。 The power supply voltage terminal 102 is a terminal for receiving the power supply voltage from the tracking circuit 50E. The power supply voltage terminal 102 is connected to the output terminal 502 of the tracking circuit 50E outside the power amplifier circuit 10E.
　出力端子１０３ａは、高周波回路１Ｅの外部にバンドＡの高周波送信信号を供給するための端子である。出力端子１０３ｂは、高周波回路１Ｅの外部にバンドＢの高周波送信信号を供給するための端子である。出力端子１０３ａ及び１０３ｂは、高周波回路１Ｅの外部でアンテナ２ａ及び２ｂにそれぞれ接続される。 The output terminal 103a is a terminal for supplying a high-frequency transmission signal of band A to the outside of the high-frequency circuit 1E. The output terminal 103b is a terminal for supplying a high frequency transmission signal of band B to the outside of the high frequency circuit 1E. Output terminals 103a and 103b are connected to antennas 2a and 2b, respectively, outside the high-frequency circuit 1E.
　電力増幅器１１は、第１電力増幅器の一例であり、入力端子１０１ａとフィルタ２１との間に接続され、かつ、電源電圧端子１０２に接続される。具体的には、電力増幅器１１の入力端は入力端子１０１ａに接続され、電力増幅器１１の出力端はフィルタ２１及び電源電圧端子１０２に接続される。電力増幅器１１は、第１パワークラス及び第２パワークラスに対応しており、バンドＡの送信信号を増幅可能である。 The power amplifier 11 is an example of a first power amplifier, is connected between the input terminal 101a and the filter 21, and is connected to the power supply voltage terminal 102. Specifically, the input terminal of the power amplifier 11 is connected to the input terminal 101 a , and the output terminal of the power amplifier 11 is connected to the filter 21 and the power supply voltage terminal 102 . The power amplifier 11 supports the first power class and the second power class, and can amplify the transmission signal of band A.
　電力増幅器１３は、第２電力増幅器の一例であり、入力端子１０１ｂとフィルタ２３との間に接続される。具体的には、電力増幅器１３の入力端は入力端子１０１ｂに接続され、電力増幅器１３の出力端はフィルタ２３に接続される。電力増幅器１３は、バンドＢの送信信号を増幅可能である。なお、電力増幅器１３に供給される電源電圧は、特に限定されず、例えば、ＥＴモードに基づく電源電圧であってもよく、どのような電源電圧であってもよい。したがって、図１１において、電力増幅器１３への電源電圧の供給経路の記載は省略されている。 The power amplifier 13 is an example of a second power amplifier and is connected between the input terminal 101b and the filter 23. Specifically, the input terminal of the power amplifier 13 is connected to the input terminal 101 b and the output terminal of the power amplifier 13 is connected to the filter 23 . The power amplifier 13 can amplify the band B transmission signal. The power supply voltage supplied to the power amplifier 13 is not particularly limited, and may be, for example, the power supply voltage based on the ET mode or any power supply voltage. Therefore, in FIG. 11, the illustration of the supply path of the power supply voltage to the power amplifier 13 is omitted.
　バンドＢは、バンドＡと同様に、ＲＡＴを用いて構築される通信システムのための周波数バンドである。バンドＡ及びＢは、同時送信可能なバンドの組み合わせである。例えば、バンドＡ及びＢは、ＣＡ（Carrier Aggregation）のためのバンドの組み合わせである。また例えば、バンドＡ及びＢは、ＥＮ－ＤＣ（E-UTRAN New Radio - Dual Connectivity）又はＮＲ－ＤＣ（New Radio-New Radio Dual Connectivity）のためのバンドの組み合わせであってもよい。 Band B, like band A, is a frequency band for communication systems built using RAT. Bands A and B are a combination of bands that can be transmitted simultaneously. For example, bands A and B are a combination of bands for CA (Carrier Aggregation). Also for example, bands A and B may be a combination of bands for EN-DC (E-UTRAN New Radio-Dual Connectivity) or NR-DC (New Radio-New Radio Dual Connectivity).
　バンドＢとしては、第２パワークラスのみに対応する従来バンドを用いることができ、例えば、ＬＴＥのためのＢａｎｄ１、Ｂａｎｄ２、Ｂａｎｄ３、Ｂａｎｄ４、Ｂａｎｄ１３、Ｂａｎｄ２０、Ｂａｎｄ２６、Ｂａｎｄ２８、Ｂａｎｄ６６又はＢａｎｄ７１を用いることができる。なお、バンドＢは、これに限定されず、３ＧＰＰ等により定義された様々なバンドを用いることができる。 As band B, a conventional band corresponding only to the second power class can be used, for example, Band 1, Band 2, Band 3, Band 4, Band 13, Band 20, Band 26, Band 28, Band 66 or Band 71 for LTE can be used. . Band B is not limited to this, and various bands defined by 3GPP or the like can be used.
　フィルタ２１は、第１フィルタの一例であり、電力増幅器１１と出力端子１０３ａとの間に接続される。具体的には、フィルタ２１の一端は電力増幅器１１の出力端に接続され、フィルタ２１の他端は出力端子１０３ａに接続される。フィルタ２１は、バンドＡを含む通過帯域を有し、第１パワークラスに対応する耐電力性を有する。フィルタ２１は、ＳＡＷフィルタ、ＢＡＷフィルタ、ＬＣ共振フィルタ、及び誘電体共振フィルタのいずれを用いて構成されてもよく、さらには、これらには限定されない。 The filter 21 is an example of a first filter and is connected between the power amplifier 11 and the output terminal 103a. Specifically, one end of the filter 21 is connected to the output end of the power amplifier 11, and the other end of the filter 21 is connected to the output terminal 103a. The filter 21 has a passband including band A and has a power handling capability corresponding to the first power class. The filter 21 may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
　フィルタ２３は、第２フィルタの一例であり、電力増幅器１３と出力端子１０３ｂとの間に接続される。具体的には、フィルタ２３の一端は電力増幅器１３の出力端に接続され、フィルタ２３の他端は出力端子１０３ｂに接続される。フィルタ２３は、バンドＢを含む通過帯域を有する。フィルタ２３は、ＳＡＷフィルタ、ＢＡＷフィルタ、ＬＣ共振フィルタ、及び誘電体共振フィルタのいずれを用いて構成されてもよく、さらには、これらには限定されない。 The filter 23 is an example of a second filter and is connected between the power amplifier 13 and the output terminal 103b. Specifically, one end of the filter 23 is connected to the output end of the power amplifier 13, and the other end of the filter 23 is connected to the output terminal 103b. Filter 23 has a passband that includes band B. FIG. The filter 23 may be configured using any of a SAW filter, a BAW filter, an LC resonance filter, and a dielectric resonance filter, and is not limited to these.
　なお、図１１に示す電力増幅回路１０Ｅの回路構成は、例示であり、これに限定されない。例えば、電力増幅回路１０Ｅは、出力端子１０３ａ及び１０３ｂの一方のみを備えてもよい。つまり、通信装置５Ｅは、アンテナ２ａ及び２ｂの一方のみを備えてもよい。この場合、電力増幅回路１０Ｅは、フィルタ２１及び２３と、出力端子１０３ａ及び１０３ｂの一方との間に接続されたスイッチを備えてもよい。また例えば、電力増幅回路１０Ｅは、任意の２つの回路素子（例えば電力増幅器１１及びフィルタ２１など）の間に接続されたインピーダンス整合回路を備えてもよい。 Note that the circuit configuration of the power amplifier circuit 10E shown in FIG. 11 is an example, and is not limited to this. For example, the power amplifier circuit 10E may have only one of the output terminals 103a and 103b. That is, the communication device 5E may have only one of the antennas 2a and 2b. In this case, the power amplifier circuit 10E may comprise a switch connected between the filters 21 and 23 and one of the output terminals 103a and 103b. Also, for example, the power amplifier circuit 10E may include an impedance matching circuit connected between any two circuit elements (for example, the power amplifier 11 and the filter 21, etc.).
　［６．１．２　トラッキング回路５０Ｅの回路構成］
　次に、トラッキング回路５０Ｅの回路構成について説明する。図１１に示すように、トラッキング回路５０Ｅは、ＡＰＴ５１と、ＥＴ５７と、スイッチ５３と、制御端子５０１と、出力端子５０２と、を備える。 [6.1.2 Circuit Configuration of Tracking Circuit 50E]
Next, the circuit configuration of the tracking circuit 50E will be described. As shown in FIG. 11, the tracking circuit 50E includes an APT 51, an ET 57, a switch 53, a control terminal 501, and an output terminal 502.
　制御端子５０１は、高周波回路１Ｅの外部から制御信号（制御信号ＣＴＬ１及びＣＴＬ２を含む）を受けるための端子である。制御端子５０１は、高周波回路１Ｅの外部でＲＦＩＣ３に接続される。 The control terminal 501 is a terminal for receiving control signals (including control signals CTL1 and CTL2) from the outside of the high frequency circuit 1E. The control terminal 501 is connected to the RFIC 3 outside the high frequency circuit 1E.
　出力端子５０２は、電力増幅回路１０Ｅに電源電圧を供給するための端子である。出力端子５０２は、トラッキング回路５０Ｅの外部で電力増幅回路１０Ｅの電源電圧端子１０２に接続される。 The output terminal 502 is a terminal for supplying power supply voltage to the power amplifier circuit 10E. The output terminal 502 is connected to the power supply voltage terminal 102 of the power amplifier circuit 10E outside the tracking circuit 50E.
　ＥＴ５７は、第１ＥＴモードで電源電圧ＶＥＴ１を供給することができ、第２ＥＴモードで電源電圧ＶＥＴ２を供給することもできる。具体的には、制御信号ＣＴＬ２が受信され、かつ、バンドＡの信号が送信され、かつ、バンドＢの信号が送信されない場合に、ＥＴ５７は、電力増幅器１１に第１ＥＴモードで電源電圧ＶＥＴ１を供給することができる。また、制御信号ＣＴＬ２が受信され、かつ、バンドＡの信号及びバンドＢの信号が同時送信される場合に、ＥＴ５７は、電力増幅器１１に第２ＥＴモードで電源電圧ＶＥＴ２を供給することができる。 The ET 57 can supply the power supply voltage V ET1 in the first ET mode, and can also supply the power supply voltage V ET2 in the second ET mode. Specifically, when the control signal CTL2 is received, the band A signal is transmitted, and the band B signal is not transmitted, the ET 57 supplies the power amplifier 11 with the power supply voltage V ET1 in the first ET mode. can supply. The ET 57 can also supply the power amplifier 11 with the supply voltage V ET2 in the second ET mode when the control signal CTL2 is received and the band A signal and the band B signal are simultaneously transmitted.
　第２ＥＴモードで供給される電源電圧ＶＥＴ２は、第１ＥＴモードで供給される電源電圧ＶＥＴ１よりも高い。つまり、同じ値を示すエンベロープ信号に対して、電源電圧ＶＥＴ２は電源電圧ＶＥＴ１よりも高い。言い換えると、第２ＥＴモードでは、第１ＥＴモードよりもゲインコンプレッションが小さくなるように、より高い電源電圧が供給される。具体的には、第１ＥＴモードでは、エンベロープ信号に対応する入力電力に対して例えば２ｄＢ圧縮された出力電力が得られるように電源電圧ＶＥＴ１が供給され、第２ＥＴモードでは、エンベロープ信号に対応する入力電力に対して例えば０．５～１ｄＢ圧縮された出力電力が得られるように電源電圧ＶＥＴ２が供給される。 The power supply voltage V ET2 supplied in the second ET mode is higher than the power supply voltage V ET1 supplied in the first ET mode. That is, the power supply voltage V ET2 is higher than the power supply voltage V ET1 for the envelope signals showing the same value. In other words, in the second ET mode, a higher power supply voltage is supplied so that gain compression is smaller than in the first ET mode. Specifically, in the first ET mode, the power supply voltage V ET1 is supplied so as to obtain, for example, 2 dB compressed output power with respect to the input power corresponding to the envelope signal. A power supply voltage V ET2 is supplied so as to obtain an output power compressed by, for example, 0.5 to 1 dB with respect to the input power.
　スイッチ５３は、ＡＰＴ５１及びＥＴ５７と電力増幅器１１との間に接続される。具体的には、スイッチ５３は、ＡＰＴ５１に接続された端子５３１と、ＥＴ５７に接続された端子５３２と、出力端子５０２に接続された端子５３３と、を備える。スイッチ５３は、例えばＳＰＤＴ型のスイッチ回路で構成される。 A switch 53 is connected between the APT 51 and ET 57 and the power amplifier 11 . Specifically, the switch 53 has a terminal 531 connected to the APT 51 , a terminal 532 connected to the ET 57 , and a terminal 533 connected to the output terminal 502 . The switch 53 is composed of, for example, an SPDT type switch circuit.
　この接続構成において、スイッチ５３は、ＲＦＩＣ３からの制御信号に基づいて、端子５３１及び５３２を端子５３３に接続することができる。具体的には、制御信号ＣＴＬ１が受信された場合に、スイッチ５３は、ＥＴ５７を出力端子５０２に接続せずに、ＡＰＴ５１を出力端子５０２に接続することができる。一方、制御信号ＣＴＬ２が受信された場合に、スイッチ５３は、ＡＰＴ５１を出力端子５０２に接続せずに、ＥＴ５７を出力端子５０２に接続することができる。 In this connection configuration, the switch 53 can connect the terminals 531 and 532 to the terminal 533 based on the control signal from the RFIC3. Specifically, switch 53 can connect APT 51 to output terminal 502 without connecting ET 57 to output terminal 502 when control signal CTL 1 is received. On the other hand, switch 53 can connect ET 57 to output terminal 502 without connecting APT 51 to output terminal 502 when control signal CTL 2 is received.
　なお、図１１に示すトラッキング回路５０Ｅの回路構成は、例示であり、これに限定されない。例えば、スイッチ５３は、トラッキング回路５０Ｅに含まれなくてもよく、電力増幅回路１０Ｅに含まれてもよい。 Note that the circuit configuration of the tracking circuit 50E shown in FIG. 11 is an example, and is not limited to this. For example, the switch 53 may not be included in the tracking circuit 50E and may be included in the power amplifier circuit 10E.
　［６．２　各パワークラスの高周波信号の伝送状態］
　次に、本実施の形態に係る通信装置５Ｅの各パワークラスの高周波信号の伝送状態の具体例について図１２～図１４を参照しながら説明する。図１２は、本実施の形態に係る通信装置５Ｅにおいて第１パワークラスの高周波信号の伝送状態を示す図である。図１３及び図１４の各々は、本実施の形態に係る通信装置５Ｅにおいて第２パワークラスの高周波信号の伝送状態を示す図である。 [6.2 Transmission state of high-frequency signals in each power class]
Next, specific examples of the transmission state of high-frequency signals in each power class of the communication device 5E according to the present embodiment will be described with reference to FIGS. 12 to 14. FIG. FIG. 12 is a diagram showing a transmission state of a first power class high-frequency signal in communication apparatus 5E according to the present embodiment. Each of FIGS. 13 and 14 is a diagram showing the transmission state of the high-frequency signal of the second power class in communication device 5E according to the present embodiment.
　第１パワークラスに対応するバンドＡの高周波信号ＲＦＡＨが送信される場合、図１２に示すように、ＲＦＩＣ３からトラッキング回路５０Ｅに制御信号ＣＴＬ１が送信される。その結果、トラッキング回路５０Ｅのスイッチ５３は、ＡＰＴ５１を出力端子５０２に接続する。これにより、トラッキング回路５０Ｅから電力増幅回路１０ＥにＡＰＴモードで電源電圧ＶＡＰＴが供給される。このとき、電力増幅回路１０Ｅは、入力端子１０１ａを介してＲＦＩＣ３から、バンドＡの高周波信号を受信する。受信された高周波信号は、電源電圧ＶＡＰＴを用いて電力増幅器１１で増幅され、フィルタ２１及び出力端子１０３ａを介してアンテナ２ａに伝送される。これにより、第１パワークラスのバンドＡの高周波信号ＲＦＡＨが通信装置５Ｅから送信される。 When the radio frequency signal RF AH of band A corresponding to the first power class is transmitted, as shown in FIG. 12, the control signal CTL1 is transmitted from the RFIC 3 to the tracking circuit 50E. As a result, switch 53 of tracking circuit 50 E connects APT 51 to output terminal 502 . As a result, the power supply voltage VAPT is supplied from the tracking circuit 50E to the power amplifier circuit 10E in the APT mode. At this time, the power amplifier circuit 10E receives the high frequency signal of band A from the RFIC 3 via the input terminal 101a. The received high-frequency signal is amplified by the power amplifier 11 using the power supply voltage VAPT , and transmitted to the antenna 2a via the filter 21 and the output terminal 103a. As a result, the radio frequency signal RF AH of band A of the first power class is transmitted from the communication device 5E.
　第２パワークラスのバンドＡの高周波信号ＲＦＡＬが送信される場合、図１３に示すように、ＲＦＩＣ３からトラッキング回路５０Ｅに制御信号ＣＴＬ２が送信される。その結果、トラッキング回路５０Ｅのスイッチ５３は、ＥＴ５７を出力端子５０２に接続する。このとき、ＥＴ５７は、第１ＥＴモードの電源電圧ＶＥＴ１を生成する。これにより、トラッキング回路５０Ｅから電力増幅回路１０Ｅに第１ＥＴモードで電源電圧ＶＥＴ１が供給される。このとき、電力増幅回路１０Ｅは、入力端子１０１ａを介してＲＦＩＣ３から、バンドＡの高周波信号を受信する。受信された高周波信号は、電源電圧ＶＥＴ１を用いて電力増幅器１１で増幅され、フィルタ２１及び出力端子１０３ａを介してアンテナ２ａに伝送される。これにより、第２パワークラスのバンドＡの高周波信号ＲＦＡＬが通信装置５Ｅから送信される。 When the high-frequency signal RF AL of band A of the second power class is transmitted, as shown in FIG. 13, the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50E. As a result, switch 53 of tracking circuit 50 E connects ET 57 to output terminal 502 . At this time, the ET57 generates the first ET mode power supply voltage VET1 . As a result, the power supply voltage V ET1 is supplied from the tracking circuit 50E to the power amplifier circuit 10E in the first ET mode. At this time, the power amplifier circuit 10E receives the high frequency signal of band A from the RFIC 3 via the input terminal 101a. The received high-frequency signal is amplified by the power amplifier 11 using the power supply voltage VET1 , and transmitted to the antenna 2a via the filter 21 and the output terminal 103a. As a result, the radio frequency signal RF AL of band A of the second power class is transmitted from the communication device 5E.
　第２パワークラスのバンドＡの高周波信号ＲＦＡＬとバンドＢの高周波信号ＲＦＢとが同時送信される場合、図１４に示すように、ＲＦＩＣ３からトラッキング回路５０Ｅに制御信号ＣＴＬ２が送信される。その結果、トラッキング回路５０Ｅのスイッチ５３は、ＥＴ５７を出力端子５０２に接続する。ＥＴ５７は、第２ＥＴモードの電源電圧ＶＥＴ２を生成する。これにより、トラッキング回路５０Ｅから電力増幅回路１０Ｅに第２ＥＴモードで電源電圧ＶＥＴ２が供給される。このとき、電力増幅回路１０Ｅは、ＲＦＩＣ３から入力端子１０１ａを介してバンドＡの高周波信号を受信し、ＲＦＩＣ３から入力端子１０１ｂを介してバンドＢの高周波信号を受信する。受信されたバンドＡの高周波信号は、電源電圧ＶＥＴ２を用いて電力増幅器１１で増幅され、フィルタ２１及び出力端子１０３ａを介してアンテナ２ａに伝送される。また、受信されたバンドＢの高周波信号は、電力増幅器１３で増幅され、フィルタ２３及び出力端子１０３ｂを介してアンテナ２ｂに伝送される。これにより、第２パワークラスのバンドＡの高周波信号ＲＦＡＬとバンドＢの高周波信号ＲＦＢとが通信装置５Ｅから同時送信される。 When the high-frequency signal RF AL of band A of the second power class and the high-frequency signal RF B of band B of the second power class are simultaneously transmitted, as shown in FIG. 14, the control signal CTL2 is transmitted from the RFIC 3 to the tracking circuit 50E. As a result, switch 53 of tracking circuit 50 E connects ET 57 to output terminal 502 . ET57 generates the power supply voltage V ET2 for the second ET mode. As a result, the power supply voltage V ET2 is supplied from the tracking circuit 50E to the power amplifier circuit 10E in the second ET mode. At this time, the power amplifier circuit 10E receives a high frequency signal of band A from RFIC 3 via input terminal 101a, and receives a high frequency signal of band B from RFIC 3 via input terminal 101b. The received high-frequency signal of band A is amplified by the power amplifier 11 using the power supply voltage VET2 , and transmitted to the antenna 2a via the filter 21 and the output terminal 103a. Also, the received high-frequency signal of band B is amplified by the power amplifier 13 and transmitted to the antenna 2b via the filter 23 and the output terminal 103b. As a result, the radio frequency signal RF AL of band A of the second power class and the radio frequency signal RF B of band B of the second power class are simultaneously transmitted from the communication device 5E.
　［６．３　効果など］
　以上のように、本実施の形態に係る高周波回路１Ｅは、電力増幅回路１０Ｅと、電力増幅回路１０Ｅに接続されたトラッキング回路５０Ｅと、を備え、トラッキング回路５０Ｅは、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０ＥにＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０ＥにＥＴモードで電源電圧を供給する。ここで、電力増幅回路１０Ｅは、第２パワークラスに対応する電力増幅器１１と、電力増幅器１１に接続され、バンドＡを含む通過帯域を有するフィルタ２１と、第２パワークラスに対応する電力増幅器１３と、電力増幅器１３に接続され、バンドＢを含む通過帯域を有するフィルタ２３と、を備え、バンドＡ及びＢは、同時送信可能なバンドの組み合わせであり、トラッキング回路５０Ｅは、制御信号ＣＴＬ２が受信され、かつ、バンドＡの信号が送信され、かつ、バンドＢの信号が送信されない場合に、電力増幅器１１に第１ＥＴモードで電源電圧ＶＥＴ１を供給し、制御信号ＣＴＬ２が受信され、かつ、バンドＡの信号及びバンドＢの信号が同時送信される場合に、電力増幅器１１に第２ＥＴモードで電源電圧ＶＥＴ２を供給し、第２ＥＴモードで供給される電源電圧ＶＥＴ２は、第１ＥＴモードで供給される電源電圧ＶＥＴ１よりも高い。 [6.3 Effects, etc.]
As described above, the high-frequency circuit 1E according to the present embodiment includes the power amplifier circuit 10E and the tracking circuit 50E connected to the power amplifier circuit 10E. When the control signal CTL1 indicating the first power class defined by is received, the power amplifier circuit 10E is supplied with the power supply voltage VAPT in the APT mode, and the second power class defined by the maximum power less than the predetermined maximum power is selected. When the control signal CTL2 shown is received, the power supply voltage is supplied to the power amplifier circuit 10E in the ET mode. Here, the power amplifier circuit 10E includes a power amplifier 11 corresponding to the second power class, a filter 21 connected to the power amplifier 11 and having a passband including band A, a power amplifier 13 corresponding to the second power class, a filter 23 connected to the power amplifier 13 and having a passband including band B, wherein bands A and B are a combination of bands that can be transmitted simultaneously, the tracking circuit 50E receiving the control signal CTL2, When the signal of band A is transmitted and the signal of band B is not transmitted, the power amplifier 11 is supplied with the power supply voltage V ET1 in the first ET mode, the control signal CTL2 is received, and the signal of band A is not transmitted. When the signal and the signal of band B are simultaneously transmitted, the power amplifier 11 is supplied with the power supply voltage V ET2 in the second ET mode, and the power supply voltage V ET2 supplied in the second ET mode is supplied in the first ET mode. higher than the power supply voltage VET1 .
　これによれば、より高い最大出力電力で規定される第１パワークラスでは、電力増幅回路１０ＥにＡＰＴモードで電源電圧ＶＡＰＴが供給され、より低い最大出力電力で規定される第２パワークラスでは、第１ＥＴモード又は第２ＥＴモードで電源電圧が供給される。したがって、実施の形態１に係る高周波回路１と同様の効果を奏することができる。さらに、電源電圧ＶＥＴ２が電源電圧ＶＥＴ１よりも高いので、バンドＡ及びＢの信号の同時送信時にバンドＢの信号による干渉（回り込み）に対して電力増幅器１１の線形性を向上させることができる。 According to this, in the first power class defined with a higher maximum output power, the power amplifier circuit 10E is supplied with the power supply voltage VAPT in the APT mode, and in the second power class defined with a lower maximum output power, the A power supply voltage is supplied in the 1ET mode or the 2nd ET mode. Therefore, the same effects as those of the high-frequency circuit 1 according to the first embodiment can be obtained. Furthermore, since the power supply voltage V ET2 is higher than the power supply voltage V ET1 , it is possible to improve the linearity of the power amplifier 11 against interference (wraparound) by the signal of the band B when simultaneously transmitting the signals of the bands A and B. .
　また、本実施の形態に係るトラッキング回路５０Ｅは、所定最大電力以上の最大電力で規定される第１パワークラスを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０ＥにＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定最大電力未満の最大電力で規定される第２パワークラスを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０ＥにＥＴモードで電源電圧を供給する。ここで、電力増幅回路１０Ｅは、第２パワークラスに対応する電力増幅器１１と、電力増幅器１１に接続され、バンドＡを含む通過帯域を有するフィルタ２１と、第２パワークラスに対応する電力増幅器１３と、電力増幅器１３に接続され、バンドＢを含む通過帯域を有するフィルタ２３と、を備え、バンドＡ及びＢは、同時送信可能なバンドの組み合わせであり、トラッキング回路５０Ｅは、制御信号ＣＴＬ２が受信され、かつ、バンドＡの信号が送信され、かつ、バンドＢの信号が送信されない場合に、電力増幅器１１に第１ＥＴモードで電源電圧ＶＥＴ１を供給し、制御信号ＣＴＬ２が受信され、かつ、バンドＡの信号及びバンドＢの信号が同時送信される場合に、電力増幅器１１に第２ＥＴモードで電源電圧ＶＥＴ２を供給し、第２ＥＴモードで供給される電源電圧ＶＥＴ２は、第１ＥＴモードで供給される電源電圧ＶＥＴ１よりも高い。 Further, tracking circuit 50E according to the present embodiment supplies power amplifier circuit 10E with power supply voltage V in the APT mode when control signal CTL1 indicating the first power class defined by the maximum power equal to or higher than the predetermined maximum power is received. APT is supplied, and the power supply voltage is supplied to the power amplifier circuit 10E in the ET mode when the control signal CTL2 indicating the second power class defined by the maximum power less than the predetermined maximum power is received. Here, the power amplifier circuit 10E includes a power amplifier 11 corresponding to the second power class, a filter 21 connected to the power amplifier 11 and having a passband including band A, a power amplifier 13 corresponding to the second power class, a filter 23 connected to the power amplifier 13 and having a passband including band B, wherein bands A and B are a combination of bands that can be transmitted simultaneously, the tracking circuit 50E receiving the control signal CTL2, When the signal of band A is transmitted and the signal of band B is not transmitted, the power amplifier 11 is supplied with the power supply voltage V ET1 in the first ET mode, the control signal CTL2 is received, and the signal of band A is not transmitted. When the signal and the signal of band B are simultaneously transmitted, the power amplifier 11 is supplied with the power supply voltage V ET2 in the second ET mode, and the power supply voltage V ET2 supplied in the second ET mode is supplied in the first ET mode. higher than the power supply voltage VET1 .
　これによれば、トラッキング回路５０Ｅは、上記高周波回路１Ｅと同様の効果を実現することができる。 According to this, the tracking circuit 50E can achieve the same effects as the high-frequency circuit 1E.
　（実施の形態７）
　次に、実施の形態７について説明する。本実施の形態では、パワークラスではなく出力電力に応じてトラッキングモードが切り替えられる点が、上記各実施の形態と主として異なる。以下に、本実施の形態について上記実施の形態１と異なる点を中心に説明する。 (Embodiment 7)
Next, Embodiment 7 will be described. This embodiment differs from the above embodiments mainly in that the tracking mode is switched according to the output power instead of the power class. In the following, the present embodiment will be described, focusing on the differences from the first embodiment.
　なお、本実施の形態に係る通信装置は、上記各実施の形態に係る通信装置と同様であるので、図示及び説明を省略する。 Note that the communication device according to the present embodiment is the same as the communication device according to each of the above-described embodiments, so illustration and description are omitted.
　本実施の形態では、上記各実施の形態と異なる内容の制御信号ＣＴＬ１及びＣＴＬ２を用いることで、出力電力に応じてトラッキングモードが切り替えられる。具体的には、本実施の形態に係る制御信号ＣＴＬ１は、所定期間において出力電力が閾値電力を超えることを示す。また、本実施の形態に係る制御信号ＣＴＬ２は、所定期間において出力電力が閾値電力を超えないことを示す。 In this embodiment, the tracking mode is switched according to the output power by using control signals CTL1 and CTL2 having contents different from those in the above embodiments. Specifically, the control signal CTL1 according to the present embodiment indicates that the output power exceeds the threshold power in a predetermined period. Also, the control signal CTL2 according to the present embodiment indicates that the output power does not exceed the threshold power in a predetermined period.
　所定期間の長さとしては、トラッキングモードの切り替えに適した期間の長さが用いられる。具体的には、所定期間の長さとして、ＡＰＴモードで電源電圧を変化させる単位（例えば１フレーム単位）を用いることができるが、これに限定されない。 As the length of the predetermined period, the length of the period suitable for switching the tracking mode is used. Specifically, as the length of the predetermined period, a unit for changing the power supply voltage in the APT mode (for example, one frame unit) can be used, but it is not limited to this.
　閾値電力としては、トラッキングモードの切り替えに適した出力電力が用いられる。具体的には、閾値電力として、例えば２９ｄＢｍを用いることができるが、これに限定されない。 An output power suitable for switching the tracking mode is used as the threshold power. Specifically, for example, 29 dBm can be used as the threshold power, but it is not limited to this.
　このような本実施の形態に係る制御信号ＣＴＬ１及びＣＴＬ２が上記実施の形態１に係る高周波回路１に適用されれば、高周波回路１は、電力増幅回路１０と、電力増幅回路１０に接続されたトラッキング回路５０と、を備え、トラッキング回路５０は、所定期間において出力電力が閾値電力を超えることを示す制御信号ＣＴＬ１が受信された場合に、電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴを供給し、所定期間において出力電力が閾値電力を超えないことを示す制御信号ＣＴＬ２が受信された場合に、電力増幅回路１０にＥＴモードで電源電圧ＶＥＴを供給する。 When the control signals CTL1 and CTL2 according to the present embodiment are applied to the high-frequency circuit 1 according to the first embodiment, the high-frequency circuit 1 is connected to the power amplifier circuit 10 and the power amplifier circuit 10. a tracking circuit 50, wherein the tracking circuit 50 supplies the power supply voltage VAPT in the APT mode to the power amplifier circuit 10 when the control signal CTL1 indicating that the output power exceeds the threshold power for a predetermined period of time is received. Then, when the control signal CTL2 indicating that the output power does not exceed the threshold power for a predetermined period is received, the power amplifier circuit 10 is supplied with the power supply voltage V ET in the ET mode.
　これによれば、所定期間において出力電力が閾値電力を超える場合には、電力増幅回路１０にＡＰＴモードで電源電圧ＶＡＰＴが供給される。したがって、より高い出力電力が要求される期間では、より高い電源電圧の供給に対応することが難しいＥＴモードの使用が避けられ、ＡＰＴモードでＰＡＥの改善を図ることができる。一方、より高い出力電力が要求されない期間では、ＥＴモードで電源電圧ＶＥＴが供給される。したがって、ＡＰＴモードで電源電圧ＶＡＰＴが供給される場合よりもＰＡＥを改善することができる。より高い最大出力電力で規定される第１パワークラスが用いられる場合であっても、所定期間において当該最大出力電力が要求されるとは限らない。したがって、出力電力に応じてＡＰＴモード及びＥＴモードを切り替えることで、ＥＴモードの使用を増加させることができ、さらなるＰＡＥの改善を図ることができる。 According to this, when the output power exceeds the threshold power for a predetermined period, the power amplifier circuit 10 is supplied with the power supply voltage VAPT in the APT mode. Therefore, in the period when higher output power is required, the use of the ET mode, in which it is difficult to supply a higher power supply voltage, can be avoided, and the PAE can be improved in the APT mode. On the other hand, during periods when higher output power is not required, the power supply voltage V ET is supplied in the ET mode. Therefore, PAE can be improved more than when the power supply voltage V APT is supplied in the APT mode. Even if a first power class defined with a higher maximum output power is used, that maximum output power is not necessarily required for a predetermined period of time. Therefore, by switching between the APT mode and the ET mode according to the output power, it is possible to increase the use of the ET mode and further improve the PAE.
　なお、本実施の形態に係る制御信号ＣＴＬ１及びＣＴＬ２は、上記実施の形態２～６のいずれにも適用することができる。 It should be noted that the control signals CTL1 and CTL2 according to the present embodiment can be applied to any of the second to sixth embodiments.
　（他の実施の形態）
　以上、本発明に係る高周波回路及び通信装置について、実施の形態に基づいて説明したが、本発明に係る高周波回路及び通信装置は、上記実施の形態に限定されるものではない。上記実施の形態における任意の構成要素を組み合わせて実現される別の実施の形態や、上記実施の形態に対して本発明の主旨を逸脱しない範囲で当業者が思いつく各種変形を施して得られる変形例や、上記高周波回路を内蔵した各種機器も本発明に含まれる。 (Other embodiments)
Although the high-frequency circuit and communication device according to the present invention have been described above based on the embodiments, the high-frequency circuit and communication device according to the present invention are not limited to the above-described embodiments. Another embodiment realized by combining arbitrary constituent elements in the above embodiment, and a modification obtained by applying various modifications that a person skilled in the art can think of without departing from the scope of the present invention to the above embodiment For example, the present invention also includes various devices incorporating the above-described high-frequency circuit.
　例えば、上記各実施の形態に係る高周波回路及び通信装置の回路構成において、図面に開示された各回路素子及び信号経路を接続する経路の間に、別の回路素子及び配線などが挿入されてもよい。例えば、フィルタと出力端子との間にカプラが挿入されてもよい。 For example, in the circuit configuration of the high-frequency circuit and the communication device according to the above-described embodiments, even if another circuit element and wiring are inserted between the paths connecting the circuit elements and signal paths disclosed in the drawings. good. For example, a coupler may be inserted between the filter and the output terminal.
　また例えば、上記実施の形態６において、高周波回路１Ｅは、さらにアンテナ２ａ及び２ｂとフィルタ２１及び２３との間に接続されるスイッチ３０を含んでもよい。例えば、図１５に示すように、スイッチ３０は、アンテナ２ａに接続される端子３０１と、アンテナ２ｂに接続される端子３０２と、電力増幅回路１０Ｅの出力端子１０３ａに接続される端子３０３と、電力増幅回路１０Ｅの出力端子１０３ｂに接続される端子３０４と、を含む。 Further, for example, in the sixth embodiment, the high-frequency circuit 1E may further include a switch 30 connected between the antennas 2a and 2b and the filters 21 and 23. For example, as shown in FIG. 15, the switch 30 has a terminal 301 connected to the antenna 2a, a terminal 302 connected to the antenna 2b, a terminal 303 connected to the output terminal 103a of the power amplifier circuit 10E, and a power and a terminal 304 connected to the output terminal 103b of the amplifier circuit 10E.
　この接続構成において、スイッチ３０は、例えばＲＦＩＣ３からの制御信号に基づいて、端子３０１を端子３０３及び３０４に排他的に接続することができ、かつ、端子３０２を端子３０３及び３０４に排他的に接続することができる。つまり、スイッチ３０は、端子３０１を端子３０３及び３０４の一方に接続するとともに、端子３０２を端子３０３及び３０４の他方に接続することができる。 In this connection configuration, switch 30 can exclusively connect terminal 301 to terminals 303 and 304 and exclusively connect terminal 302 to terminals 303 and 304 based on a control signal from RFIC 3, for example. can do. That is, switch 30 can connect terminal 301 to one of terminals 303 and 304 and connect terminal 302 to the other of terminals 303 and 304 .
　また、上記各実施の形態では、通信装置は、送信装置であったが、送受信装置であってもよい。この場合、高周波回路は、低雑音増幅回路を備えてもよい。 Also, in each of the above embodiments, the communication device was a transmission device, but may be a transmission/reception device. In this case, the high frequency circuit may comprise a low noise amplifier circuit.
　本発明は、フロントエンド部に配置される高周波回路として、携帯電話などの通信機器に広く利用できる。 The present invention can be widely used in communication equipment such as mobile phones as a high-frequency circuit arranged in the front end section.
　１、１Ａ、１Ｂ、１Ｃ、１Ｄ、１Ｅ　高周波回路
　２、２ａ、２ｂ　アンテナ
　３　ＲＦＩＣ
　４　ＢＢＩＣ
　５、５Ａ、５Ｂ、５Ｃ、５Ｄ、５Ｅ　通信装置
　１０、１０Ｂ、１０Ｄ、１０Ｅ　電力増幅回路
　１１、１１Ｂ、１１Ｄ、１２Ｂ、１２Ｄ、１３　電力増幅器
　１４　合成器
　２１、２１Ｂ、２２Ｂ、２３　フィルタ
　３０、５３、５５　スイッチ
　５０、５０Ａ、５０Ｂ、５０Ｃ、５０Ｄ、５０Ｅ　トラッキング回路
　５１、５６　ＡＰＴ
　５２、５７　ＥＴ
　５４　ＭＴ
　１０１、１０１ａ、１０１ｂ、１４１、１４２　入力端子
　１０２、１０２ａ、１０２ｂ　電源電圧端子
　１０３、１０３ａ、１０３ｂ、１４３、５０２、５０２ａ、５０２ｂ　出力端子
　３０１、３０２、３０３、３０４、５３１、５３２、５３３、５５１、５５２、５５３　端子
　５０１　制御端子
　ＣＴＬ１、ＣＴＬ２　制御信号
　ＶＡＰＴ、ＶＥＴ、ＶＥＴ１、ＶＥＴ２　電源電圧 1, 1A, 1B, 1C, 1D, 1E high frequency circuit 2, 2a, 2b antenna 3 RFIC
4 BBIC
5, 5A, 5B, 5C, 5D, 5E Communication Device 10, 10B, 10D, 10E Power Amplifier Circuit 11, 11B, 11D, 12B, 12D, 13 Power Amplifier 14 Combiner 21, 21B, 22B, 23 Filter 30, 53 , 55 switches 50, 50A, 50B, 50C, 50D, 50E tracking circuits 51, 56 APT
52, 57 ET
54 MT
101, 101a, 101b, 141, 142 Input terminals 102, 102a, 102b Power supply voltage terminals 103, 103a, 103b, 143, 502, 502a, 502b Output terminals 301, 302, 303, 304, 531, 532, 533, 551, 552, 553 terminals 501 control terminals CTL1, CTL2 control signals V APT , V ET , V ET1 , V ET2 power supply voltage

Claims (16)

  1. 　電力増幅回路と、
    　前記電力増幅回路に接続されたトラッキング回路と、を備え、
    　前記トラッキング回路は、
    　所定最大電力以上の最大電力で規定される第１パワークラスを示す第１制御信号が受信された場合に、前記電力増幅回路に平均電力トラッキングモードで電源電圧を供給し、
    　前記所定最大電力未満の最大電力で規定される第２パワークラスを示す第２制御信号が受信された場合に、前記電力増幅回路にエンベロープトラッキングモードで電源電圧を供給する、
    　高周波回路。     a power amplifier circuit;
    a tracking circuit connected to the power amplifier circuit;
    The tracking circuit is
    supplying a power supply voltage to the power amplifier circuit in an average power tracking mode when a first control signal indicating a first power class defined by a maximum power equal to or higher than a predetermined maximum power is received;
    When a second control signal indicating a second power class defined by a maximum power less than the predetermined maximum power is received, the power amplifier circuit is supplied with a power supply voltage in an envelope tracking mode.
    high frequency circuit.
  2. 　前記電力増幅回路は、前記第１パワークラス及び前記第２パワークラスに対応する電力増幅器を備え、
    　前記トラッキング回路は、
    　前記電力増幅器に接続される出力端子と、
    　前記エンベロープトラッキングモードで電源電圧を供給可能なエンベロープトラッカと、
    　前記平均電力トラッキングモードで電源電圧を供給可能な平均電力トラッカと、
    　前記エンベロープトラッカ及び前記平均電力トラッカと前記出力端子との間に接続されたスイッチと、を備え、
    　前記スイッチは、
    　前記第１制御信号が受信された場合に、前記平均電力トラッカを前記出力端子に接続し、
    　前記第２制御信号が受信された場合に、前記エンベロープトラッカを前記出力端子に接続する、
    　請求項１に記載の高周波回路。     The power amplifier circuit includes power amplifiers corresponding to the first power class and the second power class,
    The tracking circuit is
    an output terminal connected to the power amplifier;
    an envelope tracker capable of supplying power supply voltage in the envelope tracking mode;
    an average power tracker capable of supplying a power supply voltage in the average power tracking mode;
    a switch connected between the envelope tracker and the average power tracker and the output terminal;
    The switch is
    connecting the average power tracker to the output terminal when the first control signal is received;
    connecting the envelope tracker to the output terminal when the second control signal is received;
    A high-frequency circuit according to claim 1.
  3. 　前記電力増幅回路は、前記第１パワークラス及び前記第２パワークラスに対応する電力増幅器を備え、
    　前記トラッキング回路は、
    　前記エンベロープトラッキングモードで電源電圧を供給可能、かつ、前記平均電力トラッキングモードで電源電圧を供給可能なマルチモードトラッカを備え、
    　前記マルチモードトラッカは、
    　前記第１制御信号が受信された場合に、前記電力増幅器に前記平均電力トラッキングモードで電源電圧を供給し、
    　前記第２制御信号が受信された場合に、前記電力増幅器に前記エンベロープトラッキングモードで電源電圧を供給する、
    　請求項１に記載の高周波回路。     The power amplifier circuit includes power amplifiers corresponding to the first power class and the second power class,
    The tracking circuit is
    A multi-mode tracker capable of supplying a power supply voltage in the envelope tracking mode and capable of supplying a power supply voltage in the average power tracking mode,
    The multimode tracker is
    supplying a power supply voltage to the power amplifier in the average power tracking mode when the first control signal is received;
    supplying a power supply voltage to the power amplifier in the envelope tracking mode when the second control signal is received;
    A high-frequency circuit according to claim 1.
  4. 　前記電力増幅回路は、
    　前記第１パワークラスに対応する第１電力増幅器と、
    　前記第２パワークラスに対応する第２電力増幅器と、を備え、
    　前記トラッキング回路は、
    　前記第１電力増幅器に接続される第１出力端子と、
    　前記第２電力増幅器に接続される第２出力端子と、
    　前記エンベロープトラッキングモードで電源電圧を供給可能、かつ、前記平均電力トラッキングモードで電源電圧を供給可能なマルチモードトラッカと、
    　前記マルチモードトラッカと前記第１出力端子及び前記第２出力端子との間に接続されたスイッチと、を備え、
    　前記マルチモードトラッカは、
    　前記第１制御信号が受信された場合に、前記スイッチを介して前記第１電力増幅器に前記平均電力トラッキングモードで電源電圧を供給し、
    　前記第２制御信号が受信された場合に、前記スイッチを介して前記第２電力増幅器に前記エンベロープトラッキングモードで電源電圧を供給する、
    　請求項１に記載の高周波回路。     The power amplifier circuit is
    a first power amplifier corresponding to the first power class;
    a second power amplifier corresponding to the second power class;
    The tracking circuit is
    a first output terminal connected to the first power amplifier;
    a second output terminal connected to the second power amplifier;
    a multimode tracker capable of supplying power supply voltage in the envelope tracking mode and capable of supplying power supply voltage in the average power tracking mode;
    a switch connected between the multimode tracker and the first output terminal and the second output terminal;
    The multimode tracker is
    supplying a power supply voltage in the average power tracking mode to the first power amplifier via the switch when the first control signal is received;
    supplying a power supply voltage in the envelope tracking mode to the second power amplifier via the switch when the second control signal is received;
    A high-frequency circuit according to claim 1.
  5. 　前記電力増幅回路は、
    　前記第１パワークラスに対応する第１電力増幅器と、
    　前記第２パワークラスに対応する第２電力増幅器と、を備え、
    　前記トラッキング回路は、
    　前記第１電力増幅器に接続され、前記平均電力トラッキングモードで電源電圧を供給可能な平均電力トラッカと、
    　前記第２電力増幅器に接続され、前記エンベロープトラッキングモードで電源電圧を供給可能なエンベロープトラッカと、を備える、
    　請求項１に記載の高周波回路。     The power amplifier circuit is
    a first power amplifier corresponding to the first power class;
    a second power amplifier corresponding to the second power class;
    The tracking circuit is
    an average power tracker connected to the first power amplifier and capable of supplying a power supply voltage in the average power tracking mode;
    an envelope tracker connected to the second power amplifier and capable of supplying a power supply voltage in the envelope tracking mode;
    A high-frequency circuit according to claim 1.
  6. 　前記電力増幅回路は、
    　前記第２パワークラスに対応する第１電力増幅器と、
    　前記第２パワークラスに対応する第２電力増幅器と、
    　前記第１電力増幅器の出力端及び前記第２電力増幅器の出力端に接続された合成器と、を備え、
    　前記トラッキング回路は、
    　前記第１制御信号が受信された場合に、前記第１電力増幅器及び前記第２電力増幅器の各々に前記平均電力トラッキングモードで電源電圧を供給し、
    　前記第２制御信号が受信された場合に、前記第１電力増幅器及び前記第２電力増幅器のうちの一方のみに前記エンベロープトラッキングモードで電源電圧を供給する、
    　請求項１に記載の高周波回路。     The power amplifier circuit is
    a first power amplifier corresponding to the second power class;
    a second power amplifier corresponding to the second power class;
    a combiner connected to the output of the first power amplifier and the output of the second power amplifier;
    The tracking circuit is
    supplying a power supply voltage in the average power tracking mode to each of the first power amplifier and the second power amplifier when the first control signal is received;
    supplying a power supply voltage in the envelope tracking mode to only one of the first power amplifier and the second power amplifier when the second control signal is received;
    A high-frequency circuit according to claim 1.
  7. 　前記電力増幅回路は、
    　前記第２パワークラスに対応する第１電力増幅器と、
    　前記第１電力増幅器に接続され、第１バンドを含む通過帯域を有する第１フィルタと、
    　前記第２パワークラスに対応する第２電力増幅器と、
    　前記第２電力増幅器に接続され、第２バンドを含む通過帯域を有する第２フィルタと、を備え、
    　前記第１バンド及び前記第２バンドは、同時送信可能なバンドの組み合わせであり、
    　前記トラッキング回路は、
    　前記第２制御信号が受信され、かつ、前記第１バンドの信号が送信され、かつ、前記第２バンドの信号が送信されない場合に、前記第１電力増幅器に第１エンベロープトラッキングモードで電源電圧を供給し、
    　前記第２制御信号が受信され、かつ、前記第１バンドの信号及び前記第２バンドの信号が同時送信される場合に、前記第１電力増幅器に第２エンベロープトラッキングモードで電源電圧を供給し、
    　前記第２エンベロープトラッキングモードで供給される電源電圧は、前記第１エンベロープトラッキングモードで供給される電源電圧よりも高い、
    　請求項１に記載の高周波回路。     The power amplifier circuit is
    a first power amplifier corresponding to the second power class;
    a first filter connected to the first power amplifier and having a passband including a first band;
    a second power amplifier corresponding to the second power class;
    a second filter connected to the second power amplifier and having a passband including a second band;
    The first band and the second band are a combination of bands that can be transmitted simultaneously,
    The tracking circuit is
    When the second control signal is received, the signal of the first band is transmitted, and the signal of the second band is not transmitted, the power supply voltage is supplied to the first power amplifier in a first envelope tracking mode. supply and
    supplying a power supply voltage to the first power amplifier in a second envelope tracking mode when the second control signal is received and the signal of the first band and the signal of the second band are simultaneously transmitted;
    the power supply voltage supplied in the second envelope tracking mode is higher than the power supply voltage supplied in the first envelope tracking mode;
    A high-frequency circuit according to claim 1.
  8. 　所定最大電力以上の最大電力で規定される第１パワークラスを示す第１制御信号が受信された場合に、電力増幅回路に平均電力トラッキングモードで電源電圧を供給し、
    　前記所定最大電力未満の最大電力で規定される第２パワークラスを示す第２制御信号が受信された場合に、前記電力増幅回路にエンベロープトラッキングモードで電源電圧を供給する、
    　トラッキング回路。     supplying a power source voltage to the power amplifier circuit in an average power tracking mode when a first control signal indicating a first power class defined by a maximum power equal to or higher than a predetermined maximum power is received;
    When a second control signal indicating a second power class defined by a maximum power less than the predetermined maximum power is received, the power amplifier circuit is supplied with a power supply voltage in an envelope tracking mode.
    tracking circuit.
  9. 　前記電力増幅回路は、前記第１パワークラス及び前記第２パワークラスに対応する電力増幅器を備え、
    　前記トラッキング回路は、
    　前記電力増幅器に接続される出力端子と、
    　前記エンベロープトラッキングモードで電源電圧を供給可能なエンベロープトラッカと、
    　前記平均電力トラッキングモードで電源電圧を供給可能な平均電力トラッカと、
    　前記エンベロープトラッカ及び前記平均電力トラッカと前記出力端子との間に接続されたスイッチと、を備え、
    　前記スイッチは、
    　前記第１制御信号が受信された場合に、前記平均電力トラッカを前記出力端子に接続し、
    　前記第２制御信号が受信された場合に、前記エンベロープトラッカを前記出力端子に接続する、
    　請求項８に記載のトラッキング回路。     The power amplifier circuit includes power amplifiers corresponding to the first power class and the second power class,
    The tracking circuit is
    an output terminal connected to the power amplifier;
    an envelope tracker capable of supplying power supply voltage in the envelope tracking mode;
    an average power tracker capable of supplying a power supply voltage in the average power tracking mode;
    a switch connected between the envelope tracker and the average power tracker and the output terminal;
    The switch is
    connecting the average power tracker to the output terminal when the first control signal is received;
    connecting the envelope tracker to the output terminal when the second control signal is received;
    9. A tracking circuit as claimed in claim 8.
  10. 　前記電力増幅回路は、前記第１パワークラス及び前記第２パワークラスに対応する電力増幅器を備え、
    　前記トラッキング回路は、
    　前記エンベロープトラッキングモードで電源電圧を供給可能、かつ、前記平均電力トラッキングモードで電源電圧を供給可能なマルチモードトラッカを備え、
    　前記マルチモードトラッカは、
    　前記第１制御信号が受信された場合に、前記電力増幅器に前記平均電力トラッキングモードで電源電圧を供給し、
    　前記第２制御信号が受信された場合に、前記電力増幅器に前記エンベロープトラッキングモードで電源電圧を供給する、
    　請求項８に記載のトラッキング回路。     The power amplifier circuit includes power amplifiers corresponding to the first power class and the second power class,
    The tracking circuit is
    A multi-mode tracker capable of supplying a power supply voltage in the envelope tracking mode and capable of supplying a power supply voltage in the average power tracking mode,
    The multimode tracker is
    supplying a power supply voltage to the power amplifier in the average power tracking mode when the first control signal is received;
    supplying a power supply voltage to the power amplifier in the envelope tracking mode when the second control signal is received;
    9. A tracking circuit as claimed in claim 8.
  11. 　前記電力増幅回路は、
    　前記第１パワークラスに対応する第１電力増幅器と、
    　前記第２パワークラスに対応する第２電力増幅器と、を備え、
    　前記トラッキング回路は、
    　前記第１電力増幅器に接続される第１出力端子と、
    　前記第２電力増幅器に接続される第２出力端子と、
    　前記エンベロープトラッキングモードで電源電圧を供給可能、かつ、前記平均電力トラッキングモードで電源電圧を供給可能なマルチモードトラッカと、
    　前記マルチモードトラッカと前記第１出力端子及び前記第２出力端子との間に接続されたスイッチと、を備え、
    　前記マルチモードトラッカは、
    　前記第１制御信号が受信された場合に、前記スイッチを介して前記第１電力増幅器に前記平均電力トラッキングモードで電源電圧を供給し、
    　前記第２制御信号が受信された場合に、前記スイッチを介して前記第２電力増幅器に前記エンベロープトラッキングモードで電源電圧を供給する、
    　請求項８に記載のトラッキング回路。     The power amplifier circuit is
    a first power amplifier corresponding to the first power class;
    a second power amplifier corresponding to the second power class;
    The tracking circuit is
    a first output terminal connected to the first power amplifier;
    a second output terminal connected to the second power amplifier;
    a multimode tracker capable of supplying power supply voltage in the envelope tracking mode and capable of supplying power supply voltage in the average power tracking mode;
    a switch connected between the multimode tracker and the first output terminal and the second output terminal;
    The multimode tracker is
    supplying a power supply voltage in the average power tracking mode to the first power amplifier via the switch when the first control signal is received;
    supplying a power supply voltage in the envelope tracking mode to the second power amplifier via the switch when the second control signal is received;
    9. A tracking circuit as claimed in claim 8.
  12. 　前記電力増幅回路は、
    　前記第１パワークラスに対応する第１電力増幅器と、
    　前記第２パワークラスに対応する第２電力増幅器と、を備え、
    　前記トラッキング回路は、
    　前記第１電力増幅器に接続され、前記平均電力トラッキングモードで電源電圧を供給可能な平均電力トラッカと、
    　前記第２電力増幅器に接続され、前記エンベロープトラッキングモードで電源電圧を供給可能なエンベロープトラッカと、を備える、
    　請求項８に記載のトラッキング回路。     The power amplifier circuit is
    a first power amplifier corresponding to the first power class;
    a second power amplifier corresponding to the second power class;
    The tracking circuit is
    an average power tracker connected to the first power amplifier and capable of supplying a power supply voltage in the average power tracking mode;
    an envelope tracker connected to the second power amplifier and capable of supplying a power supply voltage in the envelope tracking mode;
    9. A tracking circuit as claimed in claim 8.
  13. 　前記電力増幅回路は、
    　前記第２パワークラスに対応する第１電力増幅器と、
    　前記第２パワークラスに対応する第２電力増幅器と、
    　前記第１電力増幅器の出力端及び前記第２電力増幅器の出力端に接続された合成器と、を備え、
    　前記トラッキング回路は、
    　前記第１制御信号が受信された場合に、前記第１電力増幅器及び前記第２電力増幅器の各々に前記平均電力トラッキングモードで電源電圧を供給し、
    　前記第２制御信号が受信された場合に、前記第１電力増幅器及び前記第２電力増幅器のうちの一方のみに前記エンベロープトラッキングモードで電源電圧を供給する、
    　請求項８に記載のトラッキング回路。     The power amplifier circuit is
    a first power amplifier corresponding to the second power class;
    a second power amplifier corresponding to the second power class;
    a combiner connected to the output of the first power amplifier and the output of the second power amplifier;
    The tracking circuit is
    supplying a power supply voltage in the average power tracking mode to each of the first power amplifier and the second power amplifier when the first control signal is received;
    supplying a power supply voltage in the envelope tracking mode to only one of the first power amplifier and the second power amplifier when the second control signal is received;
    9. A tracking circuit as claimed in claim 8.
  14. 　前記電力増幅回路は、
    　前記第２パワークラスに対応する第１電力増幅器と、
    　前記第１電力増幅器に接続され、第１バンドを含む通過帯域を有する第１フィルタと、
    　前記第２パワークラスに対応する第２電力増幅器と、
    　前記第２電力増幅器に接続され、第２バンドを含む通過帯域を有する第２フィルタと、を備え、
    　前記第１バンド及び前記第２バンドは、同時送信可能なバンドの組み合わせであり、
    　前記トラッキング回路は、
    　前記第２制御信号が受信され、かつ、前記第１バンドの信号が送信され、かつ、前記第２バンドの信号が送信されない場合に、前記第１電力増幅器に第１エンベロープトラッキングモードで電源電圧を供給し、
    　前記第２制御信号が受信され、かつ、前記第１バンドの信号及び前記第２バンドの信号が同時送信される場合に、前記第１電力増幅器に第２エンベロープトラッキングモードで電源電圧を供給し、
    　前記第２エンベロープトラッキングモードで供給される電源電圧は、前記第１エンベロープトラッキングモードで供給される電源電圧よりも高い、
    　請求項８に記載のトラッキング回路。     The power amplifier circuit is
    a first power amplifier corresponding to the second power class;
    a first filter connected to the first power amplifier and having a passband including a first band;
    a second power amplifier corresponding to the second power class;
    a second filter connected to the second power amplifier and having a passband including a second band;
    The first band and the second band are a combination of bands that can be transmitted simultaneously,
    The tracking circuit is
    When the second control signal is received, the signal of the first band is transmitted, and the signal of the second band is not transmitted, the power supply voltage is supplied to the first power amplifier in a first envelope tracking mode. supply and
    supplying a power supply voltage to the first power amplifier in a second envelope tracking mode when the second control signal is received and the signal of the first band and the signal of the second band are simultaneously transmitted;
    the power supply voltage supplied in the second envelope tracking mode is higher than the power supply voltage supplied in the first envelope tracking mode;
    9. A tracking circuit as claimed in claim 8.
  15. 　所定最大電力以上の最大電力で規定される第１パワークラスに対応し、平均電力トラッキングモードが適用され、エンベロープトラッキングモードが適用されない第１電力増幅器と、
    　前記所定最大電力未満の最大電力で規定される第２パワークラスに対応し、エンベロープトラッキングモードが適用され、平均電力トラッキングモードが適用されない第２電力増幅器と、を備える、
    　電力増幅回路。     a first power amplifier that corresponds to a first power class defined by a maximum power equal to or higher than a predetermined maximum power, applies an average power tracking mode, and does not apply an envelope tracking mode;
    a second power amplifier that corresponds to a second power class defined by a maximum power less than the predetermined maximum power, to which an envelope tracking mode is applied and to which an average power tracking mode is not applied;
    Power amplifier circuit.
  16. 　電力増幅回路と、
    　前記電力増幅回路に接続されたトラッキング回路と、を備え、
    　前記トラッキング回路は、
    　所定期間において出力電力が閾値電力を超えることを示す第１制御信号が受信された場合に、前記電力増幅回路に平均電力トラッキングモードで電源電圧を供給し、
    　前記所定期間において出力電力が前記閾値電力を超えないことを示す第２制御信号が受信された場合に、前記電力増幅回路にエンベロープトラッキングモードで電源電圧を供給する、
    　高周波回路。     a power amplifier circuit;
    a tracking circuit connected to the power amplifier circuit;
    The tracking circuit is
    supplying a power supply voltage to the power amplifier circuit in an average power tracking mode when a first control signal indicating that the output power exceeds the threshold power for a predetermined period of time is received;
    supplying a power supply voltage to the power amplifier circuit in an envelope tracking mode when a second control signal is received indicating that the output power does not exceed the threshold power for the predetermined period of time;
    high frequency circuit.
PCT/JP2022/044295 2021-12-21 2022-11-30 High-frequency circuit, tracking circuit, and electric power amplification circuit WO2023120086A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2021-206767 2021-12-21
JP2021206767 2021-12-21

Publications (1)

Publication Number Publication Date
WO2023120086A1 true WO2023120086A1 (en) 2023-06-29

Family

ID=86902073

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2022/044295 WO2023120086A1 (en) 2021-12-21 2022-11-30 High-frequency circuit, tracking circuit, and electric power amplification circuit

Country Status (1)

Country Link
WO (1) WO2023120086A1 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009060652A1 (en) * 2007-11-05 2009-05-14 Nec Corporation Power amplifier and radio wave transmitter having the same
JP2019536307A (en) * 2016-09-30 2019-12-12 テレフオンアクチーボラゲット エルエム エリクソン（パブル） Method and node for cell selection in a wireless communication network
JP2020145613A (en) * 2019-03-07 2020-09-10 株式会社村田製作所 High frequency circuit and communication device
JP2021129223A (en) * 2020-02-14 2021-09-02 株式会社村田製作所 High frequency circuit, high frequency module, and communication device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009060652A1 (en) * 2007-11-05 2009-05-14 Nec Corporation Power amplifier and radio wave transmitter having the same
JP2019536307A (en) * 2016-09-30 2019-12-12 テレフオンアクチーボラゲット エルエム エリクソン（パブル） Method and node for cell selection in a wireless communication network
JP2020145613A (en) * 2019-03-07 2020-09-10 株式会社村田製作所 High frequency circuit and communication device
JP2021129223A (en) * 2020-02-14 2021-09-02 株式会社村田製作所 High frequency circuit, high frequency module, and communication device

Similar Documents

Publication Publication Date Title
US9866176B2 (en) Apparatus and methods for envelope shaping in mobile devices
US20060293005A1 (en) Wireless transmission apparatus, polar modulation transmission apparatus, and wireless communication apparatus
CN104601194A (en) Radio frequency front end module with high band selectivity
US9698731B2 (en) Power amplifier, transceiver, and base station
US9432946B2 (en) Transmission apparatus and transmission method
KR20050098293A (en) Software defined multiple transmit architecture
KR20180115219A (en) Power amplifier module and radio frequency module
US5689817A (en) RF duplexer bypassing techniques for transceivers
US20100003932A1 (en) Transmitter and communication apparatus using the same
JP2006510257A (en) Maintaining linearity of isolator-free power amplifier by dynamic adjustment of gain and phase
US11394348B2 (en) Power amplifier circuit
WO2023120086A1 (en) High-frequency circuit, tracking circuit, and electric power amplification circuit
US20100222016A1 (en) Wireless communication device
US20230238987A1 (en) Radio-frequency circuit and communication apparatus
EP2754238B1 (en) Envelope tracking power amplifier with low impedance supply feed
WO2022074942A1 (en) High frequency circuit
JP2002016448A (en) Radio frequency amplifier circuit and receiving chain circuit
JP2008205821A (en) High-frequency power amplifier and transmitter using it
JPH0946264A (en) Linear modulation radio transmitter/receiver and its power control method
JP2022122840A (en) Load modulated doherty power amplifiers
WO2023127397A1 (en) Power amplification circuit and high-frequency circuit
WO2023002778A1 (en) Power amplification circuit and power amplification method
WO2024095758A1 (en) Amplification system, amplification module and method for driving amplification system
US20240162860A1 (en) Power amplifier circuit and power amplification method
WO2023007996A1 (en) Power amplification circuit and communication apparatus

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22910803

Country of ref document: EP

Kind code of ref document: A1