WO2023115548A1 - 一种电源开关控制电路和电器 - Google Patents

一种电源开关控制电路和电器 Download PDF

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Publication number
WO2023115548A1
WO2023115548A1 PCT/CN2021/141265 CN2021141265W WO2023115548A1 WO 2023115548 A1 WO2023115548 A1 WO 2023115548A1 CN 2021141265 W CN2021141265 W CN 2021141265W WO 2023115548 A1 WO2023115548 A1 WO 2023115548A1
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Prior art keywords
terminal
module
control
charging
time
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PCT/CN2021/141265
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English (en)
French (fr)
Inventor
蒋伟
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广州视源电子科技股份有限公司
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Priority to CN202180031886.4A priority Critical patent/CN116648857A/zh
Priority to PCT/CN2021/141265 priority patent/WO2023115548A1/zh
Publication of WO2023115548A1 publication Critical patent/WO2023115548A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/04—Modifications for accelerating switching

Definitions

  • the embodiments of the present application relate to the technical field of power supplies, and in particular to a power switch control circuit and electrical appliances.
  • the power switch control circuit is widely used in the circuit design of various electronic equipment to control the power system. Power on and off.
  • the existing power switch control circuit has the problem that the on-off time of the power supply cannot be adjusted, and it is difficult to meet the different needs of different electronic devices for the power-on and power-off time, such as the power-on and power-off time of the display screens of different manufacturers. Lengths will vary. Therefore, the design of a power switch control circuit with bidirectional controllable power on and off time has become an urgent problem to be solved.
  • the embodiments of the present application provide a power switch control circuit and an electrical appliance, so as to realize bidirectional independent adjustment of power-on time and power-off time.
  • the embodiment of the present application provides a power switch control circuit, including:
  • a switch module including a control terminal, an input terminal and an output terminal; the input terminal of the switch module is connected to an input power signal;
  • the charging and discharging module includes a control terminal, a first terminal, a second terminal, a third terminal and a fourth terminal; the control terminal of the charging and discharging module is connected to a switch control signal, and the first terminal of the charging and discharging module is connected to the The input power signal, the second terminal of the charging and discharging module is grounded, and the third terminal of the charging and discharging module is electrically connected to the control terminal of the switch module;
  • a time control module is connected between the third terminal and the fourth terminal of the charging and discharging module, as an auxiliary charging and discharging path between the third terminal and the fourth terminal of the charging and discharging module, and
  • the charge and discharge module together controls the charge and discharge time of the control terminal of the switch module.
  • the time control module includes: a control terminal, a first terminal, a second terminal, a third terminal and a fourth terminal; the control terminal of the time control module accesses a time control signal, and the first terminal of the time control module One end is connected to the input power signal, the second end of the time control module is grounded, the third end of the time control module is electrically connected to the third end of the charging and discharging module, and the first end of the time control module
  • the four terminals are electrically connected to the fourth terminal of the charging and discharging module; the time control module is used to control the connection or disconnection between the third terminal and the fourth terminal of the time control module according to the time control signal .
  • time control module also includes:
  • Time control unit the control terminal of the time control unit is used as the control terminal of the time control module, the first terminal of the time control unit is used as the first terminal of the time control module, and the second terminal of the time control unit is terminal as the second terminal of the time control module; the time control unit is used to generate an auxiliary control signal according to the time control signal;
  • Auxiliary charging and discharging unit the control terminal of the auxiliary charging and discharging unit is electrically connected to the output terminal of the time control unit, the first terminal of the auxiliary charging and discharging unit serves as the fourth terminal of the time control module, and the auxiliary charging and discharging unit
  • the second terminal of the charging and discharging unit is used as the third terminal of the time control module; the auxiliary charging and discharging unit is used to be turned on or off according to the auxiliary control signal.
  • the time control unit includes: a first transistor, a first resistor and a second resistor; the first terminal of the first resistor serves as the control terminal of the time control unit, and the second terminal of the first resistor It is electrically connected to the control pole of the first transistor; the first pole of the first transistor is used as the second terminal of the time control unit; the second pole of the first transistor is connected to the second terminal of the second resistor Terminals are electrically connected and serve as the output terminal of the time control unit; the first terminal of the second resistor serves as the first terminal of the time control unit.
  • the auxiliary charging and discharging unit includes: a first MOS transistor and a second MOS transistor; the gate of the first MOS transistor is electrically connected to the gate of the second MOS transistor, and serves as the auxiliary charging and discharging unit.
  • the control terminal of the unit; the first pole of the first MOS transistor is used as the first end of the auxiliary charging and discharging unit, and the second pole of the first MOS transistor is electrically connected to the first pole of the second MOS transistor ;
  • the second pole of the second MOS transistor is used as the second end of the auxiliary charging and discharging unit;
  • polarities of the first MOS transistor and the second MOS transistor are different.
  • the first MOS transistor is a PMOS transistor
  • the second MOS transistor is an NMOS transistor
  • the switch module includes: a second transistor; the control pole of the second transistor serves as the control terminal of the switch module, the first pole of the second transistor serves as the input terminal of the switch module, and the The second pole of the second transistor serves as the output end of the switch module.
  • the second transistor is a PMOS transistor.
  • the charging and discharging module includes:
  • a switch control unit the control terminal of the switch control unit is connected to the switch control signal, the first terminal of the switch control unit is connected to the input power signal, and the second terminal of the switch control unit is grounded;
  • Charge and discharge unit the first end of the charge and discharge unit is electrically connected to the output end of the switch control unit, the second end of the charge and discharge unit is connected to the input power signal, and the third end of the charge and discharge unit The terminal is electrically connected to the control terminal of the switch module.
  • the switch control unit includes: a third resistor, a fourth resistor and a third transistor; the first terminal of the third resistor serves as the control terminal of the switch control unit, and the second terminal of the third resistor It is electrically connected with the control pole of the third transistor; the first pole of the third transistor is used as the second terminal of the switch control unit; the second pole of the third transistor is connected with the second pole of the fourth resistor Terminals are electrically connected and used as the output terminal of the switch control unit; the first terminal of the fourth resistor is used as the first terminal of the switch control unit.
  • the charging and discharging unit includes: a fifth resistor and a first capacitor; the first end of the fifth resistor is used as the first end of the charging and discharging unit; the second end of the fifth resistor is connected to the The second terminal of the first capacitor is electrically connected and serves as the third terminal of the charging and discharging unit; the first terminal of the first capacitor serves as the second terminal of the charging and discharging unit.
  • an embodiment of the present application provides an electrical appliance, including a load and any one of the power switch control circuits described above, and an output terminal of the switch module is electrically connected to the load.
  • the load is a display screen.
  • the power switch provided above controls circuits and electrical appliances.
  • the proposed power switch control circuit is provided with a switch module, a charging and discharging module and a time control module.
  • the on-off between the second terminal and the fourth terminal of the charging and discharging module controls the charging or discharging process of the control terminal of the switching module;
  • the conduction time of the time control module precise control of the discharge time and/or charge time of the control terminal of the switch module can be realized, thereby realizing precise control of the power-up time and/or power-down time of the power supply. Therefore, compared with some technologies, the embodiment of the present application can realize the bidirectional independent adjustment of the power-up time and power-down time of the power supply, and improve the versatility of the power switch control circuit.
  • FIG. 1 is a schematic structural diagram of a power switch control circuit provided by an embodiment of the present application
  • FIG. 2 is a schematic structural diagram of another power switch control circuit provided by an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of another power switch control circuit provided by an embodiment of the present application.
  • the power-consuming system in the digital circuit has strict timing requirements for the power-on and power-off processes of the power supply.
  • the time when the power signal rises from 0.1 times the rated value to 0.9 times the rated value when the display is turned on is recorded as the power-on time, and the power-on time is required to be between 0.5-10.0ms;
  • the time from when the screen is powered on (the power signal rises to 0.9 times the rated value) to when the data signal starts to transmit is recorded as the waiting time, and the waiting time is required to be between 0-50ms; other timing requirements will not be listed one by one.
  • the power-on sequence and power-off sequence of the display screen have strict time or speed requirements, and the signal transmission sequence between power-on and power-off is also closely related to the power-on and power-off process. If there is an error in the power sequence, it will affect the normal display of the display.
  • the display screens of different manufacturers have different requirements for the length of power-on and power-off time; especially in the trend of interface standardization and the scenario of compatible use of multiple display screens, it is even more required that the power switch time be bidirectionally controllable .
  • the power switch control circuit in some technologies either adds a MOS tube (Metal-Oxide-Semiconductor Field-Effect Transistor) at the output end of the power supply, and changes the MOS transistor by adjusting the high and low levels of the switch control signal.
  • MOS tube Metal-Oxide-Semiconductor Field-Effect Transistor
  • the on-off state of the tube is used to achieve the purpose of power on-off; but this solution only has the switching function, and the speed of power signal output and stop output is completely determined by the switching speed of the MOS tube itself, which is not controllable.
  • FIG. 1 is a schematic structural diagram of a power switch control circuit provided by an embodiment of the present application.
  • the power switch control circuit includes: a switch module 10 , a charging and discharging module 20 and a time control module 30 .
  • the switch module 10 includes a control terminal 11 , an input terminal 12 and an output terminal 13 ; the input terminal 12 of the switch module 10 is connected to the input power signal VIN.
  • the charge and discharge module 20 includes a control terminal 25, a first terminal 21, a second terminal 22, a third terminal 23 and a fourth terminal 24; the control terminal 25 of the charge and discharge module 20 is connected to the switch control signal PWR_CTR, and the first terminal 21 is connected to The power signal VIN is input, the second terminal 22 is grounded, and the third terminal 23 is electrically connected to the control terminal 11 of the switch module 10 .
  • the time control module 30 is connected between the third terminal 23 and the fourth terminal 24 of the charging and discharging module 20, as an auxiliary charging and discharging path between the third terminal 23 and the fourth terminal 24 of the charging and discharging module 20, and is connected with the charging and discharging module. 20 together to control the charge and discharge time of the control terminal 11 of the switch module 10 , that is, the auxiliary charge and discharge module 20 controls the charge and discharge time of the control terminal 11 of the switch module 10 .
  • the on-off control of the switch module 10 is realized by controlling the charging and discharging time of the control terminal 11 of the switch module 10 .
  • the switch module 10 is used to turn on or off according to the potential of its control terminal 11 .
  • the input power signal VIN can be converted into the normal output of the output signal VOUT, which is equivalent to the power-on process; during the disconnection process of the switch module 10, the transmission path of the input power signal VIN is cut off, which is equivalent to in the power-down process.
  • the charging and discharging module 20 is used to control the connection or disconnection between the second terminal 22 and the fourth terminal 24 in response to the switch control signal PWR_CTR.
  • the control end 11 of the switch module 10 is connected to the ground through the third end 23, the fourth end 24 and the second end 22 of the charging and discharging module 20. Discharging, for example, when the control terminal 11 of the switch module 10 is discharged to the first threshold voltage, the first module 10 is fully turned on, and the power-on process is completed.
  • the input power signal VIN is controlled by the first terminal 21, the fourth terminal 24 and the third terminal 23 of the charging and discharging module 20 to the switch module 10
  • the terminal 11 is charged. For example, when the control terminal 11 of the switch module 10 is charged to the second threshold voltage, the first module 10 is completely turned off, and the power-off process is completed.
  • the time control module 30 When the time control module 30 is turned on, that is, the auxiliary charging and discharging path is turned on, which is equivalent to increasing the charging path or discharging path of the control terminal 11 of the switch module 10, thereby accelerating the charging and discharging speed of the control terminal 11 of the switch module 10, reducing The time for the control terminal 11 of the switch module 10 to charge to the second threshold voltage or the time to discharge to the first threshold voltage. Then, during the charge and discharge process, by controlling the conduction time of the auxiliary charge and discharge path, precise control of the charge and discharge time can be achieved.
  • the control auxiliary charging and discharging path the shorter the discharge time of the control terminal 11 of the switch module 10, and the shorter the power-on time; during the power-off process, the control auxiliary The larger the proportion of the conduction time of the charging and discharging path is, the shorter the charging time of the control terminal 11 of the switch module 10 is, and the shorter the power-down time is.
  • a switch module 10 In the power switch control circuit provided in the embodiment of the present application, a switch module 10 , a charging and discharging module 20 and a time control module 30 are provided.
  • the on-off between the second terminal 22 and the fourth terminal 24 of the charge-discharge module 20 controls the control terminal 11 of the switch module 10 to carry out the charging or discharging process; Turning on can speed up the charging process of the control terminal 11 of the switch module 10 , and turning on can speed up the discharging process of the control terminal 11 of the switch module 10 during discharge.
  • the embodiment of the present application can realize bidirectional independent adjustment of power-on time and power-off time, and improve the versatility of the power switch control circuit.
  • the time control module 30 includes: a control terminal 35, a first terminal 31, a second terminal 32, a third terminal 33 and a fourth terminal 34; the time control module 30
  • the control terminal 25 of the control terminal 25 is connected to the time control signal TIME_CTR
  • the first terminal 31 is connected to the input power signal VIN
  • the second terminal 32 is grounded
  • the third terminal 33 is electrically connected to the third terminal 23 of the charging and discharging module 20
  • the fourth terminal 34 is connected to the The fourth terminal 24 of the charging and discharging module 20 is electrically connected
  • the time control module 30 is used to control the connection or disconnection between the third terminal 33 and the fourth terminal 34 of the time control module 30 according to the time control signal TIME_CTR.
  • the path between the third terminal 33 and the fourth terminal 34 of the time control module 30 is used as an auxiliary charging and discharging path, when the conduction between the third terminal 33 and the fourth terminal 34 of the time control module 30 can speed up the switching The charging and discharging time of the control terminal 11 of the module 10 . Then, by controlling the high and low levels and time width of the time control signal TIME_CTR, the conduction time of the auxiliary charging and discharging path can be controlled. Through the cooperation of the switch control signal PWR_CTR and the time control signal TIME_CTR, the timing control of the power-on process and/or power-off process can be realized.
  • FIG. 2 is a schematic structural diagram of another power switch control circuit provided by an embodiment of the present application.
  • the time control module 30 includes: a time control unit 310 and an auxiliary charging and discharging unit 320 .
  • the control end of the time control unit 310 is used as the control end of the time control module 30, and the time control signal TIME_CTR is connected; the first end of the time control unit 310 is used as the first end of the time control module 30, and the input power signal VIN is connected; the time control The second end of the unit 310 serves as the second end of the time control module 30 and is grounded.
  • the control end of the auxiliary charging and discharging unit 320 is electrically connected to the output end of the time control unit 310, and the first end of the auxiliary charging and discharging unit 320 is used as the fourth end of the time control module 30, and is electrically connected to the fourth end of the charging and discharging module 20;
  • the second terminal of the auxiliary charging and discharging unit 320 serves as the third terminal of the time control module 30 and is electrically connected to the third terminal of the charging and discharging module 20 .
  • the time control unit 310 is used to generate an auxiliary control signal according to the time control signal TIME_CTR;
  • the auxiliary charging and discharging unit 320 is used as an auxiliary charging and discharging path, and is used to turn on or off according to the auxiliary control signal.
  • the charging and discharging module 20 includes: a switch control unit 210 and a charging and discharging unit 220 .
  • the control terminal of the switch control unit 210 is connected to the switch control signal PWR_CTR, the first terminal is connected to the input power signal VIN, and the second terminal is grounded.
  • the first terminal of the charging and discharging unit 220 is electrically connected to the output terminal of the switch control unit 210 , the second terminal is connected to the input power signal VIN, and the third terminal is electrically connected to the control terminal 11 of the switch module 10 .
  • the switch control unit 210 is used to respond to the switch control signal PWR_CTR to control whether the second terminal and the output terminal are conducting; when the two terminals of the switch control unit 210 and the output terminal are conducting, the control of the switch module 10 terminal is discharged through the charge and discharge module 220; when the two terminals of the switch control unit 210 are disconnected from the output terminal, the input power signal VIN charges the control terminal of the switch module 10 through the switch control unit 210 and the charge and discharge unit 220.
  • the above-mentioned implementations exemplarily provide the functional unit structure of the power switch control circuit.
  • the specific circuit structure that the power switch control circuit may have will be described below in conjunction with specific embodiments.
  • FIG. 3 is a schematic structural diagram of another power switch control circuit provided by an embodiment of the present application.
  • the switch module 10 includes: a second transistor Q2; the control pole of the second transistor Q2 serves as the control terminal of the switch module 10, and the first pole serves as the input terminal of the switch module 10 , the second pole serves as the output end of the switch module 10 .
  • the switch module 10 only includes one transistor, which makes the circuit structure simple and easy to implement.
  • the second transistor Q2 may be a PMOS transistor (P-channel MOS transistor), the control pole of which is a gate, the first pole is a source, and the second pole is a drain.
  • the switch control unit 210 includes: a third resistor R3, a fourth resistor R4, and a third transistor Q3; the first end of the third resistor R3 serves as a switch control The control end of the unit 210 is connected to the switch control signal PWR_CTR; the second end of the third resistor R3 is electrically connected to the control electrode of the third transistor Q3; the first electrode of the third transistor Q3 is used as the second end of the switch control unit 210, grounding; the second pole of the third transistor R3 is electrically connected to the second end of the fourth resistor R4, and serves as the output end of the switch control unit 210; the first end of the fourth resistor R4 serves as the first end of the switch control unit 210, Connect to the input power signal VIN.
  • the third transistor Q3 may be an NPN transistor, the control pole of which is a base, the first pole is an emitter, and the second pole is a
  • the charging and discharging unit 220 includes: a fifth resistor R5 and a first capacitor C1 .
  • the first end of the fifth resistor R5 is used as the first end of the charging and discharging unit 220, and is electrically connected to the output end of the switch control unit 210; the second end of the fifth resistor R5 is electrically connected to the second end of the first capacitor C1, and As the third terminal of the charging and discharging unit 220, it is electrically connected to the control electrode of the second transistor Q2; the first terminal of the first capacitor C1 is used as the second terminal of the charging and discharging unit 220, connected to the input power signal VIN.
  • the time control unit 310 includes: a first transistor Q1, a first resistor R1 and a second resistor R2; the first end of the first resistor R1 serves as a time control
  • the control terminal of the unit 310 is connected to the time control signal TIME_CTR; the second terminal of the first resistor R1 is electrically connected to the control electrode of the first transistor Q1; the first terminal of the first transistor Q1 is used as the second terminal of the time control unit 310, Grounded; the second pole of the first transistor Q1 is electrically connected to the second end of the second resistor R2, and serves as the output end of the time control unit 310; the first end of the second resistor R2 serves as the first end of the time control unit 310, Connect to the input power signal VIN.
  • the first transistor Q1 may be an NPN transistor, the control pole of which is a base, the first pole is an emitter, and the second pole is a
  • the auxiliary charging and discharging unit 320 includes: a first MOS transistor Q4 and a second MOS transistor Q5; a gate of the first MOS transistor Q4 and a second MOS transistor Q5
  • the gate of Q5 is electrically connected, and is used as the control terminal of the auxiliary charging and discharging unit 320, and is electrically connected to the output terminal of the time control unit 310;
  • the first pole of the first MOS transistor Q4 is used as the first end of the auxiliary charging and discharging unit 220, and
  • the first end of the fifth resistor R5 is electrically connected;
  • the second pole of the first MOS transistor Q4 is electrically connected to the first pole of the second MOS transistor Q5;
  • the second pole of the second MOS transistor Q5 is used as the first pole of the auxiliary charging and discharging unit 320
  • the two terminals are electrically connected to the second end of the fifth resistor R5.
  • the polarities of the first MOS transistor Q4 and the second MOS transistor Q5 are different, and both the first MOS transistor Q4 and the second MOS transistor Q5 have body diodes.
  • the auxiliary charging and discharging unit 320 is disconnected; when any one of the MOS transistors is turned on, the current on the auxiliary charging and discharging unit 220 can pass through the turned-on MOS transistor and the other MOS transistor.
  • the body diode normally flows, that is, the auxiliary charging and discharging unit 320 is turned on.
  • the first MOS transistor is a PMOS transistor, the first pole is the source, and the second pole is the drain; the second MOS transistor is an NMOS transistor (N-channel MOS transistor), the first pole is the source, and the second pole is the drain .
  • the working process of the power switch circuit includes:
  • both the first transistor Q1 and the third transistor Q3 are turned on; the ground signal is transmitted to the first MOS transistor Q4 and the second MOS transistor Q5 through the first transistor Q1 gate, and the ground signal is transmitted to the first pole (source) of the first MOS transistor Q4 through the third transistor Q3, therefore, both the first MOS transistor Q4 and the second MOS transistor Q5 are disconnected; the first capacitor C1 and the second capacitor C1
  • the five resistors R5 form an RC discharge path.
  • the third transistor Q3 When the switch control signal PWR_CTR is at a high level and the time control signal TIME_CTR is at a low level, the third transistor Q3 is turned on and the first transistor Q1 is turned off; the ground signal is transmitted to the first MOS transistor Q4 through the third transistor Q3 pole, and the input power signal VIN is transmitted to the gates of the first MOS transistor Q4 and the second MOS transistor Q5 through the second resistor R2, therefore, the first MOS transistor Q4 is turned off, and the second MOS transistor Q5 is turned on; the first MOS transistor Q5
  • the body diode of the transistor Q4 and the second MOS transistor Q5 form a discharge path from the second end of the first capacitor C1 to the third transistor Q3, that is, form an auxiliary discharge path, and the on-resistance of the auxiliary discharge path is equal to that of the first MOS transistor Q4
  • the first capacitor C1 is discharged through two channels of the fifth resistor R5 and the auxiliary discharge path, and its discharge speed is faster than only through the fifth resistor R5.
  • the smaller the on-resistance of the auxiliary discharge path is the smaller the equivalent impedance of the overall parallel structure of the fifth resistor R5 and the auxiliary discharge path is, and the faster the discharge speed is.
  • the smaller the conduction resistance of the auxiliary discharge path is the faster the discharge speed is, and the closer the discharge time is to zero.
  • the switch control signal PWR_CTR when the switch control signal PWR_CTR is at a high level, it is a power-on stage, that is, the second transistor Q2 is controlled to be turned on, so that the input power signal VIN can be converted into an output signal VOUT, and power is normally supplied to the subsequent circuit.
  • the time from discharging the second terminal of the first capacitor C1 (ie, the control electrode of the second transistor Q2 ) to triggering the opening of the second transistor Q2 (denoted as t2 ) depends on the level transition time of the time control signal TIME_CTR.
  • time control signal TIME_CTR changes from high level to low level at time t0, where t0 ⁇ t2max, then the first capacitor C1 discharges through the fifth resistor R5 before t0, and discharges through the fifth resistor R5 and auxiliary discharge after t0
  • the two channels of the path are discharged, and the discharge time is slightly longer than t0 at this time. Therefore, by controlling the time when the time control signal TIME_CTR changes from a high level to a low level, it can theoretically be realized: 0 ⁇ t2 ⁇ t1.
  • both the first transistor Q1 and the third transistor Q3 are turned off; the input power signal VIN is transmitted to the first MOS transistor Q4 and the second MOS transistor through the second resistor R2
  • the gate of Q5, and the input power signal VIN is transmitted to the first pole of the first MOS transistor Q4 through the fourth resistor R4, therefore, both the first MOS transistor Q4 and the second MOS transistor Q5 are disconnected; the first capacitor C1 and the second MOS transistor Q5 are disconnected;
  • the four resistors R4 and the fifth resistor R5 form an RC charging path.
  • the second transistor Q2 When the control electrode of the second transistor Q2 is charged until the gate-source voltage difference is greater than its threshold voltage value, the second transistor Q2 is turned off. In this case, the second transistor Q2
  • the third transistor Q3 is turned off and the first transistor Q1 is turned on; the ground signal is transmitted to the first MOS transistor Q4 and the second transistor Q1 through the first transistor Q1
  • the gate of the MOS transistor Q5, and the input power signal VIN is transmitted to the first pole of the first MOS transistor Q4 through the fourth resistor R4, therefore, the first MOS transistor Q4 is turned on, and the second MOS transistor Q5 is turned off; the first MOS transistor Q5
  • the body diode of the transistor Q4 and the second MOS transistor Q5 forms a charging path from the fourth resistor R4 to the first capacitor C1, that is, forms an auxiliary charging path, and the on-resistance of the auxiliary charging path is the on-resistance of the first MOS transistor Q4 and The sum of equivalent impedances of the body diodes of the second MOS transistor Q5.
  • the first capacitor C1 is charged through the fifth resistor R5 and the auxiliary charging path, and the charging speed is faster than that only through the fifth resistor after passing through the fourth resistor R4.
  • R5 charges.
  • the time constant of the RC charging path formed by the four resistors R4 and the first capacitor C1 is R4*C1.
  • the switch control signal PWR_CTR when the switch control signal PWR_CTR is at a low level, it is a power-down stage, that is, a stage of controlling the second transistor Q2 to turn off and cutting off the transmission path of the input power signal VIN.
  • the input power signal VIN charges the first capacitor C1 through the fifth resistor R5 and the auxiliary charging path after passing through the fourth resistor R4. At this time, In the case of the shortest charging time, the minimum charging time t4min can approach R4*C1.
  • the input power signal VIN charges the first capacitor C1 through the fourth resistor R4 and the fifth resistor R5 before t00; After t00, the input power signal VIN charges the first capacitor C1 through the fifth resistor R5 and the auxiliary charging path after passing through the fourth resistor R4, and the charging time is slightly longer than t00. Therefore, by controlling the time when the time control signal TIME_CTR changes from low level to high level, it can theoretically be realized: R4*C1 ⁇ t4 ⁇ t3.
  • the embodiment of the present application provides a power switch control circuit, which can independently control the power-on and power-off edge times, and the circuit implementation and logic are simple, and the cost is low.
  • the control of the switching speed of the power supply can be realized through the control of parameters and software.
  • Software control can adjust to the best power-on and power-off sequence state of the corresponding device. Specifically, by controlling the high and low levels of the switch control signal PWR_CTR, the high and low levels and the time width of the time control signal TIME_CTR, accurate control of the edge time of the two processes of turning on and turning off the second transistor Q2 can be realized, so that the The circuit can be applied to the flexible control of power-up and power-down sequences of various power consumption systems.
  • time control range can be achieved: the time ton control range for the second transistor Q2 to be turned on: 0 ⁇ ton ⁇ R5*C1; the toff control range for the second transistor Q2 to be turned off: R4*C1 ⁇ toff ⁇ (R4+R5) *C1.
  • the two processes of power-on and power-off can be controlled independently without affecting each other, which is beneficial to avoid overshoot caused by fast power-on speed and shutdown voltage rise caused by inappropriate power-down speed.
  • An embodiment of the present application also provides an electrical appliance, including a load and the power switch control circuit described in any one of the above embodiments, and an output terminal of a switch module of the power switch control circuit is electrically connected to the load.
  • the load may be a display screen, such as a display screen with a touch function.
  • the electrical appliance may be a household appliance, such as a refrigerator, a range hood, an air conditioner, a washing machine, a dishwasher, and the like.

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Abstract

本申请公开了一种电源开关控制电路和电器。电源开关控制电路包括：开关模块、充放电模块和时间控制模块。开关模块的输入端接入输入电源信号；充放电模块的控制端接入开关控制信号，充放电模块的第一端接入输入电源信号，充放电模块的第二端接地，充放电模块的第三端与开关模块的控制端电连接；时间控制模块连接在充放电模块的第三端和第四端之间，作为充放电模块的第三端和第四端之间的辅助充放电路径，辅助充放电模块控制开关模块的控制端的充放电时间。本申请实施例可以实现电源上电时间和掉电时间的双向独立可调。

Description

一种电源开关控制电路和电器 技术领域
本申请实施例涉及电源技术领域，尤其涉及一种电源开关控制电路和电器。
背景技术
目前，数字电路中用电系统对电源的上电和掉电过程有严格的时序要求，因此，电源开关控制电路被广泛的应用于各种电子设备的电路设计中，用于控制用电系统的电源通断。但现有的电源开关控制电路存在电源通断时间不可调的问题，难以满足不同电子设备对电源上电和掉电时间的不同需求，例如不同厂家型号的显示屏对上电和掉电的时间长度都会存在差异。因此，电源通断时间双向可控的电源开关控制电路的设计成为亟待解决的问题。
发明内容
有鉴于此，本申请实施例提供了一种电源开关控制电路和电器，以实现电源上电时间和掉电时间的双向独立可调。
第一方面，本申请实施例提供了一种电源开关控制电路，包括：
开关模块，包括控制端，输入端和输出端；所述开关模块的输入端接入输入电源信号；
充放电模块，包括控制端、第一端、第二端、第三端和第四端；所述充放电模块的控制端接入开关控制信号，所述充放电模块的第一端接入所述输入电源信号，所述充放电模块的第二端接地，所述充放电模块的第三端与所述开关模块的控制端电连接；
时间控制模块，所述时间控制模块连接在所述充放电模块的第三端和第四端之间，作为所述充放电模块的第三端和第四端之间的辅助充放电路径，与所述充放电模块一起控制所述开关模块的控制端的充放电时间。
进一步地，所述时间控制模块包括：控制端、第一端、第二端、第三端和第四端；所述时间控制模块的控制端接入时间控制信号，所述时间控制模块的第一端接入所述输入电源信号，所述时间控制模块的第二端接地，所述时间控制模块的第三端与所述充放电模块的第三端电连接，所述时间控制模块的第四端与所述充放电模块的第四端电连接；所述时间控制模块用于根据所述时间控制信号，控制所述时间控制模块的第三端和第四端之间导通或断开。
进一步地，所述时间控制模块还包括：
时间控制单元；所述时间控制单元的控制端作为所述时间控制模块的控制端，所述时间控制单元的第一端作为所述时间控制模块的第一端，所述时间控制单元的第二端作为所述时间控制模块的第二端；所述时间控制单元用于根据所述时间控制信号生成辅助控制信号；
辅助充放电单元；所述辅助充放电单元的控制端与所述时间控制单元的输出端电连接，所述辅助充放电单元的第一端作为所述时间控制模块的第四端，所述辅助充放电单元的第二端作为所述时间控制模块的第三端；所述辅助充放电单元用于根据所述辅助控制信号导通或断开。
进一步地，所述时间控制单元包括：第一晶体管、第一电阻和第二电阻；所述第一电阻的第一端作为所述时间控制单元的控制端，所述第一电阻的第二端与所述第一晶体管的控制极电连接；所述第一晶体管的第一极作为所述时间控制单元的第二端；所述第一晶体管的第二极与所述第二电阻的第二端电连接，并作为所述时间控制单元的输出端；所述第二电阻的第一端作为所述时间控制单元的第一端。
进一步地，所述辅助充放电单元包括：第一MOS管和第二MOS管；所述第一MOS管的栅极与所述第二MOS管的栅极电连接，并作为所述辅助充放电单元的控制端；所述第一MOS管的第一极作为所述辅助充放电单元的第一端，所述第一MOS管的第二极与所述第二MOS管的第一极电连接；所述第二MOS管的第二极作为所述辅助充放电单元的第二端；
其中，所述第一MOS管与所述第二MOS管的极性不同。
进一步地，所述第一MOS管为PMOS管，所述第二MOS管为NMOS管。
进一步地，所述开关模块包括：第二晶体管；所述第二晶体管的控制极作为所述开关模块的控制端，所述第二晶体管的第一极作为所述开关模块的输入端，所述第二晶体管的第二极作为所述开关模块的输出端。
进一步地，所述第二晶体管为PMOS管。
进一步地，所述充放电模块包括：
开关控制单元；所述开关控制单元的控制端接入所述开关控制信号，所述开关控制单元的第一端接入所述输入电源信号，所述开关控制单元的第二端接地；
充放电单元；所述充放电单元的第一端与所述开关控制单元的输出端电连接，所述充放电单元的第二端接入所述输入电源信号，所述充放电单元的第三端与所述开关模块的控制端电连接。
进一步地，所述开关控制单元包括：第三电阻、第四电阻和第三晶体管；所述第三电阻的第一端作为所述开关控制单元的控制端，所述第三电阻的第二端与所述第三晶体管的控制极电连接；所述第三晶体管的第一极作为所述开关控制单元的第二端；所述第三晶体管的第二极与所述第四电阻的第二端电连接，并作为所述开关控制单元的输出端；所述第四电阻的第一端作为所述开关控制单元的第一端。
进一步地，所述充放电单元包括：第五电阻和第一电容；所述第五电阻的第一端作为所述充放电单元的第一端；所述第五电阻的第二端与所述第一电容的第二端电连接，并作为所述充放电单元的第三端；所述第一电容的第一端作为所述充放电单元的第二端。
第二方面，本申请实施例提供了一种电器，包括负载和上述任一所述的电源开关控制电路，所述开关模块的输出端与所述负载形成电连接。
进一步地，所述负载为显示屏。
上述提供的电源开关控制电路和电器。所提出的电源开关控制电路中设置有开关模块、充放电模块和时间控制模块。其中，充放电模块的第二端和第四端之间的通断控制着开关模块的控制端进行充电或放电过程；时间控制模块作为辅助充放电路径，在充电时导通可以加速开关模块的控制端的充电过程，在放电时导通可以加速开关模块的控制端的放电过程。因此，通过控制时间控制模块的导通时间，可以实现对开关模块的控制端的放电时间和/或充电时间的精确控制，进而实现对电源上电时间和/或掉电时间的精确控制。因此，与一些技术相比，本申请实施例可以实现电源上电时间和掉电时间的双向独立可调，提高电源开关控制电路的通用性。
附图说明
通过阅读参照以下附图所作的对非限制性实施例所作的详细描述，本申请的其它特征、目的和优点将会变得更明显：
图1是本申请实施例提供的一种电源开关控制电路的结构示意图；
图2是本申请实施例提供的另一种电源开关控制电路的结构示意图；
图3是本申请实施例提供的又一种电源开关控制电路的结构示意图。
具体实施方式
下面结合附图和实施例对本申请作进一步的详细说明。可以理解的是，此处所描述的具体实施例仅仅用于解释本申请，而非对本申请的限定。另外还需要说明的是，为了便于描述，附图中仅示出了与本申请相关的部分而非全部结构。
下面结合附图和实施例对本申请作进一步的详细说明。可以理解的是，此处所描述的具体实施例仅仅用于解释本申请，而非对本申请的限定。另外还需要说明的是，为了便于描述，附图中仅示出了与本申请相关的部分而非全部结构。
正如背景技术所述，一些技术中的电源开关控制电路难以满足不同电子设备对电源上电 和掉电时间的不同需求，经申请人研究，原因如下：
一些技术中，数字电路中用电系统对电源的上电和掉电过程有严格的时序要求。以显示屏的电源供电需求为例，将显示屏开机时电源信号自0.1倍额定值升至0.9倍额定值的时间记为上电时间，上电时间要求在0.5-10.0ms之间；将显示屏上电完成(电源信号升至0.9倍额定值)至数据信号开始传输的时间记为等待时间，等待时间要求在0-50ms之间；其他时序要求不再一一列举。总之，显示屏的电源上电时序和掉电时序都有严格的时间或速度要求，并且在上电与掉电之间的信号传输时序也与上电掉电过程密切相关，若上电或掉电时序发生错误，会影响显示屏的正常显示。并且，不同厂家型号的显示屏对上电和掉电的时间长度要求都会存在差异；尤其在接口标准化的趋势下，以及兼容使用多款显示屏的场景下，更加要求电源开关时间的双向可控。
然而，一些技术中的电源开关控制电路，要么在电源输出端增设MOS管(金氧半场效晶体管，Metal-Oxide-Semiconductor Field-Effect Transistor)，通过调控开关控制信号的高低电平，改变MOS管的通断状态，来达到电源通断的目的；但该方案只具备开关功能，电源信号输出与停止输出的速度完全由MOS管自身的开关速度决定，并不可控。要么，在上一方案的基础上，增设RC延时电路，使MOS管的开关速度与RC延时电路的充放电时间有关；虽然该方案中通过调整电阻或电容的参数，可以调整电源的通断时间，但通断时间随电阻和电容的参数确定而固定，不能实现后期调节和通、断这两个边沿时间的单独控制。以及，当外设型号有更改时，接口电路的BOM(Bill Of Material，物料清单)参数也需要随之更改，不利于标准化的实现。
基于上述研究，本申请实施例提供了一种电源开关控制电路，以实现电源开关时间的双向独立可控，适用于显示屏电源接口、通信模块电源接口、以及其他大电流且有时序要求的用电系统。图1是本申请实施例提供的一种电源开关控制电路的结构示意图。参见图1，该电源开关控制电路包括：开关模块10、充放电模块20和时间控制模块30。
其中，开关模块10包括控制端11，输入端12和输出端13；开关模块10的输入端12接入输入电源信号VIN。充放电模块20包括控制端25、第一端21、第二端22、第三端23和第四端24；充放电模块20的控制端25接入开关控制信号PWR_CTR，第一端21接入输入电源信号VIN，第二端22接地，第三端23与开关模块10的控制端11电连接。时间控制模块30连接在充放电模块20的第三端23和第四端24之间，作为充放电模块20的第三端23和第四端24之间的辅助充放电路径，与充放电模块20一起控制开关模块10的控制端11的充放电时间，即辅助充放电模块20控制开关模块10的控制端11的充放电时间。通过控制开关模块10的控制端11的充放电时间来实现对开关模块10的通断的控制。
示例性地，在该电源开关控制电路中，开关模块10用于根据其控制端11的电位导通或断开。在开关模块10的导通过程中，输入电源信号VIN可以转换为输出信号VOUT正常输出，相当于上电过程；在开关模块10的断开过程中，输入电源信号VIN的传输路径被切断，相当于掉电过程。
充放电模块20用于响应开关控制信号PWR_CTR，控制其第二端22和第四端24之间导通或断开。当充放电模块20的第二端22和第四端24之间导通时，开关模块10的控制端11通过充放电模块20的第三端23、第四端24和第二端22对地放电，示例性地，当开关模块10的控制端11放电至第一阈值电压时，第一模块10完全导通，完成上电过程。当充放电模块20的第二端22和第四端24之间断开时，输入电源信号VIN通过充放电模块20的第一端21、第四端24和第三端23向开关模块10的控制端11充电，示例性地，当开关模块10的控制端11充电至第二阈值电压时，第一模块10完全断开，完成掉电过程。
当时间控制模块30导通时，即辅助充放电路径导通，相当于增加开关模块10的控制端11的充电路径或放电路径，从而加快开关模块10的控制端11的充放电速度，减小开关模块10的控制端11充电至第二阈值电压的时间或放电至第一阈值电压的时间。那么，在充放电 过程中，通过控制辅助充放电路径的导通时间，可以实现对充放电时间的精确控制。具体地，在上电过程中，控制辅助充放电路径的导通时间占比越大，开关模块10的控制端11的放电时间越短，上电时间越短；在掉电过程中，控制辅助充放电路径的导通时间占比越大，开关模块10的控制端11的充电时间越短，掉电时间越短。
本申请实施例提供的电源开关控制电路中，设置有开关模块10、充放电模块20和时间控制模块30。其中，充放电模块20的第二端22和第四端24之间的通断控制着开关模块10的控制端11进行充电或放电过程；时间控制模块30作为辅助充放电路径，在充电时导通可以加速开关模块10的控制端11的充电过程，在放电时导通可以加速开关模块10的控制端11的放电过程。因此，通过控制时间控制模块30的导通时间，可以实现对开关模块10的控制端11的放电时间和/或充电时间的精确控制，进而实现对电源上电时间和/或掉电时间的精确控制。因此，本申请实施例可以实现电源上电时间和掉电时间的双向独立可调，提高电源开关控制电路的通用性。
下面，就时间控制模块30在电路中可能具有的具体连接关系进行说明。继续参见图1，在一种实施方式中，可选地，时间控制模块30包括：控制端35、第一端31、第二端32、第三端33和第四端34；时间控制模块30的控制端25接入时间控制信号TIME_CTR，第一端31接入输入电源信号VIN，第二端32接地，第三端33与充放电模块20的第三端23电连接，第四端34与充放电模块20的第四端24电连接；时间控制模块30用于根据时间控制信号TIME_CTR，控制时间控制模块30的第三端33和第四端34之间导通或断开。其中，时间控制模块30的第三端33和第四端34之间的路径作为辅助充放电路径，当时间控制模块30的第三端33和第四端34之间导通时，可以加快开关模块10的控制端11充放电时间。那么，通过控制时间控制信号TIME_CTR的高低电平和时间宽度，可以控制辅助充放电路径的导通时间。通过开关控制信号PWR_CTR与时间控制信号TIME_CTR的配合，可以实现对电源上电过程和/或掉电过程的时序控制。
图2是本申请实施例提供的另一种电源开关控制电路的结构示意图。参见图2，在上述各实施方式的基础上，可选地，时间控制模块30包括：时间控制单元310和辅助充放电单元320。时间控制单元310的控制端作为时间控制模块30的控制端，接入时间控制信号TIME_CTR；时间控制单元310的第一端作为时间控制模块30的第一端，接入输入电源信号VIN；时间控制单元310的第二端作为时间控制模块30的第二端，接地。辅助充放电单元320的控制端与时间控制单元310的输出端电连接，辅助充放电单元320的第一端作为时间控制模块30的第四端，与充放电模块20的第四端电连接；辅助充放电单元320的第二端作为时间控制模块30的第三端，与充放电模块20的第三端电连接。
其中，时间控制单元310用于根据时间控制信号TIME_CTR生成辅助控制信号；辅助充放电单元320作为辅助充放电路径，用于根据辅助控制信号导通或断开。
继续参见图2，在上述各实施方式的基础上，可选地，充放电模块20包括：开关控制单元210和充放电单元220。开关控制单元210的控制端接入开关控制信号PWR_CTR，第一端接入输入电源信号VIN，第二端接地。充放电单元220的第一端与开关控制单元210的输出端电连接，第二端接入输入电源信号VIN，第三端与开关模块10的控制端11电连接。
其中，开关控制单元210用于响应开关控制信号PWR_CTR，控制其第二端与输出端之间是否导通；当开关控制单元210的二端与输出端之间导通时，开关模块10的控制端通过充放电模块220放电；当开关控制单元210的二端与输出端之间断开时，输入电源信号VIN通过开关控制单元210和充放电单元220向开关模块10的控制端充电。
上述各实施方式示例性地给出了电源开关控制电路的功能单元结构，下面结合具体实施例，对电源开关控制电路可能具有的具体电路结构进行说明。
图3是本申请实施例提供的又一种电源开关控制电路的结构示意图。参见图3，在一种实施方式中，可选地，开关模块10包括：第二晶体管Q2；第二晶体管Q2的控制极作为开关 模块10的控制端，第一极作为开关模块10的输入端，第二极作为开关模块10的输出端。本申请实施例设置开关模块10仅包括一个晶体管，使电路结构简单，易于实现。示例性地，第二晶体管Q2可以是PMOS管(P沟道MOS管)，其控制极为栅极，第一极为源极，第二极为漏极。
继续参见图3，在上述各实施方式的基础上，可选地，开关控制单元210包括：第三电阻R3、第四电阻R4和第三晶体管Q3；第三电阻R3的第一端作为开关控制单元210的控制端，接入开关控制信号PWR_CTR；第三电阻R3的第二端与第三晶体管Q3的控制极电连接；第三晶体管Q3的第一极作为开关控制单元210的第二端，接地；第三晶体管R3的第二极与第四电阻R4的第二端电连接，并作为开关控制单元210的输出端；第四电阻R4的第一端作为开关控制单元210的第一端，接入输入电源信号VIN。示例性地，第三晶体管Q3可以是NPN型三极管，其控制极为基极，第一极为发射极，第二极为集电极。
继续参见图3，在上述各实施方式的基础上，可选地，充放电单元220包括：第五电阻R5和第一电容C1。第五电阻R5的第一端作为充放电单元220的第一端，与开关控制单元210的输出端电连接；第五电阻R5的第二端与第一电容C1的第二端电连接，并作为充放电单元220的第三端，与第二晶体管Q2的控制极电连接；第一电容C1的第一端作为充放电单元220的第二端，接入输入电源信号VIN。
继续参见图3，在上述各实施方式的基础上，可选地，时间控制单元310包括：第一晶体管Q1、第一电阻R1和第二电阻R2；第一电阻R1的第一端作为时间控制单元310的控制端，接入时间控制信号TIME_CTR；第一电阻R1的第二端与第一晶体管Q1的控制极电连接；第一晶体管Q1的第一极作为时间控制单元310的第二端，接地；第一晶体管Q1的第二极与第二电阻R2的第二端电连接，并作为时间控制单元310的输出端；第二电阻R2的第一端作为时间控制单元310的第一端，接入输入电源信号VIN。示例性地，第一晶体管Q1可以是NPN型三极管，其控制极为基极，第一极为发射极，第二极为集电极。
继续参见图3，在上述各实施方式的基础上，可选地，辅助充放电单元320包括：第一MOS管Q4和第二MOS管Q5；第一MOS管Q4的栅极与第二MOS管Q5的栅极电连接，并作为辅助充放电单元320的控制端，与时间控制单元310的输出端电连接；第一MOS管Q4的第一极作为辅助充放电单元220的第一端，与第五电阻R5的第一端电连接；第一MOS管Q4的第二极与第二MOS管Q5的第一极电连接；第二MOS管Q5的第二极作为辅助充放电单元320的第二端，与第五电阻R5的第二端电连接。其中，第一MOS管Q4与第二MOS管Q5的极性不同，且第一MOS管Q4与第二MOS管Q5均具有体二极管。这样，当两个MOS管均断开时，辅助充放电单元320断开；当任意一个MOS管导通时，辅助充放电单元220上的电流可以通过导通的MOS管和另一个MOS管的体二极管正常流通，即辅助充放电单元320导通。示例性地，第一MOS管为PMOS管，第一极为源极，第二极为漏极；第二MOS管为NMOS管(N沟道MOS管)，第一极为源极，第二极为漏极。
示例性地，以图3的电路结构为例，该电源开关电路的工作过程包括：
当开关控制信号PWR_CTR与时间控制信号TIME_CTR均为高电平时，第一晶体管Q1与第三晶体管Q3均导通；地信号经过第一晶体管Q1传输至第一MOS管Q4和第二MOS管Q5的栅极，且地信号经过第三晶体管Q3传输至第一MOS管Q4的第一极(源极)，因此，第一MOS管Q4和第二MOS管Q5均断开；第一电容C1与第五电阻R5构成RC放电通路，当第二晶体管Q2的控制极(栅极)放电到其栅源电压差小于其阈值电压值时，第二晶体管Q2导通。第二晶体管Q2的打开时间(记为t1)为：t1＝τ1＝R5*C1，其中，τ1为RC放电通路的时间常数。
当开关控制信号PWR_CTR为高电平，时间控制信号TIME_CTR为低电平时，第三晶体管Q3导通，第一晶体管Q1断开；地信号经过第三晶体管Q3传输至第一MOS管Q4的第一极，且输入电源信号VIN经过第二电阻R2传输至第一MOS管Q4和第二MOS管Q5的栅极，因此，第一MOS管Q4断开，第二MOS管Q5导通；第一MOS管Q4的体二极管和第二MOS管Q5形成 从第一电容C1的第二端到第三晶体管Q3的放电路径，即形成辅助放电路径，辅助放电路径的导通阻抗为第一MOS管Q4的体二极管的等效阻抗和第二MOS管Q5的导通阻抗之和。那么，第一电容C1通过第五电阻R5和辅助放电路径两条通道放电，其放电速度快于仅通过第五电阻R5放电。并且，辅助放电路径的导通阻抗越小，第五电阻R5和辅助放电路径这一并联结构整体的等效阻抗越小，放电速度越快。那么，通过晶体管的选型，控制辅助放电路径的导通阻抗越小，放电速度越快，放电时间就越趋近于0。
综上所述，当开关控制信号PWR_CTR为高电平时，为上电阶段，即，控制第二晶体管Q2打开，使输入电源信号VIN可以转换为输出信号VOUT，正常向后级电路供电的阶段。此时，第一电容C1的第二端(即第二晶体管Q2的控制极)放电至触发第二晶体管Q2打开的时间(记为t2)取决于时间控制信号TIME_CTR的电平转换时间。若时间控制信号TIME_CTR在放电过程中始终保持高电平，第一电容C1始终通过第五电阻R5放电，此时为放电时间最长的情况，放电时间最大值t2max＝t1。若时间控制信号TIME_CTR在放电过程中始终保持低电平，则第一电容C1始终通过第五电阻R5和辅助放电路径两条通道放电，此时为放电时间最短的情况，放电时间最小值t2min可趋近于0。若时间控制信号TIME_CTR在t0时刻由高电平转变为低电平，其中，t0<t2max，则第一电容C1在t0之前通过第五电阻R5放电，在t0之后通过第五电阻R5和辅助放电路径两条通道放电，此时放电时间略大于t0。因此，通过控制时间控制信号TIME_CTR由高电平转为低电平的时间，理论上可实现：0<t2<t1。
当开关控制信号PWR_CTR与时间控制信号TIME_CTR均为低电平时，第一晶体管Q1与第三晶体管Q3均断开；输入电源信号VIN经过第二电阻R2传输至第一MOS管Q4和第二MOS管Q5的栅极，且输入电源信号VIN经过第四电阻R4传输至第一MOS管Q4的第一极，因此，第一MOS管Q4和第二MOS管Q5均断开；第一电容C1与第四电阻R4和第五电阻R5构成RC充电通路，当第二晶体管Q2的控制极充电到其栅源电压差大于其阈值电压值时，第二晶体管Q2断开，此情况下，第二晶体管Q2的关断时间(记为t3)为：t3＝τ2＝(R4+R5)*C1，其中，τ2为RC充电通路的时间常数。
当开关控制信号PWR_CTR为低电平，时间控制信号TIME_CTR为高电平时，第三晶体管Q3断开，第一晶体管Q1导通；地信号经过第一晶体管Q1传输至第一MOS管Q4和第二MOS管Q5的栅极，且输入电源信号VIN经过第四电阻R4传输至第一MOS管Q4的第一极，因此，第一MOS管Q4导通，第二MOS管Q5断开；第一MOS管Q4和第二MOS管Q5的体二极管形成从第四电阻R4到第一电容C1的充电路径，即形成辅助充电路径，辅助充电路径的导通阻抗为第一MOS管Q4的导通阻抗和第二MOS管Q5的体二极管的等效阻抗之和。那么，输入电源信号VIN经过第四电阻R4后，通过第五电阻R5和辅助充电路径两条通道对第一电容C1进行充电，其充电速度快于在经过第四电阻R4后仅通过第五电阻R5充电。并且，辅助充电路径的导通阻抗越小，第五电阻R5和辅助充电路径这一并联结构整体的等效阻抗越小，充电速度越快。那么，通过晶体管的选型，控制辅助充电路径的导通阻抗越小，第五电阻R5和辅助充电路径这一并联结构整体的等效阻抗越趋近于0，充电时间越接近于仅由第四电阻R4和第一电容C1构成的RC充电通路的时间常数，即R4*C1。
综上所述，当开关控制信号PWR_CTR为低电平时，为掉电阶段，即，控制第二晶体管Q2关断，截断输入电源信号VIN的传输路径的阶段。此时，第二晶体管Q2的控制极充电至触发第二晶体管Q2关断的时间(记为t4)取决于时间控制信号TIME_CTR的电平转换时间。若时间控制信号TIME_CTR在充电过程中始终保持低电平，输入电源信号VIN始终通过第四电阻R4和第五电阻R5向第一电容C1充电，此时为充电时间最长的情况，充电时间最大值t4max＝t3。若时间控制信号TIME_CTR在充电过程中始终保持高电平，则输入电源信号VIN在经过第四电阻R4之后，通过第五电阻R5和辅助充电路径两条通道向第一电容C1充电，此时为充电时间最短的情况，充电时间最小值t4min可趋近于R4*C1。若时间控制信号TIME_CTR在在t00时刻由低电平转变为高电平，其中，t00<t4max，则输入电源信号VIN在t00之前通过第四电阻 R4和第五电阻R5向第一电容C1充电；在t00之后，输入电源信号VIN在经过第四电阻R4后通过第五电阻R5和辅助充电路径两条通道向第一电容C1充电，此时充电时间略大于t00。因此，通过控制时间控制信号TIME_CTR由低电平转为高电平的时间，理论上可实现：R4*C1<t4<t3。
综上所述，本申请实施例提供了一种电源开关控制电路，具备电源打开和关闭的上掉电边缘时间均可单独控制的作用，且电路实现和逻辑简单，成本低廉。本实施例通过参数和软件的控制即可实现对电源开关速度的控制，例如当同一个电源给多个型号的设备供电，且不同型号的设备对上掉电的时间要求不一样时，仅通过软件的控制就可以调节到对应设备的最佳的上掉电时序状态。具体地，通过控制开关控制信号PWR_CTR的高低电平、时间控制信号TIME_CTR的高低电平及时间宽度，可以实现对第二晶体管Q2打开和关断两个过程的边缘时间的准确控制，进而使得该电路可以适用多种用电系统的上掉电时序的灵活控制。具体可达成如下时间控制范围：第二晶体管Q2打开的时间ton控制范围：0<ton<R5*C1；第二晶体管Q2关断的时间toff控制范围：R4*C1<toff<(R4+R5)*C1。同时，上电和掉电两个过程可以单独控制，互不影响，有利于规避上电速度快导致的过冲和掉电速度不合适引起的关断电压抬升问题。
本申请实施例还提供了一种电器，包括负载和上述任一实施例所述的电源开关控制电路，该电源开关控制电路的开关模块的输出端与该负载形成电连接。在一些实施例中，该负载可以为显示屏，例如带触控功能的显示屏。在一些实施例中，该电器可以为家用电器，例如电冰箱、抽油烟机、空调、洗衣机、洗碗机等等。
注意，上述仅为本申请的较佳实施例及所运用技术原理。本领域技术人员会理解，本申请不限于这里所述的特定实施例，对本领域技术人员来说能够进行各种明显的变化、重新调整和替代而不会脱离本申请的保护范围。因此，虽然通过以上实施例对本申请进行了较为详细的说明，但是本申请不仅仅限于以上实施例，在不脱离本申请构思的情况下，还可以包括更多其他等效实施例，而本申请的范围由所附的权利要求范围决定。

Claims (13)

  1. 一种电源开关控制电路，其特征在于，包括：
    开关模块，包括控制端，输入端和输出端；所述开关模块的输入端接入输入电源信号；
    充放电模块，包括控制端、第一端、第二端、第三端和第四端；所述充放电模块的控制端接入开关控制信号，所述充放电模块的第一端接入所述输入电源信号，所述充放电模块的第二端接地，所述充放电模块的第三端与所述开关模块的控制端电连接；
    时间控制模块，所述时间控制模块连接在所述充放电模块的第三端和第四端之间，作为所述充放电模块的第三端和第四端之间的辅助充放电路径，与所述充放电模块一起控制所述开关模块的控制端的充放电时间。
  2. 根据权利要求1所述的电源开关控制电路，其特征在于，所述时间控制模块包括：控制端、第一端、第二端、第三端和第四端；所述时间控制模块的控制端接入时间控制信号，所述时间控制模块的第一端接入所述输入电源信号，所述时间控制模块的第二端接地，所述时间控制模块的第三端与所述充放电模块的第三端电连接，所述时间控制模块的第四端与所述充放电模块的第四端电连接；所述时间控制模块用于根据所述时间控制信号，控制所述时间控制模块的第三端和第四端之间导通或断开。
  3. 根据权利要求2所述的电源开关控制电路，其特征在于，所述时间控制模块还包括：
    时间控制单元；所述时间控制单元的控制端作为所述时间控制模块的控制端，所述时间控制单元的第一端作为所述时间控制模块的第一端，所述时间控制单元的第二端作为所述时间控制模块的第二端；所述时间控制单元用于根据所述时间控制信号生成辅助控制信号；
    辅助充放电单元；所述辅助充放电单元的控制端与所述时间控制单元的输出端电连接，所述辅助充放电单元的第一端作为所述时间控制模块的第四端，所述辅助充放电单元的第二端作为所述时间控制模块的第三端；所述辅助充放电单元用于根据所述辅助控制信号导通或断开。
  4. 根据权利要求3所述的电源开关控制电路，其特征在于，所述时间控制单元包括：第一晶体管、第一电阻和第二电阻；所述第一电阻的第一端作为所述时间控制单元的控制端，所述第一电阻的第二端与所述第一晶体管的控制极电连接；所述第一晶体管的第一极作为所述时间控制单元的第二端；所述第一晶体管的第二极与所述第二电阻的第二端电连接，并作为所述时间控制单元的输出端；所述第二电阻的第一端作为所述时间控制单元的第一端。
  5. 根据权利要求3所述的电源开关控制电路，其特征在于，所述辅助充放电单元包括：第一MOS管和第二MOS管；所述第一MOS管的栅极与所述第二MOS管的栅极电连接，并作为所述辅助充放电单元的控制端；所述第一MOS管的第一极作为所述辅助充放电单元的第一端，所述第一MOS管的第二极与所述第二MOS管的第一极电连接；所述第二MOS管的第二极作为所述辅助充放电单元的第二端；
    其中，所述第一MOS管与所述第二MOS管的极性不同。
  6. 根据权利要求5所述的电源开关控制电路，其特征在于，所述第一MOS管为PMOS管，所述第二MOS管为NMOS管。
  7. 根据权利要求1所述的电源开关控制电路，其特征在于，所述开关模块包括：第二晶体管；所述第二晶体管的控制极作为所述开关模块的控制端，所述第二晶体管的第一极作为所述开关模块的输入端，所述第二晶体管的第二极作为所述开关模块的输出端。
  8. 根据权利要求7所述的电源开关控制电路，其特征在于，所述第二晶体管为PMOS管。
  9. 根据权利要求1所述的电源开关控制电路，其特征在于，所述充放电模块包括：
    开关控制单元；所述开关控制单元的控制端接入所述开关控制信号，所述开关控制单元的第一端接入所述输入电源信号，所述开关控制单元的第二端接地；
    充放电单元；所述充放电单元的第一端与所述开关控制单元的输出端电连接，所述充放电单元的第二端接入所述输入电源信号，所述充放电单元的第三端与所述开关模块的控制端电连接。
  10. 根据权利要求9所述的电源开关控制电路，其特征在于，所述开关控制单元包括：第三电阻、第四电阻和第三晶体管；所述第三电阻的第一端作为所述开关控制单元的控制端，所述第三电阻的第二端与所述第三晶体管的控制极电连接；所述第三晶体管的第一极作为所述开关控制单元的第二端；所述第三晶体管的第二极与所述第四电阻的第二端电连接，并作为所述开关控制单元的输出端；所述第四电阻的第一端作为所述开关控制单元的第一端。
  11. 根据权利要求9所述的电源开关控制电路，其特征在于，所述充放电单元包括：第五电阻和第一电容；所述第五电阻的第一端作为所述充放电单元的第一端；所述第五电阻的第二端与所述第一电容的第二端电连接，并作为所述充放电单元的第三端；所述第一电容的第一端作为所述充放电单元的第二端。
  12. 一种电器，其特征在于，包括负载和根据权利要求1-11任一所述的电源开关控制电路，所述开关模块的输出端与所述负载形成电连接。
  13. 根据权利要求12所述的电器，其特征在于，所述负载为显示屏。
PCT/CN2021/141265 2021-12-24 2021-12-24 一种电源开关控制电路和电器 WO2023115548A1 (zh)

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Citations (3)

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Publication number Priority date Publication date Assignee Title
CN202261593U (zh) * 2011-09-13 2012-05-30 青岛海信电器股份有限公司 一种开关管保护电路及电源电路和电视机
CN109066879A (zh) * 2018-08-31 2018-12-21 厦门科华恒盛股份有限公司 一种板载电池的充电电路、充电方法及单片机控制系统
CN208971480U (zh) * 2018-10-23 2019-06-11 深圳市海勤科技有限公司 可快速关断的直流电源开关电路及应用其的电子设备

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202261593U (zh) * 2011-09-13 2012-05-30 青岛海信电器股份有限公司 一种开关管保护电路及电源电路和电视机
CN109066879A (zh) * 2018-08-31 2018-12-21 厦门科华恒盛股份有限公司 一种板载电池的充电电路、充电方法及单片机控制系统
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