WO2023093359A1 - 输出匹配电路、射频功率放大器及射频芯片 - Google Patents
输出匹配电路、射频功率放大器及射频芯片 Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/213—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
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- the utility model relates to the technical field of wireless communication radio frequency chip design, in particular to an output matching circuit with high harmonic suppression effect, a radio frequency power amplifier and a radio frequency chip.
- RF power amplifier as an important part of the mobile phone communication system, is mainly used to amplify radio frequency signals. Its main technical indicators are output power and efficiency, and the harmonic components in the output radio frequency signal are as small as possible to avoid damage to Other channels are interfering.
- the output matching network of the traditional RF power amplifier uses a four-level low-pass LC matching network, which has limited harmonic suppression capability for the RF power amplifier. Therefore, the matching network at the back end of the output of the radio frequency power amplifier needs to have a higher suppression capability for each order harmonic of the radio frequency power amplifier.
- the utility model proposes an output matching circuit, a radio frequency power amplifier and a radio frequency chip with a simple structure and a stronger harmonic suppression effect.
- the embodiment of the utility model provides an output matching circuit, including a first low-pass matching network, a second low-pass matching network, a third low-pass matching network, and a fourth low-pass matching network connected in sequence , a series matching network, a parallel resonant network, a series resonant network and an output port;
- the input terminal of the first low-pass matching network is used as the input terminal of the output matching circuit for connecting to the output terminal of the output stage power amplifier;
- the series matching network includes a fifth matching inductance and a fifth matching capacitor, the first end of the fifth matching inductance serves as the input end of the series matching network and is connected to the output end of the fourth low-pass matching network;
- the second end of the fifth matching inductor is connected to the first end of the fifth matching capacitor, and the second end of the fifth matching capacitor is used as an output end of the series matching network;
- the parallel resonant network includes a sixth resonant inductor and a sixth resonant capacitor, the first end of the sixth resonant inductor and the first end of the sixth resonant capacitor are both connected to the second end of the fifth matching capacitor , the second terminal of the sixth resonant inductor is connected to the second terminal of the sixth resonant capacitor, and is connected to the output port as the output terminal of the output matching circuit; wherein, the parallel resonant network resonates at Second-order harmonic frequency point;
- the series resonant network includes a seventh resonant capacitor and a seventh resonant inductor, the first end of the seventh resonant capacitor is connected to the second end of the sixth resonant inductor, and the second end of the seventh resonant capacitor is connected to to the first end of the seventh resonant inductor, and the second end of the seventh resonant inductor is connected to ground; wherein, the series resonant network resonates at a fourth-order harmonic frequency point.
- the first low-pass matching network includes a first matching inductor, a first matching capacitor, and a first resonant inductor, the first end of the first matching inductor serves as an input end of the first low-pass matching network, The second end of the first matching inductor is used as the output end of the first low-pass matching network, and is connected to ground after being connected in series with the first matching capacitor and the first resonant inductor in series.
- the structure of the second low-pass matching network, the third low-pass matching network and the fourth low-pass matching network is the same as that of the first low-pass matching network;
- the input end of the matching network is connected to the output end of the first low-pass matching network, the input end of the third low-pass matching network is connected to the output end of the second low-pass matching network, and the fourth low-pass
- the input terminal of the matching network is connected to the output terminal of the third low-pass matching network.
- the embodiment of the present invention also provides a radio frequency power amplifier, including the above-mentioned output matching circuit provided by the embodiment of the present invention.
- the embodiment of the present invention also provides a radio frequency chip, including the above-mentioned radio frequency power amplifier provided by the embodiment of the present invention.
- the output matching circuit, radio frequency power amplifier and radio frequency chip of the present invention by adding a group of series matching networks and two groups of resonant networks in the traditional output matching circuit using four-stage low-pass matching networks, Including a set of parallel resonant network and a set of series resonant network, and make the parallel resonant network between the series matching network and the series resonant network, the above structure is simple and easy to implement; by controlling the series matching network and the inductance and The parameters of the capacitor enable it to suppress the second-order and higher-order harmonics, thereby achieving a better harmonic suppression effect than the output matching circuit of the traditional technology.
- FIG. 1 is a schematic diagram of a circuit structure of an output matching circuit of the related art
- Fig. 2 is a schematic structural diagram of an output matching circuit provided by an embodiment of the present invention.
- FIG. 3 is a simulation comparison diagram of the harmonic suppression ability of the output matching circuit provided by the embodiment of the utility model and the output matching circuit of the related art.
- FIG. 1 is a schematic circuit structure diagram of an output matching circuit in the related art.
- the output matching circuit of the related art adopts a four-level low-pass LC matching network, and this output matching circuit has a limited ability to suppress the harmonics of the radio frequency power amplifier. Based on this, the utility model provides an output matching circuit with better harmonic suppression capability.
- FIG. 2 is a schematic structural diagram of an output matching circuit provided by an embodiment of the present invention, which has been connected to an output stage power amplifier for outputting radio frequency signals.
- the output matching circuit 100 provided by the embodiment of the present invention adds a series matching network and two resonant networks to the output matching circuit using a four-stage low-pass LC matching network in the related art. Specifically, it includes a first low-pass matching network 1, a second low-pass matching network 2, a third low-pass matching network 3, a fourth low-pass matching network 4, a series matching network 5, a parallel resonant network 6, a series connection Resonant network 7 and output port FRout.
- the input terminal of the first low-pass matching network 1 is used as the input terminal of the output matching circuit 100 for connecting to the output terminal of the output stage power amplifier 8 .
- the first low-pass matching network 1 includes a first matching inductor L01, a first matching capacitor C01, and a first resonant inductor L1, and the first end of the first matching inductor L01 serves as the first low-pass matching
- the input end of the network 1, the second end of the first matching inductor L01 is used as the output end of the first low-pass matching network 1, and the first matching capacitor C01 and the first resonant inductor L1 are serially connected in series Connect to ground.
- the structure of the second low-pass matching network 2 , the third low-pass matching network 3 and the fourth low-pass matching network 4 is the same as that of the first low-pass matching network 1 .
- the input end of the second low-pass matching network 2 is connected to the output end of the first low-pass matching network 1
- the input end of the third low-pass matching network 3 is connected to the second low-pass matching network 2
- the output end of the fourth low-pass matching network 4 is connected to the output end of the third low-pass matching network 3 .
- the second low-pass matching network 2 includes a second matching inductor L02, a second matching capacitor C02, and a second resonant inductor L2.
- the first end of the second matching inductor L02 is connected to the output end of the first low-pass matching network 1 as the input end of the second low-pass matching network 2, that is, connected to the first end of the first matching inductor L01.
- the second end, the second end of the second matching inductor L02 is used as the output end of the second low-pass matching network 2, and is connected to the second end of the second matching capacitor C02 and the second resonance inductor L2 in series. grounded.
- the third low-pass matching network 3 includes a third matching inductor L03, a third matching capacitor C03 and a third resonant inductor L3.
- the first end of the third matching inductor L03 is connected to the output end of the second low-pass matching network 2 as the input end of the third low-pass matching network 3, that is, connected to the output end of the second matching inductor L02.
- the second end, the second end of the third matching inductance L03 is used as the output end of the third low-pass matching network 3, and the third matching capacitor C03 and the third resonant inductance L3 are connected in series to grounded.
- the fourth low-pass matching network 4 includes a fourth matching inductor L04 , a fourth matching capacitor C04 and a fourth resonant inductor L4 .
- the first end of the fourth matching inductor L04 is connected to the output end of the third low-pass matching network 3 as the input end of the fourth low-pass matching network 4, that is, connected to the output end of the third matching inductor L03.
- the second end, the second end of the fourth matching inductor L04 is used as the output end of the fourth low-pass matching network 4, and connected in series with the fourth matching capacitor C04 and the fourth resonant inductor L4 in sequence. grounded.
- the series matching network 5 includes a fifth matching inductance L05 and a fifth matching capacitor C05, the first end of the fifth matching inductance L05 serves as the input end of the series matching network 5 and is connected to the fourth low-pass matching
- the output end of the network 4 is connected to the second end of the fourth matching inductance L04; the second end of the fifth matching inductance L05 is connected to the first end of the fifth matching capacitor C05, and the fifth The second end of the matching capacitor C05 is used as the output end of the series matching network 5 .
- the parameters of the fifth matching inductance L05 and the fifth matching capacitor C05 are inductive and low-pass to the working frequency signal, and have the effect of suppressing attenuation of high-frequency harmonics of all orders outside the working frequency.
- the parallel resonant network 6 and the series resonant network 7 jointly form a resonant network.
- the parallel resonant network 6 is located behind the series matching network 5, and it includes a sixth resonant inductor L06 and a sixth resonant capacitor C06, a first end of the sixth resonant inductor L06 and a first end of the sixth resonant capacitor C06.
- One end is connected to the second end of the fifth matching capacitor C05, the second end of the sixth resonant inductor L06 is connected to the second end of the sixth resonant capacitor C06, and serves as the output matching circuit 100
- the output terminal of is connected to the output port RFout; wherein, the parallel resonant network 6 resonates at the second-order harmonic frequency point.
- the parallel resonant network 6 can produce deep resonance and filter effects, by controlling the parameters of the sixth resonant inductance L06 and the sixth resonant capacitor C06, it can resonate near the second-order harmonic frequency point, effectively reducing the energy Strong second-order harmonics are suppressed.
- the series resonant network 7 is located behind the parallel resonant network 6, and it includes a seventh resonant capacitor C07 and a seventh resonant inductance L5, and the first end of the seventh resonant capacitor C07 is connected to the second end of the sixth resonant inductance L06. end, the second end of the seventh resonant capacitor C07 is connected to the first end of the seventh resonant inductance L5, and the second end of the seventh resonant inductance L5 is connected to ground; wherein, the series resonant network 7 Resonates at the fourth harmonic frequency point.
- the seventh resonant capacitor C07 and the seventh resonant inductance L5 By controlling the parameters of the seventh resonant capacitor C07 and the seventh resonant inductance L5 , they generate resonance near the frequency point of the fourth-order harmonic, which is used to suppress the fourth-order harmonic.
- Fig. 3 is a simulation comparison diagram of the output matching circuit provided by the embodiment of the utility model and the output matching circuit of the related art to the harmonic suppression capability, wherein curve a is the simulation result curve of the output matching circuit of the present invention, and curve b is the simulation result curve of the output matching circuit of the related art.
- the utility model is more sensitive to second-order harmonics (1.64GHz-1.83GHz), third-order harmonics (2.47GHz-2.75GHz), fourth-order harmonics (3.3GHz- 3.66GHz), fifth-order harmonics (4.1GHz-4.6GHz) and higher order harmonics have higher harmonic suppression capabilities.
- the embodiment of the present invention also provides a radio frequency power amplifier, including the above-mentioned output matching circuit provided by the embodiment of the present invention.
- the embodiment of the present invention also provides a radio frequency chip, including the above-mentioned radio frequency power amplifier provided by the embodiment of the present invention.
- the output matching circuit, radio frequency power amplifier and radio frequency chip of the present invention by adding a group of series matching networks and two groups of resonant networks in the traditional output matching circuit using four-stage low-pass matching networks, Including a set of parallel resonant network and a set of series resonant network, and make the parallel resonant network between the series matching network and the series resonant network, the above structure is simple and easy to implement; by controlling the series matching network and the inductance and The parameters of the capacitor enable it to suppress the second-order and higher-order harmonics, thereby achieving a better harmonic suppression effect than the output matching circuit of the traditional technology.
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Abstract
本实用新型提供了一种输出匹配电路，包括依次连接的第一低通匹配网络、第二低通匹配网络、第三低通匹配网络、第四低通匹配网络、串联匹配网络、并联谐振网络、串联谐振网络以及输出端口；串联匹配网络包括第五匹配电感和第五匹配电容；并联谐振网络包括第六谐振电感和第六谐振电容，且谐振于二阶谐波频率点；串联谐振网络包括第七谐振电容和第七谐振电感，且谐振于四阶谐波频率点；并联谐振网络位于串联匹配网络和串联谐振网络之间。本实用新型还提供一种射频功率放大器及射频芯片。与现有技术相比，本实用新型的输出匹配电路、射频功率放大器及射频芯片的结构简单易实现且谐波抑制效果更好。
Description
本实用新型涉及无线通信射频芯片设计技术领域，尤其涉及一种具有谐波高抑制效果的输出匹配电路、射频功率放大器及射频芯片。
射频功率放大器，作为手机通信系统的重要组成部分，主要用于对射频信号的放大，其主要的技术指标是输出功率和效率，以及输出的射频信号中尽可能小的谐波分量，以避免对其它频道产生干扰。
随着手机通信系统的不断发展，对射频功率放大器的发射功率的要求也不断提高。射频功率放大器发射功率的提高带来的便是更高的谐波指标，谐波的恶化会严重影响到通信的质量。传统的射频功率放大器的输出匹配网络采用的是四级低通LC匹配网络，这种匹配网络对射频功率放大器的谐波抑制能力有限。因此，射频功率放大器输出的后端的匹配网络需要对射频功率放大器的各阶谐波要有更高的抑制能力。
实用新型内容
针对以上相关技术的不足，本实用新型提出一种结构简单易实现，且谐波抑制效果更强的输出匹配电路、射频功率放大器及射频芯片。
为了解决上述技术问题，本实用新型实施例提供了一种输出匹配电路，包括依次连接的第一低通匹配网络、第二低通匹配网络、第三低通匹配网络、第四低通匹配网络、串联匹配网络、并联谐振网络、 串联谐振网络以及输出端口；
所述第一低通匹配网络的输入端作为所述输出匹配电路的输入端，用于连接至输出级功率放大器的输出端；
所述串联匹配网络包括第五匹配电感和第五匹配电容，所述第五匹配电感的第一端作为所述串联匹配网络的输入端并连接至所述第四低通匹配网络的输出端；所述第五匹配电感的第二端连接至所述第五匹配电容的第一端，所述第五匹配电容的第二端作为所述串联匹配网络的输出端；
所述并联谐振网络包括第六谐振电感和第六谐振电容，所述第六谐振电感的第一端以及所述第六谐振电容的第一端均连接至所述第五匹配电容的第二端，所述第六谐振电感的第二端连接至所述第六谐振电容的第二端，并作为所述输出匹配电路的输出端连接至所述输出端口；其中，所述并联谐振网络谐振于二阶谐波频率点；
所述串联谐振网络包括第七谐振电容和第七谐振电感，所述第七谐振电容的第一端连接至所述第六谐振电感的第二端，所述第七谐振电容的第二端连接至所述第七谐振电感的第一端，所述第七谐振电感的第二端连接至接地；其中，所述串联谐振网络谐振于四阶谐波频率点。
优选的，所述第一低通匹配网络包括第一匹配电感、第一匹配电容以及第一谐振电感，所述第一匹配电感的第一端作为所述第一低通匹配网络的输入端，所述第一匹配电感的第二端作为所述第一低通匹配网络的输出端，并依次串联所述第一匹配电容和所述第一谐振电感后连接至接地。
优选的，所述第二低通匹配网络、所述第三低通匹配网络以及所述第四低通匹配网络的结构与所述第一低通匹配网络的结构相同；所述第二低通匹配网络的输入端连接至所述第一低通匹配网络的输出端，所述第三低通匹配网络的输入端连接至所述第二低通匹配网络的输出端，所述第四低通匹配网络的输入端连接至所述第三低通匹配网 络的输出端。
本实用新型实施例还提供一种射频功率放大器，包括本实用新型实施例提供的上述输出匹配电路。
本实用新型实施例还提供一种射频芯片，包括本实用新型实施例提供的上述射频功率放大器。
与现有技术相比，本实用新型的输出匹配电路、射频功率放大器及射频芯片中，通过在传统采用四级低通匹配网络的输出匹配电路中增加一组串联匹配网络和两组谐振网络，包括一组并联谐振网络和一组串联谐振网络，并使得并联谐振网络位于串联匹配网络与串联谐振网络之间，上述结构简单且易实现；通过控制串联匹配网络和两组谐振网络中的电感和电容的参数，使其对二阶及以上的阶次谐波进行抑制，从而实现比传统技术的输出匹配电路的更优的谐波抑制效果。
下面结合附图详细说明本实用新型。通过结合以下附图所作的详细描述，本实用新型的上述或其他方面的内容将变得更清楚和更容易理解。附图中：
图1为相关技术的输出匹配电路的电路结构示意图；
图2为本实用新型实施例提供的输出匹配电路的结构示意图；
图3为本实用新型实施例提供的输出匹配电路与相关技术的输出匹配电路对谐波抑制能力的仿真对比图。
下面结合附图详细说明本实用新型的具体实施方式。
在此记载的具体实施方式/实施例为本实用新型的特定的具体实施方式，用于说明本实用新型的构思，均是解释性和示例性的，不应解释为对本实用新型实施方式及本实用新型范围的限制。除在此记载的实施例外，本领域技术人员还能够基于本申请权利要求书和说明书 所公开的内容采用显而易见的其它技术方案，这些技术方案包括采用对在此记载的实施例的做出任何显而易见的替换和修改的技术方案，都在本实用新型的保护范围之内。
以下各实施例的说明是参考附加的图式，用以例示本实用新型可用以实施的特定实施例。本实用新型所提到的方向用语，例如上、下、前、后、左、右、内、外、侧面等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本实用新型，而非用以限制本实用新型。
请参图1所示，为相关技术的输出匹配电路的电路结构示意图。相关技术的输出匹配电路采用四级低通LC匹配网络，这种输出匹配电路对射频功率放大器的谐波抑制能力有限。基于此，本实用新型提供一种谐波抑制能力更好的输出匹配电路。
请参图2所示，为本实用新型实施例提供的输出匹配电路的结构示意图，其中已连接至用于输出射频信号的输出级功率放大器。本实用新型实施例提供的输出匹配电路100，其在相关技术采用四级低通LC匹配网络的输出匹配电路中增加一组串联匹配网络和两组谐振网络。具体的，包括依次连接的第一低通匹配网络1、第二低通匹配网络2、第三低通匹配网络3、第四低通匹配网络4、串联匹配网络5、并联谐振网络6、串联谐振网络7以及输出端口FRout。
所述第一低通匹配网络1的输入端作为所述输出匹配电路100的输入端，用于连接至输出级功率放大器8的输出端。
具体的，所述第一低通匹配网络1包括第一匹配电感L01、第一匹配电容C01以及第一谐振电感L1，所述第一匹配电感L01的第一端作为所述第一低通匹配网络1的输入端，所述第一匹配电感L01的第二端作为所述第一低通匹配网络1的输出端，并依次串联所述第一匹配电容C01和所述第一谐振电感L1后连接至接地。
所述第二低通匹配网络2、所述第三低通匹配网络3以及所述第四低通匹配网络4的结构与所述第一低通匹配网络1的结构相同。所 述第二低通匹配网络2的输入端连接至所述第一低通匹配网络1的输出端，所述第三低通匹配网络3的输入端连接至所述第二低通匹配网络2的输出端，所述第四低通匹配网络4的输入端连接至所述第三低通匹配网络3的输出端。
具体的，所述第二低通匹配网络2包括第二匹配电感L02、第二匹配电容C02以及第二谐振电感L2。所述第二匹配电感L02的第一端作为所述第二低通匹配网络2的输入端连接至所述第一低通匹配网络1的输出端，即连接至所述第一匹配电感L01的第二端，所述第二匹配电感L02的第二端作为所述第二低通匹配网络2的输出端，并依次串联所述第二匹配电容C02和所述第二谐振电感L2后连接至接地。
所述第三低通匹配网络3包括第三匹配电感L03、第三匹配电容C03以及第三谐振电感L3。所述第三匹配电感L03的第一端作为所述第三低通匹配网络3的输入端连接至所述第二低通匹配网络2的输出端，即连接至所述第二匹配电感L02的第二端，所述第三匹配电感L03的第二端作为所述第三低通匹配网络3的输出端，并依次串联所述第三匹配电容C03和所述第三谐振电感L3后连接至接地。
所述第四低通匹配网络4包括第四匹配电感L04、第四匹配电容C04以及第四谐振电感L4。所述第四匹配电感L04的第一端作为所述第四低通匹配网络4的输入端连接至所述第三低通匹配网络3的输出端，即连接至所述第三匹配电感L03的第二端，所述第四匹配电感L04的第二端作为所述第四低通匹配网络4的输出端，并依次串联所述第四匹配电容C04和所述第四谐振电感L4后连接至接地。
所述串联匹配网络5包括第五匹配电感L05和第五匹配电容C05，所述第五匹配电感L05的第一端作为所述串联匹配网络5的输入端并连接至所述第四低通匹配网络4的输出端，即连接至所述第四匹配电感L04的第二端；所述第五匹配电感L05的第二端连接至所述第五匹配电容C05的第一端，所述第五匹配电容C05的第二端作为所述串联匹配网络5的输出端。
通过控制第五匹配电感L05和第五匹配电容C05的参数，使其呈感性对工作频率信号呈低通特性，对工作频率外的各阶高频谐波起到抑制衰减的作用。
所述并联谐振网络6和所述串联谐振网络7共同形成谐振网络。
所述并联谐振网络6位于所述串联匹配网络5之后，其包括第六谐振电感L06和第六谐振电容C06，所述第六谐振电感L06的第一端以及所述第六谐振电容C06的第一端均连接至所述第五匹配电容C05的第二端，所述第六谐振电感L06的第二端连接至所述第六谐振电容C06的第二端，并作为所述输出匹配电路100的输出端连接至所述输出端口RFout；其中，所述并联谐振网络6谐振于二阶谐波频率点。
由于所述并联谐振网络6可以产生很深的谐振和滤波效果，通过控制第六谐振电感L06和第六谐振电容C06的参数，使其在二阶谐波频点附近产生谐振，有效的对能量很强的二阶谐波进行抑制。
所述串联谐振网络7位于并联谐振网络6之后，其包括第七谐振电容C07和第七谐振电感L5，所述第七谐振电容C07的第一端连接至所述第六谐振电感L06的第二端，所述第七谐振电容C07的第二端连接至所述第七谐振电感L5的第一端，所述第七谐振电感L5的第二端连接至接地；其中，所述串联谐振网络7谐振于四阶谐波频率点。
通过控制第七谐振电容C07和第七谐振电感L5的参数，使其在四阶谐波频点附近产生谐振，用于对四阶谐波进行抑制。
本实用新型的输出匹配电路100的谐波抑制效果参图3所示，为本实用新型实施例提供的输出匹配电路与相关技术的输出匹配电路对谐波抑制能力的仿真对比图，其中曲线a为本实用新型的输出匹配电路的仿真结果曲线，曲线b为相关技术的输出匹配电路的仿真结果曲线。由图3可以明显看出本实用新型相较于传统输出匹配电路对二阶谐波(1.64GHz-1.83GHz)、三阶谐波(2.47GHz-2.75GHz)、四阶谐波(3.3GHz-3.66GHz)、五阶谐波(4.1GHz-4.6GHz)及以上更高阶次谐波拥有更高的谐波抑制能力。
需要说明的是，要实现谐波抑制能力，并非匹配网络及谐振网络越多越好，也并非随意增加匹配网络或谐振网络即可实现更好的谐波抑制效果，本实用新型中，通过增加少量的器件且必须使并联谐振网络6位于串联匹配网络5和串联谐振网络7之间，才能达到如图3的抑制效果，且结构简单易于实现。
本实用新型实施例还提供一种射频功率放大器，包括本实用新型实施例提供的上述输出匹配电路。
本实用新型实施例还提供一种射频芯片，包括本实用新型实施例提供的上述射频功率放大器。
与现有技术相比，本实用新型的输出匹配电路、射频功率放大器及射频芯片中，通过在传统采用四级低通匹配网络的输出匹配电路中增加一组串联匹配网络和两组谐振网络，包括一组并联谐振网络和一组串联谐振网络，并使得并联谐振网络位于串联匹配网络与串联谐振网络之间，上述结构简单且易实现；通过控制串联匹配网络和两组谐振网络中的电感和电容的参数，使其对二阶及以上的阶次谐波进行抑制，从而实现比传统技术的输出匹配电路的更优的谐波抑制效果。
需要说明的是，以上参照附图所描述的各个实施例仅用以说明本实用新型而非限制本实用新型的范围，本领域的普通技术人员应当理解，在不脱离本实用新型的精神和范围的前提下对本实用新型进行的修改或者等同替换，均应涵盖在本实用新型的范围之内。此外，除上下文另有所指外，以单数形式出现的词包括复数形式，反之亦然。另外，除非特别说明，那么任何实施例的全部或一部分可结合任何其它实施例的全部或一部分来使用。
Claims (5)
- 一种输出匹配电路，其特征在于，包括依次连接的第一低通匹配网络、第二低通匹配网络、第三低通匹配网络、第四低通匹配网络、串联匹配网络、并联谐振网络、串联谐振网络以及输出端口；所述第一低通匹配网络的输入端作为所述输出匹配电路的输入端，用于连接至输出级功率放大器的输出端；所述串联匹配网络包括第五匹配电感和第五匹配电容，所述第五匹配电感的第一端作为所述串联匹配网络的输入端并连接至所述第四低通匹配网络的输出端；所述第五匹配电感的第二端连接至所述第五匹配电容的第一端，所述第五匹配电容的第二端作为所述串联匹配网络的输出端；所述并联谐振网络包括第六谐振电感和第六谐振电容，所述第六谐振电感的第一端以及所述第六谐振电容的第一端均连接至所述第五匹配电容的第二端，所述第六谐振电感的第二端连接至所述第六谐振电容的第二端，并作为所述输出匹配电路的输出端连接至所述输出端口；其中，所述并联谐振网络谐振于二阶谐波频率点；所述串联谐振网络包括第七谐振电容和第七谐振电感，所述第七谐振电容的第一端连接至所述第六谐振电感的第二端，所述第七谐振电容的第二端连接至所述第七谐振电感的第一端，所述第七谐振电感的第二端连接至接地；其中，所述串联谐振网络谐振于四阶谐波频率点。
- 根据权利要求1所述的输出匹配电路，其特征在于，所述第一低通匹配网络包括第一匹配电感、第一匹配电容以及第一谐振电感，所述第一匹配电感的第一端作为所述第一低通匹配网络的输入端，所述第一匹配电感的第二端作为所述第一低通匹配网络的输出端，并依次串联所述第一匹配电容和所述第一谐振电感后连接至接地。
- 根据权利要求2所述的输出匹配电路，其特征在于，所述第二 低通匹配网络、所述第三低通匹配网络以及所述第四低通匹配网络的结构与所述第一低通匹配网络的结构相同；所述第二低通匹配网络的输入端连接至所述第一低通匹配网络的输出端，所述第三低通匹配网络的输入端连接至所述第二低通匹配网络的输出端，所述第四低通匹配网络的输入端连接至所述第三低通匹配网络的输出端。
- 一种射频功率放大器，其特征在于，包括如权利要求1-3任意一项所述的输出匹配电路。
- 一种射频芯片，其特征在于，包括如权利要求4所述的射频功率放大器。
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008054174A (ja) * | 2006-08-28 | 2008-03-06 | Mitsubishi Electric Corp | ９０度ハイブリッド回路 |
| CN206226382U (zh) * | 2016-12-12 | 2017-06-06 | 无锡中普微电子有限公司 | 射频功率放大器及其输出匹配电路 |
| CN107370460A (zh) * | 2017-07-12 | 2017-11-21 | 深圳国民飞骧科技有限公司 | 一种提高射频功率放大器谐波抑制能力的电路结构及方法 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008054174A (ja) * | 2006-08-28 | 2008-03-06 | Mitsubishi Electric Corp | ９０度ハイブリッド回路 |
| CN206226382U (zh) * | 2016-12-12 | 2017-06-06 | 无锡中普微电子有限公司 | 射频功率放大器及其输出匹配电路 |
| CN107370460A (zh) * | 2017-07-12 | 2017-11-21 | 深圳国民飞骧科技有限公司 | 一种提高射频功率放大器谐波抑制能力的电路结构及方法 |
| CN113411062A (zh) * | 2021-08-19 | 2021-09-17 | 深圳飞骧科技股份有限公司 | 匹配电路、射频前端功率放大电路及移动通信设备 |
| CN216390926U (zh) * | 2021-11-24 | 2022-04-26 | 深圳飞骧科技股份有限公司 | 输出匹配电路、射频功率放大器及射频芯片 |
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