WO2023077251A1 - 一种极坐标发射机和基站 - Google Patents

一种极坐标发射机和基站 Download PDF

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Publication number
WO2023077251A1
WO2023077251A1 PCT/CN2021/128034 CN2021128034W WO2023077251A1 WO 2023077251 A1 WO2023077251 A1 WO 2023077251A1 CN 2021128034 W CN2021128034 W CN 2021128034W WO 2023077251 A1 WO2023077251 A1 WO 2023077251A1
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Prior art keywords
gate
signal
double
gate transistor
transistor
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PCT/CN2021/128034
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English (en)
French (fr)
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宋晓天
姜向中
曾志雄
焦伟
孙捷
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上海华为技术有限公司
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Priority to CN202180103610.2A priority Critical patent/CN118216085A/zh
Priority to PCT/CN2021/128034 priority patent/WO2023077251A1/zh
Publication of WO2023077251A1 publication Critical patent/WO2023077251A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers

Definitions

  • the present application relates to the technical field of wireless communication, in particular to a polar coordinate transmitter and a base station.
  • a modulated signal In a wireless communication system, a modulated signal generally has a peak-to-average ratio, wherein the modulated signal is, for example, a quadrature amplitude modulation (QAM) signal.
  • QAM quadrature amplitude modulation
  • the transmitter In order to transmit a modulated signal with a peak-to-average ratio, the transmitter often needs to select a polar transmitter that can work linearly in a wide power dynamic range.
  • the power amplifier (referred to as the power amplifier) in the polar transmitter uses the envelope signal in the modulation signal as the working voltage to amplify the phase modulation signal (or phase modulation signal) with a constant envelope in the modulation signal.
  • the adjustment of the operating voltage of the power amplifier is used to control the gain of the power amplifier, thereby realizing the recovery of the envelope of the output signal, which is conducive to making the power amplifier have high efficiency in a large power range.
  • the envelope signal as the working voltage needs to have a large voltage dynamic range, so a voltage modulator needs to be set in the polar transmitter to adjust the voltage dynamic range of the envelope signal. But the large voltage dynamic range will severely limit the bandwidth and efficiency of the voltage modulator, which in turn limits the bandwidth and efficiency of the transmitter.
  • Embodiments of the present application provide a polar coordinate transmitter and a base station, which can reduce the voltage dynamic range of an envelope signal required by the polar coordinate transmitter, thereby improving the bandwidth and efficiency of the transmitter.
  • an embodiment of the present application provides a polar transmitter, including: a first amplifier, where the first amplifier includes a first double-gate transistor.
  • the first double-gate transistor includes a gate (called the DC gate) near the drain (called the first drain) and a gate (called the RF gate) near the source (called the first source) .
  • the first double-gate transistor is used to receive the envelope signal in the modulation signal through the first drain and the first DC gate of the first double-gate transistor, and through the first double-gate transistor
  • the first radio frequency gate receives a phase modulation signal from the modulation signal, and outputs a first amplified signal of the modulation signal through the first source of the first double-gate transistor.
  • the input voltage of the DC gate of the double-gate transistor can adjust the gain of the double-gate transistor within a large dynamic range, it is beneficial to assist the first drain by inputting an envelope signal to the first DC gate.
  • the envelope recovery function realizes the envelope recovery of the first amplified signal, thereby reducing the voltage dynamic range of the envelope signal input to the first drain, which is beneficial to improving the bandwidth and efficiency of the transmitter.
  • the first amplifier further includes a first amplitude modulator; the first amplitude modulator is configured to adjust the amplitude of the envelope signal input to the first drain.
  • the first amplifier further includes a second amplitude modulator; the second amplitude modulator is configured to adjust the amplitude of the envelope signal input to the first DC grid.
  • the first amplitude modulator and/or the second amplitude modulator it is beneficial to reduce the voltage dynamic range required by the polar coordinate transmitter for the signal 1', which is beneficial to improve the bandwidth and efficiency of the polar coordinate transmitter, and is widely used in The field of amplification of the modulated signal.
  • the polar coordinate transmitter further includes a second amplifier; the second amplifier is used to amplify the first amplified signal to output a second amplified signal. It is beneficial to increase the gain of the polar coordinate transmitter to the phase modulation signal.
  • the second amplifier includes a second double-gate transistor; the second double-gate transistor is configured to receive the The envelope signal in the modulation signal, the first amplified signal is received through the second radio frequency gate of the second double-gate transistor, and the second source output of the second double-gate transistor is used for the The second amplified signal of the first amplified signal, wherein the second DC gate is a gate close to the second drain in the second double-gate transistor, and the second radio frequency gate is the first gate of the second double-gate transistor.
  • One gate of the two double gate transistors is close to the second source.
  • Using the second double-gate transistor in the second amplifier is beneficial to further reduce the voltage dynamic range of the envelope signal required by the polar transmitter.
  • the polar coordinate transmitter further includes a signal processor; the signal processor is configured to receive the modulated signal, and respectively output an envelope signal and a phase modulated signal in the modulated signal.
  • the first amplifier further includes a first capacitor, and the first DC gate is grounded through the first capacitor.
  • the embodiment of the present application provides a base station, which may include any possible polar coordinate transmitter as provided in the first aspect.
  • the embodiment of the present application further provides a power amplifier, which may include a first double-gate transistor; wherein, the first double-gate transistor is used to pass the first double-gate transistor
  • the first drain and the first DC gate receive the envelope signal in the modulation signal, receive the phase modulation signal from the modulation signal through the first radio frequency gate of the first double-gate transistor, and pass the The first source of the first double-gate transistor outputs a first amplified signal for the modulation signal, wherein the first DC gate is one of the first double-gate transistors that is close to the first drain A gate, the first radio frequency gate is a gate close to the first source in the first double-gate transistor.
  • the first amplifier further includes a first amplitude modulator; the first amplitude modulator is configured to adjust the amplitude of the envelope signal input to the first drain.
  • the first amplifier further includes a second amplitude modulator; the second amplitude modulator is configured to adjust the amplitude of the envelope signal input to the first DC gate.
  • the polar coordinate transmitter further includes a second amplifier; the second amplifier is used to amplify the first amplified signal to output a second amplified signal.
  • the second amplifier includes a second double-gate transistor; the second double-gate transistor is configured to receive the The envelope signal in the modulation signal, the first amplified signal is received through the second radio frequency gate of the second double-gate transistor, and the second source output of the second double-gate transistor is used for the The second amplified signal of the first amplified signal, wherein the second DC gate is a gate close to the second drain in the second double-gate transistor, and the second radio frequency gate is the first gate of the second double-gate transistor. One gate of the two double gate transistors is close to the second source.
  • the polar coordinate transmitter further includes a signal processor; the signal processor is configured to receive the modulated signal, and respectively output an envelope signal and a phase modulated signal in the modulated signal.
  • the first amplifier further includes a first capacitor, and the first DC gate is grounded through the first capacitor.
  • the embodiment of the present application provides a power amplification method, including: respectively inputting the envelope signal in the modulation signal to the first drain and the first DC gate of the first double-gate transistor, the first A DC gate is a gate close to the first drain in the first double-gate transistor; the phase in the modulation signal is respectively input to the first radio frequency gate of the first double-gate transistor modulation signal, the first radio frequency gate is a gate close to the first source in the first double-gate transistor; obtain the pair of the first source output of the first double-gate transistor A first amplified signal of the modulated signal.
  • the method before inputting the envelope signal in the modulation signal to the first drain of the first double-gate transistor, the method further includes: performing an amplitude calculation on the amplitude of the envelope signal used to input the first drain Adjustment.
  • the method before inputting the envelope signal in the modulation signal to the first DC gate of the first double-gate transistor, the method further includes: inputting the envelope signal to the first DC gate The amplitude of the signal is adjusted.
  • the method further includes: amplifying the first amplified signal to Output the second amplified signal.
  • amplifying the first amplified signal includes: respectively inputting the envelope signal in the modulation signal to the second drain and the second DC gate of the second double-gate transistor, and inputting the envelope signal in the modulation signal to the first
  • the second RF gate of the two double-gate transistors inputs the first amplified signal, and obtains a second amplified signal for the first amplified signal output by the second source of the second double-gate transistor, wherein,
  • the second DC gate is a gate close to the second drain in the second double-gate transistor
  • the second radio frequency gate is a gate close to the second source in the second double-gate transistor pole of a gate.
  • the method before inputting the envelope signal in the modulation signal to the first drain and the first DC gate of the first double-gate transistor respectively, the method further includes: separating the envelope signal from the modulation signal network signal and the phase modulation signal.
  • the technical effects brought about by the second aspect, the third aspect, the fourth aspect or any one of the possible implementations may refer to the technical effects brought about by the above-mentioned first aspect or the different possible implementations of the above-mentioned first aspect, here I won't repeat them here.
  • Fig. 1 schematically shows a possible structure of the polar coordinate transmitter of the present application
  • Figure 2 shows the efficiency curves of a single-gate transistor at different drain voltages
  • Figure 3 shows the gain characteristic curves of a single-gate transistor and a double-gate transistor respectively
  • Figure 4 shows the DC gate voltage versus IV characteristics between the source and drain of a double-gate transistor
  • Figure 5 shows the gain characteristic curves of the double-gate transistor under different DC gate voltages
  • Fig. 6 shows another possible structure of the polar coordinate transmitter of the embodiment of the present application
  • Fig. 7 shows another possible structure of the polar coordinate transmitter of the embodiment of the present application.
  • Fig. 8 shows another possible structure of the polar coordinate transmitter of the embodiment of the present application.
  • An embodiment of the present application provides a polar transmitter, which is used to transmit a modulated signal with a peak-to-average ratio.
  • a power amplifier (referred to as a power amplifier) is usually installed in the polar coordinate transmitter, and the modulated signal is amplified through the power amplifier.
  • Fig. 1 exemplarily shows a possible structure of the polar coordinate transmitter of the present application.
  • the power amplifier in the polar transmitter can be provided with a single-gate transistor, and the drain of the single-gate transistor (denoted as D) is used to input the For the envelope signal in the modulation signal, the gate (denoted as G) is used to input the phase modulation signal (or phase modulation signal) with a constant envelope in the modulation signal, and the source (denoted as S) is used to output the amplified signal.
  • the amplified signal is an amplified phase-modulated signal.
  • the control of the gain of the single-gate transistor is realized by adjusting the working voltage of the single-gate transistor, so as to realize the envelope recovery of the output signal. It is beneficial to enable the single-gate transistor to have high efficiency in a large power range.
  • the envelope signal can be expressed as A(t)
  • the phase modulation signal can be expressed as cos( ⁇ t+ ⁇ )
  • the output signal can be expressed as A(t)'cos( ⁇ t+ ⁇ ), where A(t)' The magnitude is greater than the magnitude of A(t).
  • Fig. 1 only exemplarily shows part of the structure of the polar transmitter, and optionally, the power amplifier shown in Fig. 1 may further include more single-gate transistors.
  • the amplitude modulator can also be a voltage modulator, a power modulator or an envelope amplifier.
  • FIG. 2 shows the efficiency curves of a single-gate transistor at different drain voltages.
  • the single-gate transistor shown in Figure 2 acts as a power amplifier in a polar transmitter.
  • the RF power amplifier is essentially an energy converter, which is used to convert the DC energy of the power supply into RF energy and transmit it through the antenna.
  • the ratio of the RF power to the DC power supplied by the power supply is called the efficiency of the power amplifier.
  • Efficiency is an important indicator of power amplifiers, and high efficiency is conducive to improving the reliability of polar transmitters. It is not difficult to see from FIG. 2 that the architecture shown in FIG. 1 is conducive to making the single-gate transistor have high efficiency in a large power range.
  • the envelope signal as the working voltage needs to have a large voltage dynamic range, so the amplitude modulator needs to adjust the envelope signal in the modulation signal within a large dynamic range, which will seriously limit The bandwidth and efficiency of the amplitude modulator, which in turn limits the bandwidth and efficiency of the transmitter.
  • the embodiment of the present application proposes to set a double-gate transistor in the power amplifier of the polar coordinate transmitter, and recover the envelope through the double-gate transistor to solve the problem of emission
  • the bandwidth and efficiency of the machine are limited by the dynamic range of the amplitude modulator output.
  • Single-gate transistors consist of a source, a drain, and a gate, while double-gate transistors have a source, a drain, and two gates, where the two gates are independent of each other.
  • Double-gate transistors have the addition of a DC gate between the RF gate and drain compared to single-gate transistors.
  • the gate close to the drain is called a direct current gate (denoted as DC-G), and the gate close to the source is called a radio frequency gate (RF-G).
  • the embodiment of the present application does not limit the specific structure or manufacturing process or materials adopted by the single-gate transistor and the double-gate transistor.
  • the single-gate transistor and the double-gate transistor can be a single-gate field effect transistor and a double-gate Gate Field Effect Transistor.
  • the curve marked with a square represents the gain characteristic curve of the double-gate transistor
  • the curve marked with a diamond represents the gain characteristic curve of a single gate transistor. Since the feedback gate-drain capacitance (denoted as Cgd) of the double-gate transistor is much lower than that of the single-gate structure, its feedback signal is small, so the maximum stable gain (MSG) of the double-gate transistor can be compared with that of the single-gate structure. Gate transistors are substantially improved.
  • a double-gate transistor (or double-gate field effect transistor) has a source, a drain and two gates, and there is a silicon dioxide insulating layer between the metal gate and the channel, so it has Very high input resistance, two of the gates are independent of each other, so that it can be used as a high frequency amplifier, mixer, demodulator and gain control amplifier.
  • Figure 4 shows the DC gate voltage vs. IV characteristics between the source and drain of a double-gate transistor. Any one of the curves marked with a triangle in Figure 4 is the change of the source current (denoted as Ids) with the drain voltage (denoted as Vds) measured when the DC gate voltage is 0V, among which, the four curves marked with a triangle represent The corresponding radio frequency gate voltages are different, and the corresponding radio frequency gate voltages from top to bottom are, for example, -3, -2, -1 and 0V in sequence.
  • the curve marked with a square in Figure 4 is the change of the source current (denoted as Ids) with the drain voltage (denoted as Vds) measured when the DC gate voltage is 1V, and the four curves marked with a square correspond to
  • the radio frequency gate voltages are different, and the corresponding radio frequency gate voltages from top to bottom are, for example, -3, -2, -1 and 0V in sequence. It can be seen from Figure 4 that when the DC gate voltage changes from 0V to +1V, the saturation current of the double-gate transistor will be greatly increased.
  • Fig. 5 shows the gain characteristic curves of the double-gate transistor under different DC gate voltages.
  • the DC grid voltages corresponding to the three curves in Figure 5 are different. Among them, the DC grid voltages corresponding to the curve marked with a square, the curve marked with a triangle and the curve marked with a circle are 1V, 0V and -1V in sequence .
  • the maximum stable gain of the dual-gate transistor has a large dynamic range in the frequency band of interest when the dc gate voltage is varied from -1V to 1V.
  • the polar transmitter may include a first amplifier, wherein the first amplifier includes a first double-gate transistor.
  • the first double-gate transistor is used to receive the envelope signal (denoted as signal 1) in the modulation signal through the first drain and the first DC gate of the first double-gate transistor, and through the The first radio frequency gate of the first double-gate transistor receives the phase modulation signal (referred to as signal 2) from the modulation signal, and outputs the phase modulation signal through the first source of the first double-gate transistor.
  • the amplified signal (referred to as the first amplified signal) (denoted as signal 3).
  • the first DC gate is a gate close to the first drain in the first double-gate transistor
  • the first radio frequency gate is a gate close to the first drain in the first double-gate transistor.
  • One gate of the first source The embodiment of the present application does not limit that the envelope signal received by the first drain is exactly the same as the envelope signal received by the first DC gate. For the convenience of description, the envelope signals received by both are referred to as signal 1 .
  • the envelope signal is input at the first drain and the first DC gate, and the first DC gate
  • the pole can complete the recovery of the envelope in the second signal together with the first drain, therefore, the signal 3 can also be called the amplified signal of the modulated signal.
  • the polar coordinate transmitter shown in Figure 6 is beneficial to reduce the voltage of the envelope signal required by the polar coordinate transmitter due to the increase of the recovery effect of the DC grid on the envelope dynamic range, thereby facilitating increased bandwidth and efficiency of polar transmitters.
  • the embodiment of the present application does not limit that the envelope signal received by the first drain is exactly the same as the envelope signal extracted from the modulation signal.
  • the envelope signal extracted from the modulation signal can be amplitude modulated and then input to the first drain.
  • the first amplifier may further include a first amplitude modulator, and the first amplitude modulator is used to input the envelope signal (denoted as signal 1') to adjust the range.
  • the input signal 1 is an envelope signal extracted from the modulation signal.
  • the first amplitude modulator may also be a voltage modulator, a power modulator, or an envelope amplifier.
  • the embodiment of the present application does not limit that the envelope signal received by the first DC grid is exactly the same as the envelope signal extracted from the modulation signal.
  • the envelope signal extracted from the modulation signal can be input to the first DC grid.
  • the first amplifier further includes a second amplitude modulator, and the second amplitude modulator is used to adjust the envelope signal (denoted as The amplitude of the signal 1') is adjusted.
  • the second amplitude modulator may also be a voltage modulator, a power supply modulator, or an envelope amplifier.
  • the embodiment of the present application does not limit that the envelope signals input to the first amplitude modulator and the second amplitude modulator are exactly the same. For the convenience of description, the embodiment of the present application refers to both as input signal 1'.
  • the first amplitude modulator and/or the second amplitude modulator it is beneficial to reduce the voltage dynamic range required by the polar coordinate transmitter for the signal 1', which is beneficial to improve the bandwidth and efficiency of the polar coordinate transmitter, and is widely used in The field of amplification of the modulated signal.
  • the polar coordinate transmitter or the first amplifier may also include a first capacitor (referred to as C1), one end of the first capacitor is connected to the first DC gate, and the other end is grounded for improving the polar coordinate transmitter. efficiency and performance.
  • C1 a first capacitor
  • the embodiment of the present application does not limit the polar coordinate transmitter to only include the first amplifier or the first double-gate transistor shown in FIG. 6 .
  • the polar coordinate transmitter provided in the embodiment corresponding to FIG. 6 may also include more
  • the polar coordinate transmitter may further include a second amplifier, and the second amplifier is used to amplify the first amplified signal to output a second amplified signal. Or, optionally, more transistors are included in the first amplifier.
  • the polar coordinate transmitter further includes a second double-gate transistor.
  • the second double-gate transistor is configured to receive the envelope signal in the modulation signal through the second drain and the second DC gate of the second double-gate transistor, and through the second double-gate transistor
  • the second RF gate of the transistor receives the first amplified signal, and outputs a second amplified signal for the first amplified signal through the second source of the second double-gate transistor, wherein the second direct current
  • the gate is a gate close to the second drain in the second double-gate transistor
  • the second radio frequency gate is a gate close to the second source in the second double-gate transistor .
  • the envelope signal received by the second drain can be the signal 1 adjusted by the first amplitude modulator
  • the envelope signal received by the second DC gate can be the second amplitude modulated signal to adjust the resulting signal 1.
  • the embodiment of the present application does not limit that the signal adjusted by the first amplitude modulator is exactly the same as the signal adjusted by the second amplitude modulator, and both are referred to as signal 1 for ease of description.
  • the second double-gate transistor can be assigned to the second amplifier, or, assigned to the first amplifier.
  • the polar coordinate transmitter may further include a second capacitor (denoted as C2), one end of the second capacitor is connected to the second DC gate, and the other end is grounded, so as to improve the efficiency and performance of the polar coordinate transmitter.
  • C2 a second capacitor
  • the polar transmitter can also include more double gate transistors.
  • the polar coordinate transmitter may also include a third double-gate transistor, and the third double-gate transistor is used to pass the third drain and the third DC gate of the third double-gate transistor receiving the envelope signal in the modulated signal, receiving the first amplified signal through the third RF gate of the third double-gate transistor, and outputting the signal through the third source of the third double-gate transistor A third amplified signal for the first amplified signal, wherein the third DC gate is a gate close to the third drain in the third double-gate transistor, and the third radio frequency gate is A gate of the third double-gate transistor close to the third source.
  • the envelope signal received by the third drain can be the signal 1 adjusted by the first amplitude modulator
  • the envelope signal received by the third DC gate can be the second amplitude modulated signal to adjust the resulting signal 1.
  • the embodiment of the present application does not limit that the signal adjusted by the first amplitude modulator is exactly the same as the signal adjusted by the second amplitude modulator, and both are referred to as signal 1 for ease of description.
  • the third double-gate transistor may be assigned to the first amplifier, or assigned to the second amplifier, or assigned to the third amplifier.
  • the polar coordinate transmitter may further include a third capacitor (denoted as C3), one end of the third capacitor is connected to the third DC gate, and the other end is grounded, so as to improve the efficiency and performance of the polar coordinate transmitter.
  • C3 a third capacitor
  • the polar coordinate transmitter further includes a signal processor, configured to receive the modulated signal, and output an envelope signal and a phase modulated signal in the modulated signal, respectively.
  • the signal 1' input to the first amplitude modulator and the second amplitude modulator can be the envelope signal output by the signal processor, and the signal input to the first DC grid can be the phase modulation output of the signal processor Signal.
  • the structure of the polar coordinate transmitter has the following characteristics:
  • the power amplifier in the transmitter adopts a three-stage power amplifier cascading form
  • the input signal of the first amplitude modulator in the transmitter is an envelope signal, and the output voltage is used as the drain voltage of the three-stage power amplifier;
  • the power amplifiers all use double-gate transistors, the RF gate inputs the constant envelope phase modulation signal, and the DC gate inputs the envelope signal;
  • the DC gate of the double-gate transistor, the first amplitude modulator and the second amplitude modulator complete the envelope recovery of the output signal together.
  • the power amplifier adopts double-gate transistors, and the recovery of the envelope is completed through the envelope gain control of the DC gate and the amplitude modulator of the drain.
  • the peak-to-average ratio of the signal after clipping is 6dB
  • the first amplitude modulator and the DC gate respectively implement a gain control of 3dB.
  • the output dynamic range of the first amplitude modulator is reduced by 3dB, and the bandwidth and efficiency of the transmitter are improved.
  • the embodiment of the present application also provides a power amplifier, which may include a first double-gate transistor; wherein, the first double-gate transistor is used to pass through the first drain of the first double-gate transistor and the first DC gate receives the envelope signal from the modulation signal, receives the phase modulation signal from the modulation signal through the first RF gate of the first double-gate transistor, and passes through the first double-gate transistor
  • the first source of the polar transistor outputs a first amplified signal for the modulation signal, wherein the first DC gate is a gate close to the first drain in the first double-gate transistor,
  • the first radio frequency gate is a gate close to the first source in the first double gate transistor.
  • the power amplifier provided by the embodiment of the present application increases the recovery effect of the DC gate on the envelope, it is beneficial to reduce the voltage dynamic range of the envelope signal required by the polar transmitter, thereby helping to improve the bandwidth and efficiency.
  • the first amplifier further includes a first amplitude modulator; the first amplitude modulator is configured to adjust the amplitude of the envelope signal input to the first drain.
  • the first amplifier further includes a second amplitude modulator; the second amplitude modulator is configured to adjust the amplitude of the envelope signal input to the first DC gate.
  • the polar coordinate transmitter further includes a second amplifier; the second amplifier is used to amplify the first amplified signal to output a second amplified signal.
  • the second amplifier includes a second double-gate transistor; the second double-gate transistor is configured to receive the The envelope signal in the modulation signal, the first amplified signal is received through the second radio frequency gate of the second double-gate transistor, and the second source output of the second double-gate transistor is used for the The second amplified signal of the first amplified signal, wherein the second DC gate is a gate close to the second drain in the second double-gate transistor, and the second radio frequency gate is the first gate of the second double-gate transistor. One gate of the two double gate transistors is close to the second source.
  • the polar coordinate transmitter further includes a signal processor; the signal processor is configured to receive the modulated signal, and respectively output an envelope signal and a phase modulated signal in the modulated signal.
  • the first amplifier further includes a first capacitor, and the first DC gate is grounded through the first capacitor.
  • the power amplifier provided in the embodiment of the present application can be understood with reference to the first amplifier in the embodiment corresponding to FIG. 6 or the first amplifier in the embodiment corresponding to FIG. 7 , or can include at least one dual gate transistor.
  • the power amplifier provided in the embodiment of the present application adopts a dual-gate transistor, and the dual-gate transistor can control the saturation current of the power transistor by controlling the DC gate voltage. Double-gate transistors can reduce the feedback capacitance, thereby greatly improving the gain characteristics of the transistor.
  • the envelope recovery is accomplished through the envelope gain control of the DC gate and the drain power modulator.
  • the dynamic requirements on the power modulator can be greatly reduced, the bandwidth of the polar transmitter can be increased, and a high-efficiency broadband configurable polar transmitter can be realized.
  • an embodiment of the present application provides a power amplification method.
  • the power amplification method may include steps S1 to S3.
  • the power amplification method provided by the embodiment of the present application increases the recovery effect of the DC grid on the envelope, it is beneficial to reduce the voltage dynamic range of the envelope signal required by the polar transmitter, thereby helping to improve the bandwidth of the polar transmitter and efficiency.
  • the method before inputting the envelope signal in the modulation signal to the first drain of the first double-gate transistor, the method further includes: performing an amplitude calculation on the amplitude of the envelope signal used to input the first drain Adjustment.
  • the method before inputting the envelope signal in the modulation signal to the first DC gate of the first double-gate transistor, the method further includes: inputting the envelope signal to the first DC gate The amplitude of the signal is adjusted.
  • the method further includes: amplifying the first amplified signal to Output the second amplified signal.
  • amplifying the first amplified signal includes: respectively inputting the envelope signal in the modulation signal to the second drain and the second DC gate of the second double-gate transistor, and inputting the envelope signal in the modulation signal to the first
  • the second RF gate of the two double-gate transistors inputs the first amplified signal, and obtains a second amplified signal for the first amplified signal output by the second source of the second double-gate transistor, wherein,
  • the second DC gate is a gate close to the second drain in the second double-gate transistor
  • the second radio frequency gate is a gate close to the second source in the second double-gate transistor pole of a gate.
  • the method before inputting the envelope signal in the modulation signal to the first drain and the first DC gate of the first double-gate transistor respectively, the method further includes: separating the envelope signal from the modulation signal network signal and the phase modulation signal.
  • the power amplification method provided in the embodiment of the present application can be regarded as the method performed by the first amplifier shown in FIG. 6 or 7 , or as the method performed by all or part of the structure shown in FIG. 8 .
  • the relevant description in the embodiment corresponding to FIG. 6 or FIG. 7 or FIG. 8 refer to the relevant description in the embodiment corresponding to FIG. 6 or FIG. 7 or FIG. 8 .
  • An embodiment of the present invention also provides a base station, which may include the polar coordinate transmitter provided in any embodiment of the present invention.
  • the base station provided by the embodiment of the present invention because the polar coordinate transmitter provided by the embodiment of the present application has lower requirements on the voltage dynamic range of the envelope signal, therefore, the base station integrating the polar coordinate transmitter is beneficial to various types of modulation
  • the signal is amplified and transmitted.
  • sequence numbers of the above-mentioned processes do not mean the order of execution, and the execution order of the processes should be determined by their functions and internal logic, and should not be used in the embodiments of the present application.
  • the implementation process constitutes any limitation.

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Abstract

本申请实施例公开了一种极坐标发射机和基站，其中，极坐标发射机的功放中设置有双栅极晶体管，通过向双栅极晶体管的直流栅极和漏极输入包络信号，向射频栅极输入调相信号，以输出调制信号的放大信号，有利于减小极坐标发射机所需的包络信号的电压动态范围，进而有利于提高发射机的带宽和效率。

Description

一种极坐标发射机和基站 技术领域
本申请涉及无线通信技术领域，尤其涉及一种极坐标发射机和基站。
背景技术
在无线通信系统中，调制信号一般具有高峰均比，其中，调制信号例如正交幅度调制(quadrature amplitude modulation，QAM)信号。发射机为了发射高峰均比的调制信号，往往需要选用能够在较宽的功率动态范围内线性工作的极坐标发射机。
极坐标(polar)发射机中的功率放大器(简称功放)以调制信号中的包络信号作为工作电压，对调制信号中恒包络的调相信号(或称相位调制信号)进行放大，通过对功放工作电压的调控以实现对功放增益的控制，从而实现输出信号的包络恢复，有利于使得功放在较大的功率范围内具有很高的效率。
然而，在输出信号的包络恢复过程中，作为工作电压的包络信号需要有很大的电压动态范围，因此极坐标发射机中需要设置电压调制器来调整包络信号的电压动态范围。但是大的电压动态范围会严重限制电压调制器的带宽和效率，进而限制发射机的带宽和效率。
发明内容
本申请实施例提供了一种极坐标发射机和基站，可以减小极坐标发射机所需的包络信号的电压动态范围，进而有利于提高发射机的带宽和效率。
第一方面，本申请实施例提供一种极坐标发射机，包括：第一放大器，所述第一放大器包括第一双栅极晶体管。第一双栅极晶体管包括靠近漏极(称作第一漏极)的栅极(称作直流栅极)和靠近源极(称作第一源极)的栅极(称作射频栅极)。所述第一双栅极晶体管用于通过所述第一双栅极晶体管的第一漏极和第一直流栅极接收调制信号中的包络信号，通过所述第一双栅极晶体管的第一射频栅极接收从所述调制信号中的相位调制信号，通过所述第一双栅极晶体管的第一源极输出对所述调制信号的第一放大信号。
由于双栅极晶体管的直流栅极的输入电压可以在较大的动态范围内调节双栅极晶体管的增益，因此，通过向第一直流栅极输入包络信号，有利于辅助第一漏极的包络恢复功能，实现第一放大信号的包络恢复，从而减小输入第一漏极的包络信号的电压动态范围，进而有利于提高发射机的带宽和效率。
可选的，所述第一放大器还包括第一幅度调制器；所述第一幅度调制器，用于对用于输入所述第一漏极的包络信号的幅度进行调整。
可选的，所述第一放大器还包括第二幅度调制器；所述第二幅度调制器，用于对用于输入所述第一直流栅极的包络信号的幅度进行调整。
通过设置第一幅度调制器和/或第二幅度调制器，有利于降低极坐标发射机对信号1’所需的电压动态范围，有利于提高极坐标发射机的带宽和效率，进而广泛应用于对调制信号的放大领域。
可选的，所述极坐标发射机还包括第二放大器；所述第二放大器用于对所述第一放大信 号进行放大，以输出第二放大信号。有利于增加极坐标发射机对调相信号的增益。
可选的，所述第二放大器包括第二双栅极晶体管；所述第二双栅极晶体管，用于通过所述第二双栅极晶体管的第二漏极和第二直流栅极接收所述调制信号中的包络信号，通过所述第二双栅极晶体管的第二射频栅极接收所述第一放大信号，通过所述第二双栅极晶体管的第二源极输出对所述第一放大信号的第二放大信号，其中，所述第二直流栅极为所述第二双栅极晶体管中靠近所述第二漏极的一个栅极，所述第二射频栅极为所述第二双栅极晶体管中靠近所述第二源极的一个栅极。在第二放大器中采用第二双栅极晶体管，有利于进一步降低极坐标发射机所需的包络信号的电压动态范围。
可选的，所述极坐标发射机还包括信号处理器；所述信号处理器，用于接收所述调制信号，并分别输出所述调制信号中的包络信号和相位调制信号。
可选的，所述第一放大器还包括第一电容，所述第一直流栅极通过所述第一电容接地。
第二方面，本申请实施例提供一种基站，可以包括如第一方面提供的任意一种可能的极坐标发射机。
第三方面，本申请实施例还提供一种功率放大器，该功率放大器可以包括第一双栅极晶体管；其中，所述第一双栅极晶体管，用于通过所述第一双栅极晶体管的第一漏极和第一直流栅极接收调制信号中的包络信号，通过所述第一双栅极晶体管的第一射频栅极接收从所述调制信号中的相位调制信号，通过所述第一双栅极晶体管的第一源极输出对所述调制信号的第一放大信号，其中，所述第一直流栅极为所述第一双栅极晶体管中靠近所述第一漏极的一个栅极，所述第一射频栅极为所述第一双栅极晶体管中靠近所述第一源极的一个栅极。
可选的，所述第一放大器还包括第一幅度调制器；所述第一幅度调制器，用于对用于输入所述第一漏极的包络信号的幅度进行调整。
可选的，所述第一放大器还包括第二幅度调制器；所述第二幅度调制器，用于对用于输入所述第一直流栅极的包络信号的幅度进行调整。
可选的，所述极坐标发射机还包括第二放大器；所述第二放大器用于对所述第一放大信号进行放大，以输出第二放大信号。
可选的，所述第二放大器包括第二双栅极晶体管；所述第二双栅极晶体管，用于通过所述第二双栅极晶体管的第二漏极和第二直流栅极接收所述调制信号中的包络信号，通过所述第二双栅极晶体管的第二射频栅极接收所述第一放大信号，通过所述第二双栅极晶体管的第二源极输出对所述第一放大信号的第二放大信号，其中，所述第二直流栅极为所述第二双栅极晶体管中靠近所述第二漏极的一个栅极，所述第二射频栅极为所述第二双栅极晶体管中靠近所述第二源极的一个栅极。
可选的，所述极坐标发射机还包括信号处理器；所述信号处理器，用于接收所述调制信号，并分别输出所述调制信号中的包络信号和相位调制信号。
可选的，所述第一放大器还包括第一电容，所述第一直流栅极通过所述第一电容接地。
第四方面，本申请实施例提供一种功率放大的方法，包括：分别向第一双栅极晶体管的第一漏极和第一直流栅极输入调制信号中的包络信号，所述第一直流栅极为所述第一双栅极晶体管中靠近所述第一漏极的一个栅极；分别向所述第一双栅极晶体管的第一射频栅极输入所述调制信号中的相位调制信号，所述第一射频栅极为所述第一双栅极晶体管中靠近所述第 一源极的一个栅极；获取所述第一双栅极晶体管的第一源极输出的对所述调制信号的第一放大信号。
可选的，在向第一双栅极晶体管的第一漏极输入调制信号中的包络信号之前，所述方法还包括：对用于输入所述第一漏极的包络信号的幅度进行调整。
可选的，在向第一双栅极晶体管的第一直流栅极输入调制信号中的包络信号之前，所述方法还包括：对用于输入所述第一直流栅极的包络信号的幅度进行调整。
可选的，在获取所述第一双栅极晶体管的第一源极输出的对所述调制信号的第一放大信号之后，所述方法还包括：对所述第一放大信号进行放大，以输出第二放大信号。
可选的，对所述第一放大信号进行放大，包括：分别向第二双栅极晶体管的第二漏极和第二直流栅极输入所述调制信号中的包络信号，向所述第二双栅极晶体管的第二射频栅极输入所述第一放大信号，获取所述第二双栅极晶体管的第二源极输出的对所述第一放大信号的第二放大信号，其中，所述第二直流栅极为所述第二双栅极晶体管中靠近所述第二漏极的一个栅极，所述第二射频栅极为所述第二双栅极晶体管中靠近所述第二源极的一个栅极。
可选的，在分别向第一双栅极晶体管的第一漏极和第一直流栅极输入调制信号中的包络信号之前，所述方法还包括：从调制信号中分离出所述包络信号和所述相位调制信号。
第二方面、第三方面、第四方面或者其中任一种可能实现方式所带来的技术效果可参见上述第一方面或上述第一方面中不同的可能实现方式所带来的技术效果，此处不再赘述。
附图说明
图1示例性示出本申请极坐标发射机一种可能的结构；
图2示出了不同漏极电压下单栅极晶体管的效率曲线；
图3分别示出了单栅极晶体管和双栅极晶体管的增益特性曲线；
图4示出了双栅极晶体管的直流栅极电压对源极与漏极间的IV特性；
图5示出了双栅极晶体管在不同直流栅极电压下的增益特性曲线；
图6示出了本申请实施例极坐标发射机另一种可能的结构；
图7示出了本申请实施例极坐标发射机另一种可能的结构；
图8示出了本申请实施例极坐标发射机另一种可能的结构。
具体实施方式
本申请实施例提供了一种极坐标(polar)发射机，用于发射高峰均比的调制信号。极坐标发射机中通常设置有功率放大器(简称功放)，通过功放对调制信号进行放大。
图1示例性示出本申请极坐标发射机一种可能的结构。参考图1，在一种可能的实现方式中，极坐标发射机可以中的功放可以设置有单栅极晶体管，单栅极晶体管的漏极(记为D)用于输入经幅度调制器放大的调制信号中的包络信号，栅极(记为G)用于输入调制信号中恒包络的调相信号(或称相位调制信号)，源极(记为S)用于输出放大信号，该放大信号为放大后的调相信号。由于单栅极晶体管的漏极输入的工作电压为包络信号，因此，通过对单栅极晶体管工作电压的调控以实现对单栅极晶体管增益的控制，从而实现输出信号的包络恢复，有利于使得单栅极晶体管在较大的功率范围内具有很高的效率。假设包络信号可以表示 为A(t)，调相信号可以表示为cos(ωt+φ)，那么输出信号可以表示为A(t)’cos(ωt+φ)，其中A(t)’的幅度大于A(t)的幅度。
图1仅示例性示出了极坐标发射机中的部分结构，可选的，图1所示的功放还可以包括更多单栅极晶体管。可选的，幅度调制器也可以为电压调制器或电源调制器或包络放大器。
图2示出了不同漏极电压下单栅极晶体管的效率曲线。图2所示的单栅极晶体管在极坐标发射机中作为一种功放。射频功放在本质上是一个能量转换器，用于将电源的直流能量转变为射频能量通过天线发射出去，其射频功率于电源供给的直流功率之比称作功放的效率。效率是功放的重要指标，高效率有利于提升极坐标发射机的可靠性。通过图2不难看出，图1所示的架构有利于使得单栅极晶体管在较大的功率范围内具有很高的效率。
在输出信号的包络恢复过程中，作为工作电压的包络信号需要有很大的电压动态范围，因此幅度调制器需要在较大动态范围内调整调制信号中的包络信号，这会严重限制幅度调制器的带宽和效率，进而限制发射机的带宽和效率。
为了减小极坐标发射机所需的包络信号的电压动态范围，本申请实施例提出在极坐标发射机的功放中设置双栅极晶体管，通过双栅极晶体管进行包络恢复，以解决发射机的带宽和效率受幅度调制器输出动态范围限制的问题。
下面首先对双栅极晶体管和单栅极晶体管之间的区别进行介绍。
单栅极晶体管包括一个源极、一个漏极和一个栅极，而双栅极晶体管有一个源极、一个漏极和两个栅极，其中两个栅极是互相独立的。双栅极晶体管相对于单栅极晶体管，在射频栅极和漏极之间增加了一个直流栅极。将靠近漏极的栅极称作直流栅极(记为DC-G)，将靠近源极的称作射频栅极(RF-G)。
本申请实施例不限定单栅极晶体管和双栅极晶体管所采用的具体结构或制备工艺或材料，可选的，单栅极晶体管和双栅极晶体管可以分别为单栅极场效应管和双栅极场效应管。
对于具有相同栅长、栅漏间距和外延结构的单栅极晶体管和双栅极晶体管，对比它们的增益特性，如图3所示，标记有方形的曲线代表双栅极晶体管的增益特性曲线，标记有菱形的曲线代表单栅极晶体管的增益特性曲线。由于双栅极晶体管的反馈栅漏电容(记为Cgd)远低于单栅极结构，故其反馈信号较小，因此双栅极晶体管的最大稳定增益(maximum stable gain，MSG)可以相对于单栅极晶体管大幅度提高。
示例性的，双栅极晶体管(或称双栅场效应管)有一个源极、一个漏极和两个栅极，在金属栅极与沟道之间有一层二氧化硅绝缘层，因此具有很高的输入电阻，其中两个栅极是互相独立的，使得它可以用来作高频放大器、混频器、解调器及增益控制放大器等。
下面介绍双栅极晶体管的直流栅极对增益的调节作用。
图4示出了双栅极晶体管的直流栅极电压对源极与漏极间的IV特性。图4中标记有三角形的任意一条曲线为直流栅极电压为0V时测得的源极电流(记为Ids)随漏极电压(记为Vds)的变化，其中，标记有三角形的四条曲线所对应的射频栅极电压不同，从上至下所对应的射频栅极的电压例如依次为-3、-2、-1和0V。图4中标记有方形的曲线为直流栅极电压为1V时测得的源极电流(记为Ids)随漏极电压(记为Vds)的变化，其中，标记有方形的四 条曲线所对应的射频栅极电压不同，从上至下所对应的射频栅极的电压例如依次为-3、-2、-1和0V。通过图4可以看出，当直流栅极电压从0V变为+1V时，双栅极晶体管的饱和电流会大幅度地提升。
图5示出了双栅极晶体管在不同直流栅极电压下的增益特性曲线。图5中的三条曲线所对应的直流栅极电压不同，其中，标记有方形的曲线、标记有三角形的曲线和标记有圆形的曲线所对应的直流栅极电压依次为1V、0V和-1V。如图5所示，直流栅极电压从-1V变化到1V，双栅极晶体管的最大稳定增益在所关心的频段内有很大的动态范围。
综合图4和图5可以看出，双栅极晶体管的直流栅极电压可以在较大的动态范围内调节晶体管的增益，若在直流栅极处输入包络信号，可以实现输出放大信号的包络恢复。
下面对本申请实施例提出的采用双栅极晶体管的极坐标发射机进行具体介绍。
图6示出了本申请实施例极坐标发射机另一种可能的结构。参考图6，极坐标发射机可以包括第一放大器，其中，所述第一放大器包括第一双栅极晶体管。所述第一双栅极晶体管，用于通过所述第一双栅极晶体管的第一漏极和第一直流栅极接收调制信号中的包络信号(记为信号1)，通过所述第一双栅极晶体管的第一射频栅极接收从所述调制信号中的相位调制信号(记为信号2)，通过所述第一双栅极晶体管的第一源极输出对相位调制信号的放大信号(称作第一放大信号)(记为信号3)。其中，所述第一直流栅极为所述第一双栅极晶体管中靠近所述第一漏极的一个栅极，所述第一射频栅极为所述第一双栅极晶体管中靠近所述第一源极的一个栅极。本申请实施例不限定第一漏极接收的包络信号和第一直流栅极接收的包络信号完全相同，为了便于描述，将二者接收的包络信号均称作信号1。
由于双栅极晶体管的漏极和直流栅极都能用于调节源极输出对射频栅极输入的增益，在第一漏极和第一直流栅极输入包络信号，第一直流栅极可以与第一漏极一起完成第二信号中包络的恢复，因此，信号3也可以称作调制信号的放大信号。和图1所示的极坐标发射机相比，图6所示的极坐标发射机由于增加了直流栅极对包络的恢复作用，有利于降低极坐标发射机所需的包络信号的电压动态范围，从而有利于提高极坐标发射机的带宽和效率。
本申请实施例不限定第一漏极接收的包络信号与从调制信号中提取的包络信号完全相同，可选的，从调制信号中提取的包络信号可以经过幅度调制后输入到第一漏极。可选的，参考图7，所述第一放大器还可以包括第一幅度调制器，所述第一幅度调制器，用于对用于输入所述第一漏极的包络信号(记为信号1’)的幅度进行调整。可选的，输入信号1为从调制信号中提取的包络信号。可选的，第一幅度调制器也可以为电压调制器或电源调制器或包络放大器。
本申请实施例不限定第一直流栅极接收的包络信号与从调制信号中提取的包络信号完全相同，可选的，从调制信号中提取的包络信号可以经过幅度调制后输入到第一直流栅极。可选的，参考图7，所述第一放大器还包括第二幅度调制器，所述第二幅度调制器，用于对用于输入所述第一直流栅极的包络信号(记为信号1’)的幅度进行调整。可选的，第二幅度调制器也可以为电压调制器或电源调制器或包络放大器。
本申请实施例不限定输入第一幅度调制器和输入第二幅度调制器的包络信号完全相同，为了便于描述，本申请实施例将二者称作输入信号1’。
通过设置第一幅度调制器和/或第二幅度调制器，有利于降低极坐标发射机对信号1’所需的电压动态范围，有利于提高极坐标发射机的带宽和效率，进而广泛应用于对调制信号的放大领域。
可选的，极坐标发射机或第一放大器还可以包括第一电容(记为C1)，第一电容的一端与第一直流栅极连接，另一端接地，用于提高极坐标发射机的效率和性能。
本申请实施例不限定极坐标发射机仅包括图6所示的第一放大器或第一双栅极晶体管，可选的，图6对应的实施例所提供的极坐标发射机还可以包括更多的放大器，可选的，极坐标发射机还可以包括第二放大器，所述第二放大器用于对所述第一放大信号进行放大，以输出第二放大信号。或者，可选的，在第一放大器中包括更多的晶体管。
可选的，所述极坐标发射机还包括第二双栅极晶体管。所述第二双栅极晶体管，用于通过所述第二双栅极晶体管的第二漏极和第二直流栅极接收所述调制信号中的包络信号，通过所述第二双栅极晶体管的第二射频栅极接收所述第一放大信号，通过所述第二双栅极晶体管的第二源极输出对所述第一放大信号的第二放大信号，其中，所述第二直流栅极为所述第二双栅极晶体管中靠近所述第二漏极的一个栅极，所述第二射频栅极为所述第二双栅极晶体管中靠近所述第二源极的一个栅极。
参考图7，可选的，第二漏极接收到的包络信号可以为经第一幅度调制器调整得到的信号1，第二直流栅极接收到的包络信号可以为经第二幅度调制器调整得到的信号1。本申请实施例不限定经第一幅度调制器调整得到的信号和经第二幅度调制器调整得到的信号完全相同，为了便于描述，将二者均称作信号1。
可选的，第二双栅极晶体管可以划归至第二放大器中，或者，划归至第一放大器中。
可选的，极坐标发射机还可以包括第二电容(记为C2)，第二电容的一端与第二直流栅极连接，另一端接地，用于提高极坐标发射机的效率和性能。
可选的，极坐标发射机还可以包括更多双栅极晶体管。例如，可选的，极坐标发射机还可以包括第三双栅极晶体管，所述第三双栅极晶体管，用于通过所述第三双栅极晶体管的第三漏极和第三直流栅极接收所述调制信号中的包络信号，通过所述第三双栅极晶体管的第三射频栅极接收所述第一放大信号，通过所述第三双栅极晶体管的第三源极输出对所述第一放大信号的第三放大信号，其中，所述第三直流栅极为所述第三双栅极晶体管中靠近所述第三漏极的一个栅极，所述第三射频栅极为所述第三双栅极晶体管中靠近所述第三源极的一个栅极。
参考图7，可选的，第三漏极接收到的包络信号可以为经第一幅度调制器调整得到的信号1，第三直流栅极接收到的包络信号可以为经第二幅度调制器调整得到的信号1。本申请实施例不限定经第一幅度调制器调整得到的信号和经第二幅度调制器调整得到的信号完全相同，为了便于描述，将二者均称作信号1。
可选的，第三双栅极晶体管可以划归至第一放大器中，或者，划归至第二放大器中，或者，划归至第三放大器中。
可选的，极坐标发射机还可以包括第三电容(记为C3)，第三电容的一端与第三直流栅极连接，另一端接地，用于提高极坐标发射机的效率和性能。
可选的，所述极坐标发射机还包括信号处理器，所述信号处理器，用于接收所述调制信号，并分别输出所述调制信号中的包络信号和相位调制信号。可选的，输入第一幅度调制器和第二幅度调制器的信号1’可以均为信号处理器输出的包络信号，输入第一直流栅极的信号可以为信号处理器输出的相位调制信号。
以上介绍了本申请实施例提供的极坐标发射机。以图8对应的实施例为例，该极坐标发射机的结构具有如下特点：
1.发射机中的功放采用三级功放级联形式；
2.发射机中的第一幅度调制器的输入信号为包络信号，输出电压作为三级功放的漏极电压；
3.功放均采用双栅极晶体管，射频栅极输入恒包络调相信号，直流栅极输入包络信号；
4.工作时，双栅极晶体管的直流栅极、第一幅度调制器和第二幅度调制器一起完成输出信号的包络恢复。
本发明提出的极坐标发射机架构，其中的功放采用双栅极晶体管，包络的恢复通过直流栅极的包络增益控制和漏极的幅度调制器一起完成。例如，对于常见的峰均比为9dB的调制信号，削波处理后信号峰均比为6dB，第一幅度调制器和直流栅极分别实现3dB的增益控制。第一幅度调制器的输出动态范围降低了3dB，发射机的带宽和效率得到提升。
本申请实施例还提供一种功率放大器，该功率放大器可以包括第一双栅极晶体管；其中，所述第一双栅极晶体管，用于通过所述第一双栅极晶体管的第一漏极和第一直流栅极接收调制信号中的包络信号，通过所述第一双栅极晶体管的第一射频栅极接收从所述调制信号中的相位调制信号，通过所述第一双栅极晶体管的第一源极输出对所述调制信号的第一放大信号，其中，所述第一直流栅极为所述第一双栅极晶体管中靠近所述第一漏极的一个栅极，所述第一射频栅极为所述第一双栅极晶体管中靠近所述第一源极的一个栅极。
由于本申请实施例提供的功率放大器增加了直流栅极对包络的恢复作用，有利于降低极坐标发射机所需的包络信号的电压动态范围，从而有利于提高极坐标发射机的带宽和效率。
可选的，所述第一放大器还包括第一幅度调制器；所述第一幅度调制器，用于对用于输入所述第一漏极的包络信号的幅度进行调整。
通过对输入所述第一漏极的包络信号的幅度进行调整，有利于降低功率放大器对包络信号所需的电压动态范围，有利于提高极坐标发射机的带宽和效率，进而广泛应用于对调制信号的放大领域。
可选的，所述第一放大器还包括第二幅度调制器；所述第二幅度调制器，用于对用于输入所述第一直流栅极的包络信号的幅度进行调整。
通过对输入所述第一直流栅极的包络信号的幅度进行调整，有利于降低功率放大器对包络信号所需的电压动态范围，有利于提高极坐标发射机的带宽和效率，进而广泛应用于对调 制信号的放大领域。
可选的，所述极坐标发射机还包括第二放大器；所述第二放大器用于对所述第一放大信号进行放大，以输出第二放大信号。
可选的，所述第二放大器包括第二双栅极晶体管；所述第二双栅极晶体管，用于通过所述第二双栅极晶体管的第二漏极和第二直流栅极接收所述调制信号中的包络信号，通过所述第二双栅极晶体管的第二射频栅极接收所述第一放大信号，通过所述第二双栅极晶体管的第二源极输出对所述第一放大信号的第二放大信号，其中，所述第二直流栅极为所述第二双栅极晶体管中靠近所述第二漏极的一个栅极，所述第二射频栅极为所述第二双栅极晶体管中靠近所述第二源极的一个栅极。
可选的，所述极坐标发射机还包括信号处理器；所述信号处理器，用于接收所述调制信号，并分别输出所述调制信号中的包络信号和相位调制信号。
可选的，所述第一放大器还包括第一电容，所述第一直流栅极通过所述第一电容接地。
作为举例，本申请实施例提供的功率放大器可以参考图6对应的实施例中的第一放大器或图7对应的实施例中的第一放大器进行理解，或者可以包括图8所示的至少一个双栅极晶体管。
本申请实施例提供的功率放大器采用双栅型晶体管，双栅型晶体管通过控制直流栅极电压可以控制功率管的饱和电流。双栅型晶体管可以降低反馈电容，从而大大改进晶体管的增益特性。
通过在双栅型晶体管的直流栅极增加包络控制，包络恢复通过直流栅极的包络增益控制和漏级电源调制器来一起完成。
由于增加了直流栅极的包络控制，可以大大减小对电源调制器的动态要求，可以增加polar发射机的带宽，实现高效的宽带可配置极坐标发射机。
基于相同构思，本申请实施例提供一种功率放大的方法。
该功率放大的方法可以包括步骤S1至S3。
S1、分别向第一双栅极晶体管的第一漏极和第一直流栅极输入调制信号中的包络信号，所述第一直流栅极为所述第一双栅极晶体管中靠近所述第一漏极的一个栅极；
S2、分别向所述第一双栅极晶体管的第一射频栅极输入所述调制信号中的相位调制信号，所述第一射频栅极为所述第一双栅极晶体管中靠近所述第一源极的一个栅极；
S3、获取所述第一双栅极晶体管的第一源极输出的对所述调制信号的第一放大信号。
由于本申请实施例提供的功率放大方法增加了直流栅极对包络的恢复作用，有利于降低极坐标发射机所需的包络信号的电压动态范围，从而有利于提高极坐标发射机的带宽和效率。、
可选的，在向第一双栅极晶体管的第一漏极输入调制信号中的包络信号之前，所述方法还包括：对用于输入所述第一漏极的包络信号的幅度进行调整。
通过对输入所述第一漏极的包络信号的幅度进行调整，有利于降低功率放大器对包络信号所需的电压动态范围，有利于提高极坐标发射机的带宽和效率，进而广泛应用于对调制信 号的放大领域。
可选的，在向第一双栅极晶体管的第一直流栅极输入调制信号中的包络信号之前，所述方法还包括：对用于输入所述第一直流栅极的包络信号的幅度进行调整。
通过对输入所述第一直流栅极的包络信号的幅度进行调整，有利于降低功率放大器对包络信号所需的电压动态范围，有利于提高极坐标发射机的带宽和效率，进而广泛应用于对调制信号的放大领域。
可选的，在获取所述第一双栅极晶体管的第一源极输出的对所述调制信号的第一放大信号之后，所述方法还包括：对所述第一放大信号进行放大，以输出第二放大信号。
可选的，对所述第一放大信号进行放大，包括：分别向第二双栅极晶体管的第二漏极和第二直流栅极输入所述调制信号中的包络信号，向所述第二双栅极晶体管的第二射频栅极输入所述第一放大信号，获取所述第二双栅极晶体管的第二源极输出的对所述第一放大信号的第二放大信号，其中，所述第二直流栅极为所述第二双栅极晶体管中靠近所述第二漏极的一个栅极，所述第二射频栅极为所述第二双栅极晶体管中靠近所述第二源极的一个栅极。
可选的，在分别向第一双栅极晶体管的第一漏极和第一直流栅极输入调制信号中的包络信号之前，所述方法还包括：从调制信号中分离出所述包络信号和所述相位调制信号。
需要说明的是，本申请实施例提供的功率放大方法可以视为图6或图7所示的第一放大器所执行的方法，或者视为图8所示的全部或部分结构所执行的方法，本申请实施例方法中未详尽描述的实现方式和技术效果可以参见图6或图7或图8对应的实施例中的相关描述。
本发明实施例还提供一种基站，其可以包括本发明任意实施例所提供的极坐标发射机。本发明实施例提供的基站，由于本申请实施例提供的极坐标发射机对包络信号的电压动态范围要求较低，因此，集成了该极坐标发射机的基站有利于对各种类型的调制信号进行放大并发射。
本申请的说明书和权利要求书及上述附图中的术语“第一”、第二”、“第三”等是用于区别类似的对象，而不用于描述特定的顺序或先后次序。应该理解这样使用的术语在适当情况下可以互换，这仅仅是描述本申请的实施例中对相同属性的对象在描述时所采用的区分方式。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，以便包含一系列单元的过程、方法、系统、产品或设备不必限于那些单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它单元。本申请实施例中出现的术语“多个”指两个或两个以上。应理解，本文中术语“和/或”，仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。
应理解，在本申请的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统，装置 和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
以上实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的范围。

Claims (10)

  1. 一种极坐标发射机，其特征在于，包括第一放大器，所述第一放大器包括第一双栅极晶体管；
    所述第一双栅极晶体管，用于通过所述第一双栅极晶体管的第一漏极和第一直流栅极接收调制信号中的包络信号，通过所述第一双栅极晶体管的第一射频栅极接收从所述调制信号中的相位调制信号，通过所述第一双栅极晶体管的第一源极输出对所述调制信号的第一放大信号，其中，所述第一直流栅极为所述第一双栅极晶体管中靠近所述第一漏极的一个栅极，所述第一射频栅极为所述第一双栅极晶体管中靠近所述第一源极的一个栅极。
  2. 根据权利要求1所述的极坐标发射机，其特征在于，所述第一放大器还包括第一幅度调制器；
    所述第一幅度调制器，用于对用于输入所述第一漏极的包络信号的幅度进行调整。
  3. 根据权利要求1或2所述的极坐标发射机，其特征在于，所述第一放大器还包括第二幅度调制器；
    所述第二幅度调制器，用于对用于输入所述第一直流栅极的包络信号的幅度进行调整。
  4. 根据权利要求1至3中任一项所述的极坐标发射机，其特征在于，所述极坐标发射机还包括第二放大器；
    所述第二放大器用于对所述第一放大信号进行放大，以输出第二放大信号。
  5. 根据权利要求4所述的极坐标发射机，其特征在于，所述第二放大器包括第二双栅极晶体管；
    所述第二双栅极晶体管，用于通过所述第二双栅极晶体管的第二漏极和第二直流栅极接收所述调制信号中的包络信号，通过所述第二双栅极晶体管的第二射频栅极接收所述第一放大信号，通过所述第二双栅极晶体管的第二源极输出对所述第一放大信号的第二放大信号，其中，所述第二直流栅极为所述第二双栅极晶体管中靠近所述第二漏极的一个栅极，所述第二射频栅极为所述第二双栅极晶体管中靠近所述第二源极的一个栅极。
  6. 根据权利要求1至5中任一项所述的极坐标发射机，其特征在于，所述极坐标发射机还包括信号处理器；
    所述信号处理器，用于接收所述调制信号，并分别输出所述调制信号中的包络信号和相位调制信号。
  7. 根据权利要求1至6中任一项所述的极坐标发射机，其特征在于，所述第一放大器还包括第一电容，所述第一直流栅极通过所述第一电容接地。
  8. 一种基站，其特征在于，包括权利要求1至7中任一项所述的极坐标发射机。
  9. 一种功率放大器，其特征在于，包括第一双栅极晶体管；
    所述第一双栅极晶体管，用于通过所述第一双栅极晶体管的第一漏极和第一直流栅极接收调制信号中的包络信号，通过所述第一双栅极晶体管的第一射频栅极接收从所述调制信号中的相位调制信号，通过所述第一双栅极晶体管的第一源极输出对所述调制信号的第一放大信号，其中，所述第一直流栅极为所述第一双栅极晶体管中靠近所述第一漏极的一个栅极，所述第一射频栅极为所述第一双栅极晶体管中靠近所述第一源极的一个栅极。
  10. 一种功率放大的方法，其特征在于，包括：
    分别向第一双栅极晶体管的第一漏极和第一直流栅极输入调制信号中的包络信号，所述第一直流栅极为所述第一双栅极晶体管中靠近所述第一漏极的一个栅极；
    分别向所述第一双栅极晶体管的第一射频栅极输入所述调制信号中的相位调制信号，所述第一射频栅极为所述第一双栅极晶体管中靠近所述第一源极的一个栅极；
    获取所述第一双栅极晶体管的第一源极输出的对所述调制信号的第一放大信号。
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