WO2023026599A1 - Power semiconductor unit, and method for manufacturing power semiconductor unit - Google Patents

Power semiconductor unit, and method for manufacturing power semiconductor unit Download PDF

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Publication number
WO2023026599A1
WO2023026599A1 PCT/JP2022/019809 JP2022019809W WO2023026599A1 WO 2023026599 A1 WO2023026599 A1 WO 2023026599A1 JP 2022019809 W JP2022019809 W JP 2022019809W WO 2023026599 A1 WO2023026599 A1 WO 2023026599A1
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WIPO (PCT)
Prior art keywords
power semiconductor
heat sink
bonding
semiconductor module
insulating substrate
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PCT/JP2022/019809
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French (fr)
Japanese (ja)
Inventor
感 安井
宇幸 串間
俊樹 谷村
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株式会社日立パワーデバイス
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Publication of WO2023026599A1 publication Critical patent/WO2023026599A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/467—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing gases, e.g. air
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N

Definitions

  • the present invention relates to the structure of a power semiconductor unit and its manufacturing method, and in particular to a technique effectively applied to a power semiconductor unit equipped with a cooler.
  • HV hybrid electric vehicles
  • EV electric vehicles
  • Patent Document 1 is a background technology related to in-vehicle power semiconductor units.
  • Patent Document 1 discloses a configuration of a power semiconductor module in which insulating substrates attached to both sides of a power semiconductor element and cooling means such as a heat sink are joined by brazing such as soldering or brazing.
  • the power semiconductor elements 1 and 2 are joined to the insulating substrates 9 and 18 by soldering or the like, and the insulating substrates 9 and 18 are connected to the heat sinks 13 and 23 provided with heat sink fins. They are joined by brazing (soldering or brazing).
  • Patent Document 1 discloses that a high-temperature bonding material in which copper particles and tin particles are mixed, for example, is used as a bonding material such as solder for bonding the power semiconductor elements 1 and 2 to the insulating substrates 9 and 18.
  • the bonding material such as solder for bonding the heat sinks 13 and 23 to the insulating substrates 9 and 18 has a lower melting point than the bonding material such as solder for bonding the power semiconductor elements 1 and 2 to the insulating substrates 9 and 18.
  • the use of Sn-3Ag-0.5Cu lead-free solder is disclosed.
  • both CuSn solder, which is a high-temperature bonding material, and Sn-3Ag-0.5Cu lead-free solder exemplified in Patent Document 1 are solders, and even CuSn solder, which is a high-temperature bonding material, contains Sn. Since the melting point is about 350°C at the highest, there is a limit to changing the melting point greatly, and the heat generated when Sn-3Ag-0.5Cu lead-free soldering may deteriorate the quality of CuSn solder. have a nature.
  • an object of the present invention is to provide a power semiconductor unit having a cooler, which is capable of achieving both cooling efficiency and mounting flexibility of the mounted power semiconductor module, and a method of manufacturing the same.
  • the present invention provides a power semiconductor element, a first insulating substrate bonded to one surface of the power semiconductor element, and a wiring metal bonded to the other surface of the power semiconductor element.
  • the bonding between the power semiconductor element and the first insulating substrate, the bonding between the power semiconductor element and the wiring metal component, and the bonding between the wiring metal component and the second insulating substrate are sintered metal bonding. characterized by
  • the present invention includes: (a) a step of bonding a power semiconductor element onto a first insulating substrate by sintered metal bonding; and (b) bonding a wiring metal component onto the power semiconductor element by sintered metal bonding. (c) bonding a second insulating substrate onto the wiring metal component by sintered metal bonding; (d) the first insulating substrate, the power semiconductor element, the wiring metal component and the second (e) after step (d), bonding the first insulating substrate to the heat sink by solder bonding or sintered metal bonding;
  • a method of manufacturing a power semiconductor unit including:
  • the present invention cools a first power semiconductor module, a second power semiconductor module superimposed on the first power semiconductor module, and the first power semiconductor module and the second power semiconductor module.
  • a heat sink wherein the heat sink has at least one liquid-cooled heat sink, and the first power semiconductor module has two main surfaces only one of which is thermally coupled to the liquid-cooled heat sink.
  • the second power semiconductor module is characterized in that only one of two main surfaces of the second power semiconductor module is thermally connected to the liquid-cooled heat sink.
  • a power semiconductor unit equipped with a cooler it is possible to realize a power semiconductor unit capable of achieving both cooling efficiency and mounting flexibility of the mounted power semiconductor module, and a method of manufacturing the same.
  • FIG. 2B is a diagram showing a method of incorporating the power semiconductor unit of FIG. 2A into a cooling jacket; It is a figure which shows the modification of FIG. 2A and FIG. 2B. It is a figure which shows the mounting example of the power semiconductor unit which concerns on Example 2 of this invention. It is a figure which shows the structure of the power semiconductor unit which concerns on Example 3 of this invention.
  • FIG. 5B is a diagram showing a cross section taken along line A-A' of FIG.
  • FIG. 5A It is a figure which shows the structure of the power semiconductor unit which concerns on Example 4 of this invention.
  • FIG. 6B is a diagram showing a B-B′ cross section of FIG. 6A. It is a figure which shows the structure of the power semiconductor unit which concerns on Example 5 of this invention.
  • FIG. 7B is a diagram showing a C-C′ cross section of FIG. 7A.
  • FIG. 1 is a diagram showing a cross-sectional structure of a power semiconductor unit 1 of this embodiment.
  • power semiconductor elements such as power MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), insulated gate bipolar transistors (IGBTs), and diodes are formed are referred to as "A power semiconductor element mounted on an insulating substrate and sealed with resin is called a “power semiconductor module”, and a power semiconductor module equipped with a cooler such as a heat sink is called a “power semiconductor unit”. call.
  • power semiconductor module Metal-Oxide-Semiconductor Field-Effect Transistors
  • IGBTs insulated gate bipolar transistors
  • the power semiconductor unit 1 of this embodiment includes, as main components, a power semiconductor element 3 which is a semiconductor chip on which a power semiconductor element such as an IGBT is formed, and a The bonded insulating substrate 2, the wiring metal component 4 such as a spacer or lead frame bonded to the upper surface of the power semiconductor element 3, and the surface of the wiring metal component 4 opposite to the surface to which the power semiconductor element 3 is bonded. It has a bonded insulating substrate 5 and heat sinks 6 and 7 for cooling the heat from the power semiconductor element 3 .
  • the insulating substrate 2 for example, a DBC substrate (Direct Bonded Copper) in which copper plates 9 and 10 are bonded to both sides of a ceramic substrate 8 is used.
  • the insulating substrate 5 is a DBC substrate or the like in which copper plates 12 and 13 are bonded to both sides of a ceramic substrate 11 .
  • the heat sinks 6 and 7 are provided with cooling fins and cool the heat from the power semiconductor elements 3 by heat exchange with the coolant 19 .
  • the refrigerant 19 is gas such as air
  • the refrigerant 19 is cooling water, LLC (Long Life Coolant), or the like.
  • a sintered metal 14 is interposed between the power semiconductor element 3 and the insulating substrate 2 , and the power semiconductor element 3 and the insulating substrate 2 are sintered metal bonded by the sintered metal 14 .
  • a sintered metal 15 is interposed between the power semiconductor element 3 and the wiring metal component 4 , and the power semiconductor element 3 and the wiring metal component 4 are sintered metal bonded by the sintered metal 15 .
  • a sintered metal 16 is interposed in the joint between the wiring metal component 4 and the insulating substrate 5 , and the wiring metal component 4 and the insulating substrate 5 are sintered metal bonded by the sintered metal 16 .
  • sintered silver, sintered copper, or the like is used for the sintered metals 14, 15, and 16.
  • the melting point of sintered metals such as sintered silver and sintered copper is as high as 900° C. or higher.
  • the sintering temperature of the sintered metal joints forming the sintered metals 14, 15, 16 is about 200° C. to 350° C., and once the sintered metal joints are joined, the melting point is much higher than the sintering temperature.
  • the heat sink 6 is bonded to the surface of the insulating substrate 2 opposite to the surface to which the power semiconductor element 3 is bonded. is interposed therebetween, and the insulating substrate 2 and the heat sink 6 are metal-bonded by solder or sintered metal 17 .
  • solder instead of the so-called indirect cooling that thermally connects via heat-dissipating grease or heat-dissipating sheet, the so-called direct-cooling structure that thermally connects with metal bonding material reduces the thermal resistance of the connection part. can.
  • the melting point of solder is about 200.degree. C. to 350.degree.
  • a sintering temperature of about 200° C. to 350° C. can also be applied for sintering metal bonding forming the sintered metal 17 .
  • the step of joining with solder or the sintered metal 17 is performed at a temperature much lower than the melting point of the sintered metals 14, 15, 16 formed in the previous step, so that the sintered metals 14, 15 , 16 does not cause problems such as remelting and deterioration of quality.
  • the heat sink 7 is bonded to the surface of the insulating substrate 5 opposite to the surface to which the metal wiring component 4 is bonded.
  • a metal 18 is interposed, and the insulating substrate 5 and the heat sink 7 are metal-bonded by solder or sintered metal 18 .
  • the power semiconductor element 3 is bonded onto the insulating substrate 2 by sintered metal bonding.
  • a sintered metal 14 as a bonding layer is formed between the insulating substrate 2 and the power semiconductor element 3 .
  • the wiring metal component 4 is joined onto the power semiconductor element 3 by sintered metal joining.
  • a sintered metal 15 as a bonding layer is formed between the power semiconductor element 3 and the wiring metal component 4 .
  • the insulating substrate 5 is bonded onto the wiring metal component 4 by sintered metal bonding.
  • a sintered metal 16 as a bonding layer is formed between the wiring metal component 4 and the insulating substrate 5 .
  • the order of joining is not limited to the above order. Also, by using an alignment jig for fixing the position of each part, it is possible to form two or all of the joints of the sintered metal 14, the sintered metal 15, and the sintered metal 16 together. .
  • the insulating substrate 2, the power semiconductor element 3, the wiring metal component 4, and the insulating substrate 5 are sealed with a sealing resin (not shown).
  • a sealing resin (not shown).
  • the illustration of the sealing resin is omitted in order to make the structure easy to understand.
  • the insulating substrate 2 and the heat sink 6, and the insulating substrate 5 and the heat sink 7 are joined by soldering or sintered metal joining.
  • the power semiconductor unit 1 of the present embodiment is configured as described above. Since the sintered metals 14, 15, 16 each having a melting point of 900° C. or higher are used for bonding with the substrate 5, the insulating substrate 2 and the heat sink 6, and the insulating substrate 5 and the heat sink 7 are bonded to each other at a melting point or sintering temperature. There is no need to consider remelting of the sintered metals 14, 15, 16 inside the power semiconductor module and deterioration of their quality when joining with solder or sintered metals 17, 18 at about 200.degree. C. to 350.degree.
  • the degree of freedom in mounting the heat sinks 6 and 7 on the power semiconductor module is improved, and the reliability of bonding inside the power semiconductor module and the reliability of bonding between the power semiconductor module and the heat sink can be ensured.
  • the thermal resistance of the connecting portions between the heat sinks 6 and 7 and the power semiconductor module can be reduced, the cooling efficiency of the power semiconductor unit as a whole can also be improved.
  • FIG. 2A is a diagram showing the configuration of the power semiconductor unit 1 of this embodiment.
  • FIG. 2B is a diagram showing a method of incorporating the power semiconductor unit 1 of FIG. 2A into the cooling jacket 21.
  • FIG. 3 is a diagram showing a modification of FIGS. 2A and 2B.
  • FIG. 4 is a diagram showing a mounting example of the power semiconductor unit 1 of this embodiment.
  • the power semiconductor unit 1 has the heat sinks 6 and 7 respectively joined to both surfaces of the power semiconductor module 20 by metal joint such as solder joint or sintered metal joint, as shown in FIG. 2A. It consists of
  • the power semiconductor unit 1 configured as shown in FIG. 2A is incorporated in, for example, a cooling jacket 21 having a plurality of openings 23 as shown in FIG. Cooled.
  • the power semiconductor unit 1 When the power semiconductor unit 1 is incorporated into the cooling jacket 21, the power semiconductor unit 1 is joined inside the opening 23 of the cooling jacket 21 by solder joint or sintered metal joint.
  • the power semiconductor module 20 with the heat sinks 6 and 7 not joined is directly joined to the cooling jacket 24 with built-in cooling fins by solder joint or sintered metal joint. It is also possible to construct a power semiconductor unit. In this case, the cooling jacket 24 becomes a liquid-cooled heat sink. In order to improve the cooling efficiency, pin fins (not shown) or the like are installed in the flow path of the cooling jacket 24 .
  • the power semiconductor unit 1 configured as shown in FIG. 2A has improved cooling efficiency and mounting freedom, it is required to be mounted together with the capacitor 25 and the like as shown in FIG. It can be used as a power semiconductor unit for electric vehicles (EVs).
  • EVs electric vehicles
  • FIG. 5A is a diagram showing the configuration of the power semiconductor unit of this embodiment.
  • FIG. 5B is a diagram showing a cross section along A-A' in FIG. 5A.
  • the heat sink is composed of two aluminum fixing bars 26 and a cooling jacket 24 arranged between the two aluminum fixing bars 26.
  • the cooling jacket 24 also functions as a liquid-cooled heat sink.
  • the aluminum fixing bar 26 also functions as an air-cooled heat sink.
  • a first power semiconductor module group in which a plurality of power semiconductor modules 20 are arranged in parallel is provided between the lower aluminum fixing bar 26 and the cooling jacket 24 .
  • a second power semiconductor module group in which a plurality of power semiconductor modules 20 are arranged in parallel is provided between the upper aluminum fixing bar 26 and the cooling jacket 24 .
  • the power semiconductor module 20 uses two pairs of mirror-symmetrical terminal arrangements.
  • Each of the power semiconductor module 20 in the upper layer and the power semiconductor module 20 in the lower layer has a main terminal through which a main current flows and a control terminal including at least a gate terminal. are bent and extended in the opposite direction to the control terminals of the power semiconductor module 20 in the lower layer.
  • the heat sink has at least one liquid-cooled heat sink (cooling jacket 24), and the power semiconductor module 20 in the upper layer has one of two main surfaces. is thermally connected to the cooling jacket 24 , and the lower power semiconductor module 20 is thermally connected to the cooling jacket 24 only on one of the two main surfaces. As a result, the number of liquid-cooled heat sinks can be reduced.
  • One main surface of the upper power semiconductor module 20 is bonded to the cooling jacket 24 via a metal bonding material such as solder bonding or sintered metal bonding, and one main surface of the lower power semiconductor module 20 is It is joined to the cooling jacket 24 via a metal joining material such as solder joint or sintered metal joint.
  • a metal bonding material such as solder bonding or sintered metal bonding
  • solder joint or sintered metal joint instead of the so-called indirect cooling that thermally connects via heat-dissipating grease or heat-dissipating sheet, the so-called direct-cooling structure that thermally connects with metal bonding material reduces the thermal resistance of the connection part. can.
  • connection part is higher than that of the metal bonding material, it is also possible to use heat dissipating grease or heat dissipating sheet instead of metal bonding material such as solder bonding or sintered metal bonding.
  • FIG. 6A is a diagram showing the configuration of the power semiconductor unit of this embodiment.
  • FIG. 6B is a diagram showing a B-B' section of FIG. 6A.
  • heat sinks are composed of two cooling jackets 24 arranged vertically.
  • a plurality of power semiconductor modules 20 are stacked in two stages between two cooling jackets 24, and the power semiconductor modules 20 in the upper layer and the power semiconductor modules 20 in the lower layer are soldered or sintered metal bonded to each other. are spliced.
  • the lower cooling jacket 24 is bonded to the surface of the insulating substrate 2 of the lower power semiconductor module 20 opposite to the surface to which the power semiconductor elements 3 are bonded.
  • the insulating substrate 5 of the power semiconductor module 20 is bonded to the surface opposite to the surface to which the metal wiring component 4 is bonded.
  • Soldering or sintering is used to join the insulating substrate 2 of the lower power semiconductor module 20 and the lower cooling jacket 24 and to join the insulating substrate 5 of the upper power semiconductor module 20 and the upper cooling jacket 24 .
  • a metal joint is used.
  • a plurality of power semiconductor modules 20 are arranged in parallel and arranged in a vertically overlapping manner.
  • the heat sink has two cooling jackets 24 arranged vertically, and one main surface of the upper power semiconductor module 20 has an upper cooling jacket 24 .
  • Jacket 24 is thermally connected
  • lower cooling jacket 24 is thermally connected to one main surface of power semiconductor module 20 in the lower layer
  • the other main surface of power semiconductor module 20 is thermally connected.
  • connection part is higher than that of the metal bonding material, it is also possible to use heat dissipating grease or heat dissipating sheet instead of metal bonding material such as solder bonding or sintered metal bonding.
  • FIG. 7A is a diagram showing the configuration of the power semiconductor unit of this embodiment.
  • FIG. 7B is a view showing a C-C' section of FIG. 7A.
  • the heat sink is composed of three cooling jackets 24 arranged in three upper and lower layers.
  • a plurality of power semiconductor modules 20 are stacked in two stages between three cooling jackets 24, and the power semiconductor module 20 in the upper layer is between the cooling jacket 24 in the uppermost stage and the cooling jacket 24 in the middle stage. Joined by solder joints or sintered metal joints.
  • the lower power semiconductor module 20 is joined between the lowermost cooling jacket 24 and the middle cooling jacket 24 by solder joint or sintered metal joint.
  • connection part is higher than that of the metal bonding material, it is also possible to use heat dissipating grease or heat dissipating sheet instead of metal bonding material such as solder bonding or sintered metal bonding.
  • both sides of all the power semiconductor modules 20 are cooled by the liquid cooling type cooling jacket 24, so that the maximum This is advantageous when you want to give priority to output.
  • the present invention is not limited to the above-described embodiments, and includes various modifications.
  • the above-described embodiments have been described in detail in order to explain the present invention in an easy-to-understand manner, and are not necessarily limited to those having all the described configurations.
  • it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment and it is also possible to add the configuration of another embodiment to the configuration of one embodiment.
  • SYMBOLS 1 Power semiconductor unit 2, 5... Insulating substrate 3... Power semiconductor element 4... Wiring metal part 6, 7... Heat sink 8, 11... Ceramic substrate 9, 10, 12, 13... Copper plate, 14, 15, 16... Sintered metal 17, 18... Solder or sintered metal 19... Coolant 20... Power semiconductor module 21, 24... Cooling jacket 22... Water channel 23... Opening 25... Capacitor 26... aluminum fixing bar

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Abstract

Provided is a power semiconductor unit including a cooler, capable of achieving, simultaneously, both cooling efficiency and mounting flexibility of a power semiconductor module installed therein. The power semiconductor unit comprises a power semiconductor element, a first insulating substrate bonded to one surface of the power semiconductor element, a wiring metal component bonded to another surface of the power semiconductor element, a second insulating substrate bonded to a surface of the wiring metal component on the opposite side to the surface to which the power semiconductor element is bonded, and a heat sink for cooling heat from the power semiconductor element, characterized in that sintered metal bonding is employed for the bonding between the power semiconductor element and the first insulating substrate, the bonding between the power semiconductor element and the wiring metal component, and the bonding between the wiring metal component and the second insulating substrate.

Description

パワー半導体ユニット、パワー半導体ユニットの製造方法Power semiconductor unit, method for manufacturing power semiconductor unit
　本発明は、パワー半導体ユニットの構造とその製造方法に係り、特に、冷却器を備えたパワー半導体ユニットに適用して有効な技術に関する。 The present invention relates to the structure of a power semiconductor unit and its manufacturing method, and in particular to a technique effectively applied to a power semiconductor unit equipped with a cooler.
　近年、環境への意識の高まりと共に、ハイブリッド電気自動車（HV）や電気自動車（EV）など環境対応車の普及が進んでいる。次世代HVやEVのさらなる普及のため、より小型かつ低コストで高効率な電動システムの開発が進められており、その中でパワー半導体ユニットの小型化、低コスト化、高効率化は重要な課題の１つとなっている。 In recent years, along with the growing awareness of the environment, the spread of environmentally friendly vehicles such as hybrid electric vehicles (HV) and electric vehicles (EV) is progressing. Due to the further spread of next-generation HVs and EVs, the development of smaller, lower-cost, and more efficient electric power systems is underway. Among these, miniaturization, lower cost, and higher efficiency of power semiconductor units are important. This is one of the issues.
　車載用のパワー半導体ユニットに関する背景技術として、例えば、特許文献１のような技術がある。特許文献１には、パワー半導体素子の両面に取り付けられる絶縁基板と、放熱板等の冷却手段とがはんだ付けやろう付けといったろう接により接合されたパワー半導体モジュールの構成が開示されている。 　Patent Document 1, for example, is a background technology related to in-vehicle power semiconductor units. Patent Document 1 discloses a configuration of a power semiconductor module in which insulating substrates attached to both sides of a power semiconductor element and cooling means such as a heat sink are joined by brazing such as soldering or brazing.
　特許文献１の構成により、パワー半導体素子と冷却手段間の熱抵抗が大幅に低減され、高い冷却性能を得ることができる。 With the configuration of Patent Document 1, the thermal resistance between the power semiconductor element and the cooling means is greatly reduced, and high cooling performance can be obtained.
特開２００８－１２４４３０号公報JP 2008-124430 A
　上記特許文献１では、パワー半導体素子１，２を、はんだ付け等により絶縁基板９，１８に接合しており、さらにその絶縁基板９，１８を、放熱フィンが設けられた放熱板１３，２３にろう接（はんだ付けやろう付け）により接合している。 In Patent Document 1, the power semiconductor elements 1 and 2 are joined to the insulating substrates 9 and 18 by soldering or the like, and the insulating substrates 9 and 18 are connected to the heat sinks 13 and 23 provided with heat sink fins. They are joined by brazing (soldering or brazing).
　そのため、絶縁基板９，１８に放熱板１３，２３を接合する際のろう接プロセスでの熱により、パワー半導体素子１，２と絶縁基板９，１８との接合部のはんだが再溶融してしまい、パワー半導体素子１，２と絶縁基板９，１８との接合部の信頼性及び伝熱性（冷却効率）の低下が懸念される。 As a result, the solder at the joints between the power semiconductor elements 1 and 2 and the insulating substrates 9 and 18 melts again due to the heat in the brazing process when the heat sinks 13 and 23 are joined to the insulating substrates 9 and 18. , there is a concern that the reliability and thermal conductivity (cooling efficiency) of the joints between the power semiconductor elements 1 and 2 and the insulating substrates 9 and 18 will be lowered.
　特許文献１では、パワー半導体素子１，２を絶縁基板９，１８に接合するはんだ等の接合材には、例えば銅粒子と錫粒子とを混合した高温接合材料を用いることが開示されており、絶縁基板９，１８に放熱板１３，２３を接合するはんだ等の接合材には、パワー半導体素子１，２を絶縁基板９，１８に接合するはんだ等の接合材よりも融点が低い接合材、例えばＳｎ－３Ａｇ－０．５Ｃｕ鉛フリーはんだなどを使用することが開示されている。 Patent Document 1 discloses that a high-temperature bonding material in which copper particles and tin particles are mixed, for example, is used as a bonding material such as solder for bonding the power semiconductor elements 1 and 2 to the insulating substrates 9 and 18. The bonding material such as solder for bonding the heat sinks 13 and 23 to the insulating substrates 9 and 18 has a lower melting point than the bonding material such as solder for bonding the power semiconductor elements 1 and 2 to the insulating substrates 9 and 18. For example, the use of Sn-3Ag-0.5Cu lead-free solder is disclosed.
　しかしながら、特許文献１で例示されている高温接合材料であるＣｕＳｎはんだも、Ｓｎ－３Ａｇ－０．５Ｃｕ鉛フリーはんだも、どちらもはんだであり、高温接合材料であるＣｕＳｎはんだであってもＳｎを含んでいるため融点は高くても３５０℃程度であるため、融点を大きく変えるには限界があり、Ｓｎ－３Ａｇ－０．５Ｃｕ鉛フリーはんだをする際の熱でＣｕＳｎはんだの品質が劣化する可能性がある。 However, both CuSn solder, which is a high-temperature bonding material, and Sn-3Ag-0.5Cu lead-free solder exemplified in Patent Document 1 are solders, and even CuSn solder, which is a high-temperature bonding material, contains Sn. Since the melting point is about 350°C at the highest, there is a limit to changing the melting point greatly, and the heat generated when Sn-3Ag-0.5Cu lead-free soldering may deteriorate the quality of CuSn solder. have a nature.
　また、特許文献１のパワー半導体モジュールを用いて車載用の電動システムを構成しようとした場合、パワー半導体素子１，２と絶縁基板９，１８との接合部のはんだの再溶融を考慮した実装構造の設計が必要であり、パワー半導体モジュールを実装する上で一定の制約が生じてしまう。 Further, when an electric system for vehicle is to be constructed using the power semiconductor module of Patent Document 1, a mounting structure considering remelting of the solder at the joints between the power semiconductor elements 1 and 2 and the insulating substrates 9 and 18 is required. design is required, and there are certain restrictions in mounting the power semiconductor module.
　そこで、本発明の目的は、冷却器を備えたパワー半導体ユニットにおいて、搭載されるパワー半導体モジュールの冷却効率と実装自由度の両立が可能なパワー半導体ユニット及びその製造方法を提供することにある。 Therefore, an object of the present invention is to provide a power semiconductor unit having a cooler, which is capable of achieving both cooling efficiency and mounting flexibility of the mounted power semiconductor module, and a method of manufacturing the same.
　上記課題を解決するために、本発明は、パワー半導体素子と、前記パワー半導体素子の一方の面に接合される第１の絶縁基板と、前記パワー半導体素子の他方の面に接合される配線金属部品と、前記配線金属部品の前記パワー半導体素子が接合される面の反対側の面に接合される第２の絶縁基板と、前記パワー半導体素子からの熱を冷却するヒートシンクと、を備え、前記パワー半導体素子と前記第１の絶縁基板との接合、前記パワー半導体素子と前記配線金属部品との接合、前記配線金属部品と前記第２の絶縁基板との接合は、焼結金属接合であることを特徴とする。 In order to solve the above problems, the present invention provides a power semiconductor element, a first insulating substrate bonded to one surface of the power semiconductor element, and a wiring metal bonded to the other surface of the power semiconductor element. a component, a second insulating substrate bonded to the surface of the wiring metal component opposite to the surface to which the power semiconductor element is bonded, and a heat sink for cooling heat from the power semiconductor element, The bonding between the power semiconductor element and the first insulating substrate, the bonding between the power semiconductor element and the wiring metal component, and the bonding between the wiring metal component and the second insulating substrate are sintered metal bonding. characterized by
　また、本発明は、（ａ）焼結金属接合により、第１の絶縁基板上にパワー半導体素子を接合する工程、（ｂ）焼結金属接合により、前記パワー半導体素子上に配線金属部品を接合する工程、（ｃ）焼結金属接合により、前記配線金属部品上に第２の絶縁基板を接合する工程、（ｄ）前記第１の絶縁基板と前記パワー半導体素子と前記配線金属部品と前記第２の絶縁基板とを、封止樹脂で封止する工程、（ｅ）前記（ｄ）工程の後、はんだ接合または焼結金属接合により、前記第１の絶縁基板をヒートシンクに接合する工程、を含むパワー半導体ユニットの製造方法である。 Further, the present invention includes: (a) a step of bonding a power semiconductor element onto a first insulating substrate by sintered metal bonding; and (b) bonding a wiring metal component onto the power semiconductor element by sintered metal bonding. (c) bonding a second insulating substrate onto the wiring metal component by sintered metal bonding; (d) the first insulating substrate, the power semiconductor element, the wiring metal component and the second (e) after step (d), bonding the first insulating substrate to the heat sink by solder bonding or sintered metal bonding; A method of manufacturing a power semiconductor unit including:
　また、本発明は、第１のパワー半導体モジュールと、前記第１のパワー半導体モジュールに重畳する第２のパワー半導体モジュールと、前記第１のパワー半導体モジュールおよび前記第２のパワー半導体モジュールを冷却するヒートシンクと、を備え、前記ヒートシンクは、少なくとも１つの液冷型ヒートシンクを有し、前記第１のパワー半導体モジュールは、２つの主面のうち一方の主面のみが前記液冷型ヒートシンクに熱的に接続され、前記第２のパワー半導体モジュールは、２つの主面のうち一方の主面のみが前記液冷型ヒートシンクに熱的に接続されることを特徴とする。 Further, the present invention cools a first power semiconductor module, a second power semiconductor module superimposed on the first power semiconductor module, and the first power semiconductor module and the second power semiconductor module. a heat sink, wherein the heat sink has at least one liquid-cooled heat sink, and the first power semiconductor module has two main surfaces only one of which is thermally coupled to the liquid-cooled heat sink. The second power semiconductor module is characterized in that only one of two main surfaces of the second power semiconductor module is thermally connected to the liquid-cooled heat sink.
　本発明によれば、冷却器を備えたパワー半導体ユニットにおいて、搭載されるパワー半導体モジュールの冷却効率と実装自由度の両立が可能なパワー半導体ユニット及びその製造方法を実現することができる。 According to the present invention, in a power semiconductor unit equipped with a cooler, it is possible to realize a power semiconductor unit capable of achieving both cooling efficiency and mounting flexibility of the mounted power semiconductor module, and a method of manufacturing the same.
　上記した以外の課題、構成及び効果は、以下の実施形態の説明により明らかにされる。 Problems, configurations, and effects other than those described above will be clarified by the following description of the embodiments.
本発明の実施例１に係るパワー半導体ユニットの断面構造を示す図である。It is a figure which shows the cross-section of the power semiconductor unit which concerns on Example 1 of this invention. 本発明の実施例２に係るパワー半導体ユニットの構成を示す図である。It is a figure which shows the structure of the power semiconductor unit which concerns on Example 2 of this invention. 図２Ａのパワー半導体ユニットの冷却ジャケットへの組み込み方法を示す図である。FIG. 2B is a diagram showing a method of incorporating the power semiconductor unit of FIG. 2A into a cooling jacket; 図２Ａ及び図２Ｂの変形例を示す図である。It is a figure which shows the modification of FIG. 2A and FIG. 2B. 本発明の実施例２に係るパワー半導体ユニットの実装例を示す図である。It is a figure which shows the mounting example of the power semiconductor unit which concerns on Example 2 of this invention. 本発明の実施例３に係るパワー半導体ユニットの構成を示す図である。It is a figure which shows the structure of the power semiconductor unit which concerns on Example 3 of this invention. 図５ＡのＡ－Ａ’断面を示す図である。FIG. 5B is a diagram showing a cross section taken along line A-A' of FIG. 5A; 本発明の実施例４に係るパワー半導体ユニットの構成を示す図である。It is a figure which shows the structure of the power semiconductor unit which concerns on Example 4 of this invention. 図６ＡのＢ－Ｂ’断面を示す図である。FIG. 6B is a diagram showing a B-B′ cross section of FIG. 6A. 本発明の実施例５に係るパワー半導体ユニットの構成を示す図である。It is a figure which shows the structure of the power semiconductor unit which concerns on Example 5 of this invention. 図７ＡのＣ－Ｃ’断面を示す図である。FIG. 7B is a diagram showing a C-C′ cross section of FIG. 7A.
　以下、図面を用いて本発明の実施例を説明する。なお、各図面において同一の構成については同一の符号を付し、重複する部分についてはその詳細な説明は省略する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, in each drawing, the same configurations are denoted by the same reference numerals, and detailed descriptions of overlapping portions are omitted.
　図１を参照して、本発明の実施例１のパワー半導体ユニットについて説明する。図１は、本実施例のパワー半導体ユニット１の断面構造を示す図である。 A power semiconductor unit according to Example 1 of the present invention will be described with reference to FIG. FIG. 1 is a diagram showing a cross-sectional structure of a power semiconductor unit 1 of this embodiment.
　なお、本明細書において、パワーMOSFET（Metal-Oxide-Semiconductor Field-Effect Transistor）や絶縁ゲート型バイポーラトランジスタ（IGBT：Insulated Gate Bipolar Transistor）、ダイオード等の電力用半導体素子が形成された半導体チップを「パワー半導体素子」と呼び、絶縁基板上に実装されたパワー半導体素子を樹脂封止したものを「パワー半導体モジュール」と呼び、ヒートシンク等の冷却器を備えたパワー半導体モジュールを「パワー半導体ユニット」と呼ぶ。 In this specification, semiconductor chips on which power semiconductor elements such as power MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), insulated gate bipolar transistors (IGBTs), and diodes are formed are referred to as " A power semiconductor element mounted on an insulating substrate and sealed with resin is called a "power semiconductor module", and a power semiconductor module equipped with a cooler such as a heat sink is called a "power semiconductor unit". call.
　本実施例のパワー半導体ユニット１は、図１に示すように、主要な構成として、IGBT等の電力用半導体素子が形成された半導体チップであるパワー半導体素子３と、パワー半導体素子３の下面に接合された絶縁基板２と、パワー半導体素子３の上面に接合されたスペーサまたはリードフレーム等の配線金属部品４と、配線金属部品４のパワー半導体素子３が接合される面の反対側の面に接合された絶縁基板５と、パワー半導体素子３からの熱を冷却するヒートシンク６，７とを備えている。 As shown in FIG. 1, the power semiconductor unit 1 of this embodiment includes, as main components, a power semiconductor element 3 which is a semiconductor chip on which a power semiconductor element such as an IGBT is formed, and a The bonded insulating substrate 2, the wiring metal component 4 such as a spacer or lead frame bonded to the upper surface of the power semiconductor element 3, and the surface of the wiring metal component 4 opposite to the surface to which the power semiconductor element 3 is bonded. It has a bonded insulating substrate 5 and heat sinks 6 and 7 for cooling the heat from the power semiconductor element 3 .
　絶縁基板２には、例えば、セラミック基板８の両面に銅板９，１０が接合されたDBC基板（Direct Bonded Copper）が用いられる。絶縁基板５も同様に、セラミック基板１１の両面に銅板１２，１３が接合されたDBC基板等が用いられる。 For the insulating substrate 2, for example, a DBC substrate (Direct Bonded Copper) in which copper plates 9 and 10 are bonded to both sides of a ceramic substrate 8 is used. Similarly, the insulating substrate 5 is a DBC substrate or the like in which copper plates 12 and 13 are bonded to both sides of a ceramic substrate 11 .
　ヒートシンク６，７には、冷却フィンが設けられており、冷媒１９による熱交換によりパワー半導体素子３からの熱を冷却する。空冷型のヒートシンクの場合は、冷媒１９は空気などの気体であり、液冷型のヒートシンクの場合は、冷媒１９は冷却水やLLC（Long Life Coolant）等である。 The heat sinks 6 and 7 are provided with cooling fins and cool the heat from the power semiconductor elements 3 by heat exchange with the coolant 19 . In the case of an air-cooled heat sink, the refrigerant 19 is gas such as air, and in the case of a liquid-cooled heat sink, the refrigerant 19 is cooling water, LLC (Long Life Coolant), or the like.
　パワー半導体素子３と絶縁基板２との接合部には、焼結金属１４が介在しており、パワー半導体素子３と絶縁基板２は、焼結金属１４によって焼結金属接合されている。 A sintered metal 14 is interposed between the power semiconductor element 3 and the insulating substrate 2 , and the power semiconductor element 3 and the insulating substrate 2 are sintered metal bonded by the sintered metal 14 .
　また、パワー半導体素子３と配線金属部品４との接合部には、焼結金属１５が介在しており、パワー半導体素子３と配線金属部品４は、焼結金属１５によって焼結金属接合されている。 A sintered metal 15 is interposed between the power semiconductor element 3 and the wiring metal component 4 , and the power semiconductor element 3 and the wiring metal component 4 are sintered metal bonded by the sintered metal 15 . there is
　また、配線金属部品４と絶縁基板５との接合部には、焼結金属１６が介在しており、配線金属部品４と絶縁基板５は、焼結金属１６によって焼結金属接合されている。 In addition, a sintered metal 16 is interposed in the joint between the wiring metal component 4 and the insulating substrate 5 , and the wiring metal component 4 and the insulating substrate 5 are sintered metal bonded by the sintered metal 16 .
　なお、焼結金属１４，１５，１６には、焼結銀や焼結銅等が用いられる。焼結銀や焼結銅等の焼結金属の融点は、９００℃以上と高い。焼結金属１４，１５，１６を形成する焼結金属接合の焼結温度は、２００℃～３５０℃程度であり、焼結金属接合はひとたび接合すると融点は焼結温度よりはるかに高くなるという特徴がある。 It should be noted that sintered silver, sintered copper, or the like is used for the sintered metals 14, 15, and 16. The melting point of sintered metals such as sintered silver and sintered copper is as high as 900° C. or higher. The sintering temperature of the sintered metal joints forming the sintered metals 14, 15, 16 is about 200° C. to 350° C., and once the sintered metal joints are joined, the melting point is much higher than the sintering temperature. There is
　ヒートシンク６は、絶縁基板２のパワー半導体素子３が接合される面の反対側の面に接合されており、絶縁基板２とヒートシンク６との接合部には、半田（はんだ）または焼結金属１７が介在しており、絶縁基板２とヒートシンク６は、半田または焼結金属１７によって金属接合されている。このように、放熱グリースまたは放熱シートを介して熱的に接続するいわゆる間接冷却ではなく、金属接合材により熱的に接続するいわゆる直接冷却の構造となっているため、接続部の熱抵抗を低くできる。また、半田（はんだ）の融点は、２００℃～３５０℃程度である。焼結金属１７を形成する焼結金属接合の焼結温度も同様に２００℃～３５０℃程度のものが適用できる。したがって、半田または焼結金属１７によって接合する工程は、それより前の工程で形成された焼結金属１４，１５，１６の融点よりもはるかに低い温度で行われるので、焼結金属１４，１５，１６の再溶融や品質の劣化などの問題を生じさせない。 The heat sink 6 is bonded to the surface of the insulating substrate 2 opposite to the surface to which the power semiconductor element 3 is bonded. is interposed therebetween, and the insulating substrate 2 and the heat sink 6 are metal-bonded by solder or sintered metal 17 . In this way, instead of the so-called indirect cooling that thermally connects via heat-dissipating grease or heat-dissipating sheet, the so-called direct-cooling structure that thermally connects with metal bonding material reduces the thermal resistance of the connection part. can. Further, the melting point of solder is about 200.degree. C. to 350.degree. A sintering temperature of about 200° C. to 350° C. can also be applied for sintering metal bonding forming the sintered metal 17 . Therefore, the step of joining with solder or the sintered metal 17 is performed at a temperature much lower than the melting point of the sintered metals 14, 15, 16 formed in the previous step, so that the sintered metals 14, 15 , 16 does not cause problems such as remelting and deterioration of quality.
　また、ヒートシンク７は、絶縁基板５の配線金属部品４が接合される面の反対側の面に接合されており、絶縁基板５とヒートシンク７との接合部には、半田（はんだ）または焼結金属１８が介在しており、絶縁基板５とヒートシンク７は、半田または焼結金属１８によって金属接合されている。 The heat sink 7 is bonded to the surface of the insulating substrate 5 opposite to the surface to which the metal wiring component 4 is bonded. A metal 18 is interposed, and the insulating substrate 5 and the heat sink 7 are metal-bonded by solder or sintered metal 18 .
　図１を用いて、パワー半導体ユニット１の製造方法の主要な工程のみを説明する。 Only the main steps of the method for manufacturing the power semiconductor unit 1 will be described using FIG.
　先ず、焼結金属接合により、絶縁基板２上にパワー半導体素子３を接合する。この際、絶縁基板２とパワー半導体素子３との間には、接合層である焼結金属１４が形成される。 First, the power semiconductor element 3 is bonded onto the insulating substrate 2 by sintered metal bonding. At this time, a sintered metal 14 as a bonding layer is formed between the insulating substrate 2 and the power semiconductor element 3 .
　次に、焼結金属接合により、パワー半導体素子３上に配線金属部品４を接合する。この際、パワー半導体素子３と配線金属部品４との間には、接合層である焼結金属１５が形成される。 Next, the wiring metal component 4 is joined onto the power semiconductor element 3 by sintered metal joining. At this time, a sintered metal 15 as a bonding layer is formed between the power semiconductor element 3 and the wiring metal component 4 .
　続いて、焼結金属接合により、配線金属部品４上に絶縁基板５を接合する。この際、配線金属部品４と絶縁基板５との間には、接合層である焼結金属１６が形成される。 Subsequently, the insulating substrate 5 is bonded onto the wiring metal component 4 by sintered metal bonding. At this time, a sintered metal 16 as a bonding layer is formed between the wiring metal component 4 and the insulating substrate 5 .
　なお、接合する順番は上記の順に限定されるものではない。また、各部品位置を固定する位置合わせ治具を用いることで、焼結金属１４、焼結金属１５、焼結金属１６の接合の内２つもしくは全工程をまとめて形成することも可能である。 The order of joining is not limited to the above order. Also, by using an alignment jig for fixing the position of each part, it is possible to form two or all of the joints of the sintered metal 14, the sintered metal 15, and the sintered metal 16 together. .
　次に、絶縁基板２とパワー半導体素子３と配線金属部品４と絶縁基板５とを、図示しない封止樹脂で封止する。図１では、構造を分かり易くするために、封止樹脂の図示を省略しているが、例えば、トランスファーモールド等による高耐熱樹脂封止を行い、パワー半導体モジュールを形成する。 Next, the insulating substrate 2, the power semiconductor element 3, the wiring metal component 4, and the insulating substrate 5 are sealed with a sealing resin (not shown). In FIG. 1, the illustration of the sealing resin is omitted in order to make the structure easy to understand.
　樹脂封止を行った後、はんだ接合または焼結金属接合により、絶縁基板２とヒートシンク６、絶縁基板５とヒートシンク７をそれぞれ接合する。 After resin sealing, the insulating substrate 2 and the heat sink 6, and the insulating substrate 5 and the heat sink 7 are joined by soldering or sintered metal joining.
　本実施例のパワー半導体ユニット１は、以上のように構成されており、パワー半導体素子３と絶縁基板２との接合、パワー半導体素子３と配線金属部品４との接合、配線金属部品４と絶縁基板５との接合に、それぞれ融点が９００℃以上の焼結金属１４，１５，１６が用いられているため、絶縁基板２とヒートシンク６、絶縁基板５とヒートシンク７を、融点または焼結温度が２００℃～３５０℃程度の半田または焼結金属１７，１８によりそれぞれ接合する際に、パワー半導体モジュール内部の焼結金属１４，１５，１６の再溶融や品質の劣化を考慮する必要がなくなる。 The power semiconductor unit 1 of the present embodiment is configured as described above. Since the sintered metals 14, 15, 16 each having a melting point of 900° C. or higher are used for bonding with the substrate 5, the insulating substrate 2 and the heat sink 6, and the insulating substrate 5 and the heat sink 7 are bonded to each other at a melting point or sintering temperature. There is no need to consider remelting of the sintered metals 14, 15, 16 inside the power semiconductor module and deterioration of their quality when joining with solder or sintered metals 17, 18 at about 200.degree. C. to 350.degree.
　これにより、パワー半導体モジュールへのヒートシンク６，７の取り付け自由度が向上すると共に、パワー半導体モジュール内部の接合信頼性及びパワー半導体モジュールとヒートシンクとの接合信頼性を担保することができる。また、ヒートシンク６，７とパワー半導体モジュールの接続部の熱抵抗を低くできるため、パワー半導体ユニット全体としての冷却効率も向上することができる。 As a result, the degree of freedom in mounting the heat sinks 6 and 7 on the power semiconductor module is improved, and the reliability of bonding inside the power semiconductor module and the reliability of bonding between the power semiconductor module and the heat sink can be ensured. In addition, since the thermal resistance of the connecting portions between the heat sinks 6 and 7 and the power semiconductor module can be reduced, the cooling efficiency of the power semiconductor unit as a whole can also be improved.
　図２Ａから図４を参照して、本発明の実施例２のパワー半導体ユニットについて説明する。図２Ａは、本実施例のパワー半導体ユニット１の構成を示す図である。図２Ｂは、図２Ａのパワー半導体ユニット１の冷却ジャケット２１への組み込み方法を示す図である。
図３は、図２Ａ及び図２Ｂの変形例を示す図である。図４は、本実施例のパワー半導体ユニット１の実装例を示す図である。 A power semiconductor unit according to a second embodiment of the present invention will be described with reference to FIGS. 2A to 4. FIG. FIG. 2A is a diagram showing the configuration of the power semiconductor unit 1 of this embodiment. FIG. 2B is a diagram showing a method of incorporating the power semiconductor unit 1 of FIG. 2A into the cooling jacket 21. As shown in FIG.
FIG. 3 is a diagram showing a modification of FIGS. 2A and 2B. FIG. 4 is a diagram showing a mounting example of the power semiconductor unit 1 of this embodiment.
　実施例１で説明したように、パワー半導体ユニット１は、図２Ａに示すように、パワー半導体モジュール２０の両面に、半田接合や焼結金属接合等の金属接合によってヒートシンク６，７をそれぞれ接合することで構成される。 As described in Embodiment 1, the power semiconductor unit 1 has the heat sinks 6 and 7 respectively joined to both surfaces of the power semiconductor module 20 by metal joint such as solder joint or sintered metal joint, as shown in FIG. 2A. It consists of
　図２Ａのように構成したパワー半導体ユニット１は、例えば、図２Ｂに示すような複数の開口部２３を有する冷却ジャケット２１に組み込まれ、水路２２を流れる水やLLC等の冷媒によって熱交換されて冷却される。 The power semiconductor unit 1 configured as shown in FIG. 2A is incorporated in, for example, a cooling jacket 21 having a plurality of openings 23 as shown in FIG. Cooled.
　なお、パワー半導体ユニット１を冷却ジャケット２１へ組み込む際には、はんだ接合または焼結金属接合により、パワー半導体ユニット１を冷却ジャケット２１の開口部２３内に接合する。 When the power semiconductor unit 1 is incorporated into the cooling jacket 21, the power semiconductor unit 1 is joined inside the opening 23 of the cooling jacket 21 by solder joint or sintered metal joint.
　また、図３に示す変形例のように、ヒートシンク６，７を接合していない状態のパワー半導体モジュール２０を直接、冷却フィン内蔵の冷却ジャケット２４にはんだ接合または焼結金属接合により接合して、パワー半導体ユニットを構成することも可能である。この場合、冷却ジャケット２４が液冷型のヒートシンクとなる。冷却ジャケット２４の流路内には、冷却効率を向上するため、図示しないピンフィン等が設置されている。 Also, as in the modification shown in FIG. 3, the power semiconductor module 20 with the heat sinks 6 and 7 not joined is directly joined to the cooling jacket 24 with built-in cooling fins by solder joint or sintered metal joint. It is also possible to construct a power semiconductor unit. In this case, the cooling jacket 24 becomes a liquid-cooled heat sink. In order to improve the cooling efficiency, pin fins (not shown) or the like are installed in the flow path of the cooling jacket 24 .
　また、図２Ａのように構成したパワー半導体ユニット１は、冷却効率と実装自由度が向上しているため、例えば、図４に示すようにキャパシタ２５等と共に実装して、高い信頼性が要求される電気自動車（EV）用のパワー半導体ユニットとして用いることが可能である。 Further, since the power semiconductor unit 1 configured as shown in FIG. 2A has improved cooling efficiency and mounting freedom, it is required to be mounted together with the capacitor 25 and the like as shown in FIG. It can be used as a power semiconductor unit for electric vehicles (EVs).
　なお、図４中のパワー半導体ユニットの構成例については、実施例４（図６Ａ及び図６Ｂ）で後述する。 A configuration example of the power semiconductor unit in FIG. 4 will be described later in Example 4 (FIGS. 6A and 6B).
　図５Ａ及び図５Ｂを参照して、本発明の実施例３のパワー半導体ユニットについて説明する。図５Ａは、本実施例のパワー半導体ユニットの構成を示す図である。図５Ｂは、図５ＡのＡ－Ａ’断面を示す図である。 A power semiconductor unit according to Example 3 of the present invention will be described with reference to FIGS. 5A and 5B. FIG. 5A is a diagram showing the configuration of the power semiconductor unit of this embodiment. FIG. 5B is a diagram showing a cross section along A-A' in FIG. 5A.
　本実施例のパワー半導体ユニットは、図５Ａ及び図５Ｂに示すように、ヒートシンクが、２つのアルミ固定バー２６と、２つのアルミ固定バー２６の間に配置された冷却ジャケット２４で構成されている。冷却ジャケット２４は、液冷型のヒートシンクとしても機能する。アルミ固定バー２６は、空冷型のヒートシンクとしても機能する。 In the power semiconductor unit of this embodiment, as shown in FIGS. 5A and 5B, the heat sink is composed of two aluminum fixing bars 26 and a cooling jacket 24 arranged between the two aluminum fixing bars 26. . The cooling jacket 24 also functions as a liquid-cooled heat sink. The aluminum fixing bar 26 also functions as an air-cooled heat sink.
　下側のアルミ固定バー２６と冷却ジャケット２４との間には、パワー半導体モジュール２０が複数並列に配置された第１のパワー半導体モジュール群を有している。 A first power semiconductor module group in which a plurality of power semiconductor modules 20 are arranged in parallel is provided between the lower aluminum fixing bar 26 and the cooling jacket 24 .
　また、上側のアルミ固定バー２６と冷却ジャケット２４との間には、パワー半導体モジュール２０が複数並列に配置された第２のパワー半導体モジュール群を有している。 A second power semiconductor module group in which a plurality of power semiconductor modules 20 are arranged in parallel is provided between the upper aluminum fixing bar 26 and the cooling jacket 24 .
　そして、下側のアルミ固定バー２６とパワー半導体モジュール２０との接合、冷却ジャケット２４とパワー半導体モジュール２０との接合、上側のアルミ固定バー２６とパワー半導体モジュール２０との接合には、はんだ接合または焼結金属接合が用いられている。 For joining the lower aluminum fixing bar 26 and the power semiconductor module 20, joining the cooling jacket 24 and the power semiconductor module 20, and joining the upper aluminum fixing bar 26 and the power semiconductor module 20, soldering or Sintered metal joints are used.
　なお、パワー半導体モジュール２０には、鏡像対称な端子配置の２対を用いる。上層のパワー半導体モジュール２０と下層のパワー半導体モジュール２０のそれぞれは、主電流が流れる主端子と、少なくともゲート端子を含む制御用端子とを有しており、上層のパワー半導体モジュール２０の制御用端子は、下層のパワー半導体モジュール２０の制御用端子とは反対側に屈曲して伸びている。 Note that the power semiconductor module 20 uses two pairs of mirror-symmetrical terminal arrangements. Each of the power semiconductor module 20 in the upper layer and the power semiconductor module 20 in the lower layer has a main terminal through which a main current flows and a control terminal including at least a gate terminal. are bent and extended in the opposite direction to the control terminals of the power semiconductor module 20 in the lower layer.
　本実施例のパワー半導体ユニットでは、上述したように、ヒートシンクは、少なくとも１つの液冷型ヒートシンク（冷却ジャケット２４）を有しており、上層のパワー半導体モジュール２０は、２つの主面のうち一方の主面のみが冷却ジャケット２４に熱的に接続され、下層のパワー半導体モジュール２０は、２つの主面のうち一方の主面のみが冷却ジャケット２４に熱的に接続されている。これによって、液冷型のヒートシンクの数を少なくすることができる。 In the power semiconductor unit of this embodiment, as described above, the heat sink has at least one liquid-cooled heat sink (cooling jacket 24), and the power semiconductor module 20 in the upper layer has one of two main surfaces. is thermally connected to the cooling jacket 24 , and the lower power semiconductor module 20 is thermally connected to the cooling jacket 24 only on one of the two main surfaces. As a result, the number of liquid-cooled heat sinks can be reduced.
　また、上層のパワー半導体モジュール２０は、一方の主面がはんだ接合または焼結金属接合等の金属接合材を介して冷却ジャケット２４に接合され、下層のパワー半導体モジュール２０は、一方の主面がはんだ接合または焼結金属接合等の金属接合材を介して冷却ジャケット２４に接合されている。このように、放熱グリースまたは放熱シートを介して熱的に接続するいわゆる間接冷却ではなく、金属接合材により熱的に接続するいわゆる直接冷却の構造となっているため、接続部の熱抵抗を低くできる。 One main surface of the upper power semiconductor module 20 is bonded to the cooling jacket 24 via a metal bonding material such as solder bonding or sintered metal bonding, and one main surface of the lower power semiconductor module 20 is It is joined to the cooling jacket 24 via a metal joining material such as solder joint or sintered metal joint. In this way, instead of the so-called indirect cooling that thermally connects via heat-dissipating grease or heat-dissipating sheet, the so-called direct-cooling structure that thermally connects with metal bonding material reduces the thermal resistance of the connection part. can.
　なお、接続部の熱抵抗は金属接合材に比べて高くなるが、はんだ接合または焼結金属接合等の金属接合材に替えて、放熱グリースまたは放熱シートを用いることも可能である。 Although the thermal resistance of the connection part is higher than that of the metal bonding material, it is also possible to use heat dissipating grease or heat dissipating sheet instead of metal bonding material such as solder bonding or sintered metal bonding.
　パワー半導体ユニットを本実施例（図５Ａ及び図５Ｂ）のような構成とすることで、小型軽量性重視でコストパフォーマンスの良い構成とすることができる。 By configuring the power semiconductor unit as in this embodiment (FIGS. 5A and 5B), it is possible to achieve a configuration with good cost performance while emphasizing small size and light weight.
　図６Ａ及び図６Ｂを参照して、本発明の実施例４のパワー半導体ユニットについて説明する。図６Ａは、本実施例のパワー半導体ユニットの構成を示す図である。図６Ｂは、図６ＡのＢ－Ｂ’断面を示す図である。 A power semiconductor unit according to Example 4 of the present invention will be described with reference to FIGS. 6A and 6B. FIG. 6A is a diagram showing the configuration of the power semiconductor unit of this embodiment. FIG. 6B is a diagram showing a B-B' section of FIG. 6A.
　本実施例のパワー半導体ユニットは、図６Ａ及び図６Ｂに示すように、ヒートシンクが、上下に配置された２つの冷却ジャケット２４で構成されている。 In the power semiconductor unit of this embodiment, as shown in FIGS. 6A and 6B, heat sinks are composed of two cooling jackets 24 arranged vertically.
　そして、複数のパワー半導体モジュール２０が、２つの冷却ジャケット２４の間で、２段積層されており、上層のパワー半導体モジュール２０と下層のパワー半導体モジュール２０は、はんだ接合または焼結金属接合で互いに接合されている。 A plurality of power semiconductor modules 20 are stacked in two stages between two cooling jackets 24, and the power semiconductor modules 20 in the upper layer and the power semiconductor modules 20 in the lower layer are soldered or sintered metal bonded to each other. are spliced.
　また、下側の冷却ジャケット２４は、下層のパワー半導体モジュール２０の絶縁基板２のパワー半導体素子３が接合される面の反対側の面に接合されており、上側の冷却ジャケット２４は、上層のパワー半導体モジュール２０の絶縁基板５の配線金属部品４が接合される面の反対側の面に接合されている。 The lower cooling jacket 24 is bonded to the surface of the insulating substrate 2 of the lower power semiconductor module 20 opposite to the surface to which the power semiconductor elements 3 are bonded. The insulating substrate 5 of the power semiconductor module 20 is bonded to the surface opposite to the surface to which the metal wiring component 4 is bonded.
　そして、下層のパワー半導体モジュール２０の絶縁基板２と下側の冷却ジャケット２４との接合、上層のパワー半導体モジュール２０の絶縁基板５と上側の冷却ジャケット２４との接合には、はんだ接合または焼結金属接合が用いられている。 Soldering or sintering is used to join the insulating substrate 2 of the lower power semiconductor module 20 and the lower cooling jacket 24 and to join the insulating substrate 5 of the upper power semiconductor module 20 and the upper cooling jacket 24 . A metal joint is used.
　上側の冷却ジャケット２４と下側の冷却ジャケット２４との間には、パワー半導体モジュール２０が複数並列に配置されると共に、上下に重畳して配置されている。 Between the cooling jacket 24 on the upper side and the cooling jacket 24 on the lower side, a plurality of power semiconductor modules 20 are arranged in parallel and arranged in a vertically overlapping manner.
　本実施例のパワー半導体ユニットでは、上述したように、ヒートシンクは、上下に配置された２つの冷却ジャケット２４を有しており、上層のパワー半導体モジュール２０の一方の主面には、上側の冷却ジャケット２４が熱的に接続され、下層のパワー半導体モジュール２０の一方の主面には、下側の冷却ジャケット２４が熱的に接続され、上層のパワー半導体モジュール２０の他方の主面と下層のパワー半導体モジュール２０の他方の主面とが熱的に接続されている。 In the power semiconductor unit of this embodiment, as described above, the heat sink has two cooling jackets 24 arranged vertically, and one main surface of the upper power semiconductor module 20 has an upper cooling jacket 24 . Jacket 24 is thermally connected, lower cooling jacket 24 is thermally connected to one main surface of power semiconductor module 20 in the lower layer, and the other main surface of power semiconductor module 20 in the upper layer and the other main surface of power semiconductor module 20 in the lower layer The other main surface of power semiconductor module 20 is thermally connected.
　なお、接続部の熱抵抗は金属接合材に比べて高くなるが、はんだ接合または焼結金属接合等の金属接合材に替えて、放熱グリースまたは放熱シートを用いることも可能である。 Although the thermal resistance of the connection part is higher than that of the metal bonding material, it is also possible to use heat dissipating grease or heat dissipating sheet instead of metal bonding material such as solder bonding or sintered metal bonding.
　パワー半導体ユニットを本実施例（図６Ａ及び図６Ｂ）のような構成とすることで、小型軽量性重視でコストパフォーマンスの良い構成とすることができる。 By configuring the power semiconductor unit as in this embodiment (FIGS. 6A and 6B), it is possible to achieve a configuration with good cost performance while emphasizing small size and light weight.
　図７Ａ及び図７Ｂを参照して、本発明の実施例５のパワー半導体ユニットについて説明する。図７Ａは、本実施例のパワー半導体ユニットの構成を示す図である。図７Ｂは、図７ＡのＣ－Ｃ’断面を示す図である。 A power semiconductor unit according to Example 5 of the present invention will be described with reference to FIGS. 7A and 7B. FIG. 7A is a diagram showing the configuration of the power semiconductor unit of this embodiment. FIG. 7B is a view showing a C-C' section of FIG. 7A.
　本実施例のパワー半導体ユニットは、図７Ａ及び図７Ｂに示すように、ヒートシンクが、上下３層に配置された３つの冷却ジャケット２４で構成されている。 In the power semiconductor unit of this embodiment, as shown in FIGS. 7A and 7B, the heat sink is composed of three cooling jackets 24 arranged in three upper and lower layers.
　そして、複数のパワー半導体モジュール２０が、３つの冷却ジャケット２４の間で、２段積層されており、上層のパワー半導体モジュール２０は最上段の冷却ジャケット２４と中段の冷却ジャケット２４との間に、はんだ接合または焼結金属接合で接合されている。 A plurality of power semiconductor modules 20 are stacked in two stages between three cooling jackets 24, and the power semiconductor module 20 in the upper layer is between the cooling jacket 24 in the uppermost stage and the cooling jacket 24 in the middle stage. Joined by solder joints or sintered metal joints.
　また、下層のパワー半導体モジュール２０は最下段の冷却ジャケット２４と中段の冷却ジャケット２４との間に、はんだ接合または焼結金属接合で接合されている。 In addition, the lower power semiconductor module 20 is joined between the lowermost cooling jacket 24 and the middle cooling jacket 24 by solder joint or sintered metal joint.
　なお、接続部の熱抵抗は金属接合材に比べて高くなるが、はんだ接合または焼結金属接合等の金属接合材に替えて、放熱グリースまたは放熱シートを用いることも可能である。 Although the thermal resistance of the connection part is higher than that of the metal bonding material, it is also possible to use heat dissipating grease or heat dissipating sheet instead of metal bonding material such as solder bonding or sintered metal bonding.
　パワー半導体ユニットを本実施例（図７Ａ及び図７Ｂ）のような構成とすることで、全てのパワー半導体モジュール２０の両面が液冷型の冷却ジャケット２４で冷却されるため、パワー半導体ユニットの最大出力を優先したい場合に有利である。 By configuring the power semiconductor unit as in this embodiment (FIGS. 7A and 7B), both sides of all the power semiconductor modules 20 are cooled by the liquid cooling type cooling jacket 24, so that the maximum This is advantageous when you want to give priority to output.
　なお、本発明は上記した実施例に限定されるものではなく、様々な変形例が含まれる。例えば、上記した実施例は本発明を分かりやすく説明するために詳細に説明したものであり、必ずしも説明した全ての構成を備えるものに限定されるものではない。また、ある実施例の構成の一部を他の実施例の構成に置き換えることが可能であり、また、ある実施例の構成に他の実施例の構成を加えることも可能である。また、各実施例の構成の一部について、他の構成の追加・削除・置換をすることが可能である。 It should be noted that the present invention is not limited to the above-described embodiments, and includes various modifications. For example, the above-described embodiments have been described in detail in order to explain the present invention in an easy-to-understand manner, and are not necessarily limited to those having all the described configurations. In addition, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. Moreover, it is possible to add, delete, or replace a part of the configuration of each embodiment with another configuration.
　１…パワー半導体ユニット、２，５…絶縁基板、３…パワー半導体素子、４…配線金属部品、６，７…ヒートシンク、８，１１…セラミック基板、９，１０，１２，１３…銅板、１４，１５，１６…焼結金属、１７，１８…半田または焼結金属、１９…冷媒、２０…パワー半導体モジュール、２１，２４…冷却ジャケット、２２…水路、２３…開口部、２５…キャパシタ、２６…アルミ固定バー DESCRIPTION OF SYMBOLS 1... Power semiconductor unit 2, 5... Insulating substrate 3... Power semiconductor element 4... Wiring metal part 6, 7... Heat sink 8, 11... Ceramic substrate 9, 10, 12, 13... Copper plate, 14, 15, 16... Sintered metal 17, 18... Solder or sintered metal 19... Coolant 20... Power semiconductor module 21, 24... Cooling jacket 22... Water channel 23... Opening 25... Capacitor 26... aluminum fixing bar

Claims (16)

  1. 　パワー半導体素子と、
    　前記パワー半導体素子の一方の面に接合される第１の絶縁基板と、
    　前記パワー半導体素子の他方の面に接合される配線金属部品と、
    　前記配線金属部品の前記パワー半導体素子が接合される面の反対側の面に接合される第２の絶縁基板と、
    　前記パワー半導体素子からの熱を冷却するヒートシンクと、を備え、
    　前記パワー半導体素子と前記第１の絶縁基板との接合、前記パワー半導体素子と前記配線金属部品との接合、前記配線金属部品と前記第２の絶縁基板との接合は、焼結金属接合であることを特徴とするパワー半導体ユニット。     a power semiconductor element;
    a first insulating substrate bonded to one surface of the power semiconductor element;
    a wiring metal component joined to the other surface of the power semiconductor element;
    a second insulating substrate bonded to the surface of the wiring metal component opposite to the surface to which the power semiconductor element is bonded;
    a heat sink that cools heat from the power semiconductor element,
    The bonding between the power semiconductor element and the first insulating substrate, the bonding between the power semiconductor element and the wiring metal component, and the bonding between the wiring metal component and the second insulating substrate are sintered metal bonding. A power semiconductor unit characterized by:
  2. 　請求項１に記載のパワー半導体ユニットにおいて、
    　前記焼結金属接合は、焼結銀接合または焼結銅接合であることを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 1,
    The power semiconductor unit, wherein the sintered metal joint is sintered silver joint or sintered copper joint.
  3. 　請求項１に記載のパワー半導体ユニットにおいて、
    　前記ヒートシンクは、前記第１の絶縁基板の前記パワー半導体素子が接合される面の反対側の面に接合され、
    　前記第１の絶縁基板と前記ヒートシンクとの接合は、はんだ接合または焼結金属接合であることを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 1,
    the heat sink is bonded to the surface of the first insulating substrate opposite to the surface to which the power semiconductor element is bonded;
    A power semiconductor unit, wherein the bonding between the first insulating substrate and the heat sink is solder bonding or sintered metal bonding.
  4. 　請求項１に記載のパワー半導体ユニットにおいて、
    　前記ヒートシンクは、気体または液体による熱交換により前記パワー半導体素子からの熱を冷却することを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 1,
    The power semiconductor unit, wherein the heat sink cools the heat from the power semiconductor element by heat exchange with gas or liquid.
  5. 　請求項１に記載のパワー半導体ユニットにおいて、
    　前記パワー半導体素子と、前記第１の絶縁基板と、前記配線金属部品と、前記第２の絶縁基板とが同じ封止樹脂で封止されたパワー半導体モジュールを有することを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 1,
    A power semiconductor unit, comprising: a power semiconductor module in which the power semiconductor element, the first insulating substrate, the wiring metal part, and the second insulating substrate are sealed with the same sealing resin. .
  6. 　請求項５に記載のパワー半導体ユニットにおいて、
    　前記ヒートシンクは、前記第１の絶縁基板の前記パワー半導体素子が接合される面の反対側の面に接合される第１のヒートシンクと、
    　前記第２の絶縁基板の前記配線金属部品が接合される面の反対側の面に接合される第２のヒートシンクと、を有し、
    　前記第１の絶縁基板と前記ヒートシンクとの接合、前記第２の絶縁基板と前記第２のヒートシンクとの接合は、はんだ接合または焼結金属接合であり、
    　前記第１のヒートシンクと前記第２のヒートシンクとの間に、前記パワー半導体モジュールが複数並列に配置されていることを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 5,
    a first heat sink bonded to a surface of the first insulating substrate opposite to a surface to which the power semiconductor element is bonded;
    a second heat sink bonded to the surface of the second insulating substrate opposite to the surface to which the wiring metal component is bonded;
    The bonding between the first insulating substrate and the heat sink and the bonding between the second insulating substrate and the second heat sink are solder bonding or sintered metal bonding,
    A power semiconductor unit, wherein a plurality of said power semiconductor modules are arranged in parallel between said first heat sink and said second heat sink.
  7. 　請求項６に記載のパワー半導体ユニットにおいて、
    　前記複数のパワー半導体モジュールは、第１のヒートシンクと前記第２のヒートシンクとの間で、２段積層されており、
    　上層のパワー半導体モジュールと下層のパワー半導体モジュールとの間は、はんだ接合または焼結金属接合で接合されていることを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 6,
    The plurality of power semiconductor modules are stacked in two stages between the first heat sink and the second heat sink,
    A power semiconductor unit, wherein the power semiconductor module in the upper layer and the power semiconductor module in the lower layer are joined by solder joint or sintered metal joint.
  8. 　請求項５に記載のパワー半導体ユニットにおいて、
    　前記ヒートシンクは、第１のヒートシンクと、第２のヒートシンクと、第３のヒートシンクと、を有し、
    　前記第１のヒートシンクと前記第２のヒートシンクとの間に、前記パワー半導体モジュールが複数並列に配置された第１のパワー半導体モジュール群を有し、
    　前記第２のヒートシンクと前記第３のヒートシンクとの間に、前記パワー半導体モジュールが複数並列に配置された第２のパワー半導体モジュール群を有し、
    　前記第１のヒートシンクと前記パワー半導体モジュールとの接合、前記第２のヒートシンクと前記パワー半導体モジュールとの接合、前記第３のヒートシンクと前記パワー半導体モジュールとの接合は、はんだ接合または焼結金属接合であることを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 5,
    the heat sink has a first heat sink, a second heat sink, and a third heat sink;
    a first power semiconductor module group in which a plurality of the power semiconductor modules are arranged in parallel between the first heat sink and the second heat sink;
    a second power semiconductor module group in which a plurality of the power semiconductor modules are arranged in parallel between the second heat sink and the third heat sink;
    The bonding between the first heat sink and the power semiconductor module, the bonding between the second heat sink and the power semiconductor module, and the bonding between the third heat sink and the power semiconductor module are solder bonding or sintered metal bonding. A power semiconductor unit characterized by:
  9. 　請求項８に記載のパワー半導体ユニットにおいて、
    　前記第２のヒートシンクは、前記第１のヒートシンクと前記第３のヒートシンクとの間に配置され、
    　前記第２のヒートシンクは、液冷型のヒートシンクであり、
    　前記第１のヒートシンクおよび前記第３のヒートシンクは、空冷型のヒートシンクであることを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 8,
    the second heat sink is positioned between the first heat sink and the third heat sink;
    The second heat sink is a liquid-cooled heat sink,
    The power semiconductor unit, wherein the first heat sink and the third heat sink are air-cooled heat sinks.
  10. 　以下の工程を含むパワー半導体ユニットの製造方法；
    　（ａ）焼結金属接合により、第１の絶縁基板上にパワー半導体素子を接合する工程、
    　（ｂ）焼結金属接合により、前記パワー半導体素子上に配線金属部品を接合する工程、　（ｃ）焼結金属接合により、前記配線金属部品上に第２の絶縁基板を接合する工程、
    　（ｄ）前記第１の絶縁基板と前記パワー半導体素子と前記配線金属部品と前記第２の絶縁基板とを、封止樹脂で封止する工程、
    　（ｅ）前記（ｄ）工程の後、はんだ接合または焼結金属接合により、前記第１の絶縁基板をヒートシンクに接合する工程。     A method of manufacturing a power semiconductor unit comprising the steps of;
    (a) bonding a power semiconductor device onto a first insulating substrate by sintered metal bonding;
    (b) bonding a wiring metal component onto the power semiconductor element by sintered metal bonding; (c) bonding a second insulating substrate onto the wiring metal component by sintered metal bonding;
    (d) sealing the first insulating substrate, the power semiconductor element, the wiring metal component, and the second insulating substrate with a sealing resin;
    (e) bonding the first insulating substrate to a heat sink by solder bonding or sintered metal bonding after step (d);
  11. 　第１のパワー半導体モジュールと、
    　前記第１のパワー半導体モジュールに重畳する第２のパワー半導体モジュールと、
    　前記第１のパワー半導体モジュールおよび前記第２のパワー半導体モジュールを冷却するヒートシンクと、を備え、
    　前記ヒートシンクは、少なくとも１つの液冷型ヒートシンクを有し、
    　前記第１のパワー半導体モジュールは、２つの主面のうち一方の主面のみが前記液冷型ヒートシンクに熱的に接続され、
    　前記第２のパワー半導体モジュールは、２つの主面のうち一方の主面のみが前記液冷型ヒートシンクに熱的に接続されることを特徴とするパワー半導体ユニット。     a first power semiconductor module;
    a second power semiconductor module superimposed on the first power semiconductor module;
    a heat sink that cools the first power semiconductor module and the second power semiconductor module;
    the heat sink comprises at least one liquid-cooled heat sink;
    The first power semiconductor module is thermally connected to the liquid-cooled heat sink only on one of two main surfaces,
    A power semiconductor unit, wherein only one of two main surfaces of the second power semiconductor module is thermally connected to the liquid-cooled heat sink.
  12. 　請求項１１に記載のパワー半導体ユニットにおいて、
    　前記第１のパワー半導体モジュールは、前記一方の主面が金属接合材を介して前記液冷型ヒートシンクに接合され、
    　前記第２のパワー半導体モジュールは、前記一方の主面が金属接合材を介して前記液冷型ヒートシンクに接合されることを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 11,
    The first power semiconductor module has the one main surface bonded to the liquid-cooled heat sink via a metal bonding material,
    A power semiconductor unit, wherein the one main surface of the second power semiconductor module is bonded to the liquid-cooled heat sink via a metal bonding material.
  13. 　請求項１１に記載のパワー半導体ユニットにおいて、
    　前記第１のパワー半導体モジュールは、前記一方の主面が放熱グリースまたは放熱シートを介して前記液冷型ヒートシンクに熱的に接続され、
    　前記第２のパワー半導体モジュールは、前記一方の主面が放熱グリースまたは放熱シートを介して前記液冷型ヒートシンクに熱的に接続されることを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 11,
    The first power semiconductor module has the one main surface thermally connected to the liquid-cooled heat sink via heat-dissipating grease or a heat-dissipating sheet,
    A power semiconductor unit, wherein the one main surface of the second power semiconductor module is thermally connected to the liquid-cooled heat sink via heat-dissipating grease or a heat-dissipating sheet.
  14. 　請求項１１に記載のパワー半導体ユニットにおいて、
    　前記ヒートシンクは、液冷型ではない第１のヒートシンクと、液冷型ではない第２のヒートシンクと、を有し、
    　前記第１のパワー半導体モジュールの前記一方の主面と、前記第２のパワー半導体モジュールの前記一方の主面は、共通の液冷型ヒートシンクに熱的に接続され、
    　前記第１のパワー半導体モジュールの他方の主面には、前記第１のヒートシンクが熱的に接続され、
    　前記第２のパワー半導体モジュールの他方の主面には、前記第２のヒートシンクが熱的に接続されることを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 11,
    The heat sink has a first non-liquid cooled heat sink and a second non-liquid cooled heat sink,
    the one main surface of the first power semiconductor module and the one main surface of the second power semiconductor module are thermally connected to a common liquid-cooled heat sink;
    The first heat sink is thermally connected to the other main surface of the first power semiconductor module,
    A power semiconductor unit, wherein the second heat sink is thermally connected to the other main surface of the second power semiconductor module.
  15. 　請求項１１に記載のパワー半導体ユニットにおいて、
    　前記ヒートシンクは、第１の液冷型ヒートシンクと、第２の液冷型ヒートシンクと、を有し、
    　前記第１のパワー半導体モジュールの前記一方の主面には、前記第１の液冷型ヒートシンクが熱的に接続され、
    　前記第２のパワー半導体モジュールの前記一方の主面には、前記第２の液冷型ヒートシンクが熱的に接続され、
    　前記第１のパワー半導体モジュールの他方の主面と前記第２のパワー半導体モジュールの他方の主面とが熱的に接続されることを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 11,
    The heat sink has a first liquid-cooled heat sink and a second liquid-cooled heat sink,
    The first liquid-cooled heat sink is thermally connected to the one main surface of the first power semiconductor module,
    The second liquid-cooled heat sink is thermally connected to the one main surface of the second power semiconductor module,
    A power semiconductor unit, wherein the other main surface of the first power semiconductor module and the other main surface of the second power semiconductor module are thermally connected.
  16. 　請求項１１に記載のパワー半導体ユニットにおいて、
    　前記第１のパワー半導体モジュールと前記第２のパワー半導体モジュールのそれぞれは、主電流が流れる主端子と、少なくともゲート端子を含む制御用端子とを有し、
    　前記第１のパワー半導体モジュールの制御用端子は、前記第２のパワー半導体モジュールの制御用端子とは反対側に屈曲して伸びていることを特徴とするパワー半導体ユニット。     In the power semiconductor unit according to claim 11,
    each of the first power semiconductor module and the second power semiconductor module has a main terminal through which a main current flows and a control terminal including at least a gate terminal;
    A power semiconductor unit, wherein the control terminals of the first power semiconductor module are bent and extend in a direction opposite to the control terminals of the second power semiconductor module.
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