WO2022257051A1 - 近场通信芯片、相位同步方法及电子设备 - Google Patents
近场通信芯片、相位同步方法及电子设备 Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
- H04B5/40—Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by components specially adapted for near-field transmission
- H04B5/45—Transponders
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
- H04B5/70—Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes
- H04B5/72—Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes for local intradevice communication
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
- H04B5/40—Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by components specially adapted for near-field transmission
- H04B5/48—Transceivers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
- H04B5/70—Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes
- H04B5/79—Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes for data transfer in combination with power transfer
Definitions
- the phase alignment circuit is configured to acquire the second clock signal with the smallest phase difference from the carrier clock signal when the processing circuit determines that the second carrier frequency error CFO is greater than a second threshold.
- the phase alignment is performed before the data frame is sent.
- the phase deviation caused by the second carrier frequency error CFO does not affect the normal demodulation of the signal by the NFC card reader during the transmission of a data frame, then this can be performed.
- Phase alignment only when the phase deviation caused by the second carrier frequency error CFO affects the normal demodulated signal of the NFC card reader, this phase alignment can be performed.
- a second threshold Y can be set for the second carrier frequency error CFO, phase
- the method before generating the first frequency adjustment word according to the first carrier frequency error, the method further includes: determining that the first carrier frequency error is greater than a first threshold.
- determining the first carrier frequency error between the local clock signal and the carrier clock signal determined according to the received signal it further includes determining BPSK using binary phase shift keying according to the data frame.
- NFC card reader refers to an NFC-enabled device that initiates an NFC connection.
- NFC card device refers to a device that supports NFC in response to a request from an NFC card reader.
- NFC card readers or NFC card devices are mobile phones, tablet computers, personal computers (personal computer, PC), personal digital assistants (personal digital assistant, PDA), smart watches, netbooks, wearable electronic devices, augmented reality technology (augmented reality) , AR) equipment, virtual reality (virtual reality, VR) equipment, vehicle equipment, smart cars, smart audio, robots, smart glasses and other different types of electronic equipment.
- an embodiment of the present application provides an NFC communication system, including an NFC card reader 20 and an NFC card device 10 .
- the NFC card reader 20 sends a carrier wave after starting the field.
- the NFC card device 10 modulates a sub-carrier signal (modulated signal or transmitted signal) on a carrier through load modulation. Specifically, taking BPSK ALM as an example, as shown in FIG.
- the carrier of the card reader 20 is a field in the same direction. After the carrier of the NFC card reader 20 is superimposed with a modulation signal, the amplitude is enhanced to represent bit 1.
- the phase alignment circuit 1013 is used for adjusting the phase of the signal output by the phase locked loop 1012 as the clock signal of the transmitting circuit 103 of the NFC card device 10 .
- the phase alignment circuit 1013 may include one or more logic devices, discrete gate or transistor logic devices, discrete hardware components, and the like.
- RAM random access memory
- static RAM static random access memory
- dynamic RAM dynamic random access memory
- DRAM dynamic random access memory
- synchronous dynamic random access memory synchronous DRAM, SDRAM
- double data rate synchronous dynamic random access memory double data rate SDRAM, DDR SDRAM
- enhanced synchronous dynamic random access memory enhanced SDRAM, ESDRAM
- synchronous connection dynamic random access memory synchronous DRAM, SLDRAM
- direct rambus RAM DR RAM
- the memory may exist independently and be connected to the processing circuit 1011 through a communication line.
- the memory can also be integrated with the processing circuit 1011.
- the disclosed systems, devices and methods may be implemented in other ways.
- the device embodiments described above are only illustrative.
- the division of the units is only a logical function division. In actual implementation, there may be other division methods.
- multiple units or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented.
- the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.
- the available medium may be a magnetic medium (such as a floppy disk, a hard disk, or a magnetic tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid state disk (Solid State Disk, SSD)), etc.
- a magnetic medium such as a floppy disk, a hard disk, or a magnetic tape
- an optical medium such as a DVD
- a semiconductor medium such as a solid state disk (Solid State Disk, SSD)
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
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Abstract
Description
Claims (19)
- 一种近场通信芯片,其特征在于,包括:处理电路,用于确定本地时钟信号与载波时钟信号的第一载波频率误差,并根据所述第一载波频率误差生成第一频率调节字,其中,所述载波时钟信号根据所述近场通信芯片接收的接收信号确定;锁相环,用于根据所述本地时钟信号以及所述第一频率调节字,生成第一时钟信号;相位对齐电路,用于根据所述载波时钟信号对所述第一时钟信号进行相位选择,得到第二时钟信号发送至发射电路。
- 根据权利要求1所述的近场通信芯片,其特征在于,所述相位对齐电路,具体用于通过第一采样频率对所述第一时钟信号进行采样获取N个采样时钟信号,其中所述第一采样频率为所述第一时钟信号的频率的N倍,其中N为正整数;所述相位对齐电路,具体用于根据数据帧的第一相位采样信号、以及所述处理电路生成的所述载波时钟信号与所述第一时钟信号的第二载波频率误差累加的相位偏差,在所述N个采样时钟信号中获取与所述载波时钟信号相位差最小的第二时钟信号;并将所述第二时钟信号发送至发射电路。
- 根据权利要求1所述的近场通信芯片,其特征在于,所述处理电路,用于在确定所述第一载波频率误差大于第一阈值时,生成所述第一频率调节字。
- 根据权利要求2所述的近场通信芯片,其特征在于,所述相位对齐电路,用于在所述处理电路确定所述第二载波频率误差大于第二阈值时,获取与所述载波时钟信号相位差最小的第二时钟信号。
- 根据权利要求1所述的近场通信芯片,其特征在于,所述处理电路具体用于根据数据帧确定采用二进制相移键控BPSK时,获取所述接收信号的载波时钟信号。
- 根据权利要求1所述的近场通信芯片,其特征在于,所述处理电路还用于根据数据帧确定采用非二进制相移键控non-BPSK时,在数据帧中第一比特处获取所述载波时钟信号,根据所述载波时钟信号生成第二频率调节字;所述锁相环,用于根据所述本地时钟信号以及所述第二频率调节字,生成第三时钟信号;所述相位对齐电路,用于根据所述载波时钟信号对所述第三时钟信号进行相位选择,得到第四时钟信号发送至发射电路,其中所述第四时钟信号用于所述发射电路发射所述数据帧中的第二比特,其中所述第一比特和所述第二比特不同。
- 一种电子设备,其特征在于,包括:近场通信芯片,以及接收电路、发射电路,其中所述近场通信芯片分别与所述接收电路以及所述发射电路相耦合,其中:所述近场通信芯片,用于通过所述接收电路获取接收信号,并根据所述接收信号确定载波时钟信号;确定所述近场通信芯片的本地时钟信号与所述载波时钟信号的第一载波频率误差,并根据所述第一载波频率误差生成第一频率调节字;根据所述第一频率调节字对所述本地时钟信号进行频率调节,生成第一时钟信号;根据所述载波时钟信号对所述第一时钟信号进行相位选择,得到第二时钟信号并发送至所述发射电路;所述发射电路,用于采用所述第二时钟信号进行主动负载调制。
- 根据权利要求7所述的电子设备,其特征在于,所述近场通信芯片具体用于通过第一采样频率对所述第一时钟信号进行采样获取N个采样时钟信号,其中所述第一采样频率为所述第一时钟信号的频率的N倍,其中N为正整数;根据数据帧的第一相位采样信号、以及所述载波时钟信号与所述第一时钟信号的第二场频率误差累加的相位偏差,在所述N个采样时钟信号中获取与所述载波时钟信号相位差最小的第二时钟信号。
- 根据权利要求7所述的电子设备,其特征在于,所述近场通信芯片还用于根据所述第一载波频率误差生成第一频率调节字之前,确定所述第一载波频率误差大于第一阈值。
- 根据权利要求8所述的电子设备,其特征在于,所述近场通信芯片还用于在所述N路采样时钟信号中获取与所述载波时钟信号相位差最小的第二时钟信号之前,确定所述第二载波频率误差累加的相位偏差大于第二阈值。
- 根据权利要求7所述的电子设备,其特征在于,所述近场通信芯片确定本地时钟信号与所述载波时钟信号的第一载波频率误差之前,还用于根据数据帧确定采用BPSK。
- 根据权利要求7所述的电子设备,其特征在于,所述近场通信芯片,还用于根据数据帧确定采用non-BPSK时,在所述数据帧中第一比特处获取所述载波时钟信号,根据所述载波时钟信号生成第二频率调节字;根据所述第二频率调节字对所述本地时钟信号进行频率调节,生成第三时钟信号;根据所述载波时钟信号对所述第三时钟信号进行相位选择,得到第四时钟信号;所述发射电路,还用于采用所述第四时钟信号进行主动负载调制发射所述数据帧中的第二比特,其中所述第一比特和所述第二比特不同。
- 一种近场通信芯片的相位同步方法,其特征在于,包括:确定本地时钟信号与根据接收信号确定的载波时钟信号的第一载波频率误差,并根据所述第一载波频率误差生成第一频率调节字;根据所述第一频率调节字对所述本地时钟信号进行频率调节,生成第一时钟信号;根据所述载波时钟信号对所述第一时钟信号进行相位选择,得到第二时钟信号。
- 根据权利要求13所述的近场通信芯片的相位同步方法,其特征在于,还包括:采用所述第二时钟信号进行主动负载调制。
- 根据权利要求13所述的近场通信芯片的相位同步方法,其特征在于,所述根据所述载波时钟信号对所述第一时钟信号进行相位选择,包括:通过第一采样频率对所述第一时钟信号进行采样获取N个采样时钟信号,其中所述第一采样频率为所述第一时钟信号的频率的N倍,其中N为正整数;根据数据帧的第一相位采样信号、以及所述载波时钟信号与所述第一时钟信号的第二场频率误差累加的相位偏差,在所述N个采样时钟信号中获取与所述载波时钟信号相位差最小的第二时钟信号。
- 根据权利要求13所述的近场通信芯片的相位同步方法,其特征在于,所述根据所述第一载波频率误差生成第一频率调节字之前,还包括:确定所述第一载波频率 误差大于第一阈值。
- 根据权利要求15所述的近场通信芯片的相位同步方法,其特征在于,所述在所述N个采样时钟信号中获取与所述载波时钟信号相位差最小的第二时钟信号之前,确定所述第二载波频率误差累加的相位偏差大于第二阈值。
- 根据权利要求13所述的近场通信芯片的相位同步方法,其特征在于,所述确定本地时钟信号与根据接收信号确定的载波时钟信号的第一载波频率误差之前,还包括根据数据帧确定采用二进制相移键控BPSK。
- 根据权利要求13所述的近场通信芯片的相位同步方法,其特征在于,根据数据帧确定采用non-BPSK时,在所述数据帧中第一比特处获取所述载波时钟信号,根据所述载波时钟信号生成第二频率调节字;根据所述第二频率调节字对所述本地时钟信号进行频率调节,生成第三时钟信号;根据所述载波时钟信号对所述第三时钟信号进行相位选择,得到第四时钟信号;采用所述第四时钟信号进行主动负载调制发射所述数据帧中的第二比特,其中所述第一比特和所述第二比特不同。
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EP21944561.6A EP4340237A1 (en) | 2021-06-09 | 2021-06-09 | Near field communication chip, phase synchronization method, and electronic device |
PCT/CN2021/099251 WO2022257051A1 (zh) | 2021-06-09 | 2021-06-09 | 近场通信芯片、相位同步方法及电子设备 |
CN202180098264.3A CN117356121A (zh) | 2021-06-09 | 2021-06-09 | 近场通信芯片、相位同步方法及电子设备 |
US18/534,194 US20240106497A1 (en) | 2021-06-09 | 2023-12-08 | Near-field communication chip, phase synchronization method, and electronic device |
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2021
- 2021-06-09 EP EP21944561.6A patent/EP4340237A1/en active Pending
- 2021-06-09 CN CN202180098264.3A patent/CN117356121A/zh active Pending
- 2021-06-09 WO PCT/CN2021/099251 patent/WO2022257051A1/zh active Application Filing
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- 2023-12-08 US US18/534,194 patent/US20240106497A1/en active Pending
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CN110061763A (zh) * | 2018-01-19 | 2019-07-26 | 意法半导体有限公司 | 读取器与通过有源负载调制和读取器处于非接触通信中的对象之间的同步 |
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