WO2022252715A1

WO2022252715A1 - Dual-core heterogeneous soc chip

Info

Publication number: WO2022252715A1
Application number: PCT/CN2022/077865
Authority: WO
Inventors: 蒋雪凝; 何杰; 俞云霞
Original assignee: 杭州万高科技股份有限公司
Priority date: 2021-12-29
Filing date: 2022-02-25
Publication date: 2022-12-08
Also published as: CN114281754B; SA522440679B1; CN114281754A

Abstract

A dual-core heterogeneous SOC chip, applied to the field of electricity meters and the field of industrial control, and comprising: a management module, a metering module, a low power consumption module, and an access bus selector. The management module comprises a main processor, a first AHB bus, a main storage unit, a main register, a first AHB2APB bridge, and a first APB bus. The metering module comprises a metering processor, a main bus bridge, a metering storage unit, a metering register, a second AHB bus, a second AHB2APB bridge, and a second APB bus. The first AHB bus and the second AHB bus are connected by means of the main bus bridge, such that the main processor can access the metering module. The first APB bus and the second APB bus are both connected to the access bus selector, such that the main processor or the metering processor can be selected to access the low power consumption module. The low power consumption module comprises a third APB bus and a low power consumption register, and the low power consumption register is used for low power consumption module parameter configuration. The present chip greatly reduces chip research and development costs, and greatly improves software difficulty and system security.

Description

A dual-core heterogeneous SoC chip

technical field

The invention belongs to the field of smart meters and industrial control integrated circuits, in particular to a dual-core heterogeneous SoC chip.

Background technique

With the wide application of computers, whether it is in the general industrial field or in the subdivided electric power meter smart terminal field, the requirements for chip performance and energy consumption are getting higher and higher. With the promotion of the smart grid and the new national standard of electric power, the dual-core electric energy meter counting scheme with the separation of the metering core and the management core is proposed, which makes the general industrial chip unable to meet the legal independence requirements of the metering core proposed by the new national standard. Therefore, the existing chip solutions cannot be highly adapted to the general industrial field and the electric power field at the same time, and the general industrial chip cannot be applied to the electric meter core. Although the existing dual-core heterogeneous smart meter chip has two independent management units and metering units, it can be better applied to the field of electric power meters. However, in the general industrial field, since there are two parallel independent systems with their own processors, it is very difficult for the software to write the running code of the two cores. At the same time, the two processors can operate on the Accessing the modules in the two systems will cause major system security holes, thus posing a greater challenge to system security.

Contents of the invention

Purpose of the invention: the technical problem to be solved by this invention is to provide a dual-core heterogeneous SoC (System on Chip, system-on-chip) chip for the deficiencies in the prior art, which can simultaneously meet the requirements of the new national standard in the field of electric power meters. It is better applicable to the field of general industrial control, greatly reducing the cost of chip research and development.

In order to solve the above technical problems, the present invention discloses a dual-core heterogeneous SoC chip, which is applied in the field of electric power meter and industrial control field, including a management module, a metering module, a low power consumption module and an access bus selector;

Further, the management module includes a main processor, a first AHB (Advanced High Performance Bus, advanced high-performance bus) bus, a main storage unit, a main register, a first AHB2APB bridge, and a first APB (Advanced Peripheral Bus, peripheral bus ) bus, the metering module includes a metering processor, a bus bridge, a metering storage unit, a metering register, a second AHB bus, a second AHB2APB bridge, and a second APB bus;

The main processor is connected to the first AHB bus, and accesses the main storage unit and the main register through the first AHB bus; the metering processor is connected to the second AHB bus, and accesses the metering storage unit and the metering register through the second AHB bus;

The first AHB bus and the second AHB bus are connected by a bus bridge, so that the main processor can access the metering module;

The first AHB bus and the first APB bus are connected by the first AHB2APB bridge, the second AHB bus and the second APB bus are connected by the second AHB2APB bridge, and both the first APB bus and the second APB bus are connected with the access bus selector, so that The main processor or the metering processor can be selected to access the low power module;

The low-power module includes a third APB bus and a low-power register, the third APB bus is respectively connected to an access bus selector and a low-power register, and the low-power register is used for low-power module parameters configuration.

Further, the main processor can set security levels for all components inside the management module, and the read and write access rights issued by the main processor when accessing other components in the management module are only as safe as the target components it accesses. level for normal access.

Setting the security level for the internal components of the management module can effectively distinguish the security zone from the non-security zone. The security area can be used to store non-user modifiable data, or perform non-user modifiable functions, thus preventing security holes and greatly improving chip security. The non-safe area can be opened to customers, so that customers can flexibly configure and use some chip functions for their own use.

Further, the low power consumption registers include chip mode registers,

The chip mode register is used to configure the chip mode, and the chip mode includes a dual-core industrial control chip mode and an electric meter chip mode;

When the chip mode is a dual-core industrial control chip mode, the dual-core heterogeneous SoC chip is applied in the field of industrial control, the metering module is subordinate to the management module, and the main processor can access all components in the metering module and low-power consumption modules, and can control the metering Whether the module works and can control whether the metering module accesses the low-power module, and the metering processor cannot access the management module;

When the chip mode is the meter chip mode, the dual-core heterogeneous SoC chip is applied in the field of electric power meters, the management module and the metering module are independent of each other, and the main processor can only access the static random access memory (SRAM) in the metering storage unit, and cannot access the memory of the metering module. As for other components and the low power consumption module, the metering processor can access the low power consumption module and control the dual-core heterogeneous SoC chip to enter or exit the low power consumption mode.

The dual-core heterogeneous SoC chip can be applied to the field of industrial control and the field of electric power meter at the same time, which reduces the cost of chip development and the complexity of program design, and improves the security of the chip at the same time.

Further, the low-power register also includes a low-power access control register and a low-power access authority register, the low-power access control register is used to configure the security attributes of the low-power module itself, and the low-power The access authority register is used to configure the security attributes of the metering module to access the low-power module, and the security attributes include two attributes: security and insecurity;

When the chip mode is dual-core industrial control chip mode, the main processor can control whether the metering module accesses the low power consumption module including:

When the main processor configures the low-power access control register as safe and configures the low-power access permission register as safe, the metering module can access the low-power module;

When the main processor configures the low-power access control register as safe and configures the low-power access permission register as unsafe, the metering module cannot access the low-power module;

When the host processor configures the low-power access control registers as unsafe, the metering module can access the low-power module.

The above configuration greatly increases the security of the chip.

Further, the main storage unit and the metering storage unit both include flash memory FLASH, read-only memory ROM and static random access memory SRAM for storing data and programs; the main register and metering register are used for parameter configuration of the management module and the metering module respectively.

Further, the bus bridge includes a decoding unit, which is used to realize the connectivity between the management module and the metering module;

When the chip mode is dual-core industrial control chip mode, the decoding unit decodes the addresses of all components in the metering module, so that the main processor can access all parts in the metering module, making the metering module subordinate to the management module, and the metering processor cannot access the management module. module;

When the chip mode is the meter chip mode, the decoding unit only decodes the address of the SRAM SRAM in the metering module, so that the main processor can only access the metering SRAM SRAM connected to the second AHB bus through the first AHB bus , thereby completing the communication with the metering processor. Other components in the metering module cannot be accessed by the main processor. In this way, the management module and the metering module operate independently without affecting each other.

Further, the initial chip mode configured by the chip mode register is a dual-core industrial control chip mode. If it needs to be configured as an electric meter chip mode, the configuration process includes: the main processor burns the chip mode of the dual-core heterogeneous SoC chip in the management module flash memory FLASH as In the meter chip mode, the program stored in the ROM of the management module rewrites the chip mode in the chip mode register to the meter chip mode according to the programming information.

Further, the low power consumption register also includes a chip mode lock register, and the chip mode lock register is used to store a key for locking the chip mode register. After rewriting the chip mode in the chip mode register to the meter chip mode, the main processing The device writes the key to the chip mode lock register and locks the chip mode register, which can ensure that the chip mode register cannot be rewritten in the future, preventing customer misoperation from making mistakes, or causing security leaks due to wrong modes in specific scenarios.

Further, the metering register includes a soft reset register and a clock register, the soft reset register is used to configure whether the metering module performs a soft reset, and the clock register is used to configure the clock unit of the metering module to be turned on or off;

When the chip mode is dual-core industrial control chip mode, the main processor can control whether the metering module works including:

By configuring the soft reset register and the clock register, the main processor sets the soft reset position of the metering module and turns off the clock, so that the metering module no longer works; at this time, the dual-core heterogeneous SoC chip can be used as a single-core chip, working here In this scenario, the power consumption of the chip is greatly reduced.

The main processor releases the soft reset of the metering module and turns on the clock by configuring the soft reset register and the clock register, so that the metering module resumes working.

Further, the main register includes a first management module low power consumption mode register, and the low power consumption register also includes a second management module low power consumption mode register and a metering module low power consumption mode register, and the first management module Both the low power consumption mode register and the second management module low power consumption mode register are used to configure whether the management module enters the low power consumption mode, and the metering module low power consumption mode register is used to configure whether the metering module enters the low power consumption mode;

The main processor can configure the low power consumption mode register of the first management module, so that the management module can enter the low power consumption mode autonomously;

When the chip mode is the meter chip mode, the metering processor can configure the second management module low-power mode register and the metering module low-power mode register, so that the management module and the metering module enter the low-power mode respectively; the main processor cannot configure the second 2. The low power consumption mode register of the management module and the low power consumption mode register of the metering module;

When the chip mode is dual-core industrial control chip mode, the main processor can configure the second management module low power mode register and the metering module low power mode register, respectively let the management module and the metering module enter the low power mode; when the main processor configures the metering module When the module can access the low power consumption module, the metering processor can also configure the low power consumption mode register of the second management module and the low power consumption mode register of the metering module, so that the management module and the metering module enter the low power consumption mode respectively.

Beneficial effect:

The dual-core heterogeneous SoC chip provided by the application meets the requirements of the new national standard in the field of electric power meters, and at the same time is better applicable to the field of general industrial control, greatly reducing the cost of chip research and development. The management module and the metering module are no longer parallel and independent, but the metering module is subordinate to the management module. The metering module can be regarded as a simple metering module of the dual-core heterogeneous SoC chip and is managed by the management module. At the same time, the processor of the metering module cannot access the modules of the management module, which greatly improves the difficulty of software and system security.

Description of drawings

The advantages of the above and/or other aspects of the present invention will become clearer as the present invention will be further described in detail in conjunction with the accompanying drawings and specific embodiments.

FIG. 1 is a schematic structural diagram of a dual-core heterogeneous SoC chip provided by an embodiment of the present application.

Detailed ways

Embodiments of the present invention will be described below with reference to the accompanying drawings.

The embodiment of the present application discloses a dual-core heterogeneous SoC chip, which is applied in the field of electric power meter and industrial control field, as shown in Figure 1, including a management module, a metering module, a low power consumption module and an access bus selector;

The management module includes a main processor, a first AHB bus, a main storage unit, a main register, a first AHB2APB bridge and a first APB bus, and the metering module includes a metering processor, a bus bridge, a metering storage unit, a metering register, A second AHB bus, a second AHB2APB bridge and a second APB bus;

Both the main storage unit and metering storage unit include flash memory FLASH, read-only memory ROM and static random access memory SRAM for storing data and programs;

The main register and metering register are used for parameter configuration of the management module and the metering module respectively;

The first AHB bus and the second AHB bus are connected through a bus bridge, so that the main processor can access the metering module;

The first AHB bus and the first APB bus are connected by the first AHB2APB bridge, the second AHB bus and the second APB bus are connected by the second AHB2APB bridge, and both the first APB bus and the second APB bus are connected with the access bus selector, so that A main processor or a metering processor can be selected to access the low power modules.

The management module and the metering module also include other units, which belong to the prior art. For example, both modules include a reset unit and a clock unit, which are not limited in this embodiment of the present invention.

There are other components hung on the first APB bus and the second APB bus, which belong to the prior art, such as the general architecture in industrial control chips, and are not limited in this embodiment of the present invention.

There are other module components hung on the third APB bus, which belong to the prior art, such as the general architecture in industrial control chips, and are not limited in this embodiment of the present invention.

In this embodiment, the main processor can set security levels for all components inside the management module, and the read and write access rights issued by the main processor when accessing other components in the management module are only not lower than the target components it accesses. The security level can be accessed normally. For example, if the main processor's access to the SRAM of the main storage unit is a non-security level access, and the SRAM of the main storage unit is set to a security level, then the SRAM authority of the accessed main storage unit is higher than the access authority, then This time it cannot be accessed by the main processor; if the main processor changes to a security level access, it can access the SRAM of the main storage unit set as the security level.

In this embodiment, the low power consumption register includes a chip mode register,

In this embodiment, the low-power registers also include low-power access control registers and low-power access authority registers, the low-power access control registers are used to configure the security attributes of the low-power modules themselves, and the low-power The power consumption access authority register is used to configure the security attributes for the metering module to access the low-power consumption module, and the security attributes include two attributes: safe and unsafe;

In this embodiment, the bus bridge includes a decoding unit, and the decoding unit is used to realize the connectivity between the management module and the metering module;

When the chip mode is a dual-core industrial control chip mode, the decoding unit decodes the addresses of all components in the metering module, so that the main processor can access all parts in the metering module, but the metering processor cannot access the management module;

When the chip mode is the meter chip mode, the decoding unit only decodes the address of the SRAM SRAM in the metering module, so that the main processor can only access the metering SRAM SRAM connected to the second AHB bus through the first AHB bus , thereby completing the communication with the metering processor.

In this embodiment, the initial chip mode configured by the chip mode register is the dual-core industrial control chip mode. If it needs to be configured as the meter chip mode, the configuration process includes: the main processor burns the chip mode of the dual-core heterogeneous SoC chip in the management module flash memory FLASH It is written as the meter chip mode, and the program stored in the ROM of the management module rewrites the chip mode in the chip mode register as the meter chip mode according to the programming information;

The low power consumption register also includes a chip mode lock register, and the chip mode lock register is used to store the key for locking the chip mode register. The mode lock register writes the key to lock the chip mode register.

In this embodiment, the metering register includes a soft reset register and a clock register, the soft reset register is used to configure whether the metering module performs a soft reset, and the clock register is used to configure the clock unit of the metering module to be turned on or off;

The main processor sets the soft reset of the metering module and turns off the clock by configuring the soft reset register and the clock register, so that the metering module no longer works; the main processor releases the soft reset of the metering module by configuring the soft reset register and the clock register And turn on the clock to make the metering module resume work.

In this embodiment, the main register includes a low power consumption mode register of the first management module, and the low power consumption register further includes a low power consumption mode register of the second management module and a low power consumption mode register of the metering module, and the first Both the low power consumption mode register of the management module and the low power consumption mode register of the second management module are used to configure whether the management module enters the low power consumption mode, and the low power consumption mode register of the metering module is used to configure whether the metering module enters the low power consumption mode ;

The main processor and/or metering processor can control the dual-core heterogeneous SoC chip to exit the low-power mode, and determine the wake-up mode for exiting from the low-power mode, for example, UART (Universal Asynchronous Receiver/Transmitter, asynchronous transceiver transmission device), IO (Input/Output, input/output), timer TIMER and voltage monitoring can all be used as wake-up sources for the management module and the metering module. For example, the metering processor configures the metering module low power consumption mode register among the low power module registers, so that the metering module can enter the low power consumption mode. Thereafter, various wakeup sources can wake up the metering module from low power consumption mode and enter normal working mode. For example, TIMER can be set to wake up the metering module after 1 second; when the UART in the wakeup unit receives external data from the chip, it wakes up the metering module; the IO is usually low, and when it is pulled to a high level, it can wake up the metering module ;Voltage monitoring can monitor whether the main power supply voltage of the dual-core heterogeneous SoC chip is normal. When the monitoring is abnormal, it can wake up the metering module and notify the chip voltage of abnormality, which needs to be reported and processed in time by the metering module.

The above configuration finally realizes the minimization of power consumption in different application scenarios of electric meters.

The present invention provides an idea and method for a dual-core heterogeneous SoC chip. There are many methods and approaches for realizing the technical solution. The above description is only a specific embodiment of the present invention. In other words, without departing from the principle of the present invention, several improvements and modifications can be made, and these improvements and modifications should also be regarded as the protection scope of the present invention. All components that are not specified in this embodiment can be realized by existing technologies.

Claims

A dual-core heterogeneous SoC chip is characterized in that it is applied to the field of electric power meter and industrial control field, including a management module, a metering module, a low power consumption module and an access bus selector;

The management module includes a main processor, a first AHB bus, a main storage unit, a main register, a first AHB2APB bridge and a first APB bus, and the metering module includes a metering processor, a bus bridge, a metering storage unit, a metering register, A second AHB bus, a second AHB2APB bridge and a second APB bus;

The main processor is connected to the first AHB bus, and accesses the main storage unit and the main register through the first AHB bus; the metering processor is connected to the second AHB bus, and accesses the metering storage unit and the metering register through the second AHB bus;

The first AHB bus and the second AHB bus are connected through a bus bridge, so that the main processor can access the metering module;

The first AHB bus and the first APB bus are connected by the first AHB2APB bridge, the second AHB bus and the second APB bus are connected by the second AHB2APB bridge, and both the first APB bus and the second APB bus are connected with the access bus selector, so that The main processor or the metering processor can be selected to access the low power module;

The low-power module includes a third APB bus and a low-power register, and the third APB bus is respectively connected to an access bus selector and a low-power register; the low-power register is used for low-power module parameters configuration.
A dual-core heterogeneous SoC chip according to claim 1, wherein the main processor can set security levels for all components inside the management module, and the main processor sends when accessing other components in the management module Read and write access rights can only be accessed normally only if the security level of the target component it accesses is not lower than that.
A kind of dual-core heterogeneous SoC chip according to claim 2, is characterized in that, described low power consumption register comprises chip mode register,

The chip mode register is used to configure the chip mode, and the chip mode includes a dual-core industrial control chip mode and an electric meter chip mode;

When the chip mode is a dual-core industrial control chip mode, the dual-core heterogeneous SoC chip is applied in the field of industrial control, the metering module is subordinate to the management module, and the main processor can access all components in the metering module and low-power consumption modules, and can control the metering Whether the module works and can control whether the metering module accesses the low-power module, and the metering processor cannot access the management module;

When the chip mode is the meter chip mode, the dual-core heterogeneous SoC chip is applied in the field of electric power meters, the management module and the metering module are independent of each other, and the main processor can only access the static random access memory (SRAM) in the metering storage unit, and cannot access the memory of the metering module. As for other components and the low power consumption module, the metering processor can access the low power consumption module and control the dual-core heterogeneous SoC chip to enter or exit the low power consumption mode.
A kind of dual-core heterogeneous SoC chip according to claim 3, it is characterized in that, described low power consumption register also comprises low power consumption access control register and low power consumption access right register, described low power consumption access control register is used for For configuring the security attributes of the low-power module itself, the low-power access authority register is used to configure the security attributes for the metering module to access the low-power modules, and the security attributes include two attributes: security and insecurity;

When the chip mode is dual-core industrial control chip mode, the main processor can control whether the metering module accesses the low power consumption module including:

When the main processor configures the low-power access control register as safe and configures the low-power access permission register as safe, the metering module can access the low-power module;

When the main processor configures the low-power access control register as safe and configures the low-power access permission register as unsafe, the metering module cannot access the low-power module;

When the host processor configures the low-power access control registers as unsafe, the metering module can access the low-power module.
A kind of dual-core heterogeneous SoC chip according to claim 4, it is characterized in that, main storage unit and metering storage unit all comprise flash memory FLASH, read-only memory ROM and static random access memory SRAM, are used for storing data and program; and metering registers are used for parameter configuration of the management module and metering module respectively.
The dual-core heterogeneous SoC chip according to claim 5, wherein the bus bridge includes a decoding unit, and the decoding unit is used to realize the connectivity between the management module and the metering module;

When the chip mode is a dual-core industrial control chip mode, the decoding unit decodes the addresses of all components in the metering module, so that the main processor can access all parts in the metering module, but the metering processor cannot access the management module;

When the chip mode is the meter chip mode, the decoding unit only decodes the address of the SRAM SRAM in the metering module, so that the main processor can only access the metering SRAM SRAM connected to the second AHB bus through the first AHB bus , thereby completing the communication with the metering processor.
The dual-core heterogeneous SoC chip according to claim 6, wherein the initial chip mode configured by the chip mode register is a dual-core industrial control chip mode, and if it needs to be configured as an electric meter chip mode, the configuration process includes: the main processor is managing In the module flash memory FLASH, the chip mode of the dual-core heterogeneous SoC chip is programmed into the meter chip mode, and the program stored in the ROM of the management module rewrites the chip mode in the chip mode register to the meter chip mode according to the programming information.
The dual-core heterogeneous SoC chip according to claim 7, wherein the low power consumption register also includes a chip mode lock register, and the chip mode lock register is used to store a key for locking the chip mode register. After rewriting the chip mode in the chip mode register to the ammeter chip mode, the main processor writes the key into the chip mode lock register to lock the chip mode register.
The dual-core heterogeneous SoC chip according to claim 8, wherein the metering register includes a soft reset register and a clock register, and the soft reset register is used to configure whether the metering module performs a soft reset, and the clock register The clock unit used to configure the metering module is turned on or off;

When the chip mode is dual-core industrial control chip mode, the main processor can control whether the metering module works including:

The main processor sets the soft reset of the metering module and turns off the clock by configuring the soft reset register and the clock register, so that the metering module no longer works; the main processor releases the soft reset of the metering module by configuring the soft reset register and the clock register And turn on the clock to make the metering module resume work.
The dual-core heterogeneous SoC chip according to claim 9, wherein the main register includes a first management module low power consumption mode register, and the low power consumption register also includes a second management module low power consumption mode Registers and metering module low power consumption mode registers, the first management module low power consumption mode register and the second management module low power consumption mode register are used to configure whether the management module enters the low power consumption mode, the metering module low power consumption mode The power consumption mode register is used to configure whether the metering module enters the low power consumption mode;

The main processor can configure the low power consumption mode register of the first management module, so that the management module can enter the low power consumption mode autonomously;

When the chip mode is the meter chip mode, the metering processor can configure the second management module low-power mode register and the metering module low-power mode register, so that the management module and the metering module enter the low-power mode respectively; the main processor cannot configure the second 2. The low power consumption mode register of the management module and the low power consumption mode register of the metering module;

When the chip mode is dual-core industrial control chip mode, the main processor can configure the second management module low power mode register and the metering module low power mode register, respectively let the management module and the metering module enter the low power mode; when the main processor configures the metering module When the module can access the low power consumption module, the metering processor can also configure the low power consumption mode register of the second management module and the low power consumption mode register of the metering module, so that the management module and the metering module enter the low power consumption mode respectively.