WO2022246713A1 - 纹路识别基板及纹路识别装置 - Google Patents

纹路识别基板及纹路识别装置 Download PDF

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Publication number
WO2022246713A1
WO2022246713A1 PCT/CN2021/096164 CN2021096164W WO2022246713A1 WO 2022246713 A1 WO2022246713 A1 WO 2022246713A1 CN 2021096164 W CN2021096164 W CN 2021096164W WO 2022246713 A1 WO2022246713 A1 WO 2022246713A1
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WIPO (PCT)
Prior art keywords
electrode
layer
insulating layer
light
via hole
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PCT/CN2021/096164
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English (en)
French (fr)
Inventor
丰亚洁
李成
耿越
王奎元
李重寰
代翼
祁朝阳
李泽飞
席聪聪
李小贯
Original Assignee
京东方科技集团股份有限公司
北京京东方传感技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方传感技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP21942294.6A priority Critical patent/EP4206980A4/en
Priority to CN202180001271.7A priority patent/CN115701306A/zh
Priority to PCT/CN2021/096164 priority patent/WO2022246713A1/zh
Priority to US18/249,406 priority patent/US20240113140A1/en
Publication of WO2022246713A1 publication Critical patent/WO2022246713A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/1347—Preprocessing; Feature extraction
    • G06V40/1359—Extracting features related to ridge properties; Determining the fingerprint type, e.g. whorl or loop
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1462—Coatings
    • H01L27/14623—Optical shielding

Definitions

  • the present disclosure relates to the technical field of texture recognition, in particular to a texture recognition substrate and a texture recognition device.
  • An embodiment of the present disclosure provides a texture recognition substrate and a texture recognition device, and the specific scheme is as follows:
  • an embodiment of the present disclosure provides a texture recognition substrate, including:
  • a base substrate including a photosensitive area and a light shielding area, the light shielding area being located on at least one side of the photosensitive area;
  • a plurality of photosensitive devices are arranged in an array in the photosensitive area, and the photosensitive devices include a stacked first electrode, a photoelectric conversion structure and a second electrode; wherein the photoelectric conversion structure is electrically connected to the first electrode, The photoelectric conversion structure is in direct contact with the second electrode;
  • a plurality of dummy devices are arranged in an array in the light-shielding area, and the dummy devices include a third electrode, an equivalent dielectric layer, and a fourth electrode; wherein, the third electrode is on the same layer as the first electrode, and the The fourth electrode is located on the side of the layer where the second electrode is located away from the substrate, the equivalent dielectric layer is located between the layer where the third electrode is located and the layer where the fourth electrode is located, and the The dummy device is configured not to perform photoelectric conversion.
  • the above-mentioned texture recognition substrate provided by the embodiment of the present disclosure, it also includes: a first insulating layer, a flat layer and a second insulating layer; wherein,
  • the first insulating layer is located between the equivalent dielectric layer and the layer where the third electrode is located, and the second insulating layer is located between the equivalent dielectric layer and the layer where the fourth electrode is located,
  • the flat layer is located between the first insulating layer and the second insulating layer.
  • the equivalent dielectric layer is separated from at least one of the third electrode and the fourth electrode.
  • the first insulating layer in the light-shielding area, includes a first via hole, the planar layer includes a second via hole, and the second insulating layer includes a second via hole. layer filling the second via;
  • the equivalent dielectric layer is in contact with the third electrode through the first via hole, and the equivalent dielectric layer is separated from the fourth electrode by the second insulating layer.
  • the planar layer in the light-shielding area, includes a second via hole, and the second insulating layer fills the second via hole;
  • the equivalent dielectric layer is separated from the third electrode by the first insulating layer, and the equivalent dielectric layer is separated from the fourth electrode by the second insulating layer.
  • the first insulating layer in the light-shielding area, includes a first via hole;
  • the equivalent dielectric layer is in contact with the third electrode through the first via hole, and the equivalent dielectric layer is separated from the fourth electrode by the planar layer and the second insulating layer. open.
  • the equivalent dielectric layer is separated from the third electrode by the first insulating layer, and the equivalent dielectric layer is separated by The planar layer, the second insulating layer and the fourth electrode are separated from each other.
  • the second insulating layer in the light-shielding region, includes a third via hole, and the fourth electrode fills the third via hole;
  • the equivalent dielectric layer is separated from the third electrode by the first insulating layer, and the equivalent dielectric layer is separated from the fourth electrode by the flat layer.
  • the dielectric constant of the equivalent dielectric layer is approximately the same as the dielectric constant of the photoelectric conversion structure.
  • the equivalent dielectric layer is the same layer and the same material as the photoelectric conversion structure.
  • the equivalent dielectric layer is the same layer as the photoelectric conversion structure, but the material is different, and the dielectric constant of the equivalent dielectric layer is 10 -15.
  • the first insulating layer in the light-shielding area, includes a first via hole, the second insulating layer includes a third via hole, and the first insulating layer includes a third via hole. four electrodes filling the third via hole;
  • the planar layer is in contact with the third electrode through the first via hole, and the planar layer is in contact with the fourth electrode through the third via hole.
  • the first insulating layer in the light-shielding area, includes a first via hole;
  • the planar layer is in contact with the third electrode through the first via hole, and the planar layer is separated from the fourth electrode by the second insulating layer.
  • the second insulating layer in the light-shielding region, includes a third via hole, and the fourth electrode fills the third via hole;
  • the flat layer is separated from the third electrode by the first insulating layer, and the flat layer is in contact with the fourth electrode through the third via hole.
  • the flat layer in the light-shielding region, is separated from the third electrode by the first insulating layer, and the flat layer is separated by The second insulating layer is separated from the fourth electrode.
  • the flat layer is multiplexed as the equivalent dielectric layer.
  • the planar layer in the light-shielding area, includes a second via hole, and the second insulating layer fills the second via hole;
  • the second insulating layer is separated from the third electrode by the first insulating layer, and the second insulating layer is in direct contact with the fourth electrode.
  • the first insulating layer in the light-shielding area, includes a first via hole, the planar layer includes a second via hole, and the first via hole The hole is arranged through the second via hole, and the second insulating layer fills the first via hole and the second via hole;
  • the second insulating layer is in contact with the third electrode through the first via hole and the second via hole, and the second insulating layer is in direct contact with the fourth electrode.
  • the second insulating layer is multiplexed as the equivalent dielectric layer.
  • a bias line is further included, and the bias line is located on a side of the second insulating layer away from the base substrate;
  • the fourth electrode is of the same layer and material as the bias line, and the third electrode is of the same material as the first electrode.
  • the above texture recognition substrate provided by the embodiments of the present disclosure further includes a light-shielding layer, the light-shielding layer is located on the side of the base substrate away from the layer where the plurality of dummy devices are located, and the light-shielding layer covers At least one row of the dummy devices.
  • the light-shielding layer covers other rows of the dummy devices than the row of the dummy devices adjacent to the photosensitive region.
  • the above-mentioned texture identification substrate provided in the embodiment of the present disclosure further includes: an alignment mark, the alignment mark is located in the light-shielding area;
  • the light-shielding layer includes a hollow structure exposing the alignment mark.
  • the above-mentioned texture recognition substrate provided by the embodiment of the present disclosure further includes a light-shielding metal layer and a transistor, wherein the light-shielding metal layer is located on the side of the layer where the fourth electrode is located away from the base substrate, The transistor is located between the layer where the photoelectric conversion structure is located and the base substrate, and the source and drain of the transistor are electrically connected to the first electrode or the third electrode;
  • the orthographic projection of the light-shielding metal layer on the base substrate covers the orthographic projection of the transistor on the base substrate, and the orthographic projection of the light-shielding metal layer on the base substrate is identical to the virtual Orthographic projections of the device and the photosensitive device on the base substrate do not overlap each other.
  • an embodiment of the present disclosure provides a texture recognition device, including a backlight module and a texture recognition substrate. side.
  • FIG. 1 is a schematic structural diagram of a texture recognition substrate provided by an embodiment of the present disclosure
  • Figure 2 is a schematic diagram of the enlarged structure of the Z1 or Z2 area in Figure 1;
  • Fig. 3 is a kind of sectional structure schematic diagram along the line I-II in Fig. 2;
  • Fig. 4 is another kind of sectional structure schematic diagram along the line I-II in Fig. 2;
  • Fig. 5 is another kind of sectional structure schematic diagram along the line I-II in Fig. 2;
  • Fig. 6 is another kind of sectional structure schematic diagram along the line I-II in Fig. 2;
  • Fig. 7 is another kind of cross-sectional structure schematic diagram along the line I-II in Fig. 2;
  • Fig. 8 is another kind of cross-sectional structure diagram along the line I-II in Fig. 2;
  • Fig. 9 is another kind of cross-sectional structure diagram along the line I-II in Fig. 2;
  • Fig. 10 is another kind of sectional structure schematic diagram along the line I-II in Fig. 2;
  • Fig. 11 is another kind of cross-sectional structure diagram along the line I-II in Fig. 2;
  • Fig. 12 is another kind of sectional structure schematic diagram along the line I-II in Fig. 2;
  • Fig. 13 is another kind of cross-sectional structure diagram along the line I-II in Fig. 2;
  • Fig. 14 is another kind of cross-sectional structure diagram along the line I-II in Fig. 2;
  • Fig. 15 is another structural schematic diagram of a texture recognition substrate provided by an embodiment of the present disclosure.
  • Fig. 16 is a schematic cross-sectional structural view of a dummy device and its electrically connected transistor area shielded by the light-shielding layer in Fig. 15;
  • Fig. 17 is another kind of cross-sectional structure schematic diagram along the line I-II in Fig. 2;
  • Fig. 18 is another kind of sectional structure schematic diagram along the line I-II in Fig. 2;
  • Fig. 19 is another structural schematic diagram of a texture recognition substrate provided by an embodiment of the present disclosure.
  • Fig. 20 is a schematic structural diagram of a texture recognition device provided by an embodiment of the present disclosure.
  • Optical fingerprint recognition is one of the means to realize fingerprint recognition.
  • the principle of optical fingerprint recognition is as follows: when the finger is placed on the fingerprint recognition product, the emitted light from the backlight contained in the fingerprint recognition product shines on the valley and ridge of the finger. , and after being reflected by the valleys and ridges of the finger, it is incident on the photosensitive device (Photo Sensor) contained in the fingerprint identification product. Since the light intensity reflected by the positions of valleys and ridges is different, the photosensitive device generates different electrical signals according to the above-mentioned difference in reflected light intensity to realize fingerprint recognition.
  • the transistor controlling the photosensitive device will cause relatively large lateral noise (that is, the noise caused by the gate of the transistor) when it is frequently switched, and this lateral noise will seriously affect the quality of fingerprint imaging; at the same time, when the transistor is illuminated by light, it will also cause Illumination noise, which also affects the quality of fingerprint imaging.
  • fingerprint recognition products are divided into photosensitive area (AA) and light-shielding area (Dummy) in related technologies, and the light-shielding metal layer is used to control the light-shielding area.
  • the photosensitive device, as well as the transistors in the photosensitive area and the light shielding area are shielded. Since the blocked transistor does not receive light, the influence of light noise on the transistor is directly filtered; in addition, since the photosensitive device in the light-shielding area does not perform photoelectric conversion, the output current of the light-shielding area is caused by the lateral noise of the transistor. Based on this, the output current of the photosensitive device in the shading area can be used as a reference value to calibrate the output current of the photosensitive device in the photosensitive area, thus realizing the filtering of lateral noise and illumination noise and improving the quality of fingerprint imaging.
  • the above solutions in the related art will not be affected by the ambient light above, because the light-shielding metal layer has a certain reflectivity, the light emitted from the backlight will be reflected after passing through the light-transmitting area and reaching the light-shielding metal layer. The reflected light reaches the photosensitive device through the scattering of each film layer, so the photosensitive device in the shading area will be affected by the light, resulting in the saturation of the gray scale of the collected image, which cannot accurately reflect the fluctuation of dark state noise.
  • a texture recognition substrate provided by an embodiment of the present disclosure, as shown in FIGS. 1 to 4 , may include:
  • the base substrate 101 includes a photosensitive area AA and a light-shielding area D, and the light-shielding area D is located on at least one side of the photosensitive area AA;
  • a plurality of photosensitive devices 102 are arranged in an array in the photosensitive area AA, and the photosensitive device 102 includes a stacked first electrode 1021, a photoelectric conversion structure 1022, and a second electrode 1023; wherein the photoelectric conversion structure 1022 is electrically connected to the first electrode 1021, The photoelectric conversion structure 1022 is in direct contact with the second electrode 1023;
  • a plurality of dummy devices 103 are arranged in an array in the shading area D, and the dummy devices 103 include a third electrode 1031, an equivalent dielectric layer 1032 and a fourth electrode 1033; wherein, the third electrode 1031 is the same as the first electrode 1021 layer, the fourth electrode 1033 is located on the side of the layer where the second electrode 1023 is located away from the substrate 101, the equivalent dielectric layer 1032 is located between the layer where the third electrode 1031 is located and the layer where the fourth electrode 1033 is located, and the dummy device 103 is configured for no photoelectric conversion.
  • the third electrode 1031, the equivalent dielectric layer 1032 and the fourth electrode 1033 contained in the dummy device 103 are equivalent to the function of capacitance, and do not have the function of photoelectric conversion, so The dummy device 103 will not be affected by any light, so the output current of the dummy device 103 can be used to calibrate the output current of the photosensitive device 102, so as to remove dark state noise and improve the image quality of textures (such as fingerprints, palm prints, etc.).
  • the above-mentioned texture identification substrate may further include: a first insulating layer 104, a flat layer 105, and a second insulating layer 106; wherein, The first insulating layer 104 is located between the equivalent dielectric layer 1032 and the layer where the third electrode 1031 is located, the second insulating layer 106 is located between the equivalent dielectric layer 1032 and the layer where the fourth electrode 1033 is located, and the flat layer 105 is located between the first between the insulating layer 104 and the second insulating layer 106 .
  • the dummy device 103 in order to ensure that the dummy device 103 does not produce the effect of photoelectric conversion, as shown in FIG. 4 to FIG. At least one of the three electrodes 1031 and the fourth electrode 1033 is separated from each other.
  • the second insulating layer 106 fills the second via hole h2, and the surface of the second insulating layer 106 facing away from the base substrate 101 is relatively flat; the equivalent dielectric layer 1032 can pass through the first via hole h1 and the third The electrodes 1031 are in contact, and the equivalent dielectric layer 1032 can be separated from the fourth electrode 1033 by the second insulating layer 106 to ensure that the dummy device 103 does not have the function of photoelectric conversion.
  • the planar layer 105 may include a second via hole h2, and the second insulating layer 106 fills the second via hole h2. hole h2, and the surface of the second insulating layer 106 facing away from the substrate 101 is relatively flat; the equivalent dielectric layer 1032 can be separated from the third electrode 1031 by the first insulating layer 104, and the equivalent dielectric layer 1032 The second insulating layer 106 and the fourth electrode 1033 may be separated from each other to ensure that the dummy device 103 does not have the function of photoelectric conversion.
  • the third electrode 1031 is in contact with each other through the first via hole h1, and the equivalent dielectric layer 1032 can be separated from the fourth electrode 1033 by the flat layer 105 and the second insulating layer 106, so as to ensure that the dummy device 103 does not have photoelectric conversion role.
  • the equivalent dielectric layer 1032 can be separated from the fourth electrode 1033 by the flat layer 105 and the second insulating layer 106 to ensure that the dummy device 103 does not have the function of photoelectric conversion.
  • the second insulating layer 106 may include a third via hole h3, and the fourth electrode 1033 fills the third via hole h3; etc.
  • the effective dielectric layer 1032 can be separated from the third electrode 1031 by the first insulating layer 104, and the equivalent dielectric layer 1032 can be separated from the fourth electrode 1033 by the planar layer 105, so as to ensure that the dummy device 103 does not have photoelectricity. The role of conversion.
  • the dielectric constant of the equivalent dielectric layer 1032 can be It is approximately the same as the dielectric constant of the photoelectric conversion structure 1022 .
  • the photoelectric conversion structure 1022 may be a PN structure, or a PIN structure.
  • the PIN structure includes an N-type semiconductor layer with N-type impurities, an intrinsic semiconductor layer I without impurities, and a P-type semiconductor layer with P-type impurities that are stacked; wherein, the thickness of the intrinsic semiconductor layer I can be It is greater than the thickness of the P-type semiconductor layer and the thickness of the N-type semiconductor layer. Since when the photoelectric conversion structure 1022 is a PIN structure, compared with the thickness of the intrinsic semiconductor layer 1, the thickness of the P-type semiconductor layer and the thickness of the N-type semiconductor layer are small, so the dielectric constant of the intrinsic semiconductor layer 1 can be determined.
  • the dielectric constant of the equivalent dielectric layer 1032 is set, that is, to simplify the design, the dielectric constant of the equivalent dielectric layer 1032 can be approximately equal to the dielectric constant of the intrinsic semiconductor layer 1 .
  • the equivalent dielectric layer 1032 in the above-mentioned texture recognition substrate provided by the embodiments of the present disclosure may be of the same layer and material as the photoelectric conversion structure 1022, or the equivalent dielectric layer 1032 may also be the same layer as the photoelectric conversion structure 1022 The same layer but different materials, the dielectric constant of the equivalent dielectric layer 1032 may be 10 ⁇ 15.
  • the equivalent dielectric layer 1032 Since the equivalent dielectric layer 1032 is separated from at least one of the third electrode 1031 and the fourth electrode 1033, the equivalent dielectric layer 1032 made of the same material or a different material from the photoelectric conversion structure 1022 cannot perform normally. photoelectric conversion. Moreover, by arranging the equivalent dielectric layer 1032 and the photoelectric conversion structure 1022 in the same layer, the number of film layers can be reduced, which is beneficial to the light and thin design of the product. In some embodiments, in the above-mentioned texture identification substrate provided by the embodiments of the present disclosure, as shown in FIG.
  • the third via hole h3, the fourth electrode 1033 fills the third via hole h3; the planar layer 105 can contact the third electrode 1031 through the first via hole h1, and the planar layer 105 can contact the fourth electrode through the third via hole h3 1033 are in contact with each other.
  • the flat layer 105 can be reused as an equivalent dielectric layer 1032. Since the material of the flat layer 105 does not have a photoelectric conversion effect, it can be guaranteed that the dummy device 103 cannot perform photoelectric conversion; and related technologies
  • the planar layer 105 and the equivalent dielectric layer 1032 are multiplexed, which avoids the production of the equivalent dielectric layer 1032 with a single substance, simplifies the manufacturing process, improves the production efficiency, and saves the production cost.
  • the via hole h1 is in contact with the third electrode 1031, and the flat layer 105 can be separated from the fourth electrode 1033 by the second insulating layer 106.
  • the flat layer 105 can be reused as an equivalent dielectric layer 1032, Since the material of the flat layer 105 does not have a photoelectric conversion effect, it can be guaranteed that the dummy device 103 cannot perform photoelectric conversion;
  • the layer 1032 simplifies the manufacturing process, improves the production efficiency, and saves the production cost.
  • the second insulating layer 106 may include a third via hole h3, and the fourth electrode 1033 fills the third via hole h3; flat
  • the layer 105 can be separated from the third electrode 1031 by the first insulating layer 104, and the flat layer 105 can be in contact with the fourth electrode 1033 through the third via hole h3.
  • the flat layer 105 can be multiplexed as Effective dielectric layer 1032, because the material of flat layer 105 does not have photoelectric conversion function, therefore, can guarantee that dummy device 103 can not carry out photoelectric conversion; Making the equivalent dielectric layer 1032 with a single substance simplifies the manufacturing process, improves the production efficiency, and saves the production cost.
  • the flat layer 105 in the above-mentioned texture recognition substrate provided by the embodiments of the present disclosure, as shown in FIG.
  • the second insulating layer 106 is separated from the fourth electrode 1033.
  • the flat layer 105 can be reused as an equivalent dielectric layer 1032. Since the material of the flat layer 105 does not have a photoelectric conversion function, virtual The device 103 cannot perform photoelectric conversion; and the flat layer 105 in the related art is multiplexed with the equivalent dielectric layer 1032, which avoids the single substance production of the equivalent dielectric layer 1032, simplifies the manufacturing process, improves production efficiency, and saves production costs .
  • the second insulating layer 106 can be separated from the third electrode 1031 by the first insulating layer 104, and the second insulating layer 106 can directly contact the fourth electrode 1033.
  • the second insulating layer 106 It can be reused as an equivalent dielectric layer 1032.
  • the material of the second insulating layer 106 does not have a photoelectric conversion function, it can ensure that the dummy device 103 cannot perform photoelectric conversion; and the second insulating layer 106 in the related art is the same as the equivalent
  • the multiplexing of the dielectric layer 1032 avoids the production of the equivalent dielectric layer 1032 with a single substance, simplifies the manufacturing process, improves the production efficiency, and saves the production cost.
  • the first via hole h1 and the second via hole h2 are arranged through, and the second insulating layer 106 can fill the first via hole h1 and the second via hole h2; the second insulating layer 106 can pass through the first via hole h1 and the second via hole h2.
  • the second via hole h2 is in contact with the third electrode 1031, and the second insulating layer 106 can be in direct contact with the fourth electrode 1033.
  • the second insulating layer 106 can be reused as an equivalent dielectric layer 1032, because The material of the second insulating layer 106 does not have a photoelectric conversion effect, therefore, it can be ensured that the dummy device 103 cannot perform photoelectric conversion; and the second insulating layer 106 in the related art is multiplexed with the equivalent dielectric layer 1032, avoiding the production of a single substance, etc.
  • the effective dielectric layer 1032 simplifies the manufacturing process, improves the production efficiency and saves the production cost.
  • a bias line 107 may also be included.
  • the fourth electrode 1033 can be on the same layer and material as the bias line 107
  • the third electrode 1031 can be on the same layer and material as the first electrode 1021, so as to save mask (mask) process and production cost ,Increase productivity.
  • the first insulating layer 104 may include a fourth via hole h4, and the second insulating layer 106 may include The fifth via h5, the flat layer 105 may include a sixth via h6, and the fifth via h5 and the sixth via h6 are arranged through;
  • the photoelectric conversion structure 1022 is electrically connected to the first electrode 1021 through the fourth via hole h4, and the second electrode 1023 is electrically connected to the bias line 107 through the fifth via hole h5 and the sixth via hole h6.
  • the bias voltage line 107 applies a bias voltage to the second electrode 1023, and the light reflected by the finger is converted into carriers by the photoelectric conversion structure 1022, and the electron-hole pairs contained in the carriers are under the action of an electric field Drift to the first electrode 1021 and the second electrode 1023 respectively, and be collected by the first electrode 1021 and the second electrode 1023 to generate a current signal, and then fingerprint identification can be performed according to the current signal.
  • the above texture recognition substrate provided by the embodiments of the present disclosure may further include a light-shielding layer 108, and the light-shielding layer 108 may be located on the base substrate 101 away from the plurality of dummy devices.
  • the light-shielding layer 108 covers at least one row (column/row) of dummy devices 103, so as to prevent the emitted light from the backlight module contained in the texture recognition device from shining on the dummy devices 103 and disturbing the imaging quality.
  • the material of the light-shielding layer 108 can be a material with a large optical density (OD) value (for example, greater than 5) such as black ink, so as to ensure that no light passes through the light-shielding layer 108 and irradiates the dummy device 103 blocked by it. superior.
  • OD optical density
  • the light-shielding layer 108 can be made by screen-printing black ink. Considering the tolerance of the actual screen printing, a row of virtual devices adjacent to the photosensitive area AA can be allowed 103 (that is, a row/column of dummy devices 103 ) is leaked out, so that the light-shielding area D can be shielded to the greatest extent, and the light-sensing area AA is not blocked. That is to say, the light-shielding layer 108 may cover other rows of dummy devices 103 other than the row of dummy devices 103 adjacent to the photosensitive area AA.
  • the above-mentioned texture recognition substrate provided by the embodiments of the present disclosure, as shown in FIG.
  • the light-shielding layer 108 can include the hollow structure that exposes alignment mark 109, so that flexible circuit board (FPC), gate drive chip (Gate IC ) to bind.
  • the metal layer 110 can be located on the side where the fourth electrode 1033 is located away from the base substrate 101, the transistor 111 can be located between the layer where the photoelectric conversion structure 1022 is located and the base substrate 101, and the source and drain of the transistor 111 can be connected to the first electrode 1021 or the third electrode 1031 are electrically connected;
  • the orthographic projection of the light-shielding metal layer 110 on the base substrate 101 covers the orthographic projection of the transistor 111 on the base substrate 101, and the orthographic projection of the light-shielding metal layer 110 on the base substrate 101 is consistent with the dummy device 103 and the photosensitive device 102 on the substrate.
  • the orthographic projections on the base substrate 101 do not overlap each other.
  • the transistor 111 blocked by the light-shielding metal layer 110 does not receive light, the influence of illumination noise on the transistor 111 in the light-shielding area D and the light-sensitive area AA is directly filtered; in addition, since the dummy device 103 in the light-shielding area D does not perform photoelectric conversion, Therefore, the output current of the light-shielding region D is caused by the lateral noise of the transistor 111 . Based on this, the output current of the dummy device 103 in the shading area D can be used as a reference value, and the output current of the photosensitive device 103 in the photosensitive area AA can be calibrated, thus realizing the filtering of lateral noise and illumination noise, and improving fingerprint image quality.
  • the light-shielding metal layer 110 is not provided above the dummy device 103 in the light-shielding area D, in order to prevent the emitted light from the backlight module from reaching the top of the dummy device 103 and being reflected by the light-shielding metal layer 110 to the adjacent photosensitive area AA, so that the photosensitive area AA The edge is too bright, which affects the quality of fingerprint imaging.
  • the shape of the transistor 111 can be an "inverted L" shape, and this design can reduce the capacitance of the transistor 111 in the direction in which the data line 112 extends, thereby reducing noise.
  • the light-shielding metal layer 110 may be in direct contact with the bias line 107 to reduce the resistance of the bias line 107 .
  • the texture recognition substrate may further include: absorbing cut-offs arranged in sequence on the side of the light-shielding metal layer 110 away from the base substrate A film 113 , an optical fiber layer 114 , an electrostatic discharge electrode 115 , a harding coating 116 and an anti-fingerprint film (AF) 117 .
  • absorbing cut-offs arranged in sequence on the side of the light-shielding metal layer 110 away from the base substrate A film 113 , an optical fiber layer 114 , an electrostatic discharge electrode 115 , a harding coating 116 and an anti-fingerprint film (AF) 117 .
  • the wavelength transmitted by the absorbing cut-off film 113 needs to be consistent with the emission wavelength of the light source.
  • a blue light source with relatively high light intensity is preferred.
  • the absorbing cut-off film 113 selectively transmits blue light, and other wavelengths The light is cut off.
  • the transmittance of the absorbing cut-off film 113 to the cut-off wavelength can be less than 3%.
  • the absorbing cut-off film 113 can use blue resin, blue ink, etc., and the present disclosure has no clear limitation on the material, as long as the transmittance meets the requirements.
  • the fiber optic layer 114 can increase the rigidity of the product.
  • the absorbing cut-off film 113 and the optical fiber layer 114 can be bonded and fixed through a transparent optical adhesive (OCA) 118 .
  • OCA transparent optical adhesive
  • the thickness of the transparent optical glue 118 may be less than 25 ⁇ m.
  • the electrostatic discharge electrode 115 can be grounded, thereby improving the antistatic (ESD) capability of the product.
  • the electrostatic discharge electrode 115 can be made of a transparent material such as indium tin oxide (ITO) or indium zinc oxide (IZO), to Improve light transmission efficiency.
  • silicon oxide (SiO 2 ), silicon carbide (SiC) or a combination thereof can be used to make the cured film 116 , so that the overall hardness of the product can reach 9H, which greatly improves the scratch resistance of the product. Since fingers need to touch the product surface repeatedly, fingerprint residues will affect the collection of fingerprints, so an anti-fingerprint film 117 can be coated on the outermost layer of the product to prevent fingerprint residues and improve the fingerprint collection effect.
  • the texture identification substrate provided by the embodiments of the present disclosure, as shown in FIGS. 1 to 14 and FIGS.
  • the protection layer 121 , the light-shielding structure 122 and the grid lines 123 are shown in FIGS. 1 to 14 and FIGS.
  • Those of ordinary skill in the art should understand other essential components of the texture recognition substrate, and will not be repeated here, and should not be used as a limitation to the present disclosure.
  • an embodiment of the present disclosure also provides a texture recognition device, as shown in FIG. 19 and FIG. 20 , which may include a texture recognition substrate 001 and a backlight module 002.
  • the texture recognition substrate 001 is the above-mentioned texture recognition substrate.
  • the texture recognition substrate 001 is located on the light emitting side of the backlight module 002 .
  • the implementation of the texture recognition device provided by the embodiment of the present invention can refer to the implementation of the above-mentioned texture recognition substrate provided by the embodiment of the present invention. Repeated points will not be repeated.
  • the above-mentioned texture recognition device may further include a driver chip (FPGA) 003, and the driver chip 003 may be located in the backlight module 002 away from the texture.
  • FPGA driver chip
  • One side of the recognition substrate 001 is electrically connected to the driving chip 003 and the backlight module 002 and the texture recognition substrate 001 respectively.
  • the driver chip 003 controls the readout circuit (ROIC), the flexible circuit board (FPC) and the gate driver chip (Gate IC) of the texture recognition substrate 001, thereby driving the photosensitive device 102 and the dummy device 103 to work, while the backlight
  • the module 002 is also regulated by the driver chip 003, and outputs different light intensities.
  • the emitted light from the backlight module 002 reaches the finger F through the texture identification substrate 001, and the reflected light from the finger F enters the photoelectric conversion structure 1022 and is converted into an electrical signal, thereby realizing the recognition of the valleys and ridges of the fingerprint.
  • the above-mentioned texture recognition device may further include a casing 004, which surrounds the driver chip 003, the backlight module 002 and the texture recognition substrate. 001, realize the protection function of the driver chip 003, the backlight module 002 and the texture recognition substrate 001.
  • the housing 004 is in contact with the light-shielding area D of the texture recognition substrate 001, that is, the photosensitive area AA of the texture recognition substrate 001 is in a window-open state to ensure that the photosensitive area AA receives the reflection of the fingerprint Light, but also to prevent the interference of ambient light.
  • the housing 004 can be bonded to the light-shielding area D of the texture identification substrate 001 through a black sealant 005 .
  • the sum h of the thicknesses of the substrate 001 may be 6mm-10mm.
  • the prism-type optical fingerprint collector is widely used in the market. After the emitted light of the backlight is irradiated through the prism to the finger and is reflected, the reflected light of the finger is irradiated again through the prism to the photosensitive device PS for photoelectric conversion, thereby realizing fingerprint recognition.
  • this prism type optical fingerprint collector can identify fingerprints under strong light, but it is bulky and not easy to carry.
  • the thickness of the above-mentioned pattern recognition device provided by the embodiment of the present disclosure is between 6 mm and 10 mm, which is 10 times lower than that of the existing prism-type optical fingerprint collector, and has portability.
  • the brightness adjustable space of the backlight module 002 and the area of the photoelectric conversion structure 1022 in the present disclosure are large, so the above-mentioned texture recognition device provided in the present disclosure can also perform texture recognition under strong light conditions such as outdoors.
  • the above-mentioned texture recognition substrate and texture recognition device provided by the embodiments of the present disclosure can ensure that the virtual device 103 in the light-shielding area D only collects noise in the dark state, and is not affected by the emission of ambient light and the backlight module.
  • the influence of light is beneficial to achieve noise reduction in various application environments and improve the quality of fingerprint imaging.

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Abstract

本公开提供的纹路识别基板及纹路识别装置，包括衬底基板，包括感光区和遮光区，遮光区位于感光区的至少一侧；多个光敏器件，在感光区阵列排布，光敏器件包括层叠设置的第一电极、光电转换结构和第二电极；其中，光电转换结构与第一电极电连接，光电转换结构与第二电极直接接触；多个虚拟器件，在遮光区阵列排布，虚拟器件包括第三电极、等效介电层和第四电极；其中，第三电极与第一电极同层，第四电极位于第二电极所在层背离衬底基板的一侧，等效介电层位于第三电极所在层与第四电极所在层之间，虚拟器件被配置为不进行光电转换。

Description

纹路识别基板及纹路识别装置 技术领域
本公开涉及纹路识别技术领域，尤其涉及一种纹路识别基板及纹路识别装置。
背景技术
随着信息行业的高速发展，生物识别技术受到了越来越广泛的应用，特别地，由于皮肤纹路例如指纹或者掌纹的唯一性，便于进行用户身份确认，因此，纹路识别技术已经广泛应用在移动终端、智能家居等多个领域，为用户信息提供安全保障。
发明内容
本公开实施例提供了一种纹路识别基板及纹路识别装置，具体方案如下：
一方面，本公开实施例提供了一种纹路识别基板，包括：
衬底基板，包括感光区和遮光区，所述遮光区位于所述感光区的至少一侧；
多个光敏器件，在所述感光区阵列排布，所述光敏器件包括层叠设置的第一电极、光电转换结构和第二电极；其中，所述光电转换结构与所述第一电极电连接，所述光电转换结构与所述第二电极直接接触；
多个虚拟器件，在所述遮光区阵列排布，所述虚拟器件包括第三电极、等效介电层和第四电极；其中，所述第三电极与所述第一电极同层，所述第四电极位于所述第二电极所在层背离所述衬底基板的一侧，所述等效介电层位于所述第三电极所在层与所述第四电极所在层之间，所述虚拟器件被配置为不进行光电转换。
可选地，在本公开实施例提供的上述纹路识别基板中，还包括：第一绝 缘层、平坦层和第二绝缘层；其中，
所述第一绝缘层位于所述等效介电层与所述第三电极所在层之间，所述第二绝缘层位于所述等效介电层与所述第四电极所在层之间，所述平坦层位于所述第一绝缘层与所述第二绝缘层之间。
可选地，在本公开实施例提供的上述纹路识别基板中，所述等效介电层与所述第三电极、所述第四电极中的至少之一相互隔开。
可选地，在本公开实施例提供的上述纹路识别基板中，在所述遮光区，所述第一绝缘层包括第一过孔，所述平坦层包括第二过孔，所述第二绝缘层填充所述第二过孔；
所述等效介电层通过所述第一过孔与所述第三电极接触，且所述等效介电层通过所述第二绝缘层与所述第四电极相互隔开。
可选地，在本公开实施例提供的上述纹路识别基板中，在所述遮光区，所述平坦层包括第二过孔，所述第二绝缘层填充所述第二过孔；
所述等效介电层通过所述第一绝缘层与所述第三电极相互隔开，且所述等效介电层通过所述第二绝缘层与所述第四电极相互隔开。
可选地，在本公开实施例提供的上述纹路识别基板中，在所述遮光区，所述第一绝缘层包括第一过孔；
所述等效介电层通过所述第一过孔与所述第三电极接触，且所述等效介电层通过所述平坦层、所述第二绝缘层与所述第四电极相互隔开。
可选地，在本公开实施例提供的上述纹路识别基板中，所述等效介电层通过所述第一绝缘层与所述第三电极相互隔开，且所述等效介电层通过所述平坦层、所述第二绝缘层与所述第四电极相互隔开。
可选地，在本公开实施例提供的上述纹路识别基板中，在所述遮光区，所述第二绝缘层包括第三过孔，所述第四电极填充所述第三过孔；
所述等效介电层通过所述第一绝缘层与所述第三电极相互隔开，且所述等效介电层通过所述平坦层与所述第四电极相互隔开。
可选地，在本公开实施例提供的上述纹路识别基板中，所述等效介电层 的介电常数与所述光电转换结构的介电常数大致相同。
可选地，在本公开实施例提供的上述纹路识别基板中，所述等效介电层与所述光电转换结构同层、同材料。
可选地，在本公开实施例提供的上述纹路识别基板中，所述等效介电层与所述光电转换结构同层、但材料不同，所述等效介电层的介电常数为10-15。
可选地，在本公开实施例提供的上述纹路识别基板中，在所述遮光区，所述第一绝缘层包括第一过孔，所述第二绝缘层包括第三过孔，所述第四电极填充所述第三过孔；
所述平坦层通过所述第一过孔与所述第三电极相互接触，且所述平坦层通过所述第三过孔与所述第四电极相互接触。
可选地，在本公开实施例提供的上述纹路识别基板中，在所述遮光区，所述第一绝缘层包括第一过孔；
所述平坦层通过所述第一过孔与所述第三电极相互接触，所述平坦层通过所述第二绝缘层与所述第四电极相互隔开。
可选地，在本公开实施例提供的上述纹路识别基板中，在所述遮光区，所述第二绝缘层包括第三过孔，所述第四电极填充所述第三过孔；
所述平坦层通过所述第一绝缘层与所述第三电极相互隔开，且所述平坦层通过所述第三过孔与所述第四电极相互接触。
可选地，在本公开实施例提供的上述纹路识别基板中，在所述遮光区，所述平坦层通过所述第一绝缘层与所述第三电极相互隔开，且所述平坦层通过所述第二绝缘层与所述第四电极相互隔开。
可选地，在本公开实施例提供的上述纹路识别基板中，所述平坦层复用为所述等效介电层。
可选地，在本公开实施例提供的上述纹路识别基板中，在所述遮光区，所述平坦层包括第二过孔，所述第二绝缘层填充所述第二过孔；
所述第二绝缘层通过所述第一绝缘层与所述第三电极相互隔开，且所述第二绝缘层与所述第四电极直接接触。
可选地，在本公开实施例提供的上述纹路识别基板中，在所述遮光区，所述第一绝缘层包括第一过孔，所述平坦层包括第二过孔，所述第一过孔与所述第二过孔贯通设置，所述第二绝缘层填充所述第一过孔和所述第二过孔；
所述第二绝缘层通过所述第一过孔及所述第二过孔与所述第三电极相互接触，且所述第二绝缘层与所述第四电极直接接触。
可选地，在本公开实施例提供的上述纹路识别基板中，所述第二绝缘层复用为所述等效介电层。
可选地，在本公开实施例提供的上述纹路识别基板中，还包括偏压线，所述偏压线位于所述第二绝缘层背离所述衬底基板的一侧；
所述第四电极与所述偏压线同层、同材料，所述第三电极与所述第一电极同材料。
可选地，在本公开实施例提供的上述纹路识别基板中，还包括遮光层，所述遮光层位于所述衬底基板背离所述多个虚拟器件所在层的一侧，所述遮光层覆盖至少一排所述虚拟器件。
可选地，在本公开实施例提供的上述纹路识别基板中，所述遮光层覆盖与所述感光区相邻的一排所述虚拟器件之外的其他排所述虚拟器件。
可选地，在本公开实施例提供的上述纹路识别基板中，还包括：对位标识，所述对位标识位于所述遮光区；
所述遮光层包括暴露所述对位标识的镂空结构。
可选地，在本公开实施例提供的上述纹路识别基板中，还包括遮光金属层和晶体管，其中，所述遮光金属层位于所述第四电极所在层背离所述衬底基板的一侧，所述晶体管位于所述光电转换结构所在层与所述衬底基板之间，且所述晶体管的源漏极与所述第一电极或所述第三电极电连接；
所述遮光金属层在所述衬底基板上的正投影覆盖所述晶体管在所述衬底基板上的正投影，且所述遮光金属层在所述衬底基板上的正投影与所述虚拟器件及所述光敏器件在所述衬底基板上的正投影互不交叠。
另一方面，本公开实施例提供了一种纹路识别装置，包括背光模组和纹 路识别基板，所述纹路识别基板为上述纹路识别基板，且所述纹路识别基板位于所述背光模组的出光侧。
附图说明
图1为本公开实施例提供的纹路识别基板的一种结构示意图；
图2为图1中Z1或Z2区域的放大结构示意图；
图3为沿图2中的I-II线的一种剖面结构示意图；
图4为沿图2中的I-II线的又一种剖面结构示意图；
图5为沿图2中的I-II线的又一种剖面结构示意图；
图6为沿图2中的I-II线的又一种剖面结构示意图；
图7为沿图2中的I-II线的又一种剖面结构示意图；
图8为沿图2中的I-II线的又一种剖面结构示意图；
图9为沿图2中的I-II线的又一种剖面结构示意图；
图10为沿图2中的I-II线的又一种剖面结构示意图；
图11为沿图2中的I-II线的又一种剖面结构示意图；
图12为沿图2中的I-II线的又一种剖面结构示意图；
图13为沿图2中的I-II线的又一种剖面结构示意图；
图14为沿图2中的I-II线的又一种剖面结构示意图；
图15为本公开实施例提供的纹路识别基板的又一种结构示意图；
图16为图15中遮光层遮挡的一个虚拟器件及其电连接的晶体管所在区域的一种剖面结构示意图；
图17为沿图2中的I-II线的又一种剖面结构示意图；
图18为沿图2中的I-II线的又一种剖面结构示意图；
图19为本公开实施例提供的纹路识别基板的又一种结构示意图；
图20为本公开实施例提供的纹路识别装置的结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。需要注意的是，附图中各图形的尺寸和形状不反映真实比例，目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其它实施例，都属于本公开保护的范围。
除非另作定义，此处使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开说明书以及权利要求书中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“内”、“外”、“上”、“下”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
光学式指纹识别是实现指纹识别的手段之一，光学式指纹识别的原理如下：当手指置于指纹识别产品上方时，指纹识别产品所含背光源的发射光线照射到手指的谷和脊的位置，并经手指的谷和脊的反射后再入射到指纹识别产品所含光敏器件(Photo Sensor)上。由于谷和脊的位置反射的光强不同，光敏器件根据上述反射光强的差异生成不同电信号，实现指纹识别。
然而，控制光敏器件的晶体管在频繁开关时会引起比较大的横向噪声(即晶体管的栅极引起的噪声)，而该横向噪声会严重影响指纹成像质量；同时，晶体管受到光线照射时也会引起光照噪声，该光照噪声同样会影响指纹成像质量。
为了解决横向噪声和光照噪声较大而引起的指纹成像质量较差的问题， 相关技术中将指纹识别产品分为感光区(AA)和遮光区(Dummy)，并利用遮光金属层对遮光区的光敏器件、以及感光区和遮光区的晶体管进行遮挡。由于被遮挡的晶体管没有接受到光线，因而直接滤除了晶体管上的光照噪声影响；另外，由于遮光区的光敏器件不进行光电转换，因此遮光区输出电流是由晶体管的横向噪声引起的。基于此，可以将遮光区内光敏器件的输出电流作为基准值，对感光区内光敏器件的输出电流进行校准，这样就实现了对横向噪声和光照噪声的滤除，提高了指纹成像质量。
虽然相关技术中的上述方案不会受上方环境光的影响，但是由于遮光金属层具有一定的反射率，背光源的发射光线经过透光区域到达遮光金属层后会被反射下来，遮光金属层的反射光经过各个膜层的散射到达光敏器件，这样遮光区的光敏器件就会受到光线影响，导致采集图像的灰阶饱和，不能准确反应暗态噪声的波动。
为了至少解决相关技术中存在的上述技术问题，本公开实施例提供的一种纹路识别基板，如图1至图4所示，可以包括：
衬底基板101，包括感光区AA和遮光区D，遮光区D位于感光区AA的至少一侧；
多个光敏器件102，在感光区AA阵列排布，光敏器件102包括层叠设置的第一电极1021、光电转换结构1022和第二电极1023；其中，光电转换结构1022与第一电极1021电连接，光电转换结构1022与第二电极1023直接接触；
多个虚拟(dummy)器件103，在遮光区D阵列排布，虚拟器件103包括第三电极1031、等效介电层1032和第四电极1033；其中，第三电极1031与第一电极1021同层，第四电极1033位于第二电极1023所在层背离衬底基板101的一侧，等效介电层1032位于第三电极1031所在层与第四电极1033所在层之间，虚拟器件103被配置为不进行光电转换。
在本公开实施例提供的上述纹路识别基板中，由虚拟器件103所含的第三电极1031、等效介电层1032和第四电极1033相当于电容的作用，并不具 备光电转换作用，因此虚拟器件103不会受到任何光线的影响，从而可以利用虚拟器件103的输出电流来校准光敏器件102的输出电流，以此来去除暗态噪声，提升纹路(例如指纹、掌纹等)图像质量。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图3至图14所示，还可以包括：第一绝缘层104、平坦层105和第二绝缘层106；其中，第一绝缘层104位于等效介电层1032与第三电极1031所在层之间，第二绝缘层106位于等效介电层1032与第四电极1033所在层之间，平坦层105位于第一绝缘层104与第二绝缘层106之间。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，为了保证虚拟器件103不产生光电转换的效果，如图4至图8所示，可以设置等效介电层1032与第三电极1031、第四电极1033中的至少之一相互隔开。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图4所示，在遮光区S，第一绝缘层104可以包括第一过孔h1，平坦层105可以包括第二过孔h2，第二绝缘层106填充第二过孔h2，且第二绝缘层106背离衬底基板101一侧的表面较平整；等效介电层1032可以通过第一过孔h1与第三电极1031接触，且等效介电层1032可以通过第二绝缘层106与第四电极1033相互隔开，以保证虚拟器件103不具备光电转换的作用。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图5所示，在遮光区D，平坦层105可以包括第二过孔h2，第二绝缘层106填充第二过孔h2，且第二绝缘层106背离衬底基板101一侧的表面较平整；等效介电层1032可以通过第一绝缘层104与第三电极1031相互隔开，且等效介电层1032可以通过第二绝缘层106与第四电极1033相互隔开，以保证虚拟器件103不具备光电转换的作用。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图6所示，在遮光区D，第一绝缘层104可以包括第一过孔h1，等效介电层1032可以通过第一过孔h1与第三电极1031相互接触，且等效介电层1032可以通过平坦层105及第二绝缘层106与第四电极1033相互隔开，以保证虚拟器件 103不具备光电转换的作用。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图7所示，在遮光区D，等效介电层1032可以通过第一绝缘层104与第三电极1031相互隔开，且等效介电层1032可以通过平坦层105及第二绝缘层106与第四电极1033相互隔开，以保证虚拟器件103不具备光电转换的作用。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图8所示，第二绝缘层106可以包括第三过孔h3，第四电极1033填充第三过孔h3；等效介电层1032可以通过第一绝缘层104与第三电极1031相互隔开，且等效介电层1032可以通过平坦层105与第四电极1033相互隔开，以保证虚拟器件103不具备光电转换的作用。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，为了使得虚拟器件103的暗态噪声与光敏器件102的暗态噪声基本相同，等效介电层1032的介电常数可以与光电转换结构1022的介电常数大致相同。
另外，在一些实施例中，光电转换结构1022可以为PN结构，还可以为PIN结构。具体的，PIN结构包括层叠设置的具有N型杂质的N型半导体层、不具有杂质的本征半导体层I、以及具有P型杂质的P型半导体层；其中，本征半导体层I的厚度可以大于P型半导体层的厚度和N型半导体层的厚度。由于在光电转换结构1022为PIN结构时，相较于本征半导体层I的厚度，P型半导体层的厚度和N型半导体层的厚度均较小，因此可以本征半导体层I的介电常数为基准，设置等效介电层1032的介电常数，也就是说，为简化设计，等效介电层1032的介电常数可以大致等于本征半导体层I的介电常数。
需要说明的是，在本公开实施例提供的上述纹路识别基板中，由于工艺条件的限制或测量等其他因素的影响，上述“大致”可能会完全等同，也可能会有一些偏差，因此上述特征之间“大致”的关系只要满足误差(例如上下10％的浮动)允许，均属于本公开的保护范围。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中等效介电层1032可以与光电转换结构1022同层、同材料，或者，等效介电层1032还 可以与光电转换结构1022同层、但材料不同，等效介电层1032的介电常数可以为10-15。
由于等效介电层1032与第三电极1031、第四电极1033中的至少之一相互隔开，因此，与光电转换结构1022同材料或不同材料制作的等效介电层1032均无法正常进行光电转换。并且，通过设置等效介电层1032与光电转换结构1022同层，可以减少膜层数量，利于产品的轻薄化设计。在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图9所示，在遮光区D，第一绝缘层104可以包括第一过孔h1，第二绝缘层106可以包括第三过孔h3，第四电极1033填充第三过孔h3；平坦层105可以通过第一过孔h1与第三电极1031相互接触，且平坦层105可以通过第三过孔h3与第四电极1033相互接触，在此情况下，平坦层105可以复用为等效介电层1032，由于平坦层105的材料不具备光电转换作用，因此，可以保证虚拟器件103不能进行光电转换；并且相关技术中的平坦层105与等效介电层1032复用，避免了单质制作等效介电层1032，简化了制作工艺，提高了生产效率，节约了生产成本。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图10所示，在遮光区D，第一绝缘层104可以包括第一过孔h1，平坦层105可以通过第一过孔h1与第三电极1031相互接触，且平坦层105可以通过第二绝缘层106与第四电极1033相互隔开，在此情况下，平坦层105可以复用为等效介电层1032，由于平坦层105的材料不具备光电转换作用，因此，可以保证虚拟器件103不能进行光电转换；并且相关技术中的平坦层105与等效介电层1032复用，避免了单质制作等效介电层1032，简化了制作工艺，提高了生产效率，节约了生产成本。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图11所示，第二绝缘层106可以包括第三过孔h3，第四电极1033填充第三过孔h3；平坦层105可以通过第一绝缘层104与第三电极1031相互隔开，且平坦层105可以通过第三过孔h3与第四电极1033相互接触，在此情况下，平坦层105可以复用为等效介电层1032，由于平坦层105的材料不具备光电转换 作用，因此，可以保证虚拟器件103不能进行光电转换；并且相关技术中的平坦层105与等效介电层1032复用，避免了单质制作等效介电层1032，简化了制作工艺，提高了生产效率，节约了生产成本。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图12所示，平坦层105可以通过第一绝缘层104与第三电极1031相互隔开，且平坦层105可以通过第二绝缘层106与第四电极1033相互隔开，在此情况下，平坦层105可以复用为等效介电层1032，由于平坦层105的材料不具备光电转换作用，因此，可以保证虚拟器件103不能进行光电转换；并且相关技术中的平坦层105与等效介电层1032复用，避免了单质制作等效介电层1032，简化了制作工艺，提高了生产效率，节约了生产成本。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图13所示，在遮光区D，平坦层105可以包括第二过孔h2，第二绝缘层106可以填充第二过孔h2；第二绝缘层106可以通过第一绝缘层104与第三电极1031相互隔开，且第二绝缘层106可以与第四电极1033直接接触，在此情况下，第二绝缘层106可以复用为等效介电层1032，由于第二绝缘层106的材料不具备光电转换作用，因此，可以保证虚拟器件103不能进行光电转换；并且相关技术中的第二绝缘层106与等效介电层1032复用，避免了单质制作等效介电层1032，简化了制作工艺，提高了生产效率，节约了生产成本。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图14所示，在遮光区D，第一绝缘层104可以包括第一过孔h1，平坦层105可以包括第二过孔h2，第一过孔h1与第二过孔h2贯通设置，第二绝缘层106可以填充第一过孔h1和第二过孔h2；第二绝缘层106可以通过第一过孔h1及第二过孔h2与第三电极1031相互接触，且第二绝缘层106可以与第四电极1033直接接触，在此情况下，第二绝缘层106可以复用为等效介电层1032，由于第二绝缘层106的材料不具备光电转换作用，因此，可以保证虚拟器件103不能进行光电转换；并且相关技术中的第二绝缘层106与等效介电层1032复用，避免了单质制作等效介电层1032，简化了制作工艺，提高了生产效率， 节约了生产成本。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图3至图14所示，还可以包括偏压线107，该偏压线107位于第二绝缘层106背离衬底基板101的一侧，第四电极1033可以与偏压线107同层、同材料，第三电极1031可以与第一电极1021同层、同材料，以节省掩膜(mask)工艺，节约生产成本，提高生产效率。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图3所示，在感光区AA，第一绝缘层104可以包括第四过孔h4，第二绝缘层106可以包括第五过孔h5，平坦层105可以包括第六过孔h6，并且第五过孔h5与第六过孔h6贯通设置；
光电转换结构1022通过第四过孔h4与第一电极1021电连接，第二电极1023通过第五过孔h5及第六过孔h6与偏压线107电连接。
在具体实施时，偏压线107为第二电极1023加载偏置电压，手指的反射光线被光电转换结构1022转换为载流子，该载流子所含的电子-空穴对在电场作用下分别向第一电极1021和第二电极1023漂移，并被第一电极1021和第二电极1023收集从而产生电流信号，进而可根据电流信号进行指纹识别。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图15和图16所示，还可以包括遮光层108，该遮光层108可以位于衬底基板101背离多个虚拟器件103所在层的一侧，遮光层108覆盖至少一排(列/行)虚拟器件103，以防止纹路识别装置所含背光模组的发射光线照射至虚拟器件103上而干扰成像质量。
在一些实施例中，遮光层108的材料可以为黑色油墨等光密度(OD)值较大(例如大于5)的材料，以保证没有光线透过遮光层108照射至被其遮挡的虚拟器件103上。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，可通过丝印黑色油墨的方式制作遮光层108，考虑到实际丝印的公差，可允许感光区AA相邻的一排虚拟器件103(即一行/列虚拟器件103)漏出，这样可以做大 限度的将遮光区D进行遮挡，且不遮挡感光区AA。也就是说，遮光层108可以覆盖与感光区AA相邻的一排虚拟器件103之外的其他排虚拟器件103。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图15所示，还可以包括：对位标识109，该对位标识109位于遮光区D，通常用于绑定柔性电路板(FPC)、栅极驱动芯片(Gate IC)；遮光层108可以包括暴露对位标识109的镂空结构，以便于在后续工艺中对柔性电路板(FPC)、栅极驱动芯片(Gate IC)进行绑定。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图3至图14、图16和图18所示，还可以包括遮光金属层110和晶体管111，其中，所述遮光金属层110可以位于第四电极1033所在层背离衬底基板101的一侧，晶体管111可以位于光电转换结构1022所在层与衬底基板101之间，且晶体管111的源漏极可以与第一电极1021或第三电极1031电连接；
遮光金属层110在衬底基板101上的正投影覆盖晶体管111在衬底基板101上的正投影，且遮光金属层110在衬底基板101上的正投影与虚拟器件103及光敏器件102在衬底基板101上的正投影互不交叠。
由于被遮光金属层110遮挡的晶体管111没有接受到光线，因而直接滤除了遮光区D和感光区AA内晶体管111上的光照噪声影响；另外，由于遮光区D的虚拟器件103不进行光电转换，因此遮光区D输出电流是由晶体管111的横向噪声引起的。基于此，可以将遮光区D内虚拟器件103的输出电流作为基准值，对感光区AA内光敏器件103的输出电流进行校准，这样就实现了对横向噪声和光照噪声的滤除，提高了指纹成像质量。
另外，遮光区D内虚拟器件103的上方未设置遮光金属层110，是为了防止背光模组的发射光线到达虚拟器件103的上方被遮光金属层110反射至邻近的感光区AA，使得感光区AA边缘过亮，而影响指纹成像质量。
在一些实施例中，如图2所示，晶体管111的形状可以为“倒L”型，这种设计可以降低晶体管111在数据线112延伸方向上的电容，从而降低噪声。另外，如图3所示，遮光金属层110可以与偏压线107直接接触，以降低偏 压线107的电阻。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图17和图18所示，还可以包括：在遮光金属层110背离衬底基板的一侧依次设置的吸收型截止膜113、光纤层114、静电释放电极115、硬化膜(harding coating)116和防指纹膜(AF)117。
值得注意的是，吸收型截止膜113透过的波长需要与光源的发射波长一致，本公开中优选光强较大的蓝光光源，相应地，吸收型截止膜113选择性透过蓝光，其他波长的光线被截止，较佳地，吸收型截止膜113对截止波长的透过率可以小于3％。在一些实施例中，吸收型截止膜113可以使用蓝色树脂、蓝色油墨等，本公开对材料没有明确的限定，只要保证透过率满足要求即可。
另外，光纤层114可增大产品的硬度。在具体实施时，可通过透明光学胶(OCA)118将吸收型截止膜113与光纤层114贴合固定。可选地，透明光学胶118的厚度可以小于25μm。静电释放电极115可以接地，从而提升产品的抗静电(ESD)能力，可选地，静电释放电极115可以采用由透明材料例如铟锡氧化物(ITO)或铟锌氧化物(IZO)制作，以提高光透射效率。在具体实施，可以采用氧化硅(SiO 2)、碳化硅(SiC)或其组合制作硬化膜116，这样能够使产品整体硬度达到9H，极大地提高产品的抗划伤能力。由于手指需要反复触摸产品表面，指纹残留会影响指纹的采集，因此可以在产品的最表层镀一层防指纹膜117，防止指纹残留，提高指纹采集效果。
在一些实施例中，在本公开实施例提供的上述纹路识别基板中，如图1至图14、如图16至图18所示，还可以包括：栅绝缘层119、第二平坦层120、保护层121、遮光结构122和栅线123。对于纹路识别基板中其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本公开的限制。
基于同一发明构思，本公开实施例还提供了一种纹路识别装置，如图19和图20所示，可以包括纹路识别基板001和背光模组002，该纹路识别基板 001为上述纹路识别基板，且该纹路识别基板001位于背光模组002的出光侧。
由于该纹路识别装置解决问题的原理与上述纹路识别基板001解决问题的原理相似，因此，本发明实施例提供的该纹路识别装置的实施可以参见本发明实施例提供的上述纹路识别基板的实施，重复之处不再赘述。
在一些实施例中，在本公开实施例提供的上述纹路识别装置中，如图19和图20所示，还可以包括驱动芯片(FPGA)003，该驱动芯片003可以位于背光模组002背离纹路识别基板001的一侧，且驱动芯片003与背光模组002、纹路识别基板001分别电连接。在具体实施时，驱动芯片003控制纹路识别基板001的读出电路(ROIC)、柔性电路板(FPC)以及栅极驱动芯片(Gate IC)，从而驱动光敏器件102和虚拟器件103工作，同时背光模组002也是受驱动芯片003调控，输出不同的光强。背光模组002的发射光线透过纹路识别基板001到达手指F，手指F的反射光线进入光电转换结构1022后，被转换为电信号，从而实现指纹谷脊的识别。
在一些实施例中，在本公开实施例提供的上述纹路识别装置中，如图19和图20所示，还可以包括外壳004，该外壳004包围驱动芯片003、背光模组002和纹路识别基板001，实现对驱动芯片003、背光模组002和纹路识别基板001的保护作用。并且在纹路识别基板001背离背光模组002的一侧，外壳004与纹路识别基板001的遮光区D接触，即纹路识别基板001的感光区AA是开窗状态，保证感光区AA接收指纹的反射光线，同时也可以防止四周环境光线的干扰。在具体实施时，外壳004可以通过黑色框胶005与纹路识别基板001的遮光区D粘结。
在一些实施例中，在本公开实施例提供的上述纹路识别装置中，如图20所示，在由背光模组002指向纹路识别基板001的方向上，外壳004、背光模组002和纹路识别基板001的厚度之和h可以为6mm-10mm。
目前在市场普遍使用的是棱镜式光学指纹采集器，背光源的发射光线透过棱镜照射至手指被反射后，手指的反射光线再次透过棱镜照射至光敏器件PS进行光电转换，从而实现指纹识别，这种棱镜式光学指纹采集器能够在强 光下识别指纹，但是体积大，不便于携带。本公开实施例提供的上述纹路识别装置的厚度在6mm-10mm之间，与现有棱镜式光学指纹采集器的厚度降低了10倍，具有便携性。并且，本公开中背光模组002的亮度可调空间、及光电转换结构1022的面积均较大，因此本公开提供的上述纹路识别装置也可以在室外等强光条件下进行纹路识别。
由以上描述可以看出，本公开实施例提供的上述纹路识别基板及纹路识别装置，可以保证遮光区D内的虚拟器件103只收集暗态的噪声，而不受环境光和背光模组的发射光线的影响，有利于实现在各种应用环境下的降噪，提高指纹成像的质量。
显然，本领域的技术人员可以对本发明实施例进行各种改动和变型而不脱离本发明实施例的精神和范围。这样，倘若本发明实施例的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (25)

  1. 一种纹路识别基板，其中，包括：
    衬底基板，包括感光区和遮光区，所述遮光区位于所述感光区的至少一侧；
    多个光敏器件，在所述感光区阵列排布，所述光敏器件包括层叠设置的第一电极、光电转换结构和第二电极，其中，所述光电转换结构与所述第一电极电连接，所述光电转换结构与所述第二电极直接接触；
    多个虚拟器件，在所述遮光区阵列排布，所述虚拟器件包括第三电极、等效介电层和第四电极，其中，所述第三电极与所述第一电极同层，所述第四电极位于所述第二电极所在层背离所述衬底基板的一侧，所述等效介电层位于所述第三电极所在层与所述第四电极所在层之间，所述虚拟器件被配置为不进行光电转换。
  2. 如权利要求1所述的纹路识别基板，其中，还包括：第一绝缘层、平坦层和第二绝缘层；其中，
    所述第一绝缘层位于所述等效介电层与所述第三电极所在层之间，所述第二绝缘层位于所述等效介电层与所述第四电极所在层之间，所述平坦层位于所述第一绝缘层与所述第二绝缘层之间。
  3. 如权利要求2所述的纹路识别基板，其中，所述等效介电层与所述第三电极、所述第四电极中的至少之一相互隔开。
  4. 如权利要求3所述的纹路识别基板，其中，在所述遮光区，所述第一绝缘层包括第一过孔，所述平坦层包括第二过孔，所述第二绝缘层填充所述第二过孔；
    所述等效介电层通过所述第一过孔与所述第三电极接触，且所述等效介电层通过所述第二绝缘层与所述第四电极相互隔开。
  5. 如权利要求3所述的纹路识别基板，其中，在所述遮光区，所述平坦层包括第二过孔，所述第二绝缘层填充所述第二过孔；
    所述等效介电层通过所述第一绝缘层与所述第三电极相互隔开，且所述等效介电层通过所述第二绝缘层与所述第四电极相互隔开。
  6. 如权利要求3所述的纹路识别基板，其中，在所述遮光区，所述第一绝缘层包括第一过孔；
    所述等效介电层通过所述第一过孔与所述第三电极接触，且所述等效介电层通过所述平坦层、所述第二绝缘层与所述第四电极相互隔开。
  7. 如权利要求3所述的纹路识别基板，其中，所述等效介电层通过所述第一绝缘层与所述第三电极相互隔开，且所述等效介电层通过所述平坦层、所述第二绝缘层与所述第四电极相互隔开。
  8. 如权利要求3所述的纹路识别基板，其中，在所述遮光区，所述第二绝缘层包括第三过孔，所述第四电极填充所述第三过孔；
    所述等效介电层通过所述第一绝缘层与所述第三电极相互隔开，且所述等效介电层通过所述平坦层与所述第四电极相互隔开。
  9. 如权利要求2-8任一项所述的纹路识别基板，其中，所述等效介电层的介电常数与所述光电转换结构的介电常数大致相同。
  10. 如权利要求9所述的纹路识别基板，其中，所述等效介电层与所述光电转换结构同层、同材料。
  11. 如权利要求9所述的纹路识别基板，其中，所述等效介电层与所述光电转换结构同层、但材料不同，所述等效介电层的介电常数为10-15。
  12. 如权利要求3所述的纹路识别基板，其中，在所述遮光区，所述第一绝缘层包括第一过孔，所述第二绝缘层包括第三过孔，所述第四电极填充所述第三过孔；
    所述平坦层通过所述第一过孔与所述第三电极相互接触，且所述平坦层通过所述第三过孔与所述第四电极相互接触。
  13. 如权利要求2所述的纹路识别基板，其中，在所述遮光区，所述第一绝缘层包括第一过孔；
    所述平坦层通过所述第一过孔与所述第三电极相互接触，且所述平坦层 通过所述第二绝缘层与所述第四电极相互隔开。
  14. 如权利要求2所述的纹路识别基板，其中，在所述遮光区，所述第二绝缘层包括第三过孔，所述第四电极填充所述第三过孔；
    所述平坦层通过所述第一绝缘层与所述第三电极相互隔开，且所述平坦层通过所述第三过孔与所述第四电极相互接触。
  15. 如权利要求2所述的纹路识别基板，其中，在所述遮光区，所述平坦层通过所述第一绝缘层与所述第三电极相互隔开，且所述平坦层通过所述第二绝缘层与所述第四电极相互隔开。
  16. 如权利要求12-15任一项所述的纹路识别基板，其中，所述平坦层复用为所述等效介电层。
  17. 如权利要求2所述的纹路识别基板，其中，在所述遮光区，所述平坦层包括第二过孔，所述第二绝缘层填充所述第二过孔；
    所述第二绝缘层通过所述第一绝缘层与所述第三电极相互隔开，且所述第二绝缘层与所述第四电极直接接触。
  18. 如权利要求2所述的纹路识别基板，其中，在所述遮光区，所述第一绝缘层包括第一过孔，所述平坦层包括第二过孔，所述第一过孔与所述第二过孔贯通设置，所述第二绝缘层填充所述第一过孔和所述第二过孔；
    所述第二绝缘层通过所述第一过孔及所述第二过孔与所述第三电极相互接触，且所述第二绝缘层与所述第四电极直接接触。
  19. 如权利要求17或18所述的纹路识别基板，其中，所述第二绝缘层复用为所述等效介电层。
  20. 如权利要求2-19任一项所述的纹路识别基板，其中，还包括偏压线，所述偏压线位于所述第二绝缘层背离所述衬底基板的一侧；
    所述第四电极与所述偏压线同层、同材料，所述第三电极与所述第一电极同材料。
  21. 如权利要求1-20任一项所述的纹路识别基板，其中，还包括遮光层，所述遮光层位于所述衬底基板背离所述多个虚拟器件所在层的一侧，所述遮 光层覆盖至少一排所述虚拟器件。
  22. 如权利要求21所述的纹路识别基板，其中，所述遮光层覆盖与所述感光区相邻的一排所述虚拟器件之外的其他排所述虚拟器件。
  23. 如权利要求21或22所述的纹路识别基板，其中，还包括：对位标识，所述对位标识位于所述遮光区；
    所述遮光层包括暴露所述对位标识的镂空结构。
  24. 如权利要求21-23任一项所述的纹路识别基板，其中，还包括遮光金属层和晶体管，其中，所述遮光金属层位于所述第四电极所在层背离所述衬底基板的一侧，所述晶体管位于所述光电转换结构所在层与所述衬底基板之间，且所述晶体管的源漏极与所述第一电极或所述第三电极电连接；
    所述遮光金属层在所述衬底基板上的正投影覆盖所述晶体管在所述衬底基板上的正投影，且所述遮光金属层在所述衬底基板上的正投影与所述虚拟器件及所述光敏器件在所述衬底基板上的正投影互不交叠。
  25. 一种纹路识别装置，其中，包括背光模组和纹路识别基板，所述纹路识别基板为如权利要求1-24任一项所述的纹路识别基板，且所述纹路识别基板位于所述背光模组的出光侧。
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