WO2022202493A1 - Printed board, production method for printed board, solid-state imaging device, and electronic device - Google Patents

Abstract

Provided are: a printed board that can avoid electrical short circuiting between through-hole vias caused by migration; a production method for the printed board; a solid-state imaging device; and an electronic device.　This printed board, which is for use in a solid-state imaging device or the like, is configured such that a trench via is bored between through-hole vias that have been bored adjacent to each other, and the trench via and the through-hole vias are filled with a resin, whereby the occurrence of short circuiting between the through-hole vias caused by migration can be prevented.

Description

Printed circuit board, printed circuit board manufacturing method, solid-state imaging device, and electronic equipment

The present disclosure relates to a printed circuit board, a printed circuit board manufacturing method, a solid-state imaging device having the printed circuit board, and an electronic device having the solid-state imaging device.

Conventionally, in the process of manufacturing a printed circuit board, as the wiring pattern becomes finer and multi-layered, copper (Cu), which is a wiring material, diffuses into the insulating layer of the glass fiber base material of the printed circuit board, causing a short circuit between wires. is the problem. A printed circuit board is a three-dimensional electric circuit formed by alternately laminating, for example, an insulating layer made of a glass fiber base material and a wiring layer formed of a copper foil and having a metal pattern formed thereon.

In such a printed circuit board, through holes are bored in places where the inner layers or the outer layers are electrically connected to each other, or between the inner layers or between the outer layers. is connected. These through-hole vias are often used in a state in which they are provided adjacent to each other and different voltages are applied to both to generate an electric field. In such a state of use, a phenomenon called migration may occur in which the copper of the printed circuit board diffuses into the insulating layer. The factors include an electric field, current, temperature, humidity, and the like. In addition, such a phenomenon is caused by the glass fiber exposed on the inner peripheral surface of the through-hole via in the drilling process of the glass fiber-based printed circuit board and the cleaning process (desmear process) for removing the resin residue after the drilling process. When cracks (voids) are generated along the direction of , they tend to occur along the direction of the glass fibers.

When the surface of the insulating layer interposed between adjacent through-hole vias absorbs moisture due to the environment in which the printed circuit board is used, the layer acts as an electrolyte because a DC voltage is normally applied between the through-hole vias. . When an electric field exists between adjacent through-hole vias, an anodic reaction, which is an oxidation reaction that releases electrons, occurs at the interface of the through-hole vias on the anode side of the electric field. As a result, copper ions are eluted from the through-hole via on the anode side.

The eluted copper ions move along the direction of the glass fiber toward the through-hole via on the cathode side due to the Coulomb force and are deposited. Then, dendrites are generated on the substrate surface from the cathode-side through-hole via to the anode-side through-hole via. Also, in the inner layer of the printed circuit board, CAF (Conductive Anodic Filament) is generated along the direction of the glass fibers of the circuit board. Such a phenomenon is called migration. As a result, there is a problem that an electric circuit is formed between the through-hole vias along the direction of the glass fibers of the glass fiber base material, resulting in a short circuit. Details of the migration will be described later.

To address this problem, Patent Document 1 discloses that a diffusion barrier layer for the wiring material is provided to prevent the wiring material from diffusing in the insulating film and causing a short circuit between the wirings, thereby improving reliability. A technique related to a multilayer printed circuit board that allows

In this technology, a multilayer printed circuit board has a copper film wiring pattern and an insulating layer pattern alternately laminated on a substrate body. A copper diffusion barrier layer is formed between the copper film wiring pattern and the insulating layer pattern to suppress diffusion of copper into the insulating layer pattern.
By forming the copper diffusion barrier layer in this way, it is possible to prevent the occurrence of a short circuit between wirings due to the diffusion of copper into the insulating film pattern. Therefore, a highly reliable multilayer printed circuit board can be obtained.

In addition, the insulating film pattern is formed of a photosensitive organic insulating film that has a low dielectric constant (relative dielectric constant of 3.5 or less) and changes the etching characteristics of the light-irradiated portion or the plasma-irradiated portion. In addition, since the dielectric constant is low, the value of the inter-wiring capacitance C is small. Therefore, the signal delay determined by the value of the time constant CR when the resistance of the conductive film is R can be reduced, so that the signal transmission speed of the multilayer printed circuit board can be increased.

In Patent Document 2, a metal electrode is formed on the surface, a non-metallic region made of SiO ₂ is formed by an insulating film, and an insulating film is formed on the outermost surface including the electrode and the non-metallic region. discloses a technique in which two substrates each having a gap formed thereon as a structure for preventing the diffusion of metal in a non-metallic region are bonded together so that the electrodes face each other. The technology can be applied to a semiconductor device, a method for manufacturing a semiconductor device, a CMOS image sensor that is a solid-state imaging device, an imaging device using a solid-state imaging device, and an electronic device.

Japanese Patent Application Laid-Open No. 2001-119149 JP 2016-181531 A

However, the technology related to the multilayer printed circuit board disclosed in Patent Document 1 is not a technology for preventing short-circuiting between through-hole vias, but a technology for preventing short-circuiting between wirings, so the problem to be solved by this technology differs. It is.

The technology related to the semiconductor device, the manufacturing method of the semiconductor device, the solid-state imaging device, the imaging device using the solid-state imaging device, and the electronic device disclosed in Patent Document 2 merely provides a gap, and further countermeasures are taken for the gap. not a thing

Therefore, since the surface forming the void remains exposed, the exposed surface absorbs moisture due to humidity, and there is a risk that insulation performance will deteriorate and deformation such as expansion due to stress accompanying processing will occur.

The present disclosure has been made in view of the above-described problems. It constitutes. By configuring in this way, the cut surface of the glass fiber is not exposed between the through-hole vias, and the printed circuit board, the method for manufacturing the printed circuit board, and the solid-state imaging device that do not lead to an electrical short due to migration. and electronic equipment.

The present disclosure has been made to solve the above-described problems, and a first aspect of the present disclosure includes through-hole vias drilled adjacent to each other, and through-hole vias drilled between the through-hole vias and filled with resin. A printed circuit board having trench vias.

Further, in the first aspect, the trench via may be arranged so as to traverse the glass cloth that is the base material of the printed circuit board.

Further, in the first aspect, the trench vias may be arranged between the through-hole vias that penetrate and connect the wiring patterns in the inner layers of the printed circuit board.

In the first aspect, the trench via may be arranged between the wiring patterns on the outer layer of the printed circuit board or between the through-hole vias that penetrate the wiring patterns on the outer layer and the wiring patterns on the inner layer. .

In the first aspect, the trench via has a shape in plan view such that the width of the trench via is longer than the diameter of the through hole via in a direction perpendicular to a straight line connecting the adjacent through hole vias. It may be formed to be

Further, in the first aspect, between the adjacent through-hole vias, the trench vias surrounding any one of the through-hole vias may be formed.

Further, in the first aspect, between the adjacent through-hole vias, the trench vias surrounding all the through-hole vias may be formed.

Further, in the first mode, the center of the substantially multi-pointed star-shaped or substantially radial trench via is arranged at a substantially intermediate position between the three or more adjacent through-hole vias, and is formed on the peripheral surface of the through-hole via. At the tip of the end of the trench via, the space may be formed so as to fit within a polygon formed by connecting lines perpendicular to the extending direction of the trench via.

Further, in the first aspect, the trench via for insulation may be filled with a resin.

A second aspect thereof includes the steps of drilling through holes for through-hole vias adjacent to the copper-clad laminate, cleaning the through holes, and copper-plating the inner peripheral surfaces of the through holes. forming a trench via through hole between the through hole vias; cleaning the trench via through hole; filling the trench via through hole with a resin; A method of manufacturing a printed circuit board, comprising the steps of: polishing the recessed portion; and forming a wiring pattern on the lid plating of the resin-filled portion and the copper-clad laminate.

A third aspect thereof is a solid-state imaging device including a printed board having through-hole vias drilled adjacently and trench vias drilled between the through-hole vias and filled with resin.

A fourth aspect of the present invention is an electronic device having a solid-state imaging device provided with a printed circuit board having through-hole vias drilled adjacently and trench vias drilled between the through-hole vias and filled with resin. Equipment.

By taking the above aspect, it is possible to prevent an electrical short between through-hole vias due to migration.

According to the present disclosure, a trench via is provided between through-hole vias drilled in a printed circuit board, and the trench via is filled with a resin, so that the cut surface of the glass fiber is formed between the through-hole vias. Therefore, it is possible to provide a printed circuit board, a printed circuit board manufacturing method, a solid-state imaging device, and an electronic device that do not cause an electrical short due to migration.

1 is a cross-sectional view of a solid-state imaging device having a printed circuit board according to the present disclosure; FIG. 4 is a plan view of a color filter of the solid-state imaging device; FIG. FIG. 4 is a cross-sectional view of an inner layer portion explaining migration occurring between through-hole vias drilled in a printed circuit board; 1 is a partially enlarged cross-sectional view of a first embodiment of a printed circuit board according to the present disclosure; FIG. FIG. 4 is a diagram illustrating the process of the first embodiment of the printed circuit board according to the present disclosure; FIG. 2 is a partially enlarged cross-sectional view (Part 1) of the main steps of the printed circuit board according to the present disclosure; FIG. 2 is a partially enlarged cross-sectional view (Part 2) of a main process of a printed circuit board according to the present disclosure; FIG. 3 is a partially enlarged cross-sectional view (No. 3) of a main process of the printed circuit board according to the present disclosure; FIG. 4 is a partially enlarged cross-sectional view (part 4) of the main steps of the printed circuit board according to the present disclosure; FIG. 4 is a partially enlarged cross-sectional view of a second embodiment of a printed circuit board according to the present disclosure; FIG. 4 illustrates a process of a second embodiment of a printed circuit board according to the present disclosure; 1 is a diagram illustrating a first embodiment of a through-hole via of a printed circuit board according to the present disclosure; FIG. FIG. 4 illustrates a second embodiment of a through-hole via in a printed circuit board according to the present disclosure; FIG. 5 is a diagram illustrating a third embodiment of a through-hole via of a printed circuit board according to the present disclosure; FIG. 5 is a diagram illustrating a fourth embodiment of a through-hole via of a printed circuit board according to the present disclosure; FIG. 5 is a diagram illustrating a fifth embodiment of a through-hole via in a printed circuit board according to the present disclosure; 1 is a block diagram illustrating an example of an electronic device having a printed circuit board according to the present disclosure; FIG.

Next, with reference to the drawings, modes for carrying out the present disclosure (hereinafter referred to as "embodiments") will be described in the following order. In the following drawings, the same or similar parts are denoted by the same or similar reference numerals. However, the drawings are schematic, and the dimensional ratios and the like of each part do not necessarily match the actual ones. In addition, it goes without saying that there are portions with different dimensional relationships and ratios between the drawings.
1. Cause of migration 2 . First Embodiment of Printed Circuit Board According to Present Disclosure3. 2. Second Embodiment of Printed Circuit Board According to Present Disclosure; First Embodiment of Trench Via 5 . Second Embodiment of Trench Via 6 . 7. Third Embodiment of Trench Via. 8. Fourth embodiment of trench via; 8. Fifth embodiment of trench via; Configuration example of an electronic device having a printed circuit board according to the present disclosure

<1. Cause of Migration>
Migration will be described in more detail below. Migration includes ion migration and electromigration.
Ion migration is when a voltage is applied between the electrodes of the substrate, the part of the wiring pattern (copper) that becomes the anode side receives electrons, and metal atoms from the surface move away from the moisture and ionization promoting substances contained in the substrate surface and inside the base material. It is a phenomenon in which the metal is eluted into the atmosphere, moves to the cathode side due to the Coulomb force due to the electric field, and deposits the metal due to electron exchange. This tends to occur when the electric field strength is high.

Electromigration, on the other hand, is a process in which, when an electric current is passed through a metal wire, collisions occur between electrons moving in the metal wire and metal atoms, and the metal atoms are gradually transported to the anode side, resulting in the migration of the metal to the cathode side. This is a phenomenon in which a defect occurs, resulting in an open (disconnection), and metal is deposited on the anode side, leading to a short circuit. This tends to occur at high temperatures and high current densities.
Incidentally, the migration that occurs in the printed circuit board is mainly ion migration. An example of ion migration in a printed circuit board will be described below.

As shown in FIG. 4, the printed circuit board 10 includes wiring patterns 12a to 12d, which are conductive layers formed of copper foil 10c, and insulating layers 13a to 13c, which are formed of base materials of glass fiber 10a and epoxy resin 33. It has a structure in which layers are alternately sandwiched. The surface portions of both surfaces of the printed circuit board 10 are called outer layers 35 , and the inner layers are called inner layers 34 . Wiring patterns 12a to 12d are formed on the outer layer 35 and the inner layer 34 by etching the copper foil 10c bonded to the insulating layers 13a to 13c. The printed circuit board 10 is formed by first forming an inner layer 34 and then laminating an outer layer 35 on both sides of the inner layer 34 .

That is, the case of only the inner layer 34 is called a double-sided board. A double-sided board in which outer layers 35 are laminated on both sides is called a four-layer board. Further, a board having outer layers 35 laminated on both sides thereof is called a six-layer board. The same applies hereinafter. As will be understood from this, "n" when calling an n-layer substrate means the number of wiring patterns. The printed circuit board 10 according to the present disclosure is not limited to any particular number of layers. That is, the printed board 10 according to the present disclosure can also be applied to a double-sided board, a multilayer board such as a four-layer board, and the like.

Here, in order to simplify the explanation of the cause of the migration, the cross-sectional view of the inner layer 34 in FIG. 3 and the partially enlarged cross-sectional view of the main process in FIG. 6 will be used as examples.
As shown in FIG. 6A, the copper-clad laminate 31 forming the inner layer 34 is formed by laminating copper foils 10c, 10c on both sides of the insulating layer 13b. The insulating layer 13b is formed by impregnating a glass cloth 10b woven with glass fibers 10a with an epoxy resin 33. As shown in FIG.

The copper clad laminate 31 is drilled with a through hole 30 by a drill 90 as shown in FIG. 6B. Since the insulating layer 13b forming the copper-clad laminate 31 is laminated with the glass fiber 10a, the through hole 30 cuts the glass fiber 10a forming the insulating layer 13b. Therefore, the cut surface of the glass fiber 10a is exposed on the inner peripheral surface of the through hole 30. As shown in FIG.

Moreover, since the glass fiber 10a has a predetermined hardness, it is not easy to cut. Therefore, burrs are likely to form on the cut surfaces, and cracks 32 are generated along the fiber direction on the cut surfaces of the glass fibers 10a. Furthermore, as shown in FIG. 7C, in the cleaning process, a load is applied to the inner peripheral surface of the through-hole 30 in order to remove the residue of the cut epoxy resin 33 and the glass fibers 10a, and similarly the direction of the glass fibers 10a is increased. A minute crack 32 is generated along the .

When a DC voltage is applied between the through- hole vias 14, 14 of the printed circuit board 10, an electric field exists between the adjacent through- hole vias 14, 14. Here, a through-hole via serving as an anode is designated as 14a, and a through-hole via serving as a cathode is designated as 14b (hereinafter, reference numeral 14 indicates simple through-hole vias, and reference numerals 14a and 14b indicate cases having polarity. ). Therefore, when the surfaces of the insulating layers 13a to 13c interposed between the adjacent through- hole vias 14a and 14b absorb moisture due to the usage environment, the layer acts as an electrolyte. Therefore, at the interface of the through-hole via 14a on the anode side of the electric field, an anode reaction that emits electrons, which is an oxidation reaction, occurs. As a result, copper ions are eluted from the through-hole via 14a on the anode side.

The eluted copper ions move along the direction of the glass fiber 10a toward the through-hole via 14b on the cathode side by the Coulomb force and are deposited. As a result, as shown in FIG. 3, a CAF 17 is formed from the through-hole via 14b on the cathode side toward the through-hole via 14a on the anode side. As the CAF 17 expands, an electric circuit is formed between the through- hole vias 14a and 14b, resulting in a short circuit.
As described above, incompatibility due to occurrence of migration occurs.

<2. First Embodiment of Printed Circuit Board According to Present Disclosure>
[Configuration Example of Solid-State Imaging Device Having Printed Circuit Board According to Present Disclosure]
FIG. 1 is a cross-sectional view of a semiconductor device 100 having a printed circuit board 10, such as a solid-state imaging device 101. FIG. A solid-state imaging device 101 such as a CMOS sensor will be described below as an example of the semiconductor device 100 . As shown in FIG. 1, the solid-state imaging device 101 has a sensor substrate 6 bonded onto a printed circuit board 10 . The printed circuit board 10 has a plurality of external connection terminals 9 formed of solder balls for connection to an external circuit on its lower surface.

The sensor substrate 6 is made of single crystal silicon, for example. A pixel region 23 and a peripheral region 24 are provided on the upper surface (surface) of the sensor substrate 6, as shown in FIG. A cover glass 3 is arranged above the sensor substrate 6 so as to face the light receiving portion 21 of the sensor substrate 6 . As shown in FIG. 1, the light receiving portion 21 and the cover glass 3 are coated with a sealing resin 4 so as to surround the periphery of the peripheral region 24 of the light receiving portion 21, and the sensor substrate 6 and the cover glass 3 are coated with the sealing resin. 4 are attached. By bonding the two together in this manner, a cavity portion 8 that is hollow is formed between the sensor substrate 6 and the facing surface of the cover glass 3 .

In a pixel region 23 of the sensor substrate 6, a plurality of pixels 22 are arranged in a matrix in plan view. A collection of these pixels 22 forms a subject image as a whole.
The pixels 22 are photoelectric conversion elements that convert optical signals forming part of an object image formed by an optical system (not shown) into electrical signals. The photoelectric conversion element is, for example, a photodiode, and receives light incident as a subject image on a light receiving surface through an optical system including an external imaging lens, and photoelectrically converts the light to generate a signal charge.

A color filter 25 is formed on the upper surface of each of the plurality of pixels 22 so as to cover each pixel 22 . For example, as shown in the plan view of FIG. 2, the color filters 25 of three primary colors R (red), G (green), and B (blue) are arranged on-chip in a Bayer arrangement. It is formed in an array as a color filter (OCCF: On Chip Color Filter). The arrangement pattern of the color filters 25 is not limited to the Bayer pattern.
Also, an infrared cut filter (IR Cut Filter) 27 may be provided so as to overlap the color filter 25 .

On the upper surface of the color filter 25, a microlens array 26 for each pixel 22 to collect light is provided either directly or via an infrared cut filter 27. The microlens array 26 is configured such that the light transmitted through the cover glass 3, the color filter 25, and the infrared cut filter 27 is received by each pixel 22 and photoelectrically converted.

The peripheral area 24 is an area surrounding the pixel area 23 . A plurality of pads 29 are formed on the upper surface of the peripheral area 24, corresponding to each signal for extracting image signals to the outside. A plurality of pads 11 corresponding to each signal for connection with the outside are arranged in a region surrounding the sensor substrate 6 on the upper surface of the printed circuit board 10 .

The pads 29 provided on the periphery of the peripheral region 24 on the upper surface of the sensor substrate 6 and the pads 11 of the printed circuit board 10 are connected by bonding wires 7 such as gold wires. As shown in FIG. 4, wiring patterns 12b and 12c are formed on the inner layer 34 of the printed circuit board 10, and wiring patterns 12a and 12d are formed on the outer layer 35 thereof. The wiring patterns 12a to 12d are connected via through-hole vias 14 to the pads 11 and the external connection terminals 9 formed of solder balls or the like and arranged on the lower surface of the printed circuit board 10. FIG. Details will be described later.

[Example of method for manufacturing printed circuit board according to the present disclosure]
FIG. 4 is a partially enlarged cross-sectional view of the first embodiment of the printed circuit board 10 according to the present disclosure. Here, the printed circuit board 10 will be described using a so-called four-layer board as an example.

In FIG. 4, the printed circuit board 10 is composed of an inner layer 34 and outer layers 35, 35 laminated on both sides thereof (upper and lower sides in this figure). The inner layer 34 and the outer layers 35, 35 form a sandwich structure in which the wiring patterns 12a, 12b, 12c and 12d and the insulating layers 13a, 13b and 13c are alternately stacked.

The wiring patterns 12a to 12d are conductive layers made of copper foil 10c. As described above, insulating layers 13a, 13b and 13c are arranged between the wiring patterns 12a to 12d, respectively. It forms a structure in which insulating layers 13a to 13c made of material are alternately laminated in a sandwich shape. The wiring patterns 12a to 12d are formed by etching the copper foil 10c or the like to form an electric circuit.

Through- hole vias 14 a and 14 b are provided between the copper foils 10 c and 10 c of the inner layer 34 and filled with resin 16 . Thereby, the wiring patterns 12b and 12c are electrically connected.
A trench via 18 is formed between the through- hole vias 14a and 14b in a direction that traverses the glass fiber 10a, that is, by cutting the glass fiber 10a. Therefore, even if minute cracks 32 are present along the direction of the glass fibers 10a on the outer peripheral surfaces of the through- hole vias 14a and 14b, the provision of the trench vias 18 can prevent the CAF 17 from extending. This can prevent the occurrence of a short circuit between the through- hole vias 14a and 14b due to migration.

Specifically, the printed circuit board 10 is manufactured roughly as shown in the process diagram of FIG. Schematic cross-sections of the printed circuit board 10 in main steps are shown in FIGS. 4 and 6 to 9. FIG.

In manufacturing the printed circuit board 10, as shown in FIG. 6A, for example, a copper foil 10c is laminated on both sides of an insulating layer 13b, which is a glass cloth 10b (glass cloth) impregnated with an epoxy resin 33. A laminated plate 31 is prepared. That is, the copper-clad laminate 31 is formed by impregnating, for example, epoxy resin 33 into a glass cloth 10b woven from glass fibers 10a having high insulating properties as a base material to form an insulating layer 13b. 10c are superimposed and heated and pressed by a press (step S11). The copper-clad laminate 31 thus formed forms the inner layer 34 of the printed circuit board 10 .

Next, as shown in FIG. 6B, in order to connect the copper foils 10c, 10c of the inner layer 34, a drill 90 is used to form through holes 30 for through- hole vias 14a, 14b at predetermined locations between the copper foils 10c, 10c. Punching is performed (step S12).

Then, as shown in FIG. 7C, cutting debris such as the glass fiber 10a and the epoxy resin 33 remaining inside the through-hole 30 is removed by washing (step S13).

Next, as shown in FIG. 7D, copper plating is applied to the inner peripheral surface of the through hole 30 that has been cleaned. Through- hole vias 14a and 14b are thus formed (step S14).
Thus, by providing the through- hole vias 14a, 14b between the copper foils 10c, 10c of the inner layer 34, the copper foils 10c, 10c are electrically connected.

Next, as shown in FIG. 8E, between the through- hole vias 14a and 14b, a trench via 18, which is a through hole 30 with a predetermined diameter, is drilled with a drill 90 (step S15).

Next, in the same manner as shown in FIG. 7C, cutting debris such as the glass fiber 10a and the epoxy resin 33 remaining inside the drilled trench via 18 is removed by washing (step S16).

Next, as shown in FIG. 8F, resin 16 is filled inside the copper-plated through- hole vias 14a, 14b and trench vias 18 (step S17).

When the filling of the resin 16 is completed, the resin 16 filling openings of the through- hole vias 14a, 14b and the trench vias 18 filled with the resin 16 are polished and flattened (step S18).

The top surfaces of the fill ports of the planarized through- hole vias 14a, 14b are cap plated with copper as shown in FIG. 9G. Wiring patterns 12b and 12c are also formed. Here, the wiring patterns 12b and 12c are formed as follows. That is, the wiring patterns 12b and 12c of the inner layer 34 are formed by exposing, developing and etching the copper foils 10c and 10c laminated on both sides of the copper-clad laminate 31 (step S19).
As described above, the second layer 42 and the third layer 43, which are part of the inner layer 34 of the four-layer substrate, are formed. When the solder resist 19 described in step S22 is applied on the second layer 42 and the third layer 43, a double-sided board is obtained. To form a four-layer board, following step 19, steps 20 and subsequent steps are performed.

Next, the insulating layers 13a and 13c are laminated on both upper and lower surfaces of the inner layer 34, and the copper foils 10c and 10c to be the wiring patterns 12a and 12d are laminated on each surface and heated and pressed with a press machine. Thereby, the first layer 41 and the fourth layer 44, which are the outer layers 35, are laminated (step S20).

Next, the wiring patterns 12a and 12d of the first layer 41 and the fourth layer 44 are formed. Specifically, the first layer 41 and the copper foils 10c and 10c that become the fourth layer 44 are bonded to the outer surfaces of the second layer 42 and the third layer 43 that become the inner layer 34 via the insulating layers 13a and 13c, respectively. Then, the wiring patterns 12a and 12d of the outer layer 35 are formed by performing exposure/development and etching.

When connecting the first layer 41 and the second layer 42 and/or the third layer 43 and the fourth layer 44, the copper foil 10c of the first layer 41 and the insulating layer 13a and/or the fourth layer 44 A predetermined portion of the copper foil 10c and the insulating layer 13c is drilled with a drill 90. As shown in FIG. After removing the cutting waste, the connection via 15 is formed by plating the inner peripheral surface of the drilled hole with copper. As a result, predetermined wiring patterns 12a and 12d are electrically connected to each other. As described above, the first layer 41 and the fourth layer 44 are formed as shown in FIG. 9H (step S21).

After the above steps are completed, a solder resist 19 is applied to the upper surfaces of the first layer 41 and the fourth layer 44 to insulate the wiring patterns 12a and 12d. The solder resist 19 is a protective ink that forms an insulating film, and prevents conductors such as solder from adhering to unnecessary portions and short-circuiting. Also, the wiring patterns 12a and 12d are protected from dust, heat, moisture, etc., and the insulation is maintained (step S22).

The printed circuit board 10 according to the present disclosure can be manufactured through the steps described above. In the above description, a four-layer board is described as an example, but a printed board 10 with six layers or eight layers can be manufactured by repeating the same steps. The thickness of the printed circuit board 10 formed in this manner is, for example, 0.6 mm. However, it is not limited to this dimension.

According to the present disclosure, the printed circuit board 10 is formed by forming the trench via 18 between the through- hole vias 14a and 14b having a potential difference and filling the inside of the trench via with the resin 16, as described above. By arranging the trench via 18 between the through- hole vias 14a and 14b, for example, even if a crack 32 occurs on the cut surface of the glass fiber 10a between the through- hole vias 14a and 14b, the trench via 18 and its interior are filled. The elongation of CAF 17 can be prevented by interposing resin 16. This can prevent the occurrence of a short circuit between the through- hole vias 14a and 14b due to migration.

The through- hole vias 14a and 14b and the trench vias 18 are filled with resin 16, which has a lower dielectric constant than the material forming the insulating layers 13a to 13c of the printed circuit board 10. Insulation can be secured. In addition, since the capacitance generated between the wiring patterns 12a to 12d can be reduced, signal delay can be prevented and high-speed processing can be realized.

Furthermore, by using the same material for the resin 16 that fills the insides of the through- hole vias 14a and 14b and the trench via 18, the resin 16 can be filled at the same time. As a result, the filling of the resin 16 can be completed in one step, leading to improvement in workability of setup and filling work, and reduction in cost.

Also, if the potential difference applied to the adjacent through- hole vias 14a and 14b is large and a sufficient insulation distance cannot be ensured, the electric field strength between the through- hole vias 14a and 14b increases and the insulation performance may not be maintained. Furthermore, if the potential difference is large, migration tends to occur. In such a case, a trench via 18 may be provided between the adjacent through- hole vias 14a and 14b and filled with insulating resin 16 having a large dielectric constant. Since the insulating resin 16 having a large dielectric constant has excellent insulation resistance, it is possible to ensure the insulation even when the insulation distance is small.
In relation to this, when the trench via 18 is filled with an insulating resin 16 having a large dielectric constant, the resin 16 causes dielectric polarization, and electric charges generated by the dielectric polarization create a new electric field. ∼13c field strength is weakened. This also produces an effect of suppressing the occurrence of migration.

In this way, the resin 6 filling the insides of the through- hole vias 14a and 14b and the trench via 18 may be insulating resin 16 with a small dielectric constant. Alternatively, the insides of the through- hole vias 14a and 14b may be filled with an insulating resin 16 having a small dielectric constant, and the trench vias 18 may be filled with an insulating resin 16 having a large dielectric constant. .

<3. Second Embodiment of Printed Circuit Board According to Present Disclosure>
In the second embodiment of the printed circuit board 10 according to the present disclosure, as shown in FIG. is passed through the glass fiber 10a in a transverse direction, that is, so as to cut it, and the inside thereof is filled with the resin 16. As shown in FIG. Therefore, even if minute cracks 32 are present along the direction of the glass fibers 10a on the outer peripheral surfaces of the through- hole vias 14a and 14b, the extension of the CAF 17 can be prevented by forming the trench vias 18. FIG. This can prevent the occurrence of a short circuit between the through- hole vias 14a and 14b due to migration.

Hereinafter, the printed circuit board 10 will be described using a four-layer board as an example. In this figure, wiring patterns 12a, 12b, 12c and 12d are conductive layers formed of copper foil 10c. Insulating layers 13a, 13b and 13c are respectively arranged between the wiring patterns 12a to 12d. That is, the printed circuit board 10 shown in this figure includes wiring patterns 12a to 12d, which are conductive layers formed of copper foil 10c, and insulating layers 13a to 13c, which are formed of a base material impregnated with glass fiber 10a and epoxy resin 33. It has a structure in which these are alternately stacked in a sandwich. The wiring patterns 12a to 12d are formed by etching the copper foil 10c or the like to form an electric circuit.

The through- hole vias 14 a and 14 b penetrate from the first layer 41 to the fourth layer 44 at positions not overlapping the through-hole vias 14 provided in the inner layer 34 . A trench via 18 similarly penetrates between the through- hole vias 14a and 14b. In the second layer 42 and the third layer 43, when the through- hole vias 14a and 14b are not connected to the wiring patterns 12b and 12c, they are separated from these wiring patterns 12b and 12c by a predetermined distance. In addition, when connecting to these, lands are provided on predetermined wiring patterns 12b and 12c, and through-connections are made there.

The through hole vias 14a and 14b and the trench via 18 are filled with a resin 16 inside. The openings of the through- hole vias 14a and 14b may be covered with copper plating.
Solder resist 19 is applied to the upper surfaces of the wiring patterns 12a and 12d on the front and back surfaces of the printed circuit board 10 to insulate and protect the wiring patterns 12a and 12d.

In this way, in the through- hole vias 14a and 14b penetrating from the first layer 41 to the fourth layer 44, the trench via 18 penetrates between them and is filled with the resin 16 inside. Therefore, even if the CAF 17 extends along the cracks 32 generated in the insulating layers 13a to 13c, it is possible to prevent short-circuiting between the through- hole vias 14a and 14b.

Next, the process of drilling through- hole vias 14a and 14b and trench vias 18 penetrating from the first layer 41 to the fourth layer 44 will be described with reference to FIG. The step of forming through- hole vias 14a and 14b and trench vias 18 penetrating through the first layer 41 to the fourth layer 44 is performed after laminating the first layer 41 and the fourth layer 44 (step S20 in FIG. 5). reference).

That is, steps S31 to S40 in FIG. 11 are the same as steps S11 to S20 in FIG. Therefore, description of steps S31 to S40 in FIG. 11 is omitted. 6 to 9 described in steps S12 to S20, refer to these figures.
In FIG. 11, after laminating the first layer 41 and the fourth layer 44 on the inner layer 34 (step S40), the through holes 30 for the through- hole vias 14a and 14b penetrating from the first layer 41 to the fourth layer 44 are drilled. (step S41).

Next, cutting debris such as the glass fiber 10a and the epoxy resin 33 remaining inside the through-hole 30 is removed by washing (step S42).

The inner peripheral surface of the through hole 30 that has been cleaned is plated with copper (step S43). Through- hole vias 14a and 14b are thereby formed to electrically connect the wiring patterns 12a and 12d.

Next, as shown in FIG. 10, a trench via 18, which is a through hole with a predetermined diameter, is drilled between the through- hole vias 14a and 14b (step S44).

Next, shavings such as the glass fiber 10a and the epoxy resin 33 remaining inside the drilled trench via 18 are removed by washing (step S45).

Next, as shown in FIG. 10, resin 16 is filled inside the copper-plated through- hole vias 14a, 14b and trench vias 18 (step S46).

When the filling of the resin 16 is completed, the resin 16 filling openings of the through- hole vias 14a and 14b and the trench vias 18 filled with the resin 16 are polished and flattened (step S47).

The top surface of the fill port of the planarized through- hole vias 14a, 14b may be cap plated with copper. Wiring patterns 12b and 12c are also formed (step S48).
As described above, the first layer 41 and the fourth layer 44, which are the outer layers 35 of the four-layer substrate, are formed, and the predetermined wiring patterns 12a to 12d are electrically connected by the through- hole vias 14a and 14b.

After the above steps are completed, the upper surfaces of the first layer 41 and the fourth layer 44 are coated with the solder resist 19 to insulate the wiring patterns 12a and 12d (step S49).
Through the steps described above, the printed circuit board 10 according to the present disclosure can be manufactured. In the above description, a four-layer board is described as an example, but a printed board 10 with six layers or eight layers can be manufactured by repeating the same steps.

10, both of the through- hole vias 14a and 14b penetrate from the first layer 41 to the fourth layer 44. However, one of the through- hole vias 14a and 14b penetrates from the second layer 42 to the fourth layer 44. and the other may penetrate from the first layer 41 to the fourth layer 44 . That is, both through- hole vias 14a and 14b need not be on the same layer.
Other than the above, the printed circuit board 10 according to the first embodiment of the present disclosure is the same as the printed circuit board 10, so the description is omitted.

<4. First Embodiment of Trench Via>
Next, a first embodiment of the trench via 18 of the printed circuit board 10 according to the present disclosure will be described. The first to fifth embodiments of the trench via 18 described below can be applied to both the first embodiment and the second embodiment of the printed circuit board 10. FIG.

As shown in FIG. 12A, the first embodiment of the trench via 18 has a substantially circular trench via 18 formed between the adjacent through- hole vias 14a and 14b and filled with a resin 16 inside each. be.
The diameter of the trench via 18 may be the same as the diameter of each of the through- hole vias 14a and 14b, but is formed to be larger than these diameters in order to prevent the occurrence of shorts due to elongation of the CAF 17 caused by migration. is desirable. For example, if the through- hole vias 14a and 14b have a diameter of 0.31 mm, the trench via 18 preferably has a diameter of at least 0.4 mm. Furthermore, considering the positional tolerance of the drill 90 for drilling ±0.1 mm, it is desirable that the distance between the through- hole vias 14a and 14b (the diameter of the circle indicated by the dashed line in this figure) is 0.6 mm or more. However, it is not limited to the above dimensions. same as below.

Alternatively, as shown in FIG. 12B, rectangular trench vias 18 may be formed between adjacent through- hole vias 14a and 14b, and resin 16 may be filled inside each of them. By forming in this manner, even when the distance between the adjacent through- hole vias 14a and 14b is short, it is possible to prevent the occurrence of a short due to elongation of the CAF 17 caused by migration.

Although the shape of the trench via 18 is rectangular in this figure, it may be elliptical or elliptical. The point is that if the trench via 18 is formed so that the width of the trench via 18 is elongated in the direction orthogonal to the straight line connecting the adjacent through- hole vias 14a and 14b, even if the CAF 17 is elongated, short-circuiting can be prevented. can be done. Therefore, it is possible to improve the effect of preventing the occurrence of incompatibility due to migration.

<5. Second Embodiment of Trench Via>
As shown in FIG. 13, a second embodiment of the trench via 18 is formed by forming a substantially circular trench via 18 between adjacent through- hole vias 14a and 14b, for example, surrounding the through-hole via 14a. , are filled with a resin 16 inside.
The diameter of the trench via 18 is formed larger than the diameter of the through-hole via 14a. Even if the insulating layers 13a to 13c are present on the outer peripheral surface of the through-hole via 14a, there is no problem as long as they are separated from the inner peripheral surface of the trench via 18 by the resin 16. FIG.

In addition, although the shape of the trench via 18 is substantially circular in this figure, it may be oval, elliptical, or rectangular. It may also be a triangle, a pentagon, or a hexagon. The point is that any one of the through-hole vias 14a, for example, should be surrounded by the trench vias 18 and filled with the resin 16 inside. By configuring in this way, it is possible to prevent the occurrence of a short due to the extension of the CAF 17 caused by migration, regardless of the direction in which the CAF 17 extends.

In addition, in the example of this figure, a circular trench via 18 is formed surrounding the high-potential through-hole via 14a, and the resin 16 is filled inside each of them. Circular trench vias 18 may be formed by , and resin 16 may be filled inside each of them.

<6. Third Embodiment of Trench Via>
As shown in FIG. 14, a third embodiment of the trench via 18 is formed by forming a substantially rectangular trench via 18 surrounding both through- hole vias 14a and 14b in the adjacent through- hole vias 14a and 14b. The inside is filled with resin 16 .
The inner diameter of the trench via 18 is formed larger than the outer diameter of the through- hole vias 14a and 14b. Even if the insulating layers 13a to 13c are present on the outer peripheral surface of the through-hole via 14a, there is no problem as long as they are separated from the inner peripheral surface of the trench via 18 by the resin 16. FIG.

In addition, although the shape of the trench via 18 is substantially rectangular in this figure, it may be circular, elliptical, or substantially oval. The point is that both of the through- hole vias 14a and 14b are surrounded by the trench via 18 and filled with the resin 16 inside. With this configuration, even if the CAF 17 extends from any direction, not only between the through- hole vias 14a and 14b, it is possible to prevent the occurrence of a short due to the extension of the CAF 17 due to migration.

<7. Fourth Embodiment of Trench Via>
A fourth embodiment of the trench via 18 is a case where three through- hole vias 14, 14, 14 are adjacent to each other, as shown in FIG. In this case, a substantially three-pointed star-shaped or substantially Y-shaped trench via 18 is drilled at a substantially intermediate position between the three through- hole vias 14, 14, 14, and the resin 16 is filled inside each of them. be.

In this figure, the substantially three-pointed star-shaped end portion 18a of the trench via 18 has a substantially semicircular shape, but it may be formed in a substantially triangular shape or a substantially square shape. Moreover, it is desirable to form the substantially three-pointed star-shaped or substantially Y-shaped end portion 18a by extending it as much as possible. In short, the line surrounding the outer peripheries of the adjacent through- hole vias 14, 14, 14 is formed by connecting the lines perpendicular to the extending direction at the tip of the substantially three-pointed star-shaped or substantially Y-shaped end 18a. It is desirable to form it so that it fits within the triangle (broken line in this figure). By forming in this way, it is possible to prevent the occurrence of a short due to elongation of the CAF 17 caused by migration.

<8. Fifth Embodiment of Trench Via>
A fifth embodiment of the trench via 18 is a case where four through- hole vias 14, 14, 14, 14 are adjacent to each other as shown in FIG. In this case, a substantially four-pointed star-shaped or substantially cross-shaped trench via 18 is formed at substantially the middle position of each of the four through-hole vias 14, and the resin 16 is filled inside each of them.

In this figure, the substantially four-pointed star-shaped or substantially cross-shaped end portion 18a of the trench via 18 has a substantially semicircular shape, but it may be formed in a substantially triangular shape or a substantially square shape. . Moreover, it is desirable to form the substantially four-pointed star-shaped or substantially cross-shaped end portion 18a by extending it as much as possible. In short, the line surrounding the outer periphery of each adjacent through-hole via 14 is a square (this It is desirable to form it so that it fits inside the dashed line in the figure). By configuring in this way, it is possible to prevent the occurrence of a short due to the extension of the CAF 17 caused by migration.

Similarly, when five or more through-hole vias 14 are adjacent to each other, a thin substantially multi-pointed star shape such as a substantially five-pointed star shape or a substantially hexagram-like shape or a substantially radial shape extending outward from a position substantially in the middle of these through-hole vias 14 is formed. By forming the trench via 18, it is possible to prevent the occurrence of a short due to the elongation of the CAF 17 caused by migration.
The shape of these end portions 18a may also be substantially semicircular, substantially triangular, or substantially rectangular. Also, depending on the arrangement of the through-hole vias 14, the lengths of the ends 18a need not be the same, and the lengths of the ends 18a may be changed.

Further, when five or more through-hole vias 14 are adjacent to each other, the first to fourth embodiments described above may be appropriately combined in addition to the present embodiment. For example, when there are four adjacent through-hole vias 14, a substantially rectangular trench via 18 surrounding all four through-hole vias 14 is formed as in the trench via of the third embodiment. , the resin 16 may be filled.
In this way, when a plurality of through-hole vias 14 are arranged adjacently, by appropriately combining the above-described first to fourth embodiments in addition to the fifth embodiment, the It is possible to prevent the occurrence of incompatibility such as a short circuit due to the extension of CAF17.

<9. Configuration example of an electronic device having a printed circuit board according to the present disclosure>
The printed circuit board 10 according to the embodiment described above can be widely used in the semiconductor device 100 . Here, as an example of its application, an example of application of the solid-state imaging device 101 having the printed circuit board 10 to electronic equipment will be described with reference to FIG. 17 . This application example is applied to the solid-state imaging device 101 having the printed circuit board 10 using the first or second embodiment of the printed circuit board 10 and/or the first to fifth embodiments of the trench via 18. Common.

The solid-state imaging device 101 is an image capture unit (photoelectric conversion unit) such as an imaging device such as a digital still camera or a video camera, a mobile terminal device having an imaging function, or a copying machine using the solid-state imaging device 101 as an image reading unit. It is applicable to general electronic equipment that uses the solid-state imaging device 101 for The solid-state imaging device 101 may be formed as a single chip, or may be in the form of a module having an imaging function in which an imaging unit and a signal processing unit or an optical system are packaged together. There may be.

As shown in FIG. 17, an imaging device 200 as an electronic device includes an optical unit 202, a solid-state imaging device 101, a DSP (Digital Signal Processor) circuit 203 as a camera signal processing circuit, a frame memory 204, and a display unit. 205 , a recording unit 206 , an operation unit 207 , and a power supply unit 208 . DSP circuit 203 , frame memory 204 , display unit 205 , recording unit 206 , operation unit 207 and power supply unit 208 are interconnected via bus line 209 .

The optical unit 202 includes a plurality of imaging lenses, takes in incident light (image light) from a subject, and forms an image on the pixel area 23 of the solid-state imaging device 101 . The solid-state imaging device 101 converts the amount of incident light imaged on the pixel region 23 by the optical unit 202 into an electric signal for each pixel 22 and outputs the electric signal as a pixel signal.

The display unit 205 is made up of a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, for example, and displays moving images or still images captured by the solid-state imaging device 101 . A recording unit 206 records a moving image or still image captured by the solid-state imaging device 101 in a recording medium such as a hard disk or a semiconductor memory.

The operation unit 207 issues operation commands for various functions of the imaging device 200 under the user's operation. The power supply unit 208 appropriately supplies various power supplies as operating power supplies for the DSP circuit 203, the frame memory 204, the display unit 205, the recording unit 206, and the operation unit 207 to these supply targets.

As described above, the imaging device 200 having the solid-state imaging device 101 using the printed circuit board 10 according to the present disclosure does not cause failures or problems due to migration even when used for a long period of time, so it can be used with confidence. be able to.

Finally, the description of each embodiment described above is an example of the present disclosure, and the present disclosure is not limited to the above-described embodiments. Therefore, it goes without saying that various modifications other than the above-described embodiments can be made according to the design and the like within the scope of the technical idea of the present disclosure. For example, the printed board in the above description is an example of an interposer board, but it goes without saying that it can be applied to a motherboard board, a control board for industrial equipment, and the like. In addition, the effects described in this specification are merely examples and are not limited, and other effects may also occur.

Note that the present technology can also take the following configuration.
(1)
through-hole vias drilled adjacently;
a trench via formed between the through-hole vias;
printed circuit board.
(2)
The printed circuit board according to (1), wherein the trench via is arranged so as to traverse a glass cloth that is a base material of the printed circuit board.
(3)
The printed circuit board according to (1), wherein the trench vias are arranged between the through-hole vias that penetrate and connect the wiring patterns in the inner layers of the printed circuit board.
(4)
The printed circuit board according to (1), wherein the trench vias are disposed between the through-hole vias for penetrating connection between the wiring patterns on the outer layer of the printed circuit board or between the wiring patterns on the outer layer and the wiring patterns on the inner layer.
(5)
The shape of the trench via in plan view is such that the width of the trench via is longer than the diameter of the through-hole via in a direction orthogonal to a straight line connecting the adjacent through-hole vias. 1) The printed circuit board described in 1).
(6)
The printed circuit board according to (1) above, wherein the trench via surrounding any one of the through-hole vias is formed between the adjacent through-hole vias.
(7)
The printed circuit board according to (1) above, wherein trench vias surrounding all of the through-hole vias are formed between the adjacent through-hole vias.
(8)
The center of the substantially multi-pointed star-shaped or substantially radial trench via is arranged at a substantially intermediate position between the three or more adjacent through-hole vias, and the space formed by the peripheral surface of the through-hole via is the edge of the trench via. The printed circuit board according to (1) above, wherein the end of the portion is formed so as to fit within a polygon formed by connecting lines perpendicular to the extension direction of the portion.
(9)
The printed circuit board according to any one of (1) to (8), wherein the insulating trench via is filled with resin.
(10)
drilling through-holes for through-hole vias adjacent to the copper-clad laminate;
a step of cleaning the through-hole;
a step of copper-plating the inner peripheral surface of the through hole;
forming through holes for trench vias between the through hole vias;
a step of cleaning the trench via through-hole;
a step of filling the through hole for the trench via with a resin;
a step of polishing the resin-filled portion;
a step of forming a wiring pattern on the resin-filled portion by lid plating and the copper-clad laminate;
A method of manufacturing a printed circuit board having
(11)
through-hole vias drilled adjacently;
a trench via formed between the through-hole vias and filled with a resin;
A solid-state imaging device comprising a printed circuit board having
(12)
An electronic device having a solid-state imaging device comprising a printed circuit board having through-hole vias formed adjacent to each other and trench vias formed between the through-hole vias and filled with resin.

3 cover glass 4 sealing resin 6 sensor substrate 7 bonding wire 8 cavity portion 9 external connection terminal 10 printed circuit board 10a glass fiber 10b glass cloth 10c copper foil 11 pad 12a-d wiring pattern 13a- c insulating layer 14, 14a, 14b through-hole via 15 connection via 16 resin 17 CAF
18 trench via 18a end 19 solder resist 21 light receiving section 22 pixel 23 pixel area 24 peripheral area 25 color filter 26 microlens array 27 infrared cut filter 29 pad 30 through hole 31 copper clad laminate 32 crack 33 epoxy resin 34 inner layer 35 Outer layer 41 First layer 42 Second layer 43 Third layer 44 Fourth layer 90 Drill 100 Semiconductor device 101 Solid-state imaging device 200 Imaging device

Claims (12)

1. through-hole vias drilled adjacently;
   a trench via formed between the through-hole vias;
   printed circuit board.
2. The printed circuit board according to claim 1, wherein the trench vias are arranged so as to traverse the glass cloth that is the base material of the printed circuit board.
3. 2. The printed circuit board according to claim 1, wherein said trench vias are arranged between said through-hole vias for connecting wiring patterns in inner layers of said printed circuit board.
4. 2. The printed circuit board according to claim 1, wherein the trench vias are disposed between the wiring patterns on the outer layer of the printed circuit board or between the through-hole vias for penetrating connection between the wiring patterns on the outer layer and the wiring patterns on the inner layer.
5. 3. A shape of said trench via in plan view is formed such that a width of said trench via is longer than a diameter of said through-hole via in a direction orthogonal to a straight line connecting said adjacent through-hole vias. 2. The printed circuit board according to 1.
6. 2. The printed circuit board according to claim 1, wherein the trench vias surrounding any one of the through-hole vias are formed between the adjacent through-hole vias.
7. 2. The printed circuit board according to claim 1, wherein trench vias are formed between the adjacent through-hole vias to surround all of the through-hole vias.
8. The center of the substantially multi-pointed star-shaped or substantially radial trench via is arranged at a substantially intermediate position between the three or more adjacent through-hole vias, and the space formed by the peripheral surface of the through-hole via is the edge of the trench via. 2. The printed circuit board according to claim 1, wherein the end of the portion is formed so as to fit within a polygon formed by connecting lines perpendicular to the extension direction of the portion.
9. The printed circuit board according to claim 1, wherein the insulating trench via is filled with resin.
10. drilling through-holes for through-hole vias adjacent to the copper-clad laminate;
    a step of cleaning the through-hole;
    a step of copper-plating the inner peripheral surface of the through hole;
    forming through holes for trench vias between the through hole vias;
    a step of cleaning the trench via through-hole;
    a step of filling the through hole for the trench via with a resin;
    a step of polishing the resin-filled portion;
    a step of forming a wiring pattern on the resin-filled portion by lid plating and the copper-clad laminate;
    A method of manufacturing a printed circuit board having
11. through-hole vias drilled adjacently;
    a trench via formed between the through-hole vias and filled with a resin;
    A solid-state imaging device comprising a printed circuit board having
12. An electronic device having a solid-state imaging device provided with a printed circuit board having through-hole vias drilled adjacently and trench vias drilled between the through-hole vias and filled with resin.

Images