WO2022198118A1 - Détection de courant avec compensation capacitive - Google Patents

Détection de courant avec compensation capacitive Download PDF

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Publication number
WO2022198118A1
WO2022198118A1 PCT/US2022/021075 US2022021075W WO2022198118A1 WO 2022198118 A1 WO2022198118 A1 WO 2022198118A1 US 2022021075 W US2022021075 W US 2022021075W WO 2022198118 A1 WO2022198118 A1 WO 2022198118A1
Authority
WO
WIPO (PCT)
Prior art keywords
switch
current
coupled
sense
capacitor
Prior art date
Application number
PCT/US2022/021075
Other languages
English (en)
Inventor
Song Guo
Saurav Bandyopadhyay
Original Assignee
Texas Instruments Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US17/512,842 external-priority patent/US11799369B2/en
Application filed by Texas Instruments Incorporated filed Critical Texas Instruments Incorporated
Priority to EP22715478.8A priority Critical patent/EP4309276A1/fr
Priority to JP2023557339A priority patent/JP2024512003A/ja
Priority to CN202280017469.9A priority patent/CN116918228A/zh
Publication of WO2022198118A1 publication Critical patent/WO2022198118A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0009—Devices or circuits for detecting current in a converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1588—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load comprising at least one synchronous rectifier element

Definitions

  • a switch-mode power supply is an electronic circuit that converts an input direct current (DC) supply voltage into one or more DC output voltages that are higher or lower in magnitude than the input DC supply voltage.
  • a switch-mode power supply that generates an output voltage lower than the input voltage is termed a buck or step-down converter.
  • a switch-mode power supply that generates an output voltage higher than the input voltage Is termed a boost or step-up converter.
  • Current sensing circuitr may be coupled to the switch-mode power supply to measure the current flowing from the power supply to a load circuit.
  • a current sense circuit includes a sense amplifier, a current mirror circuit, a buffer amplifier, a switch, and a compensation capacitor.
  • the sense amplifier includes an input and an output. The input is adapted to be coupled to a switching transistor of a DC-DC converter.
  • the current mirror circuit is coupled to the output of the sense amplifier.
  • the buffer amplifier includes and input and an output. The input of the buffer amplifier is coupled to the current mirror circuit.
  • the switch includes a first terminal and a second terminal. The first terminal is coupled to the output of the buffer amplifier. The second terminal is coupled to the input of the buffer amplifier.
  • the compensation capacitor is coupled to the second terminal of the switch.
  • a current sense circuit includes a sense amplifier, a current mirror circuit, a resistor, a low-pass filter, and a capacitor.
  • the sense amplifier is adapted to be coupled to a switching transistor of a DC-DC converter.
  • the current mirror circuit is coupled to the sense amplifier, and is configured to generate a sense current proportional to a current flowing through the switching transistor.
  • the resistor is coupled to the current mirror circuit, and is configured to generate a sense voltage based on the sense current.
  • the low-pass filter is coupled to the resistor, and is configured to average the sense voltage over an averaging interval.
  • the capacitor is coupled to the resistor, and is configured to store the sense voltage in a blanking interval that precedes the averaging interval, and provide a compensation current in the averaging interval.
  • a DC-DC converter includes a switching transistor and a current sense circuit.
  • the current sense circuit is coupled to the switching transistor, and is configured to sense current flow in the switching transistor.
  • the current sense circuit includes a sense amplifier, a current mirror circuit, a resistor, a low-pass filter, a capacitor, and a buffer amplifier.
  • the sense amplifier is coupled to the switching transistor.
  • the current mirror circuit is coupled to the sense amplifier, and is configured to generate a sense current proportional to a current flowing through the switching transistor.
  • the resistor is coupled to the current mirror circuit, and is configured to generate a sense voltage based on the sense current.
  • the low-pass filter is coupled to the resistor, and is configured to average the sense voltage over an averaging interval.
  • the capacitor is coupled to the resistor, and is configured to store the sense voltage in a blanking interval that precedes the averaging interval, and provide a compensation current in the averaging interval.
  • the buffer amplifier is coupled to the resistor and the capacitor, and is configured to charge the capacitor during the blanking interval.
  • FIG. 1 shows a graph of current sensing with error caused by a blanking interval.
  • FIG. 2 shows a block diagram of an example DC-DC converter that includes current sensing with compensation for blanking.
  • FIG. 3 shows a schematic level diagram for an example current sense circuit that includes compensation for blanking.
  • FIG. 4 shows a graph of current sensing with compensation for blanking.
  • FIG. 5 shows a schematic level diagram for an example current sense circuit that includes compensation for blanking.
  • FIG. 6 shows a schematic level diagram for an example current sense circuit that includes compensation for blanking.
  • FIG. 7 shows a graph of current sensing with compensation for blanking, and switch control signals.
  • a current sense circuit may measure load current by sensing current flowing in a switching transistor (e.g., the low-side switching transistor) of a DC-DC converter (i.e., sensing the current flowing in the inductor of the DC-DC converter).
  • a sense current that is proportional to the current flowing in the switching transistor is converted to a sense voltage and averaged over time.
  • the average sense voltage may be expressed as: where:
  • Iavg is the average inductor current (load current);
  • G is sensing gain
  • Toff is off time (low-side switching transistor on time); and Tblank is the time of the blanking interval.
  • FIG. 1 shows a graph of current sensing in a DC-DC converter with error caused by a blanking interval.
  • inductor current increases when the high-side switching transistor is turned on and the low-side switching transistor is turned off.
  • IL decreases when the low-side switching transistor is turned on and the high-side switching transistor is turned off.
  • gained inductor current follows IL.
  • the blanking interval 102 reduces the value of the average sensed current, causing a sensing error.
  • the sensing error can be significant, especially for high frequency and high duty cycle applications where Toff (the low-side switching transistor on-time) is short. For example, sensing error due to blanking may exceed 10% in some circumstances.
  • Examples of the of the current sensing circuit described herein include circuitry that compensates for the blanking interval to improve current sensing accuracy.
  • current sensing error may be less than one percent in DC-DC converters that include the current sensing circuit with blanking interval compensation.
  • FIG. 2 shows a block diagram of an example DC-DC converter 200 that includes current sensing with compensation for blanking.
  • the DC-DC converter 200 is illustrated as a buck converter, but may a boost converter, a buck-boost converter, or other type of DC-DC converter.
  • the DC-DC converter 200 includes a high-side switching transistor 202, a low-side switching transistor 204, an inductor 206, a voltage divider 208, an output capacitor 210, and a controller 212.
  • the DC-DC converter 200 powers a load 211, and communicates with a power management system 216 in some implementations.
  • the controller 212 controls the high-side switching transistor 202 and the low-side switching transistor 204 to charge and discharge the inductor 206 (via the control signals HSGATE and LSGATE).
  • HSGATE and LSGATE When the high-side switching transistor 202 is turned on and the low-side switching transistor 204 is turned off, current flows from through the high-side switching transistor 202 to charge the inductor 206.
  • the low-side switching transistor 204 When the low-side switching transistor 204 is turned on and the high-side switching transistor 202 is turned off, current flows through the low-side switching transistor 204 as the inductor 206 is discharged. Current flowing from the inductor 206 charges the output capacitor 210 and powers the load 211.
  • the voltage divider 208 is coupled to the output 200A of the DC-DC converter 200.
  • the voltage divider 208 divides the output voltage (Vout) of the DC-DC converter 200 to generate a feedback voltage (VFB) that is proportional to Vout.
  • the controller 212 compares VFB to a reference voltage to generate an error signal used to control the high-side switching transistor 202 and low-side switching transistor 204.
  • the controller 212 also included current sense circuit 214.
  • the current sense circuit 214 is coupled to the low-side switching transistor 204 for measurement of the current flowing through the inductor 206 (and into the output capacitor 210 and the load 211) as the inductor 206 is discharged.
  • the current sense circuit 214 includes circuitry to compensate for the blanking interval applied at turn-on of the low-side switching transistor 204, and improve the accuracy of load current sensing.
  • the controller 212 may communicate with the power management system 216 via a serial bus (e.g., a power management bus). For example, various parameters applied to DC-DC conversion in the DC-DC converter 200 may be received from the power management system 216, and status, including measured load current derived from the current sense circuit 214, may be transmitted to the power management system 216.
  • a serial bus e.g., a power management bus
  • FIG. 3 shows a schematic level diagram for an example current sense circuit 300 that includes compensation for blanking.
  • the current sense circuit 300 includes a sense resistor 302, a sense resistor 304, a sense amplifier 306, a current mirror circuit 308, a resistor 316, compensation capacitor 318, and a low-pass filter 322.
  • the sense resistor 304 is coupled to the source of the low- side switching transistor 204, and the sense resistor 302 is coupled to the drain of the low-side switching transistor 204.
  • the inputs of the sense amplifier 306 are coupled to the sense resistor 302 and the sense resistor 304.
  • the output of the sense amplifier 306 is coupled to a pass transistor 307. [0023]
  • the sense amplifier 306 senses the voltage across the low-side switching transistor 204, the sense resistor 302, and the sense resistor 304, and activates the pass transistor 307 to pass a current (la) that is proportional to the current flowing through the low-side switching transistor 204.
  • a current source 326 injects an offset current (e.g., 95.5 microamperes) to enable sensing of positive and negative current flow through the low- side switching transistor 204.
  • PGND SNSFET PRC represents the path of current to the sense resistor 304
  • PGND_SNSFET_SNS represents the sensing path from the sense resistor 304 to the sense amplifier 306.
  • SW SNSFET FRC represents the path of current to the sense resistor 302
  • SW_SNSFET_SNS represents the sensing path from the sense resistor 302 to the sense amplifier 306.
  • the current mirror circuit 308 includes a transistor 310, a transistor 312, and a switch 314.
  • the switch 314 may be implemented using a field effect transistor (FET) in some examples of the current mirror circuit 308.
  • FET field effect transistor
  • the resistor 316 is coupled to the transistor 312 and to the output 330 A (a common-mode voltage terminal) of the common-mode voltage buffer amplifier 330.
  • the current Ib flows through the resistor 316 to generate a sense voltage (CSA OUT TEL).
  • a current source 328 is coupled to the resistor 316.
  • the current source 328 sinks a current corresponding to the current injected by the current source 326 at the input of the sense amplifier 306.
  • the compensation capacitor 318 is coupled to the resistor 316, and the sense voltage charges the compensation capacitor 318.
  • a switch 320 is coupled to the compensation capacitor 318 and the resistor 316, and the low-pass filter 322 is coupled to the switch 320.
  • the switch 320 may be implemented using a FET in some examples of the current sense circuit 300.
  • the switch 320 is open during the blanking interval provided at turn-on of the low-side switching transistor 204 to disable current sensing errors due to ringing caused by the parasitic inductance between the low-side switching transistor 204 and ground.
  • the switch 320 is also open when the low-side switching transistor 204 is turned off. When the blanking interval expires, the switch 320 is closed, and the low-pass filter 322 filters the sense voltage to produce an average sense voltage (CSA OUT FLT TEL) that is output by the buffer amplifier 324
  • Cc is the capacitance of the compensation capacitor 318; and R1 is the resistance of the resistor 316.
  • Vcompensate The compensation voltage (Vcompensate ) is selected to compensate the error in equation (2).
  • Cc By setting Vcompensate equal to the error voltage, Cc may be calculated as:
  • the compensation capacitor 318 provides a compensation voltage that tracks the error caused by the blanking interval with different values of Iripple and Toff (different input voltages, output voltage, and switching frequencies), and allows the current sense circuit 300 to provide good accuracy in a variety of applications.
  • FIG. 4 shows a graph of current sensing in the current sense circuit 300.
  • the inductor current, and the sensed voltage (IL*G) are the same as shown in FIG. 1.
  • the compensation current (Ic) provided by the compensation capacitor 318, boosts the sense voltage during the averaging interval (when the switch 320 is closed) to reduce error in the sensed current.
  • FIG. 5 shows a schematic level diagram for an example current sense circuit 500 that includes compensation for blanking.
  • the current sense circuit 500 is similar to the current sense circuit 300, and includes a buffer amplifier 502, a switch 504, and a switch 506 to facilitate charging of the compensation capacitor 318.
  • An input of the buffer amplifier 502 is coupled to the current mirror circuit 308 and the resistor 316.
  • the output of the buffer amplifier 502 is coupled to a first terminal of the switch 506.
  • a second terminal of the switch 506 is coupled to the compensation capacitor 318, and to a first terminal of the switch 504.
  • a second terminal of the switch 504 is coupled to the input of the buffer amplifier 502.
  • the switch 504 and the switch 506 may be implemented using FETs in some examples of the current sense circuit 500.
  • the switch 506 is closed, and the compensation capacitor 318 is quickly charged from the output of the buffer amplifier 502.
  • the switch 504 is closed and the compensation current (Ic) flows from the compensation capacitor 318 through the switch 504 and the resistor 316 to boost the sense voltage.
  • the current sense circuit 500 includes a control circuit 508 that generates control signals BL and CS for controlling the switch 504 and the switch 506.
  • the control signal BL defines the blanking interval (as shown in FIG. 4)
  • the control signal CS defines the active time of the low- side switching transistor 204 after the blanking interval (the averaging interval shown in FIG. 4).
  • FIG. 6 shows a schematic level diagram for an example current sense circuit 600 that includes compensation for blanking.
  • the current sense circuit 600 is similar to the current sense circuit 300 and the current sense circuit 500.
  • the current sense circuit 600 includes a buffer amplifier 602, a switch 604, and a switch 606 to facilitate charging of the compensation capacitor 318.
  • An input of the buffer amplifier 602 is coupled to the current mirror circuit 308 and the resistor 316.
  • the output of the buffer amplifier 602 is coupled to a first terminal of the switch 606.
  • a second terminal of the switch 606 is coupled to the compensation capacitor 318, and to a first terminal of the switch 604.
  • a second terminal of the switch 604 is coupled to the input of the buffer amplifier 602 and a terminal of the switch 320.
  • the switch 604 and the switch 606 may be implemented using FETs in some examples of the current sense circuit 600.
  • FIG. 7 shows a graph of current sensing with compensation for blanking, and switch control signals BL and CS generated by the control circuit 508.
  • the switch control signals BL and CS control the switch 504 and switch 506 in the current sense circuit 500, and switch 604 and switch 606 in the current sense circuit 600.
  • the term “couple” or “couples” may cover connections, communications, or signal paths that enable a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform an action: (a) in a first example, device A is coupled to device B; or (b) in a second example, device A is coupled to device B through intervening component C if intervening component C does not substantially alter the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A. Also, in this description, the recitation “based on” means “based at least in part on.” Therefore, if X is based on Y, then X may be a function of Y and any number of other factors.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

Un circuit de détection de courant (300) comprend un amplificateur de détection (306), un circuit miroir de courant (308), une résistance (316), un filtre passe-bas (322) et un condensateur (318). L'amplificateur de détection (306) est conçu pour être couplé à un transistor de commutation (204) d'un convertisseur CC-CC. Le circuit miroir de courant (308) est couplé à l'amplificateur de détection (306), et est conçu pour générer un courant de détection proportionnel à un courant circulant dans le transistor de commutation (204). La résistance (316) est couplée au circuit miroir de courant (308), et est conçue pour générer une tension de détection sur la base du courant de détection. Le filtre passe-bas (322) est couplé à la résistance (316), et est conçu pour établir la moyenne de la tension de détection sur un intervalle d'établissement de moyenne. Le condensateur (318) est couplé à la résistance (316), et est conçu pour stocker la tension de détection dans un intervalle de suppression qui précède l'intervalle d'établissement de moyenne, et pour fournir un courant de compensation dans l'intervalle d'établissement de moyenne.
PCT/US2022/021075 2021-03-19 2022-03-21 Détection de courant avec compensation capacitive WO2022198118A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP22715478.8A EP4309276A1 (fr) 2021-03-19 2022-03-21 Détection de courant avec compensation capacitive
JP2023557339A JP2024512003A (ja) 2021-03-19 2022-03-21 容量性補償を伴う電流感知
CN202280017469.9A CN116918228A (zh) 2021-03-19 2022-03-21 带电容补偿的电流感测

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US202163163370P 2021-03-19 2021-03-19
US63/163,370 2021-03-19
US202163175632P 2021-04-16 2021-04-16
US63/175,632 2021-04-16
US17/512,842 US11799369B2 (en) 2021-03-19 2021-10-28 Current sensing with capacitive compensation
US17/512,842 2021-10-28

Publications (1)

Publication Number Publication Date
WO2022198118A1 true WO2022198118A1 (fr) 2022-09-22

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140347078A1 (en) * 2013-05-21 2014-11-27 Analog Devices Technology Current sensing of switching power regulators
JP2019149614A (ja) * 2018-02-26 2019-09-05 ルネサスエレクトロニクス株式会社 電流検出回路、半導体装置、及び、半導体システム

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140347078A1 (en) * 2013-05-21 2014-11-27 Analog Devices Technology Current sensing of switching power regulators
JP2019149614A (ja) * 2018-02-26 2019-09-05 ルネサスエレクトロニクス株式会社 電流検出回路、半導体装置、及び、半導体システム

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