WO2022193649A1 - 金属氧化物TFT及制造方法、x射线探测器和显示面板 - Google Patents

金属氧化物TFT及制造方法、x射线探测器和显示面板 Download PDF

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WO2022193649A1
WO2022193649A1 PCT/CN2021/125799 CN2021125799W WO2022193649A1 WO 2022193649 A1 WO2022193649 A1 WO 2022193649A1 CN 2021125799 W CN2021125799 W CN 2021125799W WO 2022193649 A1 WO2022193649 A1 WO 2022193649A1
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layer
active layer
metal
metal oxide
lanthanide
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PCT/CN2021/125799
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English (en)
French (fr)
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胡合合
刘凤娟
袁广才
贺家煜
宁策
李正亮
赵坤
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京东方科技集团股份有限公司
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Priority to JP2022565666A priority Critical patent/JP2024509656A/ja
Priority to EP21931224.6A priority patent/EP4131424A4/en
Publication of WO2022193649A1 publication Critical patent/WO2022193649A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/38—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions
    • H01L21/385—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers
    • H01L27/14658—X-ray, gamma-ray or corpuscular radiation imagers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14692—Thin film technologies, e.g. amorphous, poly, micro- or nanocrystalline silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

Definitions

  • the present application relates to the field of electronic technology, and in particular, to a metal oxide TFT and a manufacturing method, an x-ray detector and a display panel.
  • Metal oxide thin film transistor (English: Thin Film Transistor, abbreviation: TFT) is a device that can realize switching function.
  • a method of manufacturing a metal oxide TFT which includes forming an active layer on a base substrate by using a metal oxide semiconductor material.
  • Embodiments of the present application provide a metal oxide TFT and a manufacturing method, an x-ray detector and a display panel.
  • the technical solution is as follows:
  • a method for manufacturing a metal oxide TFT comprising:
  • the active layer and the functional layer are annealed, the lanthanide metal elements in the functional layer are diffused into the active layer, and the active layer is transformed into an active layer.
  • the temperature of the annealing treatment is 200-450 degrees Celsius
  • the time is 0.5-3 hours
  • the atmosphere includes dry air or oxygen.
  • an active layer made of a metal oxide semiconductor material on the base substrate and a functional layer including a lanthanide metal element stacked on the active layer includes:
  • the first photoresist pattern is removed.
  • the functional layer is removed.
  • the removal of the functional layer includes:
  • the source-drain metal layer and the functional layer are etched, so that the source-drain metal layer forms a source and drain, and the part of the functional layer outside the first region is etched away, and the first The region is an orthographic projection region of the source and drain electrodes on the active layer, and the source and drain electrodes include a source electrode and a drain electrode.
  • an active layer made of a metal oxide semiconductor material on the base substrate and a functional layer including a lanthanide metal element stacked on the active layer includes:
  • a thin film including a lanthanide metal element is formed on the base substrate on which the active layer is formed, the active layer is surrounded by a top surface, a bottom surface, and a side surface connecting the top surface and the bottom surface, the bottom surface toward the base substrate, the thin film including the lanthanide metal element covers the top surface and the side surface of the active layer;
  • the annealing treatment of the active layer and the functional layer includes:
  • the active layer and the thin film including the lanthanide metal element are annealed to diffuse the lanthanide metal element from the top surface and the side surface of the active layer.
  • the material of the functional layer includes unitary or multi-element oxides of lanthanide metals.
  • the material of the functional layer includes one or more of praseodymium oxide, samarium oxide, cerium oxide, indium zinc oxide, indium zinc praseodymium oxide, and indium zinc samarium oxide.
  • a metal oxide TFT is provided, the metal oxide TFT is manufactured by the method according to any one of the above aspects, and the metal oxide TFT comprises:
  • An active layer of a metal oxide semiconductor on a base substrate has a lanthanide metal element.
  • the lanthanide metal element is diffused in the material at a specified depth.
  • the active layer is a single layer, which is a channel layer of a TFT, and is surrounded by a top surface, a bottom surface, and a side surface connecting the top surface and the bottom surface, and the active layer is far away from the substrate.
  • One side of the substrate includes a top surface and a side surface of the active layer.
  • the mass percentage per unit volume of the lanthanide metal element in the active layer gradually decreases from the top surface of the active layer in the direction toward the base substrate.
  • the lanthanide metal element includes one or more of praseodymium, samarium, and cerium.
  • the specified depth is less than or equal to 10 nanometers.
  • the metal oxide TFT further includes a source and drain electrodes, and a metal layer including a lanthanide metal element located between the active layer and the source and drain electrodes, and the source and drain electrodes include a source electrode and a lanthanide metal element.
  • the material of the metal layer includes unit or multi-element oxides of lanthanide metals.
  • the mass percentage of the lanthanide metal element in the active layer is greater than or equal to 0.5% and less than or equal to 10%.
  • an x-ray detector comprising the metal oxide TFT according to any one of the above aspects.
  • a display panel in another aspect, includes the metal oxide TFT according to any one of the above aspects.
  • metal oxide TFT is provided, the metal oxide TFT is fabricated by the method of any one of the above aspects, and the metal oxide TFT comprises:
  • a gate electrode a source electrode, a drain electrode and an active layer on the base substrate
  • the active layer is located between the gate and the source or drain;
  • the active layer includes a channel layer, and the channel layer is a first metal oxide semiconductor layer;
  • the first metal oxide semiconductor layer includes one or more of indium, gallium, zinc, tin, aluminum, tungsten, zirconium, hafnium, and silicon; the channel layer contains a lanthanide metal doped material;
  • the upper surface of the channel layer and the position with a certain thickness from the upper surface contain lanthanide metal doping materials; the lanthanide metal content increases with the distance from the upper surface in the channel layer. decreasing trend.
  • a source electrode and a drain electrode are provided on the active layer;
  • a metal layer is disposed between the channel layer of the active layer and the source electrode, and the metal material of the metal layer is the same material as the lanthanide metal doped material;
  • a metal layer is disposed between the channel layer and the drain electrode of the active layer, and the metal layer includes the same lanthanide metal element as the lanthanide metal doped material.
  • the thickness of the metal layer between the source electrode and the channel layer is the same as the thickness of the metal layer between the drain electrode and the channel layer.
  • the outer sidewall of the metal layer between the source electrode and the channel layer and an outer sidewall of the channel layer are on the same slope, and the slope angle direction is the same, and the drain and the channel layer are on the same slope.
  • the outer sidewall of the metal layer between the channel layers and the other outer sidewall of the channel layer are on the same slope, and the slope angle direction is the same;
  • the inner sidewall of the metal layer between the source electrode and the channel layer is on the same slope as the inner sidewall of the source electrode, and the slope angle direction is the same.
  • the inner sidewall of the metal layer between them is on the same slope as the inner sidewall of the drain electrode, and the slope angle direction is the same.
  • the active layer further includes a back channel protection layer, the channel layer is indium gallium tin oxide doped with a lanthanide metal, and the back channel protection layer is located on the channel layer
  • the back channel protection layer is crystalline indium gallium zinc oxide, indium gallium zinc oxide doped with lanthanide series metal or indium gallium zinc oxide doped with lanthanide series metal.
  • the active layer further includes a light-shielding protective layer
  • the light-shielding protective layer includes indium zinc oxide doped with lanthanide metal or indium gallium zinc oxide doped with lanthanide metal
  • the light shielding protective layer is located in the the other side of the channel layer away from the back channel protection layer.
  • the lanthanide metal is praseodymium.
  • a method of manufacturing a metal oxide TFT is provided.
  • the active layer and the functional layer are annealed, and the function is
  • the lanthanide metal elements in the layer are diffused into the active layer; the lanthanide metal elements diffused into the active layer can form trap states in the active layer, and the photogenerated electrons generated by the light on the active layer can be captured by the trap states , thereby improving the light stability of the active layer.
  • the problem of poor photostability of the active layer of the metal oxide TFT in the related art is solved, and the effect of improving the photostability of the active layer of the metal oxide TFT is achieved.
  • FIG. 1 is a flowchart of a method for manufacturing a metal oxide TFT provided in an embodiment of the present application
  • FIG. 2 is a flowchart of another method for manufacturing a metal oxide TFT provided in an embodiment of the present application
  • FIG. 3 is a schematic structural diagram of the base substrate in the method shown in FIG. 2;
  • FIG. 4 is another schematic structural diagram of the base substrate in the method shown in FIG. 2;
  • FIG. 5 is another schematic structural diagram of the base substrate in the method shown in FIG. 2;
  • Fig. 6 is another structural schematic diagram of the base substrate in the method shown in Fig. 2;
  • FIG. 7 is another schematic structural diagram of the base substrate in the method shown in FIG. 2;
  • FIG. 8 is another schematic structural diagram of the base substrate in the method shown in FIG. 2;
  • Fig. 9 is another structural schematic diagram of the base substrate in the method shown in Fig. 2;
  • FIG. 10 is another schematic structural diagram of the base substrate in the method shown in FIG. 2;
  • FIG. 11 is a flowchart of another method for manufacturing a metal oxide TFT provided in an embodiment of the present application.
  • FIG. 12 is another schematic structural diagram of the base substrate in the method shown in FIG. 11;
  • FIG. 13 is another schematic structural diagram of the base substrate in the method shown in FIG. 11;
  • FIG. 14 is a flowchart of another method for manufacturing a metal oxide TFT provided by an embodiment of the present application.
  • FIG. 15 is another schematic structural diagram of the base substrate in the method shown in FIG. 14;
  • FIG. 16 is another schematic structural diagram of the base substrate in the method shown in FIG. 14;
  • FIG. 17 is another schematic structural diagram of the base substrate in the method shown in FIG. 14;
  • FIG. 18 is another schematic structural diagram of the base substrate in the method shown in FIG. 14;
  • FIG. 19 is another schematic structural diagram of the base substrate in the method shown in FIG. 14;
  • FIG. 20 is another schematic structural diagram of the base substrate in the method shown in FIG. 14;
  • FIG. 21 is another schematic structural diagram of the base substrate in the method shown in FIG. 14;
  • FIG. 22 is a flowchart of another method for manufacturing a metal oxide TFT provided in an embodiment of the present application.
  • FIG. 23 is another schematic structural diagram of the base substrate in the method shown in FIG. 22;
  • FIG. 24 is another schematic structural diagram of the base substrate in the method shown in FIG. 22;
  • FIG. 25 is another schematic structural diagram of the base substrate in the method shown in FIG. 22;
  • FIG. 26 is another schematic structural diagram of the base substrate in the method shown in FIG. 22;
  • FIG. 27 is another schematic structural diagram of the base substrate in the method shown in FIG. 22;
  • FIG. 28 is another schematic structural diagram of the base substrate in the method shown in FIG. 22;
  • 29 is a flowchart of another method for manufacturing a metal oxide TFT provided by an embodiment of the present application.
  • FIG. 30 is another schematic structural diagram of the base substrate in the method shown in FIG. 29;
  • FIG. 31 is another schematic structural diagram of the base substrate in the method shown in FIG. 29;
  • FIG. 32 is another schematic structural diagram of the base substrate in the method shown in FIG. 29;
  • FIG. 33 is another schematic structural diagram of the base substrate in the method shown in FIG. 29;
  • FIG. 34 is another schematic structural diagram of the base substrate in the method shown in FIG. 29;
  • FIG. 35 is another schematic structural diagram of the base substrate in the method shown in FIG. 29;
  • FIG. 36 is another schematic structural diagram of the base substrate in the method shown in FIG. 29;
  • FIG. 37 is a schematic structural diagram of a metal oxide TFT according to an embodiment of the present application.
  • FIG. 38 is a schematic structural diagram of another metal oxide TFT shown in an embodiment of the present application.
  • FIG. 39 is a schematic structural diagram of another metal oxide TFT shown in an embodiment of the present application.
  • FIG. 40 is a schematic structural diagram of another metal oxide TFT shown in an embodiment of the present application.
  • FIG. 41 is a schematic structural diagram of another metal oxide TFT shown in an embodiment of the present application.
  • Metal oxide TFT is a new type of TFT, which can be used in liquid crystal displays (English: Liquid Crystal Display; abbreviation: LCD), organic light-emitting semiconductor (English: Organic Light-Emitting Diode; abbreviation: OLED) displays, X-ray sensors (English: X-ray transducer), Mini LED (Mini LED) display, Quantum Dot Light Emitting Diodes (English: Quantum Dot Light Emitting Diodes; abbreviation: QLED) display and low temperature polycrystalline oxide technology (English: Low Temperature Polycrystalline Oxide) ; Abbreviation: LTPO) and so on.
  • LCD Liquid Crystal Display
  • OLED Organic Light-Emitting Diode
  • X-ray sensors English: X-ray transducer
  • Mini LED Mini LED
  • QLED Quantum Dot Light Emitting Diodes
  • QLED Quantum Dot Light Emitting Diodes
  • LTPO Low Temperature Polycrystalline Oxide
  • the metal oxide TFT When the metal oxide TFT is applied in a display panel, it can be located in an array substrate, and the array substrate is a component in the display panel and is used to control the display panel.
  • the display panel may also include other components.
  • the display panel when the display panel is a liquid crystal display panel, the liquid crystal display panel may also include a liquid crystal layer and a color filter substrate.
  • the organic light emitting diode display panel When used as a panel, the organic light emitting diode display panel may further include organic light emitting diodes.
  • the array substrate may include a base substrate and a plurality of thin film transistors arranged in an array on the base substrate.
  • the thin film transistors may include a gate electrode, a source electrode, a drain electrode and an active layer, and the source electrode and the drain electrode are overlapped on the active layer.
  • the voltage applied on the gate can be used to control whether the active layer turns on the source and the drain, so as to realize the function of the thin film transistor.
  • FIG. 1 is a flowchart of a method for manufacturing a metal oxide TFT according to an embodiment of the present application, and the method may include:
  • Step 201 forming an active layer made of a metal oxide semiconductor material on a base substrate and a functional layer including a lanthanide metal element stacked on the active layer.
  • Step 202 annealing the active layer and the functional layer, and the lanthanide metal elements in the functional layer are diffused into the active layer.
  • the embodiments of the present application provide a method for manufacturing a metal oxide TFT.
  • the active layer and the functional layer are annealed, and the function is
  • the lanthanide metal elements in the layer are diffused into the active layer; the lanthanide metal elements diffused into the active layer can form trap states in the active layer, and the photogenerated electrons generated by the light on the active layer can be captured by the trap states , thereby improving the light stability of the active layer.
  • the problem of poor photostability of the active layer of the metal oxide TFT in the related art is solved, and the effect of improving the photostability of the active layer of the metal oxide TFT is achieved.
  • FIG. 2 is a flowchart of another method for manufacturing a metal oxide TFT provided in an embodiment of the present application, and the method may include:
  • Step 301 Obtain a base substrate.
  • the material of the base substrate may include glass or polyimide.
  • Step 302 forming a gate on the base substrate.
  • the gate may be a structure in a thin film transistor.
  • a gate metal layer can be formed on the base substrate first (the gate metal layer can be formed by one of deposition, sputtering, etc.), and then the gate metal layer is processed through a patterning process , to get the gate.
  • a gate pattern including a plurality of gates may be obtained through a patterning process, and for some or all of the gates in the gate pattern, reference may be made to the gates involved in the embodiments of the present application.
  • the patterning process involved may include photoresist coating, exposure, development, etching, and photoresist stripping.
  • the gate electrode 112 is formed on the base substrate 111 , and the material of the gate electrode 112 may include metal.
  • Step 303 forming a gate insulating layer on the gate pattern.
  • the gate insulating layer can be used to avoid short circuits between the gate and other structures in the thin film transistor.
  • FIG. 4 is another schematic structural diagram of the base substrate at the end of step 303 , the gate insulating layer 113 is formed on the base substrate 111 having the gate electrode 112 , and the gate insulating layer
  • the material of 113 may include silicon dioxide, silicon nitride, or a mixed material of silicon dioxide and silicon nitride.
  • Step 304 forming an active layer made of a metal oxide semiconductor material on the gate insulating layer and a functional layer including a lanthanide metal element stacked on the active layer.
  • step 304 may include the following four sub-steps:
  • Sub-step 3041 forming a metal oxide semiconductor thin film and a thin film including a lanthanide metal element on the gate insulating layer in sequence.
  • Both the metal oxide semiconductor thin film and the thin film including the lanthanide metal element are of a whole-layer structure, and are sequentially covered on the gate insulating layer.
  • Metal oxide semiconductor thin films and thin films including lanthanide metal elements can be formed by deposition.
  • the material of the metal oxide semiconductor thin film may include indium zinc oxide (IZO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), indium tin zinc oxide (ITZO) ) or units composed of indium (In), gallium (Ga), zinc (Zn), tin (Sn), aluminum (Al), tungsten (W), zirconium (Zr), hafnium (Hf) and silicon (Si) or Multiple metal oxides.
  • IZO indium zinc oxide
  • IGO indium gallium oxide
  • IGZO indium gallium zinc oxide
  • IGTO indium gallium tin oxide
  • ITZO indium tin zinc oxide
  • ITZO indium tin zinc oxide
  • FIG. 6 is another schematic structural diagram of the base substrate at the end of step 3041.
  • the metal oxide semiconductor thin film 114 and the substrate containing the gate insulating layer 113 are formed.
  • Thin film 115 of lanthanide metal elements are formed on the base substrate 111 on which the gate insulating layer 113 is formed.
  • Sub-step 3042 forming a first photoresist pattern on the thin film including the lanthanide metal element.
  • the forming process of the first photoresist pattern may include: forming a film layer of photoresist on a thin film including a lanthanide metal element, and then exposing and developing the film layer of the photoresist to form the first photoresist engraving pattern.
  • photoresist also known as photoresist
  • photoresist is a carrier medium for lithography imaging. Its function is to use the principle of photochemical reaction to convert the diffracted and filtered optical information in the lithography system into chemical energy, and then complete the masking process. Reproduction of die graphics.
  • Sub-step 3043 etching the metal oxide semiconductor layer thin film and the thin film including the lanthanide metal element with the same etching solution to form an active layer and a functional layer stacked on the active layer.
  • the metal oxide semiconductor layer thin film and the thin film including the lanthanide metal element may be etched by the same etching solution to form the active layer and the functional layer stacked on the active layer.
  • the active layer and the functional layer stacked on the active layer are formed through one patterning process.
  • the material of the functional layer may include praseodymium (Pr), samarium (Sm), cerium (Ce) and other unitary or multi-element oxides of various lanthanide metals, for example, may include praseodymium oxide, samarium oxide, cerium oxide, indium zinc oxide , one or more of indium zinc praseodymium oxide and indium zinc samarium oxide.
  • Pr praseodymium
  • Sm samarium
  • Ce cerium
  • other unitary or multi-element oxides of various lanthanide metals for example, may include praseodymium oxide, samarium oxide, cerium oxide, indium zinc oxide , one or more of indium zinc praseodymium oxide and indium zinc samarium oxide.
  • FIG. 7 is another schematic structural diagram of the base substrate at the end of step 3043.
  • the metal oxide semiconductor layer film and the film including lanthanide metal elements are processed to obtain an active layer.
  • Sub-step 3044 removing the first photoresist pattern.
  • the first photoresist pattern may be removed by lift-off.
  • Step 305 annealing the active layer and the functional layer to diffuse the lanthanide metal elements in the functional layer to the active layer.
  • the annealing treatment of the active layer and the functional layer can make the lanthanide metal elements in the functional layer diffuse to the active layer on the one hand, and can make the active layer have higher corrosion resistance on the other hand.
  • annealing treatment is a metal heat treatment process.
  • the metal can be slowly heated to a certain temperature, kept for a sufficient time, and then cooled at a suitable speed.
  • the temperature of the annealing treatment may be 200-450 degrees Celsius
  • the time may be 0.5-3 hours
  • the atmosphere may include dry air or oxygen.
  • the annealing process is performed in dry air and oxygen to avoid the influence of impurities such as nitrogen or water vapor on the annealing process.
  • the lanthanide metal elements in the functional layer can diffuse to the surface of the active layer, and the lanthanide metal elements diffused into the active layer can form trap states in the active layer, and the active layer is exposed to light.
  • the generated photo-generated electrons can be captured by the trap states, so that the photo-generated electrons are greatly reduced, thereby improving the light stability of the active layer.
  • Photogenerated electrons refer to the fact that when light irradiates a semiconductor, if the energy of the photons is equal to or greater than the forbidden band width of the semiconductor, the electrons in the valence band absorb the photons and then enter the conduction band to generate photogenerated electron-hole pairs.
  • the size of the forbidden band width determines whether the material has semiconductor properties or insulator properties.
  • Semiconductors have a small band gap, and when the temperature increases, electrons can be excited to pass to the conduction band, making the material conductive.
  • Insulators have large band gaps and are poor conductors of electricity even at higher temperatures.
  • the lanthanide metal elements in the functional layer can diffuse into the surface of the active layer with a thickness of less than or equal to 10 nanometers, or the lanthanide metal elements in the functional layer can diffuse into the surface of the active layer.
  • the thickness is less than or equal to 5 nanometers, and the mass percentage of lanthanide metal elements in the active layer is greater than or equal to 0.5% and less than or equal to 10%.
  • the lanthanide metal element diffused into the active layer can improve the light stability of the active layer.
  • FIG. 8 is another schematic diagram of the structure of the base substrate at the end of step 305 .
  • the active layer 116 and the functional layer 117 are annealed, so that the lanthanide in the functional layer 117 is annealed.
  • the metal element Ln is diffused to the surface of the active layer on the side away from the base substrate 111 .
  • Step 306 remove the functional layer.
  • the functional layer on the active layer can be removed by an etching process. Since the active layer after annealing has high corrosion resistance, the active layer can be prevented from being etched in the process of etching the functional layer. damaged. Removing the functional layer can prevent the functional layer from affecting the performance of the active layer.
  • the etching process may include dry etching or wet etching.
  • FIG. 9 is another schematic structural diagram of the base substrate at the end of step 306 . After all functional layers are etched, an active layer with high corrosion resistance is left.
  • Step 307 forming a source electrode and a drain electrode on the active layer.
  • forming the source electrode and the drain electrode on the active layer can increase the contact area between the active layer and the source level and the drain level, thereby improving the performance of the metal oxide TFT.
  • the process of forming the source and drain electrodes on the active layer may include: forming a source-drain metal layer on the base substrate on which the active layer is formed, and forming a third photoresist pattern on the source-drain metal layer; The metal layer is etched so that the source and drain metal layers form source and drain electrodes.
  • step 307 in FIG. 10 ends, another schematic structural diagram of the base substrate is to form a source-drain metal layer on the base substrate 111 on which the active layer 116 is formed, and then the source-drain metal layer is formed on the base substrate 111 formed with the active layer 116 .
  • the metal layer is subjected to a patterning process to form the source electrode 118 and the drain electrode 119 .
  • the embodiments of the present application provide a method for manufacturing a metal oxide TFT.
  • the active layer and the functional layer are annealed, and the function is
  • the lanthanide metal elements in the layer are diffused into the active layer; the lanthanide metal elements diffused into the active layer can form trap states in the active layer, and the photogenerated electrons generated by the light on the active layer can be captured by the trap states , thereby improving the light stability of the active layer.
  • the problem of poor photostability of the active layer of the metal oxide TFT in the related art is solved, and the effect of improving the photostability of the active layer of the metal oxide TFT is achieved.
  • FIG. 11 is a flowchart of another method for manufacturing a metal oxide TFT provided in an embodiment of the present application, and the method may include:
  • Step 401 Obtain a base substrate.
  • Step 402 forming a gate on the base substrate.
  • step 402 reference may be made to the step 302 in the above-mentioned embodiment shown in FIG. 2, which is not repeated in this embodiment of the present application.
  • the structure of the base substrate may also refer to FIG. 3.
  • Step 403 forming a gate insulating layer on the gate pattern.
  • step 403 reference may be made to step 303 in the above-mentioned embodiment shown in FIG. 2, which is not repeated in this embodiment of the present application.
  • step 403 ends reference may also be made to FIG. 4 for the structure of the base substrate.
  • Step 404 forming an active layer made of a metal oxide semiconductor material on the gate insulating layer and a functional layer stacked on the active layer.
  • step 404 reference may be made to step 304 in the embodiment shown in FIG. 2, which is not repeated in this embodiment of the present application.
  • step 404 ends reference may also be made to FIG. 7 for the structure of the base substrate.
  • step 405 the active layer and the functional layer are processed to diffuse the lanthanide metal elements in the functional layer to the active layer.
  • step 405 reference may be made to step 305 in the above-mentioned embodiment shown in FIG. 2, which is not repeated in this embodiment of the present application.
  • step 404 ends, reference may also be made to FIG. 8 for the structure of the base substrate.
  • Step 406 forming a source-drain metal layer on the base substrate on which the functional layer is formed.
  • a source-drain metal layer is formed on the base substrate on which the functional layer is formed.
  • FIG. 12 is another schematic structural diagram of the base substrate at the end of step 406 , and the source-drain metal layer 211 is formed on the base substrate 111 on which the functional layer 117 is formed.
  • Step 407 forming a second photoresist pattern on the source-drain metal layer.
  • Step 408 Etch the source-drain metal layer and the functional layer, so that the source-drain metal layer forms the source-drain, and etch away the part of the functional layer outside the first area, where the source-drain is in the area.
  • the orthographic projection region on the source layer, the source and drain electrodes include a source electrode and a drain electrode.
  • the source-drain metal layer and the functional layer may be etched with the same etchant, so that the source-drain metal layer forms the source-drain electrode.
  • the etching treatment methods include dry etching and wet etching.
  • the first region is an orthographic projection region of the source and drain electrodes on the active layer.
  • the active layer after the annealing treatment has high resist properties; the active layer can be kept from being damaged in the process of etching the functional layer.
  • FIG. 13 is another schematic structural diagram of the base substrate at the end of step 408 , and a patterning process is performed on the source and drain metal layer 211 to form the source electrode 212 and the drain electrode 213 .
  • Part of the functional layer outside the first region is etched to remove part of the functional layer outside the first region.
  • a metal layer 1171 including a lanthanide metal element exists between the active layer 116 and the source and drain electrodes.
  • the source-drain metal layer is formed on the functional layer, and then the source-drain metal layer and the functional layer are processed to achieve the effect of forming the source-drain level and removing the functional layer in one process, saving the manufacturing process of the metal oxide TFT.
  • Step 409 removing the second photoresist.
  • the embodiments of the present application provide a method for manufacturing a metal oxide TFT.
  • the active layer and the functional layer are annealed, and the function is
  • the lanthanide metal elements in the layer are diffused into the active layer; the lanthanide metal elements diffused into the active layer can form trap states in the active layer, and the photogenerated electrons generated by the light on the active layer can be captured by the trap states , thereby improving the light stability of the active layer.
  • the problem of poor photostability of the active layer of the metal oxide TFT in the related art is solved, and the effect of improving the photostability of the active layer of the metal oxide TFT is achieved.
  • FIG. 14 is a flowchart of another method for manufacturing a metal oxide TFT provided in an embodiment of the present application, and the method may include:
  • Step 501 Obtain a base substrate.
  • Step 502 forming a gate on the base substrate.
  • step 502 reference may be made to the step 302 in the embodiment shown in FIG. 2, which is not repeated in this embodiment of the present application.
  • the structure of the base substrate may also refer to FIG. 3.
  • Step 503 forming a gate insulating layer on the gate pattern.
  • step 503 reference may be made to step 303 in the embodiment shown in FIG. 2, which is not repeated in this embodiment of the present application.
  • step 503 ends reference may also be made to FIG. 4 for the structure of the base substrate.
  • Step 504 forming an active layer made of metal oxide semiconductor material on the gate insulating layer.
  • the active layer can be formed by first forming a metal oxide semiconductor film on the gate insulating layer, and forming a fourth photoresist pattern on the metal oxide semiconductor film; The etching solution etches the metal oxide semiconductor thin film to form an active layer, and then removes the fourth photoresist.
  • step 504 may include the following two sub-steps:
  • Sub-step 5041 forming a metal oxide semiconductor thin film on the gate insulating layer.
  • the metal oxide semiconductor thin film is a whole-layer structure and covers the gate insulating layer. Metal oxide semiconductor thin films can be formed by deposition.
  • FIG. 16 is another schematic structural diagram of the base substrate at the end of step 5041 , and the metal oxide semiconductor thin film 311 is formed on the base substrate 111 on which the gate insulating layer 113 is formed.
  • Sub-step 5042 processing the metal oxide semiconductor thin film to obtain an active layer.
  • FIG. 17 is another schematic diagram of the structure of the base substrate at the end of step 5042.
  • the metal oxide semiconductor thin film is processed through a patterning process to obtain the active layer 312.
  • the active layer 312 is surrounded by a top surface, a bottom surface, and a side surface connecting the top surface and the bottom surface, and the bottom surface faces the base substrate 111 .
  • Step 505 forming a thin film including a lanthanide metal element on the base substrate on which the active layer is formed.
  • the material of the thin film including the lanthanide metal element may include unit or multiple oxides of lanthanide metal such as praseodymium (Pr), samarium (Sm), and cerium (Ce);
  • the thin film of lanthanide metal element, the thin film includes a functional layer, the material of the thin film including lanthanide metal element can include praseodymium oxide, samarium oxide, cerium oxide, indium zinc oxide, indium zinc praseodymium oxide, indium zinc samarium oxide one or more of.
  • FIG. 18 is another schematic diagram of the structure of the base substrate at the end of step 505, and a thin film 313 including a lanthanide metal element is formed on the base substrate 111 on which the active layer 312 is formed. , the thin film 313 including the lanthanide metal element covers the top surface and the side surface of the active layer 312 .
  • Step 506 annealing the active layer and the thin film including the lanthanide metal element, so that the lanthanide metal element is diffused from the thin film including the lanthanide metal element to the top surface and the side surface of the active layer.
  • An annealing process is performed on the active layer and the thin film including the lanthanide metal element.
  • the annealing process For the specific implementation of the annealing process, reference may be made to the implementation of the annealing process in the embodiment shown in FIG. 2 .
  • the thin film including the lanthanide metal element covers the top surface and the side surface of the active layer, so that the lanthanide metal element in the thin film including the lanthanide metal element can diffuse to the top surface and the side surface of the active layer, thereby improving the active layer. Light stability on the sides of the layer.
  • FIG. 19 is another structural schematic diagram of the base substrate at the end of step 506.
  • the active layer and the thin film 313 including the lanthanide metal element are annealed, so that the thin film including the lanthanide metal element is annealed.
  • the lanthanide metal elements in 313 diffuse to the active layer 312 .
  • Step 507 performing a removal process on the thin film including the lanthanide metal element.
  • Removing the lanthanide metal-containing thin film may include etching the entire lanthanide metal-containing thin film.
  • FIG. 20 is another schematic diagram of the structure of the base substrate at the end of step 507. All thin films including lanthanide metal elements are etched, and the active layer 312 with high corrosion resistance is retained. .
  • Step 508 forming a source electrode and a drain electrode on the active layer.
  • step 508 reference may be made to step 307 in the above-mentioned embodiment shown in FIG. 2, and details are not described herein again in this embodiment of the present application.
  • FIG. 21 is another schematic structural diagram of the base substrate at the end of step 508 .
  • a source/drain metal layer is formed on the base substrate 111 on which the active layer 312 is formed, and then the source/drain metal layer is formed on the base substrate 111 on which the active layer 312 is formed.
  • the drain metal layer is subjected to a patterning process to form the source electrode 118 and the drain electrode 119 .
  • the embodiments of the present application provide a method for manufacturing a metal oxide TFT.
  • the active layer and the functional layer are annealed, and the function is
  • the lanthanide metal elements in the layer are diffused into the active layer; the lanthanide metal elements diffused into the active layer can form trap states in the active layer, and the photogenerated electrons generated by the light on the active layer can be captured by the trap states , thereby improving the light stability of the active layer.
  • the problem of poor photostability of the active layer of the metal oxide TFT in the related art is solved, and the effect of improving the photostability of the active layer of the metal oxide TFT is achieved.
  • FIG. 22 is a flowchart of another method for manufacturing a metal oxide TFT provided in an embodiment of the present application, and the method may include:
  • Step 601 Obtain a base substrate.
  • Step 602 forming a buffer layer, a metal oxide semiconductor thin film and a thin film including a lanthanide metal element on the base substrate in sequence.
  • the buffer layer, the metal oxide semiconductor film and the film including the lanthanide metal element are all of the whole layer structure, and are sequentially covered on the substrate substrate.
  • the buffer layer can be formed of silicon nitride material.
  • the buffer layer, the metal oxide semiconductor film And thin films including lanthanide metal elements can be formed by means of deposition.
  • FIG. 23 is another schematic structural diagram of the base substrate at the end of step 602 .
  • a buffer layer 411 On the base substrate 111 , a buffer layer 411 , a metal oxide semiconductor film 412 and a lanthanide metal film are formed. Elemental film 413.
  • Step 603 processing the metal oxide semiconductor thin film and the thin film including lanthanide metal elements to obtain an active layer and a functional layer.
  • step 603 reference may be made to the sub-step 3042, the sub-step 3043, and the sub-step 3044 in the above-mentioned embodiment shown in FIG. 2, which are not described again in this embodiment of the present application.
  • FIG. 24 is another schematic structural diagram of the base substrate at the end of step 603.
  • the metal oxide semiconductor thin film and the thin film including lanthanide metal elements are processed through a patterning process to obtain the active layer 414 and functional layer 415.
  • Step 604 annealing the active layer and the functional layer to diffuse the lanthanide metal elements in the functional layer to the active layer.
  • step 604 reference may be made to step 305 in the above-mentioned embodiment shown in FIG. 2, and details are not described herein again in this embodiment of the present application.
  • FIG. 25 is another schematic structural diagram of the base substrate at the end of step 604 .
  • the active layer and the functional layer 415 are annealed, so that the lanthanide metal in the functional layer 415 is annealed.
  • the elements diffuse to the active layer 414 .
  • Step 605 remove the functional layer.
  • step 605 reference may be made to step 306 in the above-mentioned embodiment shown in FIG. 2, and details are not described herein again in this embodiment of the present application.
  • FIG. 26 is another schematic structural diagram of the base substrate at the end of step 605 , all functional layers are etched away, and the active layer 414 with high etching resistance is retained.
  • Step 606 forming a gate insulating structure on the active layer.
  • the material of the gate insulating structure can be silicon dioxide, silicon nitride or a mixed material of silicon dioxide and silicon nitride, a gate insulating material layer can be formed on the active layer by deposition, and then the gate insulating material can be formed on the active layer by deposition. layer performs a patterning process to form a gate insulating structure.
  • FIG. 27 is another schematic structural diagram of the base substrate at the end of step 606 .
  • a gate insulating material layer is formed 414 on the active layer, and then a patterning is performed on the gate insulating material layer.
  • the process forms gate insulating structures 416 .
  • Step 607 forming a gate on the gate insulating structure.
  • the gate can be formed of a metal material, a gate metal layer can be formed on the gate insulating structure by deposition, and then a patterning process is performed on the gate metal layer to form the gate.
  • FIG. 28 is another schematic structural diagram of the base substrate at the end of step 607 .
  • a gate metal layer is formed on the gate insulating structure 416 , and then the gate metal layer is executed once.
  • a patterning process forms gate 417 .
  • the embodiments of the present application provide a method for manufacturing a metal oxide TFT.
  • the active layer and the functional layer are annealed, and the function is
  • the lanthanide metal elements in the layer are diffused into the active layer; the lanthanide metal elements diffused into the active layer can form trap states in the active layer, and the photogenerated electrons generated by the light on the active layer can be captured by the trap states , thereby improving the light stability of the active layer.
  • the problem of poor photostability of the active layer of the metal oxide TFT in the related art is solved, and the effect of improving the photostability of the active layer of the metal oxide TFT is achieved.
  • FIG. 29 is a flowchart of another method for manufacturing a metal oxide TFT provided in an embodiment of the present application, and the method may include:
  • Step 701 Obtain a base substrate.
  • Step 702 sequentially forming a buffer layer and a metal oxide semiconductor thin film on the base substrate.
  • Both the buffer layer and the metal oxide semiconductor thin film are of whole-layer structure, and are sequentially covered on the base substrate.
  • the buffer layer can be formed of silicon nitride material, and the buffer layer and the metal oxide semiconductor thin film can be formed by deposition.
  • FIG. 30 is another schematic structural diagram of the base substrate at the end of step 702 .
  • the buffer layer 411 and the active layer thin film 512 are formed on the base substrate 111 .
  • Step 703 processing the metal oxide semiconductor thin film to obtain an active layer.
  • the metal oxide semiconductor thin film can be processed by one patterning process to form the active layer.
  • FIG. 31 is another schematic structural diagram of the base substrate at the end of step 703 .
  • the metal oxide semiconductor thin film is processed by one patterning process to obtain the active layer 513 .
  • Step 704 forming a thin film including a lanthanide metal element on the base substrate on which the active layer is formed.
  • step 704 reference may be made to step 505 in the above-mentioned embodiment shown in FIG. 14, and details are not described herein again in this embodiment of the present application.
  • FIG. 32 is another schematic structural diagram of the base substrate at the end of step 704 .
  • a thin film 514 including a lanthanide metal element is formed on the base substrate 111 on which the active layer 513 is formed.
  • Step 705 annealing the active layer and the thin film including the lanthanide metal element, so that the lanthanide metal element in the thin film including the lanthanide metal element diffuses to the active layer.
  • step 705 reference may be made to step 506 in the above-mentioned embodiment shown in FIG. 14, and details are not described herein again in this embodiment of the present application.
  • FIG. 33 which is another schematic structural diagram of the base substrate at the end of step 705 , the active layer 513 and the thin film 514 including the lanthanide metal element are annealed, so that the film including the lanthanide metal element is annealed.
  • the lanthanide metal elements in the thin film 514 diffuse to the top and side surfaces of the active layer 513 .
  • Step 706 performing a removal process on the thin film including the lanthanide metal element.
  • step 706 reference may be made to step 507 in the above-mentioned embodiment shown in FIG. 14, and details are not described herein again in this embodiment of the present application.
  • FIG. 34 is another schematic diagram of the structure of the base substrate at the end of step 706. All the thin films including lanthanide metal elements are etched, and the active layer 513 with high corrosion resistance is retained. .
  • Step 707 forming a gate insulating structure on the active layer.
  • step 707 reference may be made to step 606 in the above-mentioned embodiment shown in FIG. 22, and details are not described herein again in this embodiment of the present application.
  • FIG. 35 is another schematic structural diagram of the base substrate at the end of step 706 .
  • a gate insulating material layer is formed 513 on the active layer, and then a patterning is performed on the gate insulating material layer. The process forms a gate insulating structure 515 .
  • Step 708 forming a gate on the gate insulating structure.
  • step 708 reference may be made to step 607 in the above-mentioned embodiment shown in FIG. 22, and details are not described herein again in this embodiment of the present application.
  • FIG. 36 is another schematic structural diagram of the base substrate at the end of step 706 , a gate metal layer is formed on the gate insulating structure 515 , and then the gate metal layer is executed once. A patterning process forms gate 516 .
  • the embodiments of the present application provide a method for manufacturing a metal oxide TFT.
  • the active layer and the functional layer are annealed, and the function is
  • the lanthanide metal elements in the layer are diffused into the active layer; the lanthanide metal elements diffused into the active layer can form trap states in the active layer, and the photogenerated electrons generated by the light on the active layer can be captured by the trap states , thereby improving the light stability of the active layer.
  • the problem of poor photostability of the active layer of the metal oxide TFT in the related art is solved, and the effect of improving the photostability of the active layer of the metal oxide TFT is achieved.
  • the embodiment of the present application further provides a metal oxide TFT, and the metal oxide TFT can be manufactured by the manufacturing method of the metal oxide TFT in the above embodiment.
  • the metal oxide TFT may include an active layer of a metal oxide semiconductor on a base substrate, the active layer having a lanthanide metal element therein.
  • FIG. 10 for the structure of the metal oxide TFT, reference may be made to FIG. 10 , FIG. 13 , FIG. 21 , FIG. 28 and FIG. 36 .
  • an active layer 116 is provided on the base substrate 111 , and the lanthanide metal element Ln in the active layer 116 can improve the light stability of the active layer 116 .
  • the embodiments of the present application provide a metal oxide TFT.
  • the metal oxide TFT may include an active layer of a metal oxide semiconductor on a base substrate, and the active layer has a lanthanide metal element. ;
  • the lanthanide metal elements in the active layer can form trap states in the active layer, and the photogenerated electrons generated by the active layer under illumination can be captured by the trap states, thereby improving the illumination stability of the active layer.
  • the problem of poor photostability of the active layer of the metal oxide TFT in the related art is solved, and the effect of improving the photostability of the active layer of the metal oxide TFT is achieved.
  • FIG. 37 is a schematic structural diagram of another metal oxide TFT shown in the embodiment of the present application.
  • Lanthanide metal element Ln The lanthanide metal element Ln diffused in the material of the specified depth D can reduce the irradiation of the active layer from above the active layer 611 (in the upper direction shown in FIG. 37 , the direction may be the direction of the display panel displaying images) The effect of light on the active layer 611 on the active layer 611 .
  • the side of the active layer away from the base substrate is the side that is in contact with the functional layer having lanthanide metal elements, so the lanthanide metal elements will also start to diffuse into the active layer from this side, and then lanthanum
  • the metalloid elements are also mainly distributed on the side of the active layer away from the base substrate.
  • FIG. 38 is a schematic structural diagram of another substrate shown in the embodiment of the present application.
  • the active layer is a single layer, which is a channel layer of a TFT, consisting of a top surface S1 and a bottom surface S2 and the side surface S3 connecting the top surface and the bottom surface is enclosed, and the side of the active layer away from the base substrate includes the top surface S1 and the side surface S3 of the active layer.
  • the mass percentage per unit volume of the lanthanide metal element in the active layer gradually decreases from the top surface of the active layer in the direction toward the base substrate.
  • the lanthanide metal elements start to diffuse from the surface of the active layer away from the substrate substrate to the inside of the active layer, the mass percentage of the lanthanide metal elements per unit volume in the active layer, along the direction toward the substrate The direction of the base substrate gradually decreases.
  • the lanthanide metal elements include one or more of praseodymium, samarium, and cerium.
  • Lanthanide metal elements can also include one or more of all lanthanide metal elements.
  • the specified depth D is less than or equal to 10 nanometers, and within this range, the light stabilization layer can improve the light stability of the active layer.
  • the specified depth D is greater than or equal to 5 nanometers, the light stabilization layer can better improve the light stability of the active layer.
  • the metal oxide TFT further includes a source and drain electrodes, and a metal layer including a lanthanide metal element located between the active layer and the source and drain electrodes, the source and drain electrodes include a source electrode and a drain electrode, and the material of the metal layer includes Unitary or multicomponent oxides of lanthanide metals.
  • a metal layer 1171 including a lanthanide metal element is located between the active layer 116 and the source and drain electrodes, and the source and drain electrodes include the source electrode 212 and the drain electrode 213 .
  • the mass percentage of lanthanide metal elements in the active layer is greater than or equal to 0.5% and less than or equal to 10%.
  • the light stabilization layer can function to improve the light stability of the active layer.
  • the metal oxide TFT further includes a gate electrode 112 and a gate insulating layer 113 , the gate electrode 112 is located on the base substrate 111 , and the gate insulating layer 113 is located on the base substrate 111 provided with the gate electrode 112 . upper; the active layer 611 is located on the gate insulating layer 113 .
  • the embodiments of the present application provide a metal oxide TFT.
  • the metal oxide TFT may include an active layer of a metal oxide semiconductor on a base substrate, and the active layer has a lanthanide metal element. ;
  • the lanthanide metal elements in the active layer can form trap states in the active layer, and the photogenerated electrons generated by the active layer under illumination can be captured by the trap states, thereby improving the illumination stability of the active layer.
  • the problem of poor photostability of the active layer of the metal oxide TFT in the related art is solved, and the effect of improving the photostability of the active layer of the metal oxide TFT is achieved.
  • the embodiment of the present application further provides an x-ray detector, and the x-ray detector may include the metal oxide TFT of FIG. 10 , FIG. 13 , FIG. 21 , FIG. 28 , or FIG. 36 .
  • the X-ray detector may include a substrate, a plurality of detection units disposed on the substrate, and a scintillation layer disposed on the plurality of detection units, each detection unit may include a metal oxide TFT and a photosensitive structure, and the photosensitive structure is disposed on the metal oxide On the drain of the TFT, and is electrically connected to the metal oxide TFT, the scintillation layer is used to convert X-rays into visible light, the photosensitive structure is used to convert the visible light into electrical signals, and the metal oxide TFT is used to read the electrical signals. switch.
  • An embodiment of the present application further provides a display panel, and the display panel may include the metal oxide TFT shown in FIG. 10 , FIG. 13 , FIG. 21 , FIG. 28 or FIG. 36 .
  • the display panel can be incorporated into various products or components with display functions, such as liquid crystal panels, electronic paper, mobile phones, tablet computers, televisions, notebook computers, digital photo frames, and navigators.
  • FIG. 39 is a schematic structural diagram of another metal oxide TFT shown in an embodiment of the present application.
  • the metal oxide TFT includes:
  • the metal oxide TFT also includes a gate insulating layer 716 .
  • the first metal oxide semiconductor layer includes indium (In), gallium (Ga), zinc (Zn), tin (Sn), aluminum (Al), tungsten (W), zirconium (Zr), hafnium (Hf), One or more of silicon (Si); the channel layer 7151 contains a lanthanide metal doped material, and the lanthanide element in the lanthanide metal doped material can form trap states in the active layer, and the active layer Photogenerated electrons generated by illumination can be captured by the trap states, thereby improving the illumination stability of the active layer.
  • a lanthanide metal dopant material is contained on the upper surface in the channel layer and at a thickness from the upper surface; the lanthanide metal content increases with distance from the upper surface in the channel layer has a decreasing trend.
  • the active layer 715 may include the top surface and the side surface away from the base substrate, due to the annealing process Before proceeding, the functional layer including the lanthanide metal element can be stacked on the top surface of the side of the active layer 715 away from the base substrate, then during the annealing process, the lanthanide metal element can move away from the base substrate from the active layer.
  • the top surface of the active layer begins to diffuse to the inside of the active layer, and the sides on both sides of the active layer can contain less lanthanide metals, that is, the channel layer 7151 can be formed so that the content of lanthanide metals near the middle of the channel layer 7151 Greater than the lanthanide metal content in the middle position away from the channel layer 7151 .
  • the embodiments of the present application provide a metal oxide TFT, and the active layer of the metal oxide TFT may include a channel layer containing a lanthanide metal doped material;
  • the lanthanide metal elements can form trap states in the active layer, and photogenerated electrons generated by the active layer under illumination can be captured by the trap states, thereby improving the illumination stability of the active layer.
  • the problem of poor photostability of the active layer of the metal oxide TFT in the related art is solved, and the effect of improving the photostability of the active layer of the metal oxide TFT is achieved.
  • the active layer 814 is provided with a source electrode 815 and a drain electrode 816 ;
  • a metal layer 817A is disposed between the channel layer 8141 and the source electrode 815 , and the metal layer 817A includes the same lanthanide metal element as the lanthanide metal dopant material; between the channel layer 8141 and the drain electrode 816 of the active layer 814
  • a metal layer 817B is provided, and the metal layer 817B includes the same lanthanide metal element as the lanthanide metal dopant material.
  • the metal oxide TFT may further include a base substrate 811 , a gate electrode 812 and a gate insulating layer 813 .
  • the film layer including the two metal layers and the source-drain metal layer including the source electrode and the drain electrode can be processed by one patterning process.
  • the active layer There is a metal layer between the channel layer and the source electrode, and there is also a metal layer between the channel layer and the drain electrode of the active layer, and the one-time patterning process can reduce the manufacturing process steps of the metal oxide TFT.
  • the metal layer under the source electrode and the drain electrode can be made of the same film layer, the thickness of the metal layer between the source electrode and the channel layer is the same as that of the metal layer between the drain electrode and the channel layer. The thickness of the metal layer is the same, which can make the performance of the source stage and the drain stage more balanced.
  • the outer sidewall S4 of the metal layer 817A between the source electrode 815 and the channel layer 8141 (the outer sidewall of the metal layer may refer to one side along the outward direction from the center of the channel layer) Sidewall) and one outer sidewall S6 of the channel layer 8141 are on the same slope, and the slope angle direction is the same, the outer sidewall S5 of the metal layer 817B between the drain 816 and the channel layer 8141 and the other side of the channel layer.
  • One outer side wall S7 is on the same slope, and the slope angle direction is the same.
  • This setting can avoid poor contact between the source level and the drain level and the active layer due to the irregularity of the outer side surface of the active layer and the metal block, and further The performance of the metal oxide TFT can be improved.
  • the outer sidewall S6 and the outer sidewall S4 may be formed in one patterning process, and the outer sidewall S7 and the outer sidewall S5 may also be formed in one patterning process.
  • the inner sidewall S8 of the metal layer 817A between the source electrode 815 and the channel layer 8141 is on the same slope as the inner sidewall S9 of the source electrode 815, and the slope angle direction is the same.
  • the inner sidewall S10 of the metal layer 817B and the inner sidewall S11 of the drain 816 are on the same slope, and the slope angle direction is the same. This setting can avoid the irregularity of the source, drain and inner sides of the metal layer.
  • the source and drain levels are cracked with the metal layer, which in turn can improve the performance of the metal oxide TFT.
  • the active layer 914 further includes a back channel protection layer 9141 , and the channel layer 9142 may be doped Amorphous indium gallium tin oxide (a-IGTO) doped with lanthanide metals can have a high mobility (eg greater than 30), the back channel protection layer 9141 is located on the channel layer 9142, and the back channel protection layer 9141 can be polycrystalline indium gallium zinc oxide (p-IGZO), lanthanide doped indium zinc oxide (Ln-IZO) or lanthanide doped indium gallium zinc oxide (Ln-IGZO). It has acid corrosion resistance and can improve the stability of the active layer.
  • a-IGTO Amorphous indium gallium tin oxide
  • Ln-IZO lanthanide doped indium zinc oxide
  • Ln-IGZO lanthanide doped indium gallium zinc oxide
  • the active layer 914 further includes a light-shielding protective layer 9143
  • the light-shielding protective layer 9143 includes indium zinc oxide (Ln- IZO) or lanthanide-doped indium gallium zinc oxide (Ln-IGZO)
  • the light-shielding protective layer 9143 is located on the other side of the channel layer 9142 away from the back channel protective layer 9141, and can be irradiated with light from the back side to the channel layer, which can further improve the light stability of the active layer and reduce the leakage current.
  • the embodiments of the present application provide a metal oxide TFT, and the active layer of the metal oxide TFT may include a channel layer containing a lanthanide metal doped material;
  • the lanthanide metal elements can form trap states in the active layer, and photogenerated electrons generated by the active layer under illumination can be captured by the trap states, thereby improving the illumination stability of the active layer.
  • the problem of poor photostability of the active layer of the metal oxide TFT in the related art is solved, and the effect of improving the photostability of the active layer of the metal oxide TFT is achieved.

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Abstract

本申请公开了一种金属氧化物TFT及其制造方法、x射线探测器和显示面板，属于电子技术领域。所述方法包括：在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层后，对有源层以及功能层进行退火处理，功能层中的镧系金属元素扩散至有源层；扩散至有源层中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。

Description

金属氧化物TFT及制造方法、x射线探测器和显示面板
本申请要求于2021年03月15日提交的申请号为202110276323.3、发明名称为“金属氧化物TFT及制造方法、x射线探测器和显示面板”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子技术领域，特别涉及一种金属氧化物TFT及制造方法、x射线探测器和显示面板。
背景技术
金属氧化物薄膜晶体管(英文：Thin Film Transistor，简写：TFT)是一种可以实现开关功能的器件。
相关技术中有一种金属氧化物TFT的制造方法，该方法包括在衬底基板上通过金属氧化物半导体材料形成有源层。
但是，上述方法制造的金属氧化物TFT中，有源层的光稳定性较差。
发明内容
本申请实施例提供了一种金属氧化物TFT及制造方法、x射线探测器和显示面板。所述技术方案如下：
根据本申请的一方面，提供了一种金属氧化物TFT的制造方法，所述方法包括：
在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在所述有源层上的包括镧系金属元素的功能层；
对所述有源层以及所述功能层进行退火处理，所述功能层中的镧系金属元素扩散至所述有源层，所述有源层转变为有源层。
可选的，所述退火处理的温度为200～450摄氏度，时间为0.5～3小时，气氛包括干燥空气或者氧气。
可选的，所述在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层，包括：
在所述衬底基板上依次形成金属氧化物半导体薄膜和包括镧系金属元素的薄膜；
在所述包括镧系金属元素的薄膜上形成第一光刻胶图案；
通过同一刻蚀液对所述金属氧化物半导体层薄膜以及所述包括镧系金属元素的薄膜进行刻蚀，以形成所述有源层以及层叠在所述有源层上的功能层；
去除所述第一光刻胶图案。
可选的，对所述功能层进行去除处理。
可选的，所述对所述功能层进行去除处理，包括：
在形成有所述功能层的衬底基板上形成源漏金属层；
在所述源漏金属层上形成第二光刻胶图案；
对所述源漏金属层以及所述功能层进行刻蚀处理，以使所述源漏金属层形成源漏极，并刻蚀掉所述功能层处于第一区域外的部分，所述第一区域为所述源漏极在所述有源层上的正投影区域，所述源漏极包括源极和漏极。
可选的，所述在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在所述有源层上的包括镧系金属元素的功能层，包括：
在所述衬底基板上形成所述有源层；
在形成有所述有源层的衬底基板上形成包括镧系金属元素的薄膜，所述有源层由顶面、底面以及连接所述顶面和所述底面的侧面围成，所述底面朝向所述衬底基板，所述包括镧系金属元素的薄膜覆盖所述有源层的顶面以及侧面；
所述对所述有源层以及所述功能层进行退火处理，包括：
对所述有源层以及所述包括镧系金属元素的薄膜进行退火处理，以使镧系金属元素从扩散至所述有源层的顶面以及侧面。
可选的，所述功能层的材料包括镧系金属的单元或多元氧化物。
可选的，所述功能层的材料包括氧化镨、氧化钐、氧化铈、铟锌氧化物、铟锌镨氧化物、铟锌钐氧化物中的一种或多种。
另一方面，提供了一种金属氧化物TFT，所述金属氧化物TFT是由上述一方面中任一所述的方法制成，所述金属氧化物TFT包括：
位于衬底基板上的金属氧化物半导体的有源层，所述有源层中具有镧系金属元素。
可选的，所述有源层远离所述衬底基板的一面上，指定深度的材料中扩散有所述镧系金属元素。
可选的，所述有源层为单层，为TFT的沟道层，由顶面、底面以及连接所述顶面和所述底面的侧面围成，所述有源层远离所述衬底基板的一面包括所述有源层的顶面以及侧面。
可选的，所述镧系金属元素在所述有源层中单位体积的质量百分比，从所述有源层的顶面沿朝向所述衬底基板的方向逐渐减小。
可选的，所述镧系金属元素包括镨、钐、铈中的一种或多种。
可选的，所述指定深度小于或等于10纳米。
可选的，所述金属氧化物TFT还包括源漏极，以及位于所述有源层和所述源漏极之间的包括镧系金属元素的金属层，所述源漏极包括源极和漏极，所述金属层的材料包括镧系金属的单元或多元氧化物。
可选的，所述镧系金属元素在所述有源层中的质量百分比大于或等于0.5％，且小于或等于10％。
另一方面，提供了一种x射线探测器，所述x射线探测器包括上述一方面任一所述的金属氧化物TFT。
另一方面，提供了一种显示面板，所述显示面板包括上述一方面任一所述的金属氧化物TFT。
另一方面，提供了另一种金属氧化物TFT，所述金属氧化物TFT是由上述一方面中任一所述的方法制成，所述金属氧化物TFT包括：
位于衬底基板上的栅极、源极、漏极和有源层；
所述有源层位于所述栅极和所述源极或漏极之间；
所述有源层包括沟道层，所述沟道层为第一金属氧化物半导体层；
所述第一金属氧化物半导体层包括铟、镓、锌、锡、铝、钨、锆、铪、硅中的一种或多种；所述沟道层中含有镧系金属掺杂材料；
所述沟道层中的上表面上以及距离该上表面一定厚度的位置含有镧系金属掺杂材料；所述镧系金属含量随着远离所述沟道层中的上表面的距离增大呈减小的趋势。
可选的，所述有源层上设置有源极和漏极；
所述有源层的沟道层与所述源极之间设置有金属层，所述金属层的金属材料与所述镧系金属掺杂材料为相同的材料；
所述有源层的沟道层与漏极之间设置有金属层，所述金属层包括与所述镧系金属掺杂材料相同的镧系金属元素。
可选的，所述源极和所述沟道层之间的金属层与所述漏极和所述沟道层之间的金属层的厚度相同。
可选的，所述源极和所述沟道层之间的金属层的外侧壁与所述沟道层的一个外侧壁在同一个坡面上，且坡度角方向相同，所述漏极和所述沟道层之间的金属层的外侧壁与所述沟道层的另一个外侧壁在同一个坡面上，且坡度角方向相同；
所述源极和所述沟道层之间的金属层的内侧壁与所述源极的内侧壁在同一个坡面上，且坡度角方向相同，所述漏极和所述沟道层之间的金属层的内侧壁与所述漏极的内侧壁在同一个坡面上，且坡度角方向相同。
可选的，所述有源层还包括背沟道保护层，所述沟道层为掺杂有镧系金属的铟镓锡氧化物、所述背沟道保护层位于所述沟道层上，所述背沟道保护层为结晶铟镓锌氧化物、掺杂镧系金属的铟镓锌氧化物或掺杂镧系金属的铟镓锌氧化物。
可选的，所述有源层还包括遮光保护层，所述遮光保护层包括掺杂镧系金属的铟锌氧化物或掺杂镧系金属的铟镓锌氧化物，所述遮光保护层位于所述沟道层的远离所述背沟道保护层的另一侧。
可选的，所述镧系金属为镨。
本申请实施例提供的技术方案带来的有益效果至少包括：
提供了一种金属氧化物TFT的制造方法。在该方法中，在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层后，对有源层以及功能层进行退火处理，功能层中的镧系金属元素扩散至有源层；扩散至有源层中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本申请实施例提供的一种金属氧化物TFT的制造方法的流程图；
图2是本申请实施例提供的另一种金属氧化物TFT的制造方法的流程图；
图3是图2所示的方法中的衬底基板的一种结构示意图；
图4是图2所示的方法中的衬底基板的另一种结构示意图；
图5是图2所示的方法中的衬底基板的另一种结构示意图；
图6是图2所示的方法中的衬底基板的另一种结构示意图；
图7是图2所示的方法中的衬底基板的另一种结构示意图；
图8是图2所示的方法中的衬底基板的另一种结构示意图；
图9是图2所示的方法中的衬底基板的另一种结构示意图；
图10是图2所示的方法中的衬底基板的另一种结构示意图；
图11是本申请实施例提供的另一种金属氧化物TFT的制造方法的流程图；
图12是图11所示的方法中的衬底基板的另一种结构示意图；
图13是图11所示的方法中的衬底基板的另一种结构示意图；
图14是本申请实施例提供的另一种金属氧化物TFT的制造方法的流程图；
图15是图14所示的方法中的衬底基板的另一种结构示意图；
图16是图14所示的方法中的衬底基板的另一种结构示意图；
图17是图14所示的方法中的衬底基板的另一种结构示意图；
图18是图14所示的方法中的衬底基板的另一种结构示意图；
图19是图14所示的方法中的衬底基板的另一种结构示意图；
图20是图14所示的方法中的衬底基板的另一种结构示意图；
图21是图14所示的方法中的衬底基板的另一种结构示意图；
图22是本申请实施例提供的另一种金属氧化物TFT的制造方法的流程图；
图23是图22所示的方法中的衬底基板的另一种结构示意图；
图24是图22所示的方法中的衬底基板的另一种结构示意图；
图25是图22所示的方法中的衬底基板的另一种结构示意图；
图26是图22所示的方法中的衬底基板的另一种结构示意图；
图27是图22所示的方法中的衬底基板的另一种结构示意图；
图28是图22所示的方法中的衬底基板的另一种结构示意图；
图29是本申请实施例提供的另一种金属氧化物TFT的制造方法的流程图；
图30是图29所示的方法中的衬底基板的另一种结构示意图；
图31是图29所示的方法中的衬底基板的另一种结构示意图；
图32是图29所示的方法中的衬底基板的另一种结构示意图；
图33是图29所示的方法中的衬底基板的另一种结构示意图；
图34是图29所示的方法中的衬底基板的另一种结构示意图；
图35是图29所示的方法中的衬底基板的另一种结构示意图；
图36是图29所示的方法中的衬底基板的另一种结构示意图；
图37是本申请实施例示出的一种金属氧化物TFT的结构示意图；
图38是本申请实施例示出的另一种金属氧化物TFT的结构示意图；
图39是本申请实施例示出的另一种金属氧化物TFT的结构示意图；
图40是本申请实施例示出的另一种金属氧化物TFT的结构示意图；
图41是本申请实施例示出的另一种金属氧化物TFT的结构示意图。
通过上述附图，已示出本申请明确的实施例，后文中将有更详细的描述。这些附图和文字描述并不是为了通过任何方式限制本申请构思的范围，而是通过参考特定实施例为本领域技术人员说明本申请的概念。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请实施方式作进一步地详细描述。
金属氧化物TFT是一种新型的TFT，其可以应用于液晶显示器(英文：Liquid Crystal Display；简写：LCD)、有机发光半导体(英文：Organic Light-Emitting Diode；简写：OLED)显示器、X射线传感器(英文：X-ray transducer)、迷你发光二极管(Mini LED)显示器、量子点发光二极管(英文：Quantum Dot Light Emitting Diodes；简写：QLED)显示器以及低温多晶氧化物技术(英文：Low Temperature Polycrystalline Oxide；简写：LTPO)等中。
金属氧化物TFT应用于显示面板中时，可以位于阵列基板中，阵列基板是显示面板中的一个部件，用于对显示面板进行控制。根据显示面板类型的不同，显示面板中还可以包括其他的部件，例如，当显示面板为液晶显示面板时，该液晶显示面板还可以包括液晶层以及彩膜基板，当显示面板为有机发光二极管显示面板时，该有机发光二极管显示面板中还可以包括有机发光二极管。
阵列基板可以包括衬底基板以及在衬底基板上阵列排布的多个薄膜晶体管，薄膜晶体管可以包括栅极、源极、漏极以及有源层，源极和漏极搭接在有源层上，可以通过栅极上加载的电压，以控制有源层是否将源极和漏极接通， 进而实现薄膜晶体管的功能。
图1是本申请实施例示出的一种金属氧化物TFT的制造方法的流程图，该方法可以包括：
步骤201、在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层。
步骤202、对有源层以及功能层进行退火处理，功能层中的镧系金属元素扩散至有源层。
综上所述，本申请实施例提供了一种金属氧化物TFT的制造方法。在该方法中，在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层后，对有源层以及功能层进行退火处理，功能层中的镧系金属元素扩散至有源层；扩散至有源层中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。
图2是本申请实施例提供的另一种金属氧化物TFT的制造方法的流程图，该方法可以包括：
步骤301、获取衬底基板。
衬底基板的材质可以包括玻璃或者聚酰亚胺等。
步骤302、在衬底基板上形成栅极。
该栅极可以是薄膜晶体管中的结构。在形成该栅极时，首先可以在衬底基板上形成栅金属层(该栅金属层可以由沉积、溅射等方式中的一种方式形成)，之后通过构图工艺对该栅金属层进行处理，以得到栅极。需要说明的是，通过构图工艺可以得到包括多个栅极的栅极图案，该栅极图案中的部分或全部栅极可以参考本申请实施例所涉及的栅极。本申请实施例中，所涉及的构图工艺可以包括光刻胶涂覆、曝光、显影、刻蚀和光刻胶剥离等。
示例性的，如图3所示，图3是步骤302结束时，衬底基板的一种结构示意图，栅极112形成于衬底基板111上，该栅极112的材料可以包括金属。
步骤303、在栅极图形上形成栅绝缘层。
该栅绝缘层可以用于避免栅极与薄膜晶体管中的其它结构短路。
示例性的，如图4所示，图4是步骤303结束时，衬底基板的另一种结构示意图，栅绝缘层113形成于具有栅极112的衬底基板111上，该栅极绝缘层113的材料可以包括二氧化硅、氮化硅或者二氧化硅和氮化硅的混合材料。
步骤304、在栅绝缘层上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层。
如图5所示，步骤304可以包括下面四个子步骤：
子步骤3041、在栅绝缘层上依次形成金属氧化物半导体薄膜和包括镧系金属元素的薄膜。
金属氧化物半导体薄膜和包括镧系金属元素的薄膜均为整层结构，并依次覆盖在栅绝缘层上。金属氧化物半导体薄膜和包括镧系金属元素的薄膜可以通过沉积的方式形成。
金属氧化物半导体薄膜的材料可以包括铟锌氧化物(IZO)、铟镓氧化物(IGO)、铟镓锌氧化物(IGZO)、铟镓锡氧化物(IGTO)、铟锡锌氧化物(ITZO)或者铟(In)、镓(Ga)、锌(Zn)、锡(Sn)、铝(Al)、钨(W)、锆(Zr)、铪(Hf)以及硅(Si)组成的单元或多元金属氧化物。
示例性的，如图6所示，图6是步骤3041结束时，衬底基板的另一种结构示意图，在形成有栅绝缘层113的衬底基板111上形成金属氧化物半导体薄膜114和包含镧系金属元素的薄膜115。
子步骤3042、在包括镧系金属元素的薄膜上形成第一光刻胶图案。
该第一光刻胶图案的形成过程可以包括：在包括镧系金属元素的薄膜上形成光刻胶的膜层，之后对该光刻胶的膜层进行曝光和显影，以形成该第一光刻胶图案。
其中，光刻胶又称光致抗蚀剂，是光刻成像的承载介质，其作用是利用光化学反应的原理将光刻系统中经过衍射、滤波后的光信息转化为化学能量，进而完成掩模图形的复制。
子步骤3043、通过同一刻蚀液对金属氧化物半导体层薄膜以及包括镧系金属元素的薄膜进行刻蚀，以形成有源层以及层叠在有源层上的功能层。
在本申请实施例中，可以通过同一刻蚀液对金属氧化物半导体层薄膜以及包括镧系金属元素的薄膜进行刻蚀，以形成有源层以及层叠在有源层上的功能层。
如此，便通过一次构图工艺形成了有源层以及层叠在有源层上的功能层。
该功能层的材料可以包括镨(Pr)、钐(Sm)、铈(Ce)等各种镧系金属的单元或多元氧化物，例如可以包括氧化镨、氧化钐、氧化铈、铟锌氧化物、铟锌镨氧化物、铟锌钐氧化物中的一种或多种。
示例性的，如图7所示，图7是步骤3043结束时，衬底基板的另一种结构示意图，对金属氧化物半导体层薄膜和包括镧系金属元素的薄膜进行处理，得到有源层116和功能层117。
子步骤3044、去除第一光刻胶图案。
可以通过剥离的方式来去除第一光刻胶图案。
步骤305、对有源层以及功能层进行退火处理，以使功能层中的镧系金属元素扩散至有源层。
对有源层以及功能层进行退火处理，一方面可以使功能层中的镧系金属元素扩散至有源层，另一方面可以使有源层具有较高的抗蚀特性。
其中，退火处理是一种金属热处理工艺，在退火工艺中，可以将金属缓慢加热到一定温度，保持足够时间，然后以适宜速度冷却。本申请实施例中，退火处理的温度可以为200～450摄氏度，时间可以为0.5～3小时，气氛可以包括干燥空气或者氧气。
在干燥空气和氧气中进行退火工艺，可以避免氮气或者水汽等杂质对退火工艺的影响。
退火处理的过程中，功能层中的镧系金属元素可以扩散至有源层的表面，扩散至有源层中的镧系金属元素可以在有源层中形成陷阱态，该有源层受到光照产生的光生电子，可以被该陷阱态捕获，使得光生电子大量降低，从而改善有源层的光照稳定性。
光生电子指的是用光照射半导体时，若光子的能量等于或大于半导体的禁带宽度，则价带中的电子吸收光子后进入导带，产生光生电子-空穴对。
禁带宽度的大小决定了材料是具有半导体性质还是具有绝缘体性质。半导体的禁带宽度较小，当温度升高时，电子可以被激发传到导带，从而使材料具有导电性。绝缘体的禁带宽度很大，即使在较高的温度下，仍是电的不良导体。
退火处理的过程中，功能层中的镧系金属元素可以扩散至有源层的表面内的厚度小于或等于10纳米，或者功能层中的镧系金属元素可以扩散至有源层的表面内的厚度小于或等于5纳米，镧系金属元素在有源层中的质量百分比大于或等于0.5％，且小于等于10％。在此范围内，扩散至有源层的镧系金属元素可 以改善有源层的光照稳定性。
示例性的，如图8所示，图8是步骤305结束时，衬底基板的另一种结构示意图，对有源层116以及功能层117进行退火处理，以使功能层117中的镧系金属元素Ln扩散至有源层远离衬底基板111的一侧表面。
步骤306、对功能层进行去除处理。
本申请实施例中，可以通过刻蚀工艺以去除有源层上的功能层，由于退火处理后的有源层具有高抗蚀特性，因而可以使有源层在刻蚀功能层的过程中不受损害。去除功能层可以避免功能层对有源层性能产生影响。
刻蚀处理的方式可以包括干法刻蚀或湿法刻蚀。
如图9所示，图9是步骤306结束时，衬底基板的另一种结构示意图，对全部的功能层进行刻蚀处理后，留下了具有高抗蚀特性的有源层。
步骤307、在有源层上形成源极和漏极。
去除功能层后在有源层上形成源极和漏极，可以增大有源层和源级与漏级的接触面积，从而提高金属氧化物TFT的性能。
在有源层上形成源极和漏极的过程可以包括，在形成有有源层的衬底基板上形成源漏金属层，在源漏金属层上形成第三光刻胶图案；对源漏金属层进行刻蚀处理，以使源漏金属层形成源极和漏极。
示例的，如图10所示，图10步骤307结束时，衬底基板的另一种结构示意图，在形成有有源层116的衬底基板111上形成源漏金属层，然后对该源漏金属层执行一次构图工艺形成源极118和漏极119。
综上所述，本申请实施例提供了一种金属氧化物TFT的制造方法。在该方法中，在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层后，对有源层以及功能层进行退火处理，功能层中的镧系金属元素扩散至有源层；扩散至有源层中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。
图11是本申请实施例提供的另一种金属氧化物TFT的制造方法的流程图，该方法可以包括：
步骤401、获取衬底基板。
步骤402、在衬底基板上形成栅极。
该步骤402的可以参考上述图2所示实施例中的步骤302，本申请实施例在此不再赘述，步骤402结束时，衬底基板的结构也可以参考图3。
步骤403、在栅极图形上形成栅绝缘层。
该步骤403可以参考上述图2所示实施例中的步骤303，本申请实施例在此不再赘述，步骤403结束时，衬底基板的结构也可以参考图4。
步骤404、在栅绝缘层上形成金属氧化物半导体材质的有源层以及层叠在有源层上的功能层。
该步骤404可以参考上述图2所示实施例中的步骤304，本申请实施例在此不再赘述，步骤404结束时，衬底基板的结构也可以参考图7。
步骤405、对有源层以及功能层进行处理，以使功能层中的镧系金属元素扩散至有源层。
该步骤405可以参考上述图2所示实施例中的步骤305，本申请实施例在此不再赘述，步骤404结束时，衬底基板的结构也可以参考图8。
步骤406、在形成有功能层的衬底基板上形成源漏金属层。
在形成有功能层的衬底基板上形成源漏金属层。
示例的，如图12所示，图12是步骤406结束时，衬底基板的另一种结构示意图，在形成有功能层117的衬底基板111上形成源漏金属层211。
步骤407、在源漏金属层上形成第二光刻胶图案。
该第二光刻胶的形成方式可以参考上述实施例中第一光刻胶图案的形成方式，本申请实施例在此不再赘述。
步骤408、对源漏金属层以及功能层进行刻蚀处理，以使源漏金属层形成源漏极，并刻蚀掉功能层处于第一区域外的部分，第一区域为源漏极在有源层上的正投影区域，源漏极包括源极和漏极。
本步骤中，可以使用同一刻蚀液对源漏金属层以及功能层进行刻蚀处理，以使源漏金属层形成源漏极。如此便通过一次构图工艺在形成了源漏极的基础上，实现了对功能层的部分去除，降低了功能层对有源层的影响；刻蚀处理的方式包括干刻法和湿刻法。第一区域为源漏极在有源层上的正投影区域。退火处理后的有源层具有高抗蚀特性；可以使有源层在刻蚀功能层的过程中不受损害。
如图13所示，图13是步骤408结束时，衬底基板的另一种结构示意图， 对该源漏金属层211执行一次构图工艺形成源极212和漏极213。
对处于第一区域外的部分功能层进行刻蚀处理，以去除第一区域外的部分功能层。此处理方式下，有源层116和源漏极之间会存在包括镧系金属元素的金属层1171。
在功能层上形成源漏级金属层，再对源漏金属层以及功能层进行处理，可以在一个工序中达到形成源漏级和去除功能层的效果，节省金属氧化物TFT的制造工序。
步骤409、去除第二光刻胶。
综上所述，本申请实施例提供了一种金属氧化物TFT的制造方法。在该方法中，在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层后，对有源层以及功能层进行退火处理，功能层中的镧系金属元素扩散至有源层；扩散至有源层中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。
图14是本申请实施例提供的另一种金属氧化物TFT的制造方法的流程图，该方法可以包括：
步骤501、获取衬底基板。
步骤502、在衬底基板上形成栅极。
该步骤502的可以参考上述图2所示实施例中的步骤302，本申请实施例在此不再赘述，步骤502结束时，衬底基板的结构也可以参考图3。
步骤503、在栅极图形上形成栅绝缘层。
该步骤503可以参考上述图2所示实施例中的步骤303，本申请实施例在此不再赘述，步骤503结束时，衬底基板的结构也可以参考图4。
步骤504、在栅绝缘层上形成金属氧化物半导体材质的有源层。
在具有栅绝缘层的衬底基板上形成有源层，该有源层可以通过首先在栅绝缘层上形成金属氧化物半导体薄膜，在金属氧化物半导体薄膜上形成第四光刻胶图案；通过刻蚀液对金属氧化物半导体薄膜进行刻蚀，以形成有源层，再去除第四光刻胶。
如图15所示，步骤504可以包括下面两个子步骤：
子步骤5041、在栅绝缘层上形成金属氧化物半导体薄膜。
金属氧化物半导体薄膜为整层结构，并覆盖在栅绝缘层上。金属氧化物半导体薄膜可以通过沉积的方式形成。
示例性的，如图16所示，图16是步骤5041结束时，衬底基板的另一种结构示意图，在形成有栅绝缘层113的衬底基板111上形成金属氧化物半导体薄膜311。
子步骤5042、对金属氧化物半导体薄膜进行处理，得到有源层。
该有源层的材料可以参考上述图2所示实施例中的有源层的材料。
示例性的，如图17所示，图17是步骤5042结束时，衬底基板的另一种结构示意图，通过一次构图工艺对金属氧化物半导体薄膜进行处理，得到有源层312，有源层312由顶面、底面以及连接顶面和底面的侧面围成，底面朝向衬底基板111。
步骤505、在形成有有源层的衬底基板上形成包括镧系金属元素的薄膜。
该包括镧系金属元素的薄膜的材料可以包括镨(Pr)、钐(Sm)、铈(Ce)等镧系金属的单元或多元氧化物；在形成有有源层的衬底基板上形成包括镧系金属元素的薄膜，该薄膜包括功能层，包括镧系金属元素的薄膜的材料可以包括氧化镨、氧化钐、氧化铈、铟锌氧化物、铟锌镨氧化物、铟锌钐氧化物中的一种或多种。
示例性的，如图18所示，图18是步骤505结束时，衬底基板的另一种结构示意图，在形成有有源层312的衬底基板111上形成包括镧系金属元素的薄膜313，包括镧系金属元素的薄膜313覆盖有源层312的顶面以及侧面。
步骤506、对有源层以及包括镧系金属元素的薄膜进行退火处理，以使镧系金属元素从包括镧系金属元素的薄膜扩散至有源层的顶面以及侧面。
对有源层以及包括镧系金属元素的薄膜进行退火处理，退火处理的具体实施方式可以参考图2所示实施例中退火处理的实施方式。
包括镧系金属元素的薄膜覆盖有源层的顶面以及侧面，可以使以使包括镧系金属元素的薄膜中的镧系金属元素扩散至有源层的顶面以及侧面，进而可以提高有源层侧面的光稳定性。
如图19所示，图19是步骤506结束时，衬底基板的另一种结构示意图，对有源层以及包括镧系金属元素的薄膜313进行退火处理，以使包括镧系金属元素的薄膜313中的镧系金属元素扩散至有源层312。
步骤507、对包括镧系金属元素的薄膜进行去除处理。
去除包括镧系金属元素的薄膜可以包括对全部的包括镧系金属元素的薄膜进行刻蚀处理。
如图20所示，图20是步骤507结束时，衬底基板的另一种结构示意图，对全部的包括镧系金属元素的薄膜进行刻蚀处理，保留具有高抗蚀特性的有源层312。
步骤508、在有源层上形成源极和漏极。
该步骤508可以参考上述图2所示实施例中的步骤307，本申请实施例在此不再赘述。
示例性的，如图21所示，图21是步骤508结束时，衬底基板的另一种结构示意图，在形成有源层312的衬底基板111上形成源漏金属层，然后对该源漏金属层执行一次构图工艺形成源极118和漏极119。
综上所述，本申请实施例提供了一种金属氧化物TFT的制造方法。在该方法中，在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层后，对有源层以及功能层进行退火处理，功能层中的镧系金属元素扩散至有源层；扩散至有源层中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。
图22是本申请实施例提供的另一种金属氧化物TFT的制造方法的流程图，该方法可以包括：
步骤601、获取衬底基板。
步骤602、在衬底基板上依次形成缓冲层、金属氧化物半导体薄膜和包括镧系金属元素的薄膜。
缓冲层、金属氧化物半导体薄膜和包括镧系金属元素的薄膜均为整层结构，并依次覆盖在衬底基板上，该缓冲层可以采用氮化硅材料形成，缓冲层、金属氧化物半导体薄膜和包括镧系金属元素的薄膜可以通过沉积的方式形成。
示例性的，如图23所示，图23是步骤602结束时，衬底基板的另一种结构示意图，在衬底基板111上形成缓冲层411、金属氧化物半导体薄膜412和包括镧系金属元素的薄膜413。
步骤603、对金属氧化物半导体薄膜和包括镧系金属元素的薄膜进行处理，得到有源层和功能层。
该步骤603可以参考上述图2所示实施例中的子步骤3042、子步骤3043以及子步骤3044，本申请实施例在此不再赘述。
如图24所示，图24是步骤603结束时，衬底基板的另一种结构示意图，通过一次构图工艺对金属氧化物半导体薄膜和包括镧系金属元素的薄膜进行处理，得到有源层414和功能层415。
步骤604、对有源层以及功能层进行退火处理，以使功能层中的镧系金属元素扩散至有源层。
该步骤604可以参考上述图2所示实施例中的步骤305，本申请实施例在此不再赘述。
示例性的，如图25所示，图25是步骤604结束时，衬底基板的另一种结构示意图，对有源层以及功能层415进行退火处理，以使功能层415中的镧系金属元素扩散至有源层414。
步骤605、对功能层进行去除处理。
该步骤605可以参考上述图2所示实施例中的步骤306，本申请实施例在此不再赘述。
示例性的，如图26所示，图26是步骤605结束时，衬底基板的另一种结构示意图，刻蚀掉全部的功能层，保留具有高抗蚀特性的有源层414。
步骤606、在有源层上形成栅绝缘结构。
该栅极绝缘结构的材料可以为二氧化硅、氮化硅或者二氧化硅和氮化硅的混合材料，可以在有源层上通过沉积的方式形成栅绝缘材料层，然后对该栅绝缘材料层执行一次构图工艺形成栅绝缘结构。
示例性的，如图27所示，图27是步骤606结束时，衬底基板的另一种结构示意图，在有源层上414形成栅绝缘材料层，然后对该栅绝缘材料层执行一次构图工艺形成栅绝缘结构416。
步骤607、在栅绝缘结构上形成栅极。
该栅极可以采用金属材料形成，可以在栅绝缘结构上通过沉积的方式形成栅极金属层，然后对该栅极金属层执行一次构图工艺形成栅极。
示例性的，如图28所示，图28是步骤607结束时，衬底基板的另一种结构示意图，在栅绝缘结构416上形成栅极金属层，然后对该栅极金属层，执行 一次构图工艺形成栅极417。
综上所述，本申请实施例提供了一种金属氧化物TFT的制造方法。在该方法中，在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层后，对有源层以及功能层进行退火处理，功能层中的镧系金属元素扩散至有源层；扩散至有源层中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。
图29是本申请实施例提供的另一种金属氧化物TFT的制造方法的流程图，该方法可以包括：
步骤701、获取衬底基板。
步骤702、在衬底基板上依次形成缓冲层、金属氧化物半导体薄膜。
缓冲层、金属氧化物半导体薄膜均为整层结构，并依次覆盖在衬底基板上，该缓冲层可以采用氮化硅材料形成，缓冲层、金属氧化物半导体薄膜可以通过沉积的方式形成。
示例性的，如图30所示，图30是步骤702结束时，衬底基板的另一种结构示意图，在衬底基板111上形成缓冲层411以及有源层薄膜512。
步骤703、对金属氧化物半导体薄膜进行处理，得到有源层。
该有源层的材料可以参考上述图2所示实施例中的有源层的材料。可以通过一次构图工艺对金属氧化物半导体薄膜进行处理，形成有源层。
示例性的，如图31所示，图31是步骤703结束时，衬底基板的另一种结构示意图，通过一次构图工艺对金属氧化物半导体薄膜进行处理，得到有源层513。
步骤704、在形成有有源层的衬底基板上形成包括镧系金属元素的薄膜。
该步骤704可以参考上述图14所示实施例中的步骤505，本申请实施例在此不再赘述。
如图32所示，图32是步骤704结束时，衬底基板的另一种结构示意图，在形成有有源层513的衬底基板111上形成包括镧系金属元素的薄膜514。
步骤705、对有源层以及包括镧系金属元素的薄膜进行退火处理，以使包括镧系金属元素的薄膜中的镧系金属元素扩散至有源层。
该步骤705可以参考上述图14所示实施例中的步骤506，本申请实施例在此不再赘述。
如图33所示，图33是步骤705结束时，衬底基板的另一种结构示意图，对有源层513以及包括镧系金属元素的薄膜514进行退火处理，以使包括镧系金属元素的薄膜514中的镧系金属元素扩散至有源层513的顶面及侧面。
步骤706、对包括镧系金属元素的薄膜进行去除处理。
该步骤706可以参考上述图14所示实施例中的步骤507，本申请实施例在此不再赘述。
如图34所示，图34是步骤706结束时，衬底基板的另一种结构示意图，对全部的包括镧系金属元素的薄膜进行刻蚀处理，保留具有高抗蚀特性的有源层513。
步骤707、在有源层上形成栅绝缘结构。
该步骤707可以参考上述图22所示实施例中的步骤606，本申请实施例在此不再赘述。
示例性的，如图35所示，图35是步骤706结束时，衬底基板的另一种结构示意图，在有源层上513形成栅绝缘材料层，然后对该栅绝缘材料层执行一次构图工艺形成栅绝缘结构515。
步骤708、在栅绝缘结构上形成栅极。
该步骤708可以参考上述图22所示实施例中的步骤607，本申请实施例在此不再赘述。
示例性的，如图36所示，图36是步骤706结束时，衬底基板的另一种结构示意图，在栅绝缘结构515上形成栅极金属层，然后对该栅极金属层，执行一次构图工艺形成栅极516。
综上所述，本申请实施例提供了一种金属氧化物TFT的制造方法。在该方法中，在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层后，对有源层以及功能层进行退火处理，功能层中的镧系金属元素扩散至有源层；扩散至有源层中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。
本申请实施例还提供一种金属氧化物TFT，该金属氧化物TFT可以通过上述实施例中的金属氧化物TFT的制造方法制造而成。
该金属氧化物TFT可以包括位于衬底基板上的金属氧化物半导体的有源层，该有源层中具有镧系金属元素。
示例性的，该金属氧化物TFT的结构可以参考图10、图13、图21、图28以及图36。如图10所示，衬底基板111上设置有有源层116，有源层116中的镧系金属元素Ln可以改善有源层116的光稳定性。
综上所述，本申请实施例提供了一种金属氧化物TFT，该金属氧化物TFT可以包括位于衬底基板上的金属氧化物半导体的有源层，该有源层中具有镧系金属元素；有源层中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。
如图37所示，图37是本申请实施例示出的另一种金属氧化物TFT的结构示意图，可选地，有源层611远离衬底基板的一面上，指定深度D的材料中扩散有镧系金属元素Ln。该指定深度D的材料中扩散有镧系金属元素Ln可以降低从有源层611的上方(以图37所示的上方，该方向可以为显示面板显示图像的一面的方向)照射到有源层611上的光线对有源层611的影响。
由上述实施例可知，有源层远离衬底基板的一面是与具有镧系金属元素的功能层所接触的一面，因而镧系金属元素也会从该面开始向有源层中扩散，继而镧系金属元素也主要会分布在有源层远离衬底基板的一侧。
如图38所示，图38是本申请实施例示出的另一种衬底基板的结构示意图，可选的，有源层为单层，为TFT的沟道层，由顶面S1、底面S2以及连接顶面和底面的侧面S3围成，有源层远离衬底基板的一面包括有源层的顶面S1以及侧面S3。
可选的，镧系金属元素在有源层中单位体积的质量百分比，从所述有源层的顶面沿朝向衬底基板的方向逐渐减小。由于退火处理过程中，镧系金属元素是从有源层远离衬底基板一侧的表面开始向有源层的内部扩散，镧系金属元素在有源层中单位体积的质量百分比，沿朝向衬底基板的方向逐渐减小。
可选的，镧系金属元素包括镨、钐、铈中的一种或多种。镧系金属元素也 可以包括所有镧系金属元素中的一种或者多种。
可选的，如图37所示，指定深度D小于或等于10纳米，在此范围内，该光稳定层可以起到改善有源层的光稳定性的作用。当指定深度D大于或等于5纳米时，该光稳定层可以更好的起到改善有源层的光稳定性的作用。
可选的，金属氧化物TFT还包括源漏极，以及位于有源层和源漏极之间的包括镧系金属元素的金属层，源漏极包括源极和漏极，金属层的材料包括镧系金属的单元或多元氧化物。
如图13所示，包括镧系金属元素的金属层1171位于有源层116和源漏极之间，源漏极包括源极212和漏极213。
可选的，镧系金属元素在有源层中的质量百分比大于或等于0.5％，且小于或等于10％。在此范围内，该光稳定层可以起到改善有源层的光稳定性的作用。
示例性的，如图37所示，金属氧化物TFT还包括栅极112以及栅绝缘层113，栅极112位于衬底基板111上，栅绝缘层113位于设置有栅极112的衬底基板111上；有源层611位于栅绝缘层113上。
综上所述，本申请实施例提供了一种金属氧化物TFT，该金属氧化物TFT可以包括位于衬底基板上的金属氧化物半导体的有源层，该有源层中具有镧系金属元素；有源层中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。
本申请实施例还提供了一种x射线探测器，该x射线探测器可以包括图10、图13、图21、图28或图36的金属氧化物TFT。X射线探测器可以包括基板以及设置在基板上的多个探测单元以及设置在多个探测单元上的闪烁层，每个探测单元可以包括金属氧化物TFT和感光结构，感光结构设置在金属氧化物TFT的漏极上，且与金属氧化物TFT电连接，闪烁层用于将X射线转化为可见光，感光结构用于将该可见光转化为电信号，金属氧化物TFT用于作为读取该电信号的开关。
本申请实施例还提供了一种显示面板，该显示面板可以包括图10、图13、图21、图28或图36示出的金属氧化物TFT。该显示面板可以结合在液晶面板、 电子纸、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等各种具有显示功能的产品或部件中。
本申请实施例还提供了另一种金属氧化物TFT，该金属氧化物TFT可以通过上述实施例中的金属氧化物TFT的制造方法制造而成。如图39所示，图39为本申请实施例示出的另一种金属氧化物TFT的结构示意图，该金属氧化物TFT包括：
位于衬底基板711上的栅极712、源极713、漏极714和有源层715；有源层715位于栅极712和源极713或漏极714之间；有源层715包括沟道层7151，沟道层7151为第一金属氧化物半导体层。金属氧化物TFT还包括栅绝缘层716。
其中，第一金属氧化物半导体层包括铟(In)、镓(Ga)、锌(Zn)、锡(Sn)、铝(Al)、钨(W)、锆(Zr)、铪(Hf)、硅(Si)中的一种或多种；沟道层7151中含有镧系金属掺杂材料，该镧系金属掺杂材料中的镧系元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。
在一些实施例中，沟道层中的上表面上以及距离该上表面一定厚度的位置含有镧系金属掺杂材料；镧系金属含量随着远离所述沟道层中的上表面的距离增大呈减小的趋势。
在一些实施例中，沟道层7151中，沿着沟道的厚度方向f1，在一定位置范围内，或一定厚度范围内，从沟道层的顶层(背沟道位置)开始向着沟道层的层的中间方向，靠近沟道层的中间位置镧系金属含量大于远离沟道层的中间位置镧系金属含量，有源层715可以包括远离衬底基板的顶面以及侧面，由于在退火处理进行前，包括镧系金属元素的功能层可以层叠在有源层715远离衬底基板的一侧的顶面上，则在退火处理过程中，镧系金属元素可以从有源层远离衬底基板的顶面开始向有源层的内部扩散，有源层两侧的侧面上可以含有较少的镧系金属，即可以形成沟道层7151，使得靠近沟道层7151的中间位置镧系金属含量大于远离沟道层7151的中间位置镧系金属含量。
综上所述，本申请实施例提供了一种金属氧化物TFT，该金属氧化物TFT的有源层可以包括含有镧系金属掺杂材料的沟道层；该镧系金属掺杂材料中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属 氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。
可选的，如图40所示，图40是本申请实施例示出的另一种金属氧化物TFT的结构示意图，有源层814上设置有源极815和漏极816；有源层814的沟道层8141与源极815之间设置有金属层817A，金属层817A的包括与镧系金属掺杂材料相同的镧系金属元素；有源层814的沟道层8141与漏极816之间设置有金属层817B，金属层817B包括与镧系金属掺杂材料相同的镧系金属元素。金属氧化物TFT还可以包括衬底基板811，栅极812以及栅绝缘层813。
由于在金属氧化物TFT的制造过程中，可以通过一次构图工艺处理包括这两个金属层的膜层以及包括源极和漏极的源漏金属层，在该一次构图工艺后，有源层的沟道层与源极之间会具有金属层，有源层的沟道层与漏极之间也会具有金属层，该一次构图工艺可以减少金属氧化物TFT的制造工艺步骤。由于源极以及漏极下方的金属层可以由同一膜层制成，因而，源极和沟道层之间的金属层与漏极和沟道层之间的金属层的厚度相同。金属层的厚度相同，可以使源级与漏级的性能较为平衡。
可选的，如图40所示，源极815和沟道层8141之间的金属层817A的外侧壁S4(金属层的外侧壁可以是指沿沟道层的中心向外的方向一侧的侧壁)与沟道层8141的一个外侧壁S6在同一个坡面上，且坡度角方向相同，漏极816和沟道层8141之间的金属层817B的外侧壁S5与沟道层的另一个外侧壁S7在同一个坡面上，且坡度角方向相同，如此设置，可以避免由于有源层与金属块的外侧面不规则而导致的源级与漏级与有源层接触不良，进而可以提高金属氧化物TFT的性能。其中，外侧壁S6和外侧壁S4可以在一次构图工艺中形成，外侧壁S7与外侧壁S5也可以在一次构图工艺中形成。
源极815和沟道层8141之间的金属层817A的内侧壁S8与源极815的内侧壁S9在同一个坡面上，且坡度角方向相同，漏极816和沟道层8141之间的金属层817B的内侧壁S10与漏极816的内侧壁S11在同一个坡面上，且坡度角方向相同，如此设置，可以避免由于源级、漏级以及金属层的内侧面不规则而导致的源级和漏级与金属层开裂，进而可以提高金属氧化物TFT的性能。
可选的，如图41所示，图41是本申请实施例示出的另一种金属氧化物TFT的结构示意图，有源层914还包括背沟道保护层9141，沟道层9142可以为掺杂 有镧系金属的非晶铟镓锡氧化物(a-IGTO)，可以具有较高的迁移率(如大于30)，背沟道保护层9141位于沟道层9142上，背沟道保护层9141可以为多晶铟镓锌氧化物(p-IGZO)、掺杂镧系金属的铟锌氧化物(Ln-IZO)或掺杂镧系金属的铟镓锌氧化物(Ln-IGZO)，可以具有抗酸腐蚀的性能，可以提高有源层的稳定性。
可选的，如图41所示，有源层914还包括遮光保护层9143，遮光保护层9143包括掺杂镧系金属(镧系金属可以为镨(Pr))的铟锌氧化物(Ln-IZO)或掺杂镧系金属的铟镓锌氧化物(Ln-IGZO)，遮光保护层9143位于沟道层9142的远离背沟道保护层9141的另一侧，可以背面这一侧的光线照射到沟道层，如此可以进一步提升有源层的光照稳定性，降低漏电流。
综上所述，本申请实施例提供了一种金属氧化物TFT，该金属氧化物TFT的有源层可以包括含有镧系金属掺杂材料的沟道层；该镧系金属掺杂材料中的镧系金属元素可以在有源层中形成陷阱态，有源层受到光照产生的光生电子，可以被该陷阱态捕获，从而改善有源层的光照稳定性。解决了相关技术中金属氧化物TFT的有源层的光稳定性较差的问题，实现了提升金属氧化物TFT中有源层的光稳定性的效果。
以上所述仅为本申请的可选实施例，并不用以限制本申请，凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本申请的保护范围之内。

Claims (25)

  1. 一种金属氧化物TFT的制造方法，其特征在于，所述方法包括：
    在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在所述有源层上的包括镧系金属元素的功能层；
    对所述有源层以及所述功能层进行退火处理，所述功能层中的镧系金属元素扩散至所述有源层。
  2. 根据权利要求1所述的方法，其特征在于，所述退火处理的温度为200～450摄氏度，时间为0.5～3小时，气氛包括干燥空气或者氧气。
  3. 根据权利要求1所述的方法，其特征在于，所述在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在有源层上的包括镧系金属元素的功能层，包括：
    在所述衬底基板上依次形成金属氧化物半导体薄膜和包括镧系金属元素的薄膜；
    在所述包括镧系金属元素的薄膜上形成第一光刻胶图案；
    通过同一刻蚀液对所述金属氧化物半导体层薄膜以及所述包括镧系金属元素的薄膜进行刻蚀，以形成所述有源层以及层叠在所述有源层上的功能层；
    去除所述第一光刻胶图案。
  4. 根据权利要求1所述的方法，其特征在于，所述对所述有源层以及所述功能层进行退火处理之后，所述方法还包括：
    对所述功能层进行去除处理。
  5. 根据权利要求4所述的方法，其特征在于，所述对所述功能层进行去除处理，包括：
    在形成有所述功能层的衬底基板上形成源漏金属层；
    在所述源漏金属层上形成第二光刻胶图案；
    对所述源漏金属层以及所述功能层进行刻蚀处理，以使所述源漏金属层形成源漏极，并刻蚀掉所述功能层处于第一区域外的部分，所述第一区域为所述 源漏极在所述有源层上的正投影区域，所述源漏极包括源极和漏极。
  6. 根据权利要求1所述的方法，其特征在于，所述在衬底基板上形成金属氧化物半导体材质的有源层以及层叠在所述有源层上的包括镧系金属元素的功能层，包括：
    在所述衬底基板上形成所述有源层；
    在形成有所述有源层的衬底基板上形成包括镧系金属元素的薄膜，所述有源层由顶面、底面以及连接所述顶面和所述底面的侧面围成，所述底面朝向所述衬底基板，所述包括镧系金属元素的薄膜覆盖所述有源层的顶面以及侧面；
    所述对所述有源层以及所述功能层进行退火处理，包括：
    对所述有源层以及所述包括镧系金属元素的薄膜进行退火处理，以使镧系金属元素从所述包括镧系金属元素的薄膜扩散至所述有源层的顶面以及侧面。
  7. 根据权利要求1-6任一所述的方法，其特征在于，所述功能层的材料包括镧系金属的单元或多元氧化物。
  8. 根据权利要求1-6任一所述的方法，其特征在于，所述功能层的材料包括氧化镨、氧化钐、氧化铈、铟锌氧化物、铟锌镨氧化物、铟锌钐氧化物中的一种或多种。
  9. 一种金属氧化物TFT，其特征在于，所述金属氧化物TFT包括：
    位于衬底基板上的金属氧化物半导体的有源层，所述有源层中具有镧系金属元素。
  10. 根据权利要求9所述的金属氧化物TFT，其特征在于，所述有源层远离所述衬底基板的一面上，指定深度的材料中扩散有所述镧系金属元素。
  11. 根据权利要求10所述的金属氧化物TFT，其特征在于，所述有源层为单层，为TFT的沟道层，由顶面、底面以及连接所述顶面和所述底面的侧面围成，所述有源层远离所述衬底基板的一面包括所述有源层的顶面以及侧面。
  12. 根据权利要求10所述的金属氧化物TFT，其特征在于，所述镧系金属元素在所述有源层中单位体积的质量百分比，从所述有源层的顶面沿朝向所述衬底基板的方向逐渐减小。
  13. 根据权利要求9-12任一所述的金属氧化物TFT，其特征在于，所述镧系金属元素包括镨、钐、铈中的一种或多种。
  14. 根据权利要求9-12任一所述的金属氧化物TFT，其特征在于，所述指定深度小于或等于10纳米。
  15. 根据权利要求9-12任一所述的金属氧化物TFT，其特征在于，所述金属氧化物TFT还包括源漏极，以及位于所述有源层和所述源漏极之间的包括镧系金属元素的金属层，所述源漏极包括源极和漏极，所述金属层的材料包括镧系金属的单元或多元氧化物。
  16. 根据权利要求9-12任一所述的金属氧化物TFT，其特征在于，所述镧系金属元素在所述有源层中的质量百分比大于或等于0.5％，且小于或等于10％。
  17. 一种x射线探测器，其特征在于，包括权利要求9-16任一所述的金属氧化物TFT。
  18. 一种显示面板，其特征在于，所述显示面板包括权利要求9至16任一所述的金属氧化物TFT。
  19. 一种金属氧化物TFT，其特征在于，所述金属氧化物TFT包括：
    位于衬底基板上的栅极、源极、漏极和有源层；
    所述有源层位于所述栅极和所述源极或漏极之间；
    所述有源层包括沟道层，所述沟道层为第一金属氧化物半导体层；
    所述第一金属氧化物半导体层包括铟、镓、锌、锡、铝、钨、锆、铪、硅 中的一种或多种；所述沟道层中的上表面上以及距离该上表面一定厚度的位置含有镧系金属掺杂材料；所述镧系金属含量随着远离所述沟道层中的上表面的距离增大呈减小的趋势。
  20. 根据权利要求19所述的金属氧化物TFT，其特征在于，
    所述有源层上设置有源极和漏极；
    所述有源层的沟道层与所述源极之间设置有金属层，所述金属层包括与所述镧系金属掺杂材料相同的镧系金属元素；
    所述有源层的沟道层与漏极之间设置有金属层，所述金属层包括与所述镧系金属掺杂材料相同的镧系金属元素。
  21. 根据权利要求20所述的金属氧化物TFT，其特征在于，所述源极和所述沟道层之间的金属层与所述漏极和所述沟道层之间的金属层的厚度相同。
  22. 根据权利要求20所述的金属氧化物TFT，其特征在于，所述源极和所述沟道层之间的金属层的外侧壁与所述沟道层的一个外侧壁在同一个坡面上，且坡度角方向相同，所述漏极和所述沟道层之间的金属层的外侧壁与所述沟道层的另一个外侧壁在同一个坡面上，且坡度角方向相同；
    所述源极和所述沟道层之间的金属层的内侧壁与所述源极的内侧壁在同一个坡面上，且坡度角方向相同，所述漏极和所述沟道层之间的金属层的内侧壁与所述漏极的内侧壁在同一个坡面上，且坡度角方向相同。
  23. 根据权利要求19所述的金属氧化物TFT，其特征在于，所述有源层还包括背沟道保护层，所述沟道层为掺杂有镧系金属的铟镓锡氧化物、所述背沟道保护层位于所述沟道层上，所述背沟道保护层为结晶铟镓锌氧化物、掺杂镧系金属的铟锌氧化物或掺杂镧系金属的铟镓锌氧化物。
  24. 根据权利要求19或23所述的金属氧化物TFT，其特征在于，所述有源层还包括遮光保护层，所述遮光保护层包括掺杂镧系金属的铟锌氧化物或掺杂镧系金属的铟镓锌氧化物，所述遮光保护层位于所述沟道层的远离所述背沟道 保护层的另一侧。
  25. 根据权利要求24所述的金属氧化物TFT，其特征在于，所述掺杂的镧系金属为镨。
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