WO2022183337A1

WO2022183337A1 - Light-emitting drive circuit and method, and display drive circuit

Info

Publication number: WO2022183337A1
Application number: PCT/CN2021/078524
Authority: WO
Inventors: 李泠; 苏悦; 耿玓; 卢年端; 刘明
Original assignee: 中国科学院微电子研究所
Priority date: 2021-03-01
Filing date: 2021-03-01
Publication date: 2022-09-09

Abstract

The present invention relates to the technical field of circuit design. Disclosed are a light-emitting drive circuit and method, and a display drive circuit, used for improving the output stability of the light-emitting drive circuit. The light-emitting drive circuit comprises: an input circuit, a first potential control circuit, a second potential control circuit, a first output circuit, and a second output circuit. The method is used for driving the light-emitting drive circuit to output a light-emitting drive signal. The display drive circuit comprises the light-emitting drive circuit.

Description

A light-emitting drive circuit, method and display drive circuit

technical field

The present invention relates to the technical field of circuit design, and in particular, to a light-emitting driving circuit, a method and a display driving circuit.

Background technique

At present, narrow-frame display and full-screen display are attracting more and more attention. The integrated drive circuit technology based on thin film transistors is a key technology in narrow-frame display and full-screen display. The light-emitting driving circuit directly controls the light-emitting signal of the pixel circuit, therefore, the light-emitting driving circuit needs to have a stable output signal.

The light-emitting driving circuit in the prior art is prone to unstable output, which affects the light-emitting stability and light-emitting time of the display panel.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a light-emitting driving circuit, a method and a display driving circuit for improving the output stability of the light-emitting driving circuit.

In a first aspect, the present invention provides a light-emitting driving circuit, comprising: an input circuit, a first potential control circuit, a second potential control circuit, a first output circuit, and a second output circuit. The output end of the input circuit, the control end of the first output circuit, the output end of the first potential control circuit, and the control end of the second potential control circuit are all electrically connected to the first node. The output end of the second potential control circuit and the control end of the second output circuit are both electrically connected to the second node. The first potential control circuit is used for compensating the potential of the first node. The second potential control circuit is used for compensating the potential of the second node.

When the first output circuit is configured to output the light-emitting driving signal under the control of the potential of the first node, the second output circuit is configured to be in an off state under the control of the potential of the second node;

When the second output circuit is used to output the light-emitting driving signal under the control of the potential of the second node, the first output circuit is used to be in an off state under the control of the positioning of the first node.

Compared with the prior art, in the light-emitting driving circuit provided by the present invention, the output end of the input circuit, the control end of the first output circuit, the output end of the first potential control circuit, and the control end of the second potential control circuit are all electrically connected. at the first node. The output end of the second potential control circuit and the control end of the second output circuit are both electrically connected to the second node. The first potential control circuit is used to compensate the potential of the first node, and the second potential control circuit is used to compensate the potential of the second node. Based on this, the first output circuit is made to output a light-emitting drive signal under the control of the potential of the first node, and the second output circuit is turned off under the control of the potential of the second node. Or, the second output circuit is made to output the light-emitting driving signal under the control of the potential of the second node, and the first output circuit is configured to be in an off state under the control of the positioning of the first node.

It can be seen from the above that at the same stage, the first output circuit or the second output circuit is in a conducting state, which eliminates the problem of floating output in the prior art light-emitting driving circuit, and improves the output stability of the light-emitting driving circuit.

In a second aspect, the present invention further provides a display driving circuit, including the light-emitting driving circuit described in the first aspect.

Compared with the prior art, the beneficial effects of the display driving circuit provided by the present invention are the same as the beneficial effects of the light-emitting driving circuit described in the first aspect, which will not be repeated here.

In a third aspect, the present invention also provides a driving method for a light-emitting circuit, using the circuit described in the first aspect. The driving method of the light-emitting circuit includes:

The first potential control circuit is used to compensate the potential of the first node, and the second potential control circuit is used to compensate the potential of the second node.

When the first output circuit outputs the light-emitting driving signal under the control of the potential of the first node, the second output circuit is in an off state under the control of the potential of the second node.

When the second output circuit outputs the light-emitting driving signal under the control of the potential of the second node, the first output circuit is in an off state under the control of the potential of the first node.

Compared with the prior art, the beneficial effects of the driving method for a light-emitting circuit provided by the present invention are the same as those of the light-emitting driving circuit described in the first aspect, which will not be repeated here.

Description of drawings

1 is a schematic structural diagram and a timing diagram of a light-emitting drive circuit in the prior art;

FIG. 2 is a schematic structural diagram 1 and a timing diagram of a light-emitting driving circuit according to an embodiment of the present invention;

3 is a second structural schematic diagram of a light-emitting driving circuit provided by an embodiment of the present invention;

FIG. 4 is a third structural schematic diagram and a timing diagram of a light-emitting driving circuit according to an embodiment of the present invention.

Detailed ways

In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.

It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

In addition, the terms "first" and "second" are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, a feature defined as "first" or "second" may expressly or implicitly include one or more of that feature. In the description of the present invention, "plurality" means two or more, unless otherwise expressly and specifically defined. "Several" means one or more than one, unless expressly specifically defined otherwise.

In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", "front", "rear", "left", "right", etc. are based on those shown in the accompanying drawings The orientation or positional relationship is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the indicated device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention.

In the description of the present invention, it should be noted that the terms "installed", "connected" and "connected" should be understood in a broad sense, unless otherwise expressly specified and limited, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; may be mechanical connection or electrical connection; may be direct connection or indirect connection through an intermediate medium, may be internal communication between two elements or an interaction relationship between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

FIG. 1 illustrates a schematic structural diagram and a timing diagram of a light-emitting driving circuit in the prior art. Referring to a in FIG. 1 , a light-emitting driving circuit in the prior art includes 10 P-type transistors and 3 capacitors. Among them, the first transistor T1 to the eighth transistor T8 are used as switching transistors, and the ninth transistor T9 and the tenth transistor T10 are used as driving transistors.

Referring to a in FIG. 1, the fourth transistor T4 is used as an input transistor, the first pole of the fourth transistor T4 is used to connect to the input signal Input, the control pole of the fourth transistor T4 is used to connect to the clock signal CK2, and the fourth transistor T4 is used to connect to the clock signal CK2. The second electrodes are respectively at the second electrode of the second transistor T2, the control electrode of the third transistor T3, the control electrode of the eighth transistor T8, the control electrode of the ninth transistor T9, the control electrode of the tenth transistor T10 and the third capacitor C3 The first pole is electrically connected. The second pole of the third capacitor C3 is used to connect the clock signal CK1.

Referring to a in FIG. 1 , the first electrode of the first transistor T1 is used to connect the high-level signal VGH, the control electrode of the first transistor T2 is electrically connected to the control electrode of the sixth transistor T6, and the second electrode of the first transistor T1 is electrically connected to the control electrode of the sixth transistor T6. The pole is electrically connected to the first pole of the second transistor T2. The gate of the second transistor T2 is used to connect the clock signal CK1.

Referring to a in FIG. 1 , the first pole of the third transistor T3 is used to access the clock signal CK2, the second pole of the third transistor T3 is respectively the second pole of the fifth transistor T5 and the first pole of the second capacitor C2 electrical connection.

Referring to a in FIG. 1 , the control electrode of the fifth transistor T5 is used to connect the clock signal CK2, and the second electrode of the fifth transistor T5 is connected to the low-level signal VGL.

Referring to a in FIG. 1 , the first pole of the sixth transistor T6 is electrically connected to the second pole of the second capacitor C2 and the second pole of the seventh transistor T7, and the second pole of the sixth transistor T6 is used to access the clock signal CK1, and is electrically connected to the control electrode of the seventh transistor T7. The first electrode of the seventh transistor T7 is electrically connected to the second electrode of the eighth transistor T8. The first pole of the eighth transistor T8 is used to connect the high-level signal VGH.

Referring to a in FIG. 1 , the first pole of the ninth transistor T9 and the first pole of the first capacitor C1 are both used to access the high-level signal VGH, the control pole of the ninth transistor T9 and the second pole of the first capacitor C1. The poles are all electrically connected to the second pole of the eighth transistor T8, and the second pole of the ninth transistor T9 is electrically connected to the second pole of the tenth transistor T10. The second pole of the tenth transistor T10 is used to connect to the low-level signal VGL.

Referring to b in FIG. 1 , although the light-emitting driving circuit in the prior art can also output a light-emitting driving signal, in stage 3, the output end of the light-emitting driving circuit in the prior art is in a floating state. Specifically, at this stage, both the node A and the node B are in the high level state, that is, the driving transistor T9 and the driving transistor T10 are both in the off state. When there is interference in the surrounding environment, the output end of the light-emitting driving circuit is prone to the problem of unstable output.

Referring to b in FIG. 1 , at the same time, in stage 7, the input signal Input is at a low level, the second input signal CK2 is at a low level, the fourth transistor T4 is turned on, and the input signal Input is transmitted to A through the fourth transistor T4 node. However, due to the threshold loss, the level of node A will be higher than the low level of the input signal input. At this time, the voltage of the node A is VGL+|Vth|. The voltage of the node A can only make the transistor T10 only work in the saturation region, and further, due to the loss of the threshold value, the output voltage of the light-emitting driving circuit will also be higher than the voltage of the node A. Therefore, the output terminal of the light-emitting driving power cannot realize the low level VGL in stage 7. In this way, the light-emitting control transistors in the display circuit will be in a nonlinear region, which will affect the light-emitting stability and light-emitting time of the entire display circuit, resulting in a reduction in the light-emitting time of the display circuit.

In view of the above problems, embodiments of the present invention provide a light-emitting driving circuit, a method and a display driving circuit, which are used to improve the output stability of the light-emitting driving circuit and at the same time ensure a longer light-emitting time of the display driving circuit.

FIG. 2 illustrates a first structural schematic diagram and a timing diagram of a light-emitting driving circuit provided by an embodiment of the present invention. Referring to a in FIG. 1 and a in FIG. 2 , compared with the prior art, the light-emitting driving circuit provided by the present invention mainly improves the circuit structure.

Referring to a in FIG. 2 , the light-emitting driving circuit provided by the present invention includes: an input circuit, a first potential control circuit, a second potential control circuit, a first output circuit and a second output circuit.

The output end of the input circuit, the control end of the first output circuit, the output end of the first potential control circuit and the control end of the second potential control circuit are all electrically connected to the first node A. The first potential control circuit is used for compensating the potential of the first node A. The output end of the second potential control circuit and the control end of the second output circuit are both electrically connected to the second node B. The second potential control circuit is used to compensate the potential of the second node B.

Based on the above circuit structure, the first output circuit can output the light-emitting driving signal under the control of the potential of the first node A, and the second output circuit can be turned off under the control of the potential of the second node B. Or, the second output circuit is made to output a light-emitting driving signal under the control of the potential of the second node B, and the first output circuit is configured to be in an off state under the control of the positioning of the first node A.

Referring to a in FIG. 2 , the above-mentioned input circuit may include a first switch circuit. The input end of the first switch circuit can be used to connect to the first input signal Input, the control end of the first switch circuit can be used to connect to the second input signal, and the output end of the first switch circuit is electrically connected to the above-mentioned first node A .

Referring to a in FIG. 2 , the above-mentioned first potential control circuit may include a second switch circuit and a first capacitor C1 . The control terminal of the second switch circuit can be electrically connected to the first node A, the input terminal of the second switch circuit can be used to access the third input signal, and the output terminal of the second switch circuit can be electrically connected to the first node A through the first capacitor C1. The above-mentioned first node A. The second switch circuit is used for charge compensation for the first node A, so as to suppress the influence of the first output circuit on the first node A.

Referring to a in FIG. 2 , the above-mentioned second potential control circuit may include a first circuit and a second circuit. The output end of the first circuit and the output end of the second circuit are both electrically connected to the second node B. The first circuit may be used to clamp the potential of the second node B to the first level, and the second circuit may be used to clamp the potential of the second node B to the second level.

In an example, referring to a in FIG. 2 , the above-mentioned first circuit may include a third switch circuit. The control terminal of the third switch circuit can be electrically connected to the above-mentioned first node A, the input terminal of the third switch circuit can be used to access the fourth input signal, and the output terminal of the third switch circuit can be electrically connected to the above-mentioned second node B .

In an example, referring to a in FIG. 2 , the above-mentioned second circuit may include: a fourth switch circuit, a fifth switch circuit, a sixth switch circuit, and a seventh switch circuit. Wherein, the control terminal of the fourth switch circuit can be electrically connected to the first node A, the input terminal of the fourth switch circuit can be used to access the fourth input signal, and the output terminal of the fourth switch circuit is respectively connected to the output terminal of the fifth switch circuit. The output end and the control end of the sixth switch circuit are electrically connected. The control end of the fifth switch circuit is used to connect to the third input signal, and the input end of the fifth switch circuit and the input end of the sixth switch circuit are used to connect to the fifth input signal. The output end of the sixth switch circuit is electrically connected to the input end of the seventh switch circuit. The control terminal of the seventh switch circuit can be used to access the second input signal. The output end of the seventh switch circuit may be electrically connected to the above-mentioned second node B.

In a possible implementation manner, referring to a in FIG. 2 , the above-mentioned fourth switch circuit may include a tenth switch circuit and an eleventh switch circuit. The control terminal of the tenth switch circuit can be used to access the second input signal, the input terminal of the tenth switch circuit can be used to access the fourth input signal, and the output terminal of the tenth switch circuit can be connected to the eleventh switch circuit. The output terminal is electrically connected. The output end of the eleventh switch circuit, the output end of the fifth switch circuit and the control end of the sixth switch circuit are electrically connected to the third node C.

Referring to a in FIG. 2 , the above-mentioned light-emitting driving circuit may further include a second capacitor C2 for accessing the fourth input signal. The second capacitor C2 is used for compensating the potential of the second node B described above. The second capacitor C2 may be electrically connected to the fourth node D with the input end of the seventh switch circuit.

FIG. 3 illustrates a schematic structural diagram of another light-emitting driving circuit provided by an embodiment of the present invention. Referring to FIG. 3 , in a possible implementation manner, when the second capacitor C2 and the output end of the seventh switch circuit are electrically connected to the second node B, the light-emitting driving circuit may further include a third capacitor C3 . The third capacitor C3 can be used to further compensate the potential of the second node B described above. The first pole of the third capacitor C3 and the input terminal of the seventh switch circuit are electrically connected to the fourth node D, and the second pole of the third capacitor C3 is electrically connected to the control terminal of the seventh switch circuit. Specifically, through the coupling effect of the third capacitor C3, the second node B can reach a higher potential. At the same time, the second capacitor C2 is no longer used as the holding capacitor of the fourth node D, but is used as the holding capacitor of the second node B, which can make the output of the light-emitting driving circuit more stable.

Referring to a in Fig. 2, the first output circuit may include an eighth switch circuit and a fourth capacitor C4, and the second output circuit may include a ninth switch circuit. Wherein, the input terminal of the eighth switch circuit can be used to access the fifth input signal, the output terminal of the eighth switch circuit is electrically connected to the first pole of the fourth capacitor C4, and the control terminal of the eighth switch circuit is electrically connected to the fourth capacitor C4 The second pole of is electrically connected to the first node A.

The input end of the ninth switch circuit can be used to access the fourth input signal, and the output end of the ninth switch circuit is electrically connected with the output end of the eighth switch circuit.

Referring to b in FIG. 2 , at the same time, the potentials of the third input signal and the second input signal are opposite. For example: when the second input signal is at a high level, the third input signal is at a low level. Or, when the third input signal is at a high level, the second input signal is at a low level.

It should be noted that the above-mentioned first switch circuit, second switch circuit, third switch circuit, fifth switch circuit, sixth switch circuit, seventh switch circuit, eighth switch circuit, ninth switch circuit, and tenth switch circuit and the eleventh switch circuit may both be transistors. It should be understood that the transistor may be a P-type transistor or an N-type transistor. The material of the transistor may be low temperature polysilicon (full name in English: Low Temperature Poly-silicon, abbreviation in English: LTPS), but not limited to this.

The second input signal CLK1 and the third input signal CLK2 may be two clock signals respectively, the fourth input signal VGL may correspond to the low level of the clock signal, and the fifth input signal VGH may correspond to the high level of the clock signal.

It should be understood that the first switch circuit is the first transistor T1, the second switch circuit is the second transistor T2, the third switch circuit is the third transistor T3, the fifth switch circuit is the sixth transistor T6, and the sixth switch circuit is the fifth The transistor T5, the seventh switch circuit is the fourth transistor T4, the eighth switch circuit is the tenth transistor T10, the ninth switch circuit is the ninth transistor T9, the tenth switch circuit is the eighth transistor T8, and the eleventh switch circuit is the first transistor T8. Seven transistors T7.

The working mode of the above-mentioned light-emitting driving circuit can be divided into eight stages, which will be described below by taking an N-type transistor as an example.

2, it should be understood that when the above-mentioned first switch circuit, second switch circuit, third switch circuit, fifth switch circuit, sixth switch circuit, seventh switch circuit, eighth switch circuit, ninth switch circuit, When the ten switch circuit and the eleventh switch circuit are both N-type transistors, the above-mentioned first circuit is a pull-down circuit, which is used to clamp the potential of the second node B to a low level, and the above-mentioned second circuit is a pull-up circuit, using for clamping the potential of the second node B to a high level. Meanwhile, the fourth input signal is at the low level of VGL, and the fifth input signal is at the high level of VGH.

The first stage: the first input signal Input and the second input signal CLK1 are both at a high level, and the third input signal CLK2 is at a low level. The first transistor T1 is turned on, and the high level of the first input signal Input is transmitted to the first node A through the first transistor T1, that is, the first node A is at a high level, so that the tenth transistor T10 is turned on. At this time, the output terminal of the light-emitting driving circuit outputs a high level. When the first node A is at a high level, the second transistor T2 , the third transistor T3 and the seventh transistor T7 can be turned on at the same time. The third transistor T3 is turned on, which can keep the second node B at a low level. The seventh transistor T7 is turned on, so that the third node C can be discharged to a low level through the seventh transistor T7 and the eighth transistor T8, so that the fifth transistor T5 is turned off, so as to cut off the static state of the pull-up circuit of the second node B path.

The second stage: the third input signal CLK2 is at a high level, and the second input signal CLK1 is at a low level. At this time, the first node A maintains a high level, the second transistor T2 remains on, and the rising edge of the third input signal CLK2 is coupled to the first node A through the first capacitor C1, so the first node A will rise to a higher level , effectively suppressing the influence of the leakage current of the tenth transistor T10 on the light-emitting driving circuit, ensuring that the tenth transistor T10 is in the linear region, and the output of the light-emitting driving circuit is completely equal to the fifth input signal VGH. The third transistor T3 is kept on, the second node B is kept at a low level, and the second input signal CLK1 turns off the fourth transistor T4 to cut off the static path of the pull-up circuit of the second node B. The third input signal CLK2 turns on the sixth transistor T6, the third node C is raised to a high level, and the fifth transistor T5 is turned on, so that the fourth node D is also raised to a high level.

The third stage: the first input signal Input and the third input signal CLK2 are both at a low level, and the second input signal CLK1 is at a high level. At this time, the first transistor T1 is turned on, the first node A is lowered to a low level, the third transistor T3, the seventh transistor T7 and the tenth transistor T10 are turned off, and the fourth transistor T4 is turned on, making the fourth node D high The level is transferred to the second node B, thereby turning on the ninth transistor T9, and the output of the light-emitting driving circuit becomes a low level.

The fourth stage: the third input signal CLK2 is at a high level, and the second input signal CLK1 is at a low level. The first node A is kept at a low level, the second transistor T2 is turned off, and the rise of the third input signal CLK2 will not affect the first node A. The second node B maintains a high level, and the light driving circuit continues to output a low level. At the same time, the sixth transistor T6 is turned on, the third node C returns to a high level, the fifth transistor T5 is turned on, and the fourth node D returns to a high level.

The fifth stage: the first input signal Input and the second input signal CLK1 are both at a high level, and the third input signal CLK2 is at a low level. At this time, the first transistor T1 is turned on, and the first node A returns to a high level, so that the tenth transistor T10 is turned on, and the light driving circuit outputs a high level. At the same time, the high level output by the light drive circuit will further increase the potential of the first node A through the capacitive coupling effect of the fourth capacitor C4, so that the tenth transistor T10 works in the linear region, so that the output of the light drive circuit and the fifth The input signal VGH is equal to the voltage. When the first node A is at a high level, the second transistor T2 , the third transistor T3 and the seventh transistor T7 are turned on at the same time. Wherein, the third transistor T3 is turned on, so that the second node B becomes a low level. The seventh transistor T7 is turned on, so that the third node C is discharged to a low level through the seventh transistor T7 and the eighth transistor T8, so that the fifth transistor T5 is turned off to cut off the static path of the pull-up circuit of the second node B.

The sixth stage: the third input signal CLK2 is at a high level, and the second input signal CLK1 is at a low level. Changes between each transistor and each node are the same as in the second stage, and are not repeated here.

The seventh stage: the third input signal CLK2 is at a low level, and the first input signal Input and the second input signal CLK1 are at a high level. Changes between each transistor and each node are the same as in the first stage, and are not repeated here.

Eighth stage: the third input signal CLK2 is at a high level, and the second input signal CLK1 is at a low level. Changes between each transistor and each node are the same as in the second stage, and are not repeated here.

It can be known from the working mode of the above light-emitting driving circuit that the potentials of the first node A and the second node B are completely opposite, which eliminates the floating stage in the prior art and makes the circuit output more stable. Meanwhile, in the fifth stage, through the coupling effect of the fourth capacitor C4, the problem of output steps in the prior art can be solved, so that the light emission control is more accurate and the light emission time is more stable. Furthermore, the second potential control circuit, that is, the second transistor T2 and the first capacitor C1 can effectively suppress the influence of the leakage current of the tenth transistor T10 on the light-emitting driving circuit, and keep as few clock signal control lines as possible. Only two clock signals can be used to complete stable and reliable light-emitting signal output. Easy to implement high resolution narrow bezel applications.

FIG. 4 illustrates a schematic structural diagram of a light-emitting driving circuit provided by an embodiment of the present invention when the above transistors are all P-type transistors. 4, when the above transistors are P-type transistors, the second input signal will become CLK2, the third input signal will become CLK1, the fourth input signal will become VGH, and the fifth input signal will become VGL. At this time, the first circuit is a pull-up circuit for clamping the potential of the second node B to a high level, and the second circuit is a pull-down circuit for clamping the potential of the second node B to a low level . The principle of change between each transistor and each node is the same as when the above-mentioned transistors are all N-type transistors, and details are not repeated here.

Embodiments of the present invention also provide a display driving circuit, which may include the above-mentioned light-emitting driving circuit.

Compared with the prior art, the beneficial effects of the display driving circuit provided by the embodiments of the present invention are the same as the beneficial effects of the above-mentioned light-emitting driving circuit, which will not be repeated here.

Embodiments of the present invention also provide a driving method for a light-emitting circuit, using the above circuit. The driving method of the light-emitting circuit includes:

When the first output circuit outputs the light-emitting driving signal under the control of the potential of the first node, the second output circuit is in an off state under the control of the potential of the second node. When the second output circuit outputs the light-emitting driving signal under the control of the potential of the second node, the first output circuit is in an off state under the control of the potential of the first node.

Compared with the prior art, the beneficial effects of the driving method of the light-emitting circuit provided by the embodiment of the present invention are the same as those of the above-mentioned light-emitting driving circuit, which will not be repeated here.

The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention. should be included within the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

A light-emitting driving circuit, comprising: an input circuit, a first potential control circuit, a second potential control circuit, a first output circuit and a second output circuit;

The output end of the input circuit, the control end of the first output circuit, the output end of the first potential control circuit, and the control end of the second potential control circuit are all electrically connected to the first node; The output terminal of the two-potential control circuit and the control terminal of the second output circuit are both electrically connected to the second node; the first potential control circuit is used to compensate the potential of the first node; the second potential control circuit for compensating the potential of the second node;

When the first output circuit is configured to output a light-emitting driving signal under the control of the potential of the first node, the second output circuit is configured to be in an off state under the control of the potential of the second node ;

When the second output circuit is used to output a light-emitting driving signal under the control of the potential of the second node, the first output circuit is used to be in an off state under the control of the positioning of the first node .
The light-emitting driving circuit according to claim 1, wherein the input circuit comprises a first switch circuit, an input terminal of the first switch circuit is used to connect a first input signal, and a control terminal of the first switch circuit For accessing the second input signal, the output end of the first switch circuit is electrically connected to the first node.
The light-emitting driving circuit according to claim 1, wherein the first potential control circuit comprises a second switch circuit and a first capacitor; a control end of the second switch circuit is electrically connected to the first node, the The input end of the second switch circuit is used for accessing the third input signal, and the output end of the second switch circuit is electrically connected to the first node through the first capacitor.
The light-emitting driving circuit according to any one of claims 1 to 3, wherein the second potential control circuit comprises a first circuit and a second circuit; an output end of the first circuit and an output of the second circuit The terminals are all electrically connected to the second node; the first circuit is used to clamp the potential of the second node to a first level, and the second circuit is used to clamp the potential of the second node bit to the second level.
The light-emitting driving circuit according to claim 4, wherein the first circuit comprises a third switch circuit, a control end of the third switch circuit is electrically connected to the first node, and an input of the third switch circuit is electrically connected to the first node. The terminal is used to access the fourth input signal, and the output terminal of the third switch circuit is electrically connected to the second node;

The second circuit includes: a fourth switch circuit, a fifth switch circuit, a sixth switch circuit and a seventh switch circuit;

The control terminal of the fourth switch circuit is electrically connected to the first node, the input terminal of the fourth switch circuit is used to connect a fourth input signal, and the output terminal of the fourth switch circuit is respectively connected to the first node. The output end of the fifth switch circuit is electrically connected to the control end of the sixth switch circuit, and the control end of the fifth switch circuit is used to connect the third input signal; the input end of the fifth switch circuit is connected to the control end of the fifth switch circuit. The input end of the sixth switch circuit is used to access the fifth input signal, the output end of the sixth switch circuit is electrically connected to the input end of the seventh switch circuit, and the control end of the seventh switch circuit for accessing the second input signal; the output end of the seventh switch circuit is electrically connected to the second node.
The light-emitting driving circuit according to claim 5, further comprising a second capacitor for accessing the fourth input signal, the second capacitor is used for compensating the potential of the second node; wherein,

the second capacitor is electrically connected to the input end of the seventh switch circuit; or,

It also includes a third capacitor and a second capacitor for accessing the fourth input signal, the second capacitor is electrically connected to the output end of the seventh switch circuit, and the first pole of the third capacitor is connected to the The input terminal of the seventh switch circuit is electrically connected, and the second pole of the third capacitor is electrically connected to the control terminal of the seventh switch circuit.
The lighting driving circuit according to claim 5, wherein the first output circuit comprises an eighth switch circuit and a fourth capacitor, and the second output circuit comprises a ninth switch circuit;

The input end of the eighth switch circuit is used to access the fifth input signal, the output end of the eighth switch circuit is electrically connected to the first pole of the fourth capacitor, and the control of the eighth switch circuit The terminal is electrically connected to the second pole of the fourth capacitor;

The input end of the ninth switch circuit is used for accessing the fourth input signal, and the output end of the ninth switch circuit is electrically connected with the output end of the eighth switch circuit.
The light-emitting driving circuit according to claim 4, at the same time, the potentials of the third input signal and the second input signal are opposite; wherein,

When the second input signal is at a high level, the third input signal is at a low level; or,

When the third input signal is at a high level, the second input signal is at a low level.
A display driving circuit, comprising the light-emitting driving circuit according to any one of claims 1 to 8.
A driving method of a light-emitting circuit, applying the circuit of any one of claims 1 to 8; the driving method of the light-emitting circuit comprises:

The first potential control circuit is used to compensate the potential of the first node, and the second potential control circuit is used to compensate the potential of the second node;

When the first output circuit outputs a light-emitting driving signal under the control of the potential of the first node, the second output circuit is in an off state under the control of the potential of the second node;

When the second output circuit outputs a light-emitting driving signal under the control of the potential of the second node, the first output circuit is in an off state under the control of the potential of the first node.