WO2022153520A1 - Power converter - Google Patents

Power converter Download PDF

Info

Publication number
WO2022153520A1
WO2022153520A1 PCT/JP2021/001401 JP2021001401W WO2022153520A1 WO 2022153520 A1 WO2022153520 A1 WO 2022153520A1 JP 2021001401 W JP2021001401 W JP 2021001401W WO 2022153520 A1 WO2022153520 A1 WO 2022153520A1
Authority
WO
WIPO (PCT)
Prior art keywords
switching element
voltage
detection resistor
detection
power conversion
Prior art date
Application number
PCT/JP2021/001401
Other languages
French (fr)
Japanese (ja)
Inventor
翔太朗 烏山
航平 恩田
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP2022575025A priority Critical patent/JP7361955B2/en
Priority to PCT/JP2021/001401 priority patent/WO2022153520A1/en
Publication of WO2022153520A1 publication Critical patent/WO2022153520A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Definitions

  • This application relates to a power conversion device.
  • the function of power conversion is realized by the operation of turning on / off a plurality of semiconductor switching elements constituting the power converter.
  • the semiconductor switching element include a voltage-driven semiconductor switching element represented by a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) and an IGBT (Insulated-Gate-Bipolar-Transistor). Downtimelessness is realized by grasping the deterioration state of the semiconductor switching element and updating the semiconductor switching element before a problem occurs in the power conversion device.
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • IGBT Insulated-Gate-Bipolar-Transistor
  • an abnormality detection device that can detect an abnormality in a power converter with a small number of terminal voltage detections and can secure the same abnormality detection accuracy even if the number of phases increases.
  • An abnormality detection device for providing the above is shown in Patent Document 1.
  • the abnormality detection device shown in Patent Document 1 includes one or more parallel power conversion units, one high-select terminal voltage detection unit having a corresponding detection resistor for one parallel power conversion unit, and one high-select terminal voltage detection unit. , One abnormality detection unit is provided, and in each parallel power conversion unit, the abnormality detection unit detects an abnormality of each power converter included in the parallel power conversion unit based on the voltage at the gathering point.
  • the detected voltage value is compared with a predetermined threshold value to determine a failure (abnormality is detected), and the state of deterioration of the semiconductor switching element is determined.
  • a power conversion device having a function of determining a state of deterioration of a semiconductor switching element is desired.
  • An object of the present application is to provide a power conversion device having a function of determining a state of deterioration of a semiconductor switching element.
  • the power conversion device of the present application is connected in parallel to a first detection resistor connected in parallel to a first switching element provided on the high side of the arm and a second switching element provided on the low side of the arm. Switching operation of the first switching element and the voltage detector that detects the voltage value across the first detection resistor and / or the voltage value across the second detection resistor. And a control circuit for controlling the switching operation of the second switching element, the operation of the first switching element and the operation of the second switching element are stopped, and the voltage detector detects the operation.
  • the withstand voltage of the first switching element deteriorates and / or the withstand voltage of the second switching element is based on the voltage value across the first detection resistor and / or the voltage value across the second detection resistor. It is characterized by judging deterioration.
  • the power conversion device of the present application it is possible to diagnose the withstand voltage deterioration of the first switching element or the second switching element.
  • FIG. It is a block diagram of the withstand voltage deterioration detection circuit of the power conversion apparatus of Embodiment 1.
  • FIG. It is explanatory drawing which shows the operation when the switching element of the power conversion apparatus of Embodiment 1 is normal. It is explanatory drawing which shows the operation when the withstand voltage of the switching element of the power conversion apparatus of Embodiment 1 deteriorates. It is explanatory drawing which shows the detection method when the withstand voltage of the switching element of the power conversion apparatus of Embodiment 1 deteriorates. It is explanatory drawing which shows the detection method when the withstand voltage of the switching element of the power conversion apparatus of Embodiment 1 deteriorates at the same time up and down.
  • Embodiment 1 Hereinafter, embodiments will be described with reference to the drawings. In the description described below, the same components or the corresponding components are designated by the same reference numerals. Further, in the following description, the state of the element in which the device does not operate is referred to as “failure”, and the case in which the element operates is referred to as “deterioration”. In “deterioration”, if the test (screening) performed before the device is shipped, it is confirmed that the required specifications, quality, and reliability targets of various tests are satisfied. The target element is.
  • FIG. 1 shows an example of the configuration of the withstand voltage deterioration detection circuit of the power conversion device according to the first embodiment.
  • the withstand voltage deterioration detection circuit 100 of the power conversion device includes a first switching element 211, a second switching element 212, a first detection resistor 11, a second detection resistor 12, a first voltage detector 31, and a control circuit 40. It has.
  • the first switching element 211 and the second switching element 212 constitute an inverter of a power conversion device, the first switching element 211 is provided on the high side of the arm, and the second switching element 212 is It is provided on the low side of the arm.
  • the first switching element 211 and the second switching element 212 are connected in series.
  • the first detection resistor 11 is connected in parallel to the first switching element 211, and the second detection resistor 12 is connected in parallel to the second switching element 212.
  • the first voltage detector 31 is connected in parallel to either the first detection resistor 11 or the second detection resistor 12, and the result of the voltage detected by the first voltage detector 31 is sent to the control circuit 40. Be done.
  • the control circuit 40 gives a signal for driving the first switching element 211 and the second switching element 212.
  • the control circuit 40 determines the deteriorated state of the first switching element 211 and the second switching element 212. When it is determined that the control circuit 40 has deteriorated, a warning is notified by the notification means 41.
  • FIG. 1 shows only the first arm 21 in which the first switching element 211 and the second switching element 212 are connected in series because the minimum configuration requirements are described, but the third switching element 221 and the third switching element 221 are shown.
  • the second arm 22 in which the switching elements 222 of 4 are connected in series and the first arm may be connected in parallel. In this case, it becomes an H-bridge circuit.
  • the third arm 23 and the second arm 22 in which the fifth switching element 231 and the sixth switching element 232 are connected in series may be connected in parallel. In this case, it is a three-phase inverter circuit.
  • Switching elements connected in series (for example, the first switching element 211 and the second switching element 212) alternately repeat on and off. For example, when the first switching element 211 is on, the second switching element 212 is off. Further, when the first switching element 211 is off, the second switching element 212 is turned on.
  • the resistance values of the first detection resistor 11 and the second detection resistor 12 are designed so that the current value flowing through the detection resistor is larger than the leak current parasitic on the first and second switching elements. Further, the first and second detection resistors use the same resistance value. Deterioration is determined by the voltage detected by the first voltage detector 31 in a state where the first and second switching elements are stopped.
  • FIG. 2 shows an example of a change in voltage across the first detection resistor 11 and the second detection resistor 12 when the withstand voltage of the switching element has not deteriorated in order to detect the withstand voltage deterioration according to the first embodiment. Is. By using resistance values equal to the first detection resistor 11 and the second detection resistor 12, if there is no deterioration in the withstand voltage of the switching element, the voltage across the first and second detection resistors is the bus voltage. Converges near the midpoint.
  • the threshold voltage for detecting deterioration takes a margin of plus or minus several volts from the midpoint of the bus voltage, and if it falls within that margin, switching There is no deterioration in the withstand voltage of the element, and it is judged to be normal.
  • FIG. 3 is an example of a change in the voltage across the first detection resistor 11 and the second detection resistor 12 when the withstand voltage of the switching element is deteriorated in order to detect the withstand voltage deterioration according to the first embodiment. ..
  • the withstand voltage of either the first switching element 211 or the second switching element 212 deteriorates, the withstand voltage leak current flowing through the deteriorated switching element becomes large, and the voltage across the first and second detection resistors becomes large. It varies from the midpoint of the bus voltage.
  • the threshold voltage for detecting deterioration is provided with a margin of plus or minus several volts from the midpoint of the bus voltage, but the first and second detection resistors exceed the provided margin. When the value of the voltage across both ends varies, it is judged that the withstand voltage of the switching element has deteriorated.
  • the resistance values of the first detection resistor 11 and the second detection resistor 12 are larger than the leakage current parasitic on the first and second switching elements, when the withstand voltage of the elements deteriorates.
  • the change in the withstand voltage leak current due to the withstand voltage deterioration of the element is reflected in the voltage across the first detection resistor 11 and the second detection resistor 12, and the withstand voltage deterioration of the element can be detected with high accuracy.
  • the control circuit 40 When the switching element is determined to be deteriorated, the control circuit 40 notifies the receiver side.
  • the notification means 41 shown in FIG. 1 is provided with an abnormality lamp in the device, and turns on the abnormality lamp when it is determined that the device has deteriorated.
  • the device may be stopped immediately after the abnormality lamp lights up. Further, since the abnormal lamp is lit when the switching element is determined to be deteriorated, the device can operate even if the abnormal lamp is lit. Therefore, the device may be replaced after the next stop opportunity.
  • the operation may be changed so as to temporarily extend the life of the switching element. For example, if the original modulation method of the inverter is three-phase modulation, change to two-phase modulation, lower the switching carrier, or reduce the number of switchings.
  • the life of the switching element can be extended by a temporary measure so that the device can be operated without stopping. Since the device operates normally even if the switching element deteriorates, this is a temporary temporary measure aimed at preventing the switching element from failing and the device from going down. After the switching element is notified of deterioration, the device can be operated without downtime by replacing the element or the circuit board after the next device stop.
  • the timing for detecting deterioration is a state in which the operations of the first and second switching elements are stopped. Specifically, it is either when the device is started or stopped, or when the inverter operation is stopped during the operation period of the device.
  • the withstand voltage leak current increases in proportion to the temperature of the element, for example, the junction temperature which is the temperature of the chip joint surface of the element
  • the withstand voltage deterioration can be determined with the highest accuracy by detecting immediately after the operation of the device is stopped. Also, since the junction temperature of the switching element is not high when the device is started, the inverter is short-circuited for a short time to raise the junction temperature of the switching element, and when the temperature is higher than the environmental temperature, it should be detected at that timing.
  • the withstand voltage deterioration may be determined with high accuracy.
  • the temperature of the switching element the case where the junction temperature, which is the temperature of the chip junction surface of the switching element, is detected at a temperature higher than the environmental temperature is shown, but it does not necessarily have to be the junction temperature, and the switching element Any temperature may be used as long as it is the temperature.
  • FIG. 4 is a diagram showing a method for detecting pressure resistance deterioration according to the first embodiment.
  • the withstand voltage deterioration is detected by the time constant of the voltage across the detection resistor after the switching element is turned off.
  • the voltage value at t2 after a certain period of time from the timing t1 when the switching is turned off is detected. Normality or deterioration is judged by the voltage value of t2.
  • the voltage value for the time of t2 is arbitrarily set, but the voltage of t2 when the withstand voltage deteriorates is extremely low (during deterioration A shown in FIG. 4) or extremely high (during deterioration shown in FIG. 4).
  • FIG. 5 shows an example of changes in the voltage across the first detection resistor 11 and the second detection resistor 12 when the switching element is normal and when the switching element deteriorates at the same time.
  • the withstand voltage leak currents flowing through the switching elements become almost equal, so the voltage across the first detection resistor 11 and the second detection resistor 12 is within the margin provided from the midpoint of the bus voltage. Fits in. Therefore, the voltage detection method shown so far cannot detect when the upper and lower elements are deteriorated at the same time or similarly.
  • the time for convergence to the midpoint voltage changes, so that the deterioration can be detected by the time constant.
  • the first voltage detector 31 holds the initially detected voltage (initial voltage). The first voltage detector 31 detects the voltage each time the device stops operating. At this time, the initial voltage is compared with the latest detected voltage. If the latest detected voltage is within the range of the initial voltage and a margin of several V, it is judged to be normal, and if it exceeds the margin, it is judged that the withstand voltage of the element has deteriorated. In the method of determining that the margin is exceeded from the midpoint of the bus voltage, it is necessary to set the deterioration range in consideration of the variation in the withstand voltage leak of the switching element and the variation in the detection resistance. The detection accuracy of is likely to deteriorate.
  • the voltage considering the variation is first stored and the initial voltage value is compared with the measured repression, so that the withstand voltage deterioration can be detected with higher accuracy.
  • FIG. 6 shows a circuit diagram for detecting deterioration when the withstand voltage of the elements connected in series deteriorates at the same time.
  • the circuit in which the third detection resistor 13 and the detection switching element 14 are connected in series is either the first detection resistor or the second detection resistor. The configuration is connected to one side.
  • the third detection resistor 13 is used this time, the on-resistance of the detection switching element 14 may be used instead of the third detection resistor 13.
  • the detection switching element 14 is turned on before or after the detection of the voltage across the first or second detection resistor. When only one of the switching elements is deteriorated, it can be detected from the variation between the voltage across the first or second detection resistor and the midpoint potential with the detection switching element 14 turned off in the same manner as described above. To detect when the withstand voltage of the switching element deteriorates at the same time, the detection switching element 14 is turned on. The combined resistance changes when the third detection resistor and the first or second detection resistor are connected in parallel. As a result, a difference is generated in the resistance value when both the upper and lower switching elements are normal and when they are deteriorated, and detection becomes possible.
  • FIG. 7 is an example of a circuit when connected to a circuit actually used.
  • the first to sixth switching elements include a first arm 21 in which the first switching element 211 and the second switching element 212 are connected in series, and the third switching elements 221 and the fourth. It is composed of a second arm 22 in which the switching element 222 is connected in series, and a third arm 23 in which the fifth switching element 231 and the sixth switching element 232 are connected in series, and the first arm 21 and the second arm 22 It has an inverter configuration in which the third arm 23 is connected in parallel.
  • the series connection terminal of 232 is connected to the motor 50.
  • the withstand voltage deterioration detection circuit is connected to at least one of the first arm 21, the second arm 22, or the third arm 23. Since each arm is connected via a motor, if a sufficiently long time can be secured after the first to sixth switching elements stop switching, a method for detecting withstand voltage deterioration can be incorporated into one arm. , Deterioration can be diagnosed.
  • the control circuit 40 monitors the gate signal that drives the switching element output by the control circuit 40.
  • the drain voltage of the switching element detected from the first voltage detector 31 is compared with the gate signal output by the control circuit 40, and a short-circuit failure of the switching element is detected from the contradiction between the gate signal and the drain voltage. For example, when the switching element is normal and the gate signal is output as an off signal, the drain voltage of the switching element becomes the bus voltage. On the other hand, when the switching element has a short failure, the drain voltage of the switching element becomes zero even if the gate signal outputs an off signal. In this way, a short-circuit failure of the switching element is detected from the contradiction between the gate signal and the drain voltage.
  • the device In order to detect a short circuit in the switching element, the device must be in an operating state. When a short-circuit failure of the switching element is detected, the abnormality lamp of the device is turned on and the device is stopped promptly.
  • a switching element has a time required for turn-on to switch from an off state to an on state (turn-on time ton) and a time required for turn-off to switch from an on state to an off state (turn-off time toff).
  • turn-on time ton a time required for turn-on to switch from an off state to an on state
  • turn-off time toff a time required for turn-off to switch from an on state to an off state
  • the turn-on time ton and the turn-off time toff increase.
  • the turn-on time ton and the turn-off time ton increase or decrease depending on the variation in the electrical characteristics of the first switching element 211 and the second switching element 212 and the operating conditions such as the junction temperature.
  • the first switching element 211 and the second switching element 212 are alternately turned on, but the first switching element 211 and the second switching When the on and off states of the element 212 are switched at the same time, both the first switching element 211 and the second switching element 212 are turned on at the same time, so that an arm short circuit occurs.
  • the gate-on-off command signal is gate-on-off so that the other gate-on-off command signal does not turn on until a certain amount of time has passed after one gate-on-off command signal was turned off. The timing of the off command signal is controlled.
  • the dead time is set based on the worst conditions that take into account the variation in the characteristics of switching elements and all operating conditions when designing and developing electric power equipment.
  • the switching element is a semiconductor switching element such as SiC (Silicon Carbide) -MOSFET, GaN (Gallium Nitride), Si-MOSFET, or IGBT.
  • the controller, switch control circuit, booster controller, and high-voltage controller described in the embodiment are composed of a processor 200 and a storage device 201 as shown in FIG. 8 as an example of hardware.
  • the storage device includes a volatile storage device such as a random access memory and a non-volatile auxiliary storage device such as a flash memory. Further, an auxiliary storage device of a hard disk may be provided instead of the flash memory.
  • the processor 200 executes the program input from the storage device 201. In this case, a program is input from the auxiliary storage device to the processor 200 via the volatile storage device. Further, the processor 200 may output data such as a calculation result to the volatile storage device of the storage device 201, or may store the data in the auxiliary storage device via the volatile storage device.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

In order to provide a power converter that can determine the state of deterioration of a switching element, the present invention comprises a first detection resistor (11) connected in parallel to a first switching element (211) provided on the high side, a second detection resistor (12) connected in parallel to a second switching element (212) provided on the low side, a voltage detector (31) that detects the voltage on both ends of the first detection resistor (11) or the second detection resistor (12), and a control circuit (40) that controls the switching operation of the first and second switching elements (211, 212). In a state in which the operation of the first and second switching elements (211, 212) is stopped and the temperatures of the first switching element (211) and the second switching element (212) are higher than the environment temperature, the control circuit (40) determines deterioration in the withstand voltage of the first and second switching elements (211, 212) from the voltage values detected by the voltage detector (31).

Description

電力変換装置Power converter
 本願は、電力変換装置に関するものである。 This application relates to a power conversion device.
 電力変換装置において、電力変換の機能は、電力変換器を構成する複数の半導体スイッチング素子をオン/オフさせる動作によって実現されている。半導体スイッチング素子としては、例えばMOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)、IGBT(Insulated-Gate-Bipolar-Transistor)に代表される電圧駆動型の半導体スイッチング素子がある。
 この半導体スイッチング素子の劣化状態を把握して、電力変換装置における問題の発生前に半導体スイッチング素子の更新を行うことによってダウンタイムレス化が実現される。
In the power converter, the function of power conversion is realized by the operation of turning on / off a plurality of semiconductor switching elements constituting the power converter. Examples of the semiconductor switching element include a voltage-driven semiconductor switching element represented by a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) and an IGBT (Insulated-Gate-Bipolar-Transistor).
Downtimelessness is realized by grasping the deterioration state of the semiconductor switching element and updating the semiconductor switching element before a problem occurs in the power conversion device.
 電力変換装置における異常を検出する装置として、少ない端子電圧検出数で電力変換器の異常を検出可能であり、且つ、相の数が増加しても同等の異常検出精度を確保可能な異常検出装置を提供する異常検出装置が特許文献1に示されている。
 特許文献1に示されている異常検出装置では、一つ以上の並列電力変換ユニットを備え、一つの並列電力変換ユニットに対し、対応する検出用抵抗を伴う一つのハイセレクト端子電圧検出部、及び、一つの異常検出部が設けられ、各並列電力変換ユニットにおいて異常検出部は、集合点の電圧に基づき、その並列電力変換ユニットに含まれる各電力変換器の異常を検出するというものである。
As a device for detecting an abnormality in a power converter, an abnormality detection device that can detect an abnormality in a power converter with a small number of terminal voltage detections and can secure the same abnormality detection accuracy even if the number of phases increases. An abnormality detection device for providing the above is shown in Patent Document 1.
The abnormality detection device shown in Patent Document 1 includes one or more parallel power conversion units, one high-select terminal voltage detection unit having a corresponding detection resistor for one parallel power conversion unit, and one high-select terminal voltage detection unit. , One abnormality detection unit is provided, and in each parallel power conversion unit, the abnormality detection unit detects an abnormality of each power converter included in the parallel power conversion unit based on the voltage at the gathering point.
特開2019-110720号公報Japanese Unexamined Patent Publication No. 2019-11720
 しかしながら、提案されている技術では、検出された電圧値と予め定められた閾値とを比較して、故障と判断する(異常を検出する)というもので、半導体スイッチング素子の劣化の状態を判断するものではなく、半導体スイッチング素子の劣化の状態を判断する機能を備えた電力変換装置が望まれている。
 本願は、半導体スイッチング素子の劣化の状態を判断する機能を備えた電力変換装置を提供することを目的としている。
However, in the proposed technique, the detected voltage value is compared with a predetermined threshold value to determine a failure (abnormality is detected), and the state of deterioration of the semiconductor switching element is determined. Instead, a power conversion device having a function of determining a state of deterioration of a semiconductor switching element is desired.
An object of the present application is to provide a power conversion device having a function of determining a state of deterioration of a semiconductor switching element.
 本願の電力変換装置は、アームのハイサイドに設けられた第1のスイッチング素子に並列に接続された第1の検出抵抗と、前記アームのローサイドに設けられた第2のスイッチング素子に並列に接続された第2の検出抵抗と、前記第1の検出抵抗の両端の電圧値および/または前記第2の検出抵抗の両端電圧値を検出する電圧検出器と、前記第1のスイッチング素子のスイッチング動作と前記第2のスイッチング素子のスイッチング動作とを制御する制御回路とを備え、前記第1のスイッチング素子の動作と前記第2のスイッチング素子の動作とが停止し、前記電圧検出器によって検出した前記第1の検出抵抗の両端電圧値および/または前記第2の検出抵抗の両端電圧値に基づいて前記制御回路において、前記第1のスイッチング素子の耐圧劣化および/または前記第2のスイッチング素子の耐圧劣化を判断することを特徴とする。

The power conversion device of the present application is connected in parallel to a first detection resistor connected in parallel to a first switching element provided on the high side of the arm and a second switching element provided on the low side of the arm. Switching operation of the first switching element and the voltage detector that detects the voltage value across the first detection resistor and / or the voltage value across the second detection resistor. And a control circuit for controlling the switching operation of the second switching element, the operation of the first switching element and the operation of the second switching element are stopped, and the voltage detector detects the operation. In the control circuit, the withstand voltage of the first switching element deteriorates and / or the withstand voltage of the second switching element is based on the voltage value across the first detection resistor and / or the voltage value across the second detection resistor. It is characterized by judging deterioration.

 本願の電力変換装置によれば、第1のスイッチング素子または第2のスイッチング素子の耐圧劣化の診断が可能となる。 According to the power conversion device of the present application, it is possible to diagnose the withstand voltage deterioration of the first switching element or the second switching element.
実施の形態1の電力変換装置の耐圧劣化検出回路の構成図である。It is a block diagram of the withstand voltage deterioration detection circuit of the power conversion apparatus of Embodiment 1. FIG. 実施の形態1の電力変換装置のスイッチング素子が正常時の動作を示す説明図である。It is explanatory drawing which shows the operation when the switching element of the power conversion apparatus of Embodiment 1 is normal. 実施の形態1の電力変換装置のスイッチング素子の耐圧が劣化したときの動作を示す説明図である。It is explanatory drawing which shows the operation when the withstand voltage of the switching element of the power conversion apparatus of Embodiment 1 deteriorates. 実施の形態1の電力変換装置のスイッチング素子の耐圧が劣化したときの検出方法を示す説明図である。It is explanatory drawing which shows the detection method when the withstand voltage of the switching element of the power conversion apparatus of Embodiment 1 deteriorates. 実施の形態1の電力変換装置のスイッチング素子の耐圧が上下同時に劣化したときの検出方法を示す説明図である。It is explanatory drawing which shows the detection method when the withstand voltage of the switching element of the power conversion apparatus of Embodiment 1 deteriorates at the same time up and down. 実施の形態2の電力変換装置の耐圧劣化検出回路図の構成図である。動作説明図である。It is a block diagram of the withstand voltage deterioration detection circuit diagram of the power conversion apparatus of Embodiment 2. It is an operation explanatory drawing. 実施の形態3の電力変換装置の耐圧劣化検出回路図の構成図である。It is a block diagram of the withstand voltage deterioration detection circuit diagram of the power conversion apparatus of Embodiment 3. 実施の形態において使用される制御手段のハードウエアの構成を示す構成図である。It is a block diagram which shows the hardware structure of the control means used in embodiment.
実施の形態1.
 以下、図面に基づいて実施の形態について説明する。なお、以下に記載の説明では、同様の構成要素または相当する構成要素には各々同じ符号を付けて示すものとする。
 また、以下の説明において、装置が動作しなくなる素子の状態を「故障」、素子が動作する場合を「劣化」とする。なお、「劣化」においては、素子が出荷される前に行われる試験(スクリーニング)が行われている場合には、各種の試験の要求仕様および品質、信頼性目標を満足していると確認されている素子が対象となる。
Embodiment 1.
Hereinafter, embodiments will be described with reference to the drawings. In the description described below, the same components or the corresponding components are designated by the same reference numerals.
Further, in the following description, the state of the element in which the device does not operate is referred to as "failure", and the case in which the element operates is referred to as "deterioration". In "deterioration", if the test (screening) performed before the device is shipped, it is confirmed that the required specifications, quality, and reliability targets of various tests are satisfied. The target element is.
 図1は、実施の形態1に係る電力変換装置の耐圧劣化検出回路の構成の一例を示している。電力変換装置の耐圧劣化検出回路100は、第1のスイッチング素子211、第2のスイッチング素子212、第1の検出抵抗11、第2の検出抵抗12、第1の電圧検出器31、制御回路40を備えている。 FIG. 1 shows an example of the configuration of the withstand voltage deterioration detection circuit of the power conversion device according to the first embodiment. The withstand voltage deterioration detection circuit 100 of the power conversion device includes a first switching element 211, a second switching element 212, a first detection resistor 11, a second detection resistor 12, a first voltage detector 31, and a control circuit 40. It has.
 第1のスイッチング素子211と第2のスイッチング素子212とは、電力変換装置のインバータを構成しており、第1のスイッチング素子211はアームのハイサイドに設けられ、第2のスイッチング素子212は、アームのローサイドに設けられている。第1のスイッチング素子211と第2のスイッチング素子212は、直列に接続されている。第1のスイッチング素子211に対して、並列に第1の検出抵抗11が接続され、第2のスイッチング素子212に対しては、第2の検出抵抗12が並列に接続されている。 The first switching element 211 and the second switching element 212 constitute an inverter of a power conversion device, the first switching element 211 is provided on the high side of the arm, and the second switching element 212 is It is provided on the low side of the arm. The first switching element 211 and the second switching element 212 are connected in series. The first detection resistor 11 is connected in parallel to the first switching element 211, and the second detection resistor 12 is connected in parallel to the second switching element 212.
 第1の電圧検出器31は第1の検出抵抗11もしくは第2の検出抵抗12のいずれか一方に並列に接続され、第1の電圧検出器31で検出した電圧の結果は制御回路40に送られる。制御回路40は、第1のスイッチング素子211と第2のスイッチング素子212を駆動する信号を与える。
 制御回路40は、第1のスイッチング素子211および第2のスイッチング素子212の劣化状態を判断する。制御回路40において、劣化していると判断した場合には、警告を通知手段41によって通知する。
The first voltage detector 31 is connected in parallel to either the first detection resistor 11 or the second detection resistor 12, and the result of the voltage detected by the first voltage detector 31 is sent to the control circuit 40. Be done. The control circuit 40 gives a signal for driving the first switching element 211 and the second switching element 212.
The control circuit 40 determines the deteriorated state of the first switching element 211 and the second switching element 212. When it is determined that the control circuit 40 has deteriorated, a warning is notified by the notification means 41.
 図1は、最低の構成要件で記載しているため第1のスイッチング素子211と第2のスイッチング素子212を直列接続した第1アーム21のみを示しているが、第3のスイッチング素子221と第4のスイッチング素子222を直列接続した第2アーム22と第1アームを並列に接続した構成でもよい。この場合、Hブリッジ回路となる。または、第5のスイッチング素子231と第6のスイッチング素子232を直列接続した第3アーム23と第2アーム22を並列に接続した構成でもよい。この場合、三相インバータ回路となる。
 直列接続されたスイッチング素子(例えば、第1のスイッチング素子211と第2のスイッチング素子212)は交互にオンとオフを繰り返す。例えば、第1のスイッチング素子211がオンの状態では、第2のスイッチング素子212はオフとなる。また、第1のスイッチング素子211がオフの状態では、第2のスイッチング素子212はオンとなる。
FIG. 1 shows only the first arm 21 in which the first switching element 211 and the second switching element 212 are connected in series because the minimum configuration requirements are described, but the third switching element 221 and the third switching element 221 are shown. The second arm 22 in which the switching elements 222 of 4 are connected in series and the first arm may be connected in parallel. In this case, it becomes an H-bridge circuit. Alternatively, the third arm 23 and the second arm 22 in which the fifth switching element 231 and the sixth switching element 232 are connected in series may be connected in parallel. In this case, it is a three-phase inverter circuit.
Switching elements connected in series (for example, the first switching element 211 and the second switching element 212) alternately repeat on and off. For example, when the first switching element 211 is on, the second switching element 212 is off. Further, when the first switching element 211 is off, the second switching element 212 is turned on.
(検出抵抗の設計方法)
 第1の検出抵抗11、第2の検出抵抗12の抵抗値は、検出抵抗に流れる電流値が第1および第2のスイッチング素子に寄生するリーク電流よりも大きくなるように設計する。また、第1と第2の検出抵抗は同じ値の抵抗値を使用する。
 なお、劣化は第1と第2のスイッチング素子が動作を停止した状態で、第1の電圧検出器31が検出した電圧で判断する。
(Design method of detection resistor)
The resistance values of the first detection resistor 11 and the second detection resistor 12 are designed so that the current value flowing through the detection resistor is larger than the leak current parasitic on the first and second switching elements. Further, the first and second detection resistors use the same resistance value.
Deterioration is determined by the voltage detected by the first voltage detector 31 in a state where the first and second switching elements are stopped.
(耐圧劣化の検出方法)
 図2は、実施の形態1に係る耐圧劣化を検出するための、スイッチング素子の耐圧が劣化していない場合の、第1の検出抵抗11と第2の検出抵抗12の両端電圧の変化の一例である。第1の検出抵抗11と第2の検出抵抗12に等しい値の抵抗値を利用することで、スイッチング素子の耐圧に劣化が無ければ、第1と第2の検出抵抗の両端電圧は母線電圧の中点付近に収束する。スイッチング素子の寄生の耐圧リーク電流および検出抵抗値にばらつきがあるため、劣化を検出する閾値電圧は母線電圧の中点からプラスマイナス数Vのマージンを取り、そのマージン以内に収まって入れば、スイッチング素子の耐圧に劣化はなく、正常と判断する。
(Detection method for pressure resistance deterioration)
FIG. 2 shows an example of a change in voltage across the first detection resistor 11 and the second detection resistor 12 when the withstand voltage of the switching element has not deteriorated in order to detect the withstand voltage deterioration according to the first embodiment. Is. By using resistance values equal to the first detection resistor 11 and the second detection resistor 12, if there is no deterioration in the withstand voltage of the switching element, the voltage across the first and second detection resistors is the bus voltage. Converges near the midpoint. Since there are variations in the parasitic withstand voltage leak current and detection resistance value of the switching element, the threshold voltage for detecting deterioration takes a margin of plus or minus several volts from the midpoint of the bus voltage, and if it falls within that margin, switching There is no deterioration in the withstand voltage of the element, and it is judged to be normal.
 図3は、実施の形態1に係る耐圧劣化を検出するための、スイッチング素子の耐圧が劣化した場合の、第1の検出抵抗11と第2の検出抵抗12の両端電圧の変化の一例である。第1のスイッチング素子211もしくは第2のスイッチング素子212のいずれか一方の耐圧が劣化した場合、劣化したスイッチング素子に流れる耐圧リーク電流が大きくなり、第1と第2の検出抵抗の両端電圧が、母線電圧の中点からばらついていく。スイッチング素子には寄生の耐圧リーク電流があるため、劣化を検出する閾値電圧は母線電圧の中点からプラスマイナス数Vのマージンを設けるが、設けたマージン以上に第1と第2の検出抵抗の両端電圧の値がばらついたとき、スイッチング素子の耐圧が劣化したと判断する。 FIG. 3 is an example of a change in the voltage across the first detection resistor 11 and the second detection resistor 12 when the withstand voltage of the switching element is deteriorated in order to detect the withstand voltage deterioration according to the first embodiment. .. When the withstand voltage of either the first switching element 211 or the second switching element 212 deteriorates, the withstand voltage leak current flowing through the deteriorated switching element becomes large, and the voltage across the first and second detection resistors becomes large. It varies from the midpoint of the bus voltage. Since the switching element has a parasitic withstand voltage leak current, the threshold voltage for detecting deterioration is provided with a margin of plus or minus several volts from the midpoint of the bus voltage, but the first and second detection resistors exceed the provided margin. When the value of the voltage across both ends varies, it is judged that the withstand voltage of the switching element has deteriorated.
 第1の検出抵抗11と第2の検出抵抗12の抵抗値を、第1および第2のスイッチング素子に寄生するリーク電流よりも大きくなるように設計することで、素子の耐圧が劣化した場合に、第1の検出抵抗11と第2の検出抵抗12の両端電圧に素子の耐圧劣化による耐圧リーク電流の変化が反映され、素子の耐圧劣化を高精度に検出することが可能となる。 By designing the resistance values of the first detection resistor 11 and the second detection resistor 12 to be larger than the leakage current parasitic on the first and second switching elements, when the withstand voltage of the elements deteriorates. The change in the withstand voltage leak current due to the withstand voltage deterioration of the element is reflected in the voltage across the first detection resistor 11 and the second detection resistor 12, and the withstand voltage deterioration of the element can be detected with high accuracy.
(劣化を検出した後の動作)
 スイッチング素子が劣化と判定された場合には、制御回路40から受け手側に通知する。例えば、図1に示した通知手段41は、装置に異常ランプを設け、劣化と判断した場合に異常ランプを点灯させる。異常ランプが点灯した際、直後に装置を停止してもよい。また、異常ランプの点灯はスイッチング素子が劣化と判断された場合であるため、異常ランプが点灯しても装置は動作可能である。そのため、次の停止する機会以降に装置を取り換えてもよい。
(Operation after detecting deterioration)
When the switching element is determined to be deteriorated, the control circuit 40 notifies the receiver side. For example, the notification means 41 shown in FIG. 1 is provided with an abnormality lamp in the device, and turns on the abnormality lamp when it is determined that the device has deteriorated. The device may be stopped immediately after the abnormality lamp lights up. Further, since the abnormal lamp is lit when the switching element is determined to be deteriorated, the device can operate even if the abnormal lamp is lit. Therefore, the device may be replaced after the next stop opportunity.
 また、スイッチング素子が劣化と判断された場合には、一時的にスイッチング素子を延命するように動作を変化せてもよい。例えば、元々のインバータの変調方法が三相変調であった場合は二相変調に変更する、スイッチングのキャリアを下げるなど、スイッチング回数を減らす方法に変更する。スイッチング素子が劣化と検出され警告が表示されてから、一時的な措置でスイッチング素子を延命することで、装置を止めずに動かすことができる。スイッチング素子が劣化しても装置は正常動作するため、スイッチング素子が故障し装置がダウンしないことを目的とした一時的な暫定措置である。スイッチング素子が劣化と通知されてからは、次の装置停止以降に素子ないし回路基板を取り換えることで、ダウンタイムなしに装置を稼働することが可能となる。 Further, when it is determined that the switching element has deteriorated, the operation may be changed so as to temporarily extend the life of the switching element. For example, if the original modulation method of the inverter is three-phase modulation, change to two-phase modulation, lower the switching carrier, or reduce the number of switchings. After the switching element is detected as deteriorated and a warning is displayed, the life of the switching element can be extended by a temporary measure so that the device can be operated without stopping. Since the device operates normally even if the switching element deteriorates, this is a temporary temporary measure aimed at preventing the switching element from failing and the device from going down. After the switching element is notified of deterioration, the device can be operated without downtime by replacing the element or the circuit board after the next device stop.
(劣化を検出するタイミング)
 素子の劣化を検出するには、第1と第2のスイッチング素子に並列に接続された第1と第2の検出抵抗の両端電圧が収束している必要がある。そのため、劣化を検出するタイミングは第1と第2のスイッチング素子の動作が停止した状態となる。具体的には、装置の始動時、または停止時、または装置が稼働期間中のインバータ動作停止時のいずれかとなる。
(Timing to detect deterioration)
In order to detect the deterioration of the element, it is necessary that the voltages across the first and second detection resistors connected in parallel to the first and second switching elements are converged. Therefore, the timing for detecting deterioration is a state in which the operations of the first and second switching elements are stopped. Specifically, it is either when the device is started or stopped, or when the inverter operation is stopped during the operation period of the device.
 なお、耐圧リーク電流は素子の温度、例えば素子のチップ接合面の温度であるジャンクション温度に比例して大きくなるため、装置の動作停止直後での検出が最も高精度に耐圧劣化を判断できる。
 また、装置の始動時はスイッチング素子のジャンクション温度は高くないため、インバータを短時間短絡させてスイッチング素子のジャンクション温度を上げ、その温度が環境温度よりも高温な状態において、そのタイミングで検出するようにすることによって高精度に耐圧劣化を判断してもよい。なお、ここではスイッチング素子の温度として、スイッチング素子のチップ接合面の温度であるジャンクション温度が環境温度よりも高温な状態において検出する場合について示すが、必ずしもジャンクション温度である必要はなく、スイッチング素子の温度であればどの温度であってもよい。
Since the withstand voltage leak current increases in proportion to the temperature of the element, for example, the junction temperature which is the temperature of the chip joint surface of the element, the withstand voltage deterioration can be determined with the highest accuracy by detecting immediately after the operation of the device is stopped.
Also, since the junction temperature of the switching element is not high when the device is started, the inverter is short-circuited for a short time to raise the junction temperature of the switching element, and when the temperature is higher than the environmental temperature, it should be detected at that timing. The withstand voltage deterioration may be determined with high accuracy. Here, as the temperature of the switching element, the case where the junction temperature, which is the temperature of the chip junction surface of the switching element, is detected at a temperature higher than the environmental temperature is shown, but it does not necessarily have to be the junction temperature, and the switching element Any temperature may be used as long as it is the temperature.
(耐圧劣化の検出方法、上下同時耐圧劣化時の検出方法)
 図4は、実施の形態1に係る耐圧劣化を検出する方法を示した図である。図4に示す方法は、スイッチング素子がオフしてからの検出抵抗の両端電圧の時定数にて耐圧劣化の検出を行う。スイッチングがオフしたタイミングt1からある一定の時間をおいたt2のときの電圧値を検出する。このt2の電圧値によって正常もしくは劣化を判断する。t2の時間の電圧値は任意で設定するが、耐圧が劣化した場合のt2の電圧は極端に低い(図4に示した劣化時A)か、もしくは極端に高い(図4に示した劣化時B)値となる。
(Detection method for withstand voltage deterioration, detection method for simultaneous upper and lower withstand voltage deterioration)
FIG. 4 is a diagram showing a method for detecting pressure resistance deterioration according to the first embodiment. In the method shown in FIG. 4, the withstand voltage deterioration is detected by the time constant of the voltage across the detection resistor after the switching element is turned off. The voltage value at t2 after a certain period of time from the timing t1 when the switching is turned off is detected. Normality or deterioration is judged by the voltage value of t2. The voltage value for the time of t2 is arbitrarily set, but the voltage of t2 when the withstand voltage deteriorates is extremely low (during deterioration A shown in FIG. 4) or extremely high (during deterioration shown in FIG. 4). B) It becomes a value.
(耐圧劣化検出方法のメリット)
 スイッチング素子の耐圧劣化を時定数で判断することで、図1に示す第1のスイッチング素子211と第2のスイッチング素子212の耐圧が同時に同様な劣化をした場合でも検出が可能となる。
(Advantages of pressure resistance deterioration detection method)
By determining the withstand voltage deterioration of the switching element by the time constant, it is possible to detect even if the withstand voltage of the first switching element 211 and the second switching element 212 shown in FIG. 1 deteriorates at the same time.
 図5は、スイッチング素子が正常な場合と、上下同時に劣化した場合の第1の検出抵抗11と第2の検出抵抗12の両端電圧の変化の一例を表している。上下のスイッチング素子が同時に劣化した場合、スイッチング素子に流れる耐圧リーク電流はほぼ等しくなるため、第1の検出抵抗11と第2の検出抵抗12の両端電圧は母線電圧の中点から設けたマージン以内に収まる。そのため、これまでに示した電圧検出による手法では、上下素子が同時・同様に劣化した場合の検出ができない。一方、上下のスイッチング素子が同時に劣化した場合でも、中点電圧に収束する時間が変化するため、時定数による劣化の検出が可能となる。 FIG. 5 shows an example of changes in the voltage across the first detection resistor 11 and the second detection resistor 12 when the switching element is normal and when the switching element deteriorates at the same time. When the upper and lower switching elements deteriorate at the same time, the withstand voltage leak currents flowing through the switching elements become almost equal, so the voltage across the first detection resistor 11 and the second detection resistor 12 is within the margin provided from the midpoint of the bus voltage. Fits in. Therefore, the voltage detection method shown so far cannot detect when the upper and lower elements are deteriorated at the same time or similarly. On the other hand, even if the upper and lower switching elements deteriorate at the same time, the time for convergence to the midpoint voltage changes, so that the deterioration can be detected by the time constant.
(耐圧劣化検出方法のデメリット)
 一方で、スイッチング素子の時定数から素子の劣化を判断する場合、検出するタイミングが制約される。スイッチング素子が動作している状態から停止した状態でないと、時定数で素子の劣化を判断できない。すなわち、装置が動作している状態から停止モードに入ったタイミング、もしくは動作している状態から停止状態に入ったタイミングでスイッチング素子の劣化を検出する必要がある。
(Disadvantages of pressure resistance deterioration detection method)
On the other hand, when determining the deterioration of the switching element from the time constant of the switching element, the detection timing is restricted. Deterioration of the element cannot be judged by the time constant unless the switching element is stopped from the operating state. That is, it is necessary to detect the deterioration of the switching element at the timing when the device enters the stop mode from the operating state or at the timing when the device enters the stopped state from the operating state.
(より高精度な耐圧劣化の検出方法)
 第1の電圧検出器31は、最初に検出した電圧(初期電圧)を保持しておく。第1の電圧検出器31は装置が動作を停止するたびに電圧を検出する。この際、初期電圧と検出した最新の電圧とを比較する。最新の検出した電圧が初期電圧と数Vのマージンを取った範囲に収まっていれば正常と判断し、マージンを超過した場合は素子の耐圧が劣化したと判断する。
 母線電圧の中点からマージンを取った範囲から超過したと判断する方法は、スイッチング素子の耐圧リークのばらつきおよび検出抵抗のばらつきを考慮して、劣化の範囲を設定する必要があるため、耐圧劣化の検出精度は悪くなり易い。一方、初期電圧との差分から劣化を判断する方法は、最初にばらつきを考慮した電圧を保存して、初期電圧値と測定弾圧とを比較するため、より高精度に耐圧劣化を検出できる。
(More accurate detection method of withstand voltage deterioration)
The first voltage detector 31 holds the initially detected voltage (initial voltage). The first voltage detector 31 detects the voltage each time the device stops operating. At this time, the initial voltage is compared with the latest detected voltage. If the latest detected voltage is within the range of the initial voltage and a margin of several V, it is judged to be normal, and if it exceeds the margin, it is judged that the withstand voltage of the element has deteriorated.
In the method of determining that the margin is exceeded from the midpoint of the bus voltage, it is necessary to set the deterioration range in consideration of the variation in the withstand voltage leak of the switching element and the variation in the detection resistance. The detection accuracy of is likely to deteriorate. On the other hand, in the method of determining the deterioration from the difference from the initial voltage, the voltage considering the variation is first stored and the initial voltage value is compared with the measured repression, so that the withstand voltage deterioration can be detected with higher accuracy.
(上下同時耐圧劣化時の検出方法)
 図6は、直列接続された素子の耐圧が上下同時に劣化した場合に、劣化を検出する回路図を示す。図6に示す通り、図1に示した検出回路に加え、第3の検出抵抗13と検出用スイッチング素子14が直列接続された回路が、第1の検出抵抗もしくは第2の検出抵抗のいずれか一方に接続された構成となる。今回は第3の検出抵抗13を用いているが、検出用スイッチング素子14のオン抵抗を第3の検出抵抗13の代わりに用いてもよい。
(Detection method when vertical withstand voltage deteriorates at the same time)
FIG. 6 shows a circuit diagram for detecting deterioration when the withstand voltage of the elements connected in series deteriorates at the same time. As shown in FIG. 6, in addition to the detection circuit shown in FIG. 1, the circuit in which the third detection resistor 13 and the detection switching element 14 are connected in series is either the first detection resistor or the second detection resistor. The configuration is connected to one side. Although the third detection resistor 13 is used this time, the on-resistance of the detection switching element 14 may be used instead of the third detection resistor 13.
 検出用スイッチング素子14は、第1もしくは第2の検出抵抗の両端電圧の検出前もしくは検出後にオンする。スイッチング素子が片方しか劣化していない場合は、上記と同様に検出用スイッチング素子14をオフの状態で第1もしくは第2の検出抵抗の両端電圧と中点電位のばらつきから検出できる。スイッチング素子の耐圧が上下同時に劣化した場合を検出するには、検出用スイッチング素子14をオンにする。第3の検出抵抗と第1もしくは第2の検出抵抗が並列に接続されることで合成抵抗が変化する。その結果、上下のスイッチング素子がともに正常な時と、劣化したときで抵抗値に差分が生まれ、検出が可能となる。 The detection switching element 14 is turned on before or after the detection of the voltage across the first or second detection resistor. When only one of the switching elements is deteriorated, it can be detected from the variation between the voltage across the first or second detection resistor and the midpoint potential with the detection switching element 14 turned off in the same manner as described above. To detect when the withstand voltage of the switching element deteriorates at the same time, the detection switching element 14 is turned on. The combined resistance changes when the third detection resistor and the first or second detection resistor are connected in parallel. As a result, a difference is generated in the resistance value when both the upper and lower switching elements are normal and when they are deteriorated, and detection becomes possible.
(実際に使用する際の回路一例)
 図7は、実際に使用する回路に接続したときの回路の一例である。図7に示す通り、第1から第6のスイッチング素子は、第1のスイッチング素子211と第2のスイッチング素子212が直列接続された第1アーム21と、第3のスイッチング素子221と第4のスイッチング素子222が直列接続された第2アーム22と、第5のスイッチング素子231と第6のスイッチング素子232が直列接続された第3アーム23から構成され、第1アーム21と第2アーム22と第3アーム23が並列に接続されたインバータ構成をとる。
(Example of circuit when actually using)
FIG. 7 is an example of a circuit when connected to a circuit actually used. As shown in FIG. 7, the first to sixth switching elements include a first arm 21 in which the first switching element 211 and the second switching element 212 are connected in series, and the third switching elements 221 and the fourth. It is composed of a second arm 22 in which the switching element 222 is connected in series, and a third arm 23 in which the fifth switching element 231 and the sixth switching element 232 are connected in series, and the first arm 21 and the second arm 22 It has an inverter configuration in which the third arm 23 is connected in parallel.
 第1のスイッチング素子211と第2のスイッチング素子212の直列接続端子と、第3のスイッチング素子221と第4のスイッチング素子222の直列接続端子と、第5のスイッチング素子231と第6のスイッチング素子232の直列接続端子は、モータ50に接続される。耐圧劣化の検出回路は、第1アーム21、第2アーム22もしくは第3アーム23の少なくとも1つに接続される。それぞれのアームはモータを介して接続されているため、第1から第6のスイッチング素子がスイッチングを停止してから十分に長い時間を確保できれば、1つのアームに耐圧劣化の検出手法を入れることで、劣化の診断は可能である。 Series connection terminals of the first switching element 211 and the second switching element 212, series connection terminals of the third switching element 221 and the fourth switching element 222, and the fifth switching element 231 and the sixth switching element. The series connection terminal of 232 is connected to the motor 50. The withstand voltage deterioration detection circuit is connected to at least one of the first arm 21, the second arm 22, or the third arm 23. Since each arm is connected via a motor, if a sufficiently long time can be secured after the first to sixth switching elements stop switching, a method for detecting withstand voltage deterioration can be incorporated into one arm. , Deterioration can be diagnosed.
(その他の効果(短絡検知))
 制御回路40は、制御回路40が出力するスイッチング素子を駆動するゲート信号をモニタリングする。第1の電圧検出器31から検出されたスイッチング素子のドレイン電圧と、制御回路40が出力したゲート信号を比較して、ゲート信号とドレイン電圧の矛盾からスイッチング素子のショート故障を検出する。例えば、スイッチング素子が正常な場合、ゲート信号がオフの信号を出力すると、スイッチング素子のドレイン電圧は母線電圧となる。一方、スイッチング素子がショート故障している場合は、ゲート信号がオフ信号を出力しても、スイッチング素子のドレイン電圧はゼロとなる。このように、ゲート信号とドレイン電圧の矛盾から、スイッチング素子の短絡故障を検出する。
 なお、スイッチング素子を短絡検知するには装置が動作している状態である必要がある。スイッチング素子の短絡故障を検出した場合、装置の異常ランプを点灯させ、装置を速やかに停止する。
(Other effects (short circuit detection))
The control circuit 40 monitors the gate signal that drives the switching element output by the control circuit 40. The drain voltage of the switching element detected from the first voltage detector 31 is compared with the gate signal output by the control circuit 40, and a short-circuit failure of the switching element is detected from the contradiction between the gate signal and the drain voltage. For example, when the switching element is normal and the gate signal is output as an off signal, the drain voltage of the switching element becomes the bus voltage. On the other hand, when the switching element has a short failure, the drain voltage of the switching element becomes zero even if the gate signal outputs an off signal. In this way, a short-circuit failure of the switching element is detected from the contradiction between the gate signal and the drain voltage.
In order to detect a short circuit in the switching element, the device must be in an operating state. When a short-circuit failure of the switching element is detected, the abnormality lamp of the device is turned on and the device is stopped promptly.
(その他の効果(デッドタイム補正))
 一般的にスイッチング素子は、オフ状態からオン状態に切り替わるターンオンに要ずる時間(ターンオン時間ton)と、オン状態からオフ状態に切り替わるターンオフに要する時間(ターンオフ時間toff)が存在する。スイッチング素子のゲート抵抗値が大きくなるとターンオン時間tonおよびターンオフ時間toffが増加する。また、第1のスイッチング素子211および第2のスイッチング素子212の電気的特性のばらつき、およびジャンクション温度等の動作条件によっても、ターンオン時間tonおよびターンオフ時間toffが増減する。
(Other effects (dead time correction))
Generally, a switching element has a time required for turn-on to switch from an off state to an on state (turn-on time ton) and a time required for turn-off to switch from an on state to an off state (turn-off time toff). As the gate resistance value of the switching element increases, the turn-on time ton and the turn-off time toff increase. Further, the turn-on time ton and the turn-off time ton increase or decrease depending on the variation in the electrical characteristics of the first switching element 211 and the second switching element 212 and the operating conditions such as the junction temperature.
 パルス幅変調(PWM)等によりハーフブリッジ回路の出力電圧を制御する場合、第1のスイッチング素子211および第2のスイッチング素子212を交互にオンさせるが、第1のスイッチング素子211および第2のスイッチング素子212のオン、オフ状態が同時に切り替わった場合は、第1のスイッチング素子211および第2のスイッチング素子212の両方が同時にオンすることで、アーム短絡が生じる。
 アーム短絡を防止するため、ゲートオン・オフ指令信号は、一方のゲートオン・オフ指令信号がオフしてから一定の時間が経過するまで、もう一方のゲートオン・オフ指令信号がオンにならないようにゲートオン・オフ指令信号のタイミングが制御されている。
When controlling the output voltage of the half-bridge circuit by pulse width modulation (PWM) or the like, the first switching element 211 and the second switching element 212 are alternately turned on, but the first switching element 211 and the second switching When the on and off states of the element 212 are switched at the same time, both the first switching element 211 and the second switching element 212 are turned on at the same time, so that an arm short circuit occurs.
To prevent arm short-circuiting, the gate-on-off command signal is gate-on-off so that the other gate-on-off command signal does not turn on until a certain amount of time has passed after one gate-on-off command signal was turned off. The timing of the off command signal is controlled.
 デッドタイムは電力機器の設計および開発時にスイッチング素子の特性のばらつきと全動作条件を考慮したワースト条件に基づいて設定される。デッドタイムは、インバータの出力電圧波形および出力電流波形に影響を及ぼすため、短いほど好ましい。すなわち、インバータは、パルス幅変調により交流の電圧および電流を出力するが、出力電圧の増減は、パルス幅変調のオンとオフ時間の比率の増減により設定される。したがって、デッドタイムがパルス幅変調の同期に対して無視できない大きさになると、スイッチング素子のオフ時間が増加し、出力電圧が低下することとなる。 The dead time is set based on the worst conditions that take into account the variation in the characteristics of switching elements and all operating conditions when designing and developing electric power equipment. The shorter the dead time is, the more preferable it is because it affects the output voltage waveform and the output current waveform of the inverter. That is, the inverter outputs AC voltage and current by pulse width modulation, and the increase / decrease of the output voltage is set by the increase / decrease of the ratio of the on / off time of the pulse width modulation. Therefore, when the dead time becomes a size that cannot be ignored with respect to the synchronization of the pulse width modulation, the off time of the switching element increases and the output voltage decreases.
 PWM制御を行う場合、キャリア1周期に対し、実際のデッドタイムtdが占める割合が大きくなると、出力電圧の低下および出力電圧波形、出力電流波形が理想値から外れるため、デッドタイムの補償等の処理を、ゲートオン・オフ指令信号を生成する制御器(マイクロコントローラまたはDSP(Digital Signal Processor)等)上のソフトウェアで行う必要がある。
 本回路においても、第1の電圧検出器31の電圧を検出し、制御回路40は素子のアーム短絡が起きないようになるべく短いデッドタイムを作成する(デッドタイム補正を行う)。
When performing PWM control, if the ratio of the actual dead time td to one carrier cycle becomes large, the output voltage drops and the output voltage waveform and output current waveform deviate from the ideal values. This needs to be done by software on a controller (microcontroller or DSP (Digital Signal Processor), etc.) that generates a gate-on / off command signal.
Also in this circuit, the voltage of the first voltage detector 31 is detected, and the control circuit 40 creates a dead time as short as possible so that the arm short circuit of the element does not occur (dead time correction is performed).
 デッドタイム補正の効果として、アーム短絡を回避すること、またはスイッチング素子のサージ電圧を抑制することが可能となる。また、スイッチング素子がMOSFETの場合は、デッドタイム期間中の導通損失の低減に加え、実行パルス幅精度向上によるモータ制御における制御性の向上も可能となる。
(スイッチング素子の種類)
 スイッチング素子は、SiC(Silicon Carbide)-MOSFET、GaN(Gallium Nitride)、Si-MOSFET、あるいはIGBTなどの半導体スイッチング素子とする。
As an effect of dead time correction, it is possible to avoid an arm short circuit or suppress a surge voltage of a switching element. Further, when the switching element is a MOSFET, in addition to reducing the conduction loss during the dead time period, it is possible to improve the controllability in the motor control by improving the execution pulse width accuracy.
(Type of switching element)
The switching element is a semiconductor switching element such as SiC (Silicon Carbide) -MOSFET, GaN (Gallium Nitride), Si-MOSFET, or IGBT.
 なお、実施の形態において説明した制御器、スイッチ制御回路、昇圧制御器、高圧制御器は、ハードウエアの一例を図8に示すように、プロセッサ200と記憶装置201から構成される。記憶装置は図示していないが、ランダムアクセスメモリ等の揮発性記憶装置と、フラッシュメモリ等の不揮発性の補助記憶装置とを具備する。また、フラッシュメモリの代わりにハードディスクの補助記憶装置を具備してもよい。プロセッサ200は、記憶装置201から入力されたプログラムを実行する。この場合、補助記憶装置から揮発性記憶装置を介してプロセッサ200にプログラムが入力される。また、プロセッサ200は、演算結果等のデータを記憶装置201の揮発性記憶装置に出力してもよいし、揮発性記憶装置を介して補助記憶装置にデータを保存してもよい。 The controller, switch control circuit, booster controller, and high-voltage controller described in the embodiment are composed of a processor 200 and a storage device 201 as shown in FIG. 8 as an example of hardware. Although the storage device is not shown, it includes a volatile storage device such as a random access memory and a non-volatile auxiliary storage device such as a flash memory. Further, an auxiliary storage device of a hard disk may be provided instead of the flash memory. The processor 200 executes the program input from the storage device 201. In this case, a program is input from the auxiliary storage device to the processor 200 via the volatile storage device. Further, the processor 200 may output data such as a calculation result to the volatile storage device of the storage device 201, or may store the data in the auxiliary storage device via the volatile storage device.
 本願は、様々な例示的な実施の形態及び実施例が記載されているが、1つ、または複数の実施の形態に記載された様々な特徴、態様、及び機能は特定の実施の形態の適用に限られるのではなく、単独で、または様々な組み合わせで実施の形態に適用可能である。
従って、例示されていない無数の変形例が、本願明細書に開示される技術の範囲内において想定される。例えば、少なくとも1つの構成要素を変形する場合、追加する場合または省略する場合、さらには、少なくとも1つの構成要素を抽出し、他の実施の形態の構成要素と組み合わせる場合が含まれるものとする。
Although the present application describes various exemplary embodiments and examples, the various features, embodiments, and functions described in one or more embodiments are applications of a particular embodiment. It is not limited to, but can be applied to embodiments alone or in various combinations.
Therefore, innumerable variations not illustrated are envisioned within the scope of the techniques disclosed herein. For example, it is assumed that at least one component is modified, added or omitted, and further, at least one component is extracted and combined with the components of other embodiments.
 11 第1の検出抵抗、12 第2の検出抵抗、13 第3の検出抵抗、14 検出用スイッチング素子、21 第1アーム、22 第2アーム、23 第3アーム、31 第1の電圧検出器、40 制御回路、41 通知手段、50 モータ、100 耐圧劣化検出回路、211 第1のスイッチング素子、212 第2のスイッチング素子、221 第3のスイッチング素子、222 第4のスイッチング素子、231 第5のスイッチング素子、232 第6のスイッチング素子 11 1st detection resistor, 12 2nd detection resistor, 13 3rd detection resistor, 14 detection switching element, 21 1st arm, 22 2nd arm, 23 3rd arm, 31 1st voltage detector, 40 control circuit, 41 notification means, 50 motor, 100 withstand voltage deterioration detection circuit, 211 first switching element, 212 second switching element, 221 third switching element, 222 fourth switching element, 231 fifth switching Element, 232, 6th switching element

Claims (14)

  1.  アームのハイサイドに設けられた第1のスイッチング素子に並列に接続された第1の検出抵抗と、前記アームのローサイドに設けられた第2のスイッチング素子に並列に接続された第2の検出抵抗と、前記第1の検出抵抗の両端の電圧値および/または前記第2の検出抵抗の両端電圧値を検出する電圧検出器と、前記第1のスイッチング素子のスイッチング動作と前記第2のスイッチング素子のスイッチング動作とを制御する制御回路とを備え、前記第1のスイッチング素子の動作と前記第2のスイッチング素子の動作とが停止し、前記電圧検出器によって検出した前記第1の検出抵抗の両端電圧値および/または前記第2の検出抵抗の両端電圧値に基づいて前記制御回路において、前記第1のスイッチング素子の耐圧劣化および/または前記第2のスイッチング素子の耐圧劣化を判断することを特徴とする電力変換装置。 A first detection resistor connected in parallel to a first switching element provided on the high side of the arm and a second detection resistor connected in parallel to a second switching element provided on the low side of the arm. A voltage detector that detects the voltage value across the first detection resistor and / or the voltage value across the second detection resistor, the switching operation of the first switching element, and the second switching element. The operation of the first switching element and the operation of the second switching element are stopped, and both ends of the first detection resistor detected by the voltage detector are provided. The control circuit is characterized in that the withstand voltage deterioration of the first switching element and / or the withstand voltage deterioration of the second switching element is determined based on the voltage value and / or the voltage value across the second detection resistor. Power conversion device.
  2.  前記第1の検出抵抗の抵抗値および第2の検出抵抗の抵抗値は、前記第1の検出抵抗および前記第2の検出抵抗に流れる電流値が前記第1のスイッチング素子に寄生するリーク電流および前記第2のスイッチング素子に寄生するリーク電流よりも大きく設定されていることを特徴とする請求項1に記載の電力変換装置。 The resistance value of the first detection resistance and the resistance value of the second detection resistance are the leak current in which the current value flowing through the first detection resistance and the second detection resistance is parasitic on the first switching element. The power conversion device according to claim 1, wherein the leakage current is set to be larger than the leakage current parasitic on the second switching element.
  3.  前記第1の検出抵抗の抵抗値および前記第2の検出抵抗の抵抗値は、同じ値に設定されていることを特徴とする請求項1または2に記載の電力変換装置。 The power conversion device according to claim 1 or 2, wherein the resistance value of the first detection resistor and the resistance value of the second detection resistor are set to the same value.
  4.  前記制御回路は、前記第1のスイッチング素子および/または前記第2のスイッチング素子が耐圧劣化と判断した場合に通知する通知手段を備えていることを特徴とする請求項1から3のいずれか1項に記載の電力変換装置。 Any one of claims 1 to 3, wherein the control circuit includes a notification means for notifying when the first switching element and / or the second switching element determines that the withstand voltage has deteriorated. The power converter according to the section.
  5.  前記制御回路は、前記第1のスイッチング素子の温度と前記第2のスイッチング素子の温度が環境温度よりも高温な状態において、前記電圧検出器によって検出した前記第1の検出抵抗の両端電圧値および/または前記第2の検出抵抗の両端電圧値に基づいて、前記第1のスイッチング素子の耐圧劣化および/または前記第2のスイッチング素子の耐圧劣化を判断することを特徴とする請求項1から4のいずれか1項に記載の電力変換装置。 The control circuit has a voltage value across the first detection resistor detected by the voltage detector in a state where the temperature of the first switching element and the temperature of the second switching element are higher than the environmental temperature. / Or claims 1 to 4 characterized in that the withstand voltage deterioration of the first switching element and / or the withstand voltage deterioration of the second switching element is determined based on the voltage value across the second detection resistor. The power conversion device according to any one of the above items.
  6.  前記第1のスイッチング素子と前記第2のスイッチング素子との動作が停止した状態とは、電力変換装置の始動時、停止時、装置が稼働中のインバータ動作停止時のいずれかであることを特徴とする請求項1から5のいずれか1項に記載の電力変換装置。 The state in which the operation of the first switching element and the second switching element is stopped is one of when the power conversion device is started, stopped, and when the inverter operation is stopped while the device is in operation. The power conversion device according to any one of claims 1 to 5.
  7.  前記制御回路は、前記電圧検出器の初期電圧を保存し、前記初期電圧と前記電圧検出器によって検出された最新の電圧の変化量に基づいて前記第1のスイッチング素子および/または前記第2のスイッチング素子の耐圧劣化を判断することを特徴とする請求項1から6のいずれか1項に記載の電力変換装置。 The control circuit stores the initial voltage of the voltage detector, and based on the initial voltage and the latest voltage change detected by the voltage detector, the first switching element and / or the second switching element. The power conversion device according to any one of claims 1 to 6, wherein the withstand voltage deterioration of the switching element is determined.
  8.  前記第1のスイッチング素子および前記第2のスイッチング素子が動作を停止してから前記電圧検出器による検出電圧が収束する時間に基づいて前記第1のスイッチング素子および/または前記第2のスイッチング素子の耐圧劣化を判断することを特徴とする請求項1から7のいずれか1項に記載の電力変換装置。 The first switching element and / or the second switching element of the first switching element and / or the second switching element based on the time when the voltage detected by the voltage detector converges after the operation of the first switching element and the second switching element is stopped. The power conversion device according to any one of claims 1 to 7, wherein the withstand voltage deterioration is determined.
  9.  直列に接続された検出用スイッチング素子および第3の検出抵抗が、前記第1の検出抵抗または前記第2の検出抵抗のいずれか一方に対して並列に接続され、前記検出用スイッチング素子は、前記第1の検出抵抗の両端電圧または前記第2の検出抵抗の両端電圧の検出前または検出後にオンし、前記検出用スイッチング素子のオンする前とオンした後の両方の電圧値を前記電圧検出器によって検出されるようにしたことを特徴とする請求項1から7のいずれか1項に記載の電力変換装置。 The detection switching element and the third detection resistor connected in series are connected in parallel to either the first detection resistor or the second detection resistor, and the detection switching element is the same. The voltage value across the first detection resistor or the voltage across the second detection resistor is turned on before or after the detection, and the voltage values both before and after the detection switching element is turned on are measured by the voltage detector. The power conversion device according to any one of claims 1 to 7, wherein the power conversion device is made to be detected by.
  10.  前記第1のスイッチング素子および前記第2のスイッチング素子はインバータを構成し、前記インバータの交流出力にはモータが接続され、前記インバータの少なくとも1相に前記第1の検出抵抗と、前記第2の検出抵抗と、前記電圧検出器を備えたことを特徴とする請求項1から9にいずれか1項に記載の電力変換装置。 The first switching element and the second switching element constitute an inverter, a motor is connected to the AC output of the inverter, and the first detection resistor and the second detection resistor are connected to at least one phase of the inverter. The power conversion device according to any one of claims 1 to 9, further comprising a detection resistor and the voltage detector.
  11.  前記第1のスイッチング素子または前記第2のスイッチング素子が劣化と判断された場合には、前記インバータの変調方法を変える、前記劣化と判断された第1のスイッチング素子または前記第2のスイッチング素子の動作を停止する、警告を表示する、または前記インバータのキャリアを下げる処置の少なくとも一つを行うことを特徴とする請求項10に記載の電力変換装置。 When the first switching element or the second switching element is determined to be deteriorated, the modulation method of the inverter is changed, and the first switching element or the second switching element determined to be deteriorated changes the modulation method of the inverter. The power conversion device according to claim 10, further comprising performing at least one of measures of stopping the operation, displaying a warning, or lowering the carrier of the inverter.
  12.  前記電圧検出器は、インバータが動作中にも検出を行い、インバータ動作中に検出されるドレイン電圧と、前記制御回路のゲート信号の矛盾を検出し、前記インバータの短絡を検出することを特徴とする請求項1から11のいずれか1項に記載の電力変換装置。 The voltage detector is characterized in that it detects even while the inverter is operating, detects a discrepancy between the drain voltage detected during the operation of the inverter and the gate signal of the control circuit, and detects a short circuit of the inverter. The power conversion device according to any one of claims 1 to 11.
  13.  前記電圧検出器は、インバータが動作中にも検出を行い、前記制御回路は、前記電圧検出器の検出した電圧に基づいてデッドタイム補正を行うことを特徴とする請求項1から11のいずれか1項に記載の電力変換装置。 One of claims 1 to 11, wherein the voltage detector detects the voltage even while the inverter is operating, and the control circuit corrects the dead time based on the voltage detected by the voltage detector. The power conversion device according to item 1.
  14.  前記スイッチング素子は、SiC半導体またはGaN半導体で構成されていることを特徴とする請求項1から13のいずれか1項に記載の電力変換装置。 The power conversion device according to any one of claims 1 to 13, wherein the switching element is made of a SiC semiconductor or a GaN semiconductor.
PCT/JP2021/001401 2021-01-18 2021-01-18 Power converter WO2022153520A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2022575025A JP7361955B2 (en) 2021-01-18 2021-01-18 power converter
PCT/JP2021/001401 WO2022153520A1 (en) 2021-01-18 2021-01-18 Power converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2021/001401 WO2022153520A1 (en) 2021-01-18 2021-01-18 Power converter

Publications (1)

Publication Number Publication Date
WO2022153520A1 true WO2022153520A1 (en) 2022-07-21

Family

ID=82448266

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2021/001401 WO2022153520A1 (en) 2021-01-18 2021-01-18 Power converter

Country Status (2)

Country Link
JP (1) JP7361955B2 (en)
WO (1) WO2022153520A1 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004317277A (en) * 2003-04-16 2004-11-11 Fuji Electric Holdings Co Ltd Deterioration determination method of semiconductor element constituting power conversion device
JP2017017822A (en) * 2015-06-30 2017-01-19 ルネサスエレクトロニクス株式会社 Semiconductor device and failure detection method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004317277A (en) * 2003-04-16 2004-11-11 Fuji Electric Holdings Co Ltd Deterioration determination method of semiconductor element constituting power conversion device
JP2017017822A (en) * 2015-06-30 2017-01-19 ルネサスエレクトロニクス株式会社 Semiconductor device and failure detection method

Also Published As

Publication number Publication date
JP7361955B2 (en) 2023-10-16
JPWO2022153520A1 (en) 2022-07-21

Similar Documents

Publication Publication Date Title
US11245337B2 (en) Power supply device
US10727729B2 (en) Power converter
JP4786305B2 (en) Inverter
KR101538094B1 (en) Apparatus and method of detecting failure of switching device of inverter system
US8144443B2 (en) Discharging control apparatus of switching device for inverter
US11146163B2 (en) Switching device and method for controlling switching device
US10931191B2 (en) Half bridge circuit driver chip with protection circuit and protection method thereof
JP5446851B2 (en) Power converter
WO2022153520A1 (en) Power converter
JP2019176696A (en) Drive circuit for power transistor, power module
US10554120B2 (en) Power conversion device
US20230261648A1 (en) Method For Switching Power Transistors
CN111817594A (en) Method for determining polarity of half-bridge current and half-bridge controller
JP5251553B2 (en) Semiconductor device
CN112054683B (en) Power conversion device
JP6778324B2 (en) Power converter, failure detection circuit, drive circuit
JP6622405B2 (en) Inverter drive
JP2020043687A (en) Power element diagnostic device
JP7144904B1 (en) power converter
CN112640276A (en) Driving circuit of switch
WO2024004208A1 (en) Electric power conversion device
JP4786298B2 (en) Inverter
JP7172913B2 (en) switch drive circuit
JP2019135884A (en) Power conversion equipment
JP6932221B1 (en) Power converter

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21919413

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2022575025

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 21919413

Country of ref document: EP

Kind code of ref document: A1