WO2022147794A1 - Procédé et appareil de test de taux d'erreur binaire - Google Patents

Procédé et appareil de test de taux d'erreur binaire Download PDF

Info

Publication number
WO2022147794A1
WO2022147794A1 PCT/CN2021/070959 CN2021070959W WO2022147794A1 WO 2022147794 A1 WO2022147794 A1 WO 2022147794A1 CN 2021070959 W CN2021070959 W CN 2021070959W WO 2022147794 A1 WO2022147794 A1 WO 2022147794A1
Authority
WO
WIPO (PCT)
Prior art keywords
sequence
under test
transmission device
device under
ber
Prior art date
Application number
PCT/CN2021/070959
Other languages
English (en)
Chinese (zh)
Inventor
王学寰
张兴新
鲍鹏鑫
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN202180000407.2A priority Critical patent/CN112805950B/zh
Priority to CN202210194757.3A priority patent/CN114760014A/zh
Priority to PCT/CN2021/070959 priority patent/WO2022147794A1/fr
Publication of WO2022147794A1 publication Critical patent/WO2022147794A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
    • H04L1/203—Details of error rate determination, e.g. BER, FER or WER

Definitions

  • the present application relates to communication technologies, and in particular, to a method and apparatus for testing a bit error rate.
  • bit error rate is an important indicator of the transmission chip.
  • the BER test can be performed on the transmission chip to verify whether the transmission chip reaches the set BER index.
  • the rate of the transmission chip is asymmetric, that is, the uplink rate and the downlink rate are not equal, and the difference is large. direction) usually reaches 1Gbps ⁇ 10Gbps, and its downlink rate is usually only 1Mbps ⁇ 100Mbps.
  • the present application provides a bit error rate test method and device, which can be applied to test the BER of a transmission device under test with asymmetric rates.
  • the present application provides a bit error rate testing method, comprising: sending a first sequence to a transmission device under test; obtaining a first bit error rate BER from the transmission device under test; when the first bit error rate BER is greater than or When it is equal to the preset bit ratio, the second sequence is sent to the transmission device under test; the values of the preset bits in the first sequence and the second sequence are different.
  • the BER test method of the present application only uses the transmission channel in the direction of the test device to the transmission device under test, and can be applied to test the BER of the transmission device under test with asymmetric rates.
  • the method before sending the first sequence to the transmission device under test, the method further includes: acquiring the second sequence; and acquiring the first sequence according to the second sequence.
  • acquiring the first sequence according to the second sequence includes: changing values of preset bits in the second sequence to obtain the first sequence.
  • a second sequence is preset in this application, the second sequence includes multiple bits, and the value of each bit is 0 or 1; the second sequence is pre-stored in the testing device, First, the second sequence is read from the memory, and then the values of the preset bits in the second sequence are changed to obtain the first sequence.
  • the preset bit position corresponds to a preset ratio, and the preset bit position ratio is greater than the design target BER of the transmission device under test.
  • the preset bit position corresponds to the preset bit position ratio
  • the testing device may first calculate the product of the length of the second sequence and the preset bit position ratio to obtain the count value of the bit position whose value needs to be changed, and then based on the count value. The value determines the preset bits.
  • the present application provides a method for testing a bit error rate, comprising: receiving a third sequence, where the third sequence corresponds to a first sequence sent by a testing device; obtaining a first bit error rate according to the third sequence and the second sequence BER; receive the fourth sequence, the fourth sequence corresponds to the second sequence sent by the test device; obtain the second bit error rate BER according to the fourth sequence and the second sequence, and the second bit error rate BER indicates the BER of the transmission device under test .
  • the BER test method of the present application only uses the transmission channel from the test device to the transmission device under test, and can be applied to test the BER of the transmission device under test with asymmetric rates.
  • the transmission device under test calculates the first BER based on the third sequence, and the test device verifies whether the transmission device under test is trustworthy based on the first BER.
  • the device receives the fourth sequence, and calculates the actual BER based on the fourth sequence, which ensures the accuracy of the BER.
  • obtaining the first bit error rate BER according to the third sequence and the second sequence includes: comparing the values of corresponding bits of the third sequence and the second sequence to obtain a comparison of the third sequence and calculating the ratio of the first count value and the total value of the bits included in the second sequence to obtain the first BER.
  • acquiring the second BER of the fourth sequence according to the fourth sequence and the second sequence includes: comparing the values of corresponding bits of the fourth sequence and the second sequence to obtain a phase relative to the fourth sequence. comparing the second count value of the bits with different values from the second sequence; calculating the ratio of the second count value to the total value of the bits included in the second sequence to obtain the second BER.
  • the transmission device under test can be obtained in the following two ways:
  • the first is that the transmission device under test uses pure software to compare the values of the bits corresponding to the fourth sequence and the second sequence to obtain how many bits of the fourth sequence have different values compared with the second sequence, and then The second BER is calculated.
  • the second is that the transmission device under test adopts a combination of hardware and software, and compares the values of the corresponding bits of the fourth sequence and the second sequence through the comparator, and each time the fourth sequence and the second sequence are compared, there is a different value. Bits, the counter is incremented by 1, and the number of bits with different values in the fourth sequence compared with the second sequence can be obtained, and then the second BER is calculated.
  • the present application provides a method for testing a bit error rate, comprising: a testing device sending a first sequence to a transmission device under test; and the transmission device under test acquiring a first bit error rate according to the second sequence and the received third sequence BER, the third sequence corresponds to the first sequence sent by the test device; the test device obtains the first BER from the transmission device under test; when the first BER is greater than or equal to the preset bit ratio, the test device sends the transmission device under test to the transmission device under test.
  • the transmission device under test obtains the second BER according to the second sequence and the received fourth sequence, the second BER indicates the BER of the transmission device under test, and the fourth sequence corresponds to the second sequence sent by the test device;
  • the values of the preset bits in the first sequence and the second sequence are different.
  • the BER test method of the present application only uses the transmission channel from the test device to the transmission device under test, and can be applied to test the BER of the transmission device under test with asymmetric rates.
  • the method before the testing device sends the first sequence to the transmission device under test, the method further includes: the testing device acquires the second sequence; and the testing device acquires the first sequence according to the second sequence.
  • the testing device obtains the first sequence according to the second sequence, including: the testing device changes the value of the preset bit in the second sequence to obtain the first sequence.
  • the preset bit position corresponds to a preset bit position ratio, and the preset bit position ratio is greater than the design target BER of the transmission device under test.
  • the transmission device under test obtains the first bit error rate BER according to the second sequence and the received third sequence, including: the transmission device under test compares the corresponding bits of the third sequence and the second sequence The values are compared to obtain the first count value of the bits whose values are different in the third sequence compared with the second sequence; the transmission device under test calculates the ratio of the first count value and the total value of the bits contained in the second sequence to obtain First BER.
  • the transmission device under test obtains the second BER according to the second sequence and the received fourth sequence, including: the transmission device under test performs the values of the bits corresponding to the fourth sequence and the second sequence. Comparing to obtain the second count value of the bits of the fourth sequence with different values compared with the second sequence; the transmission device under test calculates the ratio of the second count value to the total value of the bits contained in the second sequence to obtain the second BER .
  • the present application provides a testing device, comprising: a sending module for sending a first sequence to a transmission device under test; an acquisition module for obtaining a first bit error rate BER from the transmission device under test; a sending module , and is also used to send a second sequence to the transmission device under test when the first BER is greater than or equal to the preset bit ratio; the values of the preset bits in the first sequence and the second sequence are different.
  • the acquiring module is further configured to acquire the second sequence; and acquire the first sequence according to the second sequence.
  • the obtaining module is specifically configured to change the value of a preset bit in the second sequence to obtain the first sequence.
  • the preset bit position corresponds to a preset bit position ratio, and the preset bit position ratio is greater than the design target BER of the transmission device under test.
  • the present application provides a transmission device under test, comprising: a receiving module for receiving a third sequence, the third sequence corresponding to the first sequence sent by the test device; an acquisition module for receiving a third sequence according to the third sequence and The second sequence obtains the first bit error rate BER; the receiving module is further configured to receive the fourth sequence, the fourth sequence corresponds to the second sequence sent by the test device; the obtaining module is further configured to receive the fourth sequence and the second sequence according to the second sequence A second BER is obtained, the second BER indicating the BER of the transmission device under test.
  • the obtaining module is specifically configured to compare the values of corresponding bits of the third sequence and the second sequence to obtain the value of the third sequence compared with the second sequence first count values of different bits; calculating the ratio of the first count value to the total value of bits included in the second sequence to obtain the first BER.
  • the obtaining module is specifically configured to compare the values of the corresponding bits of the fourth sequence and the second sequence to obtain the first number of bits whose values are different in the fourth sequence compared with the second sequence. Two count values; calculate the ratio of the second count value and the total value of bits included in the second sequence to obtain the second BER.
  • the present application provides a bit error rate testing system, comprising: the testing device in the foregoing fourth aspect and possible implementations thereof, and the transmission device under test in the foregoing fifth aspect and its possible implementations.
  • the present application provides an electronic device, comprising: one or more processors; a memory for storing one or more programs; when the one or more programs are executed by the one or more processors, the Methods in the aforementioned first aspect and possible implementations thereof.
  • the present application provides a transmission chip, comprising: one or more processors; a memory for storing one or more programs; when the one or more programs are executed by the one or more processors, the A method as in the aforementioned second aspect and possible implementations thereof.
  • the present application provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed, realizes the aforementioned first aspect, second aspect, third aspect and possible implementations thereof. method.
  • the present application provides a computer program that, when the computer program is executed by a computer, implements the methods of the first aspect, the second aspect, the third aspect, and possible implementations thereof.
  • 1 is a schematic diagram of a loopback test method
  • Fig. 2 is an exemplary structural diagram of the bit error rate testing system of the present application
  • Fig. 3 is an exemplary flow chart of the bit error rate testing method of the present application.
  • FIG. 4 is an exemplary structural diagram of the tested transmission device of the present application.
  • FIG. 5 is an exemplary structural diagram of the tested transmission device of the present application.
  • FIG. 6 is an exemplary structural schematic diagram of the testing device of the present application.
  • FIG. 7 is a schematic structural diagram of an exemplary transmission device under test of the present application.
  • At least one (item) refers to one or more, and "a plurality” refers to two or more.
  • “And/or” is used to describe the relationship between related objects, indicating that there can be three kinds of relationships, for example, “A and/or B” can mean: only A, only B, and both A and B exist , where A and B can be singular or plural.
  • the character “/” generally indicates that the associated objects are an “or” relationship.
  • At least one item(s) below” or similar expressions thereof refer to any combination of these items, including any combination of single item(s) or plural items(s).
  • At least one (a) of a, b or c can mean: a, b, c, "a and b", “a and c", “b and c", or "a and b and c" ", where a, b, c can be single or multiple.
  • FIG. 1 is a schematic diagram of a loopback test method.
  • the test equipment generates random test sequences and sends them out through the transmit port (TX).
  • the receive port (RX) of the transmit chip under test receives the sequence and then sends it directly back to the test equipment via the transmit port (TX).
  • the test equipment compares the sent test sequence with the received recovery sequence and calculates the BER.
  • the above loopback test method can only be used to test the BER of transmission chips with symmetrical rates.
  • the rate of the test equipment toward the transmission chip under test is 10 Gbps
  • the rate of the transmission chip under test toward the test equipment is 10 Gbps.
  • 100Mbps after the test sequence generated by the test equipment is sent to the transmission chip under test, the transmission chip under test needs a large storage space because the rate of sending it back to the test equipment is much lower, so the test sequence is cached and sent back slowly. , and it is unacceptable to increase the storage space in the transmission chip under test, which will cause a great waste of cost. Therefore, the loopback test method cannot be used to test the BER of transmission chips with asymmetric rates.
  • the present application provides a bit error rate test method.
  • FIG. 2 is an exemplary structural diagram of the bit error rate testing system of the present application.
  • the system includes a testing device 201 and a transmission device 202 under test.
  • Two unidirectional transmission channels Exemplarily, the bandwidth of the transmission channel from the test device 201 to the transmission device under test 202 is relatively large, and accordingly, its transmission rate is relatively high; the bandwidth of the transmission channel from the test device 202 to the test device 201 is relatively small, and accordingly , its transfer rate is lower. It can be understood that the embodiments of the present application do not limit the relative relationship between the bandwidths and transmission rates of the two transmission channels between the testing device 201 and the transmission device 202 under test.
  • the test device 201 may be an electronic device with transmit (TX) and receive (RX) functions; the transmission device 202 under test may be a device with transmit (TX) and receive (RX) functions with asymmetric rates, such as , a transmission chip, a transmission device (switch, router, etc.) or a transmission chip in a transmission device, etc.
  • TX transmit
  • RX receive
  • asymmetric rates such as , a transmission chip, a transmission device (switch, router, etc.) or a transmission chip in a transmission device, etc.
  • FIG. 3 is an exemplary flow chart of the bit error rate testing method of the present application. As shown in FIG. 3 , the process 300 may be jointly executed by the testing device 201 and the transmission device 202 under test. Process 300 is described as a series of steps or operations, and it should be understood that process 300 may be performed in various orders and/or concurrently, and is not limited to the order of execution shown in FIG. 3 .
  • Step 301a the testing device sends the first sequence to the transmission device under test.
  • a second sequence is preset, and the second sequence includes a plurality of bits, and the value of each bit is 0 or 1.
  • the second sequence is pre-stored in the test device and the transmission device under test, for example, the second sequence is solidified in the test device and the transmission device under test when leaving the factory; or, for example, before the test starts, through the test device and the transmission device under test.
  • the input interface of the transmission device transmits and stores the second sequence to the test device and the transmission device under test. It should be noted that this application does not specifically limit the length of the second sequence (ie, the count value of the included bits), and also does not specifically limit the value of each bit.
  • the length and value of the second sequence are unchanged, while in multiple different tests, for example, the transmission device under test is different, the second sequence can be set based on the transmission device under test. It should be understood that, for different transmission devices under test, the second sequence may also be the same, which is not specifically limited.
  • the testing apparatus may first read the second sequence from the memory, and then change the value of the preset bits in the second sequence to obtain the first sequence.
  • the aforementioned preset bits correspond to the preset bit ratio, and the testing device can first calculate the product of the length of the second sequence and the preset bit ratio to obtain the count value of the bits whose value is to be changed, and then determine the preset value based on the count value. Set bits.
  • the testing device can randomly select 10 bits from the 100 bits of the second sequence Bit, change the value of the 10 bits, that is, if the original value on the bit is 0, it becomes 1, and if the original value on the bit is 1, it becomes 0.
  • the second sequence contains 10,000 bits, and the aforementioned preset proportion of bits is 20%, then there are 2,000 bits to be changed, and the testing device can randomly select 2,000 bits from the 10,000 bits of the second sequence bit, change the value of the 2000 bits.
  • the value range of the preset bit ratio may be greater than the design target BER of the transmission device under test.
  • the design target BER of the transmission device under test is 10e-12
  • the preset bit ratio should be greater than 10e- 12, for example, the preset bit ratio is 10e-11, 10e-9, etc.
  • the first sequence is obtained from the second sequence, and the value of the preset bits of the first sequence is different from that of the second sequence, and the preset bit ratio corresponding to the preset bits indicates the first sequence.
  • the bit error rate of the sequence compared to the second sequence.
  • the first sequence has 10% of the bit values different from the second sequence; or, the first sequence has 20% of the bit values different from the second sequence.
  • Step 301b The transmission device under test receives a third sequence, where the third sequence corresponds to the first sequence sent by the testing device.
  • the test device sends out the first sequence, and the sequence received by the tested transmission device is the third sequence through the transmission channel of the test device to the transmission device under test, so the third sequence corresponds to the first sequence.
  • the third sequence and the first sequence may not be exactly the same, which is related to the stability of the transmission channel from the test device to the transmission device under test.
  • the first sequence When the first sequence is transmitted from the test device to the transmission channel of the transmission device under test, the first sequence may be disturbed and the sequence may change, so the sequence received by the transmission device under test may not be the original first sequence. This is called the third sequence.
  • Step 302 The transmission device under test obtains the first BER according to the third sequence and the second sequence.
  • the transmission device under test can compare the values of the corresponding bits of the third sequence and the second sequence to obtain the first count value of the bits whose values are different in the third sequence compared with the second sequence, and then calculate the first count value. and the ratio of the total value of the bits included in the second sequence, the ratio is the first BER.
  • the second sequence in this application is the original test sequence, and the transmission device under test has acquired the second sequence in advance. After receiving the third sequence, the transmission device under test compares the third sequence with the second sequence to obtain a bit error rate based on the second sequence, that is, the first BER.
  • the transmission device under test can be obtained in the following two ways:
  • Step 303 The testing apparatus acquires the first BER.
  • the first BER may be stored in the register.
  • the test device can read the first BER from the register of the transmission device under test through the bus with the transmission device under test.
  • the testing device may obtain the first BER from the transmission device under test through a third-party storage medium. This application does not specifically limit the method by which the test apparatus obtains the first BER.
  • Step 304a When the first BER is greater than or equal to the preset bit ratio, the testing device sends the second sequence to the transmission device under test.
  • the testing device After acquiring the first BER, the testing device compares the first BER with the preset bit ratio, and the purpose of the comparison is to verify whether the tested transmission device is trustworthy.
  • the transmission device under test has obtained the second sequence in advance, and according to the subsequent steps, it can be known that the BER of the transmission device under test is calculated by the transmission device under test. The resulting sequence is modified to give the possibility of cheating BER.
  • the transmission device under test cannot obtain the aforementioned preset bit ratio, so the transmission device under test cannot falsify the calculated first BER.
  • the first BER is equal to the preset bit ratio, it means the bit error rate of the third sequence received by the transmission device under test compared to the second sequence and the bit error rate of the first sequence sent by the test device compared to the second sequence If the first BER is greater than the preset bit ratio, it means the bit error rate of the third sequence received by the transmission device under test compared to the second sequence Compared with the bit error rate of the first sequence sent by the test device compared to the second sequence, the extra bit error rate may be caused by the transmission channel.
  • the above two situations are in line with the actual situation.
  • the first BER is less than the preset bit ratio, it means that the bit error rate of the third sequence received by the transmission device under test compared to the second sequence is smaller than the bit error rate of the first sequence sent by the test device compared to the second sequence rate, which is inconsistent with the actual situation. Therefore, once the testing device detects that the first BER is less than the preset bit ratio, it can determine that the transmission device under test is untrustworthy, and no subsequent steps are performed.
  • the testing device may determine that the transmission device under test is trustworthy, and the testing device sends the second sequence to the transmission device under test.
  • Step 304b The transmission device under test receives a fourth sequence, where the fourth sequence corresponds to the second sequence sent by the testing device.
  • the test device sends out the second sequence, and the sequence received by the tested transmission device is the fourth sequence through the transmission channel of the test device to the transmission device under test, so the fourth sequence corresponds to the second sequence.
  • the fourth sequence and the second sequence may not be exactly the same, which is related to the stability of the transmission channel from the test device to the transmission device under test.
  • the second sequence When the second sequence is transmitted from the test device to the transmission channel of the transmission device under test, the second sequence may be interfered and the sequence may change, so the sequence received by the transmission device under test may not be the original second sequence. This is called the fourth sequence.
  • Step 305 The transmission device under test obtains a second BER according to the fourth sequence and the second sequence, where the second BER indicates the BER of the transmission device under test.
  • the transmission device under test can compare the values of the corresponding bits of the fourth sequence and the second sequence to obtain a second count value of the bits whose values are different in the fourth sequence compared with the second sequence, and then calculate the second count value. and the ratio of the total value of the bits included in the second sequence, the ratio is the second BER.
  • the second sequence in this application is the original test sequence, and the transmission device under test has acquired the second sequence in advance. After receiving the fourth sequence, the transmission device under test compares the fourth sequence with the second sequence to obtain a bit error rate based on the second sequence, that is, the second BER.
  • the transmission device under test can be obtained in the following two ways:
  • the BER test method of the present application only uses the transmission channel from the test device to the transmission device under test, and can be applied to test the BER of the transmission device under test with asymmetric rates.
  • FIG. 4 is an exemplary structural diagram of the transmission device under test of the present application.
  • the transmission device under test may be a device with transmit (TX) and receive (RX) functions and asymmetric rates, for example, Transmission chips, transmission devices (switches, routers, etc.) or transmission chips in transmission devices, etc.
  • the transmission device under test may include: a receiving port 401 , a processor 402 and a register 403 , wherein the receiving port 401 is connected to the processor 402 , and the processor 402 is connected to the register 403 .
  • the receiving port 401 is configured to receive a third sequence, and the third sequence corresponds to the first sequence sent by the test device; the processor 402 is configured to receive the third sequence and the second sequence according to the Obtain the first bit error rate BER; the processor 402 is configured to store the first BER in the register 403; the receiving port 401 is configured to receive the fourth sequence, the fourth sequence corresponds to the second sequence sent by the test device ; The processor 402 is configured to obtain a second BER according to the fourth sequence and the second sequence, where the second BER indicates the BER of the transmission device under test.
  • the transmission device under test shown in FIG. 4 can be used to implement the first method of calculating the BER in step 302 or step 305 above.
  • FIG. 5 is an exemplary structural diagram of the transmission device under test of the present application. As shown in FIG. 5 , on the basis of the structure shown in FIG. 4 , the transmission device under test further includes: a comparator 501 and a counter 502 ; 501 is connected with the counter 502; the comparator 501 and the counter 502 are connected between the receiving port 401 and the processor 402.
  • the receiving port 401 is configured to receive a third sequence, and the third sequence corresponds to the first sequence sent by the test device; the comparator 501 is configured to compare the third sequence and the second sequence The values of the corresponding bits are compared; the counter 502 is configured to count the comparison result of the comparator to obtain the first count value of the bits whose values are different in the third sequence compared with the second sequence; the processor 402 is configured by is configured to calculate the ratio between the first count value and the total value of the bits included in the second sequence, and the ratio is the first BER; the processor 402 is configured to store the first BER in the register 403; the receiving port 401 is is configured to receive a fourth sequence, which corresponds to the second sequence sent by the testing device; a comparator 501 is configured to compare the values of bits corresponding to the fourth sequence and the second sequence; a counter 502 is configured to Counting the comparison result of the comparator to obtain the second count value of the bits of the fourth sequence that have different values compared with the second
  • the transmission device under test shown in FIG. 5 can be used to implement the second method of calculating the BER in step 302 or step 305 above.
  • FIG. 6 is an exemplary schematic structural diagram of the testing device 600 of the present application.
  • the testing device 600 in this embodiment may be the testing device in the above-mentioned embodiment, and the testing device 600 includes: a sending module 601 and an acquisition module 601 .
  • Module 602 wherein,
  • the sending module 601 is used for sending the first sequence to the transmission device under test; the obtaining module 602 is used for obtaining the first bit error rate BER from the transmission device under test; the sending module 601 is also used for when the When the first BER is greater than or equal to the preset bit ratio, a second sequence is sent to the transmission device under test; the values of the preset bits in the first sequence and the second sequence are different.
  • the obtaining module 602 is further configured to obtain the second sequence; obtain the first sequence according to the second sequence.
  • the obtaining module 602 is specifically configured to change the value of a preset bit in the second sequence to obtain the first sequence.
  • the preset bit position corresponds to a preset bit position ratio, and the preset bit position ratio is greater than the design target BER of the transmission device under test.
  • the testing apparatus 600 in this embodiment can be used to execute the technical solution of the method embodiment shown in FIG. 3 , and the implementation principle and technical effect thereof are similar, which will not be repeated here.
  • FIG. 7 is an exemplary schematic structural diagram of the transmission device under test 700 of the present application.
  • the transmission device under test 700 in this embodiment may be the transmission device under test in the above-mentioned embodiment.
  • 700 includes: a receiving module 701 and an obtaining module 702, wherein,
  • a receiving module 701 configured to receive a third sequence, the third sequence corresponding to the first sequence sent by the test device; an obtaining module 702, configured to obtain a first bit error rate BER according to the third sequence and the second sequence ;
  • the receiving module 701 is further configured to receive a fourth sequence, the fourth sequence corresponds to the second sequence sent by the testing device;
  • the acquiring module 702 is also configured to receive the fourth sequence and the The second sequence obtains a second BER, where the second BER indicates the BER of the transmission device under test.
  • the obtaining module 702 is specifically configured to compare the values of corresponding bits of the third sequence and the second sequence to obtain a comparison of the third sequence with that of the second sequence.
  • the second sequence takes the first count value of the bits with different values; calculates the ratio between the first count value and the total value of the bits included in the second sequence, and the ratio is the first BER.
  • the obtaining module 702 is specifically configured to compare the values of corresponding bits of the fourth sequence and the second sequence to obtain a comparison of the fourth sequence with that of the second sequence.
  • the second sequence takes the second count value of the bits with different values; calculates the ratio of the second count value and the total value of the bits included in the second sequence, and the ratio is the second BER.
  • the transmission device 700 under test in this embodiment can be used to execute the technical solution of the method embodiment shown in FIG. 3 , and its implementation principle and technical effect are similar, and details are not repeated here.
  • each step of the above method embodiments may be completed by a hardware integrated logic circuit in a processor or an instruction in the form of software.
  • the processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other Programming logic devices, discrete gate or transistor logic devices, discrete hardware components.
  • DSP digital signal processor
  • ASIC application-specific integrated circuit
  • FPGA field programmable gate array
  • a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
  • the steps of the methods disclosed in the embodiments of the present application may be directly embodied as executed by a hardware coding processor, or executed by a combination of hardware and software modules in the coding processor.
  • the software modules may be located in random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, registers and other storage media mature in the art.
  • the storage medium is located in the memory, and the processor reads the information in the memory, and completes the steps of the above method in combination with its hardware.
  • the memory mentioned in the above embodiments may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically programmable Erase programmable read-only memory (electrically EPROM, EEPROM) or flash memory.
  • Volatile memory may be random access memory (RAM), which acts as an external cache.
  • RAM random access memory
  • DRAM dynamic random access memory
  • SDRAM synchronous DRAM
  • SDRAM double data rate synchronous dynamic random access memory
  • ESDRAM enhanced synchronous dynamic random access memory
  • SLDRAM synchronous link dynamic random access memory
  • direct rambus RAM direct rambus RAM
  • the disclosed system, apparatus and method may be implemented in other manners.
  • the apparatus embodiments described above are only illustrative.
  • the division of the units is only a logical function division. In actual implementation, there may be other division methods.
  • multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented.
  • the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution in this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit.
  • the functions, if implemented in the form of software functional units and sold or used as independent products, may be stored in a computer-readable storage medium.
  • the technical solution of the present application can be embodied in the form of a software product in essence, or the part that contributes to the prior art or the part of the technical solution.
  • the computer software product is stored in a storage medium, including Several instructions are used to cause a computer device (personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application.
  • the aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk and other media that can store program codes .

Abstract

Un procédé et un appareil de test de taux d'erreur binaire sont divulgués. Le procédé de test de taux d'erreur binaire (BER) selon la présente demande fait appel aux étapes suivantes : un appareil de test envoyant une première séquence à un appareil de transmission testé ; l'appareil de transmission testé recevant une troisième séquence, la troisième séquence correspondant à la première séquence envoyée par l'appareil de test ; l'appareil de transmission testé acquérant un premier BER selon la troisième séquence et une seconde séquence ; l'appareil de test acquérant le premier BER à partir de l'appareil de transmission testé ; lorsque le premier BER est supérieur ou égal à un rapport de bits prédéfini, l'appareil de test envoyant la seconde séquence à l'appareil de transmission testé ; l'appareil de transmission testé recevant une quatrième séquence, la quatrième séquence correspondant à la seconde séquence envoyée par l'appareil de test ; et l'appareil de transmission testé acquérant un second BER selon la quatrième séquence et la seconde séquence, le second BER indiquant un BER de l'appareil de transmission testé. Le procédé de la présente demande peut être utilisé pour tester un BER d'un appareil de transmission testé avec un débit asymétrique.
PCT/CN2021/070959 2021-01-08 2021-01-08 Procédé et appareil de test de taux d'erreur binaire WO2022147794A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN202180000407.2A CN112805950B (zh) 2021-01-08 2021-01-08 误比特率测试方法和装置
CN202210194757.3A CN114760014A (zh) 2021-01-08 2021-01-08 误比特率测试方法和装置
PCT/CN2021/070959 WO2022147794A1 (fr) 2021-01-08 2021-01-08 Procédé et appareil de test de taux d'erreur binaire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2021/070959 WO2022147794A1 (fr) 2021-01-08 2021-01-08 Procédé et appareil de test de taux d'erreur binaire

Publications (1)

Publication Number Publication Date
WO2022147794A1 true WO2022147794A1 (fr) 2022-07-14

Family

ID=75811475

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/070959 WO2022147794A1 (fr) 2021-01-08 2021-01-08 Procédé et appareil de test de taux d'erreur binaire

Country Status (2)

Country Link
CN (2) CN114760014A (fr)
WO (1) WO2022147794A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023092408A1 (fr) * 2021-11-25 2023-06-01 华为技术有限公司 Procédé, appareil et système de communication

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101304290A (zh) * 2008-06-13 2008-11-12 华为技术有限公司 一种射频指标的测试方法、系统和装置
US20100237879A1 (en) * 2009-03-20 2010-09-23 King Yuan Electronics Co., Ltd Method and apparatus for improving yield ratio of testing
CN106027172A (zh) * 2016-04-22 2016-10-12 北京联盛德微电子有限责任公司 一种接收机芯片的测试方法和装置
CN111385022A (zh) * 2018-12-29 2020-07-07 深圳市海思半导体有限公司 误码检测方法及相关设备

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI106834B (fi) * 1998-06-03 2001-04-12 Nokia Mobile Phones Ltd Menetelmä ja järjestelmä datakanavien toimivuuden testaamiseksi radiolaitteessa
FI990690A (fi) * 1999-03-29 2000-09-30 Nokia Mobile Phones Ltd Menetelmä ja järjestelmä tiedonsiirron toimivuuden testaamiseksi radio laitteessa
KR100356507B1 (ko) * 2000-11-27 2002-10-18 엘지전자 주식회사 Ｄｓｒｃ 지능형 교통 시스템의 비트 오류율 시험 장치 및방법
US6973600B2 (en) * 2002-02-01 2005-12-06 Adc Dsl Systems, Inc. Bit error rate tester
CN100417062C (zh) * 2004-07-27 2008-09-03 中兴通讯股份有限公司 一种无线数字通信系统的误码检测方法及装置
US7899642B2 (en) * 2005-07-12 2011-03-01 Nokia Corporation Optimized RFID/NFC BER testing
CN101500253B (zh) * 2008-01-29 2014-09-17 大唐移动通信设备有限公司 基站上行传输信道性能的测试系统及装置和方法
CN100589586C (zh) * 2008-04-09 2010-02-10 北京航空航天大学 一种数字电视广播接收测试方法及其装置
CN101478367A (zh) * 2008-12-12 2009-07-08 北京创毅视讯科技有限公司 误比特率测试方法、装置和移动多媒体广播终端
CN201515375U (zh) * 2008-12-12 2010-06-23 北京创毅视讯科技有限公司 误比特率测试装置和移动多媒体广播终端
CN106603171B (zh) * 2017-02-21 2020-06-09 中国联合网络通信集团有限公司 终端接收机误比特率的测试方法及设备

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101304290A (zh) * 2008-06-13 2008-11-12 华为技术有限公司 一种射频指标的测试方法、系统和装置
US20100237879A1 (en) * 2009-03-20 2010-09-23 King Yuan Electronics Co., Ltd Method and apparatus for improving yield ratio of testing
CN106027172A (zh) * 2016-04-22 2016-10-12 北京联盛德微电子有限责任公司 一种接收机芯片的测试方法和装置
CN111385022A (zh) * 2018-12-29 2020-07-07 深圳市海思半导体有限公司 误码检测方法及相关设备

Also Published As

Publication number Publication date
CN112805950B (zh) 2022-03-08
CN112805950A (zh) 2021-05-14
CN114760014A (zh) 2022-07-15

Similar Documents

Publication Publication Date Title
US7773531B2 (en) Method for testing data packet transceiver using loop back packet generation
KR102650392B1 (ko) 송신기 테스트 파라미터를 획득하는 방법 및 장치 그리고 저장 매체
US20070258383A1 (en) Packet Loss Measurement Device and Error Rate Measurement Device Using the Same
US8472340B1 (en) Network interface with autonegotiation and cable length measurement
US20160179647A1 (en) Test logic for a serial interconnect
CN104618054A (zh) 参数调整方法及装置
US9917705B2 (en) Device and measuring method for ascertaining the internal delay time of a can bus connection unit
WO2013182137A1 (fr) Procédé et appareil de test de débit
WO2022147794A1 (fr) Procédé et appareil de test de taux d'erreur binaire
CN102651702A (zh) 以太网性能测量方法及设备
US9705777B2 (en) System and method for monitoring encoded signals in a network
JP5238369B2 (ja) データ受信装置、データ受信方法及びデータ受信プログラム
CN104683175A (zh) 网络性能测试的方法及测试装置
US9722914B2 (en) Heterogeneous network system, network apparatus, and rendezvous path selection method thereof
JP6398329B2 (ja) 制御装置、制御方法及びプログラム
US9832066B2 (en) Port number extension method and switch
US8832499B2 (en) Methods and structure for trapping requests directed to hardware registers of an electronic circuit
US20210058495A1 (en) Communication device, communication system, and protocol switchover method
KR101473144B1 (ko) Can 통신 기반의 반도체 테스트 방법 및 시스템
US11388090B2 (en) Bandwidth measurement method and measurement device
WO2021208807A1 (fr) Procédé et appareil de configuration de ressource de signal de référence, dispositif, et support de stockage
CN112769631B (zh) 数据传输质量的测量方法、转发设备和可读存储介质
WO2017012415A1 (fr) Procédé et appareil de découpage de paquet, et support lisible par ordinateur
JPS63108828A (ja) デイジタル回線の監視方法
EP4322165A1 (fr) Procédé et appareil de réglage d'égalisation d'interface de données, dispositif et support de stockage

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21916849

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 21916849

Country of ref document: EP

Kind code of ref document: A1