WO2022146233A1 - Method of shielding electronic modules from radio frequency electromagnetic radiation - Google Patents
Method of shielding electronic modules from radio frequency electromagnetic radiation Download PDFInfo
- Publication number
- WO2022146233A1 WO2022146233A1 PCT/SG2021/050791 SG2021050791W WO2022146233A1 WO 2022146233 A1 WO2022146233 A1 WO 2022146233A1 SG 2021050791 W SG2021050791 W SG 2021050791W WO 2022146233 A1 WO2022146233 A1 WO 2022146233A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- wafer assembly
- tool
- radio frequency
- fluid
- bladder
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 42
- 230000005670 electromagnetic radiation Effects 0.000 title description 3
- 239000012530 fluid Substances 0.000 claims abstract description 39
- 238000000151 deposition Methods 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 238000004519 manufacturing process Methods 0.000 claims abstract description 8
- 239000010410 layer Substances 0.000 claims description 18
- 230000008021 deposition Effects 0.000 claims description 11
- 239000004593 Epoxy Substances 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 9
- 239000002356 single layer Substances 0.000 claims description 6
- 239000004205 dimethyl polysiloxane Substances 0.000 claims description 5
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 claims description 5
- 238000009987 spinning Methods 0.000 claims description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 claims description 3
- 239000002041 carbon nanotube Substances 0.000 claims description 3
- 229910021393 carbon nanotube Inorganic materials 0.000 claims description 3
- -1 polydimethylsiloxane Polymers 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 239000007787 solid Substances 0.000 claims description 3
- 238000001035 drying Methods 0.000 claims description 2
- 238000011049 filling Methods 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 description 37
- 230000003287 optical effect Effects 0.000 description 6
- 230000005693 optoelectronics Effects 0.000 description 6
- 239000011248 coating agent Substances 0.000 description 5
- 238000000576 coating method Methods 0.000 description 5
- 239000004020 conductor Substances 0.000 description 4
- 239000007788 liquid Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 239000007921 spray Substances 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 239000006229 carbon black Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 125000003700 epoxy group Chemical group 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- 239000000049 pigment Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
A method of manufacturing radio frequency shielded electronic modules, the method comprising: providing a tool having one or more outlet holes; applying the tool to a surface of a wafer assembly comprising a plurality of electronic modules supported on a substrate, so that one or more contacting portions of the tool contacts said surface of the wafer assembly and said contacting portions are aligned with regions of the wafer assembly where a radio frequency shielding fluid is not to be deposited; depositing an electrically conductive radio frequency shielding fluid on the wafer assembly via the outlet holes; removing excess fluid from the tool and wafer assembly; removing the tool from the wafer assembly; and separating the wafer assembly into discrete electronic modules.
Description
Method of shielding electronic modules from radio frequency electromagnetic radiation
Technical field
The present invention relates to a method of shielding electronic modules from radio frequency electromagnetic radiation.
Background
Electronic modules such as integrated circuit (IC) chips often include components which are sensitive to radio frequency (RF) electromagnetic interference (EMI), for example certain optoelectronic modules. As a result, it is known to surround or “package” electronic modules with some form of RF EMI shielding. However, current methods of applying shielding to chips are expensive and labour intensive. In particular, they require extensive handling and processing of individual modules after they have been diced from a wafer.
Summary of the invention
According to the present invention, there is provided an efficient and cost-effective method for manufacturing RF EMI shielded electronic modules at a wafer level. Importantly, embodiments of the present invention may allow for the simultaneous addition of RF shielding to a plurality of individual modules whilst mounted on a shared wafer or other common substrate, without compromising the effectiveness of the RF shielding.
In an aspect of the present invention, there is provided a method of manufacturing radio frequency shielded electronic modules, the method comprising: providing a tool having one or more outlet holes; applying the tool to a surface of a wafer assembly comprising a plurality of electronic modules supported on a substrate, so that one or more contacting portions of the tool contacts said surface of the wafer assembly and said contacting portions are aligned with regions of the wafer assembly where a radio frequency shielding fluid is not to be deposited; depositing an electrically conductive radio frequency shielding fluid on the wafer assembly via the outlet holes; removing excess
fluid from the tool and wafer assembly; removing the tool from the wafer assembly; and separating the wafer assembly into discrete electronic modules.
In an embodiment, the radio frequency shielding fluid comprises a metal-containing epoxy, optionally a silver-containing epoxy.
In an embodiment, the radio frequency shielding fluid comprises a carbon nanotube based epoxy.
In an embodiment, the radio frequency shielding fluid is substantially optically opaque.
In an embodiment, excess fluid is removed from the tool and wafer assembly by spinning the combined structure and or by applying pressurised air.
In an embodiment, the method further comprises: after depositing the radio frequency shielding fluid onto the wafer assembly, drying or curing the radio frequency shielding fluid to form one or more substantially solid layers.
In an embodiment, the method further comprises: pre-heating the wafer assembly before deposition of the radio frequency shielding fluid on the assembly, optionally before the application of the tool to the surface of the wafer assembly.
In an embodiment, the contacting portions of the tool are projections.
In an embodiment, the contacting portions of the tool are configured to reversibly adhere to the contacted regions of the surface of the wafer assembly.
In an embodiment, the tool is substantially formed from polydimethylsiloxane.
In an embodiment, the tool comprises a bladder, and the electrically conductive radio frequency shielding fluid is deposited on the wafer assembly by filling the bladder with the electrically conductive radio frequency shielding fluid.
In an embodiment, said bladder defines additional outlet holes configured to allow said excess fluid to exit the bladder.
In an embodiment, said bladder comprises top and bottom layers defining between them a generally planar chamber into which said shielding fluid is filled.
In an embodiment, said tool comprises a monolayer, for example an acrylic tape.
In an embodiment, the method further comprises: after applying the tool to the surface of the wafer assembly, forming a vacuum or partial vacuum in a volume between the tool and the substrate during deposition of the electrically conductive radio frequency shielding fluid.
In an embodiment, said wafer assembly comprises a multiplicity of spaced apart electronic modules and said step of depositing comprises depositing said electrically conductive fluid onto exposed sidewalls of the electronic modules.
Brief description of the drawings
Figure 1 shows schematically a prior art electronic module with a metal cap;
Figure 2 shows schematically a prior art electronic module which has been spray-coated with an RF shielding material;
Figure 3 is a flow-diagram to illustrate a method of manufacturing RF shielded electronic modules;
Figure 4 shows schematically a wafer assembly prior to addition of RF shielding;
Figure 5 shows schematically a deposition tool applied to a wafer assembly;
Figure 6 shows schematically the addition of RF shielding material to a wafer assembly;
Figure 7 shows schematically an RF shielded electronic module; and
Figures 8 and 9 show schematically further examples of a deposition tool applied to a wafer assembly.
Detailed description
A known method for providing radio frequency (RF) shielding to an electronic module involves the provision of a metal cap. Figure 1 shows an prior art electronic module 1a with a metal cap 2. The metal cap 2 is mounted to a substrate 3 and encloses electronic components 4, essentially operating as a Faraday cage. However, the addition of a metal cap 2 is expensive, and requires the modules 1a to be diced from the wafer and processed individually. This does not lend itself to wafer level production processes.
Metal caps 2 are also bulky, causing an increase in the total size and weight of the module 1a. This is particularly disadvantageous for modules for use in small devices such as smartphones, where interior space is at a premium.
An alternative technique is to spray-coat the module with an electrically conductive material or “paint”. A prior art module 1b with a spray-coated shielding layer 5 is shown in Figure 2. Again, each chip 1 b must first be diced from the wafer in order to apply the coating 5 to the full surface of the module 1b. In particular, the often narrow gap between individual modules on the wafer means that the sides of the modules 1 b cannot be spray- coated effectively without separation from the wafer, and individual handling (so-called “Pick-and-Place”) to alter the pitch of each module 1b. Furthermore, where an aperture is desired in the shielding layer 5 as shown in Figure 2, for example to provide optical channels for optoelectronic components such as sensors, known spray-coating techniques require masking or physical or chemical etching. This makes the shielding process inefficient and expensive.
A new method of applying RF shielding to individual electronic modules is presented here and which can be performed prior to the separation of individual modules from the wafer or another shared substrate (for example the dicing tape). The method is described with reference to Figures 3 to 7. In particular, Figure 3 is a flow diagram illustrating a number of steps, SO to S6, referred to below.
At SO, a wafer assembly is obtained. Figure 4 shows the wafer assembly prior to the addition of RF shielding material. The wafer assembly comprises a plurality of electronic components forming a plurality of discrete individual electronic modules 6 supported on a wafer substrate 7. The wafer substrate 7 may, in turn, be mounted on a dicing tape (not shown). In SO, a number of optional steps may also be carried out to prepare the wafer assembly. In particular, the wafer assembly may be pre-heated to cause a liquid RF shielding material applied to the wafer assembly to begin to cure on contact. Preheating of the wafer assembly may also improve the adherence of the deposition tool 9 (described below) to the surface of the wafer assembly. As shown in Figure 4, the wafer assembly is placed on a support 8, for example in a spin-coating device.
At S1 , a deposition tool 9 is placed on top of the wafer assembly as shown in Figure 5. The tool 9 in Figure 5 comprises a bladder, that is a balloon or bag-like structure defining an internal chamber 10 for accommodating the RF shielding material. When applied to
the wafer assembly, the bladder 9 comprises an upper surface 9a, a lower surface 9b, and a side surface 9c. The lower surface 9b of the bladder 9 covers a substantial amount of the upper surface of the wafer assembly, for example the entire upper surface of the wafer assembly. The lower surface 9b of the bladder 9 is provided with a plurality of outlet holes 11 passing through to the internal chamber 10. During S1 , the bladder 9 is positioned such that the outlet holes 11 are aligned with respect to specific positions on the electronic modules 6. In addition, regions of the lower surface 9b in between the outlet holes 11 contact the upper surface of the wafer assembly at specific locations, to prevent RF shielding material from being deposited at the contacted regions. The internal chamber 10 may also be provided with one or more internal structures such as channels or dividing walls to provide further control as to the flow and deposition of the RF shielding material. Once applied to the wafer assembly, the bladder 9 may sit securely in place without requiring support (e.g. manual or otherwise).
The bladder 9 is semi-rigid. That is, the bladder 9 is not brittle, and is malleable to adjust to the contours of the underlying wafer assembly, for example to accommodate certain tolerances in wafer manufacture. At the same time, the bladder 9 has sufficient structural integrity to ensure that the outlet holes 11 retain their position relative to the wafer assembly during use, in order to deposit the RF shielding material at the desired locations. The walls 9a, 9b, 9c of the bladder 9 must also be able to resist the pressure used to fill the internal chamber 10 and deposit the RF shielding material as discussed below. The outer surfaces of the bladder 9, in particular the lower surface 9b, are also tacky, or capable of exhibiting mild adhesive properties (for example at a given temperature). This allows the lower surface of 9b of the bladder 9 to adhere slightly to the wafer assembly. A suitable material from which the bladder 9 may constructed may therefore be polydimethylsiloxane (PDMS).
In S2, the internal chamber 10 of the bladder 9 is filled with an RF shielding material 12. The RF shielding material is an electrically conductive material which can be applied to the wafer assembly as a liquid or semi-liquid, and set or cured once deposited to form a substantially solid RF shielding coating, for example subjecting the wafer assembly to a given temperature for a given duration. A suitable RF shielding material is a metalcontaining epoxy, such as a silver-containing epoxy. Carbon nanotube based epoxies could also be used. As shown in Figure 6, the conductive material 12 is pumped into the internal chamber 10 through an inlet hole 13 provided in the upper surface 9a of the
bladder 9. This may be achieved using air-pressure (for example of 0.8mb) generated by a delivery device 14.
The RF shielding material 12 is then deposited onto the wafer assembly. The RF shielding material 12 exits through the outlet holes 11 in the lower surface 9b of the bladder 9 under pressure, for example under the pressure exerted by the delivery device 14. The tool 9 and the wafer substrate 7 or dicing tape may also be used to create an air-tight seal around the electronic modules 6. During deposition of the RF shielding material, the volume in between the wafer substrate 7 or dicing tape and the tool 9 may therefore be placed under vacuum. This can prevent air from becoming trapped in the shielding layer as it is formed. After exiting the bladder 9, the material 12 is deposited onto the wafer assembly so as to form one or more RF shielding layers 15 across the modules 6.
In S3, excess material may optionally be removed from the wafer assembly, to leave only a shielding layer 15 in the desired location and with the desired thickness. This is achieved by spinning the wafer assembly, for example in a spin coater. This causes excess material to flow through channels in between the individual electronic modules 6 on the wafer assembly, and to escape the wafer assembly in the radial direction under centrifugal force. Alternatively or additionally, compressed gas may be applied to the wafer assembly to remove the excess material. The thickness of the resulting RF shielding layer 15 may be for example 50 pm or less, or 10 pm or less. Notably, the shielding layer 15 can be made significantly thinner than the prior art metal cages 2 as shown in Figure 1.
Also in S3, excess material remaining in the internal chamber 10 of the bladder 9 may be removed. In one example, the bladder is spun along with the wafer assembly as described above. The excess material then exits the bladder 9 under centrifugal force, for example via further outlet holes 11b provided in the side surface 9c of the bladder 9. This allows for the bladder 9 to be substantially emptied and lifted from the wafer assembly without excess conductive material 12 escaping onto the wafer assembly outside of the desired locations. The bladder 9 is then lifted from the wafer assembly (S4), and the wafer substrate 7 is diced (S5) (for example by sawing, cutting, or scribing and breaking) to leave a plurality of discrete RF shielded electronic modules 6 or “dice”, as shown in Figure 7. S6 may include dicing through one or more regions of the RF shielding material 12 deposited on the wafer assembly, for example regions of material
12 coating the side surfaces of the electronic modules 6 and located in between adjacent modules 6. After the wafer substrate 7 has been diced, individual dice can be lifted from the dicing tape for use, e.g. for incorporation into a device.
The method as described above allows for RF shielding material 12 to be deposited at specific locations on each module 6 without the need for masking or physical or chemical etching (a time-costly requirement of conventional spray-coating techniques). This is aided by the tackiness of the lower surface 9b of the bladder 9, which allows the lower surface 9b to slightly adhere to the upper surface of the wafer assembly, preventing shielding material 12 from being deposited at the regions of contact. The ability to deposit RF shielding material 12 at specific locations may be particularly advantageous to allow for access to electronic components, or to provide optical channels for optoelectronic components such as sensors. For example, an optical channel may be created by depositing an optically opaque RF shielding material 12 so as to leave an aperture 16 in a portion of the shielding layer 15 (as shown in Figure 7). In this way, the method can provide not only RF shielding to an optoelectronic module, but can also be used to form a well-defined optical channel to control the amount and direction of light able to reach the optoelectronic components. A suitable optically opaque RF shielding material has, for example, an optical depth (OD) of 6 or greater. This may be achieved by the inclusion of one or more pigments in the RF shielding material 12, such as carbon black. Alternatively, optical access for optoelectronic components could be achieved by using a transparent or semi-transparent RF shielding material 12, for example a transparent epoxy.
The method as described above allows for RF shielding to be applied to a plurality of electronic modules simultaneously, without the need for modules to be first separated from the wafer and processed individually. Thus, both the cost and production-time associated with the manufacture of RF shielded chips is greatly reduced. The method also allows for a reduction in the overall size of shielded electronic modules when compared with cage-shielded modules 1 a as shown in Figure 1. This allows for modules to be included in smaller devices, and to be made smaller without a loss of performance. At the same time, the resulting RF shielding layer 12 remains highly effective at protecting electronic components from external RF EMI, for example up to 90dB or more at 100MHz. The method can be suitably applied to a wide range of electronic modules of various types and sizes, for example 200 pm across. The method may be particularly advantageous when used to provide RF shielding for modules with high-speed logic,
such as the MERANO-Hybrid Flood Illuminator, available from by ams AG, Austria. The shielding layer 15 produced by the method may also exhibit a high degree of homogeneity, for example +/- 10%.
In an example, when the tool comprises a bladder 9, the RF shielding material 12 may not necessarily be deposited from the bladder 9 under the pressure used to fill of the bladder (e.g. that generated by a delivery device 14). External pressure may instead be applied to one or more surfaces 9a, 9b, 9c of the bladder 9 to extrude the RF shielding material 12 from internal chamber 10 through the outlet holes 11. In this regard, the bladder 9 may be provided “pre-filled” with a desired amount of RF shielding material 12.
In a further example, the wafer substrate 7 may be diced prior to the application of the tool 9 to the wafer assembly in S1 , for example as a further wafer preparation step in SO. The individual electronic modules 6 still share a common substrate, in the form of the dicing tape underlying the wafer substrate 7, and S2 to S4 can be performed as described above. In S5, all that may then be required is the lifting of individual dice from the dicing tape. Alternatively, depending on the locations in which the RF shielding layer 15 has been formed and the degree to which excess shielding material has been removed, the wafer assembly may be diced for a second time at S6, this time to cut through the fabricated RF shielding layer 15.
The skilled person will appreciate that a number of modifications may be made to the method as described above. In particular, other configurations of the deposition tool 9 may be used instead of a bladder. Figure 8 shows an alternative tool 9 applied to a wafer substrate. Here, the tool 9 comprises a monolayer 17, comprising one or more outlet holes in the form of through-holes (not shown), and a plurality of projections 18, depending from the lower surface of the tool 9. Firstly, the monolayer tool 17 is applied to the wafer assembly, and aligned such that the projections 18 contact the electronic modules 6 at regions which are not to be coated with a RF shielding layer 15. As described above, the lower surface of the tool 17, in particular the lower surface of the projections 18, is lightly adhesive or “tacky” so as to reversibly adhere to the surface of the wafer assembly. Again, a suitable material for the tool 17 may be PDMS, or other materials such as acrylic tape. An electrically conductive radio frequency shielding fluid is deposited onto the wafer assembly via the through-hole or holes. In the example shown in Figure 8, the shielding fluid is allowed to flow through the spaces in between the individual electronic modules 6, to coat the entire surface of the electronic modules
6 except for the regions contacted by the projections 18. The combined structure is then spun to expel excess fluid, leaving a coating on any exposed upper surface regions of the wafer assembly and on exposed sidewalls. The fluid is then cured (although partial or full curing may have occurred prior to spinning).
Figure 9 shows a further configuration of the tool 9. In this example the tool 9 comprises a flat, uniform monolayer 19. When applied to the wafer assembly, the entire upper surface of each electronic module 6 is contacted by the monolayer 19. This will result in a radio frequency shielding layer 15 coating only the side surfaces of each module 6.
Claims
1. A method of manufacturing radio frequency shielded electronic modules, the method comprising: providing a tool having one or more outlet holes; applying the tool to a surface of a wafer assembly comprising a plurality of electronic modules supported on a substrate, so that one or more contacting portions of the tool contacts said surface of the wafer assembly and said contacting portions are aligned with regions of the wafer assembly where a radio frequency shielding fluid is not to be deposited; depositing an electrically conductive radio frequency shielding fluid on the wafer assembly via the outlet holes; removing excess fluid from the tool and wafer assembly; removing the tool from the wafer assembly; and separating the wafer assembly into discrete electronic modules.
2. A method according to claim 1 , wherein the radio frequency shielding fluid comprises a metal-containing epoxy, optionally a silver-containing epoxy.
3. A method according to claim 1 , wherein the radio frequency shielding fluid comprises a carbon nanotube based epoxy.
4. A method according to claim 1 , wherein the radio frequency shielding fluid is substantially optically opaque.
5. A method according to claim 1 , wherein excess fluid is removed from the tool and wafer assembly either by spinning the combined structure or by applying pressurised air.
6. A method according to claim 1 , wherein the method further comprises: after depositing the radio frequency shielding fluid onto the wafer assembly, drying or curing the radio frequency shielding fluid to form one or more substantially solid layers.
7. A method according to claim 1 , further comprising:
pre-heating the wafer assembly before deposition of the radio frequency shielding fluid on the assembly, optionally before the application of the tool to the surface of the wafer assembly.
8. A method according to claim 1 , wherein the contacting portions of the tool are projections.
9. A method according to claim 1 , wherein the contacting portions of the tool are configured to reversibly adhere to the contacted regions of the surface of the wafer assembly.
10. A method according to claim 1 , wherein the tool is substantially formed from polydimethylsiloxane.
11. A method according to claim 1 , wherein the tool comprises a bladder, and the electrically conductive radio frequency shielding fluid is deposited on the wafer assembly by filling the bladder with the electrically conductive radio frequency shielding fluid.
12. A method according to claim 11 , wherein said bladder defines additional outlet holes configured to allow said excess fluid to exit the bladder.
13. A method according to claim 11 , wherein said bladder comprises top and bottom layers defining between them a generally planar chamber into which said shielding fluid is filled.
14. A method according to claim 1 , wherein said tool comprises a monolayer, for example an acrylic tape.
15. A method according to claim 1 , further comprising: after applying the tool to the surface of the wafer assembly, forming a vacuum or partial vacuum in a volume between the tool and the substrate during deposition of the electrically conductive radio frequency shielding fluid.
16. A method according to any one of the preceding claims, wherein said wafer assembly comprises a multiplicity of spaced apart electronic modules and said step of
depositing comprises depositing said electrically conductive fluid onto exposed sidewalls of the electronic modules.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB2020709.8A GB202020709D0 (en) | 2020-12-30 | 2020-12-30 | Method of shielding electronic modules from radio frequency electromagnetic radiation |
GB2020709.8 | 2020-12-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2022146233A1 true WO2022146233A1 (en) | 2022-07-07 |
Family
ID=74532197
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/SG2021/050791 WO2022146233A1 (en) | 2020-12-30 | 2021-12-16 | Method of shielding electronic modules from radio frequency electromagnetic radiation |
Country Status (2)
Country | Link |
---|---|
GB (1) | GB202020709D0 (en) |
WO (1) | WO2022146233A1 (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101247343B1 (en) * | 2011-09-30 | 2013-03-26 | 에스티에스반도체통신 주식회사 | Method for manufacturing a semiconductor package having a anti- electromagnetic wave means |
US20130183777A1 (en) * | 2012-01-12 | 2013-07-18 | Samsung Electronics Co., Ltd. | Method of forming phosphor layer on light-emitting device chip wafer using wafer level mold |
US20140073079A1 (en) * | 2010-05-18 | 2014-03-13 | Samsung Electronics Co., Ltd. | Camera module and method of manufacturing the camera module |
US20180163063A1 (en) * | 2015-08-03 | 2018-06-14 | Henkel IP & Holding GmbH | Achieving electromagnetic interference shielding protection by deposition of highly conductive compositions |
US20180226358A1 (en) * | 2016-03-18 | 2018-08-09 | Intel Corporation | Systems and methods for electromagnetic interference shielding |
-
2020
- 2020-12-30 GB GBGB2020709.8A patent/GB202020709D0/en not_active Ceased
-
2021
- 2021-12-16 WO PCT/SG2021/050791 patent/WO2022146233A1/en active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140073079A1 (en) * | 2010-05-18 | 2014-03-13 | Samsung Electronics Co., Ltd. | Camera module and method of manufacturing the camera module |
KR101247343B1 (en) * | 2011-09-30 | 2013-03-26 | 에스티에스반도체통신 주식회사 | Method for manufacturing a semiconductor package having a anti- electromagnetic wave means |
US20130183777A1 (en) * | 2012-01-12 | 2013-07-18 | Samsung Electronics Co., Ltd. | Method of forming phosphor layer on light-emitting device chip wafer using wafer level mold |
US20180163063A1 (en) * | 2015-08-03 | 2018-06-14 | Henkel IP & Holding GmbH | Achieving electromagnetic interference shielding protection by deposition of highly conductive compositions |
US20180226358A1 (en) * | 2016-03-18 | 2018-08-09 | Intel Corporation | Systems and methods for electromagnetic interference shielding |
Also Published As
Publication number | Publication date |
---|---|
GB202020709D0 (en) | 2021-02-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7595226B2 (en) | Method of packaging an integrated circuit die | |
US8535980B2 (en) | Method for producing vias in fan-out wafers using dry film and conductive paste, and a corresponding semiconductor package | |
US9595504B2 (en) | Methods and systems for releasably attaching support members to microfeature workpieces | |
US7517722B2 (en) | Method of producing a universal semiconductor housing with precrosslinked plastic embedding compounds | |
US20160111375A1 (en) | Temporary bonding of packages to carrier for depositing metal layer for shielding | |
US20160190028A1 (en) | Method and structure for fan-out wafer level packaging | |
EP2689458B1 (en) | Patterned uv sensitive silicone-phosphor layer over leds, and method for fabricating the same | |
US20170186698A1 (en) | Electronic package having electromagnetic interference shielding and associated method | |
CN108257882A (en) | The method of stress release in device encapsulation structure and encapsulation process | |
CN110880456A (en) | Custom lead frame from standard and printed lead frame parts | |
US8026599B2 (en) | Method of protecting integrated circuits | |
US6794225B2 (en) | Surface treatment for microelectronic device substrate | |
WO2022146233A1 (en) | Method of shielding electronic modules from radio frequency electromagnetic radiation | |
US20060162850A1 (en) | Methods and apparatus for releasably attaching microfeature workpieces to support members | |
US20100279467A1 (en) | Methodology for processing a panel during semiconductor device fabrication | |
JP2019068013A (en) | Processing method of package substrate and protective tape | |
CN110731006A (en) | Method and apparatus for wafer level packaging | |
EP1801870A1 (en) | Partial adherent temporary substrate and method of using the same | |
US4366187A (en) | Immersion curing of encapsulating material | |
US3947952A (en) | Method of encapsulating beam lead semiconductor devices | |
CN110013931A (en) | Device and spraying method for BGA packages spraying | |
US20110134612A1 (en) | Rebuilt wafer assembly | |
CN112435967A (en) | Die package and method of manufacturing die package | |
EP4078668B1 (en) | Singulated encapsulated component and method for the manufacturing thereof | |
CN220382083U (en) | Substrate assembly, substrate and chip |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 21915961 Country of ref document: EP Kind code of ref document: A1 |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 21915961 Country of ref document: EP Kind code of ref document: A1 |